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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 493a1b3ea9ae715e0d38c7d18cfc508dc7f346db / . / asoc / sm6150.c
blob: 991245216af060fea9e824a00bb684dfd5673837 [file] [log] [blame]
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1/*
2 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/of_gpio.h>
18#include <linux/platform_device.h>
19#include <linux/slab.h>
20#include <linux/io.h>
21#include <linux/module.h>
22#include <linux/input.h>
23#include <linux/of_device.h>
24#include <linux/pm_qos.h>
25#include <sound/core.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/pcm.h>
29#include <sound/pcm_params.h>
30#include <sound/info.h>
31#include <dsp/audio_notifier.h>
32#include <dsp/q6afe-v2.h>
33#include <dsp/q6core.h>
34#include "device_event.h"
35#include "msm-pcm-routing-v2.h"
36#include "codecs/msm-cdc-pinctrl.h"
37#include "codecs/wcd934x/wcd934x.h"
38#include "codecs/wcd934x/wcd934x-mbhc.h"
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]39#include "codecs/wcd937x/wcd937x-mbhc.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]40#include "codecs/wsa881x.h"
41#include "codecs/bolero/bolero-cdc.h"
42#include <dt-bindings/sound/audio-codec-port-types.h>
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]43#include "codecs/bolero/wsa-macro.h"
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]44#include "codecs/wcd937x/internal.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]45
46#define DRV_NAME "sm6150-asoc-snd"
47
48#define __CHIPSET__ "SM6150 "
49#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
50
51#define SAMPLING_RATE_8KHZ 8000
52#define SAMPLING_RATE_11P025KHZ 11025
53#define SAMPLING_RATE_16KHZ 16000
54#define SAMPLING_RATE_22P05KHZ 22050
55#define SAMPLING_RATE_32KHZ 32000
56#define SAMPLING_RATE_44P1KHZ 44100
57#define SAMPLING_RATE_48KHZ 48000
58#define SAMPLING_RATE_88P2KHZ 88200
59#define SAMPLING_RATE_96KHZ 96000
60#define SAMPLING_RATE_176P4KHZ 176400
61#define SAMPLING_RATE_192KHZ 192000
62#define SAMPLING_RATE_352P8KHZ 352800
63#define SAMPLING_RATE_384KHZ 384000
64
65#define WCD9XXX_MBHC_DEF_BUTTONS 8
66#define WCD9XXX_MBHC_DEF_RLOADS 5
67#define CODEC_EXT_CLK_RATE 9600000
68#define ADSP_STATE_READY_TIMEOUT_MS 3000
69#define DEV_NAME_STR_LEN 32
70
71#define WSA8810_NAME_1 "wsa881x.20170211"
72#define WSA8810_NAME_2 "wsa881x.20170212"
73#define WCN_CDC_SLIM_RX_CH_MAX 2
74#define WCN_CDC_SLIM_TX_CH_MAX 3
75#define TDM_CHANNEL_MAX 8
76
77#define ADSP_STATE_READY_TIMEOUT_MS 3000
78#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
79#define MSM_HIFI_ON 1
80
81enum {
82 SLIM_RX_0 = 0,
83 SLIM_RX_1,
84 SLIM_RX_2,
85 SLIM_RX_3,
86 SLIM_RX_4,
87 SLIM_RX_5,
88 SLIM_RX_6,
89 SLIM_RX_7,
90 SLIM_RX_MAX,
91};
92enum {
93 SLIM_TX_0 = 0,
94 SLIM_TX_1,
95 SLIM_TX_2,
96 SLIM_TX_3,
97 SLIM_TX_4,
98 SLIM_TX_5,
99 SLIM_TX_6,
100 SLIM_TX_7,
101 SLIM_TX_8,
102 SLIM_TX_MAX,
103};
104
105enum {
106 PRIM_MI2S = 0,
107 SEC_MI2S,
108 TERT_MI2S,
109 QUAT_MI2S,
110 QUIN_MI2S,
111 MI2S_MAX,
112};
113
114enum {
115 PRIM_AUX_PCM = 0,
116 SEC_AUX_PCM,
117 TERT_AUX_PCM,
118 QUAT_AUX_PCM,
119 QUIN_AUX_PCM,
120 AUX_PCM_MAX,
121};
122
123enum {
124 WSA_CDC_DMA_RX_0 = 0,
125 WSA_CDC_DMA_RX_1,
126 RX_CDC_DMA_RX_0,
127 RX_CDC_DMA_RX_1,
128 RX_CDC_DMA_RX_2,
129 RX_CDC_DMA_RX_3,
130 RX_CDC_DMA_RX_5,
131 CDC_DMA_RX_MAX,
132};
133
134enum {
135 WSA_CDC_DMA_TX_0 = 0,
136 WSA_CDC_DMA_TX_1,
137 WSA_CDC_DMA_TX_2,
138 TX_CDC_DMA_TX_0,
139 TX_CDC_DMA_TX_3,
140 TX_CDC_DMA_TX_4,
141 CDC_DMA_TX_MAX,
142};
143
144struct mi2s_conf {
145 struct mutex lock;
146 u32 ref_cnt;
147 u32 msm_is_mi2s_master;
148};
149
150static u32 mi2s_ebit_clk[MI2S_MAX] = {
151 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
152 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
153 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
154 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
155 Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
156};
157
158struct dev_config {
159 u32 sample_rate;
160 u32 bit_format;
161 u32 channels;
162};
163
164enum {
165 DP_RX_IDX = 0,
166 EXT_DISP_RX_IDX_MAX,
167};
168
169struct msm_wsa881x_dev_info {
170 struct device_node *of_node;
171 u32 index;
172};
173
174struct aux_codec_dev_info {
175 struct device_node *of_node;
176 u32 index;
177};
178
179enum pinctrl_pin_state {
180 STATE_DISABLE = 0, /* All pins are in sleep state */
181 STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
182 STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
183};
184
185struct msm_pinctrl_info {
186 struct pinctrl *pinctrl;
187 struct pinctrl_state *mi2s_disable;
188 struct pinctrl_state *tdm_disable;
189 struct pinctrl_state *mi2s_active;
190 struct pinctrl_state *tdm_active;
191 enum pinctrl_pin_state curr_state;
192};
193
194struct msm_asoc_mach_data {
195 struct snd_info_entry *codec_root;
196 struct msm_pinctrl_info pinctrl_info;
197 int usbc_en2_gpio; /* used by gpio driver API */
198 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
199 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
200 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
201 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
202 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
203 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
204};
205
206struct msm_asoc_wcd93xx_codec {
207 void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
208 enum afe_config_type config_type);
209};
210
211static const char *const pin_states[] = {"sleep", "i2s-active",
212 "tdm-active"};
213
214static struct snd_soc_card snd_soc_card_sm6150_msm;
215
216enum {
217 TDM_0 = 0,
218 TDM_1,
219 TDM_2,
220 TDM_3,
221 TDM_4,
222 TDM_5,
223 TDM_6,
224 TDM_7,
225 TDM_PORT_MAX,
226};
227
228enum {
229 TDM_PRI = 0,
230 TDM_SEC,
231 TDM_TERT,
232 TDM_QUAT,
233 TDM_QUIN,
234 TDM_INTERFACE_MAX,
235};
236
237struct tdm_port {
238 u32 mode;
239 u32 channel;
240};
241
242/* TDM default config */
243static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
244 { /* PRI TDM */
245 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
246 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
247 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
248 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
249 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
250 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
251 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
252 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
253 },
254 { /* SEC TDM */
255 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
256 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
257 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
258 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
259 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
260 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
261 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
262 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
263 },
264 { /* TERT TDM */
265 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
266 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
267 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
268 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
269 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
271 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
272 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
273 },
274 { /* QUAT TDM */
275 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
278 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
279 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
280 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
281 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
282 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
283 },
284 { /* QUIN TDM */
285 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
291 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
292 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
293 }
294
295};
296
297/* TDM default config */
298static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
299 { /* PRI TDM */
300 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
308 },
309 { /* SEC TDM */
310 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
318 },
319 { /* TERT TDM */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
328 },
329 { /* QUAT TDM */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
338 },
339 { /* QUIN TDM */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
348 }
349};
350
351
352/* Default configuration of slimbus channels */
353static struct dev_config slim_rx_cfg[] = {
354 [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
355 [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
356 [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
357 [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
358 [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
359 [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
360 [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
361 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
362};
363
364static struct dev_config slim_tx_cfg[] = {
365 [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
366 [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
367 [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
368 [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
369 [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
370 [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
371 [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
372 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
373 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
374};
375
376/* Default configuration of Codec DMA Interface Tx */
377static struct dev_config cdc_dma_rx_cfg[] = {
378 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
379 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
380 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
381 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
382 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
383 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
384 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
385};
386
387/* Default configuration of Codec DMA Interface Rx */
388static struct dev_config cdc_dma_tx_cfg[] = {
389 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
390 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
391 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
392 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
393 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
394 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
395};
396
397/* Default configuration of external display BE */
398static struct dev_config ext_disp_rx_cfg[] = {
399 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
400};
401
402static struct dev_config usb_rx_cfg = {
403 .sample_rate = SAMPLING_RATE_48KHZ,
404 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
405 .channels = 2,
406};
407
408static struct dev_config usb_tx_cfg = {
409 .sample_rate = SAMPLING_RATE_48KHZ,
410 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
411 .channels = 1,
412};
413
414static struct dev_config proxy_rx_cfg = {
415 .sample_rate = SAMPLING_RATE_48KHZ,
416 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
417 .channels = 2,
418};
419
420/* Default configuration of MI2S channels */
421static struct dev_config mi2s_rx_cfg[] = {
422 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
423 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
424 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
425 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
426 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
427};
428
429static struct dev_config mi2s_tx_cfg[] = {
430 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
431 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
432 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
433 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
434 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
435};
436
437static struct dev_config aux_pcm_rx_cfg[] = {
438 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
439 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
440 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
441 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
442 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
443};
444
445static struct dev_config aux_pcm_tx_cfg[] = {
446 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
447 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
448 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
449 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
450 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
451};
452static int msm_vi_feed_tx_ch = 2;
453static const char *const slim_rx_ch_text[] = {"One", "Two"};
454static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
455 "Five", "Six", "Seven",
456 "Eight"};
457static const char *const vi_feed_ch_text[] = {"One", "Two"};
458static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
459 "S32_LE"};
460static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
461 "S24_3LE"};
462static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
463 "KHZ_32", "KHZ_44P1", "KHZ_48",
464 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
465 "KHZ_192", "KHZ_352P8", "KHZ_384"};
466static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
467 "KHZ_44P1", "KHZ_48",
468 "KHZ_88P2", "KHZ_96"};
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame^]469static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
470 "KHZ_44P1", "KHZ_48",
471 "KHZ_88P2", "KHZ_96"};
472static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
473 "KHZ_44P1", "KHZ_48",
474 "KHZ_88P2", "KHZ_96"};
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]475static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
476 "Five", "Six", "Seven",
477 "Eight"};
478static char const *ch_text[] = {"Two", "Three", "Four", "Five",
479 "Six", "Seven", "Eight"};
480static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
481 "KHZ_16", "KHZ_22P05",
482 "KHZ_32", "KHZ_44P1", "KHZ_48",
483 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
484 "KHZ_192", "KHZ_352P8", "KHZ_384"};
485static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
486 "KHZ_192", "KHZ_32", "KHZ_44P1",
487 "KHZ_88P2", "KHZ_176P4" };
488static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
489 "Five", "Six", "Seven", "Eight"};
490static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
491static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
492 "KHZ_48", "KHZ_176P4",
493 "KHZ_352P8"};
494static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
495static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
496 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
497 "KHZ_48", "KHZ_96", "KHZ_192"};
498static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
499 "Five", "Six", "Seven",
500 "Eight"};
501static const char *const hifi_text[] = {"Off", "On"};
502static const char *const qos_text[] = {"Disable", "Enable"};
503
504static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
505static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
506 "Five", "Six", "Seven",
507 "Eight"};
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]508static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
509 "KHZ_16", "KHZ_22P05",
510 "KHZ_32", "KHZ_44P1", "KHZ_48",
511 "KHZ_88P2", "KHZ_96",
512 "KHZ_176P4", "KHZ_192",
513 "KHZ_352P8", "KHZ_384"};
514
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]515
516static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
517static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
518static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
519static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
520static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
521static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
522static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
523static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
524static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
525static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
526static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
527static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
528static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
529static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
530static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
531static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
532static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
533static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
534static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
535static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
536static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
537static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
538static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
539static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame^]540static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
541static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]542static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
543static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
544static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
545 ext_disp_sample_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
547static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
548static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
549static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
550static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
551static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
552static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
553static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
555static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
556static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
557static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
558static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
559static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
560static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
561static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
562static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
563static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
564static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
565static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
566static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
567static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
568static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
569static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
570static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
571static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
572static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
573static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
574static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
575static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
576static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
577static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
578static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
579static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
580static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
581static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
582static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
583static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
584static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
585static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
586static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
587static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
588static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
589static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
590static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
591static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
592static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
593static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
594static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
595static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
596static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
597static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
598static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
599static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
600static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
601static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
602static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
603static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
604static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
605static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
606static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
607static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
608static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
609static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
610static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
611static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
612static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
613 cdc_dma_sample_rate_text);
614static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
615 cdc_dma_sample_rate_text);
616static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
617 cdc_dma_sample_rate_text);
618static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
619 cdc_dma_sample_rate_text);
620static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
621 cdc_dma_sample_rate_text);
622static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
623 cdc_dma_sample_rate_text);
624static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
625 cdc_dma_sample_rate_text);
626static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
627 cdc_dma_sample_rate_text);
628static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
629 cdc_dma_sample_rate_text);
630static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
631 cdc_dma_sample_rate_text);
632static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
633 cdc_dma_sample_rate_text);
634static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
635 cdc_dma_sample_rate_text);
636static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
637 cdc_dma_sample_rate_text);
638
639static struct platform_device *spdev;
640
641static int msm_hifi_control;
642static bool is_initial_boot;
643static bool codec_reg_done;
644static struct snd_soc_aux_dev *msm_aux_dev;
645static struct snd_soc_codec_conf *msm_codec_conf;
646static struct msm_asoc_wcd93xx_codec msm_codec_fn;
647
648static int dmic_0_1_gpio_cnt;
649static int dmic_2_3_gpio_cnt;
650
651static void *def_wcd_mbhc_cal(void);
652static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
653 int enable, bool dapm);
654static int msm_wsa881x_init(struct snd_soc_component *component);
655static int msm_aux_codec_init(struct snd_soc_component *component);
656
657/*
658 * Need to report LINEIN
659 * if R/L channel impedance is larger than 5K ohm
660 */
661static struct wcd_mbhc_config wcd_mbhc_cfg = {
662 .read_fw_bin = false,
663 .calibration = NULL,
664 .detect_extn_cable = true,
665 .mono_stero_detection = false,
666 .swap_gnd_mic = NULL,
667 .hs_ext_micbias = true,
668 .key_code[0] = KEY_MEDIA,
669 .key_code[1] = KEY_VOICECOMMAND,
670 .key_code[2] = KEY_VOLUMEUP,
671 .key_code[3] = KEY_VOLUMEDOWN,
672 .key_code[4] = 0,
673 .key_code[5] = 0,
674 .key_code[6] = 0,
675 .key_code[7] = 0,
676 .linein_th = 5000,
677 .moisture_en = true,
678 .mbhc_micbias = MIC_BIAS_2,
679 .anc_micbias = MIC_BIAS_2,
680 .enable_anc_mic_detect = false,
681};
682
683static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
684 {"MIC BIAS1", NULL, "MCLK TX"},
685 {"MIC BIAS2", NULL, "MCLK TX"},
686 {"MIC BIAS3", NULL, "MCLK TX"},
687 {"MIC BIAS4", NULL, "MCLK TX"},
688};
689
690static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
691 {
692 AFE_API_VERSION_I2S_CONFIG,
693 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
694 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
695 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
696 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
697 0,
698 },
699 {
700 AFE_API_VERSION_I2S_CONFIG,
701 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
702 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
703 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
704 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
705 0,
706 },
707 {
708 AFE_API_VERSION_I2S_CONFIG,
709 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
710 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
711 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
712 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
713 0,
714 },
715 {
716 AFE_API_VERSION_I2S_CONFIG,
717 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
718 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
719 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
720 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
721 0,
722 },
723 {
724 AFE_API_VERSION_I2S_CONFIG,
725 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
726 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
727 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
728 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
729 0,
730 }
731
732};
733
734static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
735
736static int slim_get_sample_rate_val(int sample_rate)
737{
738 int sample_rate_val = 0;
739
740 switch (sample_rate) {
741 case SAMPLING_RATE_8KHZ:
742 sample_rate_val = 0;
743 break;
744 case SAMPLING_RATE_16KHZ:
745 sample_rate_val = 1;
746 break;
747 case SAMPLING_RATE_32KHZ:
748 sample_rate_val = 2;
749 break;
750 case SAMPLING_RATE_44P1KHZ:
751 sample_rate_val = 3;
752 break;
753 case SAMPLING_RATE_48KHZ:
754 sample_rate_val = 4;
755 break;
756 case SAMPLING_RATE_88P2KHZ:
757 sample_rate_val = 5;
758 break;
759 case SAMPLING_RATE_96KHZ:
760 sample_rate_val = 6;
761 break;
762 case SAMPLING_RATE_176P4KHZ:
763 sample_rate_val = 7;
764 break;
765 case SAMPLING_RATE_192KHZ:
766 sample_rate_val = 8;
767 break;
768 case SAMPLING_RATE_352P8KHZ:
769 sample_rate_val = 9;
770 break;
771 case SAMPLING_RATE_384KHZ:
772 sample_rate_val = 10;
773 break;
774 default:
775 sample_rate_val = 4;
776 break;
777 }
778 return sample_rate_val;
779}
780
781static int slim_get_sample_rate(int value)
782{
783 int sample_rate = 0;
784
785 switch (value) {
786 case 0:
787 sample_rate = SAMPLING_RATE_8KHZ;
788 break;
789 case 1:
790 sample_rate = SAMPLING_RATE_16KHZ;
791 break;
792 case 2:
793 sample_rate = SAMPLING_RATE_32KHZ;
794 break;
795 case 3:
796 sample_rate = SAMPLING_RATE_44P1KHZ;
797 break;
798 case 4:
799 sample_rate = SAMPLING_RATE_48KHZ;
800 break;
801 case 5:
802 sample_rate = SAMPLING_RATE_88P2KHZ;
803 break;
804 case 6:
805 sample_rate = SAMPLING_RATE_96KHZ;
806 break;
807 case 7:
808 sample_rate = SAMPLING_RATE_176P4KHZ;
809 break;
810 case 8:
811 sample_rate = SAMPLING_RATE_192KHZ;
812 break;
813 case 9:
814 sample_rate = SAMPLING_RATE_352P8KHZ;
815 break;
816 case 10:
817 sample_rate = SAMPLING_RATE_384KHZ;
818 break;
819 default:
820 sample_rate = SAMPLING_RATE_48KHZ;
821 break;
822 }
823 return sample_rate;
824}
825
826static int slim_get_bit_format_val(int bit_format)
827{
828 int val = 0;
829
830 switch (bit_format) {
831 case SNDRV_PCM_FORMAT_S32_LE:
832 val = 3;
833 break;
834 case SNDRV_PCM_FORMAT_S24_3LE:
835 val = 2;
836 break;
837 case SNDRV_PCM_FORMAT_S24_LE:
838 val = 1;
839 break;
840 case SNDRV_PCM_FORMAT_S16_LE:
841 default:
842 val = 0;
843 break;
844 }
845 return val;
846}
847
848static int slim_get_bit_format(int val)
849{
850 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
851
852 switch (val) {
853 case 0:
854 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
855 break;
856 case 1:
857 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
858 break;
859 case 2:
860 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
861 break;
862 case 3:
863 bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
864 break;
865 default:
866 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
867 break;
868 }
869 return bit_fmt;
870}
871
872static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
873{
874 int port_id = 0;
875
876 if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
877 port_id = SLIM_RX_0;
878 } else if (strnstr(kcontrol->id.name,
879 "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
880 port_id = SLIM_RX_2;
881 } else if (strnstr(kcontrol->id.name,
882 "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
883 port_id = SLIM_RX_5;
884 } else if (strnstr(kcontrol->id.name,
885 "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
886 port_id = SLIM_RX_6;
887 } else if (strnstr(kcontrol->id.name,
888 "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
889 port_id = SLIM_TX_0;
890 } else if (strnstr(kcontrol->id.name,
891 "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
892 port_id = SLIM_TX_1;
893 } else {
894 pr_err("%s: unsupported channel: %s\n",
895 __func__, kcontrol->id.name);
896 return -EINVAL;
897 }
898
899 return port_id;
900}
901
902static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
903 struct snd_ctl_elem_value *ucontrol)
904{
905 int ch_num = slim_get_port_idx(kcontrol);
906
907 if (ch_num < 0)
908 return ch_num;
909
910 ucontrol->value.enumerated.item[0] =
911 slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
912
913 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
914 ch_num, slim_rx_cfg[ch_num].sample_rate,
915 ucontrol->value.enumerated.item[0]);
916
917 return 0;
918}
919
920static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
921 struct snd_ctl_elem_value *ucontrol)
922{
923 int ch_num = slim_get_port_idx(kcontrol);
924
925 if (ch_num < 0)
926 return ch_num;
927
928 slim_rx_cfg[ch_num].sample_rate =
929 slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
930
931 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
932 ch_num, slim_rx_cfg[ch_num].sample_rate,
933 ucontrol->value.enumerated.item[0]);
934
935 return 0;
936}
937
938static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
939 struct snd_ctl_elem_value *ucontrol)
940{
941 int ch_num = slim_get_port_idx(kcontrol);
942
943 if (ch_num < 0)
944 return ch_num;
945
946 ucontrol->value.enumerated.item[0] =
947 slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
948
949 pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
950 ch_num, slim_tx_cfg[ch_num].sample_rate,
951 ucontrol->value.enumerated.item[0]);
952
953 return 0;
954}
955
956static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
957 struct snd_ctl_elem_value *ucontrol)
958{
959 int sample_rate = 0;
960 int ch_num = slim_get_port_idx(kcontrol);
961
962 if (ch_num < 0)
963 return ch_num;
964
965 sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
966 if (sample_rate == SAMPLING_RATE_44P1KHZ) {
967 pr_err("%s: Unsupported sample rate %d: for Tx path\n",
968 __func__, sample_rate);
969 return -EINVAL;
970 }
971 slim_tx_cfg[ch_num].sample_rate = sample_rate;
972
973 pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
974 ch_num, slim_tx_cfg[ch_num].sample_rate,
975 ucontrol->value.enumerated.item[0]);
976
977 return 0;
978}
979
980static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
981 struct snd_ctl_elem_value *ucontrol)
982{
983 int ch_num = slim_get_port_idx(kcontrol);
984
985 if (ch_num < 0)
986 return ch_num;
987
988 ucontrol->value.enumerated.item[0] =
989 slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
990
991 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
992 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
993 ucontrol->value.enumerated.item[0]);
994
995 return 0;
996}
997
998static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
999 struct snd_ctl_elem_value *ucontrol)
1000{
1001 int ch_num = slim_get_port_idx(kcontrol);
1002
1003 if (ch_num < 0)
1004 return ch_num;
1005
1006 slim_rx_cfg[ch_num].bit_format =
1007 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1008
1009 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1010 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1011 ucontrol->value.enumerated.item[0]);
1012
1013 return 0;
1014}
1015
1016static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
1017 struct snd_ctl_elem_value *ucontrol)
1018{
1019 int ch_num = slim_get_port_idx(kcontrol);
1020
1021 if (ch_num < 0)
1022 return ch_num;
1023
1024 ucontrol->value.enumerated.item[0] =
1025 slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
1026
1027 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1028 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1029 ucontrol->value.enumerated.item[0]);
1030
1031 return 0;
1032}
1033
1034static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
1035 struct snd_ctl_elem_value *ucontrol)
1036{
1037 int ch_num = slim_get_port_idx(kcontrol);
1038
1039 if (ch_num < 0)
1040 return ch_num;
1041
1042 slim_tx_cfg[ch_num].bit_format =
1043 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1044
1045 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1046 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1047 ucontrol->value.enumerated.item[0]);
1048
1049 return 0;
1050}
1051
1052static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
1053 struct snd_ctl_elem_value *ucontrol)
1054{
1055 int ch_num = slim_get_port_idx(kcontrol);
1056
1057 if (ch_num < 0)
1058 return ch_num;
1059
1060 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1061 ch_num, slim_rx_cfg[ch_num].channels);
1062 ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
1063
1064 return 0;
1065}
1066
1067static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
1068 struct snd_ctl_elem_value *ucontrol)
1069{
1070 int ch_num = slim_get_port_idx(kcontrol);
1071
1072 if (ch_num < 0)
1073 return ch_num;
1074
1075 slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1076 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1077 ch_num, slim_rx_cfg[ch_num].channels);
1078
1079 return 1;
1080}
1081
1082static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
1083 struct snd_ctl_elem_value *ucontrol)
1084{
1085 int ch_num = slim_get_port_idx(kcontrol);
1086
1087 if (ch_num < 0)
1088 return ch_num;
1089
1090 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1091 ch_num, slim_tx_cfg[ch_num].channels);
1092 ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
1093
1094 return 0;
1095}
1096
1097static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
1098 struct snd_ctl_elem_value *ucontrol)
1099{
1100 int ch_num = slim_get_port_idx(kcontrol);
1101
1102 if (ch_num < 0)
1103 return ch_num;
1104
1105 slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1106 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1107 ch_num, slim_tx_cfg[ch_num].channels);
1108
1109 return 1;
1110}
1111
1112static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1113 struct snd_ctl_elem_value *ucontrol)
1114{
1115 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1116 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1117 ucontrol->value.integer.value[0]);
1118 return 0;
1119}
1120
1121static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1122 struct snd_ctl_elem_value *ucontrol)
1123{
1124 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1125
1126 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1127 return 1;
1128}
1129
1130static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
1131 struct snd_ctl_elem_value *ucontrol)
1132{
1133 /*
1134 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
1135 * when used for BT_SCO use case. Return either Rx or Tx sample rate
1136 * value.
1137 */
1138 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1139 case SAMPLING_RATE_96KHZ:
1140 ucontrol->value.integer.value[0] = 5;
1141 break;
1142 case SAMPLING_RATE_88P2KHZ:
1143 ucontrol->value.integer.value[0] = 4;
1144 break;
1145 case SAMPLING_RATE_48KHZ:
1146 ucontrol->value.integer.value[0] = 3;
1147 break;
1148 case SAMPLING_RATE_44P1KHZ:
1149 ucontrol->value.integer.value[0] = 2;
1150 break;
1151 case SAMPLING_RATE_16KHZ:
1152 ucontrol->value.integer.value[0] = 1;
1153 break;
1154 case SAMPLING_RATE_8KHZ:
1155 default:
1156 ucontrol->value.integer.value[0] = 0;
1157 break;
1158 }
1159 pr_debug("%s: sample rate = %d\n", __func__,
1160 slim_rx_cfg[SLIM_RX_7].sample_rate);
1161
1162 return 0;
1163}
1164
1165static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
1166 struct snd_ctl_elem_value *ucontrol)
1167{
1168 switch (ucontrol->value.integer.value[0]) {
1169 case 1:
1170 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1171 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1172 break;
1173 case 2:
1174 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1175 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1176 break;
1177 case 3:
1178 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1179 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1180 break;
1181 case 4:
1182 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1183 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1184 break;
1185 case 5:
1186 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1187 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1188 break;
1189 case 0:
1190 default:
1191 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1192 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1193 break;
1194 }
1195 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
1196 __func__,
1197 slim_rx_cfg[SLIM_RX_7].sample_rate,
1198 slim_tx_cfg[SLIM_TX_7].sample_rate,
1199 ucontrol->value.enumerated.item[0]);
1200
1201 return 0;
1202}
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame^]1203static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
1204 struct snd_ctl_elem_value *ucontrol)
1205{
1206 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1207 case SAMPLING_RATE_96KHZ:
1208 ucontrol->value.integer.value[0] = 5;
1209 break;
1210 case SAMPLING_RATE_88P2KHZ:
1211 ucontrol->value.integer.value[0] = 4;
1212 break;
1213 case SAMPLING_RATE_48KHZ:
1214 ucontrol->value.integer.value[0] = 3;
1215 break;
1216 case SAMPLING_RATE_44P1KHZ:
1217 ucontrol->value.integer.value[0] = 2;
1218 break;
1219 case SAMPLING_RATE_16KHZ:
1220 ucontrol->value.integer.value[0] = 1;
1221 break;
1222 case SAMPLING_RATE_8KHZ:
1223 default:
1224 ucontrol->value.integer.value[0] = 0;
1225 break;
1226 }
1227 pr_debug("%s: sample rate rx = %d", __func__,
1228 slim_rx_cfg[SLIM_RX_7].sample_rate);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1229
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame^]1230 return 0;
1231}
1232
1233static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
1234 struct snd_ctl_elem_value *ucontrol)
1235{
1236 switch (ucontrol->value.integer.value[0]) {
1237 case 1:
1238 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1239 break;
1240 case 2:
1241 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1242 break;
1243 case 3:
1244 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1245 break;
1246 case 4:
1247 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1248 break;
1249 case 5:
1250 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1251 break;
1252 case 0:
1253 default:
1254 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1255 break;
1256 }
1257 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
1258 __func__,
1259 slim_rx_cfg[SLIM_RX_7].sample_rate,
1260 ucontrol->value.enumerated.item[0]);
1261
1262 return 0;
1263}
1264
1265static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
1266 struct snd_ctl_elem_value *ucontrol)
1267{
1268 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
1269 case SAMPLING_RATE_96KHZ:
1270 ucontrol->value.integer.value[0] = 5;
1271 break;
1272 case SAMPLING_RATE_88P2KHZ:
1273 ucontrol->value.integer.value[0] = 4;
1274 break;
1275 case SAMPLING_RATE_48KHZ:
1276 ucontrol->value.integer.value[0] = 3;
1277 break;
1278 case SAMPLING_RATE_44P1KHZ:
1279 ucontrol->value.integer.value[0] = 2;
1280 break;
1281 case SAMPLING_RATE_16KHZ:
1282 ucontrol->value.integer.value[0] = 1;
1283 break;
1284 case SAMPLING_RATE_8KHZ:
1285 default:
1286 ucontrol->value.integer.value[0] = 0;
1287 break;
1288 }
1289 pr_debug("%s: sample rate tx = %d", __func__,
1290 slim_tx_cfg[SLIM_TX_7].sample_rate);
1291
1292 return 0;
1293}
1294
1295static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
1296 struct snd_ctl_elem_value *ucontrol)
1297{
1298 switch (ucontrol->value.integer.value[0]) {
1299 case 1:
1300 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1301 break;
1302 case 2:
1303 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1304 break;
1305 case 3:
1306 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1307 break;
1308 case 4:
1309 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1310 break;
1311 case 5:
1312 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1313 break;
1314 case 0:
1315 default:
1316 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1317 break;
1318 }
1319 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
1320 __func__,
1321 slim_tx_cfg[SLIM_TX_7].sample_rate,
1322 ucontrol->value.enumerated.item[0]);
1323
1324 return 0;
1325}
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1326static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
1327{
1328 int idx = 0;
1329
1330 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
1331 sizeof("WSA_CDC_DMA_RX_0")))
1332 idx = WSA_CDC_DMA_RX_0;
1333 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
1334 sizeof("WSA_CDC_DMA_RX_0")))
1335 idx = WSA_CDC_DMA_RX_1;
1336 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
1337 sizeof("RX_CDC_DMA_RX_0")))
1338 idx = RX_CDC_DMA_RX_0;
1339 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
1340 sizeof("RX_CDC_DMA_RX_1")))
1341 idx = RX_CDC_DMA_RX_1;
1342 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
1343 sizeof("RX_CDC_DMA_RX_2")))
1344 idx = RX_CDC_DMA_RX_2;
1345 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
1346 sizeof("RX_CDC_DMA_RX_3")))
1347 idx = RX_CDC_DMA_RX_3;
1348 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
1349 sizeof("RX_CDC_DMA_RX_5")))
1350 idx = RX_CDC_DMA_RX_5;
1351 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
1352 sizeof("WSA_CDC_DMA_TX_0")))
1353 idx = WSA_CDC_DMA_TX_0;
1354 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
1355 sizeof("WSA_CDC_DMA_TX_1")))
1356 idx = WSA_CDC_DMA_TX_1;
1357 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
1358 sizeof("WSA_CDC_DMA_TX_2")))
1359 idx = WSA_CDC_DMA_TX_2;
1360 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
1361 sizeof("TX_CDC_DMA_TX_0")))
1362 idx = TX_CDC_DMA_TX_0;
1363 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
1364 sizeof("TX_CDC_DMA_TX_3")))
1365 idx = TX_CDC_DMA_TX_3;
1366 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
1367 sizeof("TX_CDC_DMA_TX_4")))
1368 idx = TX_CDC_DMA_TX_4;
1369 else {
1370 pr_err("%s: unsupported channel: %s\n",
1371 __func__, kcontrol->id.name);
1372 return -EINVAL;
1373 }
1374
1375 return idx;
1376}
1377
1378static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
1379 struct snd_ctl_elem_value *ucontrol)
1380{
1381 int ch_num = cdc_dma_get_port_idx(kcontrol);
1382
1383 if (ch_num < 0)
1384 return ch_num;
1385
1386 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1387 cdc_dma_rx_cfg[ch_num].channels - 1);
1388 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
1389 return 0;
1390}
1391
1392static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
1393 struct snd_ctl_elem_value *ucontrol)
1394{
1395 int ch_num = cdc_dma_get_port_idx(kcontrol);
1396
1397 if (ch_num < 0)
1398 return ch_num;
1399
1400 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1401
1402 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1403 cdc_dma_rx_cfg[ch_num].channels);
1404 return 1;
1405}
1406
1407static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
1408 struct snd_ctl_elem_value *ucontrol)
1409{
1410 int ch_num = cdc_dma_get_port_idx(kcontrol);
1411
1412 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
1413 case SNDRV_PCM_FORMAT_S32_LE:
1414 ucontrol->value.integer.value[0] = 3;
1415 break;
1416 case SNDRV_PCM_FORMAT_S24_3LE:
1417 ucontrol->value.integer.value[0] = 2;
1418 break;
1419 case SNDRV_PCM_FORMAT_S24_LE:
1420 ucontrol->value.integer.value[0] = 1;
1421 break;
1422 case SNDRV_PCM_FORMAT_S16_LE:
1423 default:
1424 ucontrol->value.integer.value[0] = 0;
1425 break;
1426 }
1427
1428 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1429 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1430 ucontrol->value.integer.value[0]);
1431 return 0;
1432}
1433
1434static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
1435 struct snd_ctl_elem_value *ucontrol)
1436{
1437 int rc = 0;
1438 int ch_num = cdc_dma_get_port_idx(kcontrol);
1439
1440 switch (ucontrol->value.integer.value[0]) {
1441 case 3:
1442 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1443 break;
1444 case 2:
1445 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1446 break;
1447 case 1:
1448 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1449 break;
1450 case 0:
1451 default:
1452 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1453 break;
1454 }
1455 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1456 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1457 ucontrol->value.integer.value[0]);
1458
1459 return rc;
1460}
1461
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1462
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1463static int cdc_dma_get_sample_rate_val(int sample_rate)
1464{
1465 int sample_rate_val = 0;
1466
1467 switch (sample_rate) {
1468 case SAMPLING_RATE_8KHZ:
1469 sample_rate_val = 0;
1470 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1471 case SAMPLING_RATE_11P025KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1472 sample_rate_val = 1;
1473 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1474 case SAMPLING_RATE_16KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1475 sample_rate_val = 2;
1476 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1477 case SAMPLING_RATE_22P05KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1478 sample_rate_val = 3;
1479 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1480 case SAMPLING_RATE_32KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1481 sample_rate_val = 4;
1482 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1483 case SAMPLING_RATE_44P1KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1484 sample_rate_val = 5;
1485 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1486 case SAMPLING_RATE_48KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1487 sample_rate_val = 6;
1488 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1489 case SAMPLING_RATE_88P2KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1490 sample_rate_val = 7;
1491 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1492 case SAMPLING_RATE_96KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1493 sample_rate_val = 8;
1494 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1495 case SAMPLING_RATE_176P4KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1496 sample_rate_val = 9;
1497 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1498 case SAMPLING_RATE_192KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1499 sample_rate_val = 10;
1500 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1501 case SAMPLING_RATE_352P8KHZ:
1502 sample_rate_val = 11;
1503 break;
1504 case SAMPLING_RATE_384KHZ:
1505 sample_rate_val = 12;
1506 break;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1507 default:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1508 sample_rate_val = 6;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1509 break;
1510 }
1511 return sample_rate_val;
1512}
1513
1514static int cdc_dma_get_sample_rate(int value)
1515{
1516 int sample_rate = 0;
1517
1518 switch (value) {
1519 case 0:
1520 sample_rate = SAMPLING_RATE_8KHZ;
1521 break;
1522 case 1:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1523 sample_rate = SAMPLING_RATE_11P025KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1524 break;
1525 case 2:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1526 sample_rate = SAMPLING_RATE_16KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1527 break;
1528 case 3:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1529 sample_rate = SAMPLING_RATE_22P05KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1530 break;
1531 case 4:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1532 sample_rate = SAMPLING_RATE_32KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1533 break;
1534 case 5:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1535 sample_rate = SAMPLING_RATE_44P1KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1536 break;
1537 case 6:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1538 sample_rate = SAMPLING_RATE_48KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1539 break;
1540 case 7:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1541 sample_rate = SAMPLING_RATE_88P2KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1542 break;
1543 case 8:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1544 sample_rate = SAMPLING_RATE_96KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1545 break;
1546 case 9:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1547 sample_rate = SAMPLING_RATE_176P4KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1548 break;
1549 case 10:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1550 sample_rate = SAMPLING_RATE_192KHZ;
1551 break;
1552 case 11:
1553 sample_rate = SAMPLING_RATE_352P8KHZ;
1554 break;
1555 case 12:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1556 sample_rate = SAMPLING_RATE_384KHZ;
1557 break;
1558 default:
1559 sample_rate = SAMPLING_RATE_48KHZ;
1560 break;
1561 }
1562 return sample_rate;
1563}
1564
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1565static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1566 struct snd_ctl_elem_value *ucontrol)
1567{
1568 int ch_num = cdc_dma_get_port_idx(kcontrol);
1569
1570 if (ch_num < 0)
1571 return ch_num;
1572
1573 ucontrol->value.enumerated.item[0] =
1574 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
1575
1576 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
1577 cdc_dma_rx_cfg[ch_num].sample_rate);
1578 return 0;
1579}
1580
1581static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1582 struct snd_ctl_elem_value *ucontrol)
1583{
1584 int ch_num = cdc_dma_get_port_idx(kcontrol);
1585
1586 if (ch_num < 0)
1587 return ch_num;
1588
1589 cdc_dma_rx_cfg[ch_num].sample_rate =
1590 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
1591
1592
1593 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
1594 __func__, ucontrol->value.enumerated.item[0],
1595 cdc_dma_rx_cfg[ch_num].sample_rate);
1596 return 0;
1597}
1598
1599static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
1600 struct snd_ctl_elem_value *ucontrol)
1601{
1602 int ch_num = cdc_dma_get_port_idx(kcontrol);
1603
1604 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1605 cdc_dma_tx_cfg[ch_num].channels);
1606 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
1607 return 0;
1608}
1609
1610static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
1611 struct snd_ctl_elem_value *ucontrol)
1612{
1613 int ch_num = cdc_dma_get_port_idx(kcontrol);
1614
1615 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1616
1617 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1618 cdc_dma_tx_cfg[ch_num].channels);
1619 return 1;
1620}
1621
1622static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1623 struct snd_ctl_elem_value *ucontrol)
1624{
1625 int sample_rate_val;
1626 int ch_num = cdc_dma_get_port_idx(kcontrol);
1627
1628 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
1629 case SAMPLING_RATE_384KHZ:
1630 sample_rate_val = 12;
1631 break;
1632 case SAMPLING_RATE_352P8KHZ:
1633 sample_rate_val = 11;
1634 break;
1635 case SAMPLING_RATE_192KHZ:
1636 sample_rate_val = 10;
1637 break;
1638 case SAMPLING_RATE_176P4KHZ:
1639 sample_rate_val = 9;
1640 break;
1641 case SAMPLING_RATE_96KHZ:
1642 sample_rate_val = 8;
1643 break;
1644 case SAMPLING_RATE_88P2KHZ:
1645 sample_rate_val = 7;
1646 break;
1647 case SAMPLING_RATE_48KHZ:
1648 sample_rate_val = 6;
1649 break;
1650 case SAMPLING_RATE_44P1KHZ:
1651 sample_rate_val = 5;
1652 break;
1653 case SAMPLING_RATE_32KHZ:
1654 sample_rate_val = 4;
1655 break;
1656 case SAMPLING_RATE_22P05KHZ:
1657 sample_rate_val = 3;
1658 break;
1659 case SAMPLING_RATE_16KHZ:
1660 sample_rate_val = 2;
1661 break;
1662 case SAMPLING_RATE_11P025KHZ:
1663 sample_rate_val = 1;
1664 break;
1665 case SAMPLING_RATE_8KHZ:
1666 sample_rate_val = 0;
1667 break;
1668 default:
1669 sample_rate_val = 6;
1670 break;
1671 }
1672
1673 ucontrol->value.integer.value[0] = sample_rate_val;
1674 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
1675 cdc_dma_tx_cfg[ch_num].sample_rate);
1676 return 0;
1677}
1678
1679static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1680 struct snd_ctl_elem_value *ucontrol)
1681{
1682 int ch_num = cdc_dma_get_port_idx(kcontrol);
1683
1684 switch (ucontrol->value.integer.value[0]) {
1685 case 12:
1686 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
1687 break;
1688 case 11:
1689 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
1690 break;
1691 case 10:
1692 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
1693 break;
1694 case 9:
1695 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
1696 break;
1697 case 8:
1698 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
1699 break;
1700 case 7:
1701 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
1702 break;
1703 case 6:
1704 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1705 break;
1706 case 5:
1707 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
1708 break;
1709 case 4:
1710 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
1711 break;
1712 case 3:
1713 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
1714 break;
1715 case 2:
1716 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
1717 break;
1718 case 1:
1719 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
1720 break;
1721 case 0:
1722 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
1723 break;
1724 default:
1725 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1726 break;
1727 }
1728
1729 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
1730 __func__, ucontrol->value.integer.value[0],
1731 cdc_dma_tx_cfg[ch_num].sample_rate);
1732 return 0;
1733}
1734
1735static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
1736 struct snd_ctl_elem_value *ucontrol)
1737{
1738 int ch_num = cdc_dma_get_port_idx(kcontrol);
1739
1740 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
1741 case SNDRV_PCM_FORMAT_S32_LE:
1742 ucontrol->value.integer.value[0] = 3;
1743 break;
1744 case SNDRV_PCM_FORMAT_S24_3LE:
1745 ucontrol->value.integer.value[0] = 2;
1746 break;
1747 case SNDRV_PCM_FORMAT_S24_LE:
1748 ucontrol->value.integer.value[0] = 1;
1749 break;
1750 case SNDRV_PCM_FORMAT_S16_LE:
1751 default:
1752 ucontrol->value.integer.value[0] = 0;
1753 break;
1754 }
1755
1756 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1757 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1758 ucontrol->value.integer.value[0]);
1759 return 0;
1760}
1761
1762static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
1763 struct snd_ctl_elem_value *ucontrol)
1764{
1765 int rc = 0;
1766 int ch_num = cdc_dma_get_port_idx(kcontrol);
1767
1768 switch (ucontrol->value.integer.value[0]) {
1769 case 3:
1770 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1771 break;
1772 case 2:
1773 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1774 break;
1775 case 1:
1776 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1777 break;
1778 case 0:
1779 default:
1780 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1781 break;
1782 }
1783 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1784 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1785 ucontrol->value.integer.value[0]);
1786
1787 return rc;
1788}
1789
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1790static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1791 struct snd_ctl_elem_value *ucontrol)
1792{
1793 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1794 usb_rx_cfg.channels);
1795 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1796 return 0;
1797}
1798
1799static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1800 struct snd_ctl_elem_value *ucontrol)
1801{
1802 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1803
1804 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1805 return 1;
1806}
1807
1808static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1809 struct snd_ctl_elem_value *ucontrol)
1810{
1811 int sample_rate_val;
1812
1813 switch (usb_rx_cfg.sample_rate) {
1814 case SAMPLING_RATE_384KHZ:
1815 sample_rate_val = 12;
1816 break;
1817 case SAMPLING_RATE_352P8KHZ:
1818 sample_rate_val = 11;
1819 break;
1820 case SAMPLING_RATE_192KHZ:
1821 sample_rate_val = 10;
1822 break;
1823 case SAMPLING_RATE_176P4KHZ:
1824 sample_rate_val = 9;
1825 break;
1826 case SAMPLING_RATE_96KHZ:
1827 sample_rate_val = 8;
1828 break;
1829 case SAMPLING_RATE_88P2KHZ:
1830 sample_rate_val = 7;
1831 break;
1832 case SAMPLING_RATE_48KHZ:
1833 sample_rate_val = 6;
1834 break;
1835 case SAMPLING_RATE_44P1KHZ:
1836 sample_rate_val = 5;
1837 break;
1838 case SAMPLING_RATE_32KHZ:
1839 sample_rate_val = 4;
1840 break;
1841 case SAMPLING_RATE_22P05KHZ:
1842 sample_rate_val = 3;
1843 break;
1844 case SAMPLING_RATE_16KHZ:
1845 sample_rate_val = 2;
1846 break;
1847 case SAMPLING_RATE_11P025KHZ:
1848 sample_rate_val = 1;
1849 break;
1850 case SAMPLING_RATE_8KHZ:
1851 default:
1852 sample_rate_val = 0;
1853 break;
1854 }
1855
1856 ucontrol->value.integer.value[0] = sample_rate_val;
1857 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1858 usb_rx_cfg.sample_rate);
1859 return 0;
1860}
1861
1862static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1863 struct snd_ctl_elem_value *ucontrol)
1864{
1865 switch (ucontrol->value.integer.value[0]) {
1866 case 12:
1867 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1868 break;
1869 case 11:
1870 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1871 break;
1872 case 10:
1873 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1874 break;
1875 case 9:
1876 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1877 break;
1878 case 8:
1879 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1880 break;
1881 case 7:
1882 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1883 break;
1884 case 6:
1885 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1886 break;
1887 case 5:
1888 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1889 break;
1890 case 4:
1891 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1892 break;
1893 case 3:
1894 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1895 break;
1896 case 2:
1897 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1898 break;
1899 case 1:
1900 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1901 break;
1902 case 0:
1903 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1904 break;
1905 default:
1906 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1907 break;
1908 }
1909
1910 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1911 __func__, ucontrol->value.integer.value[0],
1912 usb_rx_cfg.sample_rate);
1913 return 0;
1914}
1915
1916static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1917 struct snd_ctl_elem_value *ucontrol)
1918{
1919 switch (usb_rx_cfg.bit_format) {
1920 case SNDRV_PCM_FORMAT_S32_LE:
1921 ucontrol->value.integer.value[0] = 3;
1922 break;
1923 case SNDRV_PCM_FORMAT_S24_3LE:
1924 ucontrol->value.integer.value[0] = 2;
1925 break;
1926 case SNDRV_PCM_FORMAT_S24_LE:
1927 ucontrol->value.integer.value[0] = 1;
1928 break;
1929 case SNDRV_PCM_FORMAT_S16_LE:
1930 default:
1931 ucontrol->value.integer.value[0] = 0;
1932 break;
1933 }
1934
1935 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1936 __func__, usb_rx_cfg.bit_format,
1937 ucontrol->value.integer.value[0]);
1938 return 0;
1939}
1940
1941static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1942 struct snd_ctl_elem_value *ucontrol)
1943{
1944 int rc = 0;
1945
1946 switch (ucontrol->value.integer.value[0]) {
1947 case 3:
1948 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1949 break;
1950 case 2:
1951 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1952 break;
1953 case 1:
1954 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1955 break;
1956 case 0:
1957 default:
1958 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1959 break;
1960 }
1961 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1962 __func__, usb_rx_cfg.bit_format,
1963 ucontrol->value.integer.value[0]);
1964
1965 return rc;
1966}
1967
1968static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1969 struct snd_ctl_elem_value *ucontrol)
1970{
1971 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1972 usb_tx_cfg.channels);
1973 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1974 return 0;
1975}
1976
1977static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1978 struct snd_ctl_elem_value *ucontrol)
1979{
1980 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1981
1982 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1983 return 1;
1984}
1985
1986static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1987 struct snd_ctl_elem_value *ucontrol)
1988{
1989 int sample_rate_val;
1990
1991 switch (usb_tx_cfg.sample_rate) {
1992 case SAMPLING_RATE_384KHZ:
1993 sample_rate_val = 12;
1994 break;
1995 case SAMPLING_RATE_352P8KHZ:
1996 sample_rate_val = 11;
1997 break;
1998 case SAMPLING_RATE_192KHZ:
1999 sample_rate_val = 10;
2000 break;
2001 case SAMPLING_RATE_176P4KHZ:
2002 sample_rate_val = 9;
2003 break;
2004 case SAMPLING_RATE_96KHZ:
2005 sample_rate_val = 8;
2006 break;
2007 case SAMPLING_RATE_88P2KHZ:
2008 sample_rate_val = 7;
2009 break;
2010 case SAMPLING_RATE_48KHZ:
2011 sample_rate_val = 6;
2012 break;
2013 case SAMPLING_RATE_44P1KHZ:
2014 sample_rate_val = 5;
2015 break;
2016 case SAMPLING_RATE_32KHZ:
2017 sample_rate_val = 4;
2018 break;
2019 case SAMPLING_RATE_22P05KHZ:
2020 sample_rate_val = 3;
2021 break;
2022 case SAMPLING_RATE_16KHZ:
2023 sample_rate_val = 2;
2024 break;
2025 case SAMPLING_RATE_11P025KHZ:
2026 sample_rate_val = 1;
2027 break;
2028 case SAMPLING_RATE_8KHZ:
2029 sample_rate_val = 0;
2030 break;
2031 default:
2032 sample_rate_val = 6;
2033 break;
2034 }
2035
2036 ucontrol->value.integer.value[0] = sample_rate_val;
2037 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
2038 usb_tx_cfg.sample_rate);
2039 return 0;
2040}
2041
2042static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2043 struct snd_ctl_elem_value *ucontrol)
2044{
2045 switch (ucontrol->value.integer.value[0]) {
2046 case 12:
2047 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
2048 break;
2049 case 11:
2050 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
2051 break;
2052 case 10:
2053 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
2054 break;
2055 case 9:
2056 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
2057 break;
2058 case 8:
2059 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
2060 break;
2061 case 7:
2062 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
2063 break;
2064 case 6:
2065 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2066 break;
2067 case 5:
2068 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
2069 break;
2070 case 4:
2071 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
2072 break;
2073 case 3:
2074 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
2075 break;
2076 case 2:
2077 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
2078 break;
2079 case 1:
2080 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
2081 break;
2082 case 0:
2083 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
2084 break;
2085 default:
2086 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2087 break;
2088 }
2089
2090 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
2091 __func__, ucontrol->value.integer.value[0],
2092 usb_tx_cfg.sample_rate);
2093 return 0;
2094}
2095
2096static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
2097 struct snd_ctl_elem_value *ucontrol)
2098{
2099 switch (usb_tx_cfg.bit_format) {
2100 case SNDRV_PCM_FORMAT_S32_LE:
2101 ucontrol->value.integer.value[0] = 3;
2102 break;
2103 case SNDRV_PCM_FORMAT_S24_3LE:
2104 ucontrol->value.integer.value[0] = 2;
2105 break;
2106 case SNDRV_PCM_FORMAT_S24_LE:
2107 ucontrol->value.integer.value[0] = 1;
2108 break;
2109 case SNDRV_PCM_FORMAT_S16_LE:
2110 default:
2111 ucontrol->value.integer.value[0] = 0;
2112 break;
2113 }
2114
2115 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2116 __func__, usb_tx_cfg.bit_format,
2117 ucontrol->value.integer.value[0]);
2118 return 0;
2119}
2120
2121static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
2122 struct snd_ctl_elem_value *ucontrol)
2123{
2124 int rc = 0;
2125
2126 switch (ucontrol->value.integer.value[0]) {
2127 case 3:
2128 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
2129 break;
2130 case 2:
2131 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2132 break;
2133 case 1:
2134 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2135 break;
2136 case 0:
2137 default:
2138 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2139 break;
2140 }
2141 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2142 __func__, usb_tx_cfg.bit_format,
2143 ucontrol->value.integer.value[0]);
2144
2145 return rc;
2146}
2147
2148static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
2149{
2150 int idx;
2151
2152 if (strnstr(kcontrol->id.name, "Display Port RX",
2153 sizeof("Display Port RX"))) {
2154 idx = DP_RX_IDX;
2155 } else {
2156 pr_err("%s: unsupported BE: %s\n",
2157 __func__, kcontrol->id.name);
2158 idx = -EINVAL;
2159 }
2160
2161 return idx;
2162}
2163
2164static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
2165 struct snd_ctl_elem_value *ucontrol)
2166{
2167 int idx = ext_disp_get_port_idx(kcontrol);
2168
2169 if (idx < 0)
2170 return idx;
2171
2172 switch (ext_disp_rx_cfg[idx].bit_format) {
2173 case SNDRV_PCM_FORMAT_S24_3LE:
2174 ucontrol->value.integer.value[0] = 2;
2175 break;
2176 case SNDRV_PCM_FORMAT_S24_LE:
2177 ucontrol->value.integer.value[0] = 1;
2178 break;
2179 case SNDRV_PCM_FORMAT_S16_LE:
2180 default:
2181 ucontrol->value.integer.value[0] = 0;
2182 break;
2183 }
2184
2185 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2186 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2187 ucontrol->value.integer.value[0]);
2188 return 0;
2189}
2190
2191static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
2192 struct snd_ctl_elem_value *ucontrol)
2193{
2194 int idx = ext_disp_get_port_idx(kcontrol);
2195
2196 if (idx < 0)
2197 return idx;
2198
2199 switch (ucontrol->value.integer.value[0]) {
2200 case 2:
2201 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2202 break;
2203 case 1:
2204 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2205 break;
2206 case 0:
2207 default:
2208 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2209 break;
2210 }
2211 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2212 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2213 ucontrol->value.integer.value[0]);
2214
2215 return 0;
2216}
2217
2218static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
2219 struct snd_ctl_elem_value *ucontrol)
2220{
2221 int idx = ext_disp_get_port_idx(kcontrol);
2222
2223 if (idx < 0)
2224 return idx;
2225
2226 ucontrol->value.integer.value[0] =
2227 ext_disp_rx_cfg[idx].channels - 2;
2228
2229 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2230 idx, ext_disp_rx_cfg[idx].channels);
2231
2232 return 0;
2233}
2234
2235static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
2236 struct snd_ctl_elem_value *ucontrol)
2237{
2238 int idx = ext_disp_get_port_idx(kcontrol);
2239
2240 if (idx < 0)
2241 return idx;
2242
2243 ext_disp_rx_cfg[idx].channels =
2244 ucontrol->value.integer.value[0] + 2;
2245
2246 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2247 idx, ext_disp_rx_cfg[idx].channels);
2248 return 1;
2249}
2250
2251static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2252 struct snd_ctl_elem_value *ucontrol)
2253{
2254 int sample_rate_val;
2255 int idx = ext_disp_get_port_idx(kcontrol);
2256
2257 if (idx < 0)
2258 return idx;
2259
2260 switch (ext_disp_rx_cfg[idx].sample_rate) {
2261 case SAMPLING_RATE_176P4KHZ:
2262 sample_rate_val = 6;
2263 break;
2264
2265 case SAMPLING_RATE_88P2KHZ:
2266 sample_rate_val = 5;
2267 break;
2268
2269 case SAMPLING_RATE_44P1KHZ:
2270 sample_rate_val = 4;
2271 break;
2272
2273 case SAMPLING_RATE_32KHZ:
2274 sample_rate_val = 3;
2275 break;
2276
2277 case SAMPLING_RATE_192KHZ:
2278 sample_rate_val = 2;
2279 break;
2280
2281 case SAMPLING_RATE_96KHZ:
2282 sample_rate_val = 1;
2283 break;
2284
2285 case SAMPLING_RATE_48KHZ:
2286 default:
2287 sample_rate_val = 0;
2288 break;
2289 }
2290
2291 ucontrol->value.integer.value[0] = sample_rate_val;
2292 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
2293 idx, ext_disp_rx_cfg[idx].sample_rate);
2294
2295 return 0;
2296}
2297
2298static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2299 struct snd_ctl_elem_value *ucontrol)
2300{
2301 int idx = ext_disp_get_port_idx(kcontrol);
2302
2303 if (idx < 0)
2304 return idx;
2305
2306 switch (ucontrol->value.integer.value[0]) {
2307 case 6:
2308 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
2309 break;
2310 case 5:
2311 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
2312 break;
2313 case 4:
2314 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
2315 break;
2316 case 3:
2317 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
2318 break;
2319 case 2:
2320 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
2321 break;
2322 case 1:
2323 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
2324 break;
2325 case 0:
2326 default:
2327 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
2328 break;
2329 }
2330
2331 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
2332 __func__, ucontrol->value.integer.value[0], idx,
2333 ext_disp_rx_cfg[idx].sample_rate);
2334 return 0;
2335}
2336
2337static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
2338 struct snd_ctl_elem_value *ucontrol)
2339{
2340 pr_debug("%s: proxy_rx channels = %d\n",
2341 __func__, proxy_rx_cfg.channels);
2342 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
2343
2344 return 0;
2345}
2346
2347static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
2348 struct snd_ctl_elem_value *ucontrol)
2349{
2350 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
2351 pr_debug("%s: proxy_rx channels = %d\n",
2352 __func__, proxy_rx_cfg.channels);
2353
2354 return 1;
2355}
2356
2357static int tdm_get_sample_rate(int value)
2358{
2359 int sample_rate = 0;
2360
2361 switch (value) {
2362 case 0:
2363 sample_rate = SAMPLING_RATE_8KHZ;
2364 break;
2365 case 1:
2366 sample_rate = SAMPLING_RATE_16KHZ;
2367 break;
2368 case 2:
2369 sample_rate = SAMPLING_RATE_32KHZ;
2370 break;
2371 case 3:
2372 sample_rate = SAMPLING_RATE_48KHZ;
2373 break;
2374 case 4:
2375 sample_rate = SAMPLING_RATE_176P4KHZ;
2376 break;
2377 case 5:
2378 sample_rate = SAMPLING_RATE_352P8KHZ;
2379 break;
2380 default:
2381 sample_rate = SAMPLING_RATE_48KHZ;
2382 break;
2383 }
2384 return sample_rate;
2385}
2386
2387static int aux_pcm_get_sample_rate(int value)
2388{
2389 int sample_rate;
2390
2391 switch (value) {
2392 case 1:
2393 sample_rate = SAMPLING_RATE_16KHZ;
2394 break;
2395 case 0:
2396 default:
2397 sample_rate = SAMPLING_RATE_8KHZ;
2398 break;
2399 }
2400 return sample_rate;
2401}
2402
2403static int tdm_get_sample_rate_val(int sample_rate)
2404{
2405 int sample_rate_val = 0;
2406
2407 switch (sample_rate) {
2408 case SAMPLING_RATE_8KHZ:
2409 sample_rate_val = 0;
2410 break;
2411 case SAMPLING_RATE_16KHZ:
2412 sample_rate_val = 1;
2413 break;
2414 case SAMPLING_RATE_32KHZ:
2415 sample_rate_val = 2;
2416 break;
2417 case SAMPLING_RATE_48KHZ:
2418 sample_rate_val = 3;
2419 break;
2420 case SAMPLING_RATE_176P4KHZ:
2421 sample_rate_val = 4;
2422 break;
2423 case SAMPLING_RATE_352P8KHZ:
2424 sample_rate_val = 5;
2425 break;
2426 default:
2427 sample_rate_val = 3;
2428 break;
2429 }
2430 return sample_rate_val;
2431}
2432
2433static int aux_pcm_get_sample_rate_val(int sample_rate)
2434{
2435 int sample_rate_val;
2436
2437 switch (sample_rate) {
2438 case SAMPLING_RATE_16KHZ:
2439 sample_rate_val = 1;
2440 break;
2441 case SAMPLING_RATE_8KHZ:
2442 default:
2443 sample_rate_val = 0;
2444 break;
2445 }
2446 return sample_rate_val;
2447}
2448
2449static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
2450 struct tdm_port *port)
2451{
2452 if (port) {
2453 if (strnstr(kcontrol->id.name, "PRI",
2454 sizeof(kcontrol->id.name))) {
2455 port->mode = TDM_PRI;
2456 } else if (strnstr(kcontrol->id.name, "SEC",
2457 sizeof(kcontrol->id.name))) {
2458 port->mode = TDM_SEC;
2459 } else if (strnstr(kcontrol->id.name, "TERT",
2460 sizeof(kcontrol->id.name))) {
2461 port->mode = TDM_TERT;
2462 } else if (strnstr(kcontrol->id.name, "QUAT",
2463 sizeof(kcontrol->id.name))) {
2464 port->mode = TDM_QUAT;
2465 } else if (strnstr(kcontrol->id.name, "QUIN",
2466 sizeof(kcontrol->id.name))) {
2467 port->mode = TDM_QUIN;
2468 } else {
2469 pr_err("%s: unsupported mode in: %s\n",
2470 __func__, kcontrol->id.name);
2471 return -EINVAL;
2472 }
2473
2474 if (strnstr(kcontrol->id.name, "RX_0",
2475 sizeof(kcontrol->id.name)) ||
2476 strnstr(kcontrol->id.name, "TX_0",
2477 sizeof(kcontrol->id.name))) {
2478 port->channel = TDM_0;
2479 } else if (strnstr(kcontrol->id.name, "RX_1",
2480 sizeof(kcontrol->id.name)) ||
2481 strnstr(kcontrol->id.name, "TX_1",
2482 sizeof(kcontrol->id.name))) {
2483 port->channel = TDM_1;
2484 } else if (strnstr(kcontrol->id.name, "RX_2",
2485 sizeof(kcontrol->id.name)) ||
2486 strnstr(kcontrol->id.name, "TX_2",
2487 sizeof(kcontrol->id.name))) {
2488 port->channel = TDM_2;
2489 } else if (strnstr(kcontrol->id.name, "RX_3",
2490 sizeof(kcontrol->id.name)) ||
2491 strnstr(kcontrol->id.name, "TX_3",
2492 sizeof(kcontrol->id.name))) {
2493 port->channel = TDM_3;
2494 } else if (strnstr(kcontrol->id.name, "RX_4",
2495 sizeof(kcontrol->id.name)) ||
2496 strnstr(kcontrol->id.name, "TX_4",
2497 sizeof(kcontrol->id.name))) {
2498 port->channel = TDM_4;
2499 } else if (strnstr(kcontrol->id.name, "RX_5",
2500 sizeof(kcontrol->id.name)) ||
2501 strnstr(kcontrol->id.name, "TX_5",
2502 sizeof(kcontrol->id.name))) {
2503 port->channel = TDM_5;
2504 } else if (strnstr(kcontrol->id.name, "RX_6",
2505 sizeof(kcontrol->id.name)) ||
2506 strnstr(kcontrol->id.name, "TX_6",
2507 sizeof(kcontrol->id.name))) {
2508 port->channel = TDM_6;
2509 } else if (strnstr(kcontrol->id.name, "RX_7",
2510 sizeof(kcontrol->id.name)) ||
2511 strnstr(kcontrol->id.name, "TX_7",
2512 sizeof(kcontrol->id.name))) {
2513 port->channel = TDM_7;
2514 } else {
2515 pr_err("%s: unsupported channel in: %s\n",
2516 __func__, kcontrol->id.name);
2517 return -EINVAL;
2518 }
2519 } else {
2520 return -EINVAL;
2521 }
2522 return 0;
2523}
2524
2525static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2526 struct snd_ctl_elem_value *ucontrol)
2527{
2528 struct tdm_port port;
2529 int ret = tdm_get_port_idx(kcontrol, &port);
2530
2531 if (ret) {
2532 pr_err("%s: unsupported control: %s\n",
2533 __func__, kcontrol->id.name);
2534 } else {
2535 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2536 tdm_rx_cfg[port.mode][port.channel].sample_rate);
2537
2538 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2539 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2540 ucontrol->value.enumerated.item[0]);
2541 }
2542 return ret;
2543}
2544
2545static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2546 struct snd_ctl_elem_value *ucontrol)
2547{
2548 struct tdm_port port;
2549 int ret = tdm_get_port_idx(kcontrol, &port);
2550
2551 if (ret) {
2552 pr_err("%s: unsupported control: %s\n",
2553 __func__, kcontrol->id.name);
2554 } else {
2555 tdm_rx_cfg[port.mode][port.channel].sample_rate =
2556 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2557
2558 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2559 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2560 ucontrol->value.enumerated.item[0]);
2561 }
2562 return ret;
2563}
2564
2565static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2566 struct snd_ctl_elem_value *ucontrol)
2567{
2568 struct tdm_port port;
2569 int ret = tdm_get_port_idx(kcontrol, &port);
2570
2571 if (ret) {
2572 pr_err("%s: unsupported control: %s\n",
2573 __func__, kcontrol->id.name);
2574 } else {
2575 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2576 tdm_tx_cfg[port.mode][port.channel].sample_rate);
2577
2578 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2579 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2580 ucontrol->value.enumerated.item[0]);
2581 }
2582 return ret;
2583}
2584
2585static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2586 struct snd_ctl_elem_value *ucontrol)
2587{
2588 struct tdm_port port;
2589 int ret = tdm_get_port_idx(kcontrol, &port);
2590
2591 if (ret) {
2592 pr_err("%s: unsupported control: %s\n",
2593 __func__, kcontrol->id.name);
2594 } else {
2595 tdm_tx_cfg[port.mode][port.channel].sample_rate =
2596 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2597
2598 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2599 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2600 ucontrol->value.enumerated.item[0]);
2601 }
2602 return ret;
2603}
2604
2605static int tdm_get_format(int value)
2606{
2607 int format = 0;
2608
2609 switch (value) {
2610 case 0:
2611 format = SNDRV_PCM_FORMAT_S16_LE;
2612 break;
2613 case 1:
2614 format = SNDRV_PCM_FORMAT_S24_LE;
2615 break;
2616 case 2:
2617 format = SNDRV_PCM_FORMAT_S32_LE;
2618 break;
2619 default:
2620 format = SNDRV_PCM_FORMAT_S16_LE;
2621 break;
2622 }
2623 return format;
2624}
2625
2626static int tdm_get_format_val(int format)
2627{
2628 int value = 0;
2629
2630 switch (format) {
2631 case SNDRV_PCM_FORMAT_S16_LE:
2632 value = 0;
2633 break;
2634 case SNDRV_PCM_FORMAT_S24_LE:
2635 value = 1;
2636 break;
2637 case SNDRV_PCM_FORMAT_S32_LE:
2638 value = 2;
2639 break;
2640 default:
2641 value = 0;
2642 break;
2643 }
2644 return value;
2645}
2646
2647static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
2648 struct snd_ctl_elem_value *ucontrol)
2649{
2650 struct tdm_port port;
2651 int ret = tdm_get_port_idx(kcontrol, &port);
2652
2653 if (ret) {
2654 pr_err("%s: unsupported control: %s\n",
2655 __func__, kcontrol->id.name);
2656 } else {
2657 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2658 tdm_rx_cfg[port.mode][port.channel].bit_format);
2659
2660 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2661 tdm_rx_cfg[port.mode][port.channel].bit_format,
2662 ucontrol->value.enumerated.item[0]);
2663 }
2664 return ret;
2665}
2666
2667static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
2668 struct snd_ctl_elem_value *ucontrol)
2669{
2670 struct tdm_port port;
2671 int ret = tdm_get_port_idx(kcontrol, &port);
2672
2673 if (ret) {
2674 pr_err("%s: unsupported control: %s\n",
2675 __func__, kcontrol->id.name);
2676 } else {
2677 tdm_rx_cfg[port.mode][port.channel].bit_format =
2678 tdm_get_format(ucontrol->value.enumerated.item[0]);
2679
2680 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2681 tdm_rx_cfg[port.mode][port.channel].bit_format,
2682 ucontrol->value.enumerated.item[0]);
2683 }
2684 return ret;
2685}
2686
2687static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
2688 struct snd_ctl_elem_value *ucontrol)
2689{
2690 struct tdm_port port;
2691 int ret = tdm_get_port_idx(kcontrol, &port);
2692
2693 if (ret) {
2694 pr_err("%s: unsupported control: %s\n",
2695 __func__, kcontrol->id.name);
2696 } else {
2697 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2698 tdm_tx_cfg[port.mode][port.channel].bit_format);
2699
2700 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2701 tdm_tx_cfg[port.mode][port.channel].bit_format,
2702 ucontrol->value.enumerated.item[0]);
2703 }
2704 return ret;
2705}
2706
2707static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
2708 struct snd_ctl_elem_value *ucontrol)
2709{
2710 struct tdm_port port;
2711 int ret = tdm_get_port_idx(kcontrol, &port);
2712
2713 if (ret) {
2714 pr_err("%s: unsupported control: %s\n",
2715 __func__, kcontrol->id.name);
2716 } else {
2717 tdm_tx_cfg[port.mode][port.channel].bit_format =
2718 tdm_get_format(ucontrol->value.enumerated.item[0]);
2719
2720 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2721 tdm_tx_cfg[port.mode][port.channel].bit_format,
2722 ucontrol->value.enumerated.item[0]);
2723 }
2724 return ret;
2725}
2726
2727static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
2728 struct snd_ctl_elem_value *ucontrol)
2729{
2730 struct tdm_port port;
2731 int ret = tdm_get_port_idx(kcontrol, &port);
2732
2733 if (ret) {
2734 pr_err("%s: unsupported control: %s\n",
2735 __func__, kcontrol->id.name);
2736 } else {
2737
2738 ucontrol->value.enumerated.item[0] =
2739 tdm_rx_cfg[port.mode][port.channel].channels - 1;
2740
2741 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2742 tdm_rx_cfg[port.mode][port.channel].channels - 1,
2743 ucontrol->value.enumerated.item[0]);
2744 }
2745 return ret;
2746}
2747
2748static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
2749 struct snd_ctl_elem_value *ucontrol)
2750{
2751 struct tdm_port port;
2752 int ret = tdm_get_port_idx(kcontrol, &port);
2753
2754 if (ret) {
2755 pr_err("%s: unsupported control: %s\n",
2756 __func__, kcontrol->id.name);
2757 } else {
2758 tdm_rx_cfg[port.mode][port.channel].channels =
2759 ucontrol->value.enumerated.item[0] + 1;
2760
2761 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2762 tdm_rx_cfg[port.mode][port.channel].channels,
2763 ucontrol->value.enumerated.item[0] + 1);
2764 }
2765 return ret;
2766}
2767
2768static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
2769 struct snd_ctl_elem_value *ucontrol)
2770{
2771 struct tdm_port port;
2772 int ret = tdm_get_port_idx(kcontrol, &port);
2773
2774 if (ret) {
2775 pr_err("%s: unsupported control: %s\n",
2776 __func__, kcontrol->id.name);
2777 } else {
2778 ucontrol->value.enumerated.item[0] =
2779 tdm_tx_cfg[port.mode][port.channel].channels - 1;
2780
2781 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2782 tdm_tx_cfg[port.mode][port.channel].channels - 1,
2783 ucontrol->value.enumerated.item[0]);
2784 }
2785 return ret;
2786}
2787
2788static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2789 struct snd_ctl_elem_value *ucontrol)
2790{
2791 struct tdm_port port;
2792 int ret = tdm_get_port_idx(kcontrol, &port);
2793
2794 if (ret) {
2795 pr_err("%s: unsupported control: %s\n",
2796 __func__, kcontrol->id.name);
2797 } else {
2798 tdm_tx_cfg[port.mode][port.channel].channels =
2799 ucontrol->value.enumerated.item[0] + 1;
2800
2801 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2802 tdm_tx_cfg[port.mode][port.channel].channels,
2803 ucontrol->value.enumerated.item[0] + 1);
2804 }
2805 return ret;
2806}
2807
2808static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2809{
2810 int idx;
2811
2812 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2813 sizeof("PRIM_AUX_PCM"))) {
2814 idx = PRIM_AUX_PCM;
2815 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2816 sizeof("SEC_AUX_PCM"))) {
2817 idx = SEC_AUX_PCM;
2818 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2819 sizeof("TERT_AUX_PCM"))) {
2820 idx = TERT_AUX_PCM;
2821 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2822 sizeof("QUAT_AUX_PCM"))) {
2823 idx = QUAT_AUX_PCM;
2824 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2825 sizeof("QUIN_AUX_PCM"))) {
2826 idx = QUIN_AUX_PCM;
2827 } else {
2828 pr_err("%s: unsupported port: %s\n",
2829 __func__, kcontrol->id.name);
2830 idx = -EINVAL;
2831 }
2832
2833 return idx;
2834}
2835
2836static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2837 struct snd_ctl_elem_value *ucontrol)
2838{
2839 int idx = aux_pcm_get_port_idx(kcontrol);
2840
2841 if (idx < 0)
2842 return idx;
2843
2844 aux_pcm_rx_cfg[idx].sample_rate =
2845 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2846
2847 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2848 idx, aux_pcm_rx_cfg[idx].sample_rate,
2849 ucontrol->value.enumerated.item[0]);
2850
2851 return 0;
2852}
2853
2854static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2855 struct snd_ctl_elem_value *ucontrol)
2856{
2857 int idx = aux_pcm_get_port_idx(kcontrol);
2858
2859 if (idx < 0)
2860 return idx;
2861
2862 ucontrol->value.enumerated.item[0] =
2863 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2864
2865 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2866 idx, aux_pcm_rx_cfg[idx].sample_rate,
2867 ucontrol->value.enumerated.item[0]);
2868
2869 return 0;
2870}
2871
2872static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2873 struct snd_ctl_elem_value *ucontrol)
2874{
2875 int idx = aux_pcm_get_port_idx(kcontrol);
2876
2877 if (idx < 0)
2878 return idx;
2879
2880 aux_pcm_tx_cfg[idx].sample_rate =
2881 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2882
2883 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2884 idx, aux_pcm_tx_cfg[idx].sample_rate,
2885 ucontrol->value.enumerated.item[0]);
2886
2887 return 0;
2888}
2889
2890static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2891 struct snd_ctl_elem_value *ucontrol)
2892{
2893 int idx = aux_pcm_get_port_idx(kcontrol);
2894
2895 if (idx < 0)
2896 return idx;
2897
2898 ucontrol->value.enumerated.item[0] =
2899 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2900
2901 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2902 idx, aux_pcm_tx_cfg[idx].sample_rate,
2903 ucontrol->value.enumerated.item[0]);
2904
2905 return 0;
2906}
2907
2908static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2909{
2910 int idx;
2911
2912 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2913 sizeof("PRIM_MI2S_RX"))) {
2914 idx = PRIM_MI2S;
2915 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2916 sizeof("SEC_MI2S_RX"))) {
2917 idx = SEC_MI2S;
2918 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2919 sizeof("TERT_MI2S_RX"))) {
2920 idx = TERT_MI2S;
2921 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2922 sizeof("QUAT_MI2S_RX"))) {
2923 idx = QUAT_MI2S;
2924 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2925 sizeof("QUIN_MI2S_RX"))) {
2926 idx = QUIN_MI2S;
2927 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2928 sizeof("PRIM_MI2S_TX"))) {
2929 idx = PRIM_MI2S;
2930 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2931 sizeof("SEC_MI2S_TX"))) {
2932 idx = SEC_MI2S;
2933 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2934 sizeof("TERT_MI2S_TX"))) {
2935 idx = TERT_MI2S;
2936 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2937 sizeof("QUAT_MI2S_TX"))) {
2938 idx = QUAT_MI2S;
2939 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2940 sizeof("QUIN_MI2S_TX"))) {
2941 idx = QUIN_MI2S;
2942 } else {
2943 pr_err("%s: unsupported channel: %s\n",
2944 __func__, kcontrol->id.name);
2945 idx = -EINVAL;
2946 }
2947
2948 return idx;
2949}
2950
2951static int mi2s_get_sample_rate_val(int sample_rate)
2952{
2953 int sample_rate_val;
2954
2955 switch (sample_rate) {
2956 case SAMPLING_RATE_8KHZ:
2957 sample_rate_val = 0;
2958 break;
2959 case SAMPLING_RATE_11P025KHZ:
2960 sample_rate_val = 1;
2961 break;
2962 case SAMPLING_RATE_16KHZ:
2963 sample_rate_val = 2;
2964 break;
2965 case SAMPLING_RATE_22P05KHZ:
2966 sample_rate_val = 3;
2967 break;
2968 case SAMPLING_RATE_32KHZ:
2969 sample_rate_val = 4;
2970 break;
2971 case SAMPLING_RATE_44P1KHZ:
2972 sample_rate_val = 5;
2973 break;
2974 case SAMPLING_RATE_48KHZ:
2975 sample_rate_val = 6;
2976 break;
2977 case SAMPLING_RATE_96KHZ:
2978 sample_rate_val = 7;
2979 break;
2980 case SAMPLING_RATE_192KHZ:
2981 sample_rate_val = 8;
2982 break;
2983 default:
2984 sample_rate_val = 6;
2985 break;
2986 }
2987 return sample_rate_val;
2988}
2989
2990static int mi2s_get_sample_rate(int value)
2991{
2992 int sample_rate;
2993
2994 switch (value) {
2995 case 0:
2996 sample_rate = SAMPLING_RATE_8KHZ;
2997 break;
2998 case 1:
2999 sample_rate = SAMPLING_RATE_11P025KHZ;
3000 break;
3001 case 2:
3002 sample_rate = SAMPLING_RATE_16KHZ;
3003 break;
3004 case 3:
3005 sample_rate = SAMPLING_RATE_22P05KHZ;
3006 break;
3007 case 4:
3008 sample_rate = SAMPLING_RATE_32KHZ;
3009 break;
3010 case 5:
3011 sample_rate = SAMPLING_RATE_44P1KHZ;
3012 break;
3013 case 6:
3014 sample_rate = SAMPLING_RATE_48KHZ;
3015 break;
3016 case 7:
3017 sample_rate = SAMPLING_RATE_96KHZ;
3018 break;
3019 case 8:
3020 sample_rate = SAMPLING_RATE_192KHZ;
3021 break;
3022 default:
3023 sample_rate = SAMPLING_RATE_48KHZ;
3024 break;
3025 }
3026 return sample_rate;
3027}
3028
3029static int mi2s_auxpcm_get_format(int value)
3030{
3031 int format;
3032
3033 switch (value) {
3034 case 0:
3035 format = SNDRV_PCM_FORMAT_S16_LE;
3036 break;
3037 case 1:
3038 format = SNDRV_PCM_FORMAT_S24_LE;
3039 break;
3040 case 2:
3041 format = SNDRV_PCM_FORMAT_S24_3LE;
3042 break;
3043 case 3:
3044 format = SNDRV_PCM_FORMAT_S32_LE;
3045 break;
3046 default:
3047 format = SNDRV_PCM_FORMAT_S16_LE;
3048 break;
3049 }
3050 return format;
3051}
3052
3053static int mi2s_auxpcm_get_format_value(int format)
3054{
3055 int value;
3056
3057 switch (format) {
3058 case SNDRV_PCM_FORMAT_S16_LE:
3059 value = 0;
3060 break;
3061 case SNDRV_PCM_FORMAT_S24_LE:
3062 value = 1;
3063 break;
3064 case SNDRV_PCM_FORMAT_S24_3LE:
3065 value = 2;
3066 break;
3067 case SNDRV_PCM_FORMAT_S32_LE:
3068 value = 3;
3069 break;
3070 default:
3071 value = 0;
3072 break;
3073 }
3074 return value;
3075}
3076
3077static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3078 struct snd_ctl_elem_value *ucontrol)
3079{
3080 int idx = mi2s_get_port_idx(kcontrol);
3081
3082 if (idx < 0)
3083 return idx;
3084
3085 mi2s_rx_cfg[idx].sample_rate =
3086 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3087
3088 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3089 idx, mi2s_rx_cfg[idx].sample_rate,
3090 ucontrol->value.enumerated.item[0]);
3091
3092 return 0;
3093}
3094
3095static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3096 struct snd_ctl_elem_value *ucontrol)
3097{
3098 int idx = mi2s_get_port_idx(kcontrol);
3099
3100 if (idx < 0)
3101 return idx;
3102
3103 ucontrol->value.enumerated.item[0] =
3104 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
3105
3106 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3107 idx, mi2s_rx_cfg[idx].sample_rate,
3108 ucontrol->value.enumerated.item[0]);
3109
3110 return 0;
3111}
3112
3113static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3114 struct snd_ctl_elem_value *ucontrol)
3115{
3116 int idx = mi2s_get_port_idx(kcontrol);
3117
3118 if (idx < 0)
3119 return idx;
3120
3121 mi2s_tx_cfg[idx].sample_rate =
3122 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3123
3124 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3125 idx, mi2s_tx_cfg[idx].sample_rate,
3126 ucontrol->value.enumerated.item[0]);
3127
3128 return 0;
3129}
3130
3131static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3132 struct snd_ctl_elem_value *ucontrol)
3133{
3134 int idx = mi2s_get_port_idx(kcontrol);
3135
3136 if (idx < 0)
3137 return idx;
3138
3139 ucontrol->value.enumerated.item[0] =
3140 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
3141
3142 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3143 idx, mi2s_tx_cfg[idx].sample_rate,
3144 ucontrol->value.enumerated.item[0]);
3145
3146 return 0;
3147}
3148
3149static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
3150 struct snd_ctl_elem_value *ucontrol)
3151{
3152 int idx = mi2s_get_port_idx(kcontrol);
3153
3154 if (idx < 0)
3155 return idx;
3156
3157 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3158 idx, mi2s_rx_cfg[idx].channels);
3159 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
3160
3161 return 0;
3162}
3163
3164static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
3165 struct snd_ctl_elem_value *ucontrol)
3166{
3167 int idx = mi2s_get_port_idx(kcontrol);
3168
3169 if (idx < 0)
3170 return idx;
3171
3172 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3173 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3174 idx, mi2s_rx_cfg[idx].channels);
3175
3176 return 1;
3177}
3178
3179static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
3180 struct snd_ctl_elem_value *ucontrol)
3181{
3182 int idx = mi2s_get_port_idx(kcontrol);
3183
3184 if (idx < 0)
3185 return idx;
3186
3187 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3188 idx, mi2s_tx_cfg[idx].channels);
3189 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
3190
3191 return 0;
3192}
3193
3194static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
3195 struct snd_ctl_elem_value *ucontrol)
3196{
3197 int idx = mi2s_get_port_idx(kcontrol);
3198
3199 if (idx < 0)
3200 return idx;
3201
3202 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3203 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3204 idx, mi2s_tx_cfg[idx].channels);
3205
3206 return 1;
3207}
3208
3209static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
3210 struct snd_ctl_elem_value *ucontrol)
3211{
3212 int idx = mi2s_get_port_idx(kcontrol);
3213
3214 if (idx < 0)
3215 return idx;
3216
3217 ucontrol->value.enumerated.item[0] =
3218 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
3219
3220 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3221 idx, mi2s_rx_cfg[idx].bit_format,
3222 ucontrol->value.enumerated.item[0]);
3223
3224 return 0;
3225}
3226
3227static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
3228 struct snd_ctl_elem_value *ucontrol)
3229{
3230 int idx = mi2s_get_port_idx(kcontrol);
3231
3232 if (idx < 0)
3233 return idx;
3234
3235 mi2s_rx_cfg[idx].bit_format =
3236 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3237
3238 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3239 idx, mi2s_rx_cfg[idx].bit_format,
3240 ucontrol->value.enumerated.item[0]);
3241
3242 return 0;
3243}
3244
3245static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
3246 struct snd_ctl_elem_value *ucontrol)
3247{
3248 int idx = mi2s_get_port_idx(kcontrol);
3249
3250 if (idx < 0)
3251 return idx;
3252
3253 ucontrol->value.enumerated.item[0] =
3254 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
3255
3256 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3257 idx, mi2s_tx_cfg[idx].bit_format,
3258 ucontrol->value.enumerated.item[0]);
3259
3260 return 0;
3261}
3262
3263static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
3264 struct snd_ctl_elem_value *ucontrol)
3265{
3266 int idx = mi2s_get_port_idx(kcontrol);
3267
3268 if (idx < 0)
3269 return idx;
3270
3271 mi2s_tx_cfg[idx].bit_format =
3272 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3273
3274 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3275 idx, mi2s_tx_cfg[idx].bit_format,
3276 ucontrol->value.enumerated.item[0]);
3277
3278 return 0;
3279}
3280
3281static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
3282 struct snd_ctl_elem_value *ucontrol)
3283{
3284 int idx = aux_pcm_get_port_idx(kcontrol);
3285
3286 if (idx < 0)
3287 return idx;
3288
3289 ucontrol->value.enumerated.item[0] =
3290 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
3291
3292 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3293 idx, aux_pcm_rx_cfg[idx].bit_format,
3294 ucontrol->value.enumerated.item[0]);
3295
3296 return 0;
3297}
3298
3299static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
3300 struct snd_ctl_elem_value *ucontrol)
3301{
3302 int idx = aux_pcm_get_port_idx(kcontrol);
3303
3304 if (idx < 0)
3305 return idx;
3306
3307 aux_pcm_rx_cfg[idx].bit_format =
3308 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3309
3310 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3311 idx, aux_pcm_rx_cfg[idx].bit_format,
3312 ucontrol->value.enumerated.item[0]);
3313
3314 return 0;
3315}
3316
3317static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
3318 struct snd_ctl_elem_value *ucontrol)
3319{
3320 int idx = aux_pcm_get_port_idx(kcontrol);
3321
3322 if (idx < 0)
3323 return idx;
3324
3325 ucontrol->value.enumerated.item[0] =
3326 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
3327
3328 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3329 idx, aux_pcm_tx_cfg[idx].bit_format,
3330 ucontrol->value.enumerated.item[0]);
3331
3332 return 0;
3333}
3334
3335static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
3336 struct snd_ctl_elem_value *ucontrol)
3337{
3338 int idx = aux_pcm_get_port_idx(kcontrol);
3339
3340 if (idx < 0)
3341 return idx;
3342
3343 aux_pcm_tx_cfg[idx].bit_format =
3344 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3345
3346 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3347 idx, aux_pcm_tx_cfg[idx].bit_format,
3348 ucontrol->value.enumerated.item[0]);
3349
3350 return 0;
3351}
3352
3353static int msm_hifi_ctrl(struct snd_soc_codec *codec)
3354{
3355 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3356 struct snd_soc_card *card = codec->component.card;
3357 struct msm_asoc_mach_data *pdata =
3358 snd_soc_card_get_drvdata(card);
3359
3360 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
3361 msm_hifi_control);
3362
3363 if (!pdata || !pdata->hph_en1_gpio_p) {
3364 dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
3365 return -EINVAL;
3366 }
3367 if (msm_hifi_control == MSM_HIFI_ON) {
3368 msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
3369 /* 5msec delay needed as per HW requirement */
3370 usleep_range(5000, 5010);
3371 } else {
3372 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
3373 }
3374 snd_soc_dapm_sync(dapm);
3375
3376 return 0;
3377}
3378
3379static int msm_hifi_get(struct snd_kcontrol *kcontrol,
3380 struct snd_ctl_elem_value *ucontrol)
3381{
3382 pr_debug("%s: msm_hifi_control = %d\n",
3383 __func__, msm_hifi_control);
3384 ucontrol->value.integer.value[0] = msm_hifi_control;
3385
3386 return 0;
3387}
3388
3389static int msm_hifi_put(struct snd_kcontrol *kcontrol,
3390 struct snd_ctl_elem_value *ucontrol)
3391{
3392 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
3393
3394 dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
3395 __func__, ucontrol->value.integer.value[0]);
3396
3397 msm_hifi_control = ucontrol->value.integer.value[0];
3398 msm_hifi_ctrl(codec);
3399
3400 return 0;
3401}
3402
3403static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3404 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3405 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3406 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3407 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3408 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3409 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3410 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3411 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3412 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3413 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3414 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3415 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3416 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3417 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3418 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3419 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3420 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3421 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3422 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3423 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3424 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3425 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3426 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3427 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3428 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3429 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3430 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3431 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3432 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3433 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3434 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3435 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3436 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3437 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3438 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3439 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3440 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3441 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3442 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3443 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3444 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3445 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3446 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3447 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3448 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3449 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3450 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3451 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3452 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3453 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3454 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3455 wsa_cdc_dma_rx_0_sample_rate,
3456 cdc_dma_rx_sample_rate_get,
3457 cdc_dma_rx_sample_rate_put),
3458 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3459 wsa_cdc_dma_rx_1_sample_rate,
3460 cdc_dma_rx_sample_rate_get,
3461 cdc_dma_rx_sample_rate_put),
3462 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3463 rx_cdc_dma_rx_0_sample_rate,
3464 cdc_dma_rx_sample_rate_get,
3465 cdc_dma_rx_sample_rate_put),
3466 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3467 rx_cdc_dma_rx_1_sample_rate,
3468 cdc_dma_rx_sample_rate_get,
3469 cdc_dma_rx_sample_rate_put),
3470 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3471 rx_cdc_dma_rx_2_sample_rate,
3472 cdc_dma_rx_sample_rate_get,
3473 cdc_dma_rx_sample_rate_put),
3474 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3475 rx_cdc_dma_rx_3_sample_rate,
3476 cdc_dma_rx_sample_rate_get,
3477 cdc_dma_rx_sample_rate_put),
3478 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3479 rx_cdc_dma_rx_5_sample_rate,
3480 cdc_dma_rx_sample_rate_get,
3481 cdc_dma_rx_sample_rate_put),
3482 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3483 wsa_cdc_dma_tx_0_sample_rate,
3484 cdc_dma_tx_sample_rate_get,
3485 cdc_dma_tx_sample_rate_put),
3486 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3487 wsa_cdc_dma_tx_1_sample_rate,
3488 cdc_dma_tx_sample_rate_get,
3489 cdc_dma_tx_sample_rate_put),
3490 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3491 wsa_cdc_dma_tx_2_sample_rate,
3492 cdc_dma_tx_sample_rate_get,
3493 cdc_dma_tx_sample_rate_put),
3494 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3495 tx_cdc_dma_tx_0_sample_rate,
3496 cdc_dma_tx_sample_rate_get,
3497 cdc_dma_tx_sample_rate_put),
3498 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3499 tx_cdc_dma_tx_3_sample_rate,
3500 cdc_dma_tx_sample_rate_get,
3501 cdc_dma_tx_sample_rate_put),
3502 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3503 tx_cdc_dma_tx_4_sample_rate,
3504 cdc_dma_tx_sample_rate_get,
3505 cdc_dma_tx_sample_rate_put),
3506};
3507
3508static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
3509 SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
3510 slim_rx_ch_get, slim_rx_ch_put),
3511 SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
3512 slim_rx_ch_get, slim_rx_ch_put),
3513 SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
3514 slim_tx_ch_get, slim_tx_ch_put),
3515 SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
3516 slim_tx_ch_get, slim_tx_ch_put),
3517 SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
3518 slim_rx_ch_get, slim_rx_ch_put),
3519 SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
3520 slim_rx_ch_get, slim_rx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3521 SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
3522 slim_rx_bit_format_get, slim_rx_bit_format_put),
3523 SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
3524 slim_rx_bit_format_get, slim_rx_bit_format_put),
3525 SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
3526 slim_rx_bit_format_get, slim_rx_bit_format_put),
3527 SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
3528 slim_tx_bit_format_get, slim_tx_bit_format_put),
3529 SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
3530 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3531 SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
3532 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3533 SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
3534 slim_tx_sample_rate_get, slim_tx_sample_rate_put),
3535 SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
3536 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3537 SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
3538 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3539};
3540
3541static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3542 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3543 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3544 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3545 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3546 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3547 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3548 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3549 proxy_rx_ch_get, proxy_rx_ch_put),
3550 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3551 usb_audio_rx_format_get, usb_audio_rx_format_put),
3552 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3553 usb_audio_tx_format_get, usb_audio_tx_format_put),
3554 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3555 ext_disp_rx_format_get, ext_disp_rx_format_put),
3556 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3557 usb_audio_rx_sample_rate_get,
3558 usb_audio_rx_sample_rate_put),
3559 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3560 usb_audio_tx_sample_rate_get,
3561 usb_audio_tx_sample_rate_put),
3562 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3563 ext_disp_rx_sample_rate_get,
3564 ext_disp_rx_sample_rate_put),
3565 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3566 tdm_rx_sample_rate_get,
3567 tdm_rx_sample_rate_put),
3568 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3569 tdm_tx_sample_rate_get,
3570 tdm_tx_sample_rate_put),
3571 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3572 tdm_rx_format_get,
3573 tdm_rx_format_put),
3574 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3575 tdm_tx_format_get,
3576 tdm_tx_format_put),
3577 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3578 tdm_rx_ch_get,
3579 tdm_rx_ch_put),
3580 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3581 tdm_tx_ch_get,
3582 tdm_tx_ch_put),
3583 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3584 tdm_rx_sample_rate_get,
3585 tdm_rx_sample_rate_put),
3586 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3587 tdm_tx_sample_rate_get,
3588 tdm_tx_sample_rate_put),
3589 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3590 tdm_rx_format_get,
3591 tdm_rx_format_put),
3592 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3593 tdm_tx_format_get,
3594 tdm_tx_format_put),
3595 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3596 tdm_rx_ch_get,
3597 tdm_rx_ch_put),
3598 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3599 tdm_tx_ch_get,
3600 tdm_tx_ch_put),
3601 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3602 tdm_rx_sample_rate_get,
3603 tdm_rx_sample_rate_put),
3604 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3605 tdm_tx_sample_rate_get,
3606 tdm_tx_sample_rate_put),
3607 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3608 tdm_rx_format_get,
3609 tdm_rx_format_put),
3610 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3611 tdm_tx_format_get,
3612 tdm_tx_format_put),
3613 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3614 tdm_rx_ch_get,
3615 tdm_rx_ch_put),
3616 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3617 tdm_tx_ch_get,
3618 tdm_tx_ch_put),
3619 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3620 tdm_rx_sample_rate_get,
3621 tdm_rx_sample_rate_put),
3622 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3623 tdm_tx_sample_rate_get,
3624 tdm_tx_sample_rate_put),
3625 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3626 tdm_rx_format_get,
3627 tdm_rx_format_put),
3628 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3629 tdm_tx_format_get,
3630 tdm_tx_format_put),
3631 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3632 tdm_rx_ch_get,
3633 tdm_rx_ch_put),
3634 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3635 tdm_tx_ch_get,
3636 tdm_tx_ch_put),
3637 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3638 tdm_rx_sample_rate_get,
3639 tdm_rx_sample_rate_put),
3640 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3641 tdm_tx_sample_rate_get,
3642 tdm_tx_sample_rate_put),
3643 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3644 tdm_rx_format_get,
3645 tdm_rx_format_put),
3646 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3647 tdm_tx_format_get,
3648 tdm_tx_format_put),
3649 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3650 tdm_rx_ch_get,
3651 tdm_rx_ch_put),
3652 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3653 tdm_tx_ch_get,
3654 tdm_tx_ch_put),
3655 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3656 aux_pcm_rx_sample_rate_get,
3657 aux_pcm_rx_sample_rate_put),
3658 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3659 aux_pcm_rx_sample_rate_get,
3660 aux_pcm_rx_sample_rate_put),
3661 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3662 aux_pcm_rx_sample_rate_get,
3663 aux_pcm_rx_sample_rate_put),
3664 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3665 aux_pcm_rx_sample_rate_get,
3666 aux_pcm_rx_sample_rate_put),
3667 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3668 aux_pcm_rx_sample_rate_get,
3669 aux_pcm_rx_sample_rate_put),
3670 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3671 aux_pcm_tx_sample_rate_get,
3672 aux_pcm_tx_sample_rate_put),
3673 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3674 aux_pcm_tx_sample_rate_get,
3675 aux_pcm_tx_sample_rate_put),
3676 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3677 aux_pcm_tx_sample_rate_get,
3678 aux_pcm_tx_sample_rate_put),
3679 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3680 aux_pcm_tx_sample_rate_get,
3681 aux_pcm_tx_sample_rate_put),
3682 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3683 aux_pcm_tx_sample_rate_get,
3684 aux_pcm_tx_sample_rate_put),
3685 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3686 mi2s_rx_sample_rate_get,
3687 mi2s_rx_sample_rate_put),
3688 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3689 mi2s_rx_sample_rate_get,
3690 mi2s_rx_sample_rate_put),
3691 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3692 mi2s_rx_sample_rate_get,
3693 mi2s_rx_sample_rate_put),
3694 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3695 mi2s_rx_sample_rate_get,
3696 mi2s_rx_sample_rate_put),
3697 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3698 mi2s_rx_sample_rate_get,
3699 mi2s_rx_sample_rate_put),
3700 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3701 mi2s_tx_sample_rate_get,
3702 mi2s_tx_sample_rate_put),
3703 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3704 mi2s_tx_sample_rate_get,
3705 mi2s_tx_sample_rate_put),
3706 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3707 mi2s_tx_sample_rate_get,
3708 mi2s_tx_sample_rate_put),
3709 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3710 mi2s_tx_sample_rate_get,
3711 mi2s_tx_sample_rate_put),
3712 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3713 mi2s_tx_sample_rate_get,
3714 mi2s_tx_sample_rate_put),
3715 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3716 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3717 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3718 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3719 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3720 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3721 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3722 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3723 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3724 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3725 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3726 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3727 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3728 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3729 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3730 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3731 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3732 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3733 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3734 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3735 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3736 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3737 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3738 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3739 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3740 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3741 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3742 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3743 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3744 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3745 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3746 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3747 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3748 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3749 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3750 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3751 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3752 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3753 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3754 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3755 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3756 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3757 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3758 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3759 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3760 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3761 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3762 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3763 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3764 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3765 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3766 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3767 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3768 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3769 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3770 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3771 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3772 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3773 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3774 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3775 SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
3776 msm_hifi_put),
3777 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3778 msm_bt_sample_rate_get,
3779 msm_bt_sample_rate_put),
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame^]3780 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3781 msm_bt_sample_rate_rx_get,
3782 msm_bt_sample_rate_rx_put),
3783 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3784 msm_bt_sample_rate_tx_get,
3785 msm_bt_sample_rate_tx_put),
Vatsal Bucha89262e62018-08-31 11:57:09 +0530[diff] [blame]3786 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3787 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3788};
3789
3790static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
3791 int enable, bool dapm)
3792{
3793 int ret = 0;
3794
3795 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3796 ret = tavil_cdc_mclk_enable(codec, enable);
3797 } else {
3798 dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
3799 __func__);
3800 ret = -EINVAL;
3801 }
3802 return ret;
3803}
3804
3805static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
3806 int enable, bool dapm)
3807{
3808 int ret = 0;
3809
3810 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3811 ret = tavil_cdc_mclk_tx_enable(codec, enable);
3812 } else {
3813 dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
3814 __func__);
3815 ret = -EINVAL;
3816 }
3817
3818 return ret;
3819}
3820
3821static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
3822 struct snd_kcontrol *kcontrol, int event)
3823{
3824 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3825
3826 pr_debug("%s: event = %d\n", __func__, event);
3827
3828 switch (event) {
3829 case SND_SOC_DAPM_PRE_PMU:
3830 return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
3831 case SND_SOC_DAPM_POST_PMD:
3832 return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
3833 }
3834 return 0;
3835}
3836
3837static int msm_mclk_event(struct snd_soc_dapm_widget *w,
3838 struct snd_kcontrol *kcontrol, int event)
3839{
3840 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3841
3842 pr_debug("%s: event = %d\n", __func__, event);
3843
3844 switch (event) {
3845 case SND_SOC_DAPM_PRE_PMU:
3846 return msm_snd_enable_codec_ext_clk(codec, 1, true);
3847 case SND_SOC_DAPM_POST_PMD:
3848 return msm_snd_enable_codec_ext_clk(codec, 0, true);
3849 }
3850 return 0;
3851}
3852
3853static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
3854 struct snd_kcontrol *k, int event)
3855{
3856 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3857 struct snd_soc_card *card = codec->component.card;
3858 struct msm_asoc_mach_data *pdata =
3859 snd_soc_card_get_drvdata(card);
3860
3861 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
3862 __func__, msm_hifi_control);
3863
3864 if (!pdata || !pdata->hph_en0_gpio_p) {
3865 dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
3866 return -EINVAL;
3867 }
3868
3869 if (msm_hifi_control != MSM_HIFI_ON) {
3870 dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
3871 __func__);
3872 return 0;
3873 }
3874
3875 switch (event) {
3876 case SND_SOC_DAPM_POST_PMU:
3877 msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
3878 break;
3879 case SND_SOC_DAPM_PRE_PMD:
3880 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
3881 break;
3882 }
3883
3884 return 0;
3885}
3886
3887static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
3888
3889 SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
3890 msm_mclk_event,
3891 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3892
3893 SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
3894 msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3895
3896 SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
3897 SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
3898 SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
3899 SND_SOC_DAPM_MIC("Handset Mic", NULL),
3900 SND_SOC_DAPM_MIC("Headset Mic", NULL),
3901 SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
3902 SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
3903 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
3904
3905 SND_SOC_DAPM_MIC("Digital Mic0", NULL),
3906 SND_SOC_DAPM_MIC("Digital Mic1", NULL),
3907 SND_SOC_DAPM_MIC("Digital Mic2", NULL),
3908 SND_SOC_DAPM_MIC("Digital Mic3", NULL),
3909 SND_SOC_DAPM_MIC("Digital Mic4", NULL),
3910 SND_SOC_DAPM_MIC("Digital Mic5", NULL),
3911};
3912
3913static int msm_dmic_event(struct snd_soc_dapm_widget *w,
3914 struct snd_kcontrol *kcontrol, int event)
3915{
3916 struct msm_asoc_mach_data *pdata = NULL;
3917 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3918 int ret = 0;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]3919 u32 dmic_idx;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3920 int *dmic_gpio_cnt;
3921 struct device_node *dmic_gpio;
3922 char *wname;
3923
3924 wname = strpbrk(w->name, "0123");
3925 if (!wname) {
3926 dev_err(codec->dev, "%s: widget not found\n", __func__);
3927 return -EINVAL;
3928 }
3929
3930 ret = kstrtouint(wname, 10, &dmic_idx);
3931 if (ret < 0) {
3932 dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
3933 __func__);
3934 return -EINVAL;
3935 }
3936
3937 pdata = snd_soc_card_get_drvdata(codec->component.card);
3938
3939 switch (dmic_idx) {
3940 case 0:
3941 case 1:
3942 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
3943 dmic_gpio = pdata->dmic01_gpio_p;
3944 break;
3945 case 2:
3946 case 3:
3947 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
3948 dmic_gpio = pdata->dmic23_gpio_p;
3949 break;
3950 default:
3951 dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
3952 __func__);
3953 return -EINVAL;
3954 }
3955
3956 dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
3957 __func__, event, dmic_idx, *dmic_gpio_cnt);
3958
3959 switch (event) {
3960 case SND_SOC_DAPM_PRE_PMU:
3961 (*dmic_gpio_cnt)++;
3962 if (*dmic_gpio_cnt == 1) {
3963 ret = msm_cdc_pinctrl_select_active_state(
3964 dmic_gpio);
3965 if (ret < 0) {
3966 pr_err("%s: gpio set cannot be activated %sd",
3967 __func__, "dmic_gpio");
3968 return ret;
3969 }
3970 }
3971
3972 break;
3973 case SND_SOC_DAPM_POST_PMD:
3974 (*dmic_gpio_cnt)--;
3975 if (*dmic_gpio_cnt == 0) {
3976 ret = msm_cdc_pinctrl_select_sleep_state(
3977 dmic_gpio);
3978 if (ret < 0) {
3979 pr_err("%s: gpio set cannot be de-activated %sd",
3980 __func__, "dmic_gpio");
3981 return ret;
3982 }
3983 }
3984 break;
3985 default:
3986 pr_err("%s: invalid DAPM event %d\n", __func__, event);
3987 return -EINVAL;
3988 }
3989 return 0;
3990}
3991
3992static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
3993 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
3994 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
3995 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
3996 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
3997 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
3998 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
3999 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4000 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4001};
4002
4003static inline int param_is_mask(int p)
4004{
4005 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
4006 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
4007}
4008
4009static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
4010 int n)
4011{
4012 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
4013}
4014
4015static void param_set_mask(struct snd_pcm_hw_params *p, int n,
4016 unsigned int bit)
4017{
4018 if (bit >= SNDRV_MASK_MAX)
4019 return;
4020 if (param_is_mask(n)) {
4021 struct snd_mask *m = param_to_mask(p, n);
4022
4023 m->bits[0] = 0;
4024 m->bits[1] = 0;
4025 m->bits[bit >> 5] |= (1 << (bit & 31));
4026 }
4027}
4028
4029static int msm_slim_get_ch_from_beid(int32_t be_id)
4030{
4031 int ch_id = 0;
4032
4033 switch (be_id) {
4034 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4035 ch_id = SLIM_RX_0;
4036 break;
4037 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4038 ch_id = SLIM_RX_1;
4039 break;
4040 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4041 ch_id = SLIM_RX_2;
4042 break;
4043 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4044 ch_id = SLIM_RX_3;
4045 break;
4046 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4047 ch_id = SLIM_RX_4;
4048 break;
4049 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4050 ch_id = SLIM_RX_6;
4051 break;
4052 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4053 ch_id = SLIM_TX_0;
4054 break;
4055 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4056 ch_id = SLIM_TX_3;
4057 break;
4058 default:
4059 ch_id = SLIM_RX_0;
4060 break;
4061 }
4062
4063 return ch_id;
4064}
4065
4066static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
4067{
4068 int idx = 0;
4069
4070 switch (be_id) {
4071 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4072 idx = WSA_CDC_DMA_RX_0;
4073 break;
4074 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4075 idx = WSA_CDC_DMA_TX_0;
4076 break;
4077 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4078 idx = WSA_CDC_DMA_RX_1;
4079 break;
4080 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4081 idx = WSA_CDC_DMA_TX_1;
4082 break;
4083 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4084 idx = WSA_CDC_DMA_TX_2;
4085 break;
4086 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4087 idx = RX_CDC_DMA_RX_0;
4088 break;
4089 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4090 idx = RX_CDC_DMA_RX_1;
4091 break;
4092 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4093 idx = RX_CDC_DMA_RX_2;
4094 break;
4095 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4096 idx = RX_CDC_DMA_RX_3;
4097 break;
4098 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4099 idx = RX_CDC_DMA_RX_5;
4100 break;
4101 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4102 idx = TX_CDC_DMA_TX_0;
4103 break;
4104 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4105 idx = TX_CDC_DMA_TX_3;
4106 break;
4107 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
4108 idx = TX_CDC_DMA_TX_4;
4109 break;
4110 default:
4111 idx = RX_CDC_DMA_RX_0;
4112 break;
4113 }
4114
4115 return idx;
4116}
4117
4118static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4119{
4120 int idx = -EINVAL;
4121
4122 switch (be_id) {
4123 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4124 idx = DP_RX_IDX;
4125 break;
4126 default:
4127 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4128 idx = -EINVAL;
4129 break;
4130 }
4131
4132 return idx;
4133}
4134
4135static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4136 struct snd_pcm_hw_params *params)
4137{
4138 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4139 struct snd_interval *rate = hw_param_interval(params,
4140 SNDRV_PCM_HW_PARAM_RATE);
4141 struct snd_interval *channels = hw_param_interval(params,
4142 SNDRV_PCM_HW_PARAM_CHANNELS);
4143 int rc = 0;
4144 int idx;
4145 void *config = NULL;
4146 struct snd_soc_codec *codec = NULL;
4147
4148 pr_debug("%s: format = %d, rate = %d\n",
4149 __func__, params_format(params), params_rate(params));
4150
4151 switch (dai_link->id) {
4152 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4153 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4154 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4155 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4156 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4157 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4158 idx = msm_slim_get_ch_from_beid(dai_link->id);
4159 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4160 slim_rx_cfg[idx].bit_format);
4161 rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
4162 channels->min = channels->max = slim_rx_cfg[idx].channels;
4163 break;
4164
4165 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4166 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4167 idx = msm_slim_get_ch_from_beid(dai_link->id);
4168 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4169 slim_tx_cfg[idx].bit_format);
4170 rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
4171 channels->min = channels->max = slim_tx_cfg[idx].channels;
4172 break;
4173
4174 case MSM_BACKEND_DAI_SLIMBUS_1_TX:
4175 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4176 slim_tx_cfg[1].bit_format);
4177 rate->min = rate->max = slim_tx_cfg[1].sample_rate;
4178 channels->min = channels->max = slim_tx_cfg[1].channels;
4179 break;
4180
4181 case MSM_BACKEND_DAI_SLIMBUS_4_TX:
4182 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4183 SNDRV_PCM_FORMAT_S32_LE);
4184 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4185 channels->min = channels->max = msm_vi_feed_tx_ch;
4186 break;
4187
4188 case MSM_BACKEND_DAI_SLIMBUS_5_RX:
4189 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4190 slim_rx_cfg[5].bit_format);
4191 rate->min = rate->max = slim_rx_cfg[5].sample_rate;
4192 channels->min = channels->max = slim_rx_cfg[5].channels;
4193 break;
4194
4195 case MSM_BACKEND_DAI_SLIMBUS_5_TX:
4196 codec = rtd->codec;
4197 rate->min = rate->max = SAMPLING_RATE_16KHZ;
4198 channels->min = channels->max = 1;
4199
4200 config = msm_codec_fn.get_afe_config_fn(codec,
4201 AFE_SLIMBUS_SLAVE_PORT_CONFIG);
4202 if (config) {
4203 rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
4204 config, SLIMBUS_5_TX);
4205 if (rc)
4206 pr_err("%s: Failed to set slimbus slave port config %d\n",
4207 __func__, rc);
4208 }
4209 break;
4210
4211 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4212 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4213 slim_rx_cfg[SLIM_RX_7].bit_format);
4214 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4215 channels->min = channels->max =
4216 slim_rx_cfg[SLIM_RX_7].channels;
4217 break;
4218
4219 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4220 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4221 channels->min = channels->max =
4222 slim_tx_cfg[SLIM_TX_7].channels;
4223 break;
4224
4225 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4226 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4227 channels->min = channels->max =
4228 slim_tx_cfg[SLIM_TX_8].channels;
4229 break;
4230
4231 case MSM_BACKEND_DAI_USB_RX:
4232 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4233 usb_rx_cfg.bit_format);
4234 rate->min = rate->max = usb_rx_cfg.sample_rate;
4235 channels->min = channels->max = usb_rx_cfg.channels;
4236 break;
4237
4238 case MSM_BACKEND_DAI_USB_TX:
4239 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4240 usb_tx_cfg.bit_format);
4241 rate->min = rate->max = usb_tx_cfg.sample_rate;
4242 channels->min = channels->max = usb_tx_cfg.channels;
4243 break;
4244
4245 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4246 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4247 if (idx < 0) {
4248 pr_err("%s: Incorrect ext disp idx %d\n",
4249 __func__, idx);
4250 rc = idx;
4251 goto done;
4252 }
4253
4254 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4255 ext_disp_rx_cfg[idx].bit_format);
4256 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4257 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4258 break;
4259
4260 case MSM_BACKEND_DAI_AFE_PCM_RX:
4261 channels->min = channels->max = proxy_rx_cfg.channels;
4262 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4263 break;
4264
4265 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4266 channels->min = channels->max =
4267 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4268 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4269 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4270 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4271 break;
4272
4273 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4274 channels->min = channels->max =
4275 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4276 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4277 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4278 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4279 break;
4280
4281 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4282 channels->min = channels->max =
4283 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4284 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4285 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4286 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4287 break;
4288
4289 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4290 channels->min = channels->max =
4291 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4292 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4293 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4294 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4295 break;
4296
4297 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4298 channels->min = channels->max =
4299 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4300 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4301 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4302 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4303 break;
4304
4305 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4306 channels->min = channels->max =
4307 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4308 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4309 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4310 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4311 break;
4312
4313 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4314 channels->min = channels->max =
4315 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4316 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4317 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4318 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4319 break;
4320
4321 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4322 channels->min = channels->max =
4323 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4324 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4325 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4326 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4327 break;
4328
4329 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4330 channels->min = channels->max =
4331 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4332 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4333 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4334 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4335 break;
4336
4337 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4338 channels->min = channels->max =
4339 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4340 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4341 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4342 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4343 break;
4344
4345
4346 case MSM_BACKEND_DAI_AUXPCM_RX:
4347 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4348 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4349 rate->min = rate->max =
4350 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4351 channels->min = channels->max =
4352 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4353 break;
4354
4355 case MSM_BACKEND_DAI_AUXPCM_TX:
4356 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4357 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4358 rate->min = rate->max =
4359 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4360 channels->min = channels->max =
4361 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4362 break;
4363
4364 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4365 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4366 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4367 rate->min = rate->max =
4368 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4369 channels->min = channels->max =
4370 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4371 break;
4372
4373 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4374 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4375 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4376 rate->min = rate->max =
4377 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4378 channels->min = channels->max =
4379 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4380 break;
4381
4382 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4383 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4384 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4385 rate->min = rate->max =
4386 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4387 channels->min = channels->max =
4388 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4389 break;
4390
4391 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4392 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4393 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4394 rate->min = rate->max =
4395 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4396 channels->min = channels->max =
4397 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4398 break;
4399
4400 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4401 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4402 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4403 rate->min = rate->max =
4404 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4405 channels->min = channels->max =
4406 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4407 break;
4408
4409 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4410 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4411 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4412 rate->min = rate->max =
4413 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4414 channels->min = channels->max =
4415 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4416 break;
4417
4418 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4419 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4420 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4421 rate->min = rate->max =
4422 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4423 channels->min = channels->max =
4424 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4425 break;
4426
4427 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4428 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4429 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4430 rate->min = rate->max =
4431 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4432 channels->min = channels->max =
4433 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4434 break;
4435
4436 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4437 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4438 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4439 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4440 channels->min = channels->max =
4441 mi2s_rx_cfg[PRIM_MI2S].channels;
4442 break;
4443
4444 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4445 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4446 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4447 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4448 channels->min = channels->max =
4449 mi2s_tx_cfg[PRIM_MI2S].channels;
4450 break;
4451
4452 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4453 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4454 mi2s_rx_cfg[SEC_MI2S].bit_format);
4455 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4456 channels->min = channels->max =
4457 mi2s_rx_cfg[SEC_MI2S].channels;
4458 break;
4459
4460 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4461 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4462 mi2s_tx_cfg[SEC_MI2S].bit_format);
4463 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4464 channels->min = channels->max =
4465 mi2s_tx_cfg[SEC_MI2S].channels;
4466 break;
4467
4468 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4469 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4470 mi2s_rx_cfg[TERT_MI2S].bit_format);
4471 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4472 channels->min = channels->max =
4473 mi2s_rx_cfg[TERT_MI2S].channels;
4474 break;
4475
4476 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4477 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4478 mi2s_tx_cfg[TERT_MI2S].bit_format);
4479 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4480 channels->min = channels->max =
4481 mi2s_tx_cfg[TERT_MI2S].channels;
4482 break;
4483
4484 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4485 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4486 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4487 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4488 channels->min = channels->max =
4489 mi2s_rx_cfg[QUAT_MI2S].channels;
4490 break;
4491
4492 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4493 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4494 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4495 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4496 channels->min = channels->max =
4497 mi2s_tx_cfg[QUAT_MI2S].channels;
4498 break;
4499
4500 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4501 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4502 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4503 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4504 channels->min = channels->max =
4505 mi2s_rx_cfg[QUIN_MI2S].channels;
4506 break;
4507
4508 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4509 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4510 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4511 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4512 channels->min = channels->max =
4513 mi2s_tx_cfg[QUIN_MI2S].channels;
4514 break;
4515
4516 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4517 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4518 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4519 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4520 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4521 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4522 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4523 cdc_dma_rx_cfg[idx].bit_format);
4524 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4525 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4526 break;
4527
4528 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4529 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4530 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]4531 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4532 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4533 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4534 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4535 cdc_dma_tx_cfg[idx].bit_format);
4536 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4537 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4538 break;
4539
4540 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4541 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4542 SNDRV_PCM_FORMAT_S32_LE);
4543 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4544 channels->min = channels->max = msm_vi_feed_tx_ch;
4545 break;
4546
4547 default:
4548 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4549 break;
4550 }
4551
4552done:
4553 return rc;
4554}
4555
4556static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4557{
4558 int value = 0;
4559 bool ret = 0;
4560 struct snd_soc_card *card = codec->component.card;
4561 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4562 struct pinctrl_state *en2_pinctrl_active;
4563 struct pinctrl_state *en2_pinctrl_sleep;
4564
4565 if (!pdata->usbc_en2_gpio_p) {
4566 if (active) {
4567 /* if active and usbc_en2_gpio undefined, get pin */
4568 pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
4569 if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
4570 dev_err(card->dev,
4571 "%s: Can't get EN2 gpio pinctrl:%ld\n",
4572 __func__,
4573 PTR_ERR(pdata->usbc_en2_gpio_p));
4574 pdata->usbc_en2_gpio_p = NULL;
4575 return false;
4576 }
4577 } else {
4578 /* if not active and usbc_en2_gpio undefined, return */
4579 return false;
4580 }
4581 }
4582
4583 pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
4584 "qcom,usbc-analog-en2-gpio", 0);
4585 if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
4586 dev_err(card->dev, "%s, property %s not in node %s",
4587 __func__, "qcom,usbc-analog-en2-gpio",
4588 card->dev->of_node->full_name);
4589 return false;
4590 }
4591
4592 en2_pinctrl_active = pinctrl_lookup_state(
4593 pdata->usbc_en2_gpio_p, "aud_active");
4594 if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
4595 dev_err(card->dev,
4596 "%s: Cannot get aud_active pinctrl state:%ld\n",
4597 __func__, PTR_ERR(en2_pinctrl_active));
4598 ret = false;
4599 goto err_lookup_state;
4600 }
4601
4602 en2_pinctrl_sleep = pinctrl_lookup_state(
4603 pdata->usbc_en2_gpio_p, "aud_sleep");
4604 if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
4605 dev_err(card->dev,
4606 "%s: Cannot get aud_sleep pinctrl state:%ld\n",
4607 __func__, PTR_ERR(en2_pinctrl_sleep));
4608 ret = false;
4609 goto err_lookup_state;
4610 }
4611
4612 /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
4613 if (active) {
4614 dev_dbg(codec->dev, "%s: enter\n", __func__);
4615 if (pdata->usbc_en2_gpio_p) {
4616 value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
4617 if (value)
4618 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4619 en2_pinctrl_sleep);
4620 else
4621 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4622 en2_pinctrl_active);
4623 } else if (pdata->usbc_en2_gpio >= 0) {
4624 value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
4625 gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
4626 }
4627 pr_debug("%s: swap select switch %d to %d\n", __func__,
4628 value, !value);
4629 ret = true;
4630 } else {
4631 /* if not active, release usbc_en2_gpio_p pin */
4632 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4633 en2_pinctrl_sleep);
4634 }
4635
4636err_lookup_state:
4637 devm_pinctrl_put(pdata->usbc_en2_gpio_p);
4638 pdata->usbc_en2_gpio_p = NULL;
4639 return ret;
4640}
4641
4642static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4643{
4644 int value = 0;
4645 bool ret = false;
4646 struct snd_soc_card *card;
4647 struct msm_asoc_mach_data *pdata;
4648
4649 if (!codec) {
4650 pr_err("%s codec is NULL\n", __func__);
4651 return false;
4652 }
4653 card = codec->component.card;
4654 pdata = snd_soc_card_get_drvdata(card);
4655
4656 if (!pdata)
4657 return false;
4658
4659 if (wcd_mbhc_cfg.enable_usbc_analog)
4660 return msm_usbc_swap_gnd_mic(codec, active);
4661
4662 /* if usbc is not defined, swap using us_euro_gpio_p */
4663 if (pdata->us_euro_gpio_p) {
4664 value = msm_cdc_pinctrl_get_state(
4665 pdata->us_euro_gpio_p);
4666 if (value)
4667 msm_cdc_pinctrl_select_sleep_state(
4668 pdata->us_euro_gpio_p);
4669 else
4670 msm_cdc_pinctrl_select_active_state(
4671 pdata->us_euro_gpio_p);
4672 dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
4673 __func__, value, !value);
4674 ret = true;
4675 }
4676 return ret;
4677}
4678
4679static int msm_afe_set_config(struct snd_soc_codec *codec)
4680{
4681 int ret = 0;
4682 void *config_data = NULL;
4683
4684 if (!msm_codec_fn.get_afe_config_fn) {
4685 dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
4686 __func__);
4687 return -EINVAL;
4688 }
4689
4690 config_data = msm_codec_fn.get_afe_config_fn(codec,
4691 AFE_CDC_REGISTERS_CONFIG);
4692 if (config_data) {
4693 ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
4694 if (ret) {
4695 dev_err(codec->dev,
4696 "%s: Failed to set codec registers config %d\n",
4697 __func__, ret);
4698 return ret;
4699 }
4700 }
4701
4702 config_data = msm_codec_fn.get_afe_config_fn(codec,
4703 AFE_CDC_REGISTER_PAGE_CONFIG);
4704 if (config_data) {
4705 ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
4706 0);
4707 if (ret)
4708 dev_err(codec->dev,
4709 "%s: Failed to set cdc register page config\n",
4710 __func__);
4711 }
4712
4713 config_data = msm_codec_fn.get_afe_config_fn(codec,
4714 AFE_SLIMBUS_SLAVE_CONFIG);
4715 if (config_data) {
4716 ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
4717 if (ret) {
4718 dev_err(codec->dev,
4719 "%s: Failed to set slimbus slave config %d\n",
4720 __func__, ret);
4721 return ret;
4722 }
4723 }
4724
4725 return 0;
4726}
4727
4728static void msm_afe_clear_config(void)
4729{
4730 afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
4731 afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
4732}
4733
4734static int msm_adsp_power_up_config(struct snd_soc_codec *codec,
4735 struct snd_card *card)
4736{
4737 int ret = 0;
4738 unsigned long timeout;
4739 int adsp_ready = 0;
4740 bool snd_card_online = 0;
4741
4742 timeout = jiffies +
4743 msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
4744
4745 do {
4746 if (!snd_card_online) {
4747 snd_card_online = snd_card_is_online_state(card);
4748 pr_debug("%s: Sound card is %s\n", __func__,
4749 snd_card_online ? "Online" : "Offline");
4750 }
4751 if (!adsp_ready) {
4752 adsp_ready = q6core_is_adsp_ready();
4753 pr_debug("%s: ADSP Audio is %s\n", __func__,
4754 adsp_ready ? "ready" : "not ready");
4755 }
4756 if (snd_card_online && adsp_ready)
4757 break;
4758
4759 /*
4760 * Sound card/ADSP will be coming up after subsystem restart and
4761 * it might not be fully up when the control reaches
4762 * here. So, wait for 50msec before checking ADSP state
4763 */
4764 msleep(50);
4765 } while (time_after(timeout, jiffies));
4766
4767 if (!snd_card_online || !adsp_ready) {
4768 pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n",
4769 __func__,
4770 snd_card_online ? "Online" : "Offline",
4771 adsp_ready ? "ready" : "not ready");
4772 ret = -ETIMEDOUT;
4773 goto err;
4774 }
4775
4776 ret = msm_afe_set_config(codec);
4777 if (ret)
4778 pr_err("%s: Failed to set AFE config. err %d\n",
4779 __func__, ret);
4780
4781 return 0;
4782
4783err:
4784 return ret;
4785}
4786
4787static int sm6150_notifier_service_cb(struct notifier_block *this,
4788 unsigned long opcode, void *ptr)
4789{
4790 int ret;
4791 struct snd_soc_card *card = NULL;
4792 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
4793 struct snd_soc_pcm_runtime *rtd;
4794 struct snd_soc_codec *codec;
4795
4796 pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
4797
4798 switch (opcode) {
4799 case AUDIO_NOTIFIER_SERVICE_DOWN:
4800 /*
4801 * Use flag to ignore initial boot notifications
4802 * On initial boot msm_adsp_power_up_config is
4803 * called on init. There is no need to clear
4804 * and set the config again on initial boot.
4805 */
4806 if (is_initial_boot)
4807 break;
4808 msm_afe_clear_config();
4809 break;
4810 case AUDIO_NOTIFIER_SERVICE_UP:
4811 if (is_initial_boot) {
4812 is_initial_boot = false;
4813 break;
4814 }
4815 if (!spdev)
4816 return -EINVAL;
4817
4818 card = platform_get_drvdata(spdev);
4819 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
4820 if (!rtd) {
4821 dev_err(card->dev,
4822 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
4823 __func__, be_dl_name);
4824 ret = -EINVAL;
4825 goto err;
4826 }
4827 codec = rtd->codec;
4828
4829 ret = msm_adsp_power_up_config(codec, card->snd_card);
4830 if (ret < 0) {
4831 dev_err(card->dev,
4832 "%s: msm_adsp_power_up_config failed ret = %d!\n",
4833 __func__, ret);
4834 goto err;
4835 }
4836 break;
4837 default:
4838 break;
4839 }
4840err:
4841 return NOTIFY_OK;
4842}
4843
4844static struct notifier_block service_nb = {
4845 .notifier_call = sm6150_notifier_service_cb,
4846 .priority = -INT_MAX,
4847};
4848
4849static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
4850{
4851 int ret = 0;
4852 void *config_data;
4853 struct snd_soc_codec *codec = rtd->codec;
4854 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4855 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4856 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4857 struct snd_soc_component *aux_comp;
4858 struct snd_card *card;
4859 struct snd_info_entry *entry;
4860 struct msm_asoc_mach_data *pdata =
4861 snd_soc_card_get_drvdata(rtd->card);
4862
4863 /*
4864 * Codec SLIMBUS configuration
4865 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
4866 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4867 * TX14, TX15, TX16
4868 */
4869 unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
4870 150, 151};
4871 unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
4872 134, 135, 136, 137, 138, 139,
4873 140, 141, 142, 143};
4874
4875 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4876
4877 rtd->pmdown_time = 0;
4878
4879 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
4880 ARRAY_SIZE(msm_tavil_snd_controls));
4881 if (ret < 0) {
4882 pr_err("%s: add_codec_controls failed, err %d\n",
4883 __func__, ret);
4884 return ret;
4885 }
4886
4887 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4888 ARRAY_SIZE(msm_common_snd_controls));
4889 if (ret < 0) {
4890 pr_err("%s: add_codec_controls failed, err %d\n",
4891 __func__, ret);
4892 return ret;
4893 }
4894
4895 snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
4896 ARRAY_SIZE(msm_dapm_widgets_tavil));
4897
4898 snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
4899 ARRAY_SIZE(wcd_audio_paths_tavil));
4900
4901 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4902 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4903 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4904 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4905 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4906 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4907 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4908 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4909 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4910 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4911 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
4912 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4913 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4914 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
4915 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
4916 snd_soc_dapm_ignore_suspend(dapm, "EAR");
4917 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
4918 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
4919 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
4920 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
4921 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
4922 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
4923 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
4924 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
4925 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
4926 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
4927 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
4928
4929 snd_soc_dapm_sync(dapm);
4930
4931 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4932 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4933
4934 msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
4935
4936 ret = msm_adsp_power_up_config(codec, rtd->card->snd_card);
4937 if (ret) {
4938 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
4939 goto err;
4940 }
4941
4942 config_data = msm_codec_fn.get_afe_config_fn(codec,
4943 AFE_AANC_VERSION);
4944 if (config_data) {
4945 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
4946 if (ret) {
4947 pr_err("%s: Failed to set aanc version %d\n",
4948 __func__, ret);
4949 goto err;
4950 }
4951 }
4952
4953 /*
4954 * Send speaker configuration only for WSA8810.
4955 * Default configuration is for WSA8815.
4956 */
4957 pr_debug("%s: Number of aux devices: %d\n",
4958 __func__, rtd->card->num_aux_devs);
4959 if (rtd->card->num_aux_devs &&
4960 !list_empty(&rtd->card->aux_comp_list)) {
4961 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4962 struct snd_soc_component, card_aux_list);
4963 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4964 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4965 tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
4966 tavil_set_spkr_gain_offset(rtd->codec,
4967 WCD934X_RX_GAIN_OFFSET_M1P5_DB);
4968 }
4969 }
4970
4971 card = rtd->card->snd_card;
4972 entry = snd_info_create_subdir(card->module, "codecs",
4973 card->proc_root);
4974 if (!entry) {
4975 pr_debug("%s: Cannot create codecs module entry\n",
4976 __func__);
4977 ret = 0;
4978 goto err;
4979 }
4980 pdata->codec_root = entry;
4981 tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
4982
4983 codec_reg_done = true;
4984 return 0;
4985err:
4986 return ret;
4987}
4988
4989static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4990{
4991 int ret = 0;
4992 struct snd_soc_codec *codec = rtd->codec;
4993 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4994 struct snd_card *card;
4995 struct snd_info_entry *entry;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4996 struct snd_soc_component *aux_comp;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4997 struct msm_asoc_mach_data *pdata =
4998 snd_soc_card_get_drvdata(rtd->card);
4999
5000 ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
5001 ARRAY_SIZE(msm_int_snd_controls));
5002 if (ret < 0) {
5003 pr_err("%s: add_codec_controls failed: %d\n",
5004 __func__, ret);
5005 return ret;
5006 }
5007 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
5008 ARRAY_SIZE(msm_common_snd_controls));
5009 if (ret < 0) {
5010 pr_err("%s: add common snd controls failed: %d\n",
5011 __func__, ret);
5012 return ret;
5013 }
5014
5015 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
5016 ARRAY_SIZE(msm_int_dapm_widgets));
5017
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5018 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5019 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
5020 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
5021 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5022
5023 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
5024 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
5025 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
5026 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
5027
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5028 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
5029 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
5030 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
5031 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5032
5033 snd_soc_dapm_sync(dapm);
5034
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5035 /*
5036 * Send speaker configuration only for WSA8810.
5037 * Default configuration is for WSA8815.
5038 */
5039 dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
5040 __func__, rtd->card->num_aux_devs);
5041 if (rtd->card->num_aux_devs &&
5042 !list_empty(&rtd->card->component_dev_list)) {
5043 aux_comp = list_first_entry(
5044 &rtd->card->component_dev_list,
5045 struct snd_soc_component,
5046 card_aux_list);
5047 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
5048 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
5049 wsa_macro_set_spkr_mode(rtd->codec,
5050 WSA_MACRO_SPKR_MODE_1);
5051 wsa_macro_set_spkr_gain_offset(rtd->codec,
5052 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
5053 }
5054 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5055 card = rtd->card->snd_card;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]5056 if (!pdata->codec_root) {
5057 entry = snd_info_create_subdir(card->module, "codecs",
5058 card->proc_root);
5059 if (!entry) {
5060 pr_debug("%s: Cannot create codecs module entry\n",
5061 __func__);
5062 ret = 0;
5063 goto err;
5064 }
5065 pdata->codec_root = entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5066 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5067 bolero_info_create_codec_entry(pdata->codec_root, codec);
5068 codec_reg_done = true;
5069 return 0;
5070err:
5071 return ret;
5072}
5073
5074static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
5075{
5076 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5077 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
5078 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5079
5080 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5081 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5082}
5083
5084static void *def_wcd_mbhc_cal(void)
5085{
5086 void *wcd_mbhc_cal;
5087 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5088 u16 *btn_high;
5089
5090 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5091 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5092 if (!wcd_mbhc_cal)
5093 return NULL;
5094
5095#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
5096 S(v_hs_max, 1600);
5097#undef S
5098#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
5099 S(num_btn, WCD_MBHC_DEF_BUTTONS);
5100#undef S
5101
5102 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5103 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5104 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5105
5106 btn_high[0] = 75;
5107 btn_high[1] = 150;
5108 btn_high[2] = 237;
5109 btn_high[3] = 500;
5110 btn_high[4] = 500;
5111 btn_high[5] = 500;
5112 btn_high[6] = 500;
5113 btn_high[7] = 500;
5114
5115 return wcd_mbhc_cal;
5116}
5117
5118static int msm_snd_hw_params(struct snd_pcm_substream *substream,
5119 struct snd_pcm_hw_params *params)
5120{
5121 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5122 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5123 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5124 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5125
5126 int ret = 0;
5127 u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5128 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5129 u32 user_set_tx_ch = 0;
5130 u32 rx_ch_count;
5131
5132 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5133 ret = snd_soc_dai_get_channel_map(codec_dai,
5134 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5135 if (ret < 0) {
5136 pr_err("%s: failed to get codec chan map, err:%d\n",
5137 __func__, ret);
5138 goto err;
5139 }
5140 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
5141 pr_debug("%s: rx_5_ch=%d\n", __func__,
5142 slim_rx_cfg[5].channels);
5143 rx_ch_count = slim_rx_cfg[5].channels;
5144 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
5145 pr_debug("%s: rx_2_ch=%d\n", __func__,
5146 slim_rx_cfg[2].channels);
5147 rx_ch_count = slim_rx_cfg[2].channels;
5148 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
5149 pr_debug("%s: rx_6_ch=%d\n", __func__,
5150 slim_rx_cfg[6].channels);
5151 rx_ch_count = slim_rx_cfg[6].channels;
5152 } else {
5153 pr_debug("%s: rx_0_ch=%d\n", __func__,
5154 slim_rx_cfg[0].channels);
5155 rx_ch_count = slim_rx_cfg[0].channels;
5156 }
5157 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5158 rx_ch_count, rx_ch);
5159 if (ret < 0) {
5160 pr_err("%s: failed to set cpu chan map, err:%d\n",
5161 __func__, ret);
5162 goto err;
5163 }
5164 } else {
5165
5166 pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
5167 codec_dai->name, codec_dai->id, user_set_tx_ch);
5168 ret = snd_soc_dai_get_channel_map(codec_dai,
5169 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5170 if (ret < 0) {
5171 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5172 __func__, ret);
5173 goto err;
5174 }
5175 /* For <codec>_tx1 case */
5176 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
5177 user_set_tx_ch = slim_tx_cfg[0].channels;
5178 /* For <codec>_tx3 case */
5179 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
5180 user_set_tx_ch = slim_tx_cfg[1].channels;
5181 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
5182 user_set_tx_ch = msm_vi_feed_tx_ch;
5183 else
5184 user_set_tx_ch = tx_ch_cnt;
5185
5186 pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
5187 __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
5188 tx_ch_cnt, dai_link->id);
5189
5190 ret = snd_soc_dai_set_channel_map(cpu_dai,
5191 user_set_tx_ch, tx_ch, 0, 0);
5192 if (ret < 0)
5193 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5194 __func__, ret);
5195 }
5196
5197err:
5198 return ret;
5199}
5200
5201
5202static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
5203 struct snd_pcm_hw_params *params)
5204{
5205 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5206 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5207 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5208 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5209
5210 int ret = 0;
5211 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
5212 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5213 u32 user_set_tx_ch = 0;
5214 u32 user_set_rx_ch = 0;
5215 u32 ch_id;
5216
5217 ret = snd_soc_dai_get_channel_map(codec_dai,
5218 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
5219 &rx_ch_cdc_dma);
5220 if (ret < 0) {
5221 pr_err("%s: failed to get codec chan map, err:%d\n",
5222 __func__, ret);
5223 goto err;
5224 }
5225
5226 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5227 switch (dai_link->id) {
5228 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
5229 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
5230 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
5231 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
5232 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
5233 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
5234 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
5235 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
5236 {
5237 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5238 pr_debug("%s: id %d rx_ch=%d\n", __func__,
5239 ch_id, cdc_dma_rx_cfg[ch_id].channels);
5240 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
5241 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5242 user_set_rx_ch, &rx_ch_cdc_dma);
5243 if (ret < 0) {
5244 pr_err("%s: failed to set cpu chan map, err:%d\n",
5245 __func__, ret);
5246 goto err;
5247 }
5248
5249 }
5250 break;
5251 }
5252 } else {
5253 switch (dai_link->id) {
5254 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5255 {
5256 user_set_tx_ch = msm_vi_feed_tx_ch;
5257 }
5258 break;
5259 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5260 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5261 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5262 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
5263 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5264 {
5265 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5266 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5267 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5268 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5269 }
5270 break;
5271 }
5272
5273 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5274 &tx_ch_cdc_dma, 0, 0);
5275 if (ret < 0) {
5276 pr_err("%s: failed to set cpu chan map, err:%d\n",
5277 __func__, ret);
5278 goto err;
5279 }
5280 }
5281
5282err:
5283 return ret;
5284}
5285
5286static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
5287 struct snd_pcm_hw_params *params)
5288{
5289 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5290 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5291 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5292 unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5293 unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
5294 unsigned int num_tx_ch = 0;
5295 unsigned int num_rx_ch = 0;
5296 int ret = 0;
5297
5298 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5299 num_rx_ch = params_channels(params);
5300 pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
5301 codec_dai->name, codec_dai->id, num_rx_ch);
5302 ret = snd_soc_dai_get_channel_map(codec_dai,
5303 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5304 if (ret < 0) {
5305 pr_err("%s: failed to get codec chan map, err:%d\n",
5306 __func__, ret);
5307 goto err;
5308 }
5309 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5310 num_rx_ch, rx_ch);
5311 if (ret < 0) {
5312 pr_err("%s: failed to set cpu chan map, err:%d\n",
5313 __func__, ret);
5314 goto err;
5315 }
5316 } else {
5317 num_tx_ch = params_channels(params);
5318 pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
5319 codec_dai->name, codec_dai->id, num_tx_ch);
5320 ret = snd_soc_dai_get_channel_map(codec_dai,
5321 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5322 if (ret < 0) {
5323 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5324 __func__, ret);
5325 goto err;
5326 }
5327 ret = snd_soc_dai_set_channel_map(cpu_dai,
5328 num_tx_ch, tx_ch, 0, 0);
5329 if (ret < 0) {
5330 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5331 __func__, ret);
5332 goto err;
5333 }
5334 }
5335
5336err:
5337 return ret;
5338}
5339
5340static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5341 struct snd_pcm_hw_params *params)
5342{
5343 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5344 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5345 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5346 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5347 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5348 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5349 int ret;
5350
5351 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5352 codec_dai->name, codec_dai->id);
5353 ret = snd_soc_dai_get_channel_map(codec_dai,
5354 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5355 if (ret) {
5356 dev_err(rtd->dev,
5357 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5358 __func__, ret);
5359 goto err;
5360 }
5361
5362 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5363 __func__, tx_ch_cnt, dai_link->id);
5364
5365 ret = snd_soc_dai_set_channel_map(cpu_dai,
5366 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5367 if (ret)
5368 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5369 __func__, ret);
5370
5371err:
5372 return ret;
5373}
5374
5375static int msm_get_port_id(int be_id)
5376{
5377 int afe_port_id;
5378
5379 switch (be_id) {
5380 case MSM_BACKEND_DAI_PRI_MI2S_RX:
5381 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
5382 break;
5383 case MSM_BACKEND_DAI_PRI_MI2S_TX:
5384 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
5385 break;
5386 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
5387 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
5388 break;
5389 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
5390 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
5391 break;
5392 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
5393 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
5394 break;
5395 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
5396 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
5397 break;
5398 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
5399 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
5400 break;
5401 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
5402 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
5403 break;
5404 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
5405 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
5406 break;
5407 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
5408 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
5409 break;
5410 default:
5411 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
5412 afe_port_id = -EINVAL;
5413 }
5414
5415 return afe_port_id;
5416}
5417
5418static u32 get_mi2s_bits_per_sample(u32 bit_format)
5419{
5420 u32 bit_per_sample;
5421
5422 switch (bit_format) {
5423 case SNDRV_PCM_FORMAT_S32_LE:
5424 case SNDRV_PCM_FORMAT_S24_3LE:
5425 case SNDRV_PCM_FORMAT_S24_LE:
5426 bit_per_sample = 32;
5427 break;
5428 case SNDRV_PCM_FORMAT_S16_LE:
5429 default:
5430 bit_per_sample = 16;
5431 break;
5432 }
5433
5434 return bit_per_sample;
5435}
5436
5437static void update_mi2s_clk_val(int dai_id, int stream)
5438{
5439 u32 bit_per_sample;
5440
5441 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
5442 bit_per_sample =
5443 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
5444 mi2s_clk[dai_id].clk_freq_in_hz =
5445 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5446 } else {
5447 bit_per_sample =
5448 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
5449 mi2s_clk[dai_id].clk_freq_in_hz =
5450 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5451 }
5452}
5453
5454static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
5455{
5456 int ret = 0;
5457 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5458 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5459 int port_id = 0;
5460 int index = cpu_dai->id;
5461
5462 port_id = msm_get_port_id(rtd->dai_link->id);
5463 if (port_id < 0) {
5464 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5465 ret = port_id;
5466 goto err;
5467 }
5468
5469 if (enable) {
5470 update_mi2s_clk_val(index, substream->stream);
5471 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
5472 mi2s_clk[index].clk_freq_in_hz);
5473 }
5474
5475 mi2s_clk[index].enable = enable;
5476 ret = afe_set_lpass_clock_v2(port_id,
5477 &mi2s_clk[index]);
5478 if (ret < 0) {
5479 dev_err(rtd->card->dev,
5480 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
5481 __func__, port_id, ret);
5482 goto err;
5483 }
5484
5485err:
5486 return ret;
5487}
5488
5489static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
5490 enum pinctrl_pin_state new_state)
5491{
5492 int ret = 0;
5493 int curr_state = 0;
5494
5495 if (pinctrl_info == NULL) {
5496 pr_err("%s: pinctrl_info is NULL\n", __func__);
5497 ret = -EINVAL;
5498 goto err;
5499 }
5500
5501 if (pinctrl_info->pinctrl == NULL) {
5502 pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
5503 ret = -EINVAL;
5504 goto err;
5505 }
5506
5507 curr_state = pinctrl_info->curr_state;
5508 pinctrl_info->curr_state = new_state;
5509 pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
5510 pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
5511
5512 if (curr_state == pinctrl_info->curr_state) {
5513 pr_debug("%s: Already in same state\n", __func__);
5514 goto err;
5515 }
5516
5517 if (curr_state != STATE_DISABLE &&
5518 pinctrl_info->curr_state != STATE_DISABLE) {
5519 pr_debug("%s: state already active cannot switch\n", __func__);
5520 ret = -EIO;
5521 goto err;
5522 }
5523
5524 switch (pinctrl_info->curr_state) {
5525 case STATE_MI2S_ACTIVE:
5526 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5527 pinctrl_info->mi2s_active);
5528 if (ret) {
5529 pr_err("%s: MI2S state select failed with %d\n",
5530 __func__, ret);
5531 ret = -EIO;
5532 goto err;
5533 }
5534 break;
5535 case STATE_TDM_ACTIVE:
5536 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5537 pinctrl_info->tdm_active);
5538 if (ret) {
5539 pr_err("%s: TDM state select failed with %d\n",
5540 __func__, ret);
5541 ret = -EIO;
5542 goto err;
5543 }
5544 break;
5545 case STATE_DISABLE:
5546 if (curr_state == STATE_MI2S_ACTIVE) {
5547 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5548 pinctrl_info->mi2s_disable);
5549 } else {
5550 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5551 pinctrl_info->tdm_disable);
5552 }
5553 if (ret) {
5554 pr_err("%s: state disable failed with %d\n",
5555 __func__, ret);
5556 ret = -EIO;
5557 goto err;
5558 }
5559 break;
5560 default:
5561 pr_err("%s: TLMM pin state is invalid\n", __func__);
5562 return -EINVAL;
5563 }
5564
5565err:
5566 return ret;
5567}
5568
5569static int msm_get_pinctrl(struct platform_device *pdev)
5570{
5571 struct snd_soc_card *card = platform_get_drvdata(pdev);
5572 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5573 struct msm_pinctrl_info *pinctrl_info = NULL;
5574 struct pinctrl *pinctrl;
5575 int ret = 0;
5576
5577 pinctrl_info = &pdata->pinctrl_info;
5578
5579 if (pinctrl_info == NULL) {
5580 pr_err("%s: pinctrl_info is NULL\n", __func__);
5581 return -EINVAL;
5582 }
5583
5584 pinctrl = devm_pinctrl_get(&pdev->dev);
5585 if (IS_ERR_OR_NULL(pinctrl)) {
5586 pr_err("%s: Unable to get pinctrl handle\n", __func__);
5587 return -EINVAL;
5588 }
5589 pinctrl_info->pinctrl = pinctrl;
5590
5591 /* get all the states handles from Device Tree */
5592 pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
5593 "quat-mi2s-sleep");
5594 if (IS_ERR(pinctrl_info->mi2s_disable)) {
5595 pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
5596 goto err;
5597 }
5598 pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
5599 "quat-mi2s-active");
5600 if (IS_ERR(pinctrl_info->mi2s_active)) {
5601 pr_err("%s: could not get mi2s_active pinstate\n", __func__);
5602 goto err;
5603 }
5604 pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
5605 "quat-tdm-sleep");
5606 if (IS_ERR(pinctrl_info->tdm_disable)) {
5607 pr_err("%s: could not get tdm_disable pinstate\n", __func__);
5608 goto err;
5609 }
5610 pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
5611 "quat-tdm-active");
5612 if (IS_ERR(pinctrl_info->tdm_active)) {
5613 pr_err("%s: could not get tdm_active pinstate\n",
5614 __func__);
5615 goto err;
5616 }
5617 /* Reset the TLMM pins to a default state */
5618 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5619 pinctrl_info->mi2s_disable);
5620 if (ret != 0) {
5621 pr_err("%s: Disable TLMM pins failed with %d\n",
5622 __func__, ret);
5623 ret = -EIO;
5624 goto err;
5625 }
5626 pinctrl_info->curr_state = STATE_DISABLE;
5627
5628 return 0;
5629
5630err:
5631 devm_pinctrl_put(pinctrl);
5632 pinctrl_info->pinctrl = NULL;
5633 return -EINVAL;
5634}
5635
5636static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
5637 struct snd_pcm_hw_params *params)
5638{
5639 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5640 struct snd_interval *rate = hw_param_interval(params,
5641 SNDRV_PCM_HW_PARAM_RATE);
5642 struct snd_interval *channels = hw_param_interval(params,
5643 SNDRV_PCM_HW_PARAM_CHANNELS);
5644
5645 if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
5646 channels->min = channels->max =
5647 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5648 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5649 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
5650 rate->min = rate->max =
5651 tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
5652 } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
5653 channels->min = channels->max =
5654 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5655 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5656 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
5657 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
5658 } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
5659 channels->min = channels->max =
5660 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5661 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5662 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
5663 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
5664 } else {
5665 pr_err("%s: dai id 0x%x not supported\n",
5666 __func__, cpu_dai->id);
5667 return -EINVAL;
5668 }
5669
5670 pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
5671 __func__, cpu_dai->id, channels->max, rate->max,
5672 params_format(params));
5673
5674 return 0;
5675}
5676
5677static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
5678 struct snd_pcm_hw_params *params)
5679{
5680 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5681 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5682 int ret = 0;
5683 int slot_width = 32;
5684 int channels, slots;
5685 unsigned int slot_mask, rate, clk_freq;
5686 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
5687
5688 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
5689
5690 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5691 switch (cpu_dai->id) {
5692 case AFE_PORT_ID_PRIMARY_TDM_RX:
5693 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
5694 break;
5695 case AFE_PORT_ID_SECONDARY_TDM_RX:
5696 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5697 break;
5698 case AFE_PORT_ID_TERTIARY_TDM_RX:
5699 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
5700 break;
5701 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5702 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5703 break;
5704 case AFE_PORT_ID_QUINARY_TDM_RX:
5705 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5706 break;
5707 case AFE_PORT_ID_PRIMARY_TDM_TX:
5708 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
5709 break;
5710 case AFE_PORT_ID_SECONDARY_TDM_TX:
5711 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
5712 break;
5713 case AFE_PORT_ID_TERTIARY_TDM_TX:
5714 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
5715 break;
5716 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5717 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
5718 break;
5719 case AFE_PORT_ID_QUINARY_TDM_TX:
5720 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
5721 break;
5722
5723 default:
5724 pr_err("%s: dai id 0x%x not supported\n",
5725 __func__, cpu_dai->id);
5726 return -EINVAL;
5727 }
5728
5729 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5730 /*2 slot config - bits 0 and 1 set for the first two slots */
5731 slot_mask = 0x0000FFFF >> (16-slots);
5732 channels = slots;
5733
5734 pr_debug("%s: tdm rx slot_width %d slots %d\n",
5735 __func__, slot_width, slots);
5736
5737 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
5738 slots, slot_width);
5739 if (ret < 0) {
5740 pr_err("%s: failed to set tdm rx slot, err:%d\n",
5741 __func__, ret);
5742 goto end;
5743 }
5744
5745 ret = snd_soc_dai_set_channel_map(cpu_dai,
5746 0, NULL, channels, slot_offset);
5747 if (ret < 0) {
5748 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
5749 __func__, ret);
5750 goto end;
5751 }
5752 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5753 /*2 slot config - bits 0 and 1 set for the first two slots */
5754 slot_mask = 0x0000FFFF >> (16-slots);
5755 channels = slots;
5756
5757 pr_debug("%s: tdm tx slot_width %d slots %d\n",
5758 __func__, slot_width, slots);
5759
5760 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
5761 slots, slot_width);
5762 if (ret < 0) {
5763 pr_err("%s: failed to set tdm tx slot, err:%d\n",
5764 __func__, ret);
5765 goto end;
5766 }
5767
5768 ret = snd_soc_dai_set_channel_map(cpu_dai,
5769 channels, slot_offset, 0, NULL);
5770 if (ret < 0) {
5771 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
5772 __func__, ret);
5773 goto end;
5774 }
5775 } else {
5776 ret = -EINVAL;
5777 pr_err("%s: invalid use case, err:%d\n",
5778 __func__, ret);
5779 goto end;
5780 }
5781
5782 rate = params_rate(params);
5783 clk_freq = rate * slot_width * slots;
5784 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
5785 if (ret < 0)
5786 pr_err("%s: failed to set tdm clk, err:%d\n",
5787 __func__, ret);
5788
5789end:
5790 return ret;
5791}
5792
5793static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
5794{
5795 int ret = 0;
5796 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5797 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5798 struct snd_soc_card *card = rtd->card;
5799 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5800 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5801
5802 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5803 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5804 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5805 ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
5806 if (ret)
5807 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5808 __func__, ret);
5809 }
5810
5811 return ret;
5812}
5813
5814static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
5815{
5816 int ret = 0;
5817 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5818 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5819 struct snd_soc_card *card = rtd->card;
5820 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5821 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5822
5823 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5824 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5825 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5826 ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
5827 if (ret)
5828 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5829 __func__, ret);
5830 }
5831}
5832
5833static struct snd_soc_ops sm6150_tdm_be_ops = {
5834 .hw_params = sm6150_tdm_snd_hw_params,
5835 .startup = sm6150_tdm_snd_startup,
5836 .shutdown = sm6150_tdm_snd_shutdown
5837};
5838
5839static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5840{
5841 cpumask_t mask;
5842
5843 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5844 pm_qos_remove_request(&substream->latency_pm_qos_req);
5845
5846 cpumask_clear(&mask);
5847 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5848 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5849 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5850
5851 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5852
5853 pm_qos_add_request(&substream->latency_pm_qos_req,
5854 PM_QOS_CPU_DMA_LATENCY,
5855 MSM_LL_QOS_VALUE);
5856 return 0;
5857}
5858
5859static struct snd_soc_ops msm_fe_qos_ops = {
5860 .prepare = msm_fe_qos_prepare,
5861};
5862
5863static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5864{
5865 int ret = 0;
5866 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5867 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5868 int index = cpu_dai->id;
5869 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
5870 struct snd_soc_card *card = rtd->card;
5871 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5872 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5873 int ret_pinctrl = 0;
5874
5875 dev_dbg(rtd->card->dev,
5876 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5877 __func__, substream->name, substream->stream,
5878 cpu_dai->name, cpu_dai->id);
5879
5880 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5881 ret = -EINVAL;
5882 dev_err(rtd->card->dev,
5883 "%s: CPU DAI id (%d) out of range\n",
5884 __func__, cpu_dai->id);
5885 goto err;
5886 }
5887 /*
5888 * Mutex protection in case the same MI2S
5889 * interface using for both TX and RX so
5890 * that the same clock won't be enable twice.
5891 */
5892 mutex_lock(&mi2s_intf_conf[index].lock);
5893 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5894 /* Check if msm needs to provide the clock to the interface */
5895 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5896 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5897 fmt = SND_SOC_DAIFMT_CBM_CFM;
5898 }
5899 ret = msm_mi2s_set_sclk(substream, true);
5900 if (ret < 0) {
5901 dev_err(rtd->card->dev,
5902 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5903 __func__, ret);
5904 goto clean_up;
5905 }
5906
5907 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5908 if (ret < 0) {
5909 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5910 __func__, index, ret);
5911 goto clk_off;
5912 }
5913 if (index == QUAT_MI2S) {
5914 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5915 STATE_MI2S_ACTIVE);
5916 if (ret_pinctrl)
5917 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5918 __func__, ret_pinctrl);
5919 }
5920 }
5921clk_off:
5922 if (ret < 0)
5923 msm_mi2s_set_sclk(substream, false);
5924clean_up:
5925 if (ret < 0)
5926 mi2s_intf_conf[index].ref_cnt--;
5927 mutex_unlock(&mi2s_intf_conf[index].lock);
5928err:
5929 return ret;
5930}
5931
5932static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5933{
5934 int ret;
5935 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5936 int index = rtd->cpu_dai->id;
5937 struct snd_soc_card *card = rtd->card;
5938 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5939 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5940 int ret_pinctrl = 0;
5941
5942 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5943 substream->name, substream->stream);
5944 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5945 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5946 return;
5947 }
5948
5949 mutex_lock(&mi2s_intf_conf[index].lock);
5950 if (--mi2s_intf_conf[index].ref_cnt == 0) {
5951 ret = msm_mi2s_set_sclk(substream, false);
5952 if (ret < 0)
5953 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5954 __func__, index, ret);
5955 if (index == QUAT_MI2S) {
5956 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5957 STATE_DISABLE);
5958 if (ret_pinctrl)
5959 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5960 __func__, ret_pinctrl);
5961 }
5962 }
5963 mutex_unlock(&mi2s_intf_conf[index].lock);
5964}
5965
5966static struct snd_soc_ops msm_mi2s_be_ops = {
5967 .startup = msm_mi2s_snd_startup,
5968 .shutdown = msm_mi2s_snd_shutdown,
5969};
5970
5971static struct snd_soc_ops msm_cdc_dma_be_ops = {
5972 .hw_params = msm_snd_cdc_dma_hw_params,
5973};
5974
5975static struct snd_soc_ops msm_be_ops = {
5976 .hw_params = msm_snd_hw_params,
5977};
5978
5979static struct snd_soc_ops msm_slimbus_2_be_ops = {
5980 .hw_params = msm_slimbus_2_hw_params,
5981};
5982
5983static struct snd_soc_ops msm_wcn_ops = {
5984 .hw_params = msm_wcn_hw_params,
5985};
5986
5987
5988/* Digital audio interface glue - connects codec <---> CPU */
5989static struct snd_soc_dai_link msm_common_dai_links[] = {
5990 /* FrontEnd DAI Links */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5991 {/* hw:x,0 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5992 .name = MSM_DAILINK_NAME(Media1),
5993 .stream_name = "MultiMedia1",
5994 .cpu_dai_name = "MultiMedia1",
5995 .platform_name = "msm-pcm-dsp.0",
5996 .dynamic = 1,
5997 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5998 .dpcm_playback = 1,
5999 .dpcm_capture = 1,
6000 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6001 SND_SOC_DPCM_TRIGGER_POST},
6002 .codec_dai_name = "snd-soc-dummy-dai",
6003 .codec_name = "snd-soc-dummy",
6004 .ignore_suspend = 1,
6005 /* this dainlink has playback support */
6006 .ignore_pmdown_time = 1,
6007 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
6008 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6009 {/* hw:x,1 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6010 .name = MSM_DAILINK_NAME(Media2),
6011 .stream_name = "MultiMedia2",
6012 .cpu_dai_name = "MultiMedia2",
6013 .platform_name = "msm-pcm-dsp.0",
6014 .dynamic = 1,
6015 .dpcm_playback = 1,
6016 .dpcm_capture = 1,
6017 .codec_dai_name = "snd-soc-dummy-dai",
6018 .codec_name = "snd-soc-dummy",
6019 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6020 SND_SOC_DPCM_TRIGGER_POST},
6021 .ignore_suspend = 1,
6022 /* this dainlink has playback support */
6023 .ignore_pmdown_time = 1,
6024 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
6025 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6026 {/* hw:x,2 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6027 .name = "VoiceMMode1",
6028 .stream_name = "VoiceMMode1",
6029 .cpu_dai_name = "VoiceMMode1",
6030 .platform_name = "msm-pcm-voice",
6031 .dynamic = 1,
6032 .dpcm_playback = 1,
6033 .dpcm_capture = 1,
6034 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6035 SND_SOC_DPCM_TRIGGER_POST},
6036 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6037 .ignore_suspend = 1,
6038 .ignore_pmdown_time = 1,
6039 .codec_dai_name = "snd-soc-dummy-dai",
6040 .codec_name = "snd-soc-dummy",
6041 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
6042 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6043 {/* hw:x,3 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6044 .name = "MSM VoIP",
6045 .stream_name = "VoIP",
6046 .cpu_dai_name = "VoIP",
6047 .platform_name = "msm-voip-dsp",
6048 .dynamic = 1,
6049 .dpcm_playback = 1,
6050 .dpcm_capture = 1,
6051 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6052 SND_SOC_DPCM_TRIGGER_POST},
6053 .codec_dai_name = "snd-soc-dummy-dai",
6054 .codec_name = "snd-soc-dummy",
6055 .ignore_suspend = 1,
6056 /* this dainlink has playback support */
6057 .ignore_pmdown_time = 1,
6058 .id = MSM_FRONTEND_DAI_VOIP,
6059 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6060 {/* hw:x,4 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6061 .name = MSM_DAILINK_NAME(ULL),
6062 .stream_name = "MultiMedia3",
6063 .cpu_dai_name = "MultiMedia3",
6064 .platform_name = "msm-pcm-dsp.2",
6065 .dynamic = 1,
6066 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6067 .dpcm_playback = 1,
6068 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6069 SND_SOC_DPCM_TRIGGER_POST},
6070 .codec_dai_name = "snd-soc-dummy-dai",
6071 .codec_name = "snd-soc-dummy",
6072 .ignore_suspend = 1,
6073 /* this dainlink has playback support */
6074 .ignore_pmdown_time = 1,
6075 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
6076 },
6077 /* Hostless PCM purpose */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6078 {/* hw:x,5 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6079 .name = "SLIMBUS_0 Hostless",
6080 .stream_name = "SLIMBUS_0 Hostless",
6081 .cpu_dai_name = "SLIMBUS0_HOSTLESS",
6082 .platform_name = "msm-pcm-hostless",
6083 .dynamic = 1,
6084 .dpcm_playback = 1,
6085 .dpcm_capture = 1,
6086 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6087 SND_SOC_DPCM_TRIGGER_POST},
6088 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6089 .ignore_suspend = 1,
6090 /* this dailink has playback support */
6091 .ignore_pmdown_time = 1,
6092 .codec_dai_name = "snd-soc-dummy-dai",
6093 .codec_name = "snd-soc-dummy",
6094 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6095 {/* hw:x,6 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6096 .name = "MSM AFE-PCM RX",
6097 .stream_name = "AFE-PROXY RX",
6098 .cpu_dai_name = "msm-dai-q6-dev.241",
6099 .codec_name = "msm-stub-codec.1",
6100 .codec_dai_name = "msm-stub-rx",
6101 .platform_name = "msm-pcm-afe",
6102 .dpcm_playback = 1,
6103 .ignore_suspend = 1,
6104 /* this dainlink has playback support */
6105 .ignore_pmdown_time = 1,
6106 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6107 {/* hw:x,7 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6108 .name = "MSM AFE-PCM TX",
6109 .stream_name = "AFE-PROXY TX",
6110 .cpu_dai_name = "msm-dai-q6-dev.240",
6111 .codec_name = "msm-stub-codec.1",
6112 .codec_dai_name = "msm-stub-tx",
6113 .platform_name = "msm-pcm-afe",
6114 .dpcm_capture = 1,
6115 .ignore_suspend = 1,
6116 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6117 {/* hw:x,8 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6118 .name = MSM_DAILINK_NAME(Compress1),
6119 .stream_name = "Compress1",
6120 .cpu_dai_name = "MultiMedia4",
6121 .platform_name = "msm-compress-dsp",
6122 .dynamic = 1,
6123 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
6124 .dpcm_playback = 1,
6125 .dpcm_capture = 1,
6126 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6127 SND_SOC_DPCM_TRIGGER_POST},
6128 .codec_dai_name = "snd-soc-dummy-dai",
6129 .codec_name = "snd-soc-dummy",
6130 .ignore_suspend = 1,
6131 .ignore_pmdown_time = 1,
6132 /* this dainlink has playback support */
6133 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
6134 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6135 {/* hw:x,9 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6136 .name = "AUXPCM Hostless",
6137 .stream_name = "AUXPCM Hostless",
6138 .cpu_dai_name = "AUXPCM_HOSTLESS",
6139 .platform_name = "msm-pcm-hostless",
6140 .dynamic = 1,
6141 .dpcm_playback = 1,
6142 .dpcm_capture = 1,
6143 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6144 SND_SOC_DPCM_TRIGGER_POST},
6145 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6146 .ignore_suspend = 1,
6147 /* this dainlink has playback support */
6148 .ignore_pmdown_time = 1,
6149 .codec_dai_name = "snd-soc-dummy-dai",
6150 .codec_name = "snd-soc-dummy",
6151 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6152 {/* hw:x,10 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6153 .name = "SLIMBUS_1 Hostless",
6154 .stream_name = "SLIMBUS_1 Hostless",
6155 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
6156 .platform_name = "msm-pcm-hostless",
6157 .dynamic = 1,
6158 .dpcm_playback = 1,
6159 .dpcm_capture = 1,
6160 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6161 SND_SOC_DPCM_TRIGGER_POST},
6162 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6163 .ignore_suspend = 1,
6164 /* this dailink has playback support */
6165 .ignore_pmdown_time = 1,
6166 .codec_dai_name = "snd-soc-dummy-dai",
6167 .codec_name = "snd-soc-dummy",
6168 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6169 {/* hw:x,11 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6170 .name = "SLIMBUS_3 Hostless",
6171 .stream_name = "SLIMBUS_3 Hostless",
6172 .cpu_dai_name = "SLIMBUS3_HOSTLESS",
6173 .platform_name = "msm-pcm-hostless",
6174 .dynamic = 1,
6175 .dpcm_playback = 1,
6176 .dpcm_capture = 1,
6177 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6178 SND_SOC_DPCM_TRIGGER_POST},
6179 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6180 .ignore_suspend = 1,
6181 /* this dailink has playback support */
6182 .ignore_pmdown_time = 1,
6183 .codec_dai_name = "snd-soc-dummy-dai",
6184 .codec_name = "snd-soc-dummy",
6185 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6186 {/* hw:x,12 */
6187 .name = "SLIMBUS_7 Hostless",
6188 .stream_name = "SLIMBUS_7 Hostless",
6189 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6190 .platform_name = "msm-pcm-hostless",
6191 .dynamic = 1,
6192 .dpcm_playback = 1,
6193 .dpcm_capture = 1,
6194 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6195 SND_SOC_DPCM_TRIGGER_POST},
6196 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6197 .ignore_suspend = 1,
6198 /* this dailink has playback support */
6199 .ignore_pmdown_time = 1,
6200 .codec_dai_name = "snd-soc-dummy-dai",
6201 .codec_name = "snd-soc-dummy",
6202 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6203 {/* hw:x,13 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6204 .name = MSM_DAILINK_NAME(LowLatency),
6205 .stream_name = "MultiMedia5",
6206 .cpu_dai_name = "MultiMedia5",
6207 .platform_name = "msm-pcm-dsp.1",
6208 .dynamic = 1,
6209 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6210 .dpcm_playback = 1,
6211 .dpcm_capture = 1,
6212 .codec_dai_name = "snd-soc-dummy-dai",
6213 .codec_name = "snd-soc-dummy",
6214 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6215 SND_SOC_DPCM_TRIGGER_POST},
6216 .ignore_suspend = 1,
6217 /* this dainlink has playback support */
6218 .ignore_pmdown_time = 1,
6219 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
6220 .ops = &msm_fe_qos_ops,
6221 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6222 {/* hw:x,14 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6223 .name = "Listen 1 Audio Service",
6224 .stream_name = "Listen 1 Audio Service",
6225 .cpu_dai_name = "LSM1",
6226 .platform_name = "msm-lsm-client",
6227 .dynamic = 1,
6228 .dpcm_capture = 1,
6229 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6230 SND_SOC_DPCM_TRIGGER_POST },
6231 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6232 .ignore_suspend = 1,
6233 .codec_dai_name = "snd-soc-dummy-dai",
6234 .codec_name = "snd-soc-dummy",
6235 .id = MSM_FRONTEND_DAI_LSM1,
6236 },
6237 /* Multiple Tunnel instances */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6238 {/* hw:x,15 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6239 .name = MSM_DAILINK_NAME(Compress2),
6240 .stream_name = "Compress2",
6241 .cpu_dai_name = "MultiMedia7",
6242 .platform_name = "msm-compress-dsp",
6243 .dynamic = 1,
6244 .dpcm_playback = 1,
6245 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6246 SND_SOC_DPCM_TRIGGER_POST},
6247 .codec_dai_name = "snd-soc-dummy-dai",
6248 .codec_name = "snd-soc-dummy",
6249 .ignore_suspend = 1,
6250 .ignore_pmdown_time = 1,
6251 /* this dainlink has playback support */
6252 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6253 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6254 {/* hw:x,16 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6255 .name = MSM_DAILINK_NAME(MultiMedia10),
6256 .stream_name = "MultiMedia10",
6257 .cpu_dai_name = "MultiMedia10",
6258 .platform_name = "msm-pcm-dsp.1",
6259 .dynamic = 1,
6260 .dpcm_playback = 1,
6261 .dpcm_capture = 1,
6262 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6263 SND_SOC_DPCM_TRIGGER_POST},
6264 .codec_dai_name = "snd-soc-dummy-dai",
6265 .codec_name = "snd-soc-dummy",
6266 .ignore_suspend = 1,
6267 .ignore_pmdown_time = 1,
6268 /* this dainlink has playback support */
6269 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6270 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6271 {/* hw:x,17 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6272 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6273 .stream_name = "MM_NOIRQ",
6274 .cpu_dai_name = "MultiMedia8",
6275 .platform_name = "msm-pcm-dsp-noirq",
6276 .dynamic = 1,
6277 .dpcm_playback = 1,
6278 .dpcm_capture = 1,
6279 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6280 SND_SOC_DPCM_TRIGGER_POST},
6281 .codec_dai_name = "snd-soc-dummy-dai",
6282 .codec_name = "snd-soc-dummy",
6283 .ignore_suspend = 1,
6284 .ignore_pmdown_time = 1,
6285 /* this dainlink has playback support */
6286 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6287 .ops = &msm_fe_qos_ops,
6288 },
6289 /* HDMI Hostless */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6290 {/* hw:x,18 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6291 .name = "HDMI_RX_HOSTLESS",
6292 .stream_name = "HDMI_RX_HOSTLESS",
6293 .cpu_dai_name = "HDMI_HOSTLESS",
6294 .platform_name = "msm-pcm-hostless",
6295 .dynamic = 1,
6296 .dpcm_playback = 1,
6297 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6298 SND_SOC_DPCM_TRIGGER_POST},
6299 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6300 .ignore_suspend = 1,
6301 .ignore_pmdown_time = 1,
6302 .codec_dai_name = "snd-soc-dummy-dai",
6303 .codec_name = "snd-soc-dummy",
6304 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6305 {/* hw:x,19 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6306 .name = "VoiceMMode2",
6307 .stream_name = "VoiceMMode2",
6308 .cpu_dai_name = "VoiceMMode2",
6309 .platform_name = "msm-pcm-voice",
6310 .dynamic = 1,
6311 .dpcm_playback = 1,
6312 .dpcm_capture = 1,
6313 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6314 SND_SOC_DPCM_TRIGGER_POST},
6315 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6316 .ignore_suspend = 1,
6317 .ignore_pmdown_time = 1,
6318 .codec_dai_name = "snd-soc-dummy-dai",
6319 .codec_name = "snd-soc-dummy",
6320 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6321 },
6322 /* LSM FE */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6323 {/* hw:x,20 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6324 .name = "Listen 2 Audio Service",
6325 .stream_name = "Listen 2 Audio Service",
6326 .cpu_dai_name = "LSM2",
6327 .platform_name = "msm-lsm-client",
6328 .dynamic = 1,
6329 .dpcm_capture = 1,
6330 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6331 SND_SOC_DPCM_TRIGGER_POST },
6332 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6333 .ignore_suspend = 1,
6334 .codec_dai_name = "snd-soc-dummy-dai",
6335 .codec_name = "snd-soc-dummy",
6336 .id = MSM_FRONTEND_DAI_LSM2,
6337 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6338 {/* hw:x,21 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6339 .name = "Listen 3 Audio Service",
6340 .stream_name = "Listen 3 Audio Service",
6341 .cpu_dai_name = "LSM3",
6342 .platform_name = "msm-lsm-client",
6343 .dynamic = 1,
6344 .dpcm_capture = 1,
6345 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6346 SND_SOC_DPCM_TRIGGER_POST },
6347 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6348 .ignore_suspend = 1,
6349 .codec_dai_name = "snd-soc-dummy-dai",
6350 .codec_name = "snd-soc-dummy",
6351 .id = MSM_FRONTEND_DAI_LSM3,
6352 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6353 {/* hw:x,22 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6354 .name = "Listen 4 Audio Service",
6355 .stream_name = "Listen 4 Audio Service",
6356 .cpu_dai_name = "LSM4",
6357 .platform_name = "msm-lsm-client",
6358 .dynamic = 1,
6359 .dpcm_capture = 1,
6360 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6361 SND_SOC_DPCM_TRIGGER_POST },
6362 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6363 .ignore_suspend = 1,
6364 .codec_dai_name = "snd-soc-dummy-dai",
6365 .codec_name = "snd-soc-dummy",
6366 .id = MSM_FRONTEND_DAI_LSM4,
6367 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6368 {/* hw:x,23 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6369 .name = "Listen 5 Audio Service",
6370 .stream_name = "Listen 5 Audio Service",
6371 .cpu_dai_name = "LSM5",
6372 .platform_name = "msm-lsm-client",
6373 .dynamic = 1,
6374 .dpcm_capture = 1,
6375 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6376 SND_SOC_DPCM_TRIGGER_POST },
6377 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6378 .ignore_suspend = 1,
6379 .codec_dai_name = "snd-soc-dummy-dai",
6380 .codec_name = "snd-soc-dummy",
6381 .id = MSM_FRONTEND_DAI_LSM5,
6382 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6383 {/* hw:x,24 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6384 .name = "Listen 6 Audio Service",
6385 .stream_name = "Listen 6 Audio Service",
6386 .cpu_dai_name = "LSM6",
6387 .platform_name = "msm-lsm-client",
6388 .dynamic = 1,
6389 .dpcm_capture = 1,
6390 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6391 SND_SOC_DPCM_TRIGGER_POST },
6392 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6393 .ignore_suspend = 1,
6394 .codec_dai_name = "snd-soc-dummy-dai",
6395 .codec_name = "snd-soc-dummy",
6396 .id = MSM_FRONTEND_DAI_LSM6,
6397 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6398 {/* hw:x,25 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6399 .name = "Listen 7 Audio Service",
6400 .stream_name = "Listen 7 Audio Service",
6401 .cpu_dai_name = "LSM7",
6402 .platform_name = "msm-lsm-client",
6403 .dynamic = 1,
6404 .dpcm_capture = 1,
6405 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6406 SND_SOC_DPCM_TRIGGER_POST },
6407 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6408 .ignore_suspend = 1,
6409 .codec_dai_name = "snd-soc-dummy-dai",
6410 .codec_name = "snd-soc-dummy",
6411 .id = MSM_FRONTEND_DAI_LSM7,
6412 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6413 {/* hw:x,26 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6414 .name = "Listen 8 Audio Service",
6415 .stream_name = "Listen 8 Audio Service",
6416 .cpu_dai_name = "LSM8",
6417 .platform_name = "msm-lsm-client",
6418 .dynamic = 1,
6419 .dpcm_capture = 1,
6420 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6421 SND_SOC_DPCM_TRIGGER_POST },
6422 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6423 .ignore_suspend = 1,
6424 .codec_dai_name = "snd-soc-dummy-dai",
6425 .codec_name = "snd-soc-dummy",
6426 .id = MSM_FRONTEND_DAI_LSM8,
6427 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6428 {/* hw:x,27 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6429 .name = MSM_DAILINK_NAME(Media9),
6430 .stream_name = "MultiMedia9",
6431 .cpu_dai_name = "MultiMedia9",
6432 .platform_name = "msm-pcm-dsp.0",
6433 .dynamic = 1,
6434 .dpcm_playback = 1,
6435 .dpcm_capture = 1,
6436 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6437 SND_SOC_DPCM_TRIGGER_POST},
6438 .codec_dai_name = "snd-soc-dummy-dai",
6439 .codec_name = "snd-soc-dummy",
6440 .ignore_suspend = 1,
6441 /* this dainlink has playback support */
6442 .ignore_pmdown_time = 1,
6443 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6444 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6445 {/* hw:x,28 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6446 .name = MSM_DAILINK_NAME(Compress4),
6447 .stream_name = "Compress4",
6448 .cpu_dai_name = "MultiMedia11",
6449 .platform_name = "msm-compress-dsp",
6450 .dynamic = 1,
6451 .dpcm_playback = 1,
6452 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6453 SND_SOC_DPCM_TRIGGER_POST},
6454 .codec_dai_name = "snd-soc-dummy-dai",
6455 .codec_name = "snd-soc-dummy",
6456 .ignore_suspend = 1,
6457 .ignore_pmdown_time = 1,
6458 /* this dainlink has playback support */
6459 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6460 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6461 {/* hw:x,29 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6462 .name = MSM_DAILINK_NAME(Compress5),
6463 .stream_name = "Compress5",
6464 .cpu_dai_name = "MultiMedia12",
6465 .platform_name = "msm-compress-dsp",
6466 .dynamic = 1,
6467 .dpcm_playback = 1,
6468 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6469 SND_SOC_DPCM_TRIGGER_POST},
6470 .codec_dai_name = "snd-soc-dummy-dai",
6471 .codec_name = "snd-soc-dummy",
6472 .ignore_suspend = 1,
6473 .ignore_pmdown_time = 1,
6474 /* this dainlink has playback support */
6475 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6476 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6477 {/* hw:x,30 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6478 .name = MSM_DAILINK_NAME(Compress6),
6479 .stream_name = "Compress6",
6480 .cpu_dai_name = "MultiMedia13",
6481 .platform_name = "msm-compress-dsp",
6482 .dynamic = 1,
6483 .dpcm_playback = 1,
6484 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6485 SND_SOC_DPCM_TRIGGER_POST},
6486 .codec_dai_name = "snd-soc-dummy-dai",
6487 .codec_name = "snd-soc-dummy",
6488 .ignore_suspend = 1,
6489 .ignore_pmdown_time = 1,
6490 /* this dainlink has playback support */
6491 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6492 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6493 {/* hw:x,31 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6494 .name = MSM_DAILINK_NAME(Compress7),
6495 .stream_name = "Compress7",
6496 .cpu_dai_name = "MultiMedia14",
6497 .platform_name = "msm-compress-dsp",
6498 .dynamic = 1,
6499 .dpcm_playback = 1,
6500 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6501 SND_SOC_DPCM_TRIGGER_POST},
6502 .codec_dai_name = "snd-soc-dummy-dai",
6503 .codec_name = "snd-soc-dummy",
6504 .ignore_suspend = 1,
6505 .ignore_pmdown_time = 1,
6506 /* this dainlink has playback support */
6507 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6508 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6509 {/* hw:x,32 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6510 .name = MSM_DAILINK_NAME(Compress8),
6511 .stream_name = "Compress8",
6512 .cpu_dai_name = "MultiMedia15",
6513 .platform_name = "msm-compress-dsp",
6514 .dynamic = 1,
6515 .dpcm_playback = 1,
6516 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6517 SND_SOC_DPCM_TRIGGER_POST},
6518 .codec_dai_name = "snd-soc-dummy-dai",
6519 .codec_name = "snd-soc-dummy",
6520 .ignore_suspend = 1,
6521 .ignore_pmdown_time = 1,
6522 /* this dainlink has playback support */
6523 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6524 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6525 {/* hw:x,33 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6526 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6527 .stream_name = "MM_NOIRQ_2",
6528 .cpu_dai_name = "MultiMedia16",
6529 .platform_name = "msm-pcm-dsp-noirq",
6530 .dynamic = 1,
6531 .dpcm_playback = 1,
6532 .dpcm_capture = 1,
6533 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6534 SND_SOC_DPCM_TRIGGER_POST},
6535 .codec_dai_name = "snd-soc-dummy-dai",
6536 .codec_name = "snd-soc-dummy",
6537 .ignore_suspend = 1,
6538 .ignore_pmdown_time = 1,
6539 /* this dainlink has playback support */
6540 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
6541 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6542 {/* hw:x,34 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6543 .name = "SLIMBUS_8 Hostless",
6544 .stream_name = "SLIMBUS8_HOSTLESS Capture",
6545 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6546 .platform_name = "msm-pcm-hostless",
6547 .dynamic = 1,
6548 .dpcm_capture = 1,
6549 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6550 SND_SOC_DPCM_TRIGGER_POST},
6551 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6552 .ignore_suspend = 1,
6553 .codec_dai_name = "snd-soc-dummy-dai",
6554 .codec_name = "snd-soc-dummy",
6555 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6556 {/* hw:x,35 */
6557 .name = "CDC_DMA Hostless",
6558 .stream_name = "CDC_DMA Hostless",
6559 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6560 .platform_name = "msm-pcm-hostless",
6561 .dynamic = 1,
6562 .dpcm_playback = 1,
6563 .dpcm_capture = 1,
6564 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6565 SND_SOC_DPCM_TRIGGER_POST},
6566 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6567 .ignore_suspend = 1,
6568 /* this dailink has playback support */
6569 .ignore_pmdown_time = 1,
6570 .codec_dai_name = "snd-soc-dummy-dai",
6571 .codec_name = "snd-soc-dummy",
6572 },
6573 {/* hw:x,36 */
6574 .name = "TX3_CDC_DMA Hostless",
6575 .stream_name = "TX3_CDC_DMA Hostless",
6576 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6577 .platform_name = "msm-pcm-hostless",
6578 .dynamic = 1,
6579 .dpcm_capture = 1,
6580 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6581 SND_SOC_DPCM_TRIGGER_POST},
6582 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6583 .ignore_suspend = 1,
6584 .codec_dai_name = "snd-soc-dummy-dai",
6585 .codec_name = "snd-soc-dummy",
6586 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6587};
6588
6589
6590static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6591 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6592 .name = LPASS_BE_SLIMBUS_4_TX,
6593 .stream_name = "Slimbus4 Capture",
6594 .cpu_dai_name = "msm-dai-q6-dev.16393",
6595 .platform_name = "msm-pcm-hostless",
6596 .codec_name = "tavil_codec",
6597 .codec_dai_name = "tavil_vifeedback",
6598 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6599 .be_hw_params_fixup = msm_be_hw_params_fixup,
6600 .ops = &msm_be_ops,
6601 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6602 .ignore_suspend = 1,
6603 },
6604 /* Ultrasound RX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6605 {/* hw:x,38 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6606 .name = "SLIMBUS_2 Hostless Playback",
6607 .stream_name = "SLIMBUS_2 Hostless Playback",
6608 .cpu_dai_name = "msm-dai-q6-dev.16388",
6609 .platform_name = "msm-pcm-hostless",
6610 .codec_name = "tavil_codec",
6611 .codec_dai_name = "tavil_rx2",
6612 .ignore_suspend = 1,
6613 .ignore_pmdown_time = 1,
6614 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6615 .ops = &msm_slimbus_2_be_ops,
6616 },
6617 /* Ultrasound TX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6618 {/* hw:x,39 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6619 .name = "SLIMBUS_2 Hostless Capture",
6620 .stream_name = "SLIMBUS_2 Hostless Capture",
6621 .cpu_dai_name = "msm-dai-q6-dev.16389",
6622 .platform_name = "msm-pcm-hostless",
6623 .codec_name = "tavil_codec",
6624 .codec_dai_name = "tavil_tx2",
6625 .ignore_suspend = 1,
6626 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6627 .ops = &msm_slimbus_2_be_ops,
6628 },
6629};
6630
6631static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6632 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6633 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6634 .stream_name = "WSA CDC DMA0 Capture",
6635 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6636 .platform_name = "msm-pcm-hostless",
6637 .codec_name = "bolero_codec",
6638 .codec_dai_name = "wsa_macro_vifeedback",
6639 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6640 .be_hw_params_fixup = msm_be_hw_params_fixup,
6641 .ignore_suspend = 1,
6642 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6643 .ops = &msm_cdc_dma_be_ops,
6644 },
6645};
6646
6647static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
6648 {
6649 .name = MSM_DAILINK_NAME(ASM Loopback),
6650 .stream_name = "MultiMedia6",
6651 .cpu_dai_name = "MultiMedia6",
6652 .platform_name = "msm-pcm-loopback",
6653 .dynamic = 1,
6654 .dpcm_playback = 1,
6655 .dpcm_capture = 1,
6656 .codec_dai_name = "snd-soc-dummy-dai",
6657 .codec_name = "snd-soc-dummy",
6658 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6659 SND_SOC_DPCM_TRIGGER_POST},
6660 .ignore_suspend = 1,
6661 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6662 .ignore_pmdown_time = 1,
6663 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6664 },
6665 {
6666 .name = "USB Audio Hostless",
6667 .stream_name = "USB Audio Hostless",
6668 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6669 .platform_name = "msm-pcm-hostless",
6670 .dynamic = 1,
6671 .dpcm_playback = 1,
6672 .dpcm_capture = 1,
6673 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6674 SND_SOC_DPCM_TRIGGER_POST},
6675 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6676 .ignore_suspend = 1,
6677 .ignore_pmdown_time = 1,
6678 .codec_dai_name = "snd-soc-dummy-dai",
6679 .codec_name = "snd-soc-dummy",
6680 },
6681};
6682
6683static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6684 /* Backend AFE DAI Links */
6685 {
6686 .name = LPASS_BE_AFE_PCM_RX,
6687 .stream_name = "AFE Playback",
6688 .cpu_dai_name = "msm-dai-q6-dev.224",
6689 .platform_name = "msm-pcm-routing",
6690 .codec_name = "msm-stub-codec.1",
6691 .codec_dai_name = "msm-stub-rx",
6692 .no_pcm = 1,
6693 .dpcm_playback = 1,
6694 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6695 .be_hw_params_fixup = msm_be_hw_params_fixup,
6696 /* this dainlink has playback support */
6697 .ignore_pmdown_time = 1,
6698 .ignore_suspend = 1,
6699 },
6700 {
6701 .name = LPASS_BE_AFE_PCM_TX,
6702 .stream_name = "AFE Capture",
6703 .cpu_dai_name = "msm-dai-q6-dev.225",
6704 .platform_name = "msm-pcm-routing",
6705 .codec_name = "msm-stub-codec.1",
6706 .codec_dai_name = "msm-stub-tx",
6707 .no_pcm = 1,
6708 .dpcm_capture = 1,
6709 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6710 .be_hw_params_fixup = msm_be_hw_params_fixup,
6711 .ignore_suspend = 1,
6712 },
6713 /* Incall Record Uplink BACK END DAI Link */
6714 {
6715 .name = LPASS_BE_INCALL_RECORD_TX,
6716 .stream_name = "Voice Uplink Capture",
6717 .cpu_dai_name = "msm-dai-q6-dev.32772",
6718 .platform_name = "msm-pcm-routing",
6719 .codec_name = "msm-stub-codec.1",
6720 .codec_dai_name = "msm-stub-tx",
6721 .no_pcm = 1,
6722 .dpcm_capture = 1,
6723 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6724 .be_hw_params_fixup = msm_be_hw_params_fixup,
6725 .ignore_suspend = 1,
6726 },
6727 /* Incall Record Downlink BACK END DAI Link */
6728 {
6729 .name = LPASS_BE_INCALL_RECORD_RX,
6730 .stream_name = "Voice Downlink Capture",
6731 .cpu_dai_name = "msm-dai-q6-dev.32771",
6732 .platform_name = "msm-pcm-routing",
6733 .codec_name = "msm-stub-codec.1",
6734 .codec_dai_name = "msm-stub-tx",
6735 .no_pcm = 1,
6736 .dpcm_capture = 1,
6737 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6738 .be_hw_params_fixup = msm_be_hw_params_fixup,
6739 .ignore_suspend = 1,
6740 },
6741 /* Incall Music BACK END DAI Link */
6742 {
6743 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6744 .stream_name = "Voice Farend Playback",
6745 .cpu_dai_name = "msm-dai-q6-dev.32773",
6746 .platform_name = "msm-pcm-routing",
6747 .codec_name = "msm-stub-codec.1",
6748 .codec_dai_name = "msm-stub-rx",
6749 .no_pcm = 1,
6750 .dpcm_playback = 1,
6751 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6752 .be_hw_params_fixup = msm_be_hw_params_fixup,
6753 .ignore_suspend = 1,
6754 .ignore_pmdown_time = 1,
6755 },
6756 /* Incall Music 2 BACK END DAI Link */
6757 {
6758 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6759 .stream_name = "Voice2 Farend Playback",
6760 .cpu_dai_name = "msm-dai-q6-dev.32770",
6761 .platform_name = "msm-pcm-routing",
6762 .codec_name = "msm-stub-codec.1",
6763 .codec_dai_name = "msm-stub-rx",
6764 .no_pcm = 1,
6765 .dpcm_playback = 1,
6766 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6767 .be_hw_params_fixup = msm_be_hw_params_fixup,
6768 .ignore_suspend = 1,
6769 .ignore_pmdown_time = 1,
6770 },
6771 {
6772 .name = LPASS_BE_USB_AUDIO_RX,
6773 .stream_name = "USB Audio Playback",
6774 .cpu_dai_name = "msm-dai-q6-dev.28672",
6775 .platform_name = "msm-pcm-routing",
6776 .codec_name = "msm-stub-codec.1",
6777 .codec_dai_name = "msm-stub-rx",
6778 .no_pcm = 1,
6779 .dpcm_playback = 1,
6780 .id = MSM_BACKEND_DAI_USB_RX,
6781 .be_hw_params_fixup = msm_be_hw_params_fixup,
6782 .ignore_pmdown_time = 1,
6783 .ignore_suspend = 1,
6784 },
6785 {
6786 .name = LPASS_BE_USB_AUDIO_TX,
6787 .stream_name = "USB Audio Capture",
6788 .cpu_dai_name = "msm-dai-q6-dev.28673",
6789 .platform_name = "msm-pcm-routing",
6790 .codec_name = "msm-stub-codec.1",
6791 .codec_dai_name = "msm-stub-tx",
6792 .no_pcm = 1,
6793 .dpcm_capture = 1,
6794 .id = MSM_BACKEND_DAI_USB_TX,
6795 .be_hw_params_fixup = msm_be_hw_params_fixup,
6796 .ignore_suspend = 1,
6797 },
6798 {
6799 .name = LPASS_BE_PRI_TDM_RX_0,
6800 .stream_name = "Primary TDM0 Playback",
6801 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6802 .platform_name = "msm-pcm-routing",
6803 .codec_name = "msm-stub-codec.1",
6804 .codec_dai_name = "msm-stub-rx",
6805 .no_pcm = 1,
6806 .dpcm_playback = 1,
6807 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6808 .be_hw_params_fixup = msm_be_hw_params_fixup,
6809 .ops = &sm6150_tdm_be_ops,
6810 .ignore_suspend = 1,
6811 .ignore_pmdown_time = 1,
6812 },
6813 {
6814 .name = LPASS_BE_PRI_TDM_TX_0,
6815 .stream_name = "Primary TDM0 Capture",
6816 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6817 .platform_name = "msm-pcm-routing",
6818 .codec_name = "msm-stub-codec.1",
6819 .codec_dai_name = "msm-stub-tx",
6820 .no_pcm = 1,
6821 .dpcm_capture = 1,
6822 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6823 .be_hw_params_fixup = msm_be_hw_params_fixup,
6824 .ops = &sm6150_tdm_be_ops,
6825 .ignore_suspend = 1,
6826 },
6827 {
6828 .name = LPASS_BE_SEC_TDM_RX_0,
6829 .stream_name = "Secondary TDM0 Playback",
6830 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6831 .platform_name = "msm-pcm-routing",
6832 .codec_name = "msm-stub-codec.1",
6833 .codec_dai_name = "msm-stub-rx",
6834 .no_pcm = 1,
6835 .dpcm_playback = 1,
6836 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6837 .be_hw_params_fixup = msm_be_hw_params_fixup,
6838 .ops = &sm6150_tdm_be_ops,
6839 .ignore_suspend = 1,
6840 .ignore_pmdown_time = 1,
6841 },
6842 {
6843 .name = LPASS_BE_SEC_TDM_TX_0,
6844 .stream_name = "Secondary TDM0 Capture",
6845 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6846 .platform_name = "msm-pcm-routing",
6847 .codec_name = "msm-stub-codec.1",
6848 .codec_dai_name = "msm-stub-tx",
6849 .no_pcm = 1,
6850 .dpcm_capture = 1,
6851 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6852 .be_hw_params_fixup = msm_be_hw_params_fixup,
6853 .ops = &sm6150_tdm_be_ops,
6854 .ignore_suspend = 1,
6855 },
6856 {
6857 .name = LPASS_BE_TERT_TDM_RX_0,
6858 .stream_name = "Tertiary TDM0 Playback",
6859 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6860 .platform_name = "msm-pcm-routing",
6861 .codec_name = "msm-stub-codec.1",
6862 .codec_dai_name = "msm-stub-rx",
6863 .no_pcm = 1,
6864 .dpcm_playback = 1,
6865 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6866 .be_hw_params_fixup = msm_be_hw_params_fixup,
6867 .ops = &sm6150_tdm_be_ops,
6868 .ignore_suspend = 1,
6869 .ignore_pmdown_time = 1,
6870 },
6871 {
6872 .name = LPASS_BE_TERT_TDM_TX_0,
6873 .stream_name = "Tertiary TDM0 Capture",
6874 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6875 .platform_name = "msm-pcm-routing",
6876 .codec_name = "msm-stub-codec.1",
6877 .codec_dai_name = "msm-stub-tx",
6878 .no_pcm = 1,
6879 .dpcm_capture = 1,
6880 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6881 .be_hw_params_fixup = msm_be_hw_params_fixup,
6882 .ops = &sm6150_tdm_be_ops,
6883 .ignore_suspend = 1,
6884 },
6885 {
6886 .name = LPASS_BE_QUAT_TDM_RX_0,
6887 .stream_name = "Quaternary TDM0 Playback",
6888 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6889 .platform_name = "msm-pcm-routing",
6890 .codec_name = "msm-stub-codec.1",
6891 .codec_dai_name = "msm-stub-rx",
6892 .no_pcm = 1,
6893 .dpcm_playback = 1,
6894 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6895 .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
6896 .ops = &sm6150_tdm_be_ops,
6897 .ignore_suspend = 1,
6898 .ignore_pmdown_time = 1,
6899 },
6900 {
6901 .name = LPASS_BE_QUAT_TDM_TX_0,
6902 .stream_name = "Quaternary TDM0 Capture",
6903 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6904 .platform_name = "msm-pcm-routing",
6905 .codec_name = "msm-stub-codec.1",
6906 .codec_dai_name = "msm-stub-tx",
6907 .no_pcm = 1,
6908 .dpcm_capture = 1,
6909 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6910 .be_hw_params_fixup = msm_be_hw_params_fixup,
6911 .ops = &sm6150_tdm_be_ops,
6912 .ignore_suspend = 1,
6913 },
6914};
6915
6916static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
6917 {
6918 .name = LPASS_BE_SLIMBUS_0_RX,
6919 .stream_name = "Slimbus Playback",
6920 .cpu_dai_name = "msm-dai-q6-dev.16384",
6921 .platform_name = "msm-pcm-routing",
6922 .codec_name = "tavil_codec",
6923 .codec_dai_name = "tavil_rx1",
6924 .no_pcm = 1,
6925 .dpcm_playback = 1,
6926 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
6927 .init = &msm_audrx_tavil_init,
6928 .be_hw_params_fixup = msm_be_hw_params_fixup,
6929 /* this dainlink has playback support */
6930 .ignore_pmdown_time = 1,
6931 .ignore_suspend = 1,
6932 .ops = &msm_be_ops,
6933 },
6934 {
6935 .name = LPASS_BE_SLIMBUS_0_TX,
6936 .stream_name = "Slimbus Capture",
6937 .cpu_dai_name = "msm-dai-q6-dev.16385",
6938 .platform_name = "msm-pcm-routing",
6939 .codec_name = "tavil_codec",
6940 .codec_dai_name = "tavil_tx1",
6941 .no_pcm = 1,
6942 .dpcm_capture = 1,
6943 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
6944 .be_hw_params_fixup = msm_be_hw_params_fixup,
6945 .ignore_suspend = 1,
6946 .ops = &msm_be_ops,
6947 },
6948 {
6949 .name = LPASS_BE_SLIMBUS_1_RX,
6950 .stream_name = "Slimbus1 Playback",
6951 .cpu_dai_name = "msm-dai-q6-dev.16386",
6952 .platform_name = "msm-pcm-routing",
6953 .codec_name = "tavil_codec",
6954 .codec_dai_name = "tavil_rx1",
6955 .no_pcm = 1,
6956 .dpcm_playback = 1,
6957 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
6958 .be_hw_params_fixup = msm_be_hw_params_fixup,
6959 .ops = &msm_be_ops,
6960 /* dai link has playback support */
6961 .ignore_pmdown_time = 1,
6962 .ignore_suspend = 1,
6963 },
6964 {
6965 .name = LPASS_BE_SLIMBUS_1_TX,
6966 .stream_name = "Slimbus1 Capture",
6967 .cpu_dai_name = "msm-dai-q6-dev.16387",
6968 .platform_name = "msm-pcm-routing",
6969 .codec_name = "tavil_codec",
6970 .codec_dai_name = "tavil_tx3",
6971 .no_pcm = 1,
6972 .dpcm_capture = 1,
6973 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
6974 .be_hw_params_fixup = msm_be_hw_params_fixup,
6975 .ops = &msm_be_ops,
6976 .ignore_suspend = 1,
6977 },
6978 {
6979 .name = LPASS_BE_SLIMBUS_2_RX,
6980 .stream_name = "Slimbus2 Playback",
6981 .cpu_dai_name = "msm-dai-q6-dev.16388",
6982 .platform_name = "msm-pcm-routing",
6983 .codec_name = "tavil_codec",
6984 .codec_dai_name = "tavil_rx2",
6985 .no_pcm = 1,
6986 .dpcm_playback = 1,
6987 .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
6988 .be_hw_params_fixup = msm_be_hw_params_fixup,
6989 .ops = &msm_be_ops,
6990 .ignore_pmdown_time = 1,
6991 .ignore_suspend = 1,
6992 },
6993 {
6994 .name = LPASS_BE_SLIMBUS_3_RX,
6995 .stream_name = "Slimbus3 Playback",
6996 .cpu_dai_name = "msm-dai-q6-dev.16390",
6997 .platform_name = "msm-pcm-routing",
6998 .codec_name = "tavil_codec",
6999 .codec_dai_name = "tavil_rx1",
7000 .no_pcm = 1,
7001 .dpcm_playback = 1,
7002 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
7003 .be_hw_params_fixup = msm_be_hw_params_fixup,
7004 .ops = &msm_be_ops,
7005 /* dai link has playback support */
7006 .ignore_pmdown_time = 1,
7007 .ignore_suspend = 1,
7008 },
7009 {
7010 .name = LPASS_BE_SLIMBUS_3_TX,
7011 .stream_name = "Slimbus3 Capture",
7012 .cpu_dai_name = "msm-dai-q6-dev.16391",
7013 .platform_name = "msm-pcm-routing",
7014 .codec_name = "tavil_codec",
7015 .codec_dai_name = "tavil_tx1",
7016 .no_pcm = 1,
7017 .dpcm_capture = 1,
7018 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
7019 .be_hw_params_fixup = msm_be_hw_params_fixup,
7020 .ops = &msm_be_ops,
7021 .ignore_suspend = 1,
7022 },
7023 {
7024 .name = LPASS_BE_SLIMBUS_4_RX,
7025 .stream_name = "Slimbus4 Playback",
7026 .cpu_dai_name = "msm-dai-q6-dev.16392",
7027 .platform_name = "msm-pcm-routing",
7028 .codec_name = "tavil_codec",
7029 .codec_dai_name = "tavil_rx1",
7030 .no_pcm = 1,
7031 .dpcm_playback = 1,
7032 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
7033 .be_hw_params_fixup = msm_be_hw_params_fixup,
7034 .ops = &msm_be_ops,
7035 /* dai link has playback support */
7036 .ignore_pmdown_time = 1,
7037 .ignore_suspend = 1,
7038 },
7039 {
7040 .name = LPASS_BE_SLIMBUS_5_RX,
7041 .stream_name = "Slimbus5 Playback",
7042 .cpu_dai_name = "msm-dai-q6-dev.16394",
7043 .platform_name = "msm-pcm-routing",
7044 .codec_name = "tavil_codec",
7045 .codec_dai_name = "tavil_rx3",
7046 .no_pcm = 1,
7047 .dpcm_playback = 1,
7048 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
7049 .be_hw_params_fixup = msm_be_hw_params_fixup,
7050 .ops = &msm_be_ops,
7051 /* dai link has playback support */
7052 .ignore_pmdown_time = 1,
7053 .ignore_suspend = 1,
7054 },
7055 /* MAD BE */
7056 {
7057 .name = LPASS_BE_SLIMBUS_5_TX,
7058 .stream_name = "Slimbus5 Capture",
7059 .cpu_dai_name = "msm-dai-q6-dev.16395",
7060 .platform_name = "msm-pcm-routing",
7061 .codec_name = "tavil_codec",
7062 .codec_dai_name = "tavil_mad1",
7063 .no_pcm = 1,
7064 .dpcm_capture = 1,
7065 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
7066 .be_hw_params_fixup = msm_be_hw_params_fixup,
7067 .ops = &msm_be_ops,
7068 .ignore_suspend = 1,
7069 },
7070 {
7071 .name = LPASS_BE_SLIMBUS_6_RX,
7072 .stream_name = "Slimbus6 Playback",
7073 .cpu_dai_name = "msm-dai-q6-dev.16396",
7074 .platform_name = "msm-pcm-routing",
7075 .codec_name = "tavil_codec",
7076 .codec_dai_name = "tavil_rx4",
7077 .no_pcm = 1,
7078 .dpcm_playback = 1,
7079 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
7080 .be_hw_params_fixup = msm_be_hw_params_fixup,
7081 .ops = &msm_be_ops,
7082 /* dai link has playback support */
7083 .ignore_pmdown_time = 1,
7084 .ignore_suspend = 1,
7085 },
7086 /* Slimbus VI Recording */
7087 {
7088 .name = LPASS_BE_SLIMBUS_TX_VI,
7089 .stream_name = "Slimbus4 Capture",
7090 .cpu_dai_name = "msm-dai-q6-dev.16393",
7091 .platform_name = "msm-pcm-routing",
7092 .codec_name = "tavil_codec",
7093 .codec_dai_name = "tavil_vifeedback",
7094 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
7095 .be_hw_params_fixup = msm_be_hw_params_fixup,
7096 .ops = &msm_be_ops,
7097 .ignore_suspend = 1,
7098 .no_pcm = 1,
7099 .dpcm_capture = 1,
7100 },
7101};
7102
7103static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
7104 {
7105 .name = LPASS_BE_SLIMBUS_7_RX,
7106 .stream_name = "Slimbus7 Playback",
7107 .cpu_dai_name = "msm-dai-q6-dev.16398",
7108 .platform_name = "msm-pcm-routing",
7109 .codec_name = "btfmslim_slave",
7110 /* BT codec driver determines capabilities based on
7111 * dai name, bt codecdai name should always contains
7112 * supported usecase information
7113 */
7114 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
7115 .no_pcm = 1,
7116 .dpcm_playback = 1,
7117 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
7118 .be_hw_params_fixup = msm_be_hw_params_fixup,
7119 .ops = &msm_wcn_ops,
7120 /* dai link has playback support */
7121 .ignore_pmdown_time = 1,
7122 .ignore_suspend = 1,
7123 },
7124 {
7125 .name = LPASS_BE_SLIMBUS_7_TX,
7126 .stream_name = "Slimbus7 Capture",
7127 .cpu_dai_name = "msm-dai-q6-dev.16399",
7128 .platform_name = "msm-pcm-routing",
7129 .codec_name = "btfmslim_slave",
7130 .codec_dai_name = "btfm_bt_sco_slim_tx",
7131 .no_pcm = 1,
7132 .dpcm_capture = 1,
7133 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
7134 .be_hw_params_fixup = msm_be_hw_params_fixup,
7135 .ops = &msm_wcn_ops,
7136 .ignore_suspend = 1,
7137 },
7138 {
7139 .name = LPASS_BE_SLIMBUS_8_TX,
7140 .stream_name = "Slimbus8 Capture",
7141 .cpu_dai_name = "msm-dai-q6-dev.16401",
7142 .platform_name = "msm-pcm-routing",
7143 .codec_name = "btfmslim_slave",
7144 .codec_dai_name = "btfm_fm_slim_tx",
7145 .no_pcm = 1,
7146 .dpcm_capture = 1,
7147 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
7148 .be_hw_params_fixup = msm_be_hw_params_fixup,
7149 .init = &msm_wcn_init,
7150 .ops = &msm_wcn_ops,
7151 .ignore_suspend = 1,
7152 },
7153};
7154
7155static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
7156 /* DISP PORT BACK END DAI Link */
7157 {
7158 .name = LPASS_BE_DISPLAY_PORT,
7159 .stream_name = "Display Port Playback",
7160 .cpu_dai_name = "msm-dai-q6-dp.24608",
7161 .platform_name = "msm-pcm-routing",
7162 .codec_name = "msm-ext-disp-audio-codec-rx",
7163 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
7164 .no_pcm = 1,
7165 .dpcm_playback = 1,
7166 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
7167 .be_hw_params_fixup = msm_be_hw_params_fixup,
7168 .ignore_pmdown_time = 1,
7169 .ignore_suspend = 1,
7170 },
7171};
7172
7173static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
7174 {
7175 .name = LPASS_BE_PRI_MI2S_RX,
7176 .stream_name = "Primary MI2S Playback",
7177 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7178 .platform_name = "msm-pcm-routing",
7179 .codec_name = "msm-stub-codec.1",
7180 .codec_dai_name = "msm-stub-rx",
7181 .no_pcm = 1,
7182 .dpcm_playback = 1,
7183 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
7184 .be_hw_params_fixup = msm_be_hw_params_fixup,
7185 .ops = &msm_mi2s_be_ops,
7186 .ignore_suspend = 1,
7187 .ignore_pmdown_time = 1,
7188 },
7189 {
7190 .name = LPASS_BE_PRI_MI2S_TX,
7191 .stream_name = "Primary MI2S Capture",
7192 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7193 .platform_name = "msm-pcm-routing",
7194 .codec_name = "msm-stub-codec.1",
7195 .codec_dai_name = "msm-stub-tx",
7196 .no_pcm = 1,
7197 .dpcm_capture = 1,
7198 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
7199 .be_hw_params_fixup = msm_be_hw_params_fixup,
7200 .ops = &msm_mi2s_be_ops,
7201 .ignore_suspend = 1,
7202 },
7203 {
7204 .name = LPASS_BE_SEC_MI2S_RX,
7205 .stream_name = "Secondary MI2S Playback",
7206 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7207 .platform_name = "msm-pcm-routing",
7208 .codec_name = "msm-stub-codec.1",
7209 .codec_dai_name = "msm-stub-rx",
7210 .no_pcm = 1,
7211 .dpcm_playback = 1,
7212 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
7213 .be_hw_params_fixup = msm_be_hw_params_fixup,
7214 .ops = &msm_mi2s_be_ops,
7215 .ignore_suspend = 1,
7216 .ignore_pmdown_time = 1,
7217 },
7218 {
7219 .name = LPASS_BE_SEC_MI2S_TX,
7220 .stream_name = "Secondary MI2S Capture",
7221 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7222 .platform_name = "msm-pcm-routing",
7223 .codec_name = "msm-stub-codec.1",
7224 .codec_dai_name = "msm-stub-tx",
7225 .no_pcm = 1,
7226 .dpcm_capture = 1,
7227 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
7228 .be_hw_params_fixup = msm_be_hw_params_fixup,
7229 .ops = &msm_mi2s_be_ops,
7230 .ignore_suspend = 1,
7231 },
7232 {
7233 .name = LPASS_BE_TERT_MI2S_RX,
7234 .stream_name = "Tertiary MI2S Playback",
7235 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7236 .platform_name = "msm-pcm-routing",
7237 .codec_name = "msm-stub-codec.1",
7238 .codec_dai_name = "msm-stub-rx",
7239 .no_pcm = 1,
7240 .dpcm_playback = 1,
7241 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
7242 .be_hw_params_fixup = msm_be_hw_params_fixup,
7243 .ops = &msm_mi2s_be_ops,
7244 .ignore_suspend = 1,
7245 .ignore_pmdown_time = 1,
7246 },
7247 {
7248 .name = LPASS_BE_TERT_MI2S_TX,
7249 .stream_name = "Tertiary MI2S Capture",
7250 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7251 .platform_name = "msm-pcm-routing",
7252 .codec_name = "msm-stub-codec.1",
7253 .codec_dai_name = "msm-stub-tx",
7254 .no_pcm = 1,
7255 .dpcm_capture = 1,
7256 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
7257 .be_hw_params_fixup = msm_be_hw_params_fixup,
7258 .ops = &msm_mi2s_be_ops,
7259 .ignore_suspend = 1,
7260 },
7261 {
7262 .name = LPASS_BE_QUAT_MI2S_RX,
7263 .stream_name = "Quaternary MI2S Playback",
7264 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7265 .platform_name = "msm-pcm-routing",
7266 .codec_name = "msm-stub-codec.1",
7267 .codec_dai_name = "msm-stub-rx",
7268 .no_pcm = 1,
7269 .dpcm_playback = 1,
7270 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
7271 .be_hw_params_fixup = msm_be_hw_params_fixup,
7272 .ops = &msm_mi2s_be_ops,
7273 .ignore_suspend = 1,
7274 .ignore_pmdown_time = 1,
7275 },
7276 {
7277 .name = LPASS_BE_QUAT_MI2S_TX,
7278 .stream_name = "Quaternary MI2S Capture",
7279 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7280 .platform_name = "msm-pcm-routing",
7281 .codec_name = "msm-stub-codec.1",
7282 .codec_dai_name = "msm-stub-tx",
7283 .no_pcm = 1,
7284 .dpcm_capture = 1,
7285 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
7286 .be_hw_params_fixup = msm_be_hw_params_fixup,
7287 .ops = &msm_mi2s_be_ops,
7288 .ignore_suspend = 1,
7289 },
7290 {
7291 .name = LPASS_BE_QUIN_MI2S_RX,
7292 .stream_name = "Quinary MI2S Playback",
7293 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7294 .platform_name = "msm-pcm-routing",
7295 .codec_name = "msm-stub-codec.1",
7296 .codec_dai_name = "msm-stub-rx",
7297 .no_pcm = 1,
7298 .dpcm_playback = 1,
7299 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
7300 .be_hw_params_fixup = msm_be_hw_params_fixup,
7301 .ops = &msm_mi2s_be_ops,
7302 .ignore_suspend = 1,
7303 .ignore_pmdown_time = 1,
7304 },
7305 {
7306 .name = LPASS_BE_QUIN_MI2S_TX,
7307 .stream_name = "Quinary MI2S Capture",
7308 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7309 .platform_name = "msm-pcm-routing",
7310 .codec_name = "msm-stub-codec.1",
7311 .codec_dai_name = "msm-stub-tx",
7312 .no_pcm = 1,
7313 .dpcm_capture = 1,
7314 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7315 .be_hw_params_fixup = msm_be_hw_params_fixup,
7316 .ops = &msm_mi2s_be_ops,
7317 .ignore_suspend = 1,
7318 },
7319
7320};
7321
7322static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7323 /* Primary AUX PCM Backend DAI Links */
7324 {
7325 .name = LPASS_BE_AUXPCM_RX,
7326 .stream_name = "AUX PCM Playback",
7327 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7328 .platform_name = "msm-pcm-routing",
7329 .codec_name = "msm-stub-codec.1",
7330 .codec_dai_name = "msm-stub-rx",
7331 .no_pcm = 1,
7332 .dpcm_playback = 1,
7333 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7334 .be_hw_params_fixup = msm_be_hw_params_fixup,
7335 .ignore_pmdown_time = 1,
7336 .ignore_suspend = 1,
7337 },
7338 {
7339 .name = LPASS_BE_AUXPCM_TX,
7340 .stream_name = "AUX PCM Capture",
7341 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7342 .platform_name = "msm-pcm-routing",
7343 .codec_name = "msm-stub-codec.1",
7344 .codec_dai_name = "msm-stub-tx",
7345 .no_pcm = 1,
7346 .dpcm_capture = 1,
7347 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7348 .be_hw_params_fixup = msm_be_hw_params_fixup,
7349 .ignore_suspend = 1,
7350 },
7351 /* Secondary AUX PCM Backend DAI Links */
7352 {
7353 .name = LPASS_BE_SEC_AUXPCM_RX,
7354 .stream_name = "Sec AUX PCM Playback",
7355 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7356 .platform_name = "msm-pcm-routing",
7357 .codec_name = "msm-stub-codec.1",
7358 .codec_dai_name = "msm-stub-rx",
7359 .no_pcm = 1,
7360 .dpcm_playback = 1,
7361 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7362 .be_hw_params_fixup = msm_be_hw_params_fixup,
7363 .ignore_pmdown_time = 1,
7364 .ignore_suspend = 1,
7365 },
7366 {
7367 .name = LPASS_BE_SEC_AUXPCM_TX,
7368 .stream_name = "Sec AUX PCM Capture",
7369 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7370 .platform_name = "msm-pcm-routing",
7371 .codec_name = "msm-stub-codec.1",
7372 .codec_dai_name = "msm-stub-tx",
7373 .no_pcm = 1,
7374 .dpcm_capture = 1,
7375 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7376 .be_hw_params_fixup = msm_be_hw_params_fixup,
7377 .ignore_suspend = 1,
7378 },
7379 /* Tertiary AUX PCM Backend DAI Links */
7380 {
7381 .name = LPASS_BE_TERT_AUXPCM_RX,
7382 .stream_name = "Tert AUX PCM Playback",
7383 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7384 .platform_name = "msm-pcm-routing",
7385 .codec_name = "msm-stub-codec.1",
7386 .codec_dai_name = "msm-stub-rx",
7387 .no_pcm = 1,
7388 .dpcm_playback = 1,
7389 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7390 .be_hw_params_fixup = msm_be_hw_params_fixup,
7391 .ignore_suspend = 1,
7392 },
7393 {
7394 .name = LPASS_BE_TERT_AUXPCM_TX,
7395 .stream_name = "Tert AUX PCM Capture",
7396 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7397 .platform_name = "msm-pcm-routing",
7398 .codec_name = "msm-stub-codec.1",
7399 .codec_dai_name = "msm-stub-tx",
7400 .no_pcm = 1,
7401 .dpcm_capture = 1,
7402 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7403 .be_hw_params_fixup = msm_be_hw_params_fixup,
7404 .ignore_suspend = 1,
7405 },
7406 /* Quaternary AUX PCM Backend DAI Links */
7407 {
7408 .name = LPASS_BE_QUAT_AUXPCM_RX,
7409 .stream_name = "Quat AUX PCM Playback",
7410 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7411 .platform_name = "msm-pcm-routing",
7412 .codec_name = "msm-stub-codec.1",
7413 .codec_dai_name = "msm-stub-rx",
7414 .no_pcm = 1,
7415 .dpcm_playback = 1,
7416 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7417 .be_hw_params_fixup = msm_be_hw_params_fixup,
7418 .ignore_pmdown_time = 1,
7419 .ignore_suspend = 1,
7420 },
7421 {
7422 .name = LPASS_BE_QUAT_AUXPCM_TX,
7423 .stream_name = "Quat AUX PCM Capture",
7424 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7425 .platform_name = "msm-pcm-routing",
7426 .codec_name = "msm-stub-codec.1",
7427 .codec_dai_name = "msm-stub-tx",
7428 .no_pcm = 1,
7429 .dpcm_capture = 1,
7430 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7431 .be_hw_params_fixup = msm_be_hw_params_fixup,
7432 .ignore_suspend = 1,
7433 },
7434 /* Quinary AUX PCM Backend DAI Links */
7435 {
7436 .name = LPASS_BE_QUIN_AUXPCM_RX,
7437 .stream_name = "Quin AUX PCM Playback",
7438 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7439 .platform_name = "msm-pcm-routing",
7440 .codec_name = "msm-stub-codec.1",
7441 .codec_dai_name = "msm-stub-rx",
7442 .no_pcm = 1,
7443 .dpcm_playback = 1,
7444 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7445 .be_hw_params_fixup = msm_be_hw_params_fixup,
7446 .ignore_pmdown_time = 1,
7447 .ignore_suspend = 1,
7448 },
7449 {
7450 .name = LPASS_BE_QUIN_AUXPCM_TX,
7451 .stream_name = "Quin AUX PCM Capture",
7452 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7453 .platform_name = "msm-pcm-routing",
7454 .codec_name = "msm-stub-codec.1",
7455 .codec_dai_name = "msm-stub-tx",
7456 .no_pcm = 1,
7457 .dpcm_capture = 1,
7458 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7459 .be_hw_params_fixup = msm_be_hw_params_fixup,
7460 .ignore_suspend = 1,
7461 },
7462};
7463
7464static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7465 /* WSA CDC DMA Backend DAI Links */
7466 {
7467 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7468 .stream_name = "WSA CDC DMA0 Playback",
7469 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7470 .platform_name = "msm-pcm-routing",
7471 .codec_name = "bolero_codec",
7472 .codec_dai_name = "wsa_macro_rx1",
7473 .no_pcm = 1,
7474 .dpcm_playback = 1,
7475 .init = &msm_int_audrx_init,
7476 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7477 .be_hw_params_fixup = msm_be_hw_params_fixup,
7478 .ignore_pmdown_time = 1,
7479 .ignore_suspend = 1,
7480 .ops = &msm_cdc_dma_be_ops,
7481 },
7482 {
7483 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7484 .stream_name = "WSA CDC DMA1 Playback",
7485 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7486 .platform_name = "msm-pcm-routing",
7487 .codec_name = "bolero_codec",
7488 .codec_dai_name = "wsa_macro_rx_mix",
7489 .no_pcm = 1,
7490 .dpcm_playback = 1,
7491 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7492 .be_hw_params_fixup = msm_be_hw_params_fixup,
7493 .ignore_pmdown_time = 1,
7494 .ignore_suspend = 1,
7495 .ops = &msm_cdc_dma_be_ops,
7496 },
7497 {
7498 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7499 .stream_name = "WSA CDC DMA1 Capture",
7500 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7501 .platform_name = "msm-pcm-routing",
7502 .codec_name = "bolero_codec",
7503 .codec_dai_name = "wsa_macro_echo",
7504 .no_pcm = 1,
7505 .dpcm_capture = 1,
7506 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7507 .be_hw_params_fixup = msm_be_hw_params_fixup,
7508 .ignore_suspend = 1,
7509 .ops = &msm_cdc_dma_be_ops,
7510 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7511};
7512
7513static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7514 /* RX CDC DMA Backend DAI Links */
7515 {
7516 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7517 .stream_name = "RX CDC DMA0 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7518 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7519 .platform_name = "msm-pcm-routing",
7520 .codec_name = "bolero_codec",
7521 .codec_dai_name = "rx_macro_rx1",
7522 .no_pcm = 1,
7523 .dpcm_playback = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7524 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7525 .be_hw_params_fixup = msm_be_hw_params_fixup,
7526 .ignore_pmdown_time = 1,
7527 .ignore_suspend = 1,
7528 .ops = &msm_cdc_dma_be_ops,
7529 },
7530 {
7531 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7532 .stream_name = "RX CDC DMA1 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7533 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7534 .platform_name = "msm-pcm-routing",
7535 .codec_name = "bolero_codec",
7536 .codec_dai_name = "rx_macro_rx2",
7537 .no_pcm = 1,
7538 .dpcm_playback = 1,
7539 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7540 .be_hw_params_fixup = msm_be_hw_params_fixup,
7541 .ignore_pmdown_time = 1,
7542 .ignore_suspend = 1,
7543 .ops = &msm_cdc_dma_be_ops,
7544 },
7545 {
7546 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7547 .stream_name = "RX CDC DMA2 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7548 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7549 .platform_name = "msm-pcm-routing",
7550 .codec_name = "bolero_codec",
7551 .codec_dai_name = "rx_macro_rx3",
7552 .no_pcm = 1,
7553 .dpcm_playback = 1,
7554 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7555 .be_hw_params_fixup = msm_be_hw_params_fixup,
7556 .ignore_pmdown_time = 1,
7557 .ignore_suspend = 1,
7558 .ops = &msm_cdc_dma_be_ops,
7559 },
7560 {
7561 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7562 .stream_name = "RX CDC DMA3 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7563 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7564 .platform_name = "msm-pcm-routing",
7565 .codec_name = "bolero_codec",
7566 .codec_dai_name = "rx_macro_rx4",
7567 .no_pcm = 1,
7568 .dpcm_playback = 1,
7569 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7570 .be_hw_params_fixup = msm_be_hw_params_fixup,
7571 .ignore_pmdown_time = 1,
7572 .ignore_suspend = 1,
7573 .ops = &msm_cdc_dma_be_ops,
7574 },
7575 /* TX CDC DMA Backend DAI Links */
7576 {
7577 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7578 .stream_name = "TX CDC DMA3 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7579 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7580 .platform_name = "msm-pcm-routing",
7581 .codec_name = "bolero_codec",
7582 .codec_dai_name = "tx_macro_tx1",
7583 .no_pcm = 1,
7584 .dpcm_capture = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7585 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7586 .be_hw_params_fixup = msm_be_hw_params_fixup,
7587 .ignore_suspend = 1,
7588 .ops = &msm_cdc_dma_be_ops,
7589 },
7590 {
7591 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7592 .stream_name = "TX CDC DMA4 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7593 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7594 .platform_name = "msm-pcm-routing",
7595 .codec_name = "bolero_codec",
7596 .codec_dai_name = "tx_macro_tx2",
7597 .no_pcm = 1,
7598 .dpcm_capture = 1,
7599 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7600 .be_hw_params_fixup = msm_be_hw_params_fixup,
7601 .ignore_suspend = 1,
7602 .ops = &msm_cdc_dma_be_ops,
7603 },
7604};
7605
7606static struct snd_soc_dai_link msm_sm6150_dai_links[
7607 ARRAY_SIZE(msm_common_dai_links) +
7608 ARRAY_SIZE(msm_tavil_fe_dai_links) +
7609 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7610 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7611 ARRAY_SIZE(msm_common_be_dai_links) +
7612 ARRAY_SIZE(msm_tavil_be_dai_links) +
7613 ARRAY_SIZE(msm_wcn_be_dai_links) +
7614 ARRAY_SIZE(ext_disp_be_dai_link) +
7615 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7616 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7617 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
7618 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
7619
7620static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
7621{
7622 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
7623 struct snd_soc_pcm_runtime *rtd;
7624 int ret = 0;
7625 void *mbhc_calibration;
7626
7627 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
7628 if (!rtd) {
7629 dev_err(card->dev,
7630 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
7631 __func__, be_dl_name);
7632 ret = -EINVAL;
7633 goto err_pcm_runtime;
7634 }
7635
7636 mbhc_calibration = def_wcd_mbhc_cal();
7637 if (!mbhc_calibration) {
7638 ret = -ENOMEM;
7639 goto err_mbhc_cal;
7640 }
7641 wcd_mbhc_cfg.calibration = mbhc_calibration;
7642 ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
7643 if (ret) {
7644 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
7645 __func__, ret);
7646 goto err_hs_detect;
7647 }
7648 return 0;
7649
7650err_hs_detect:
7651 kfree(mbhc_calibration);
7652err_mbhc_cal:
7653err_pcm_runtime:
7654 return ret;
7655}
7656
7657
7658static int msm_populate_dai_link_component_of_node(
7659 struct snd_soc_card *card)
7660{
7661 int i, index, ret = 0;
7662 struct device *cdev = card->dev;
7663 struct snd_soc_dai_link *dai_link = card->dai_link;
7664 struct device_node *np;
7665
7666 if (!cdev) {
7667 pr_err("%s: Sound card device memory NULL\n", __func__);
7668 return -ENODEV;
7669 }
7670
7671 for (i = 0; i < card->num_links; i++) {
7672 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7673 continue;
7674
7675 /* populate platform_of_node for snd card dai links */
7676 if (dai_link[i].platform_name &&
7677 !dai_link[i].platform_of_node) {
7678 index = of_property_match_string(cdev->of_node,
7679 "asoc-platform-names",
7680 dai_link[i].platform_name);
7681 if (index < 0) {
7682 pr_err("%s: No match found for platform name: %s\n",
7683 __func__, dai_link[i].platform_name);
7684 ret = index;
7685 goto err;
7686 }
7687 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7688 index);
7689 if (!np) {
7690 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
7691 __func__, dai_link[i].platform_name,
7692 index);
7693 ret = -ENODEV;
7694 goto err;
7695 }
7696 dai_link[i].platform_of_node = np;
7697 dai_link[i].platform_name = NULL;
7698 }
7699
7700 /* populate cpu_of_node for snd card dai links */
7701 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7702 index = of_property_match_string(cdev->of_node,
7703 "asoc-cpu-names",
7704 dai_link[i].cpu_dai_name);
7705 if (index >= 0) {
7706 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7707 index);
7708 if (!np) {
7709 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
7710 __func__,
7711 dai_link[i].cpu_dai_name);
7712 ret = -ENODEV;
7713 goto err;
7714 }
7715 dai_link[i].cpu_of_node = np;
7716 dai_link[i].cpu_dai_name = NULL;
7717 }
7718 }
7719
7720 /* populate codec_of_node for snd card dai links */
7721 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7722 index = of_property_match_string(cdev->of_node,
7723 "asoc-codec-names",
7724 dai_link[i].codec_name);
7725 if (index < 0)
7726 continue;
7727 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7728 index);
7729 if (!np) {
7730 pr_err("%s: retrieving phandle for codec %s failed\n",
7731 __func__, dai_link[i].codec_name);
7732 ret = -ENODEV;
7733 goto err;
7734 }
7735 dai_link[i].codec_of_node = np;
7736 dai_link[i].codec_name = NULL;
7737 }
7738 }
7739
7740err:
7741 return ret;
7742}
7743
7744static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7745{
7746 int ret = 0;
7747 struct snd_soc_codec *codec = rtd->codec;
7748
7749 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
7750 ARRAY_SIZE(msm_tavil_snd_controls));
7751 if (ret < 0) {
7752 dev_err(codec->dev,
7753 "%s: add_codec_controls failed, err = %d\n",
7754 __func__, ret);
7755 return ret;
7756 }
7757
7758 return 0;
7759}
7760
7761static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7762 struct snd_pcm_hw_params *params)
7763{
7764 struct snd_soc_pcm_runtime *rtd = substream->private_data;
7765 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
7766
7767 int ret = 0;
7768 unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
7769 151};
7770 unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
7771 134, 135, 136, 137, 138, 139,
7772 140, 141, 142, 143};
7773
7774 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
7775 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
7776 slim_rx_cfg[SLIM_RX_0].channels,
7777 rx_ch);
7778 if (ret < 0)
7779 pr_err("%s: RX failed to set cpu chan map error %d\n",
7780 __func__, ret);
7781 } else {
7782 ret = snd_soc_dai_set_channel_map(cpu_dai,
7783 slim_tx_cfg[SLIM_TX_0].channels,
7784 tx_ch, 0, 0);
7785 if (ret < 0)
7786 pr_err("%s: TX failed to set cpu chan map error %d\n",
7787 __func__, ret);
7788 }
7789
7790 return ret;
7791}
7792
7793static struct snd_soc_ops msm_stub_be_ops = {
7794 .hw_params = msm_snd_stub_hw_params,
7795};
7796
7797static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7798
7799 /* FrontEnd DAI Links */
7800 {
7801 .name = "MSMSTUB Media1",
7802 .stream_name = "MultiMedia1",
7803 .cpu_dai_name = "MultiMedia1",
7804 .platform_name = "msm-pcm-dsp.0",
7805 .dynamic = 1,
7806 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7807 .dpcm_playback = 1,
7808 .dpcm_capture = 1,
7809 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7810 SND_SOC_DPCM_TRIGGER_POST},
7811 .codec_dai_name = "snd-soc-dummy-dai",
7812 .codec_name = "snd-soc-dummy",
7813 .ignore_suspend = 1,
7814 /* this dainlink has playback support */
7815 .ignore_pmdown_time = 1,
7816 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7817 },
7818};
7819
7820static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7821
7822 /* Backend DAI Links */
7823 {
7824 .name = LPASS_BE_SLIMBUS_0_RX,
7825 .stream_name = "Slimbus Playback",
7826 .cpu_dai_name = "msm-dai-q6-dev.16384",
7827 .platform_name = "msm-pcm-routing",
7828 .codec_name = "msm-stub-codec.1",
7829 .codec_dai_name = "msm-stub-rx",
7830 .no_pcm = 1,
7831 .dpcm_playback = 1,
7832 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7833 .init = &msm_audrx_stub_init,
7834 .be_hw_params_fixup = msm_be_hw_params_fixup,
7835 .ignore_pmdown_time = 1, /* dai link has playback support */
7836 .ignore_suspend = 1,
7837 .ops = &msm_stub_be_ops,
7838 },
7839 {
7840 .name = LPASS_BE_SLIMBUS_0_TX,
7841 .stream_name = "Slimbus Capture",
7842 .cpu_dai_name = "msm-dai-q6-dev.16385",
7843 .platform_name = "msm-pcm-routing",
7844 .codec_name = "msm-stub-codec.1",
7845 .codec_dai_name = "msm-stub-tx",
7846 .no_pcm = 1,
7847 .dpcm_capture = 1,
7848 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7849 .be_hw_params_fixup = msm_be_hw_params_fixup,
7850 .ignore_suspend = 1,
7851 .ops = &msm_stub_be_ops,
7852 },
7853};
7854
7855static struct snd_soc_dai_link msm_stub_dai_links[
7856 ARRAY_SIZE(msm_stub_fe_dai_links) +
7857 ARRAY_SIZE(msm_stub_be_dai_links)];
7858
7859struct snd_soc_card snd_soc_card_stub_msm = {
7860 .name = "sm6150-stub-snd-card",
7861};
7862
7863static const struct of_device_id sm6150_asoc_machine_of_match[] = {
7864 { .compatible = "qcom,sm6150-asoc-snd",
7865 .data = "codec"},
7866 { .compatible = "qcom,sm6150-asoc-snd-stub",
7867 .data = "stub_codec"},
7868 {},
7869};
7870
7871static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7872{
7873 struct snd_soc_card *card = NULL;
7874 struct snd_soc_dai_link *dailink;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7875 int total_links = 0, rc = 0;
7876 u32 tavil_codec = 0, auxpcm_audio_intf = 0;
7877 u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
7878 u32 wcn_btfm_intf = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7879 const struct of_device_id *match;
7880
7881 match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
7882 if (!match) {
7883 dev_err(dev, "%s: No DT match found for sound card\n",
7884 __func__);
7885 return NULL;
7886 }
7887
7888 if (!strcmp(match->data, "codec")) {
7889 card = &snd_soc_card_sm6150_msm;
7890 memcpy(msm_sm6150_dai_links + total_links,
7891 msm_common_dai_links,
7892 sizeof(msm_common_dai_links));
7893
7894 total_links += ARRAY_SIZE(msm_common_dai_links);
7895
7896 memcpy(msm_sm6150_dai_links + total_links,
7897 msm_common_misc_fe_dai_links,
7898 sizeof(msm_common_misc_fe_dai_links));
7899
7900 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7901
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7902 rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
7903 &tavil_codec);
7904 if (rc) {
7905 dev_dbg(dev, "%s: No DT match for tavil codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7906 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7907 } else {
7908 if (tavil_codec) {
7909 card->late_probe =
7910 msm_snd_card_tavil_late_probe;
7911 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7912 msm_tavil_fe_dai_links,
7913 sizeof(msm_tavil_fe_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7914 total_links +=
7915 ARRAY_SIZE(msm_tavil_fe_dai_links);
7916 }
7917 }
7918
7919 if (!tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7920 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7921 msm_bolero_fe_dai_links,
7922 sizeof(msm_bolero_fe_dai_links));
7923 total_links +=
7924 ARRAY_SIZE(msm_bolero_fe_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7925 }
7926
7927 memcpy(msm_sm6150_dai_links + total_links,
7928 msm_common_be_dai_links,
7929 sizeof(msm_common_be_dai_links));
7930
7931 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7932
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7933 if (tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7934 memcpy(msm_sm6150_dai_links + total_links,
7935 msm_tavil_be_dai_links,
7936 sizeof(msm_tavil_be_dai_links));
7937 total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
7938 } else {
7939 memcpy(msm_sm6150_dai_links + total_links,
7940 msm_wsa_cdc_dma_be_dai_links,
7941 sizeof(msm_wsa_cdc_dma_be_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7942 total_links +=
7943 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7944
7945 memcpy(msm_sm6150_dai_links + total_links,
7946 msm_rx_tx_cdc_dma_be_dai_links,
7947 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7948 total_links +=
7949 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7950 }
7951
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7952 rc = of_property_read_u32(dev->of_node,
7953 "qcom,ext-disp-audio-rx",
7954 &ext_disp_audio_intf);
7955 if (rc) {
7956 dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7957 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7958 } else {
7959 if (auxpcm_audio_intf) {
7960 memcpy(msm_sm6150_dai_links + total_links,
7961 ext_disp_be_dai_link,
7962 sizeof(ext_disp_be_dai_link));
7963 total_links +=
7964 ARRAY_SIZE(ext_disp_be_dai_link);
7965 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7966 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7967
7968 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7969 &mi2s_audio_intf);
7970 if (rc) {
7971 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7972 __func__);
7973 } else {
7974 if (mi2s_audio_intf) {
7975 memcpy(msm_sm6150_dai_links + total_links,
7976 msm_mi2s_be_dai_links,
7977 sizeof(msm_mi2s_be_dai_links));
7978 total_links +=
7979 ARRAY_SIZE(msm_mi2s_be_dai_links);
7980 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7981 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7982
7983
7984 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7985 &wcn_btfm_intf);
7986 if (rc) {
7987 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7988 __func__);
7989 } else {
7990 if (wcn_btfm_intf) {
7991 memcpy(msm_sm6150_dai_links + total_links,
7992 msm_wcn_be_dai_links,
7993 sizeof(msm_wcn_be_dai_links));
7994 total_links +=
7995 ARRAY_SIZE(msm_wcn_be_dai_links);
7996 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7997 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7998
7999 rc = of_property_read_u32(dev->of_node,
8000 "qcom,auxpcm-audio-intf",
8001 &auxpcm_audio_intf);
8002 if (rc) {
8003 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
8004 __func__);
8005 } else {
8006 if (auxpcm_audio_intf) {
8007 memcpy(msm_sm6150_dai_links + total_links,
8008 msm_auxpcm_be_dai_links,
8009 sizeof(msm_auxpcm_be_dai_links));
8010 total_links +=
8011 ARRAY_SIZE(msm_auxpcm_be_dai_links);
8012 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8013 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8014
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8015 dailink = msm_sm6150_dai_links;
8016 } else if (!strcmp(match->data, "stub_codec")) {
8017 card = &snd_soc_card_stub_msm;
8018
8019 memcpy(msm_stub_dai_links + total_links,
8020 msm_stub_fe_dai_links,
8021 sizeof(msm_stub_fe_dai_links));
8022 total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
8023
8024 memcpy(msm_stub_dai_links + total_links,
8025 msm_stub_be_dai_links,
8026 sizeof(msm_stub_be_dai_links));
8027 total_links += ARRAY_SIZE(msm_stub_be_dai_links);
8028
8029 dailink = msm_stub_dai_links;
8030 }
8031
8032 if (card) {
8033 card->dai_link = dailink;
8034 card->num_links = total_links;
8035 }
8036
8037 return card;
8038}
8039
8040static int msm_wsa881x_init(struct snd_soc_component *component)
8041{
8042 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
8043 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
8044 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
8045 SPKR_L_BOOST, SPKR_L_VI};
8046 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
8047 SPKR_R_BOOST, SPKR_R_VI};
8048 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
8049 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
8050 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
8051 struct msm_asoc_mach_data *pdata;
8052 struct snd_soc_dapm_context *dapm;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8053 struct snd_card *card = component->card->snd_card;
8054 struct snd_info_entry *entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8055 int ret = 0;
8056
8057 if (!codec) {
8058 pr_err("%s codec is NULL\n", __func__);
8059 return -EINVAL;
8060 }
8061
8062 dapm = snd_soc_codec_get_dapm(codec);
8063
8064 if (!strcmp(component->name_prefix, "SpkrLeft")) {
8065 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
8066 __func__, codec->component.name);
8067 wsa881x_set_channel_map(codec, &spkleft_ports[0],
8068 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
8069 &ch_rate[0], &spkleft_port_types[0]);
8070 if (dapm->component) {
8071 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
8072 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
8073 }
8074 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
8075 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
8076 __func__, codec->component.name);
8077 wsa881x_set_channel_map(codec, &spkright_ports[0],
8078 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
8079 &ch_rate[0], &spkright_port_types[0]);
8080 if (dapm->component) {
8081 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
8082 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
8083 }
8084 } else {
8085 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
8086 codec->component.name);
8087 ret = -EINVAL;
8088 goto err;
8089 }
8090 pdata = snd_soc_card_get_drvdata(component->card);
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8091 if (!pdata->codec_root) {
8092 entry = snd_info_create_subdir(card->module, "codecs",
8093 card->proc_root);
8094 if (!entry) {
8095 pr_err("%s: Cannot create codecs module entry\n",
8096 __func__);
8097 ret = 0;
8098 goto err;
8099 }
8100 pdata->codec_root = entry;
8101 }
8102 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
8103 codec);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8104err:
8105 return ret;
8106}
8107
8108static int msm_aux_codec_init(struct snd_soc_component *component)
8109{
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8110 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
8111 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]8112 int ret = 0;
8113 void *mbhc_calibration;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8114 struct snd_info_entry *entry;
8115 struct snd_card *card = component->card->snd_card;
8116 struct msm_asoc_mach_data *pdata;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8117
8118 snd_soc_dapm_ignore_suspend(dapm, "EAR");
8119 snd_soc_dapm_ignore_suspend(dapm, "AUX");
8120 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
8121 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
8122 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
8123 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
8124 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
8125 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
8126 snd_soc_dapm_sync(dapm);
8127
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8128 pdata = snd_soc_card_get_drvdata(component->card);
8129 if (!pdata->codec_root) {
8130 entry = snd_info_create_subdir(card->module, "codecs",
8131 card->proc_root);
8132 if (!entry) {
8133 pr_err("%s: Cannot create codecs module entry\n",
8134 __func__);
8135 ret = 0;
8136 goto codec_root_err;
8137 }
8138 pdata->codec_root = entry;
8139 }
8140 wcd937x_info_create_codec_entry(pdata->codec_root, codec);
8141codec_root_err:
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]8142 mbhc_calibration = def_wcd_mbhc_cal();
8143 if (!mbhc_calibration) {
8144 return -ENOMEM;
8145 }
8146 wcd_mbhc_cfg.calibration = mbhc_calibration;
8147 ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
8148
8149 return ret;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8150}
8151
8152static int msm_init_aux_dev(struct platform_device *pdev,
8153 struct snd_soc_card *card)
8154{
8155 struct device_node *wsa_of_node;
8156 struct device_node *aux_codec_of_node;
8157 u32 wsa_max_devs;
8158 u32 wsa_dev_cnt;
8159 u32 codec_aux_dev_cnt = 0;
8160 int i;
8161 struct msm_wsa881x_dev_info *wsa881x_dev_info;
8162 struct aux_codec_dev_info *aux_cdc_dev_info;
8163 const char *auxdev_name_prefix[1];
8164 char *dev_name_str = NULL;
8165 int found = 0;
8166 int codecs_found = 0;
8167 int ret = 0;
8168
8169 /* Get maximum WSA device count for this platform */
8170 ret = of_property_read_u32(pdev->dev.of_node,
8171 "qcom,wsa-max-devs", &wsa_max_devs);
8172 if (ret) {
8173 dev_info(&pdev->dev,
8174 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
8175 __func__, pdev->dev.of_node->full_name, ret);
8176 wsa_max_devs = 0;
8177 goto codec_aux_dev;
8178 }
8179 if (wsa_max_devs == 0) {
8180 dev_warn(&pdev->dev,
8181 "%s: Max WSA devices is 0 for this target?\n",
8182 __func__);
8183 goto codec_aux_dev;
8184 }
8185
8186 /* Get count of WSA device phandles for this platform */
8187 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
8188 "qcom,wsa-devs", NULL);
8189 if (wsa_dev_cnt == -ENOENT) {
8190 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
8191 __func__);
8192 goto err;
8193 } else if (wsa_dev_cnt <= 0) {
8194 dev_err(&pdev->dev,
8195 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
8196 __func__, wsa_dev_cnt);
8197 ret = -EINVAL;
8198 goto err;
8199 }
8200
8201 /*
8202 * Expect total phandles count to be NOT less than maximum possible
8203 * WSA count. However, if it is less, then assign same value to
8204 * max count as well.
8205 */
8206 if (wsa_dev_cnt < wsa_max_devs) {
8207 dev_dbg(&pdev->dev,
8208 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
8209 __func__, wsa_max_devs, wsa_dev_cnt);
8210 wsa_max_devs = wsa_dev_cnt;
8211 }
8212
8213 /* Make sure prefix string passed for each WSA device */
8214 ret = of_property_count_strings(pdev->dev.of_node,
8215 "qcom,wsa-aux-dev-prefix");
8216 if (ret != wsa_dev_cnt) {
8217 dev_err(&pdev->dev,
8218 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
8219 __func__, wsa_dev_cnt, ret);
8220 ret = -EINVAL;
8221 goto err;
8222 }
8223
8224 /*
8225 * Alloc mem to store phandle and index info of WSA device, if already
8226 * registered with ALSA core
8227 */
8228 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
8229 sizeof(struct msm_wsa881x_dev_info),
8230 GFP_KERNEL);
8231 if (!wsa881x_dev_info) {
8232 ret = -ENOMEM;
8233 goto err;
8234 }
8235
8236 /*
8237 * search and check whether all WSA devices are already
8238 * registered with ALSA core or not. If found a node, store
8239 * the node and the index in a local array of struct for later
8240 * use.
8241 */
8242 for (i = 0; i < wsa_dev_cnt; i++) {
8243 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
8244 "qcom,wsa-devs", i);
8245 if (unlikely(!wsa_of_node)) {
8246 /* we should not be here */
8247 dev_err(&pdev->dev,
8248 "%s: wsa dev node is not present\n",
8249 __func__);
8250 ret = -EINVAL;
8251 goto err;
8252 }
8253 if (soc_find_component(wsa_of_node, NULL)) {
8254 /* WSA device registered with ALSA core */
8255 wsa881x_dev_info[found].of_node = wsa_of_node;
8256 wsa881x_dev_info[found].index = i;
8257 found++;
8258 if (found == wsa_max_devs)
8259 break;
8260 }
8261 }
8262
8263 if (found < wsa_max_devs) {
8264 dev_dbg(&pdev->dev,
8265 "%s: failed to find %d components. Found only %d\n",
8266 __func__, wsa_max_devs, found);
8267 return -EPROBE_DEFER;
8268 }
8269 dev_info(&pdev->dev,
8270 "%s: found %d wsa881x devices registered with ALSA core\n",
8271 __func__, found);
8272
8273codec_aux_dev:
8274 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
8275 /* Get count of aux codec device phandles for this platform */
8276 codec_aux_dev_cnt = of_count_phandle_with_args(
8277 pdev->dev.of_node,
8278 "qcom,codec-aux-devs", NULL);
8279 if (codec_aux_dev_cnt == -ENOENT) {
8280 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8281 __func__);
8282 goto err;
8283 } else if (codec_aux_dev_cnt <= 0) {
8284 dev_err(&pdev->dev,
8285 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8286 __func__, codec_aux_dev_cnt);
8287 ret = -EINVAL;
8288 goto err;
8289 }
8290
8291 /*
8292 * Alloc mem to store phandle and index info of aux codec
8293 * if already registered with ALSA core
8294 */
8295 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
8296 sizeof(struct aux_codec_dev_info),
8297 GFP_KERNEL);
8298 if (!aux_cdc_dev_info) {
8299 ret = -ENOMEM;
8300 goto err;
8301 }
8302
8303 /*
8304 * search and check whether all aux codecs are already
8305 * registered with ALSA core or not. If found a node, store
8306 * the node and the index in a local array of struct for later
8307 * use.
8308 */
8309 for (i = 0; i < codec_aux_dev_cnt; i++) {
8310 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8311 "qcom,codec-aux-devs", i);
8312 if (unlikely(!aux_codec_of_node)) {
8313 /* we should not be here */
8314 dev_err(&pdev->dev,
8315 "%s: aux codec dev node is not present\n",
8316 __func__);
8317 ret = -EINVAL;
8318 goto err;
8319 }
8320 if (soc_find_component(aux_codec_of_node, NULL)) {
8321 /* AUX codec registered with ALSA core */
8322 aux_cdc_dev_info[codecs_found].of_node =
8323 aux_codec_of_node;
8324 aux_cdc_dev_info[codecs_found].index = i;
8325 codecs_found++;
8326 }
8327 }
8328
8329 if (codecs_found < codec_aux_dev_cnt) {
8330 dev_dbg(&pdev->dev,
8331 "%s: failed to find %d components. Found only %d\n",
8332 __func__, codec_aux_dev_cnt, codecs_found);
8333 return -EPROBE_DEFER;
8334 }
8335 dev_info(&pdev->dev,
8336 "%s: found %d AUX codecs registered with ALSA core\n",
8337 __func__, codecs_found);
8338
8339 }
8340
8341 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
8342 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
8343
8344 /* Alloc array of AUX devs struct */
8345 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8346 sizeof(struct snd_soc_aux_dev),
8347 GFP_KERNEL);
8348 if (!msm_aux_dev) {
8349 ret = -ENOMEM;
8350 goto err;
8351 }
8352
8353 /* Alloc array of codec conf struct */
8354 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8355 sizeof(struct snd_soc_codec_conf),
8356 GFP_KERNEL);
8357 if (!msm_codec_conf) {
8358 ret = -ENOMEM;
8359 goto err;
8360 }
8361
8362 for (i = 0; i < wsa_max_devs; i++) {
8363 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8364 GFP_KERNEL);
8365 if (!dev_name_str) {
8366 ret = -ENOMEM;
8367 goto err;
8368 }
8369
8370 ret = of_property_read_string_index(pdev->dev.of_node,
8371 "qcom,wsa-aux-dev-prefix",
8372 wsa881x_dev_info[i].index,
8373 auxdev_name_prefix);
8374 if (ret) {
8375 dev_err(&pdev->dev,
8376 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8377 __func__, ret);
8378 ret = -EINVAL;
8379 goto err;
8380 }
8381
8382 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8383 msm_aux_dev[i].name = dev_name_str;
8384 msm_aux_dev[i].codec_name = NULL;
8385 msm_aux_dev[i].codec_of_node =
8386 wsa881x_dev_info[i].of_node;
8387 msm_aux_dev[i].init = msm_wsa881x_init;
8388 msm_codec_conf[i].dev_name = NULL;
8389 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8390 msm_codec_conf[i].of_node =
8391 wsa881x_dev_info[i].of_node;
8392 }
8393
8394 for (i = 0; i < codec_aux_dev_cnt; i++) {
8395 msm_aux_dev[wsa_max_devs + i].name = NULL;
8396 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8397 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8398 aux_cdc_dev_info[i].of_node;
8399 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8400 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8401 msm_codec_conf[wsa_max_devs + i].name_prefix =
8402 NULL;
8403 msm_codec_conf[wsa_max_devs + i].of_node =
8404 aux_cdc_dev_info[i].of_node;
8405 }
8406
8407 card->codec_conf = msm_codec_conf;
8408 card->aux_dev = msm_aux_dev;
8409err:
8410 return ret;
8411}
8412
8413static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8414{
8415 int count;
8416 u32 mi2s_master_slave[MI2S_MAX];
8417 int ret;
8418
8419 for (count = 0; count < MI2S_MAX; count++) {
8420 mutex_init(&mi2s_intf_conf[count].lock);
8421 mi2s_intf_conf[count].ref_cnt = 0;
8422 }
8423
8424 ret = of_property_read_u32_array(pdev->dev.of_node,
8425 "qcom,msm-mi2s-master",
8426 mi2s_master_slave, MI2S_MAX);
8427 if (ret) {
8428 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8429 __func__);
8430 } else {
8431 for (count = 0; count < MI2S_MAX; count++) {
8432 mi2s_intf_conf[count].msm_is_mi2s_master =
8433 mi2s_master_slave[count];
8434 }
8435 }
8436}
8437
8438static void msm_i2s_auxpcm_deinit(void)
8439{
8440 int count;
8441
8442 for (count = 0; count < MI2S_MAX; count++) {
8443 mutex_destroy(&mi2s_intf_conf[count].lock);
8444 mi2s_intf_conf[count].ref_cnt = 0;
8445 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8446 }
8447}
8448static int msm_asoc_machine_probe(struct platform_device *pdev)
8449{
8450 struct snd_soc_card *card;
8451 struct msm_asoc_mach_data *pdata;
8452 const char *mbhc_audio_jack_type = NULL;
8453 int ret;
8454
8455 if (!pdev->dev.of_node) {
8456 dev_err(&pdev->dev, "No platform supplied from device tree\n");
8457 return -EINVAL;
8458 }
8459
8460 pdata = devm_kzalloc(&pdev->dev,
8461 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8462 if (!pdata)
8463 return -ENOMEM;
8464
8465 card = populate_snd_card_dailinks(&pdev->dev);
8466 if (!card) {
8467 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8468 ret = -EINVAL;
8469 goto err;
8470 }
8471 card->dev = &pdev->dev;
8472 platform_set_drvdata(pdev, card);
8473 snd_soc_card_set_drvdata(card, pdata);
8474
8475 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8476 if (ret) {
8477 dev_err(&pdev->dev, "parse card name failed, err:%d\n",
8478 ret);
8479 goto err;
8480 }
8481
8482 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8483 if (ret) {
8484 dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
8485 ret);
8486 goto err;
8487 }
8488
8489 ret = msm_populate_dai_link_component_of_node(card);
8490 if (ret) {
8491 ret = -EPROBE_DEFER;
8492 goto err;
8493 }
8494
8495 ret = msm_init_aux_dev(pdev, card);
8496 if (ret)
8497 goto err;
8498
8499 ret = devm_snd_soc_register_card(&pdev->dev, card);
8500 if (ret == -EPROBE_DEFER) {
8501 if (codec_reg_done)
8502 ret = -EINVAL;
8503 goto err;
8504 } else if (ret) {
8505 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
8506 ret);
8507 goto err;
8508 }
8509 dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
8510 spdev = pdev;
8511
8512 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8513 "qcom,hph-en1-gpio", 0);
8514 if (!pdata->hph_en1_gpio_p) {
8515 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8516 "qcom,hph-en1-gpio",
8517 pdev->dev.of_node->full_name);
8518 }
8519
8520 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8521 "qcom,hph-en0-gpio", 0);
8522 if (!pdata->hph_en0_gpio_p) {
8523 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8524 "qcom,hph-en0-gpio",
8525 pdev->dev.of_node->full_name);
8526 }
8527
8528 ret = of_property_read_string(pdev->dev.of_node,
8529 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8530 if (ret) {
8531 dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
8532 "qcom,mbhc-audio-jack-type",
8533 pdev->dev.of_node->full_name);
8534 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8535 } else {
8536 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8537 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8538 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8539 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8540 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8541 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8542 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8543 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8544 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8545 } else {
8546 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8547 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8548 }
8549 }
8550 /*
8551 * Parse US-Euro gpio info from DT. Report no error if us-euro
8552 * entry is not found in DT file as some targets do not support
8553 * US-Euro detection
8554 */
8555 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8556 "qcom,us-euro-gpios", 0);
8557 if (!pdata->us_euro_gpio_p) {
8558 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8559 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8560 } else {
8561 dev_dbg(&pdev->dev, "%s detected\n",
8562 "qcom,us-euro-gpios");
8563 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8564 }
8565 /* Parse pinctrl info from devicetree */
8566 ret = msm_get_pinctrl(pdev);
8567 if (!ret) {
8568 pr_debug("%s: pinctrl parsing successful\n", __func__);
8569 } else {
8570 dev_dbg(&pdev->dev,
8571 "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
8572 __func__, ret);
8573 ret = 0;
8574 }
8575
8576 msm_i2s_auxpcm_init(pdev);
8577 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8578 is_initial_boot = true;
8579 ret = audio_notifier_register("sm6150",
8580 AUDIO_NOTIFIER_ADSP_DOMAIN,
8581 &service_nb);
8582 if (ret < 0)
8583 pr_err("%s: Audio notifier register failed ret = %d\n",
8584 __func__, ret);
8585 } else {
8586 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8587 "qcom,cdc-dmic01-gpios",
8588 0);
8589 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8590 "qcom,cdc-dmic23-gpios",
8591 0);
8592 }
8593err:
8594 return ret;
8595}
8596
8597static int msm_asoc_machine_remove(struct platform_device *pdev)
8598{
8599 audio_notifier_deregister("sm6150");
8600 msm_i2s_auxpcm_deinit();
8601
8602 return 0;
8603}
8604
8605static struct platform_driver sm6150_asoc_machine_driver = {
8606 .driver = {
8607 .name = DRV_NAME,
8608 .owner = THIS_MODULE,
8609 .pm = &snd_soc_pm_ops,
8610 .of_match_table = sm6150_asoc_machine_of_match,
8611 },
8612 .probe = msm_asoc_machine_probe,
8613 .remove = msm_asoc_machine_remove,
8614};
8615module_platform_driver(sm6150_asoc_machine_driver);
8616
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8617MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8618MODULE_LICENSE("GPL v2");
8619MODULE_ALIAS("platform:" DRV_NAME);
8620MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);