Gitiles
Code Review Sign In
gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 4d6a6dc9e3aeaa351ba6e8f88863e058fc61c5a6 / . / asoc / bengal.c
blob: 0ecc1910b68d9cf5c0c32820e5299104df17a47f [file] [log] [blame]
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
2/*
Laxminath Kasam37a89062020-01-07 14:53:01 +0530[diff] [blame]3 * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
16#include <linux/soc/qcom/fsa4480-i2c.h>
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame]17#include <linux/nvmem-consumer.h>
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]18#include <sound/core.h>
19#include <sound/soc.h>
20#include <sound/soc-dapm.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/info.h>
24#include <soc/snd_event.h>
25#include <dsp/audio_notifier.h>
26#include <soc/swr-common.h>
27#include <dsp/q6afe-v2.h>
28#include <dsp/q6core.h>
29#include "device_event.h"
30#include "msm-pcm-routing-v2.h"
31#include "asoc/msm-cdc-pinctrl.h"
32#include "asoc/wcd-mbhc-v2.h"
33#include "codecs/wcd937x/wcd937x-mbhc.h"
Aditya Bavanari707bf352020-03-12 12:30:10 +0530[diff] [blame]34#include "codecs/rouleur/rouleur-mbhc.h"
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]35#include "codecs/wsa881x-analog.h"
36#include "codecs/wcd937x/wcd937x.h"
Aditya Bavanari707bf352020-03-12 12:30:10 +0530[diff] [blame]37#include "codecs/rouleur/rouleur.h"
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]38#include "codecs/bolero/bolero-cdc.h"
39#include <dt-bindings/sound/audio-codec-port-types.h>
40#include "bengal-port-config.h"
41
42#define DRV_NAME "bengal-asoc-snd"
43#define __CHIPSET__ "BENGAL "
44#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
45
46#define SAMPLING_RATE_8KHZ 8000
47#define SAMPLING_RATE_11P025KHZ 11025
48#define SAMPLING_RATE_16KHZ 16000
49#define SAMPLING_RATE_22P05KHZ 22050
50#define SAMPLING_RATE_32KHZ 32000
51#define SAMPLING_RATE_44P1KHZ 44100
52#define SAMPLING_RATE_48KHZ 48000
53#define SAMPLING_RATE_88P2KHZ 88200
54#define SAMPLING_RATE_96KHZ 96000
55#define SAMPLING_RATE_176P4KHZ 176400
56#define SAMPLING_RATE_192KHZ 192000
57#define SAMPLING_RATE_352P8KHZ 352800
58#define SAMPLING_RATE_384KHZ 384000
59
60#define WCD9XXX_MBHC_DEF_RLOADS 5
61#define WCD9XXX_MBHC_DEF_BUTTONS 8
Aditya Bavanari9f892d82020-04-29 20:40:53 +0530[diff] [blame]62#define ROULEUR_MBHC_DEF_BUTTONS 5
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]63#define CODEC_EXT_CLK_RATE 9600000
64#define ADSP_STATE_READY_TIMEOUT_MS 3000
65#define DEV_NAME_STR_LEN 32
66#define WCD_MBHC_HS_V_MAX 1600
Aditya Bavanari9f892d82020-04-29 20:40:53 +0530[diff] [blame]67#define ROULEUR_MBHC_HS_V_MAX 1700
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]68
69#define TDM_CHANNEL_MAX 8
70#define DEV_NAME_STR_LEN 32
71
72/* time in us to ensure LPM doesn't go in C3/C4 */
73#define MSM_LL_QOS_VALUE 300
74
75#define ADSP_STATE_READY_TIMEOUT_MS 3000
76
77#define WCN_CDC_SLIM_RX_CH_MAX 2
78#define WCN_CDC_SLIM_TX_CH_MAX 3
79
80enum {
81 TDM_0 = 0,
82 TDM_1,
83 TDM_2,
84 TDM_3,
85 TDM_4,
86 TDM_5,
87 TDM_6,
88 TDM_7,
89 TDM_PORT_MAX,
90};
91
92enum {
93 TDM_PRI = 0,
94 TDM_SEC,
95 TDM_TERT,
96 TDM_QUAT,
97 TDM_INTERFACE_MAX,
98};
99
100enum {
101 PRIM_AUX_PCM = 0,
102 SEC_AUX_PCM,
103 TERT_AUX_PCM,
104 QUAT_AUX_PCM,
105 AUX_PCM_MAX,
106};
107
108enum {
109 PRIM_MI2S = 0,
110 SEC_MI2S,
111 TERT_MI2S,
112 QUAT_MI2S,
113 MI2S_MAX,
114};
115
116enum {
117 RX_CDC_DMA_RX_0 = 0,
118 RX_CDC_DMA_RX_1,
119 RX_CDC_DMA_RX_2,
120 RX_CDC_DMA_RX_3,
121 RX_CDC_DMA_RX_5,
122 CDC_DMA_RX_MAX,
123};
124
125enum {
126 TX_CDC_DMA_TX_0 = 0,
127 TX_CDC_DMA_TX_3,
128 TX_CDC_DMA_TX_4,
129 VA_CDC_DMA_TX_0,
130 VA_CDC_DMA_TX_1,
131 VA_CDC_DMA_TX_2,
132 CDC_DMA_TX_MAX,
133};
134
135enum {
136 SLIM_RX_7 = 0,
137 SLIM_RX_MAX,
138};
139
140enum {
141 SLIM_TX_7 = 0,
142 SLIM_TX_8,
143 SLIM_TX_MAX,
144};
145
146enum {
147 AFE_LOOPBACK_TX_IDX = 0,
148 AFE_LOOPBACK_TX_IDX_MAX,
149};
150struct msm_asoc_mach_data {
151 struct snd_info_entry *codec_root;
152 int usbc_en2_gpio; /* used by gpio driver API */
153 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
154 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
155 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
156 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
157 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
158 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
159 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
160 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
161 bool is_afe_config_done;
162 struct device_node *fsa_handle;
Laxminath Kasam37a89062020-01-07 14:53:01 +0530[diff] [blame]163 bool va_disable;
lintaopei746b0122021-03-16 19:35:42 +0800[diff] [blame]164#ifdef CONFIG_T2M_SND_FP4
165 struct device_node *hac_pa_gpio_p;
166#endif
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]167};
168
169struct tdm_port {
170 u32 mode;
171 u32 channel;
172};
173
174enum {
175 EXT_DISP_RX_IDX_DP = 0,
176 EXT_DISP_RX_IDX_DP1,
177 EXT_DISP_RX_IDX_MAX,
178};
179
180struct msm_wsa881x_dev_info {
181 struct device_node *of_node;
182 u32 index;
183};
184
185struct aux_codec_dev_info {
186 struct device_node *of_node;
187 u32 index;
188};
189
190struct dev_config {
191 u32 sample_rate;
192 u32 bit_format;
193 u32 channels;
194};
195
196/* Default configuration of slimbus channels */
197static struct dev_config slim_rx_cfg[] = {
198 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
199};
200
201static struct dev_config slim_tx_cfg[] = {
202 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
203 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
204};
205
206static struct dev_config usb_rx_cfg = {
207 .sample_rate = SAMPLING_RATE_48KHZ,
208 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
209 .channels = 2,
210};
211
212static struct dev_config usb_tx_cfg = {
213 .sample_rate = SAMPLING_RATE_48KHZ,
214 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
215 .channels = 1,
216};
217
218static struct dev_config proxy_rx_cfg = {
219 .sample_rate = SAMPLING_RATE_48KHZ,
220 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
221 .channels = 2,
222};
223
224static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
225 {
226 AFE_API_VERSION_I2S_CONFIG,
227 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
228 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
229 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
230 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
231 0,
232 },
233 {
234 AFE_API_VERSION_I2S_CONFIG,
235 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
236 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
237 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
238 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
239 0,
240 },
241 {
242 AFE_API_VERSION_I2S_CONFIG,
243 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
244 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
245 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
246 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
247 0,
248 },
249 {
250 AFE_API_VERSION_I2S_CONFIG,
251 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
252 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
253 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
254 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
255 0,
256 },
257};
258
259struct mi2s_conf {
260 struct mutex lock;
261 u32 ref_cnt;
262 u32 msm_is_mi2s_master;
263};
264
265static u32 mi2s_ebit_clk[MI2S_MAX] = {
266 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
267 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
268 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
269};
270
271static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
272
273/* Default configuration of TDM channels */
274static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
275 { /* PRI TDM */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
278 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
279 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
280 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
281 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
282 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
283 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
284 },
285 { /* SEC TDM */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
291 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
292 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
293 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
294 },
295 { /* TERT TDM */
296 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
297 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
298 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
299 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
300 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
304 },
305 { /* QUAT TDM */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
309 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
310 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
314 },
315};
316
317static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
318 { /* PRI TDM */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
327 },
328 { /* SEC TDM */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
337 },
338 { /* TERT TDM */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
347 },
348 { /* QUAT TDM */
349 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
350 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
351 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
352 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
353 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
354 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
355 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
356 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
357 },
358};
359
360/* Default configuration of AUX PCM channels */
361static struct dev_config aux_pcm_rx_cfg[] = {
362 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
363 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
364 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
365 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
366};
367
368static struct dev_config aux_pcm_tx_cfg[] = {
369 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
370 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
371 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
372 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
373};
374
375/* Default configuration of MI2S channels */
376static struct dev_config mi2s_rx_cfg[] = {
377 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
378 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
379 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
380 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
381};
382
383static struct dev_config mi2s_tx_cfg[] = {
384 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
385 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
386 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
387 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
388};
389
390/* Default configuration of Codec DMA Interface RX */
391static struct dev_config cdc_dma_rx_cfg[] = {
392 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
393 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
394 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
395 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
396 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
397};
398
399/* Default configuration of Codec DMA Interface TX */
400static struct dev_config cdc_dma_tx_cfg[] = {
401 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
402 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
403 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
404 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
405 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
406 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
407};
408
409static struct dev_config afe_loopback_tx_cfg[] = {
410 [AFE_LOOPBACK_TX_IDX] = {
411 SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
412};
413
414static int msm_vi_feed_tx_ch = 2;
415static const char *const vi_feed_ch_text[] = {"One", "Two"};
416static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
417 "S32_LE"};
418static char const *ch_text[] = {"Two", "Three", "Four", "Five",
419 "Six", "Seven", "Eight"};
420static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
421 "KHZ_16", "KHZ_22P05",
422 "KHZ_32", "KHZ_44P1", "KHZ_48",
423 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
424 "KHZ_192", "KHZ_352P8", "KHZ_384"};
425static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
426 "Five", "Six", "Seven",
427 "Eight"};
428static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
429 "KHZ_48", "KHZ_176P4",
430 "KHZ_352P8"};
431static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
432static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
433 "Five", "Six", "Seven", "Eight"};
434static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
435static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
436 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
437 "KHZ_48", "KHZ_96", "KHZ_192"};
438static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
439 "Five", "Six", "Seven",
440 "Eight"};
441
442static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
443static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
444 "Five", "Six", "Seven",
445 "Eight"};
446static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
447 "KHZ_16", "KHZ_22P05",
448 "KHZ_32", "KHZ_44P1", "KHZ_48",
449 "KHZ_88P2", "KHZ_96",
450 "KHZ_176P4", "KHZ_192",
451 "KHZ_352P8", "KHZ_384"};
452static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
453 "KHZ_44P1", "KHZ_48",
454 "KHZ_88P2", "KHZ_96"};
455static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
456 "KHZ_44P1", "KHZ_48",
457 "KHZ_88P2", "KHZ_96"};
458static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
459 "KHZ_44P1", "KHZ_48",
460 "KHZ_88P2", "KHZ_96"};
461static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
462
463static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
464static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
465static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
466static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
467static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
468static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
469static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
470static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
471static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
472static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
473static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
474static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
475static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
476static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
477static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
478static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
479static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
480static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
481static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
482static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
483static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
484static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
485static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
486static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
487static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
488static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
489static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
490static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
491static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
492static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
493static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
494static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
495static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
496static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
497static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
498static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
499static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
500static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
501static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
502static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
503static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
504static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
505static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
506static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
507static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
508static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
509static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
510static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
511static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
512static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
513static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
514static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
515static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
516static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
517static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
518static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
519static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
520static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
521static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
522static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
523static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
524static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
525static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
526static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
527static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
528 cdc_dma_sample_rate_text);
529static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
530 cdc_dma_sample_rate_text);
531static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
532 cdc_dma_sample_rate_text);
533static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
534 cdc_dma_sample_rate_text);
535static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
536 cdc_dma_sample_rate_text);
537static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
538 cdc_dma_sample_rate_text);
539static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
540 cdc_dma_sample_rate_text);
541static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
542 cdc_dma_sample_rate_text);
543static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
544 cdc_dma_sample_rate_text);
545static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
546 cdc_dma_sample_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
548 cdc_dma_sample_rate_text);
549static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
550static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
551static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
552static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
553
554static bool is_initial_boot;
555static bool codec_reg_done;
556static struct snd_soc_aux_dev *msm_aux_dev;
557static struct snd_soc_codec_conf *msm_codec_conf;
558static struct snd_soc_card snd_soc_card_bengal_msm;
559static int dmic_0_1_gpio_cnt;
560static int dmic_2_3_gpio_cnt;
561
562static void *def_wcd_mbhc_cal(void);
Aditya Bavanari9f892d82020-04-29 20:40:53 +0530[diff] [blame]563static void *def_rouleur_mbhc_cal(void);
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]564
565/*
566 * Need to report LINEIN
567 * if R/L channel impedance is larger than 5K ohm
568 */
569static struct wcd_mbhc_config wcd_mbhc_cfg = {
570 .read_fw_bin = false,
571 .calibration = NULL,
572 .detect_extn_cable = true,
573 .mono_stero_detection = false,
574 .swap_gnd_mic = NULL,
575 .hs_ext_micbias = true,
576 .key_code[0] = KEY_MEDIA,
577 .key_code[1] = KEY_VOICECOMMAND,
578 .key_code[2] = KEY_VOLUMEUP,
579 .key_code[3] = KEY_VOLUMEDOWN,
580 .key_code[4] = 0,
581 .key_code[5] = 0,
582 .key_code[6] = 0,
583 .key_code[7] = 0,
584 .linein_th = 5000,
585 .moisture_en = false,
586 .mbhc_micbias = MIC_BIAS_2,
587 .anc_micbias = MIC_BIAS_2,
588 .enable_anc_mic_detect = false,
589 .moisture_duty_cycle_en = true,
590};
591
lintaopei746b0122021-03-16 19:35:42 +0800[diff] [blame]592#ifdef CONFIG_T2M_SND_FP4
593static int msm_enable_hac_pa(struct snd_soc_dapm_widget *w,
594 struct snd_kcontrol *kcontrol,
595 int event);
596
597static const struct snd_kcontrol_new hac_pa_switch[] = {
598 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
599};
600
601static const struct snd_soc_dapm_widget msm_hac_dapm_widgets[] = {
602 SND_SOC_DAPM_MIXER("HAC_PA", SND_SOC_NOPM, 0, 0,
603 hac_pa_switch, ARRAY_SIZE(hac_pa_switch)),
604 SND_SOC_DAPM_PGA_E("HAC PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
605 msm_enable_hac_pa,
606 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
607 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
608
609
610 SND_SOC_DAPM_INPUT("HAC_RX"),
611 SND_SOC_DAPM_OUTPUT("HAC"),
612};
613
614static const struct snd_soc_dapm_route msm_hac_audio_map[] = {
615 {"HAC_PA", "Switch", "HAC_RX"},
616 {"HAC PGA", NULL, "HAC_PA"},
617 {"HAC", NULL, "HAC PGA"},
618};
619#endif
620
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]621static inline int param_is_mask(int p)
622{
623 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
624 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
625}
626
627static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
628 int n)
629{
630 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
631}
632
633static void param_set_mask(struct snd_pcm_hw_params *p, int n,
634 unsigned int bit)
635{
636 if (bit >= SNDRV_MASK_MAX)
637 return;
638 if (param_is_mask(n)) {
639 struct snd_mask *m = param_to_mask(p, n);
640
641 m->bits[0] = 0;
642 m->bits[1] = 0;
643 m->bits[bit >> 5] |= (1 << (bit & 31));
644 }
645}
646
647static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
648 struct snd_ctl_elem_value *ucontrol)
649{
650 int sample_rate_val = 0;
651
652 switch (usb_rx_cfg.sample_rate) {
653 case SAMPLING_RATE_384KHZ:
654 sample_rate_val = 12;
655 break;
656 case SAMPLING_RATE_352P8KHZ:
657 sample_rate_val = 11;
658 break;
659 case SAMPLING_RATE_192KHZ:
660 sample_rate_val = 10;
661 break;
662 case SAMPLING_RATE_176P4KHZ:
663 sample_rate_val = 9;
664 break;
665 case SAMPLING_RATE_96KHZ:
666 sample_rate_val = 8;
667 break;
668 case SAMPLING_RATE_88P2KHZ:
669 sample_rate_val = 7;
670 break;
671 case SAMPLING_RATE_48KHZ:
672 sample_rate_val = 6;
673 break;
674 case SAMPLING_RATE_44P1KHZ:
675 sample_rate_val = 5;
676 break;
677 case SAMPLING_RATE_32KHZ:
678 sample_rate_val = 4;
679 break;
680 case SAMPLING_RATE_22P05KHZ:
681 sample_rate_val = 3;
682 break;
683 case SAMPLING_RATE_16KHZ:
684 sample_rate_val = 2;
685 break;
686 case SAMPLING_RATE_11P025KHZ:
687 sample_rate_val = 1;
688 break;
689 case SAMPLING_RATE_8KHZ:
690 default:
691 sample_rate_val = 0;
692 break;
693 }
694
695 ucontrol->value.integer.value[0] = sample_rate_val;
696 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
697 usb_rx_cfg.sample_rate);
698 return 0;
699}
700
701static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
702 struct snd_ctl_elem_value *ucontrol)
703{
704 switch (ucontrol->value.integer.value[0]) {
705 case 12:
706 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
707 break;
708 case 11:
709 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
710 break;
711 case 10:
712 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
713 break;
714 case 9:
715 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
716 break;
717 case 8:
718 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
719 break;
720 case 7:
721 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
722 break;
723 case 6:
724 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
725 break;
726 case 5:
727 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
728 break;
729 case 4:
730 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
731 break;
732 case 3:
733 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
734 break;
735 case 2:
736 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
737 break;
738 case 1:
739 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
740 break;
741 case 0:
742 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
743 break;
744 default:
745 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
746 break;
747 }
748
749 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
750 __func__, ucontrol->value.integer.value[0],
751 usb_rx_cfg.sample_rate);
752 return 0;
753}
754
755static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
756 struct snd_ctl_elem_value *ucontrol)
757{
758 int sample_rate_val = 0;
759
760 switch (usb_tx_cfg.sample_rate) {
761 case SAMPLING_RATE_384KHZ:
762 sample_rate_val = 12;
763 break;
764 case SAMPLING_RATE_352P8KHZ:
765 sample_rate_val = 11;
766 break;
767 case SAMPLING_RATE_192KHZ:
768 sample_rate_val = 10;
769 break;
770 case SAMPLING_RATE_176P4KHZ:
771 sample_rate_val = 9;
772 break;
773 case SAMPLING_RATE_96KHZ:
774 sample_rate_val = 8;
775 break;
776 case SAMPLING_RATE_88P2KHZ:
777 sample_rate_val = 7;
778 break;
779 case SAMPLING_RATE_48KHZ:
780 sample_rate_val = 6;
781 break;
782 case SAMPLING_RATE_44P1KHZ:
783 sample_rate_val = 5;
784 break;
785 case SAMPLING_RATE_32KHZ:
786 sample_rate_val = 4;
787 break;
788 case SAMPLING_RATE_22P05KHZ:
789 sample_rate_val = 3;
790 break;
791 case SAMPLING_RATE_16KHZ:
792 sample_rate_val = 2;
793 break;
794 case SAMPLING_RATE_11P025KHZ:
795 sample_rate_val = 1;
796 break;
797 case SAMPLING_RATE_8KHZ:
798 sample_rate_val = 0;
799 break;
800 default:
801 sample_rate_val = 6;
802 break;
803 }
804
805 ucontrol->value.integer.value[0] = sample_rate_val;
806 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
807 usb_tx_cfg.sample_rate);
808 return 0;
809}
810
811static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
812 struct snd_ctl_elem_value *ucontrol)
813{
814 switch (ucontrol->value.integer.value[0]) {
815 case 12:
816 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
817 break;
818 case 11:
819 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
820 break;
821 case 10:
822 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
823 break;
824 case 9:
825 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
826 break;
827 case 8:
828 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
829 break;
830 case 7:
831 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
832 break;
833 case 6:
834 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
835 break;
836 case 5:
837 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
838 break;
839 case 4:
840 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
841 break;
842 case 3:
843 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
844 break;
845 case 2:
846 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
847 break;
848 case 1:
849 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
850 break;
851 case 0:
852 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
853 break;
854 default:
855 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
856 break;
857 }
858
859 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
860 __func__, ucontrol->value.integer.value[0],
861 usb_tx_cfg.sample_rate);
862 return 0;
863}
864static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
865 struct snd_ctl_elem_value *ucontrol)
866{
867 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
868 afe_loopback_tx_cfg[0].channels);
869 ucontrol->value.enumerated.item[0] =
870 afe_loopback_tx_cfg[0].channels - 1;
871
872 return 0;
873}
874
875static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
876 struct snd_ctl_elem_value *ucontrol)
877{
878 afe_loopback_tx_cfg[0].channels =
879 ucontrol->value.enumerated.item[0] + 1;
880 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
881 afe_loopback_tx_cfg[0].channels);
882
883 return 1;
884}
885
886static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
887 struct snd_ctl_elem_value *ucontrol)
888{
889 switch (usb_rx_cfg.bit_format) {
890 case SNDRV_PCM_FORMAT_S32_LE:
891 ucontrol->value.integer.value[0] = 3;
892 break;
893 case SNDRV_PCM_FORMAT_S24_3LE:
894 ucontrol->value.integer.value[0] = 2;
895 break;
896 case SNDRV_PCM_FORMAT_S24_LE:
897 ucontrol->value.integer.value[0] = 1;
898 break;
899 case SNDRV_PCM_FORMAT_S16_LE:
900 default:
901 ucontrol->value.integer.value[0] = 0;
902 break;
903 }
904
905 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
906 __func__, usb_rx_cfg.bit_format,
907 ucontrol->value.integer.value[0]);
908 return 0;
909}
910
911static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
912 struct snd_ctl_elem_value *ucontrol)
913{
914 int rc = 0;
915
916 switch (ucontrol->value.integer.value[0]) {
917 case 3:
918 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
919 break;
920 case 2:
921 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
922 break;
923 case 1:
924 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
925 break;
926 case 0:
927 default:
928 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
929 break;
930 }
931 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
932 __func__, usb_rx_cfg.bit_format,
933 ucontrol->value.integer.value[0]);
934
935 return rc;
936}
937
938static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
939 struct snd_ctl_elem_value *ucontrol)
940{
941 switch (usb_tx_cfg.bit_format) {
942 case SNDRV_PCM_FORMAT_S32_LE:
943 ucontrol->value.integer.value[0] = 3;
944 break;
945 case SNDRV_PCM_FORMAT_S24_3LE:
946 ucontrol->value.integer.value[0] = 2;
947 break;
948 case SNDRV_PCM_FORMAT_S24_LE:
949 ucontrol->value.integer.value[0] = 1;
950 break;
951 case SNDRV_PCM_FORMAT_S16_LE:
952 default:
953 ucontrol->value.integer.value[0] = 0;
954 break;
955 }
956
957 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
958 __func__, usb_tx_cfg.bit_format,
959 ucontrol->value.integer.value[0]);
960 return 0;
961}
962
963static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
964 struct snd_ctl_elem_value *ucontrol)
965{
966 int rc = 0;
967
968 switch (ucontrol->value.integer.value[0]) {
969 case 3:
970 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
971 break;
972 case 2:
973 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
974 break;
975 case 1:
976 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
977 break;
978 case 0:
979 default:
980 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
981 break;
982 }
983 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
984 __func__, usb_tx_cfg.bit_format,
985 ucontrol->value.integer.value[0]);
986
987 return rc;
988}
989
990static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
991 struct snd_ctl_elem_value *ucontrol)
992{
993 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
994 usb_rx_cfg.channels);
995 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
996 return 0;
997}
998
999static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1000 struct snd_ctl_elem_value *ucontrol)
1001{
1002 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1003
1004 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1005 return 1;
1006}
1007
1008static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1009 struct snd_ctl_elem_value *ucontrol)
1010{
1011 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1012 usb_tx_cfg.channels);
1013 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1014 return 0;
1015}
1016
1017static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1018 struct snd_ctl_elem_value *ucontrol)
1019{
1020 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1021
1022 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1023 return 1;
1024}
1025
1026static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1027 struct snd_ctl_elem_value *ucontrol)
1028{
1029 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1030 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1031 ucontrol->value.integer.value[0]);
1032 return 0;
1033}
1034
1035static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1036 struct snd_ctl_elem_value *ucontrol)
1037{
1038 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1039 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1040 return 1;
1041}
1042
1043static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1044 struct snd_ctl_elem_value *ucontrol)
1045{
1046 pr_debug("%s: proxy_rx channels = %d\n",
1047 __func__, proxy_rx_cfg.channels);
1048 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1049
1050 return 0;
1051}
1052
1053static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1054 struct snd_ctl_elem_value *ucontrol)
1055{
1056 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1057 pr_debug("%s: proxy_rx channels = %d\n",
1058 __func__, proxy_rx_cfg.channels);
1059
1060 return 1;
1061}
1062
1063static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1064 struct tdm_port *port)
1065{
1066 if (port) {
1067 if (strnstr(kcontrol->id.name, "PRI",
1068 sizeof(kcontrol->id.name))) {
1069 port->mode = TDM_PRI;
1070 } else if (strnstr(kcontrol->id.name, "SEC",
1071 sizeof(kcontrol->id.name))) {
1072 port->mode = TDM_SEC;
1073 } else if (strnstr(kcontrol->id.name, "TERT",
1074 sizeof(kcontrol->id.name))) {
1075 port->mode = TDM_TERT;
1076 } else if (strnstr(kcontrol->id.name, "QUAT",
1077 sizeof(kcontrol->id.name))) {
1078 port->mode = TDM_QUAT;
1079 } else {
1080 pr_err("%s: unsupported mode in: %s\n",
1081 __func__, kcontrol->id.name);
1082 return -EINVAL;
1083 }
1084
1085 if (strnstr(kcontrol->id.name, "RX_0",
1086 sizeof(kcontrol->id.name)) ||
1087 strnstr(kcontrol->id.name, "TX_0",
1088 sizeof(kcontrol->id.name))) {
1089 port->channel = TDM_0;
1090 } else if (strnstr(kcontrol->id.name, "RX_1",
1091 sizeof(kcontrol->id.name)) ||
1092 strnstr(kcontrol->id.name, "TX_1",
1093 sizeof(kcontrol->id.name))) {
1094 port->channel = TDM_1;
1095 } else if (strnstr(kcontrol->id.name, "RX_2",
1096 sizeof(kcontrol->id.name)) ||
1097 strnstr(kcontrol->id.name, "TX_2",
1098 sizeof(kcontrol->id.name))) {
1099 port->channel = TDM_2;
1100 } else if (strnstr(kcontrol->id.name, "RX_3",
1101 sizeof(kcontrol->id.name)) ||
1102 strnstr(kcontrol->id.name, "TX_3",
1103 sizeof(kcontrol->id.name))) {
1104 port->channel = TDM_3;
1105 } else if (strnstr(kcontrol->id.name, "RX_4",
1106 sizeof(kcontrol->id.name)) ||
1107 strnstr(kcontrol->id.name, "TX_4",
1108 sizeof(kcontrol->id.name))) {
1109 port->channel = TDM_4;
1110 } else if (strnstr(kcontrol->id.name, "RX_5",
1111 sizeof(kcontrol->id.name)) ||
1112 strnstr(kcontrol->id.name, "TX_5",
1113 sizeof(kcontrol->id.name))) {
1114 port->channel = TDM_5;
1115 } else if (strnstr(kcontrol->id.name, "RX_6",
1116 sizeof(kcontrol->id.name)) ||
1117 strnstr(kcontrol->id.name, "TX_6",
1118 sizeof(kcontrol->id.name))) {
1119 port->channel = TDM_6;
1120 } else if (strnstr(kcontrol->id.name, "RX_7",
1121 sizeof(kcontrol->id.name)) ||
1122 strnstr(kcontrol->id.name, "TX_7",
1123 sizeof(kcontrol->id.name))) {
1124 port->channel = TDM_7;
1125 } else {
1126 pr_err("%s: unsupported channel in: %s\n",
1127 __func__, kcontrol->id.name);
1128 return -EINVAL;
1129 }
1130 } else {
1131 return -EINVAL;
1132 }
1133 return 0;
1134}
1135
1136static int tdm_get_sample_rate(int value)
1137{
1138 int sample_rate = 0;
1139
1140 switch (value) {
1141 case 0:
1142 sample_rate = SAMPLING_RATE_8KHZ;
1143 break;
1144 case 1:
1145 sample_rate = SAMPLING_RATE_16KHZ;
1146 break;
1147 case 2:
1148 sample_rate = SAMPLING_RATE_32KHZ;
1149 break;
1150 case 3:
1151 sample_rate = SAMPLING_RATE_48KHZ;
1152 break;
1153 case 4:
1154 sample_rate = SAMPLING_RATE_176P4KHZ;
1155 break;
1156 case 5:
1157 sample_rate = SAMPLING_RATE_352P8KHZ;
1158 break;
1159 default:
1160 sample_rate = SAMPLING_RATE_48KHZ;
1161 break;
1162 }
1163 return sample_rate;
1164}
1165
1166static int tdm_get_sample_rate_val(int sample_rate)
1167{
1168 int sample_rate_val = 0;
1169
1170 switch (sample_rate) {
1171 case SAMPLING_RATE_8KHZ:
1172 sample_rate_val = 0;
1173 break;
1174 case SAMPLING_RATE_16KHZ:
1175 sample_rate_val = 1;
1176 break;
1177 case SAMPLING_RATE_32KHZ:
1178 sample_rate_val = 2;
1179 break;
1180 case SAMPLING_RATE_48KHZ:
1181 sample_rate_val = 3;
1182 break;
1183 case SAMPLING_RATE_176P4KHZ:
1184 sample_rate_val = 4;
1185 break;
1186 case SAMPLING_RATE_352P8KHZ:
1187 sample_rate_val = 5;
1188 break;
1189 default:
1190 sample_rate_val = 3;
1191 break;
1192 }
1193 return sample_rate_val;
1194}
1195
1196static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1197 struct snd_ctl_elem_value *ucontrol)
1198{
1199 struct tdm_port port;
1200 int ret = tdm_get_port_idx(kcontrol, &port);
1201
1202 if (ret) {
1203 pr_err("%s: unsupported control: %s\n",
1204 __func__, kcontrol->id.name);
1205 } else {
1206 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1207 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1208
1209 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1210 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1211 ucontrol->value.enumerated.item[0]);
1212 }
1213 return ret;
1214}
1215
1216static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1217 struct snd_ctl_elem_value *ucontrol)
1218{
1219 struct tdm_port port;
1220 int ret = tdm_get_port_idx(kcontrol, &port);
1221
1222 if (ret) {
1223 pr_err("%s: unsupported control: %s\n",
1224 __func__, kcontrol->id.name);
1225 } else {
1226 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1227 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1228
1229 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1230 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1231 ucontrol->value.enumerated.item[0]);
1232 }
1233 return ret;
1234}
1235
1236static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1237 struct snd_ctl_elem_value *ucontrol)
1238{
1239 struct tdm_port port;
1240 int ret = tdm_get_port_idx(kcontrol, &port);
1241
1242 if (ret) {
1243 pr_err("%s: unsupported control: %s\n",
1244 __func__, kcontrol->id.name);
1245 } else {
1246 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1247 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1248
1249 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1250 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1251 ucontrol->value.enumerated.item[0]);
1252 }
1253 return ret;
1254}
1255
1256static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1257 struct snd_ctl_elem_value *ucontrol)
1258{
1259 struct tdm_port port;
1260 int ret = tdm_get_port_idx(kcontrol, &port);
1261
1262 if (ret) {
1263 pr_err("%s: unsupported control: %s\n",
1264 __func__, kcontrol->id.name);
1265 } else {
1266 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1267 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1268
1269 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1270 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1271 ucontrol->value.enumerated.item[0]);
1272 }
1273 return ret;
1274}
1275
1276static int tdm_get_format(int value)
1277{
1278 int format = 0;
1279
1280 switch (value) {
1281 case 0:
1282 format = SNDRV_PCM_FORMAT_S16_LE;
1283 break;
1284 case 1:
1285 format = SNDRV_PCM_FORMAT_S24_LE;
1286 break;
1287 case 2:
1288 format = SNDRV_PCM_FORMAT_S32_LE;
1289 break;
1290 default:
1291 format = SNDRV_PCM_FORMAT_S16_LE;
1292 break;
1293 }
1294 return format;
1295}
1296
1297static int tdm_get_format_val(int format)
1298{
1299 int value = 0;
1300
1301 switch (format) {
1302 case SNDRV_PCM_FORMAT_S16_LE:
1303 value = 0;
1304 break;
1305 case SNDRV_PCM_FORMAT_S24_LE:
1306 value = 1;
1307 break;
1308 case SNDRV_PCM_FORMAT_S32_LE:
1309 value = 2;
1310 break;
1311 default:
1312 value = 0;
1313 break;
1314 }
1315 return value;
1316}
1317
1318static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1319 struct snd_ctl_elem_value *ucontrol)
1320{
1321 struct tdm_port port;
1322 int ret = tdm_get_port_idx(kcontrol, &port);
1323
1324 if (ret) {
1325 pr_err("%s: unsupported control: %s\n",
1326 __func__, kcontrol->id.name);
1327 } else {
1328 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1329 tdm_rx_cfg[port.mode][port.channel].bit_format);
1330
1331 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1332 tdm_rx_cfg[port.mode][port.channel].bit_format,
1333 ucontrol->value.enumerated.item[0]);
1334 }
1335 return ret;
1336}
1337
1338static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1339 struct snd_ctl_elem_value *ucontrol)
1340{
1341 struct tdm_port port;
1342 int ret = tdm_get_port_idx(kcontrol, &port);
1343
1344 if (ret) {
1345 pr_err("%s: unsupported control: %s\n",
1346 __func__, kcontrol->id.name);
1347 } else {
1348 tdm_rx_cfg[port.mode][port.channel].bit_format =
1349 tdm_get_format(ucontrol->value.enumerated.item[0]);
1350
1351 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1352 tdm_rx_cfg[port.mode][port.channel].bit_format,
1353 ucontrol->value.enumerated.item[0]);
1354 }
1355 return ret;
1356}
1357
1358static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1359 struct snd_ctl_elem_value *ucontrol)
1360{
1361 struct tdm_port port;
1362 int ret = tdm_get_port_idx(kcontrol, &port);
1363
1364 if (ret) {
1365 pr_err("%s: unsupported control: %s\n",
1366 __func__, kcontrol->id.name);
1367 } else {
1368 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1369 tdm_tx_cfg[port.mode][port.channel].bit_format);
1370
1371 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1372 tdm_tx_cfg[port.mode][port.channel].bit_format,
1373 ucontrol->value.enumerated.item[0]);
1374 }
1375 return ret;
1376}
1377
1378static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1379 struct snd_ctl_elem_value *ucontrol)
1380{
1381 struct tdm_port port;
1382 int ret = tdm_get_port_idx(kcontrol, &port);
1383
1384 if (ret) {
1385 pr_err("%s: unsupported control: %s\n",
1386 __func__, kcontrol->id.name);
1387 } else {
1388 tdm_tx_cfg[port.mode][port.channel].bit_format =
1389 tdm_get_format(ucontrol->value.enumerated.item[0]);
1390
1391 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1392 tdm_tx_cfg[port.mode][port.channel].bit_format,
1393 ucontrol->value.enumerated.item[0]);
1394 }
1395 return ret;
1396}
1397
1398static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1399 struct snd_ctl_elem_value *ucontrol)
1400{
1401 struct tdm_port port;
1402 int ret = tdm_get_port_idx(kcontrol, &port);
1403
1404 if (ret) {
1405 pr_err("%s: unsupported control: %s\n",
1406 __func__, kcontrol->id.name);
1407 } else {
1408
1409 ucontrol->value.enumerated.item[0] =
1410 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1411
1412 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1413 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1414 ucontrol->value.enumerated.item[0]);
1415 }
1416 return ret;
1417}
1418
1419static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1420 struct snd_ctl_elem_value *ucontrol)
1421{
1422 struct tdm_port port;
1423 int ret = tdm_get_port_idx(kcontrol, &port);
1424
1425 if (ret) {
1426 pr_err("%s: unsupported control: %s\n",
1427 __func__, kcontrol->id.name);
1428 } else {
1429 tdm_rx_cfg[port.mode][port.channel].channels =
1430 ucontrol->value.enumerated.item[0] + 1;
1431
1432 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1433 tdm_rx_cfg[port.mode][port.channel].channels,
1434 ucontrol->value.enumerated.item[0] + 1);
1435 }
1436 return ret;
1437}
1438
1439static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1440 struct snd_ctl_elem_value *ucontrol)
1441{
1442 struct tdm_port port;
1443 int ret = tdm_get_port_idx(kcontrol, &port);
1444
1445 if (ret) {
1446 pr_err("%s: unsupported control: %s\n",
1447 __func__, kcontrol->id.name);
1448 } else {
1449 ucontrol->value.enumerated.item[0] =
1450 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1451
1452 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1453 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1454 ucontrol->value.enumerated.item[0]);
1455 }
1456 return ret;
1457}
1458
1459static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1460 struct snd_ctl_elem_value *ucontrol)
1461{
1462 struct tdm_port port;
1463 int ret = tdm_get_port_idx(kcontrol, &port);
1464
1465 if (ret) {
1466 pr_err("%s: unsupported control: %s\n",
1467 __func__, kcontrol->id.name);
1468 } else {
1469 tdm_tx_cfg[port.mode][port.channel].channels =
1470 ucontrol->value.enumerated.item[0] + 1;
1471
1472 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1473 tdm_tx_cfg[port.mode][port.channel].channels,
1474 ucontrol->value.enumerated.item[0] + 1);
1475 }
1476 return ret;
1477}
1478
1479static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
1480{
1481 int idx = 0;
1482
1483 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
1484 sizeof("PRIM_AUX_PCM"))) {
1485 idx = PRIM_AUX_PCM;
1486 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
1487 sizeof("SEC_AUX_PCM"))) {
1488 idx = SEC_AUX_PCM;
1489 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
1490 sizeof("TERT_AUX_PCM"))) {
1491 idx = TERT_AUX_PCM;
1492 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
1493 sizeof("QUAT_AUX_PCM"))) {
1494 idx = QUAT_AUX_PCM;
1495 } else {
1496 pr_err("%s: unsupported port: %s\n",
1497 __func__, kcontrol->id.name);
1498 idx = -EINVAL;
1499 }
1500
1501 return idx;
1502}
1503
1504static int aux_pcm_get_sample_rate(int value)
1505{
1506 int sample_rate = 0;
1507
1508 switch (value) {
1509 case 1:
1510 sample_rate = SAMPLING_RATE_16KHZ;
1511 break;
1512 case 0:
1513 default:
1514 sample_rate = SAMPLING_RATE_8KHZ;
1515 break;
1516 }
1517 return sample_rate;
1518}
1519
1520static int aux_pcm_get_sample_rate_val(int sample_rate)
1521{
1522 int sample_rate_val = 0;
1523
1524 switch (sample_rate) {
1525 case SAMPLING_RATE_16KHZ:
1526 sample_rate_val = 1;
1527 break;
1528 case SAMPLING_RATE_8KHZ:
1529 default:
1530 sample_rate_val = 0;
1531 break;
1532 }
1533 return sample_rate_val;
1534}
1535
1536static int mi2s_auxpcm_get_format(int value)
1537{
1538 int format = 0;
1539
1540 switch (value) {
1541 case 0:
1542 format = SNDRV_PCM_FORMAT_S16_LE;
1543 break;
1544 case 1:
1545 format = SNDRV_PCM_FORMAT_S24_LE;
1546 break;
1547 case 2:
1548 format = SNDRV_PCM_FORMAT_S24_3LE;
1549 break;
1550 case 3:
1551 format = SNDRV_PCM_FORMAT_S32_LE;
1552 break;
1553 default:
1554 format = SNDRV_PCM_FORMAT_S16_LE;
1555 break;
1556 }
1557 return format;
1558}
1559
1560static int mi2s_auxpcm_get_format_value(int format)
1561{
1562 int value = 0;
1563
1564 switch (format) {
1565 case SNDRV_PCM_FORMAT_S16_LE:
1566 value = 0;
1567 break;
1568 case SNDRV_PCM_FORMAT_S24_LE:
1569 value = 1;
1570 break;
1571 case SNDRV_PCM_FORMAT_S24_3LE:
1572 value = 2;
1573 break;
1574 case SNDRV_PCM_FORMAT_S32_LE:
1575 value = 3;
1576 break;
1577 default:
1578 value = 0;
1579 break;
1580 }
1581 return value;
1582}
1583
1584static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1585 struct snd_ctl_elem_value *ucontrol)
1586{
1587 int idx = aux_pcm_get_port_idx(kcontrol);
1588
1589 if (idx < 0)
1590 return idx;
1591
1592 ucontrol->value.enumerated.item[0] =
1593 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
1594
1595 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1596 idx, aux_pcm_rx_cfg[idx].sample_rate,
1597 ucontrol->value.enumerated.item[0]);
1598
1599 return 0;
1600}
1601
1602static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1603 struct snd_ctl_elem_value *ucontrol)
1604{
1605 int idx = aux_pcm_get_port_idx(kcontrol);
1606
1607 if (idx < 0)
1608 return idx;
1609
1610 aux_pcm_rx_cfg[idx].sample_rate =
1611 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1612
1613 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1614 idx, aux_pcm_rx_cfg[idx].sample_rate,
1615 ucontrol->value.enumerated.item[0]);
1616
1617 return 0;
1618}
1619
1620static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1621 struct snd_ctl_elem_value *ucontrol)
1622{
1623 int idx = aux_pcm_get_port_idx(kcontrol);
1624
1625 if (idx < 0)
1626 return idx;
1627
1628 ucontrol->value.enumerated.item[0] =
1629 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
1630
1631 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1632 idx, aux_pcm_tx_cfg[idx].sample_rate,
1633 ucontrol->value.enumerated.item[0]);
1634
1635 return 0;
1636}
1637
1638static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1639 struct snd_ctl_elem_value *ucontrol)
1640{
1641 int idx = aux_pcm_get_port_idx(kcontrol);
1642
1643 if (idx < 0)
1644 return idx;
1645
1646 aux_pcm_tx_cfg[idx].sample_rate =
1647 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1648
1649 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1650 idx, aux_pcm_tx_cfg[idx].sample_rate,
1651 ucontrol->value.enumerated.item[0]);
1652
1653 return 0;
1654}
1655
1656static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
1657 struct snd_ctl_elem_value *ucontrol)
1658{
1659 int idx = aux_pcm_get_port_idx(kcontrol);
1660
1661 if (idx < 0)
1662 return idx;
1663
1664 ucontrol->value.enumerated.item[0] =
1665 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
1666
1667 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1668 idx, aux_pcm_rx_cfg[idx].bit_format,
1669 ucontrol->value.enumerated.item[0]);
1670
1671 return 0;
1672}
1673
1674static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
1675 struct snd_ctl_elem_value *ucontrol)
1676{
1677 int idx = aux_pcm_get_port_idx(kcontrol);
1678
1679 if (idx < 0)
1680 return idx;
1681
1682 aux_pcm_rx_cfg[idx].bit_format =
1683 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1684
1685 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1686 idx, aux_pcm_rx_cfg[idx].bit_format,
1687 ucontrol->value.enumerated.item[0]);
1688
1689 return 0;
1690}
1691
1692static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
1693 struct snd_ctl_elem_value *ucontrol)
1694{
1695 int idx = aux_pcm_get_port_idx(kcontrol);
1696
1697 if (idx < 0)
1698 return idx;
1699
1700 ucontrol->value.enumerated.item[0] =
1701 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
1702
1703 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1704 idx, aux_pcm_tx_cfg[idx].bit_format,
1705 ucontrol->value.enumerated.item[0]);
1706
1707 return 0;
1708}
1709
1710static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
1711 struct snd_ctl_elem_value *ucontrol)
1712{
1713 int idx = aux_pcm_get_port_idx(kcontrol);
1714
1715 if (idx < 0)
1716 return idx;
1717
1718 aux_pcm_tx_cfg[idx].bit_format =
1719 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1720
1721 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1722 idx, aux_pcm_tx_cfg[idx].bit_format,
1723 ucontrol->value.enumerated.item[0]);
1724
1725 return 0;
1726}
1727
1728static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
1729{
1730 int idx = 0;
1731
1732 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
1733 sizeof("PRIM_MI2S_RX"))) {
1734 idx = PRIM_MI2S;
1735 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
1736 sizeof("SEC_MI2S_RX"))) {
1737 idx = SEC_MI2S;
1738 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
1739 sizeof("TERT_MI2S_RX"))) {
1740 idx = TERT_MI2S;
1741 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
1742 sizeof("QUAT_MI2S_RX"))) {
1743 idx = QUAT_MI2S;
1744 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
1745 sizeof("PRIM_MI2S_TX"))) {
1746 idx = PRIM_MI2S;
1747 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
1748 sizeof("SEC_MI2S_TX"))) {
1749 idx = SEC_MI2S;
1750 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
1751 sizeof("TERT_MI2S_TX"))) {
1752 idx = TERT_MI2S;
1753 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
1754 sizeof("QUAT_MI2S_TX"))) {
1755 idx = QUAT_MI2S;
1756 } else {
1757 pr_err("%s: unsupported channel: %s\n",
1758 __func__, kcontrol->id.name);
1759 idx = -EINVAL;
1760 }
1761
1762 return idx;
1763}
1764
1765static int mi2s_get_sample_rate(int value)
1766{
1767 int sample_rate = 0;
1768
1769 switch (value) {
1770 case 0:
1771 sample_rate = SAMPLING_RATE_8KHZ;
1772 break;
1773 case 1:
1774 sample_rate = SAMPLING_RATE_11P025KHZ;
1775 break;
1776 case 2:
1777 sample_rate = SAMPLING_RATE_16KHZ;
1778 break;
1779 case 3:
1780 sample_rate = SAMPLING_RATE_22P05KHZ;
1781 break;
1782 case 4:
1783 sample_rate = SAMPLING_RATE_32KHZ;
1784 break;
1785 case 5:
1786 sample_rate = SAMPLING_RATE_44P1KHZ;
1787 break;
1788 case 6:
1789 sample_rate = SAMPLING_RATE_48KHZ;
1790 break;
1791 case 7:
1792 sample_rate = SAMPLING_RATE_96KHZ;
1793 break;
1794 case 8:
1795 sample_rate = SAMPLING_RATE_192KHZ;
1796 break;
1797 default:
1798 sample_rate = SAMPLING_RATE_48KHZ;
1799 break;
1800 }
1801 return sample_rate;
1802}
1803
1804static int mi2s_get_sample_rate_val(int sample_rate)
1805{
1806 int sample_rate_val = 0;
1807
1808 switch (sample_rate) {
1809 case SAMPLING_RATE_8KHZ:
1810 sample_rate_val = 0;
1811 break;
1812 case SAMPLING_RATE_11P025KHZ:
1813 sample_rate_val = 1;
1814 break;
1815 case SAMPLING_RATE_16KHZ:
1816 sample_rate_val = 2;
1817 break;
1818 case SAMPLING_RATE_22P05KHZ:
1819 sample_rate_val = 3;
1820 break;
1821 case SAMPLING_RATE_32KHZ:
1822 sample_rate_val = 4;
1823 break;
1824 case SAMPLING_RATE_44P1KHZ:
1825 sample_rate_val = 5;
1826 break;
1827 case SAMPLING_RATE_48KHZ:
1828 sample_rate_val = 6;
1829 break;
1830 case SAMPLING_RATE_96KHZ:
1831 sample_rate_val = 7;
1832 break;
1833 case SAMPLING_RATE_192KHZ:
1834 sample_rate_val = 8;
1835 break;
1836 default:
1837 sample_rate_val = 6;
1838 break;
1839 }
1840 return sample_rate_val;
1841}
1842
1843static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1844 struct snd_ctl_elem_value *ucontrol)
1845{
1846 int idx = mi2s_get_port_idx(kcontrol);
1847
1848 if (idx < 0)
1849 return idx;
1850
1851 ucontrol->value.enumerated.item[0] =
1852 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
1853
1854 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1855 idx, mi2s_rx_cfg[idx].sample_rate,
1856 ucontrol->value.enumerated.item[0]);
1857
1858 return 0;
1859}
1860
1861static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1862 struct snd_ctl_elem_value *ucontrol)
1863{
1864 int idx = mi2s_get_port_idx(kcontrol);
1865
1866 if (idx < 0)
1867 return idx;
1868
1869 mi2s_rx_cfg[idx].sample_rate =
1870 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1871
1872 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1873 idx, mi2s_rx_cfg[idx].sample_rate,
1874 ucontrol->value.enumerated.item[0]);
1875
1876 return 0;
1877}
1878
1879static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1880 struct snd_ctl_elem_value *ucontrol)
1881{
1882 int idx = mi2s_get_port_idx(kcontrol);
1883
1884 if (idx < 0)
1885 return idx;
1886
1887 ucontrol->value.enumerated.item[0] =
1888 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
1889
1890 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1891 idx, mi2s_tx_cfg[idx].sample_rate,
1892 ucontrol->value.enumerated.item[0]);
1893
1894 return 0;
1895}
1896
1897static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1898 struct snd_ctl_elem_value *ucontrol)
1899{
1900 int idx = mi2s_get_port_idx(kcontrol);
1901
1902 if (idx < 0)
1903 return idx;
1904
1905 mi2s_tx_cfg[idx].sample_rate =
1906 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1907
1908 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1909 idx, mi2s_tx_cfg[idx].sample_rate,
1910 ucontrol->value.enumerated.item[0]);
1911
1912 return 0;
1913}
1914
1915static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
1916 struct snd_ctl_elem_value *ucontrol)
1917{
1918 int idx = mi2s_get_port_idx(kcontrol);
1919
1920 if (idx < 0)
1921 return idx;
1922
1923 ucontrol->value.enumerated.item[0] =
1924 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
1925
1926 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1927 idx, mi2s_rx_cfg[idx].bit_format,
1928 ucontrol->value.enumerated.item[0]);
1929
1930 return 0;
1931}
1932
1933static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
1934 struct snd_ctl_elem_value *ucontrol)
1935{
1936 int idx = mi2s_get_port_idx(kcontrol);
1937
1938 if (idx < 0)
1939 return idx;
1940
1941 mi2s_rx_cfg[idx].bit_format =
1942 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1943
1944 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1945 idx, mi2s_rx_cfg[idx].bit_format,
1946 ucontrol->value.enumerated.item[0]);
1947
1948 return 0;
1949}
1950
1951static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
1952 struct snd_ctl_elem_value *ucontrol)
1953{
1954 int idx = mi2s_get_port_idx(kcontrol);
1955
1956 if (idx < 0)
1957 return idx;
1958
1959 ucontrol->value.enumerated.item[0] =
1960 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
1961
1962 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1963 idx, mi2s_tx_cfg[idx].bit_format,
1964 ucontrol->value.enumerated.item[0]);
1965
1966 return 0;
1967}
1968
1969static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
1970 struct snd_ctl_elem_value *ucontrol)
1971{
1972 int idx = mi2s_get_port_idx(kcontrol);
1973
1974 if (idx < 0)
1975 return idx;
1976
1977 mi2s_tx_cfg[idx].bit_format =
1978 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1979
1980 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1981 idx, mi2s_tx_cfg[idx].bit_format,
1982 ucontrol->value.enumerated.item[0]);
1983
1984 return 0;
1985}
1986static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
1987 struct snd_ctl_elem_value *ucontrol)
1988{
1989 int idx = mi2s_get_port_idx(kcontrol);
1990
1991 if (idx < 0)
1992 return idx;
1993
1994 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1995 idx, mi2s_rx_cfg[idx].channels);
1996 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
1997
1998 return 0;
1999}
2000
2001static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
2002 struct snd_ctl_elem_value *ucontrol)
2003{
2004 int idx = mi2s_get_port_idx(kcontrol);
2005
2006 if (idx < 0)
2007 return idx;
2008
2009 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2010 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2011 idx, mi2s_rx_cfg[idx].channels);
2012
2013 return 1;
2014}
2015
2016static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
2017 struct snd_ctl_elem_value *ucontrol)
2018{
2019 int idx = mi2s_get_port_idx(kcontrol);
2020
2021 if (idx < 0)
2022 return idx;
2023
2024 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2025 idx, mi2s_tx_cfg[idx].channels);
2026 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
2027
2028 return 0;
2029}
2030
2031static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2032 struct snd_ctl_elem_value *ucontrol)
2033{
2034 int idx = mi2s_get_port_idx(kcontrol);
2035
2036 if (idx < 0)
2037 return idx;
2038
2039 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2040 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2041 idx, mi2s_tx_cfg[idx].channels);
2042
2043 return 1;
2044}
2045
2046static int msm_get_port_id(int be_id)
2047{
2048 int afe_port_id = 0;
2049
2050 switch (be_id) {
2051 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2052 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2053 break;
2054 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2055 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2056 break;
2057 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2058 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2059 break;
2060 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2061 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2062 break;
2063 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2064 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2065 break;
2066 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2067 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2068 break;
2069 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2070 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2071 break;
2072 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2073 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2074 break;
2075 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2076 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2077 break;
2078 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2079 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2080 break;
2081 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2082 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2083 break;
2084 default:
2085 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2086 afe_port_id = -EINVAL;
2087 }
2088
2089 return afe_port_id;
2090}
2091
2092static u32 get_mi2s_bits_per_sample(u32 bit_format)
2093{
2094 u32 bit_per_sample = 0;
2095
2096 switch (bit_format) {
2097 case SNDRV_PCM_FORMAT_S32_LE:
2098 case SNDRV_PCM_FORMAT_S24_3LE:
2099 case SNDRV_PCM_FORMAT_S24_LE:
2100 bit_per_sample = 32;
2101 break;
2102 case SNDRV_PCM_FORMAT_S16_LE:
2103 default:
2104 bit_per_sample = 16;
2105 break;
2106 }
2107
2108 return bit_per_sample;
2109}
2110
2111static void update_mi2s_clk_val(int dai_id, int stream)
2112{
2113 u32 bit_per_sample = 0;
2114
2115 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2116 bit_per_sample =
2117 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2118 mi2s_clk[dai_id].clk_freq_in_hz =
2119 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2120 } else {
2121 bit_per_sample =
2122 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2123 mi2s_clk[dai_id].clk_freq_in_hz =
2124 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2125 }
2126}
2127
2128static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2129{
2130 int ret = 0;
2131 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2132 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2133 int port_id = 0;
2134 int index = cpu_dai->id;
2135
2136 port_id = msm_get_port_id(rtd->dai_link->id);
2137 if (port_id < 0) {
2138 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2139 ret = port_id;
2140 goto err;
2141 }
2142
2143 if (enable) {
2144 update_mi2s_clk_val(index, substream->stream);
2145 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2146 mi2s_clk[index].clk_freq_in_hz);
2147 }
2148
2149 mi2s_clk[index].enable = enable;
2150 ret = afe_set_lpass_clock_v2(port_id,
2151 &mi2s_clk[index]);
2152 if (ret < 0) {
2153 dev_err(rtd->card->dev,
2154 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2155 __func__, port_id, ret);
2156 goto err;
2157 }
2158
2159err:
2160 return ret;
2161}
2162
2163static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2164{
2165 int idx = 0;
2166
2167 if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2168 sizeof("RX_CDC_DMA_RX_0")))
2169 idx = RX_CDC_DMA_RX_0;
2170 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2171 sizeof("RX_CDC_DMA_RX_1")))
2172 idx = RX_CDC_DMA_RX_1;
2173 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2174 sizeof("RX_CDC_DMA_RX_2")))
2175 idx = RX_CDC_DMA_RX_2;
2176 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2177 sizeof("RX_CDC_DMA_RX_3")))
2178 idx = RX_CDC_DMA_RX_3;
2179 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2180 sizeof("RX_CDC_DMA_RX_5")))
2181 idx = RX_CDC_DMA_RX_5;
2182 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2183 sizeof("TX_CDC_DMA_TX_0")))
2184 idx = TX_CDC_DMA_TX_0;
2185 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2186 sizeof("TX_CDC_DMA_TX_3")))
2187 idx = TX_CDC_DMA_TX_3;
2188 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2189 sizeof("TX_CDC_DMA_TX_4")))
2190 idx = TX_CDC_DMA_TX_4;
2191 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2192 sizeof("VA_CDC_DMA_TX_0")))
2193 idx = VA_CDC_DMA_TX_0;
2194 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2195 sizeof("VA_CDC_DMA_TX_1")))
2196 idx = VA_CDC_DMA_TX_1;
2197 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2198 sizeof("VA_CDC_DMA_TX_2")))
2199 idx = VA_CDC_DMA_TX_2;
2200 else {
2201 pr_err("%s: unsupported channel: %s\n",
2202 __func__, kcontrol->id.name);
2203 return -EINVAL;
2204 }
2205
2206 return idx;
2207}
2208
2209static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2210 struct snd_ctl_elem_value *ucontrol)
2211{
2212 int ch_num = cdc_dma_get_port_idx(kcontrol);
2213
2214 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2215 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2216 return ch_num;
2217 }
2218
2219 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2220 cdc_dma_rx_cfg[ch_num].channels - 1);
2221 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2222 return 0;
2223}
2224
2225static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2226 struct snd_ctl_elem_value *ucontrol)
2227{
2228 int ch_num = cdc_dma_get_port_idx(kcontrol);
2229
2230 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2231 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2232 return ch_num;
2233 }
2234
2235 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2236
2237 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2238 cdc_dma_rx_cfg[ch_num].channels);
2239 return 1;
2240}
2241
2242static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2243 struct snd_ctl_elem_value *ucontrol)
2244{
2245 int ch_num = cdc_dma_get_port_idx(kcontrol);
2246
2247 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2248 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2249 return ch_num;
2250 }
2251
2252 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2253 case SNDRV_PCM_FORMAT_S32_LE:
2254 ucontrol->value.integer.value[0] = 3;
2255 break;
2256 case SNDRV_PCM_FORMAT_S24_3LE:
2257 ucontrol->value.integer.value[0] = 2;
2258 break;
2259 case SNDRV_PCM_FORMAT_S24_LE:
2260 ucontrol->value.integer.value[0] = 1;
2261 break;
2262 case SNDRV_PCM_FORMAT_S16_LE:
2263 default:
2264 ucontrol->value.integer.value[0] = 0;
2265 break;
2266 }
2267
2268 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2269 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2270 ucontrol->value.integer.value[0]);
2271 return 0;
2272}
2273
2274static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2275 struct snd_ctl_elem_value *ucontrol)
2276{
2277 int rc = 0;
2278 int ch_num = cdc_dma_get_port_idx(kcontrol);
2279
2280 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2281 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2282 return ch_num;
2283 }
2284
2285 switch (ucontrol->value.integer.value[0]) {
2286 case 3:
2287 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2288 break;
2289 case 2:
2290 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2291 break;
2292 case 1:
2293 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2294 break;
2295 case 0:
2296 default:
2297 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2298 break;
2299 }
2300 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2301 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2302 ucontrol->value.integer.value[0]);
2303
2304 return rc;
2305}
2306
2307
2308static int cdc_dma_get_sample_rate_val(int sample_rate)
2309{
2310 int sample_rate_val = 0;
2311
2312 switch (sample_rate) {
2313 case SAMPLING_RATE_8KHZ:
2314 sample_rate_val = 0;
2315 break;
2316 case SAMPLING_RATE_11P025KHZ:
2317 sample_rate_val = 1;
2318 break;
2319 case SAMPLING_RATE_16KHZ:
2320 sample_rate_val = 2;
2321 break;
2322 case SAMPLING_RATE_22P05KHZ:
2323 sample_rate_val = 3;
2324 break;
2325 case SAMPLING_RATE_32KHZ:
2326 sample_rate_val = 4;
2327 break;
2328 case SAMPLING_RATE_44P1KHZ:
2329 sample_rate_val = 5;
2330 break;
2331 case SAMPLING_RATE_48KHZ:
2332 sample_rate_val = 6;
2333 break;
2334 case SAMPLING_RATE_88P2KHZ:
2335 sample_rate_val = 7;
2336 break;
2337 case SAMPLING_RATE_96KHZ:
2338 sample_rate_val = 8;
2339 break;
2340 case SAMPLING_RATE_176P4KHZ:
2341 sample_rate_val = 9;
2342 break;
2343 case SAMPLING_RATE_192KHZ:
2344 sample_rate_val = 10;
2345 break;
2346 case SAMPLING_RATE_352P8KHZ:
2347 sample_rate_val = 11;
2348 break;
2349 case SAMPLING_RATE_384KHZ:
2350 sample_rate_val = 12;
2351 break;
2352 default:
2353 sample_rate_val = 6;
2354 break;
2355 }
2356 return sample_rate_val;
2357}
2358
2359static int cdc_dma_get_sample_rate(int value)
2360{
2361 int sample_rate = 0;
2362
2363 switch (value) {
2364 case 0:
2365 sample_rate = SAMPLING_RATE_8KHZ;
2366 break;
2367 case 1:
2368 sample_rate = SAMPLING_RATE_11P025KHZ;
2369 break;
2370 case 2:
2371 sample_rate = SAMPLING_RATE_16KHZ;
2372 break;
2373 case 3:
2374 sample_rate = SAMPLING_RATE_22P05KHZ;
2375 break;
2376 case 4:
2377 sample_rate = SAMPLING_RATE_32KHZ;
2378 break;
2379 case 5:
2380 sample_rate = SAMPLING_RATE_44P1KHZ;
2381 break;
2382 case 6:
2383 sample_rate = SAMPLING_RATE_48KHZ;
2384 break;
2385 case 7:
2386 sample_rate = SAMPLING_RATE_88P2KHZ;
2387 break;
2388 case 8:
2389 sample_rate = SAMPLING_RATE_96KHZ;
2390 break;
2391 case 9:
2392 sample_rate = SAMPLING_RATE_176P4KHZ;
2393 break;
2394 case 10:
2395 sample_rate = SAMPLING_RATE_192KHZ;
2396 break;
2397 case 11:
2398 sample_rate = SAMPLING_RATE_352P8KHZ;
2399 break;
2400 case 12:
2401 sample_rate = SAMPLING_RATE_384KHZ;
2402 break;
2403 default:
2404 sample_rate = SAMPLING_RATE_48KHZ;
2405 break;
2406 }
2407 return sample_rate;
2408}
2409
2410static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2411 struct snd_ctl_elem_value *ucontrol)
2412{
2413 int ch_num = cdc_dma_get_port_idx(kcontrol);
2414
2415 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2416 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2417 return ch_num;
2418 }
2419
2420 ucontrol->value.enumerated.item[0] =
2421 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
2422
2423 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
2424 cdc_dma_rx_cfg[ch_num].sample_rate);
2425 return 0;
2426}
2427
2428static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2429 struct snd_ctl_elem_value *ucontrol)
2430{
2431 int ch_num = cdc_dma_get_port_idx(kcontrol);
2432
2433 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2434 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2435 return ch_num;
2436 }
2437
2438 cdc_dma_rx_cfg[ch_num].sample_rate =
2439 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
2440
2441
2442 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
2443 __func__, ucontrol->value.enumerated.item[0],
2444 cdc_dma_rx_cfg[ch_num].sample_rate);
2445 return 0;
2446}
2447
2448static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
2449 struct snd_ctl_elem_value *ucontrol)
2450{
2451 int ch_num = cdc_dma_get_port_idx(kcontrol);
2452
2453 if (ch_num < 0) {
2454 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2455 return ch_num;
2456 }
2457
2458 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2459 cdc_dma_tx_cfg[ch_num].channels);
2460 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
2461 return 0;
2462}
2463
2464static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
2465 struct snd_ctl_elem_value *ucontrol)
2466{
2467 int ch_num = cdc_dma_get_port_idx(kcontrol);
2468
2469 if (ch_num < 0) {
2470 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2471 return ch_num;
2472 }
2473
2474 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2475
2476 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2477 cdc_dma_tx_cfg[ch_num].channels);
2478 return 1;
2479}
2480
2481static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2482 struct snd_ctl_elem_value *ucontrol)
2483{
2484 int sample_rate_val;
2485 int ch_num = cdc_dma_get_port_idx(kcontrol);
2486
2487 if (ch_num < 0) {
2488 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2489 return ch_num;
2490 }
2491
2492 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
2493 case SAMPLING_RATE_384KHZ:
2494 sample_rate_val = 12;
2495 break;
2496 case SAMPLING_RATE_352P8KHZ:
2497 sample_rate_val = 11;
2498 break;
2499 case SAMPLING_RATE_192KHZ:
2500 sample_rate_val = 10;
2501 break;
2502 case SAMPLING_RATE_176P4KHZ:
2503 sample_rate_val = 9;
2504 break;
2505 case SAMPLING_RATE_96KHZ:
2506 sample_rate_val = 8;
2507 break;
2508 case SAMPLING_RATE_88P2KHZ:
2509 sample_rate_val = 7;
2510 break;
2511 case SAMPLING_RATE_48KHZ:
2512 sample_rate_val = 6;
2513 break;
2514 case SAMPLING_RATE_44P1KHZ:
2515 sample_rate_val = 5;
2516 break;
2517 case SAMPLING_RATE_32KHZ:
2518 sample_rate_val = 4;
2519 break;
2520 case SAMPLING_RATE_22P05KHZ:
2521 sample_rate_val = 3;
2522 break;
2523 case SAMPLING_RATE_16KHZ:
2524 sample_rate_val = 2;
2525 break;
2526 case SAMPLING_RATE_11P025KHZ:
2527 sample_rate_val = 1;
2528 break;
2529 case SAMPLING_RATE_8KHZ:
2530 sample_rate_val = 0;
2531 break;
2532 default:
2533 sample_rate_val = 6;
2534 break;
2535 }
2536
2537 ucontrol->value.integer.value[0] = sample_rate_val;
2538 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
2539 cdc_dma_tx_cfg[ch_num].sample_rate);
2540 return 0;
2541}
2542
2543static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2544 struct snd_ctl_elem_value *ucontrol)
2545{
2546 int ch_num = cdc_dma_get_port_idx(kcontrol);
2547
2548 if (ch_num < 0) {
2549 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2550 return ch_num;
2551 }
2552
2553 switch (ucontrol->value.integer.value[0]) {
2554 case 12:
2555 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
2556 break;
2557 case 11:
2558 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
2559 break;
2560 case 10:
2561 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
2562 break;
2563 case 9:
2564 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
2565 break;
2566 case 8:
2567 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
2568 break;
2569 case 7:
2570 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
2571 break;
2572 case 6:
2573 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2574 break;
2575 case 5:
2576 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
2577 break;
2578 case 4:
2579 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
2580 break;
2581 case 3:
2582 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
2583 break;
2584 case 2:
2585 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
2586 break;
2587 case 1:
2588 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
2589 break;
2590 case 0:
2591 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
2592 break;
2593 default:
2594 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2595 break;
2596 }
2597
2598 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
2599 __func__, ucontrol->value.integer.value[0],
2600 cdc_dma_tx_cfg[ch_num].sample_rate);
2601 return 0;
2602}
2603
2604static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
2605 struct snd_ctl_elem_value *ucontrol)
2606{
2607 int ch_num = cdc_dma_get_port_idx(kcontrol);
2608
2609 if (ch_num < 0) {
2610 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2611 return ch_num;
2612 }
2613
2614 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
2615 case SNDRV_PCM_FORMAT_S32_LE:
2616 ucontrol->value.integer.value[0] = 3;
2617 break;
2618 case SNDRV_PCM_FORMAT_S24_3LE:
2619 ucontrol->value.integer.value[0] = 2;
2620 break;
2621 case SNDRV_PCM_FORMAT_S24_LE:
2622 ucontrol->value.integer.value[0] = 1;
2623 break;
2624 case SNDRV_PCM_FORMAT_S16_LE:
2625 default:
2626 ucontrol->value.integer.value[0] = 0;
2627 break;
2628 }
2629
2630 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2631 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2632 ucontrol->value.integer.value[0]);
2633 return 0;
2634}
2635
2636static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
2637 struct snd_ctl_elem_value *ucontrol)
2638{
2639 int rc = 0;
2640 int ch_num = cdc_dma_get_port_idx(kcontrol);
2641
2642 if (ch_num < 0) {
2643 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2644 return ch_num;
2645 }
2646
2647 switch (ucontrol->value.integer.value[0]) {
2648 case 3:
2649 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2650 break;
2651 case 2:
2652 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2653 break;
2654 case 1:
2655 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2656 break;
2657 case 0:
2658 default:
2659 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2660 break;
2661 }
2662 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2663 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2664 ucontrol->value.integer.value[0]);
2665
2666 return rc;
2667}
2668
2669static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
2670{
2671 int idx = 0;
2672
2673 switch (be_id) {
2674 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
2675 idx = RX_CDC_DMA_RX_0;
2676 break;
2677 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
2678 idx = RX_CDC_DMA_RX_1;
2679 break;
2680 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
2681 idx = RX_CDC_DMA_RX_2;
2682 break;
2683 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
2684 idx = RX_CDC_DMA_RX_3;
2685 break;
2686 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
2687 idx = RX_CDC_DMA_RX_5;
2688 break;
2689 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
2690 idx = TX_CDC_DMA_TX_0;
2691 break;
2692 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
2693 idx = TX_CDC_DMA_TX_3;
2694 break;
2695 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
2696 idx = TX_CDC_DMA_TX_4;
2697 break;
2698 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2699 idx = VA_CDC_DMA_TX_0;
2700 break;
2701 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2702 idx = VA_CDC_DMA_TX_1;
2703 break;
2704 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2705 idx = VA_CDC_DMA_TX_2;
2706 break;
2707 default:
2708 idx = RX_CDC_DMA_RX_0;
2709 break;
2710 }
2711
2712 return idx;
2713}
2714
2715static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
2716 struct snd_ctl_elem_value *ucontrol)
2717{
2718 /*
2719 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
2720 * when used for BT_SCO use case. Return either Rx or Tx sample rate
2721 * value.
2722 */
2723 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
2724 case SAMPLING_RATE_96KHZ:
2725 ucontrol->value.integer.value[0] = 5;
2726 break;
2727 case SAMPLING_RATE_88P2KHZ:
2728 ucontrol->value.integer.value[0] = 4;
2729 break;
2730 case SAMPLING_RATE_48KHZ:
2731 ucontrol->value.integer.value[0] = 3;
2732 break;
2733 case SAMPLING_RATE_44P1KHZ:
2734 ucontrol->value.integer.value[0] = 2;
2735 break;
2736 case SAMPLING_RATE_16KHZ:
2737 ucontrol->value.integer.value[0] = 1;
2738 break;
2739 case SAMPLING_RATE_8KHZ:
2740 default:
2741 ucontrol->value.integer.value[0] = 0;
2742 break;
2743 }
2744 pr_debug("%s: sample rate = %d\n", __func__,
2745 slim_rx_cfg[SLIM_RX_7].sample_rate);
2746
2747 return 0;
2748}
2749
2750static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
2751 struct snd_ctl_elem_value *ucontrol)
2752{
2753 switch (ucontrol->value.integer.value[0]) {
2754 case 1:
2755 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
2756 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
2757 break;
2758 case 2:
2759 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2760 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2761 break;
2762 case 3:
2763 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
2764 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
2765 break;
2766 case 4:
2767 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2768 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2769 break;
2770 case 5:
2771 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
2772 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
2773 break;
2774 case 0:
2775 default:
2776 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
2777 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
2778 break;
2779 }
2780 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
2781 __func__,
2782 slim_rx_cfg[SLIM_RX_7].sample_rate,
2783 slim_tx_cfg[SLIM_TX_7].sample_rate,
2784 ucontrol->value.enumerated.item[0]);
2785
2786 return 0;
2787}
2788
2789static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
2790 struct snd_ctl_elem_value *ucontrol)
2791{
2792 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
2793 case SAMPLING_RATE_96KHZ:
2794 ucontrol->value.integer.value[0] = 5;
2795 break;
2796 case SAMPLING_RATE_88P2KHZ:
2797 ucontrol->value.integer.value[0] = 4;
2798 break;
2799 case SAMPLING_RATE_48KHZ:
2800 ucontrol->value.integer.value[0] = 3;
2801 break;
2802 case SAMPLING_RATE_44P1KHZ:
2803 ucontrol->value.integer.value[0] = 2;
2804 break;
2805 case SAMPLING_RATE_16KHZ:
2806 ucontrol->value.integer.value[0] = 1;
2807 break;
2808 case SAMPLING_RATE_8KHZ:
2809 default:
2810 ucontrol->value.integer.value[0] = 0;
2811 break;
2812 }
2813 pr_debug("%s: sample rate rx = %d\n", __func__,
2814 slim_rx_cfg[SLIM_RX_7].sample_rate);
2815
2816 return 0;
2817}
2818
2819static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
2820 struct snd_ctl_elem_value *ucontrol)
2821{
2822 switch (ucontrol->value.integer.value[0]) {
2823 case 1:
2824 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
2825 break;
2826 case 2:
2827 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2828 break;
2829 case 3:
2830 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
2831 break;
2832 case 4:
2833 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2834 break;
2835 case 5:
2836 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
2837 break;
2838 case 0:
2839 default:
2840 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
2841 break;
2842 }
2843 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
2844 __func__,
2845 slim_rx_cfg[SLIM_RX_7].sample_rate,
2846 ucontrol->value.enumerated.item[0]);
2847
2848 return 0;
2849}
2850
2851static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
2852 struct snd_ctl_elem_value *ucontrol)
2853{
2854 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
2855 case SAMPLING_RATE_96KHZ:
2856 ucontrol->value.integer.value[0] = 5;
2857 break;
2858 case SAMPLING_RATE_88P2KHZ:
2859 ucontrol->value.integer.value[0] = 4;
2860 break;
2861 case SAMPLING_RATE_48KHZ:
2862 ucontrol->value.integer.value[0] = 3;
2863 break;
2864 case SAMPLING_RATE_44P1KHZ:
2865 ucontrol->value.integer.value[0] = 2;
2866 break;
2867 case SAMPLING_RATE_16KHZ:
2868 ucontrol->value.integer.value[0] = 1;
2869 break;
2870 case SAMPLING_RATE_8KHZ:
2871 default:
2872 ucontrol->value.integer.value[0] = 0;
2873 break;
2874 }
2875 pr_debug("%s: sample rate tx = %d\n", __func__,
2876 slim_tx_cfg[SLIM_TX_7].sample_rate);
2877
2878 return 0;
2879}
2880
2881static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
2882 struct snd_ctl_elem_value *ucontrol)
2883{
2884 switch (ucontrol->value.integer.value[0]) {
2885 case 1:
2886 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
2887 break;
2888 case 2:
2889 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2890 break;
2891 case 3:
2892 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
2893 break;
2894 case 4:
2895 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2896 break;
2897 case 5:
2898 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
2899 break;
2900 case 0:
2901 default:
2902 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
2903 break;
2904 }
2905 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
2906 __func__,
2907 slim_tx_cfg[SLIM_TX_7].sample_rate,
2908 ucontrol->value.enumerated.item[0]);
2909
2910 return 0;
2911}
2912
2913static const struct snd_kcontrol_new msm_int_snd_controls[] = {
2914 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
2915 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2916 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
2917 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2918 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
2919 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2920 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
2921 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2922 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
2923 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2924 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
2925 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2926 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
2927 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2928 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
2929 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2930 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
2931 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2932 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
2933 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2934 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
2935 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2936 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
2937 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2938 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
2939 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2940 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
2941 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2942 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
2943 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2944 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
2945 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2946 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
2947 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2948 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
2949 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2950 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
2951 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2952 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
2953 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2954 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
2955 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2956 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
2957 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2958 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
2959 rx_cdc_dma_rx_0_sample_rate,
2960 cdc_dma_rx_sample_rate_get,
2961 cdc_dma_rx_sample_rate_put),
2962 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
2963 rx_cdc_dma_rx_1_sample_rate,
2964 cdc_dma_rx_sample_rate_get,
2965 cdc_dma_rx_sample_rate_put),
2966 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
2967 rx_cdc_dma_rx_2_sample_rate,
2968 cdc_dma_rx_sample_rate_get,
2969 cdc_dma_rx_sample_rate_put),
2970 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
2971 rx_cdc_dma_rx_3_sample_rate,
2972 cdc_dma_rx_sample_rate_get,
2973 cdc_dma_rx_sample_rate_put),
2974 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
2975 rx_cdc_dma_rx_5_sample_rate,
2976 cdc_dma_rx_sample_rate_get,
2977 cdc_dma_rx_sample_rate_put),
2978 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
2979 tx_cdc_dma_tx_0_sample_rate,
2980 cdc_dma_tx_sample_rate_get,
2981 cdc_dma_tx_sample_rate_put),
2982 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
2983 tx_cdc_dma_tx_3_sample_rate,
2984 cdc_dma_tx_sample_rate_get,
2985 cdc_dma_tx_sample_rate_put),
2986 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
2987 tx_cdc_dma_tx_4_sample_rate,
2988 cdc_dma_tx_sample_rate_get,
2989 cdc_dma_tx_sample_rate_put),
2990 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
2991 va_cdc_dma_tx_0_sample_rate,
2992 cdc_dma_tx_sample_rate_get,
2993 cdc_dma_tx_sample_rate_put),
2994 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
2995 va_cdc_dma_tx_1_sample_rate,
2996 cdc_dma_tx_sample_rate_get,
2997 cdc_dma_tx_sample_rate_put),
2998 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
2999 va_cdc_dma_tx_2_sample_rate,
3000 cdc_dma_tx_sample_rate_get,
3001 cdc_dma_tx_sample_rate_put),
3002};
3003
3004static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3005 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3006 usb_audio_rx_sample_rate_get,
3007 usb_audio_rx_sample_rate_put),
3008 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3009 usb_audio_tx_sample_rate_get,
3010 usb_audio_tx_sample_rate_put),
Harshal Ahire42999452020-01-28 14:22:01 +0530[diff] [blame]3011 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3012 usb_audio_rx_format_get, usb_audio_rx_format_put),
3013 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3014 usb_audio_tx_format_get, usb_audio_tx_format_put),
3015 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3016 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3017 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3018 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3019 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3020 proxy_rx_ch_get, proxy_rx_ch_put),
3021 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3022 msm_bt_sample_rate_get,
3023 msm_bt_sample_rate_put),
3024 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3025 msm_bt_sample_rate_rx_get,
3026 msm_bt_sample_rate_rx_put),
3027 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3028 msm_bt_sample_rate_tx_get,
3029 msm_bt_sample_rate_tx_put),
3030 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3031 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
3032 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3033 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3034};
3035
3036static const struct snd_kcontrol_new msm_tdm_snd_controls[] = {
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3037 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3038 tdm_rx_sample_rate_get,
3039 tdm_rx_sample_rate_put),
3040 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3041 tdm_rx_sample_rate_get,
3042 tdm_rx_sample_rate_put),
3043 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3044 tdm_rx_sample_rate_get,
3045 tdm_rx_sample_rate_put),
3046 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3047 tdm_rx_sample_rate_get,
3048 tdm_rx_sample_rate_put),
3049 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3050 tdm_tx_sample_rate_get,
3051 tdm_tx_sample_rate_put),
3052 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3053 tdm_tx_sample_rate_get,
3054 tdm_tx_sample_rate_put),
3055 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3056 tdm_tx_sample_rate_get,
3057 tdm_tx_sample_rate_put),
3058 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3059 tdm_tx_sample_rate_get,
3060 tdm_tx_sample_rate_put),
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3061 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3062 tdm_rx_format_get,
3063 tdm_rx_format_put),
3064 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3065 tdm_rx_format_get,
3066 tdm_rx_format_put),
3067 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3068 tdm_rx_format_get,
3069 tdm_rx_format_put),
3070 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3071 tdm_rx_format_get,
3072 tdm_rx_format_put),
3073 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3074 tdm_tx_format_get,
3075 tdm_tx_format_put),
3076 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3077 tdm_tx_format_get,
3078 tdm_tx_format_put),
3079 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3080 tdm_tx_format_get,
3081 tdm_tx_format_put),
3082 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3083 tdm_tx_format_get,
3084 tdm_tx_format_put),
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3085 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3086 tdm_rx_ch_get,
3087 tdm_rx_ch_put),
3088 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3089 tdm_rx_ch_get,
3090 tdm_rx_ch_put),
3091 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3092 tdm_rx_ch_get,
3093 tdm_rx_ch_put),
3094 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3095 tdm_rx_ch_get,
3096 tdm_rx_ch_put),
3097 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3098 tdm_tx_ch_get,
3099 tdm_tx_ch_put),
3100 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3101 tdm_tx_ch_get,
3102 tdm_tx_ch_put),
3103 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3104 tdm_tx_ch_get,
3105 tdm_tx_ch_put),
3106 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3107 tdm_tx_ch_get,
3108 tdm_tx_ch_put),
Harshal Ahire42999452020-01-28 14:22:01 +0530[diff] [blame]3109};
3110
3111static const struct snd_kcontrol_new msm_auxpcm_snd_controls[] = {
3112 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3113 aux_pcm_rx_sample_rate_get,
3114 aux_pcm_rx_sample_rate_put),
3115 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3116 aux_pcm_rx_sample_rate_get,
3117 aux_pcm_rx_sample_rate_put),
3118 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3119 aux_pcm_rx_sample_rate_get,
3120 aux_pcm_rx_sample_rate_put),
3121 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3122 aux_pcm_rx_sample_rate_get,
3123 aux_pcm_rx_sample_rate_put),
3124 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3125 aux_pcm_tx_sample_rate_get,
3126 aux_pcm_tx_sample_rate_put),
3127 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3128 aux_pcm_tx_sample_rate_get,
3129 aux_pcm_tx_sample_rate_put),
3130 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3131 aux_pcm_tx_sample_rate_get,
3132 aux_pcm_tx_sample_rate_put),
3133 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3134 aux_pcm_tx_sample_rate_get,
3135 aux_pcm_tx_sample_rate_put),
3136 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3137 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3138 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3139 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3140 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3141 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3142 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3143 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3144 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3145 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3146 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3147 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3148 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3149 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3150 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3151 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3152};
3153
3154static const struct snd_kcontrol_new msm_mi2s_snd_controls[] = {
3155 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3156 mi2s_rx_sample_rate_get,
3157 mi2s_rx_sample_rate_put),
3158 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3159 mi2s_rx_sample_rate_get,
3160 mi2s_rx_sample_rate_put),
3161 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3162 mi2s_rx_sample_rate_get,
3163 mi2s_rx_sample_rate_put),
3164 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3165 mi2s_rx_sample_rate_get,
3166 mi2s_tx_sample_rate_put),
3167 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3168 mi2s_tx_sample_rate_get,
3169 mi2s_tx_sample_rate_put),
3170 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3171 mi2s_tx_sample_rate_get,
3172 mi2s_tx_sample_rate_put),
3173 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3174 mi2s_tx_sample_rate_get,
3175 mi2s_tx_sample_rate_put),
3176 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3177 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3178 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3179 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3180 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3181 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3182 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3183 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3184 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3185 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3186 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3187 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3188 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3189 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3190 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3191 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3192 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3193 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3194 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3195 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3196 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3197 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3198 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3199 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3200 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3201 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3202 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3203 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3204 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3205 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3206 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3207 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3208};
3209
3210static const struct snd_kcontrol_new msm_snd_controls[] = {
3211 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3212 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3213 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3214 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3215 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3216 aux_pcm_rx_sample_rate_get,
3217 aux_pcm_rx_sample_rate_put),
3218 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3219 aux_pcm_tx_sample_rate_get,
3220 aux_pcm_tx_sample_rate_put),
3221};
3222
3223static int bengal_send_island_va_config(int32_t be_id)
3224{
3225 int rc = 0;
3226 int port_id = 0xFFFF;
3227
3228 port_id = msm_get_port_id(be_id);
3229 if (port_id < 0) {
3230 pr_err("%s: Invalid island interface, be_id: %d\n",
3231 __func__, be_id);
3232 rc = -EINVAL;
3233 } else {
3234 /*
3235 * send island mode config
3236 * This should be the first configuration
3237 */
3238 rc = afe_send_port_island_mode(port_id);
3239 if (rc)
3240 pr_err("%s: afe send island mode failed %d\n",
3241 __func__, rc);
3242 }
3243
3244 return rc;
3245}
3246
3247static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
3248 struct snd_pcm_hw_params *params)
3249{
3250 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3251 struct snd_interval *rate = hw_param_interval(params,
3252 SNDRV_PCM_HW_PARAM_RATE);
3253 struct snd_interval *channels = hw_param_interval(params,
3254 SNDRV_PCM_HW_PARAM_CHANNELS);
3255 int idx = 0;
3256
3257 pr_debug("%s: format = %d, rate = %d\n",
3258 __func__, params_format(params), params_rate(params));
3259
3260 switch (dai_link->id) {
3261 case MSM_BACKEND_DAI_USB_RX:
3262 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3263 usb_rx_cfg.bit_format);
3264 rate->min = rate->max = usb_rx_cfg.sample_rate;
3265 channels->min = channels->max = usb_rx_cfg.channels;
3266 break;
3267
3268 case MSM_BACKEND_DAI_USB_TX:
3269 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3270 usb_tx_cfg.bit_format);
3271 rate->min = rate->max = usb_tx_cfg.sample_rate;
3272 channels->min = channels->max = usb_tx_cfg.channels;
3273 break;
3274
3275 case MSM_BACKEND_DAI_AFE_PCM_RX:
3276 channels->min = channels->max = proxy_rx_cfg.channels;
3277 rate->min = rate->max = SAMPLING_RATE_48KHZ;
3278 break;
3279
3280 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
3281 channels->min = channels->max =
3282 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
3283 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3284 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
3285 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
3286 break;
3287
3288 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
3289 channels->min = channels->max =
3290 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
3291 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3292 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
3293 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
3294 break;
3295
3296 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
3297 channels->min = channels->max =
3298 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
3299 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3300 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
3301 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
3302 break;
3303
3304 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
3305 channels->min = channels->max =
3306 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
3307 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3308 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
3309 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
3310 break;
3311
3312 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
3313 channels->min = channels->max =
3314 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
3315 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3316 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
3317 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
3318 break;
3319
3320 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
3321 channels->min = channels->max =
3322 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
3323 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3324 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
3325 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
3326 break;
3327
3328 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
3329 channels->min = channels->max =
3330 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
3331 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3332 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
3333 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
3334 break;
3335
3336 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
3337 channels->min = channels->max =
3338 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
3339 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3340 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
3341 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
3342 break;
3343
3344 case MSM_BACKEND_DAI_AUXPCM_RX:
3345 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3346 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
3347 rate->min = rate->max =
3348 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
3349 channels->min = channels->max =
3350 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
3351 break;
3352
3353 case MSM_BACKEND_DAI_AUXPCM_TX:
3354 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3355 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
3356 rate->min = rate->max =
3357 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
3358 channels->min = channels->max =
3359 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
3360 break;
3361
3362 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
3363 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3364 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
3365 rate->min = rate->max =
3366 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
3367 channels->min = channels->max =
3368 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
3369 break;
3370
3371 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
3372 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3373 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
3374 rate->min = rate->max =
3375 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
3376 channels->min = channels->max =
3377 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
3378 break;
3379
3380 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
3381 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3382 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
3383 rate->min = rate->max =
3384 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
3385 channels->min = channels->max =
3386 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
3387 break;
3388
3389 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
3390 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3391 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
3392 rate->min = rate->max =
3393 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
3394 channels->min = channels->max =
3395 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
3396 break;
3397
3398 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
3399 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3400 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
3401 rate->min = rate->max =
3402 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
3403 channels->min = channels->max =
3404 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
3405 break;
3406
3407 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
3408 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3409 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
3410 rate->min = rate->max =
3411 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
3412 channels->min = channels->max =
3413 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
3414 break;
3415
3416 case MSM_BACKEND_DAI_PRI_MI2S_RX:
3417 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3418 mi2s_rx_cfg[PRIM_MI2S].bit_format);
3419 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
3420 channels->min = channels->max =
3421 mi2s_rx_cfg[PRIM_MI2S].channels;
3422 break;
3423
3424 case MSM_BACKEND_DAI_PRI_MI2S_TX:
3425 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3426 mi2s_tx_cfg[PRIM_MI2S].bit_format);
3427 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
3428 channels->min = channels->max =
3429 mi2s_tx_cfg[PRIM_MI2S].channels;
3430 break;
3431
3432 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
3433 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3434 mi2s_rx_cfg[SEC_MI2S].bit_format);
3435 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
3436 channels->min = channels->max =
3437 mi2s_rx_cfg[SEC_MI2S].channels;
3438 break;
3439
3440 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
3441 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3442 mi2s_tx_cfg[SEC_MI2S].bit_format);
3443 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
3444 channels->min = channels->max =
3445 mi2s_tx_cfg[SEC_MI2S].channels;
3446 break;
3447
3448 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
3449 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3450 mi2s_rx_cfg[TERT_MI2S].bit_format);
3451 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
3452 channels->min = channels->max =
3453 mi2s_rx_cfg[TERT_MI2S].channels;
3454 break;
3455
3456 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
3457 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3458 mi2s_tx_cfg[TERT_MI2S].bit_format);
3459 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
3460 channels->min = channels->max =
3461 mi2s_tx_cfg[TERT_MI2S].channels;
3462 break;
3463
3464 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
3465 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3466 mi2s_rx_cfg[QUAT_MI2S].bit_format);
3467 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
3468 channels->min = channels->max =
3469 mi2s_rx_cfg[QUAT_MI2S].channels;
3470 break;
3471
3472 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
3473 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3474 mi2s_tx_cfg[QUAT_MI2S].bit_format);
3475 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
3476 channels->min = channels->max =
3477 mi2s_tx_cfg[QUAT_MI2S].channels;
3478 break;
3479
3480 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3481 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3482 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3483 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3484 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3485 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3486 cdc_dma_rx_cfg[idx].bit_format);
3487 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
3488 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
3489 break;
3490
3491 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3492 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3493 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3494 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3495 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3496 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3497 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3498 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3499 cdc_dma_tx_cfg[idx].bit_format);
3500 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
3501 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
3502 break;
3503
3504 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
3505 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3506 slim_rx_cfg[SLIM_RX_7].bit_format);
3507 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
3508 channels->min = channels->max =
3509 slim_rx_cfg[SLIM_RX_7].channels;
3510 break;
3511
3512 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
Prasad Kumpatlaee5d0372019-12-06 16:08:14 +0530[diff] [blame]3513 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3514 slim_tx_cfg[SLIM_TX_7].bit_format);
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3515 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
3516 channels->min = channels->max =
3517 slim_tx_cfg[SLIM_TX_7].channels;
3518 break;
3519
3520 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
3521 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
3522 channels->min = channels->max =
3523 slim_tx_cfg[SLIM_TX_8].channels;
3524 break;
3525
3526 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
3527 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3528 afe_loopback_tx_cfg[idx].bit_format);
3529 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
3530 channels->min = channels->max =
3531 afe_loopback_tx_cfg[idx].channels;
3532 break;
3533
3534 default:
3535 rate->min = rate->max = SAMPLING_RATE_48KHZ;
3536 break;
3537 }
3538
3539 return 0;
3540}
3541
3542static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component,
3543 bool active)
3544{
3545 struct snd_soc_card *card = component->card;
3546 struct msm_asoc_mach_data *pdata =
3547 snd_soc_card_get_drvdata(card);
3548
3549 if (!pdata->fsa_handle)
3550 return false;
3551
3552 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
3553}
3554
3555static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
3556{
3557 int value = 0;
3558 bool ret = false;
3559 struct snd_soc_card *card;
3560 struct msm_asoc_mach_data *pdata;
3561
3562 if (!component) {
3563 pr_err("%s component is NULL\n", __func__);
3564 return false;
3565 }
3566 card = component->card;
3567 pdata = snd_soc_card_get_drvdata(card);
3568
3569 if (!pdata)
3570 return false;
3571
3572 if (wcd_mbhc_cfg.enable_usbc_analog)
3573 return msm_usbc_swap_gnd_mic(component, active);
3574
3575 /* if usbc is not defined, swap using us_euro_gpio_p */
3576 if (pdata->us_euro_gpio_p) {
3577 value = msm_cdc_pinctrl_get_state(
3578 pdata->us_euro_gpio_p);
3579 if (value)
3580 msm_cdc_pinctrl_select_sleep_state(
3581 pdata->us_euro_gpio_p);
3582 else
3583 msm_cdc_pinctrl_select_active_state(
3584 pdata->us_euro_gpio_p);
3585 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
3586 __func__, value, !value);
3587 ret = true;
3588 }
3589
3590 return ret;
3591}
3592
3593static int bengal_tdm_snd_hw_params(struct snd_pcm_substream *substream,
3594 struct snd_pcm_hw_params *params)
3595{
3596 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3597 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3598 int ret = 0;
3599 int slot_width = 32;
3600 int channels, slots;
3601 unsigned int slot_mask, rate, clk_freq;
3602 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
3603
3604 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
3605
3606 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
3607 switch (cpu_dai->id) {
3608 case AFE_PORT_ID_PRIMARY_TDM_RX:
3609 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
3610 break;
3611 case AFE_PORT_ID_SECONDARY_TDM_RX:
3612 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
3613 break;
3614 case AFE_PORT_ID_TERTIARY_TDM_RX:
3615 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
3616 break;
3617 case AFE_PORT_ID_QUATERNARY_TDM_RX:
3618 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
3619 break;
3620 case AFE_PORT_ID_PRIMARY_TDM_TX:
3621 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
3622 break;
3623 case AFE_PORT_ID_SECONDARY_TDM_TX:
3624 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
3625 break;
3626 case AFE_PORT_ID_TERTIARY_TDM_TX:
3627 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
3628 break;
3629 case AFE_PORT_ID_QUATERNARY_TDM_TX:
3630 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
3631 break;
3632
3633 default:
3634 pr_err("%s: dai id 0x%x not supported\n",
3635 __func__, cpu_dai->id);
3636 return -EINVAL;
3637 }
3638
3639 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3640 /*2 slot config - bits 0 and 1 set for the first two slots */
3641 slot_mask = 0x0000FFFF >> (16 - slots);
3642 channels = slots;
3643
3644 pr_debug("%s: tdm rx slot_width %d slots %d\n",
3645 __func__, slot_width, slots);
3646
3647 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
3648 slots, slot_width);
3649 if (ret < 0) {
3650 pr_err("%s: failed to set tdm rx slot, err:%d\n",
3651 __func__, ret);
3652 goto end;
3653 }
3654
3655 ret = snd_soc_dai_set_channel_map(cpu_dai,
3656 0, NULL, channels, slot_offset);
3657 if (ret < 0) {
3658 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
3659 __func__, ret);
3660 goto end;
3661 }
3662 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
3663 /*2 slot config - bits 0 and 1 set for the first two slots */
3664 slot_mask = 0x0000FFFF >> (16 - slots);
3665 channels = slots;
3666
3667 pr_debug("%s: tdm tx slot_width %d slots %d\n",
3668 __func__, slot_width, slots);
3669
3670 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
3671 slots, slot_width);
3672 if (ret < 0) {
3673 pr_err("%s: failed to set tdm tx slot, err:%d\n",
3674 __func__, ret);
3675 goto end;
3676 }
3677
3678 ret = snd_soc_dai_set_channel_map(cpu_dai,
3679 channels, slot_offset, 0, NULL);
3680 if (ret < 0) {
3681 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
3682 __func__, ret);
3683 goto end;
3684 }
3685 } else {
3686 ret = -EINVAL;
3687 pr_err("%s: invalid use case, err:%d\n",
3688 __func__, ret);
3689 goto end;
3690 }
3691
3692 rate = params_rate(params);
3693 clk_freq = rate * slot_width * slots;
3694 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
3695 if (ret < 0)
3696 pr_err("%s: failed to set tdm clk, err:%d\n",
3697 __func__, ret);
3698
3699end:
3700 return ret;
3701}
3702
3703static int msm_get_tdm_mode(u32 port_id)
3704{
3705 int tdm_mode;
3706
3707 switch (port_id) {
3708 case AFE_PORT_ID_PRIMARY_TDM_RX:
3709 case AFE_PORT_ID_PRIMARY_TDM_TX:
3710 tdm_mode = TDM_PRI;
3711 break;
3712 case AFE_PORT_ID_SECONDARY_TDM_RX:
3713 case AFE_PORT_ID_SECONDARY_TDM_TX:
3714 tdm_mode = TDM_SEC;
3715 break;
3716 case AFE_PORT_ID_TERTIARY_TDM_RX:
3717 case AFE_PORT_ID_TERTIARY_TDM_TX:
3718 tdm_mode = TDM_TERT;
3719 break;
3720 case AFE_PORT_ID_QUATERNARY_TDM_RX:
3721 case AFE_PORT_ID_QUATERNARY_TDM_TX:
3722 tdm_mode = TDM_QUAT;
3723 break;
3724 default:
3725 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
3726 tdm_mode = -EINVAL;
3727 }
3728 return tdm_mode;
3729}
3730
3731static int bengal_tdm_snd_startup(struct snd_pcm_substream *substream)
3732{
3733 int ret = 0;
3734 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3735 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3736 struct snd_soc_card *card = rtd->card;
3737 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3738 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
3739
3740 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
3741 ret = -EINVAL;
3742 pr_err("%s: Invalid TDM interface %d\n",
3743 __func__, ret);
3744 return ret;
3745 }
3746
3747 if (pdata->mi2s_gpio_p[tdm_mode]) {
3748 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
3749 == 0) {
3750 ret = msm_cdc_pinctrl_select_active_state(
3751 pdata->mi2s_gpio_p[tdm_mode]);
3752 if (ret) {
3753 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
3754 __func__, ret);
3755 goto done;
3756 }
3757 }
3758 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
3759 }
3760
3761done:
3762 return ret;
3763}
3764
3765static void bengal_tdm_snd_shutdown(struct snd_pcm_substream *substream)
3766{
3767 int ret = 0;
3768 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3769 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3770 struct snd_soc_card *card = rtd->card;
3771 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3772 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
3773
3774 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
3775 ret = -EINVAL;
3776 pr_err("%s: Invalid TDM interface %d\n",
3777 __func__, ret);
3778 return;
3779 }
3780
3781 if (pdata->mi2s_gpio_p[tdm_mode]) {
3782 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
3783 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
3784 == 0) {
3785 ret = msm_cdc_pinctrl_select_sleep_state(
3786 pdata->mi2s_gpio_p[tdm_mode]);
3787 if (ret)
3788 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
3789 __func__, ret);
3790 }
3791 }
3792}
3793
3794static int bengal_aux_snd_startup(struct snd_pcm_substream *substream)
3795{
3796 int ret = 0;
3797 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3798 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3799 struct snd_soc_card *card = rtd->card;
3800 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3801 u32 aux_mode = cpu_dai->id - 1;
3802
3803 if (aux_mode >= AUX_PCM_MAX) {
3804 ret = -EINVAL;
3805 pr_err("%s: Invalid AUX interface %d\n",
3806 __func__, ret);
3807 return ret;
3808 }
3809
3810 if (pdata->mi2s_gpio_p[aux_mode]) {
3811 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
3812 == 0) {
3813 ret = msm_cdc_pinctrl_select_active_state(
3814 pdata->mi2s_gpio_p[aux_mode]);
3815 if (ret) {
3816 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
3817 __func__, ret);
3818 goto done;
3819 }
3820 }
3821 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
3822 }
3823
3824done:
3825 return ret;
3826}
3827
3828static void bengal_aux_snd_shutdown(struct snd_pcm_substream *substream)
3829{
3830 int ret = 0;
3831 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3832 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3833 struct snd_soc_card *card = rtd->card;
3834 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3835 u32 aux_mode = cpu_dai->id - 1;
3836
3837 if (aux_mode >= AUX_PCM_MAX) {
3838 pr_err("%s: Invalid AUX interface %d\n",
3839 __func__, ret);
3840 return;
3841 }
3842
3843 if (pdata->mi2s_gpio_p[aux_mode]) {
3844 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
3845 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
3846 == 0) {
3847 ret = msm_cdc_pinctrl_select_sleep_state(
3848 pdata->mi2s_gpio_p[aux_mode]);
3849 if (ret)
3850 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
3851 __func__, ret);
3852 }
3853 }
3854}
3855
3856static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
3857{
3858 int ret = 0;
3859 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3860 struct snd_soc_dai_link *dai_link = rtd->dai_link;
Laxminath Kasam37a89062020-01-07 14:53:01 +0530[diff] [blame]3861 struct snd_soc_card *card = rtd->card;
3862 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3863
3864 switch (dai_link->id) {
3865 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3866 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3867 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Laxminath Kasam37a89062020-01-07 14:53:01 +0530[diff] [blame]3868 if (pdata->va_disable) {
3869 pr_debug("%s: SVA not supported\n", __func__);
3870 return -EINVAL;
3871 }
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3872 ret = bengal_send_island_va_config(dai_link->id);
3873 if (ret)
3874 pr_err("%s: send island va cfg failed, err: %d\n",
3875 __func__, ret);
3876 break;
3877 }
3878
3879 return ret;
3880}
3881
3882static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
3883 struct snd_pcm_hw_params *params)
3884{
3885 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3886 struct snd_soc_dai *codec_dai = rtd->codec_dai;
3887 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3888 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3889
3890 int ret = 0;
3891 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
3892 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
3893 u32 user_set_tx_ch = 0;
3894 u32 user_set_rx_ch = 0;
3895 u32 ch_id;
3896
3897 ret = snd_soc_dai_get_channel_map(codec_dai,
3898 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
3899 &rx_ch_cdc_dma);
3900 if (ret < 0) {
3901 pr_err("%s: failed to get codec chan map, err:%d\n",
3902 __func__, ret);
3903 goto err;
3904 }
3905
3906 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3907 switch (dai_link->id) {
3908 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3909 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3910 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3911 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3912 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
3913 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3914 {
3915 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3916 pr_debug("%s: id %d rx_ch=%d\n", __func__,
3917 ch_id, cdc_dma_rx_cfg[ch_id].channels);
3918 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
3919 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
3920 user_set_rx_ch, &rx_ch_cdc_dma);
3921 if (ret < 0) {
3922 pr_err("%s: failed to set cpu chan map, err:%d\n",
3923 __func__, ret);
3924 goto err;
3925 }
3926
3927 }
3928 break;
3929 }
3930 } else {
3931 switch (dai_link->id) {
3932 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3933 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3934 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3935 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3936 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3937 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3938 {
3939 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3940 pr_debug("%s: id %d tx_ch=%d\n", __func__,
3941 ch_id, cdc_dma_tx_cfg[ch_id].channels);
3942 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
3943 }
3944 break;
3945 }
3946
3947 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
3948 &tx_ch_cdc_dma, 0, 0);
3949 if (ret < 0) {
3950 pr_err("%s: failed to set cpu chan map, err:%d\n",
3951 __func__, ret);
3952 goto err;
3953 }
3954 }
3955
3956err:
3957 return ret;
3958}
3959
3960static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
3961{
3962 cpumask_t mask;
3963
3964 if (pm_qos_request_active(&substream->latency_pm_qos_req))
3965 pm_qos_remove_request(&substream->latency_pm_qos_req);
3966
3967 cpumask_clear(&mask);
3968 cpumask_set_cpu(1, &mask); /* affine to core 1 */
3969 cpumask_set_cpu(2, &mask); /* affine to core 2 */
3970 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
3971
3972 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
3973
3974 pm_qos_add_request(&substream->latency_pm_qos_req,
3975 PM_QOS_CPU_DMA_LATENCY,
3976 MSM_LL_QOS_VALUE);
3977 return 0;
3978}
3979
3980static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
3981{
3982 int ret = 0;
3983 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3984 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3985 int index = cpu_dai->id;
3986 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
3987 struct snd_soc_card *card = rtd->card;
3988 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3989
3990 dev_dbg(rtd->card->dev,
3991 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
3992 __func__, substream->name, substream->stream,
3993 cpu_dai->name, cpu_dai->id);
3994
3995 if (index < PRIM_MI2S || index >= MI2S_MAX) {
3996 ret = -EINVAL;
3997 dev_err(rtd->card->dev,
3998 "%s: CPU DAI id (%d) out of range\n",
3999 __func__, cpu_dai->id);
4000 goto err;
4001 }
4002 /*
4003 * Mutex protection in case the same MI2S
4004 * interface using for both TX and RX so
4005 * that the same clock won't be enable twice.
4006 */
4007 mutex_lock(&mi2s_intf_conf[index].lock);
4008 if (++mi2s_intf_conf[index].ref_cnt == 1) {
4009 /* Check if msm needs to provide the clock to the interface */
4010 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
4011 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
4012 fmt = SND_SOC_DAIFMT_CBM_CFM;
4013 }
4014 ret = msm_mi2s_set_sclk(substream, true);
4015 if (ret < 0) {
4016 dev_err(rtd->card->dev,
4017 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
4018 __func__, ret);
4019 goto clean_up;
4020 }
4021
4022 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
4023 if (ret < 0) {
4024 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
4025 __func__, index, ret);
4026 goto clk_off;
4027 }
4028 if (pdata->mi2s_gpio_p[index]) {
4029 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
4030 == 0) {
4031 ret = msm_cdc_pinctrl_select_active_state(
4032 pdata->mi2s_gpio_p[index]);
4033 if (ret) {
4034 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
4035 __func__, ret);
4036 goto clk_off;
4037 }
4038 }
4039 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
4040 }
4041 }
4042clk_off:
4043 if (ret < 0)
4044 msm_mi2s_set_sclk(substream, false);
4045clean_up:
4046 if (ret < 0)
4047 mi2s_intf_conf[index].ref_cnt--;
4048 mutex_unlock(&mi2s_intf_conf[index].lock);
4049err:
4050 return ret;
4051}
4052
4053static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
4054{
4055 int ret = 0;
4056 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4057 int index = rtd->cpu_dai->id;
4058 struct snd_soc_card *card = rtd->card;
4059 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4060
4061 pr_debug("%s(): substream = %s stream = %d\n", __func__,
4062 substream->name, substream->stream);
4063 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4064 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
4065 return;
4066 }
4067
4068 mutex_lock(&mi2s_intf_conf[index].lock);
4069 if (--mi2s_intf_conf[index].ref_cnt == 0) {
4070 if (pdata->mi2s_gpio_p[index]) {
4071 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
4072 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
4073 == 0) {
4074 ret = msm_cdc_pinctrl_select_sleep_state(
4075 pdata->mi2s_gpio_p[index]);
4076 if (ret)
4077 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
4078 __func__, ret);
4079 }
4080 }
4081
4082 ret = msm_mi2s_set_sclk(substream, false);
4083 if (ret < 0)
4084 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
4085 __func__, index, ret);
4086 }
4087 mutex_unlock(&mi2s_intf_conf[index].lock);
4088}
4089
4090static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
4091 struct snd_pcm_hw_params *params)
4092{
4093 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4094 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4095 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4096 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4097 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
4098 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4099 int ret = 0;
4100
4101 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
4102 codec_dai->name, codec_dai->id);
4103 ret = snd_soc_dai_get_channel_map(codec_dai,
4104 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4105 if (ret) {
4106 dev_err(rtd->dev,
4107 "%s: failed to get BTFM codec chan map\n, err:%d\n",
4108 __func__, ret);
4109 goto err;
4110 }
4111
4112 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
4113 __func__, tx_ch_cnt, dai_link->id);
4114
4115 ret = snd_soc_dai_set_channel_map(cpu_dai,
4116 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
4117 if (ret)
4118 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
4119 __func__, ret);
4120
4121err:
4122 return ret;
4123}
4124
4125static struct snd_soc_ops bengal_aux_be_ops = {
4126 .startup = bengal_aux_snd_startup,
4127 .shutdown = bengal_aux_snd_shutdown
4128};
4129
4130static struct snd_soc_ops bengal_tdm_be_ops = {
4131 .hw_params = bengal_tdm_snd_hw_params,
4132 .startup = bengal_tdm_snd_startup,
4133 .shutdown = bengal_tdm_snd_shutdown
4134};
4135
4136static struct snd_soc_ops msm_mi2s_be_ops = {
4137 .startup = msm_mi2s_snd_startup,
4138 .shutdown = msm_mi2s_snd_shutdown,
4139};
4140
4141static struct snd_soc_ops msm_fe_qos_ops = {
4142 .prepare = msm_fe_qos_prepare,
4143};
4144
4145static struct snd_soc_ops msm_cdc_dma_be_ops = {
4146 .startup = msm_snd_cdc_dma_startup,
4147 .hw_params = msm_snd_cdc_dma_hw_params,
4148};
4149
4150static struct snd_soc_ops msm_wcn_ops = {
4151 .hw_params = msm_wcn_hw_params,
4152};
4153
4154static int msm_dmic_event(struct snd_soc_dapm_widget *w,
4155 struct snd_kcontrol *kcontrol, int event)
4156{
4157 struct msm_asoc_mach_data *pdata = NULL;
4158 struct snd_soc_component *component =
4159 snd_soc_dapm_to_component(w->dapm);
4160 int ret = 0;
4161 u32 dmic_idx;
4162 int *dmic_gpio_cnt;
4163 struct device_node *dmic_gpio;
4164 char *wname;
4165
4166 wname = strpbrk(w->name, "0123");
4167 if (!wname) {
4168 dev_err(component->dev, "%s: widget not found\n", __func__);
4169 return -EINVAL;
4170 }
4171
4172 ret = kstrtouint(wname, 10, &dmic_idx);
4173 if (ret < 0) {
4174 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
4175 __func__);
4176 return -EINVAL;
4177 }
4178
4179 pdata = snd_soc_card_get_drvdata(component->card);
4180
4181 switch (dmic_idx) {
4182 case 0:
4183 case 1:
4184 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
4185 dmic_gpio = pdata->dmic01_gpio_p;
4186 break;
4187 case 2:
4188 case 3:
4189 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
4190 dmic_gpio = pdata->dmic23_gpio_p;
4191 break;
4192 default:
4193 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
4194 __func__);
4195 return -EINVAL;
4196 }
4197
4198 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
4199 __func__, event, dmic_idx, *dmic_gpio_cnt);
4200
4201 switch (event) {
4202 case SND_SOC_DAPM_PRE_PMU:
4203 (*dmic_gpio_cnt)++;
4204 if (*dmic_gpio_cnt == 1) {
4205 ret = msm_cdc_pinctrl_select_active_state(
4206 dmic_gpio);
4207 if (ret < 0) {
4208 pr_err("%s: gpio set cannot be activated %sd",
4209 __func__, "dmic_gpio");
4210 return ret;
4211 }
4212 }
4213
4214 break;
4215 case SND_SOC_DAPM_POST_PMD:
4216 (*dmic_gpio_cnt)--;
4217 if (*dmic_gpio_cnt == 0) {
4218 ret = msm_cdc_pinctrl_select_sleep_state(
4219 dmic_gpio);
4220 if (ret < 0) {
4221 pr_err("%s: gpio set cannot be de-activated %sd",
4222 __func__, "dmic_gpio");
4223 return ret;
4224 }
4225 }
4226 break;
4227 default:
4228 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4229 return -EINVAL;
4230 }
4231 return 0;
4232}
4233
lintaopei746b0122021-03-16 19:35:42 +0800[diff] [blame]4234#ifdef CONFIG_T2M_SND_FP4
4235static int msm_enable_hac_pa(struct snd_soc_dapm_widget *w,
4236 struct snd_kcontrol *kcontrol,
4237 int event)
4238{
4239 struct snd_soc_component *component =
4240 snd_soc_dapm_to_component(w->dapm);
4241 struct msm_asoc_mach_data *pdata = NULL;
4242 int ret = 0;
4243
4244 dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
4245 w->name, event);
4246
4247 pdata = snd_soc_card_get_drvdata(component->card);
4248
4249 switch (event) {
4250 case SND_SOC_DAPM_POST_PMU:
4251 ret = msm_cdc_pinctrl_select_active_state(
4252 pdata->hac_pa_gpio_p);
4253 if (ret) {
4254 pr_err("%s: gpio set cannot be de-activated %s\n",
4255 __func__, "hac_pa");
4256 }
4257 break;
4258 case SND_SOC_DAPM_PRE_PMD:
4259 ret = msm_cdc_pinctrl_select_sleep_state(
4260 pdata->hac_pa_gpio_p);
4261 if (ret) {
4262 pr_err("%s: gpio set cannot be de-activated %s\n",
4263 __func__, "hac_pa");
4264 }
4265 break;
4266 };
4267 return ret;
4268}
4269#endif
4270
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4271static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4272 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4273 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4274 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4275 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
4276 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4277 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4278 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4279 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4280};
4281
4282static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4283{
4284 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4285 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
4286 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4287
4288 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4289 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4290}
4291
Harshal Ahire42999452020-01-28 14:22:01 +0530[diff] [blame]4292#ifndef CONFIG_TDM_DISABLE
4293static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
4294{
4295 snd_soc_add_component_controls(component, msm_tdm_snd_controls,
4296 ARRAY_SIZE(msm_tdm_snd_controls));
4297}
4298#else
4299static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
4300{
4301 return;
4302}
4303#endif
4304
4305#ifndef CONFIG_MI2S_DISABLE
4306static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
4307{
4308 snd_soc_add_component_controls(component, msm_mi2s_snd_controls,
4309 ARRAY_SIZE(msm_mi2s_snd_controls));
4310}
4311#else
4312static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
4313{
4314 return;
4315}
4316#endif
4317
4318#ifndef CONFIG_AUXPCM_DISABLE
4319static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
4320{
4321 snd_soc_add_component_controls(component, msm_auxpcm_snd_controls,
4322 ARRAY_SIZE(msm_auxpcm_snd_controls));
4323}
4324#else
4325static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
4326{
4327 return;
4328}
4329#endif
4330
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4331static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4332{
4333 int ret = -EINVAL;
4334 struct snd_soc_component *component;
4335 struct snd_soc_dapm_context *dapm;
4336 struct snd_card *card;
4337 struct snd_info_entry *entry;
Aditya Bavanari21d663f2020-04-18 11:21:43 +0530[diff] [blame]4338 struct platform_device *pdev = NULL;
4339 int i = 0;
4340 char *data = NULL;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4341 struct msm_asoc_mach_data *pdata =
4342 snd_soc_card_get_drvdata(rtd->card);
4343
4344 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
4345 if (!component) {
4346 pr_err("%s: could not find component for bolero_codec\n",
4347 __func__);
4348 return ret;
4349 }
4350
4351 dapm = snd_soc_component_get_dapm(component);
4352
4353 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
4354 ARRAY_SIZE(msm_int_snd_controls));
4355 if (ret < 0) {
4356 pr_err("%s: add_component_controls failed: %d\n",
4357 __func__, ret);
4358 return ret;
4359 }
4360 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
4361 ARRAY_SIZE(msm_common_snd_controls));
4362 if (ret < 0) {
4363 pr_err("%s: add common snd controls failed: %d\n",
4364 __func__, ret);
4365 return ret;
4366 }
4367
Harshal Ahire42999452020-01-28 14:22:01 +0530[diff] [blame]4368 msm_add_tdm_snd_controls(component);
4369 msm_add_mi2s_snd_controls(component);
4370 msm_add_auxpcm_snd_controls(component);
4371
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4372 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4373 ARRAY_SIZE(msm_int_dapm_widgets));
4374
lintaopei746b0122021-03-16 19:35:42 +0800[diff] [blame]4375#ifdef CONFIG_T2M_SND_FP4
4376 snd_soc_dapm_new_controls(dapm, msm_hac_dapm_widgets,
4377 ARRAY_SIZE(msm_hac_dapm_widgets));
4378
4379 snd_soc_dapm_add_routes(dapm, msm_hac_audio_map,
4380 ARRAY_SIZE(msm_hac_audio_map));
4381
4382 snd_soc_dapm_ignore_suspend(dapm, "HAC");
4383#endif
4384
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4385 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4386 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4387 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4388 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4389
4390 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4391 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4392 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4393 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4394
4395 snd_soc_dapm_sync(dapm);
4396
Aditya Bavanari21d663f2020-04-18 11:21:43 +0530[diff] [blame]4397 for (i = 0; i < rtd->card->num_aux_devs; i++)
4398 {
4399 if (msm_aux_dev[i].name != NULL ) {
4400 if (strstr(msm_aux_dev[i].name, "wsa"))
4401 continue;
4402 }
4403
4404 if (msm_aux_dev[i].codec_of_node) {
4405 pdev = of_find_device_by_node(
4406 msm_aux_dev[i].codec_of_node);
4407
4408 if (pdev)
4409 data = (char*) of_device_get_match_data(
4410 &pdev->dev);
4411 if (data != NULL) {
4412 if (!strncmp(data, "wcd937x",
4413 sizeof("wcd937x"))) {
4414 bolero_set_port_map(component,
4415 ARRAY_SIZE(sm_port_map),
4416 sm_port_map);
4417 break;
4418 } else if (!strncmp( data, "rouleur",
4419 sizeof("rouleur"))) {
4420 bolero_set_port_map(component,
4421 ARRAY_SIZE(sm_port_map_rouleur),
4422 sm_port_map_rouleur);
4423 break;
4424 }
4425 }
4426 }
4427 }
4428
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4429 card = rtd->card->snd_card;
4430 if (!pdata->codec_root) {
4431 entry = snd_info_create_subdir(card->module, "codecs",
4432 card->proc_root);
4433 if (!entry) {
4434 pr_debug("%s: Cannot create codecs module entry\n",
4435 __func__);
4436 ret = 0;
4437 goto err;
4438 }
4439 pdata->codec_root = entry;
4440 }
4441 bolero_info_create_codec_entry(pdata->codec_root, component);
4442 bolero_register_wake_irq(component, false);
4443 codec_reg_done = true;
4444 return 0;
4445err:
4446 return ret;
4447}
4448
4449static void *def_wcd_mbhc_cal(void)
4450{
4451 void *wcd_mbhc_cal;
4452 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4453 u16 *btn_high;
4454
4455 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4456 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4457 if (!wcd_mbhc_cal)
4458 return NULL;
4459
4460 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
4461 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
4462 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4463 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4464 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4465
4466 btn_high[0] = 75;
4467 btn_high[1] = 150;
4468 btn_high[2] = 237;
4469 btn_high[3] = 500;
4470 btn_high[4] = 500;
4471 btn_high[5] = 500;
4472 btn_high[6] = 500;
4473 btn_high[7] = 500;
4474
4475 return wcd_mbhc_cal;
4476}
4477
Aditya Bavanari9f892d82020-04-29 20:40:53 +0530[diff] [blame]4478static void *def_rouleur_mbhc_cal(void)
4479{
4480 void *wcd_mbhc_cal;
4481 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4482 u16 *btn_high;
4483
4484 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(ROULEUR_MBHC_DEF_BUTTONS,
4485 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4486 if (!wcd_mbhc_cal)
4487 return NULL;
4488
4489 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max =
4490 ROULEUR_MBHC_HS_V_MAX;
4491 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn =
4492 ROULEUR_MBHC_DEF_BUTTONS;
4493 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4494 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4495 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4496
4497 btn_high[0] = 75;
4498 btn_high[1] = 150;
4499 btn_high[2] = 237;
4500 btn_high[3] = 500;
4501 btn_high[4] = 500;
4502
4503 return wcd_mbhc_cal;
4504}
lintaopei746b0122021-03-16 19:35:42 +0800[diff] [blame]4505#ifdef CONFIG_T2M_SND_FP4
4506struct snd_soc_dai_link_component awinic_codecs[] = {
4507 {
4508 .of_node = NULL,
4509 .dai_name = "aw881xx-aif-0-34",
4510 .name = "aw881xx_smartpa.0-0034",
4511 },
4512 {
4513 .of_node = NULL,
4514 .dai_name = "aw881xx-aif-0-36",
4515 .name = "aw881xx_smartpa.0-0036",
4516 },
4517};
4518#endif
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4519/* Digital audio interface glue - connects codec <---> CPU */
4520static struct snd_soc_dai_link msm_common_dai_links[] = {
4521 /* FrontEnd DAI Links */
4522 {/* hw:x,0 */
4523 .name = MSM_DAILINK_NAME(Media1),
4524 .stream_name = "MultiMedia1",
4525 .cpu_dai_name = "MultiMedia1",
4526 .platform_name = "msm-pcm-dsp.0",
4527 .dynamic = 1,
4528 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4529 .dpcm_playback = 1,
4530 .dpcm_capture = 1,
4531 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4532 SND_SOC_DPCM_TRIGGER_POST},
4533 .codec_dai_name = "snd-soc-dummy-dai",
4534 .codec_name = "snd-soc-dummy",
4535 .ignore_suspend = 1,
4536 /* this dainlink has playback support */
4537 .ignore_pmdown_time = 1,
4538 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
4539 },
4540 {/* hw:x,1 */
4541 .name = MSM_DAILINK_NAME(Media2),
4542 .stream_name = "MultiMedia2",
4543 .cpu_dai_name = "MultiMedia2",
4544 .platform_name = "msm-pcm-dsp.0",
4545 .dynamic = 1,
4546 .dpcm_playback = 1,
4547 .dpcm_capture = 1,
4548 .codec_dai_name = "snd-soc-dummy-dai",
4549 .codec_name = "snd-soc-dummy",
4550 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4551 SND_SOC_DPCM_TRIGGER_POST},
4552 .ignore_suspend = 1,
4553 /* this dainlink has playback support */
4554 .ignore_pmdown_time = 1,
4555 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
4556 },
4557 {/* hw:x,2 */
4558 .name = "VoiceMMode1",
4559 .stream_name = "VoiceMMode1",
4560 .cpu_dai_name = "VoiceMMode1",
4561 .platform_name = "msm-pcm-voice",
4562 .dynamic = 1,
4563 .dpcm_playback = 1,
4564 .dpcm_capture = 1,
4565 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4566 SND_SOC_DPCM_TRIGGER_POST},
4567 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4568 .ignore_suspend = 1,
4569 .ignore_pmdown_time = 1,
4570 .codec_dai_name = "snd-soc-dummy-dai",
4571 .codec_name = "snd-soc-dummy",
4572 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
4573 },
4574 {/* hw:x,3 */
4575 .name = "MSM VoIP",
4576 .stream_name = "VoIP",
4577 .cpu_dai_name = "VoIP",
4578 .platform_name = "msm-voip-dsp",
4579 .dynamic = 1,
4580 .dpcm_playback = 1,
4581 .dpcm_capture = 1,
4582 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4583 SND_SOC_DPCM_TRIGGER_POST},
4584 .codec_dai_name = "snd-soc-dummy-dai",
4585 .codec_name = "snd-soc-dummy",
4586 .ignore_suspend = 1,
4587 /* this dainlink has playback support */
4588 .ignore_pmdown_time = 1,
4589 .id = MSM_FRONTEND_DAI_VOIP,
4590 },
4591 {/* hw:x,4 */
4592 .name = MSM_DAILINK_NAME(ULL),
4593 .stream_name = "MultiMedia3",
4594 .cpu_dai_name = "MultiMedia3",
4595 .platform_name = "msm-pcm-dsp.2",
4596 .dynamic = 1,
4597 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4598 .dpcm_playback = 1,
4599 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4600 SND_SOC_DPCM_TRIGGER_POST},
4601 .codec_dai_name = "snd-soc-dummy-dai",
4602 .codec_name = "snd-soc-dummy",
4603 .ignore_suspend = 1,
4604 /* this dainlink has playback support */
4605 .ignore_pmdown_time = 1,
4606 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
4607 },
4608 {/* hw:x,5 */
4609 .name = "MSM AFE-PCM RX",
4610 .stream_name = "AFE-PROXY RX",
4611 .cpu_dai_name = "msm-dai-q6-dev.241",
4612 .codec_name = "msm-stub-codec.1",
4613 .codec_dai_name = "msm-stub-rx",
4614 .platform_name = "msm-pcm-afe",
4615 .dpcm_playback = 1,
4616 .ignore_suspend = 1,
4617 /* this dainlink has playback support */
4618 .ignore_pmdown_time = 1,
4619 },
4620 {/* hw:x,6 */
4621 .name = "MSM AFE-PCM TX",
4622 .stream_name = "AFE-PROXY TX",
4623 .cpu_dai_name = "msm-dai-q6-dev.240",
4624 .codec_name = "msm-stub-codec.1",
4625 .codec_dai_name = "msm-stub-tx",
4626 .platform_name = "msm-pcm-afe",
4627 .dpcm_capture = 1,
4628 .ignore_suspend = 1,
4629 },
4630 {/* hw:x,7 */
4631 .name = MSM_DAILINK_NAME(Compress1),
4632 .stream_name = "Compress1",
4633 .cpu_dai_name = "MultiMedia4",
4634 .platform_name = "msm-compress-dsp",
4635 .dynamic = 1,
4636 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
4637 .dpcm_playback = 1,
4638 .dpcm_capture = 1,
4639 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4640 SND_SOC_DPCM_TRIGGER_POST},
4641 .codec_dai_name = "snd-soc-dummy-dai",
4642 .codec_name = "snd-soc-dummy",
4643 .ignore_suspend = 1,
4644 .ignore_pmdown_time = 1,
4645 /* this dainlink has playback support */
4646 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
4647 },
4648 /* Hostless PCM purpose */
4649 {/* hw:x,8 */
4650 .name = "AUXPCM Hostless",
4651 .stream_name = "AUXPCM Hostless",
4652 .cpu_dai_name = "AUXPCM_HOSTLESS",
4653 .platform_name = "msm-pcm-hostless",
4654 .dynamic = 1,
4655 .dpcm_playback = 1,
4656 .dpcm_capture = 1,
4657 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4658 SND_SOC_DPCM_TRIGGER_POST},
4659 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4660 .ignore_suspend = 1,
4661 /* this dainlink has playback support */
4662 .ignore_pmdown_time = 1,
4663 .codec_dai_name = "snd-soc-dummy-dai",
4664 .codec_name = "snd-soc-dummy",
4665 },
4666 {/* hw:x,9 */
4667 .name = MSM_DAILINK_NAME(LowLatency),
4668 .stream_name = "MultiMedia5",
4669 .cpu_dai_name = "MultiMedia5",
4670 .platform_name = "msm-pcm-dsp.1",
4671 .dynamic = 1,
4672 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4673 .dpcm_playback = 1,
4674 .dpcm_capture = 1,
4675 .codec_dai_name = "snd-soc-dummy-dai",
4676 .codec_name = "snd-soc-dummy",
4677 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4678 SND_SOC_DPCM_TRIGGER_POST},
4679 .ignore_suspend = 1,
4680 /* this dainlink has playback support */
4681 .ignore_pmdown_time = 1,
4682 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
4683 .ops = &msm_fe_qos_ops,
4684 },
4685 {/* hw:x,10 */
4686 .name = "Listen 1 Audio Service",
4687 .stream_name = "Listen 1 Audio Service",
4688 .cpu_dai_name = "LSM1",
4689 .platform_name = "msm-lsm-client",
4690 .dynamic = 1,
4691 .dpcm_capture = 1,
4692 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4693 SND_SOC_DPCM_TRIGGER_POST },
4694 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4695 .ignore_suspend = 1,
4696 .codec_dai_name = "snd-soc-dummy-dai",
4697 .codec_name = "snd-soc-dummy",
4698 .id = MSM_FRONTEND_DAI_LSM1,
4699 },
4700 /* Multiple Tunnel instances */
4701 {/* hw:x,11 */
4702 .name = MSM_DAILINK_NAME(Compress2),
4703 .stream_name = "Compress2",
4704 .cpu_dai_name = "MultiMedia7",
4705 .platform_name = "msm-compress-dsp",
4706 .dynamic = 1,
4707 .dpcm_playback = 1,
4708 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4709 SND_SOC_DPCM_TRIGGER_POST},
4710 .codec_dai_name = "snd-soc-dummy-dai",
4711 .codec_name = "snd-soc-dummy",
4712 .ignore_suspend = 1,
4713 .ignore_pmdown_time = 1,
4714 /* this dainlink has playback support */
4715 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
4716 },
4717 {/* hw:x,12 */
4718 .name = MSM_DAILINK_NAME(MultiMedia10),
4719 .stream_name = "MultiMedia10",
4720 .cpu_dai_name = "MultiMedia10",
4721 .platform_name = "msm-pcm-dsp.1",
4722 .dynamic = 1,
4723 .dpcm_playback = 1,
4724 .dpcm_capture = 1,
4725 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4726 SND_SOC_DPCM_TRIGGER_POST},
4727 .codec_dai_name = "snd-soc-dummy-dai",
4728 .codec_name = "snd-soc-dummy",
4729 .ignore_suspend = 1,
4730 .ignore_pmdown_time = 1,
4731 /* this dainlink has playback support */
4732 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
4733 },
4734 {/* hw:x,13 */
4735 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
4736 .stream_name = "MM_NOIRQ",
4737 .cpu_dai_name = "MultiMedia8",
4738 .platform_name = "msm-pcm-dsp-noirq",
4739 .dynamic = 1,
4740 .dpcm_playback = 1,
4741 .dpcm_capture = 1,
4742 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4743 SND_SOC_DPCM_TRIGGER_POST},
4744 .codec_dai_name = "snd-soc-dummy-dai",
4745 .codec_name = "snd-soc-dummy",
4746 .ignore_suspend = 1,
4747 .ignore_pmdown_time = 1,
4748 /* this dainlink has playback support */
4749 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
4750 .ops = &msm_fe_qos_ops,
4751 },
4752 /* HDMI Hostless */
4753 {/* hw:x,14 */
4754 .name = "HDMI_RX_HOSTLESS",
4755 .stream_name = "HDMI_RX_HOSTLESS",
4756 .cpu_dai_name = "HDMI_HOSTLESS",
4757 .platform_name = "msm-pcm-hostless",
4758 .dynamic = 1,
4759 .dpcm_playback = 1,
4760 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4761 SND_SOC_DPCM_TRIGGER_POST},
4762 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4763 .ignore_suspend = 1,
4764 .ignore_pmdown_time = 1,
4765 .codec_dai_name = "snd-soc-dummy-dai",
4766 .codec_name = "snd-soc-dummy",
4767 },
4768 {/* hw:x,15 */
4769 .name = "VoiceMMode2",
4770 .stream_name = "VoiceMMode2",
4771 .cpu_dai_name = "VoiceMMode2",
4772 .platform_name = "msm-pcm-voice",
4773 .dynamic = 1,
4774 .dpcm_playback = 1,
4775 .dpcm_capture = 1,
4776 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4777 SND_SOC_DPCM_TRIGGER_POST},
4778 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4779 .ignore_suspend = 1,
4780 .ignore_pmdown_time = 1,
4781 .codec_dai_name = "snd-soc-dummy-dai",
4782 .codec_name = "snd-soc-dummy",
4783 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
4784 },
4785 /* LSM FE */
4786 {/* hw:x,16 */
4787 .name = "Listen 2 Audio Service",
4788 .stream_name = "Listen 2 Audio Service",
4789 .cpu_dai_name = "LSM2",
4790 .platform_name = "msm-lsm-client",
4791 .dynamic = 1,
4792 .dpcm_capture = 1,
4793 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4794 SND_SOC_DPCM_TRIGGER_POST },
4795 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4796 .ignore_suspend = 1,
4797 .codec_dai_name = "snd-soc-dummy-dai",
4798 .codec_name = "snd-soc-dummy",
4799 .id = MSM_FRONTEND_DAI_LSM2,
4800 },
4801 {/* hw:x,17 */
4802 .name = "Listen 3 Audio Service",
4803 .stream_name = "Listen 3 Audio Service",
4804 .cpu_dai_name = "LSM3",
4805 .platform_name = "msm-lsm-client",
4806 .dynamic = 1,
4807 .dpcm_capture = 1,
4808 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4809 SND_SOC_DPCM_TRIGGER_POST },
4810 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4811 .ignore_suspend = 1,
4812 .codec_dai_name = "snd-soc-dummy-dai",
4813 .codec_name = "snd-soc-dummy",
4814 .id = MSM_FRONTEND_DAI_LSM3,
4815 },
4816 {/* hw:x,18 */
4817 .name = "Listen 4 Audio Service",
4818 .stream_name = "Listen 4 Audio Service",
4819 .cpu_dai_name = "LSM4",
4820 .platform_name = "msm-lsm-client",
4821 .dynamic = 1,
4822 .dpcm_capture = 1,
4823 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4824 SND_SOC_DPCM_TRIGGER_POST },
4825 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4826 .ignore_suspend = 1,
4827 .codec_dai_name = "snd-soc-dummy-dai",
4828 .codec_name = "snd-soc-dummy",
4829 .id = MSM_FRONTEND_DAI_LSM4,
4830 },
4831 {/* hw:x,19 */
4832 .name = "Listen 5 Audio Service",
4833 .stream_name = "Listen 5 Audio Service",
4834 .cpu_dai_name = "LSM5",
4835 .platform_name = "msm-lsm-client",
4836 .dynamic = 1,
4837 .dpcm_capture = 1,
4838 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4839 SND_SOC_DPCM_TRIGGER_POST },
4840 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4841 .ignore_suspend = 1,
4842 .codec_dai_name = "snd-soc-dummy-dai",
4843 .codec_name = "snd-soc-dummy",
4844 .id = MSM_FRONTEND_DAI_LSM5,
4845 },
4846 {/* hw:x,20 */
4847 .name = "Listen 6 Audio Service",
4848 .stream_name = "Listen 6 Audio Service",
4849 .cpu_dai_name = "LSM6",
4850 .platform_name = "msm-lsm-client",
4851 .dynamic = 1,
4852 .dpcm_capture = 1,
4853 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4854 SND_SOC_DPCM_TRIGGER_POST },
4855 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4856 .ignore_suspend = 1,
4857 .codec_dai_name = "snd-soc-dummy-dai",
4858 .codec_name = "snd-soc-dummy",
4859 .id = MSM_FRONTEND_DAI_LSM6,
4860 },
4861 {/* hw:x,21 */
4862 .name = "Listen 7 Audio Service",
4863 .stream_name = "Listen 7 Audio Service",
4864 .cpu_dai_name = "LSM7",
4865 .platform_name = "msm-lsm-client",
4866 .dynamic = 1,
4867 .dpcm_capture = 1,
4868 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4869 SND_SOC_DPCM_TRIGGER_POST },
4870 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4871 .ignore_suspend = 1,
4872 .codec_dai_name = "snd-soc-dummy-dai",
4873 .codec_name = "snd-soc-dummy",
4874 .id = MSM_FRONTEND_DAI_LSM7,
4875 },
4876 {/* hw:x,22 */
4877 .name = "Listen 8 Audio Service",
4878 .stream_name = "Listen 8 Audio Service",
4879 .cpu_dai_name = "LSM8",
4880 .platform_name = "msm-lsm-client",
4881 .dynamic = 1,
4882 .dpcm_capture = 1,
4883 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4884 SND_SOC_DPCM_TRIGGER_POST },
4885 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4886 .ignore_suspend = 1,
4887 .codec_dai_name = "snd-soc-dummy-dai",
4888 .codec_name = "snd-soc-dummy",
4889 .id = MSM_FRONTEND_DAI_LSM8,
4890 },
4891 {/* hw:x,23 */
4892 .name = MSM_DAILINK_NAME(Media9),
4893 .stream_name = "MultiMedia9",
4894 .cpu_dai_name = "MultiMedia9",
4895 .platform_name = "msm-pcm-dsp.0",
4896 .dynamic = 1,
4897 .dpcm_playback = 1,
4898 .dpcm_capture = 1,
4899 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4900 SND_SOC_DPCM_TRIGGER_POST},
4901 .codec_dai_name = "snd-soc-dummy-dai",
4902 .codec_name = "snd-soc-dummy",
4903 .ignore_suspend = 1,
4904 /* this dainlink has playback support */
4905 .ignore_pmdown_time = 1,
4906 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
4907 },
4908 {/* hw:x,24 */
4909 .name = MSM_DAILINK_NAME(Compress4),
4910 .stream_name = "Compress4",
4911 .cpu_dai_name = "MultiMedia11",
4912 .platform_name = "msm-compress-dsp",
4913 .dynamic = 1,
4914 .dpcm_playback = 1,
4915 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4916 SND_SOC_DPCM_TRIGGER_POST},
4917 .codec_dai_name = "snd-soc-dummy-dai",
4918 .codec_name = "snd-soc-dummy",
4919 .ignore_suspend = 1,
4920 .ignore_pmdown_time = 1,
4921 /* this dainlink has playback support */
4922 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
4923 },
4924 {/* hw:x,25 */
4925 .name = MSM_DAILINK_NAME(Compress5),
4926 .stream_name = "Compress5",
4927 .cpu_dai_name = "MultiMedia12",
4928 .platform_name = "msm-compress-dsp",
4929 .dynamic = 1,
4930 .dpcm_playback = 1,
4931 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4932 SND_SOC_DPCM_TRIGGER_POST},
4933 .codec_dai_name = "snd-soc-dummy-dai",
4934 .codec_name = "snd-soc-dummy",
4935 .ignore_suspend = 1,
4936 .ignore_pmdown_time = 1,
4937 /* this dainlink has playback support */
4938 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
4939 },
4940 {/* hw:x,26 */
4941 .name = MSM_DAILINK_NAME(Compress6),
4942 .stream_name = "Compress6",
4943 .cpu_dai_name = "MultiMedia13",
4944 .platform_name = "msm-compress-dsp",
4945 .dynamic = 1,
4946 .dpcm_playback = 1,
4947 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4948 SND_SOC_DPCM_TRIGGER_POST},
4949 .codec_dai_name = "snd-soc-dummy-dai",
4950 .codec_name = "snd-soc-dummy",
4951 .ignore_suspend = 1,
4952 .ignore_pmdown_time = 1,
4953 /* this dainlink has playback support */
4954 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
4955 },
4956 {/* hw:x,27 */
4957 .name = MSM_DAILINK_NAME(Compress7),
4958 .stream_name = "Compress7",
4959 .cpu_dai_name = "MultiMedia14",
4960 .platform_name = "msm-compress-dsp",
4961 .dynamic = 1,
4962 .dpcm_playback = 1,
4963 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4964 SND_SOC_DPCM_TRIGGER_POST},
4965 .codec_dai_name = "snd-soc-dummy-dai",
4966 .codec_name = "snd-soc-dummy",
4967 .ignore_suspend = 1,
4968 .ignore_pmdown_time = 1,
4969 /* this dainlink has playback support */
4970 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
4971 },
4972 {/* hw:x,28 */
4973 .name = MSM_DAILINK_NAME(Compress8),
4974 .stream_name = "Compress8",
4975 .cpu_dai_name = "MultiMedia15",
4976 .platform_name = "msm-compress-dsp",
4977 .dynamic = 1,
4978 .dpcm_playback = 1,
4979 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4980 SND_SOC_DPCM_TRIGGER_POST},
4981 .codec_dai_name = "snd-soc-dummy-dai",
4982 .codec_name = "snd-soc-dummy",
4983 .ignore_suspend = 1,
4984 .ignore_pmdown_time = 1,
4985 /* this dainlink has playback support */
4986 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
4987 },
4988 {/* hw:x,29 */
4989 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
4990 .stream_name = "MM_NOIRQ_2",
4991 .cpu_dai_name = "MultiMedia16",
4992 .platform_name = "msm-pcm-dsp-noirq",
4993 .dynamic = 1,
4994 .dpcm_playback = 1,
4995 .dpcm_capture = 1,
4996 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4997 SND_SOC_DPCM_TRIGGER_POST},
4998 .codec_dai_name = "snd-soc-dummy-dai",
4999 .codec_name = "snd-soc-dummy",
5000 .ignore_suspend = 1,
5001 .ignore_pmdown_time = 1,
5002 /* this dainlink has playback support */
5003 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
5004 .ops = &msm_fe_qos_ops,
5005 },
5006 {/* hw:x,30 */
5007 .name = "CDC_DMA Hostless",
5008 .stream_name = "CDC_DMA Hostless",
5009 .cpu_dai_name = "CDC_DMA_HOSTLESS",
5010 .platform_name = "msm-pcm-hostless",
5011 .dynamic = 1,
5012 .dpcm_playback = 1,
5013 .dpcm_capture = 1,
5014 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5015 SND_SOC_DPCM_TRIGGER_POST},
5016 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5017 .ignore_suspend = 1,
5018 /* this dailink has playback support */
5019 .ignore_pmdown_time = 1,
5020 .codec_dai_name = "snd-soc-dummy-dai",
5021 .codec_name = "snd-soc-dummy",
5022 },
5023 {/* hw:x,31 */
5024 .name = "TX3_CDC_DMA Hostless",
5025 .stream_name = "TX3_CDC_DMA Hostless",
5026 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
5027 .platform_name = "msm-pcm-hostless",
5028 .dynamic = 1,
5029 .dpcm_capture = 1,
5030 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5031 SND_SOC_DPCM_TRIGGER_POST},
5032 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5033 .ignore_suspend = 1,
5034 .codec_dai_name = "snd-soc-dummy-dai",
5035 .codec_name = "snd-soc-dummy",
5036 },
5037 {/* hw:x,32 */
5038 .name = "Tertiary MI2S TX_Hostless",
5039 .stream_name = "Tertiary MI2S_TX Hostless Capture",
5040 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
5041 .platform_name = "msm-pcm-hostless",
5042 .dynamic = 1,
5043 .dpcm_capture = 1,
5044 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5045 SND_SOC_DPCM_TRIGGER_POST},
5046 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5047 .ignore_suspend = 1,
5048 .ignore_pmdown_time = 1,
5049 .codec_dai_name = "snd-soc-dummy-dai",
5050 .codec_name = "snd-soc-dummy",
5051 },
5052};
5053
5054static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]5055 {/* hw:x,33 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5056 .name = MSM_DAILINK_NAME(ASM Loopback),
5057 .stream_name = "MultiMedia6",
5058 .cpu_dai_name = "MultiMedia6",
5059 .platform_name = "msm-pcm-loopback",
5060 .dynamic = 1,
5061 .dpcm_playback = 1,
5062 .dpcm_capture = 1,
5063 .codec_dai_name = "snd-soc-dummy-dai",
5064 .codec_name = "snd-soc-dummy",
5065 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5066 SND_SOC_DPCM_TRIGGER_POST},
5067 .ignore_suspend = 1,
5068 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5069 .ignore_pmdown_time = 1,
5070 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
5071 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]5072 {/* hw:x,34 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5073 .name = "USB Audio Hostless",
5074 .stream_name = "USB Audio Hostless",
5075 .cpu_dai_name = "USBAUDIO_HOSTLESS",
5076 .platform_name = "msm-pcm-hostless",
5077 .dynamic = 1,
5078 .dpcm_playback = 1,
5079 .dpcm_capture = 1,
5080 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5081 SND_SOC_DPCM_TRIGGER_POST},
5082 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5083 .ignore_suspend = 1,
5084 .ignore_pmdown_time = 1,
5085 .codec_dai_name = "snd-soc-dummy-dai",
5086 .codec_name = "snd-soc-dummy",
5087 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]5088 {/* hw:x,35 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5089 .name = "SLIMBUS_7 Hostless",
5090 .stream_name = "SLIMBUS_7 Hostless",
5091 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
5092 .platform_name = "msm-pcm-hostless",
5093 .dynamic = 1,
5094 .dpcm_capture = 1,
5095 .dpcm_playback = 1,
5096 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5097 SND_SOC_DPCM_TRIGGER_POST},
5098 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5099 .ignore_suspend = 1,
5100 .ignore_pmdown_time = 1,
5101 .codec_dai_name = "snd-soc-dummy-dai",
5102 .codec_name = "snd-soc-dummy",
5103 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]5104 {/* hw:x,36 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5105 .name = "Compress Capture",
5106 .stream_name = "Compress9",
5107 .cpu_dai_name = "MultiMedia17",
5108 .platform_name = "msm-compress-dsp",
5109 .dynamic = 1,
5110 .dpcm_capture = 1,
5111 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5112 SND_SOC_DPCM_TRIGGER_POST},
5113 .codec_dai_name = "snd-soc-dummy-dai",
5114 .codec_name = "snd-soc-dummy",
5115 .ignore_suspend = 1,
5116 .ignore_pmdown_time = 1,
5117 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
5118 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]5119 {/* hw:x,37 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5120 .name = "SLIMBUS_8 Hostless",
5121 .stream_name = "SLIMBUS_8 Hostless",
5122 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
5123 .platform_name = "msm-pcm-hostless",
5124 .dynamic = 1,
5125 .dpcm_capture = 1,
5126 .dpcm_playback = 1,
5127 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5128 SND_SOC_DPCM_TRIGGER_POST},
5129 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5130 .ignore_suspend = 1,
5131 .ignore_pmdown_time = 1,
5132 .codec_dai_name = "snd-soc-dummy-dai",
5133 .codec_name = "snd-soc-dummy",
5134 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]5135 {/* hw:x,38 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5136 .name = LPASS_BE_TX_CDC_DMA_TX_5,
5137 .stream_name = "TX CDC DMA5 Capture",
5138 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
5139 .platform_name = "msm-pcm-hostless",
5140 .codec_name = "bolero_codec",
5141 .codec_dai_name = "tx_macro_tx3",
5142 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
5143 .be_hw_params_fixup = msm_be_hw_params_fixup,
5144 .ignore_suspend = 1,
5145 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5146 .ops = &msm_cdc_dma_be_ops,
5147 },
lintaopei746b0122021-03-16 19:35:42 +0800[diff] [blame]5148/*#if defined(CONFIG_T2M_SND_FP4)
5149 {
5150 .name = "Quinary MI2S RX_Hostless",
5151 .stream_name = "Quinary MI2S_RX Hostless Playback",
5152 .cpu_dai_name = "QUIN_MI2S_RX_HOSTLESS",
5153 .platform_name = "msm-pcm-hostless",
5154 .dynamic = 1,
5155 .dpcm_playback = 1,
5156 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5157 SND_SOC_DPCM_TRIGGER_POST},
5158 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5159 .ignore_suspend = 1,
5160 .ignore_pmdown_time = 1,
5161 .codec_dai_name = "snd-soc-dummy-dai",
5162 .codec_name = "snd-soc-dummy",
5163 },
5164 {
5165 .name = "Quinary MI2S TX_Hostless",
5166 .stream_name = "Quinary MI2S_TX Hostless Capture",
5167 .cpu_dai_name = "QUIN_MI2S_RX_HOSTLESS",
5168 .platform_name = "msm-pcm-hostless",
5169 .dynamic = 1,
5170 .dpcm_capture = 1,
5171 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5172 SND_SOC_DPCM_TRIGGER_POST},
5173 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5174 .ignore_suspend = 1,
5175 .ignore_pmdown_time = 1,
5176 .codec_dai_name = "snd-soc-dummy-dai",
5177 .codec_name = "snd-soc-dummy",
5178 },
5179#endif*/
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5180};
5181
5182static struct snd_soc_dai_link msm_common_be_dai_links[] = {
5183 /* Backend AFE DAI Links */
5184 {
5185 .name = LPASS_BE_AFE_PCM_RX,
5186 .stream_name = "AFE Playback",
5187 .cpu_dai_name = "msm-dai-q6-dev.224",
5188 .platform_name = "msm-pcm-routing",
5189 .codec_name = "msm-stub-codec.1",
5190 .codec_dai_name = "msm-stub-rx",
5191 .no_pcm = 1,
5192 .dpcm_playback = 1,
5193 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
5194 .be_hw_params_fixup = msm_be_hw_params_fixup,
5195 /* this dainlink has playback support */
5196 .ignore_pmdown_time = 1,
5197 .ignore_suspend = 1,
5198 },
5199 {
5200 .name = LPASS_BE_AFE_PCM_TX,
5201 .stream_name = "AFE Capture",
5202 .cpu_dai_name = "msm-dai-q6-dev.225",
5203 .platform_name = "msm-pcm-routing",
5204 .codec_name = "msm-stub-codec.1",
5205 .codec_dai_name = "msm-stub-tx",
5206 .no_pcm = 1,
5207 .dpcm_capture = 1,
5208 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
5209 .be_hw_params_fixup = msm_be_hw_params_fixup,
5210 .ignore_suspend = 1,
5211 },
5212 /* Incall Record Uplink BACK END DAI Link */
5213 {
5214 .name = LPASS_BE_INCALL_RECORD_TX,
5215 .stream_name = "Voice Uplink Capture",
5216 .cpu_dai_name = "msm-dai-q6-dev.32772",
5217 .platform_name = "msm-pcm-routing",
5218 .codec_name = "msm-stub-codec.1",
5219 .codec_dai_name = "msm-stub-tx",
5220 .no_pcm = 1,
5221 .dpcm_capture = 1,
5222 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
5223 .be_hw_params_fixup = msm_be_hw_params_fixup,
5224 .ignore_suspend = 1,
5225 },
5226 /* Incall Record Downlink BACK END DAI Link */
5227 {
5228 .name = LPASS_BE_INCALL_RECORD_RX,
5229 .stream_name = "Voice Downlink Capture",
5230 .cpu_dai_name = "msm-dai-q6-dev.32771",
5231 .platform_name = "msm-pcm-routing",
5232 .codec_name = "msm-stub-codec.1",
5233 .codec_dai_name = "msm-stub-tx",
5234 .no_pcm = 1,
5235 .dpcm_capture = 1,
5236 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
5237 .be_hw_params_fixup = msm_be_hw_params_fixup,
5238 .ignore_suspend = 1,
5239 },
5240 /* Incall Music BACK END DAI Link */
5241 {
5242 .name = LPASS_BE_VOICE_PLAYBACK_TX,
5243 .stream_name = "Voice Farend Playback",
5244 .cpu_dai_name = "msm-dai-q6-dev.32773",
5245 .platform_name = "msm-pcm-routing",
5246 .codec_name = "msm-stub-codec.1",
5247 .codec_dai_name = "msm-stub-rx",
5248 .no_pcm = 1,
5249 .dpcm_playback = 1,
5250 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
5251 .be_hw_params_fixup = msm_be_hw_params_fixup,
5252 .ignore_suspend = 1,
5253 .ignore_pmdown_time = 1,
5254 },
5255 /* Incall Music 2 BACK END DAI Link */
5256 {
5257 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
5258 .stream_name = "Voice2 Farend Playback",
5259 .cpu_dai_name = "msm-dai-q6-dev.32770",
5260 .platform_name = "msm-pcm-routing",
5261 .codec_name = "msm-stub-codec.1",
5262 .codec_dai_name = "msm-stub-rx",
5263 .no_pcm = 1,
5264 .dpcm_playback = 1,
5265 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
5266 .be_hw_params_fixup = msm_be_hw_params_fixup,
5267 .ignore_suspend = 1,
5268 .ignore_pmdown_time = 1,
5269 },
Samyak Jainc345c632020-04-05 21:41:23 +0530[diff] [blame]5270 /* Proxy Tx BACK END DAI Link */
5271 {
5272 .name = LPASS_BE_PROXY_TX,
5273 .stream_name = "Proxy Capture",
5274 .cpu_dai_name = "msm-dai-q6-dev.8195",
5275 .platform_name = "msm-pcm-routing",
5276 .codec_name = "msm-stub-codec.1",
5277 .codec_dai_name = "msm-stub-tx",
5278 .no_pcm = 1,
5279 .dpcm_capture = 1,
5280 .id = MSM_BACKEND_DAI_PROXY_TX,
5281 .ignore_suspend = 1,
5282 },
5283 /* Proxy Rx BACK END DAI Link */
5284 {
5285 .name = LPASS_BE_PROXY_RX,
5286 .stream_name = "Proxy Playback",
5287 .cpu_dai_name = "msm-dai-q6-dev.8194",
5288 .platform_name = "msm-pcm-routing",
5289 .codec_name = "msm-stub-codec.1",
5290 .codec_dai_name = "msm-stub-rx",
5291 .no_pcm = 1,
5292 .dpcm_playback = 1,
5293 .id = MSM_BACKEND_DAI_PROXY_RX,
5294 .ignore_pmdown_time = 1,
5295 .ignore_suspend = 1,
5296 },
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5297 {
5298 .name = LPASS_BE_USB_AUDIO_RX,
5299 .stream_name = "USB Audio Playback",
5300 .cpu_dai_name = "msm-dai-q6-dev.28672",
5301 .platform_name = "msm-pcm-routing",
5302 .codec_name = "msm-stub-codec.1",
5303 .codec_dai_name = "msm-stub-rx",
5304 .dynamic_be = 1,
5305 .no_pcm = 1,
5306 .dpcm_playback = 1,
5307 .id = MSM_BACKEND_DAI_USB_RX,
5308 .be_hw_params_fixup = msm_be_hw_params_fixup,
5309 .ignore_pmdown_time = 1,
5310 .ignore_suspend = 1,
5311 },
5312 {
5313 .name = LPASS_BE_USB_AUDIO_TX,
5314 .stream_name = "USB Audio Capture",
5315 .cpu_dai_name = "msm-dai-q6-dev.28673",
5316 .platform_name = "msm-pcm-routing",
5317 .codec_name = "msm-stub-codec.1",
5318 .codec_dai_name = "msm-stub-tx",
5319 .no_pcm = 1,
5320 .dpcm_capture = 1,
5321 .id = MSM_BACKEND_DAI_USB_TX,
5322 .be_hw_params_fixup = msm_be_hw_params_fixup,
5323 .ignore_suspend = 1,
5324 },
Harshal Ahire42999452020-01-28 14:22:01 +0530[diff] [blame]5325};
5326
5327static struct snd_soc_dai_link msm_tdm_be_dai_links[] = {
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5328 {
5329 .name = LPASS_BE_PRI_TDM_RX_0,
5330 .stream_name = "Primary TDM0 Playback",
5331 .cpu_dai_name = "msm-dai-q6-tdm.36864",
5332 .platform_name = "msm-pcm-routing",
5333 .codec_name = "msm-stub-codec.1",
5334 .codec_dai_name = "msm-stub-rx",
5335 .no_pcm = 1,
5336 .dpcm_playback = 1,
5337 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
5338 .be_hw_params_fixup = msm_be_hw_params_fixup,
5339 .ops = &bengal_tdm_be_ops,
5340 .ignore_suspend = 1,
5341 .ignore_pmdown_time = 1,
5342 },
5343 {
5344 .name = LPASS_BE_PRI_TDM_TX_0,
5345 .stream_name = "Primary TDM0 Capture",
5346 .cpu_dai_name = "msm-dai-q6-tdm.36865",
5347 .platform_name = "msm-pcm-routing",
5348 .codec_name = "msm-stub-codec.1",
5349 .codec_dai_name = "msm-stub-tx",
5350 .no_pcm = 1,
5351 .dpcm_capture = 1,
5352 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
5353 .be_hw_params_fixup = msm_be_hw_params_fixup,
5354 .ops = &bengal_tdm_be_ops,
5355 .ignore_suspend = 1,
5356 },
5357 {
5358 .name = LPASS_BE_SEC_TDM_RX_0,
5359 .stream_name = "Secondary TDM0 Playback",
5360 .cpu_dai_name = "msm-dai-q6-tdm.36880",
5361 .platform_name = "msm-pcm-routing",
5362 .codec_name = "msm-stub-codec.1",
5363 .codec_dai_name = "msm-stub-rx",
5364 .no_pcm = 1,
5365 .dpcm_playback = 1,
5366 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
5367 .be_hw_params_fixup = msm_be_hw_params_fixup,
5368 .ops = &bengal_tdm_be_ops,
5369 .ignore_suspend = 1,
5370 .ignore_pmdown_time = 1,
5371 },
5372 {
5373 .name = LPASS_BE_SEC_TDM_TX_0,
5374 .stream_name = "Secondary TDM0 Capture",
5375 .cpu_dai_name = "msm-dai-q6-tdm.36881",
5376 .platform_name = "msm-pcm-routing",
5377 .codec_name = "msm-stub-codec.1",
5378 .codec_dai_name = "msm-stub-tx",
5379 .no_pcm = 1,
5380 .dpcm_capture = 1,
5381 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
5382 .be_hw_params_fixup = msm_be_hw_params_fixup,
5383 .ops = &bengal_tdm_be_ops,
5384 .ignore_suspend = 1,
5385 },
5386 {
5387 .name = LPASS_BE_TERT_TDM_RX_0,
5388 .stream_name = "Tertiary TDM0 Playback",
5389 .cpu_dai_name = "msm-dai-q6-tdm.36896",
5390 .platform_name = "msm-pcm-routing",
5391 .codec_name = "msm-stub-codec.1",
5392 .codec_dai_name = "msm-stub-rx",
5393 .no_pcm = 1,
5394 .dpcm_playback = 1,
5395 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
5396 .be_hw_params_fixup = msm_be_hw_params_fixup,
5397 .ops = &bengal_tdm_be_ops,
5398 .ignore_suspend = 1,
5399 .ignore_pmdown_time = 1,
5400 },
5401 {
5402 .name = LPASS_BE_TERT_TDM_TX_0,
5403 .stream_name = "Tertiary TDM0 Capture",
5404 .cpu_dai_name = "msm-dai-q6-tdm.36897",
5405 .platform_name = "msm-pcm-routing",
5406 .codec_name = "msm-stub-codec.1",
5407 .codec_dai_name = "msm-stub-tx",
5408 .no_pcm = 1,
5409 .dpcm_capture = 1,
5410 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
5411 .be_hw_params_fixup = msm_be_hw_params_fixup,
5412 .ops = &bengal_tdm_be_ops,
5413 .ignore_suspend = 1,
5414 },
5415 {
5416 .name = LPASS_BE_QUAT_TDM_RX_0,
5417 .stream_name = "Quaternary TDM0 Playback",
5418 .cpu_dai_name = "msm-dai-q6-tdm.36912",
5419 .platform_name = "msm-pcm-routing",
5420 .codec_name = "msm-stub-codec.1",
5421 .codec_dai_name = "msm-stub-rx",
5422 .no_pcm = 1,
5423 .dpcm_playback = 1,
5424 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
5425 .be_hw_params_fixup = msm_be_hw_params_fixup,
5426 .ops = &bengal_tdm_be_ops,
5427 .ignore_suspend = 1,
5428 .ignore_pmdown_time = 1,
5429 },
5430 {
5431 .name = LPASS_BE_QUAT_TDM_TX_0,
5432 .stream_name = "Quaternary TDM0 Capture",
5433 .cpu_dai_name = "msm-dai-q6-tdm.36913",
5434 .platform_name = "msm-pcm-routing",
5435 .codec_name = "msm-stub-codec.1",
5436 .codec_dai_name = "msm-stub-tx",
5437 .no_pcm = 1,
5438 .dpcm_capture = 1,
5439 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
5440 .be_hw_params_fixup = msm_be_hw_params_fixup,
5441 .ops = &bengal_tdm_be_ops,
5442 .ignore_suspend = 1,
5443 },
5444};
5445
5446static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
5447 {
5448 .name = LPASS_BE_SLIMBUS_7_RX,
5449 .stream_name = "Slimbus7 Playback",
5450 .cpu_dai_name = "msm-dai-q6-dev.16398",
5451 .platform_name = "msm-pcm-routing",
5452 .codec_name = "btfmslim_slave",
5453 /* BT codec driver determines capabilities based on
5454 * dai name, bt codecdai name should always contains
5455 * supported usecase information
5456 */
5457 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
5458 .no_pcm = 1,
5459 .dpcm_playback = 1,
5460 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
5461 .be_hw_params_fixup = msm_be_hw_params_fixup,
5462 .init = &msm_wcn_init,
5463 .ops = &msm_wcn_ops,
5464 /* dai link has playback support */
5465 .ignore_pmdown_time = 1,
5466 .ignore_suspend = 1,
5467 },
5468 {
5469 .name = LPASS_BE_SLIMBUS_7_TX,
5470 .stream_name = "Slimbus7 Capture",
5471 .cpu_dai_name = "msm-dai-q6-dev.16399",
5472 .platform_name = "msm-pcm-routing",
5473 .codec_name = "btfmslim_slave",
5474 .codec_dai_name = "btfm_bt_sco_slim_tx",
5475 .no_pcm = 1,
5476 .dpcm_capture = 1,
5477 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
5478 .be_hw_params_fixup = msm_be_hw_params_fixup,
5479 .ops = &msm_wcn_ops,
5480 .ignore_suspend = 1,
5481 },
5482 {
5483 .name = LPASS_BE_SLIMBUS_8_TX,
5484 .stream_name = "Slimbus8 Capture",
5485 .cpu_dai_name = "msm-dai-q6-dev.16401",
5486 .platform_name = "msm-pcm-routing",
5487 .codec_name = "btfmslim_slave",
5488 .codec_dai_name = "btfm_fm_slim_tx",
5489 .no_pcm = 1,
5490 .dpcm_capture = 1,
5491 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
5492 .be_hw_params_fixup = msm_be_hw_params_fixup,
5493 .ops = &msm_wcn_ops,
5494 .ignore_suspend = 1,
5495 },
5496};
lintaopei746b0122021-03-16 19:35:42 +0800[diff] [blame]5497#if defined(CONFIG_T2M_SND_FP4)
5498struct snd_soc_dai_link_component awinic_codecs[] = {
5499 {
5500 .of_node = NULL,
5501 .dai_name = "aw882xx-aif-l",
5502 .name = "aw882xx_smartpa_l",
5503 },
5504 {
5505 .of_node = NULL,
5506 .dai_name = "aw882xx-aif-r",
5507 .name = "aw882xx_smartpa_r",
5508 },
5509};
5510#endif
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5511static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
5512 {
5513 .name = LPASS_BE_PRI_MI2S_RX,
5514 .stream_name = "Primary MI2S Playback",
5515 .cpu_dai_name = "msm-dai-q6-mi2s.0",
5516 .platform_name = "msm-pcm-routing",
5517 .codec_name = "msm-stub-codec.1",
5518 .codec_dai_name = "msm-stub-rx",
5519 .no_pcm = 1,
5520 .dpcm_playback = 1,
5521 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
5522 .be_hw_params_fixup = msm_be_hw_params_fixup,
5523 .ops = &msm_mi2s_be_ops,
5524 .ignore_suspend = 1,
5525 .ignore_pmdown_time = 1,
5526 },
5527 {
5528 .name = LPASS_BE_PRI_MI2S_TX,
5529 .stream_name = "Primary MI2S Capture",
5530 .cpu_dai_name = "msm-dai-q6-mi2s.0",
5531 .platform_name = "msm-pcm-routing",
5532 .codec_name = "msm-stub-codec.1",
5533 .codec_dai_name = "msm-stub-tx",
5534 .no_pcm = 1,
5535 .dpcm_capture = 1,
5536 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
5537 .be_hw_params_fixup = msm_be_hw_params_fixup,
5538 .ops = &msm_mi2s_be_ops,
5539 .ignore_suspend = 1,
5540 },
5541 {
5542 .name = LPASS_BE_SEC_MI2S_RX,
5543 .stream_name = "Secondary MI2S Playback",
5544 .cpu_dai_name = "msm-dai-q6-mi2s.1",
5545 .platform_name = "msm-pcm-routing",
5546 .codec_name = "msm-stub-codec.1",
5547 .codec_dai_name = "msm-stub-rx",
5548 .no_pcm = 1,
5549 .dpcm_playback = 1,
5550 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
5551 .be_hw_params_fixup = msm_be_hw_params_fixup,
5552 .ops = &msm_mi2s_be_ops,
5553 .ignore_suspend = 1,
5554 .ignore_pmdown_time = 1,
5555 },
5556 {
5557 .name = LPASS_BE_SEC_MI2S_TX,
5558 .stream_name = "Secondary MI2S Capture",
5559 .cpu_dai_name = "msm-dai-q6-mi2s.1",
5560 .platform_name = "msm-pcm-routing",
5561 .codec_name = "msm-stub-codec.1",
5562 .codec_dai_name = "msm-stub-tx",
5563 .no_pcm = 1,
5564 .dpcm_capture = 1,
5565 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
5566 .be_hw_params_fixup = msm_be_hw_params_fixup,
5567 .ops = &msm_mi2s_be_ops,
5568 .ignore_suspend = 1,
5569 },
5570 {
5571 .name = LPASS_BE_TERT_MI2S_RX,
5572 .stream_name = "Tertiary MI2S Playback",
5573 .cpu_dai_name = "msm-dai-q6-mi2s.2",
5574 .platform_name = "msm-pcm-routing",
5575 .codec_name = "msm-stub-codec.1",
5576 .codec_dai_name = "msm-stub-rx",
5577 .no_pcm = 1,
5578 .dpcm_playback = 1,
5579 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
5580 .be_hw_params_fixup = msm_be_hw_params_fixup,
5581 .ops = &msm_mi2s_be_ops,
5582 .ignore_suspend = 1,
5583 .ignore_pmdown_time = 1,
5584 },
5585 {
5586 .name = LPASS_BE_TERT_MI2S_TX,
5587 .stream_name = "Tertiary MI2S Capture",
5588 .cpu_dai_name = "msm-dai-q6-mi2s.2",
5589 .platform_name = "msm-pcm-routing",
5590 .codec_name = "msm-stub-codec.1",
5591 .codec_dai_name = "msm-stub-tx",
5592 .no_pcm = 1,
5593 .dpcm_capture = 1,
5594 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
5595 .be_hw_params_fixup = msm_be_hw_params_fixup,
5596 .ops = &msm_mi2s_be_ops,
5597 .ignore_suspend = 1,
5598 },
5599 {
5600 .name = LPASS_BE_QUAT_MI2S_RX,
5601 .stream_name = "Quaternary MI2S Playback",
5602 .cpu_dai_name = "msm-dai-q6-mi2s.3",
5603 .platform_name = "msm-pcm-routing",
5604 .codec_name = "msm-stub-codec.1",
5605 .codec_dai_name = "msm-stub-rx",
5606 .no_pcm = 1,
5607 .dpcm_playback = 1,
5608 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
5609 .be_hw_params_fixup = msm_be_hw_params_fixup,
5610 .ops = &msm_mi2s_be_ops,
5611 .ignore_suspend = 1,
5612 .ignore_pmdown_time = 1,
5613 },
5614 {
5615 .name = LPASS_BE_QUAT_MI2S_TX,
5616 .stream_name = "Quaternary MI2S Capture",
5617 .cpu_dai_name = "msm-dai-q6-mi2s.3",
5618 .platform_name = "msm-pcm-routing",
5619 .codec_name = "msm-stub-codec.1",
5620 .codec_dai_name = "msm-stub-tx",
5621 .no_pcm = 1,
5622 .dpcm_capture = 1,
5623 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
5624 .be_hw_params_fixup = msm_be_hw_params_fixup,
5625 .ops = &msm_mi2s_be_ops,
5626 .ignore_suspend = 1,
5627 },
5628};
5629
5630static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
5631 /* Primary AUX PCM Backend DAI Links */
5632 {
5633 .name = LPASS_BE_AUXPCM_RX,
5634 .stream_name = "AUX PCM Playback",
5635 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5636 .platform_name = "msm-pcm-routing",
5637 .codec_name = "msm-stub-codec.1",
5638 .codec_dai_name = "msm-stub-rx",
5639 .no_pcm = 1,
5640 .dpcm_playback = 1,
5641 .id = MSM_BACKEND_DAI_AUXPCM_RX,
5642 .be_hw_params_fixup = msm_be_hw_params_fixup,
5643 .ops = &bengal_aux_be_ops,
5644 .ignore_pmdown_time = 1,
5645 .ignore_suspend = 1,
5646 },
5647 {
5648 .name = LPASS_BE_AUXPCM_TX,
5649 .stream_name = "AUX PCM Capture",
5650 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5651 .platform_name = "msm-pcm-routing",
5652 .codec_name = "msm-stub-codec.1",
5653 .codec_dai_name = "msm-stub-tx",
5654 .no_pcm = 1,
5655 .dpcm_capture = 1,
5656 .id = MSM_BACKEND_DAI_AUXPCM_TX,
5657 .be_hw_params_fixup = msm_be_hw_params_fixup,
5658 .ops = &bengal_aux_be_ops,
5659 .ignore_suspend = 1,
5660 },
5661 /* Secondary AUX PCM Backend DAI Links */
5662 {
5663 .name = LPASS_BE_SEC_AUXPCM_RX,
5664 .stream_name = "Sec AUX PCM Playback",
5665 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
5666 .platform_name = "msm-pcm-routing",
5667 .codec_name = "msm-stub-codec.1",
5668 .codec_dai_name = "msm-stub-rx",
5669 .no_pcm = 1,
5670 .dpcm_playback = 1,
5671 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
5672 .be_hw_params_fixup = msm_be_hw_params_fixup,
5673 .ops = &bengal_aux_be_ops,
5674 .ignore_pmdown_time = 1,
5675 .ignore_suspend = 1,
5676 },
5677 {
5678 .name = LPASS_BE_SEC_AUXPCM_TX,
5679 .stream_name = "Sec AUX PCM Capture",
5680 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
5681 .platform_name = "msm-pcm-routing",
5682 .codec_name = "msm-stub-codec.1",
5683 .codec_dai_name = "msm-stub-tx",
5684 .no_pcm = 1,
5685 .dpcm_capture = 1,
5686 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
5687 .be_hw_params_fixup = msm_be_hw_params_fixup,
5688 .ops = &bengal_aux_be_ops,
5689 .ignore_suspend = 1,
5690 },
5691 /* Tertiary AUX PCM Backend DAI Links */
5692 {
5693 .name = LPASS_BE_TERT_AUXPCM_RX,
5694 .stream_name = "Tert AUX PCM Playback",
5695 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
5696 .platform_name = "msm-pcm-routing",
5697 .codec_name = "msm-stub-codec.1",
5698 .codec_dai_name = "msm-stub-rx",
5699 .no_pcm = 1,
5700 .dpcm_playback = 1,
5701 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
5702 .be_hw_params_fixup = msm_be_hw_params_fixup,
5703 .ops = &bengal_aux_be_ops,
5704 .ignore_suspend = 1,
5705 },
5706 {
5707 .name = LPASS_BE_TERT_AUXPCM_TX,
5708 .stream_name = "Tert AUX PCM Capture",
5709 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
5710 .platform_name = "msm-pcm-routing",
5711 .codec_name = "msm-stub-codec.1",
5712 .codec_dai_name = "msm-stub-tx",
5713 .no_pcm = 1,
5714 .dpcm_capture = 1,
5715 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
5716 .be_hw_params_fixup = msm_be_hw_params_fixup,
5717 .ops = &bengal_aux_be_ops,
5718 .ignore_suspend = 1,
5719 },
5720 /* Quaternary AUX PCM Backend DAI Links */
5721 {
5722 .name = LPASS_BE_QUAT_AUXPCM_RX,
5723 .stream_name = "Quat AUX PCM Playback",
5724 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
5725 .platform_name = "msm-pcm-routing",
5726 .codec_name = "msm-stub-codec.1",
5727 .codec_dai_name = "msm-stub-rx",
5728 .no_pcm = 1,
5729 .dpcm_playback = 1,
5730 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
5731 .be_hw_params_fixup = msm_be_hw_params_fixup,
5732 .ops = &bengal_aux_be_ops,
5733 .ignore_suspend = 1,
5734 },
5735 {
5736 .name = LPASS_BE_QUAT_AUXPCM_TX,
5737 .stream_name = "Quat AUX PCM Capture",
5738 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
5739 .platform_name = "msm-pcm-routing",
5740 .codec_name = "msm-stub-codec.1",
5741 .codec_dai_name = "msm-stub-tx",
5742 .no_pcm = 1,
5743 .dpcm_capture = 1,
5744 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
5745 .be_hw_params_fixup = msm_be_hw_params_fixup,
5746 .ops = &bengal_aux_be_ops,
5747 .ignore_suspend = 1,
5748 },
5749};
5750
5751static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
5752 /* RX CDC DMA Backend DAI Links */
5753 {
5754 .name = LPASS_BE_RX_CDC_DMA_RX_0,
5755 .stream_name = "RX CDC DMA0 Playback",
5756 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
5757 .platform_name = "msm-pcm-routing",
5758 .codec_name = "bolero_codec",
5759 .codec_dai_name = "rx_macro_rx1",
5760 .dynamic_be = 1,
5761 .no_pcm = 1,
5762 .dpcm_playback = 1,
5763 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
5764 .be_hw_params_fixup = msm_be_hw_params_fixup,
5765 .ignore_pmdown_time = 1,
5766 .ignore_suspend = 1,
5767 .ops = &msm_cdc_dma_be_ops,
5768 },
5769 {
5770 .name = LPASS_BE_RX_CDC_DMA_RX_1,
5771 .stream_name = "RX CDC DMA1 Playback",
5772 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
5773 .platform_name = "msm-pcm-routing",
5774 .codec_name = "bolero_codec",
5775 .codec_dai_name = "rx_macro_rx2",
5776 .dynamic_be = 1,
5777 .no_pcm = 1,
5778 .dpcm_playback = 1,
5779 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
5780 .be_hw_params_fixup = msm_be_hw_params_fixup,
5781 .ignore_pmdown_time = 1,
5782 .ignore_suspend = 1,
5783 .ops = &msm_cdc_dma_be_ops,
5784 },
5785 {
5786 .name = LPASS_BE_RX_CDC_DMA_RX_2,
5787 .stream_name = "RX CDC DMA2 Playback",
5788 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
5789 .platform_name = "msm-pcm-routing",
5790 .codec_name = "bolero_codec",
5791 .codec_dai_name = "rx_macro_rx3",
5792 .dynamic_be = 1,
5793 .no_pcm = 1,
5794 .dpcm_playback = 1,
5795 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
5796 .be_hw_params_fixup = msm_be_hw_params_fixup,
5797 .ignore_pmdown_time = 1,
5798 .ignore_suspend = 1,
5799 .ops = &msm_cdc_dma_be_ops,
5800 },
5801 {
5802 .name = LPASS_BE_RX_CDC_DMA_RX_3,
5803 .stream_name = "RX CDC DMA3 Playback",
5804 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
5805 .platform_name = "msm-pcm-routing",
5806 .codec_name = "bolero_codec",
5807 .codec_dai_name = "rx_macro_rx4",
5808 .dynamic_be = 1,
5809 .no_pcm = 1,
5810 .dpcm_playback = 1,
5811 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
5812 .be_hw_params_fixup = msm_be_hw_params_fixup,
5813 .ignore_pmdown_time = 1,
5814 .ignore_suspend = 1,
5815 .ops = &msm_cdc_dma_be_ops,
5816 },
5817 /* TX CDC DMA Backend DAI Links */
5818 {
5819 .name = LPASS_BE_TX_CDC_DMA_TX_3,
5820 .stream_name = "TX CDC DMA3 Capture",
5821 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
5822 .platform_name = "msm-pcm-routing",
5823 .codec_name = "bolero_codec",
5824 .codec_dai_name = "tx_macro_tx1",
5825 .no_pcm = 1,
5826 .dpcm_capture = 1,
5827 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
5828 .be_hw_params_fixup = msm_be_hw_params_fixup,
5829 .ignore_suspend = 1,
5830 .ops = &msm_cdc_dma_be_ops,
5831 },
5832 {
5833 .name = LPASS_BE_TX_CDC_DMA_TX_4,
5834 .stream_name = "TX CDC DMA4 Capture",
5835 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
5836 .platform_name = "msm-pcm-routing",
5837 .codec_name = "bolero_codec",
5838 .codec_dai_name = "tx_macro_tx2",
5839 .no_pcm = 1,
5840 .dpcm_capture = 1,
5841 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
5842 .be_hw_params_fixup = msm_be_hw_params_fixup,
5843 .ignore_suspend = 1,
5844 .ops = &msm_cdc_dma_be_ops,
5845 },
5846};
5847
5848static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
5849 {
5850 .name = LPASS_BE_VA_CDC_DMA_TX_0,
5851 .stream_name = "VA CDC DMA0 Capture",
5852 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
5853 .platform_name = "msm-pcm-routing",
5854 .codec_name = "bolero_codec",
5855 .codec_dai_name = "va_macro_tx1",
5856 .no_pcm = 1,
5857 .dpcm_capture = 1,
5858 .init = &msm_int_audrx_init,
5859 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
5860 .be_hw_params_fixup = msm_be_hw_params_fixup,
5861 .ignore_suspend = 1,
5862 .ops = &msm_cdc_dma_be_ops,
5863 },
5864 {
5865 .name = LPASS_BE_VA_CDC_DMA_TX_1,
5866 .stream_name = "VA CDC DMA1 Capture",
5867 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
5868 .platform_name = "msm-pcm-routing",
5869 .codec_name = "bolero_codec",
5870 .codec_dai_name = "va_macro_tx2",
5871 .no_pcm = 1,
5872 .dpcm_capture = 1,
5873 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
5874 .be_hw_params_fixup = msm_be_hw_params_fixup,
5875 .ignore_suspend = 1,
5876 .ops = &msm_cdc_dma_be_ops,
5877 },
5878 {
5879 .name = LPASS_BE_VA_CDC_DMA_TX_2,
5880 .stream_name = "VA CDC DMA2 Capture",
5881 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
5882 .platform_name = "msm-pcm-routing",
5883 .codec_name = "bolero_codec",
5884 .codec_dai_name = "va_macro_tx3",
5885 .no_pcm = 1,
5886 .dpcm_capture = 1,
5887 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
5888 .be_hw_params_fixup = msm_be_hw_params_fixup,
5889 .ignore_suspend = 1,
5890 .ops = &msm_cdc_dma_be_ops,
5891 },
5892};
5893
5894static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
5895 {
5896 .name = LPASS_BE_AFE_LOOPBACK_TX,
5897 .stream_name = "AFE Loopback Capture",
5898 .cpu_dai_name = "msm-dai-q6-dev.24577",
5899 .platform_name = "msm-pcm-routing",
5900 .codec_name = "msm-stub-codec.1",
5901 .codec_dai_name = "msm-stub-tx",
5902 .no_pcm = 1,
5903 .dpcm_capture = 1,
5904 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
5905 .be_hw_params_fixup = msm_be_hw_params_fixup,
5906 .ignore_pmdown_time = 1,
5907 .ignore_suspend = 1,
5908 },
5909};
5910
5911static struct snd_soc_dai_link msm_bengal_dai_links[
5912 ARRAY_SIZE(msm_common_dai_links) +
5913 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
5914 ARRAY_SIZE(msm_common_be_dai_links) +
5915 ARRAY_SIZE(msm_mi2s_be_dai_links) +
5916 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
5917 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
5918 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
5919 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
Harshal Ahire42999452020-01-28 14:22:01 +0530[diff] [blame]5920 ARRAY_SIZE(msm_wcn_btfm_be_dai_links) +
5921 ARRAY_SIZE(msm_tdm_be_dai_links)];
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5922
5923static int msm_populate_dai_link_component_of_node(
5924 struct snd_soc_card *card)
5925{
5926 int i, index, ret = 0;
5927 struct device *cdev = card->dev;
5928 struct snd_soc_dai_link *dai_link = card->dai_link;
5929 struct device_node *np;
5930
5931 if (!cdev) {
5932 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
5933 return -ENODEV;
5934 }
5935
5936 for (i = 0; i < card->num_links; i++) {
5937 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
5938 continue;
5939
5940 /* populate platform_of_node for snd card dai links */
5941 if (dai_link[i].platform_name &&
5942 !dai_link[i].platform_of_node) {
5943 index = of_property_match_string(cdev->of_node,
5944 "asoc-platform-names",
5945 dai_link[i].platform_name);
5946 if (index < 0) {
5947 dev_err(cdev,
5948 "%s: No match found for platform name: %s\n",
5949 __func__, dai_link[i].platform_name);
5950 ret = index;
5951 goto err;
5952 }
5953 np = of_parse_phandle(cdev->of_node, "asoc-platform",
5954 index);
5955 if (!np) {
5956 dev_err(cdev,
5957 "%s: retrieving phandle for platform %s, index %d failed\n",
5958 __func__, dai_link[i].platform_name,
5959 index);
5960 ret = -ENODEV;
5961 goto err;
5962 }
5963 dai_link[i].platform_of_node = np;
5964 dai_link[i].platform_name = NULL;
5965 }
5966
5967 /* populate cpu_of_node for snd card dai links */
5968 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
5969 index = of_property_match_string(cdev->of_node,
5970 "asoc-cpu-names",
5971 dai_link[i].cpu_dai_name);
5972 if (index >= 0) {
5973 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
5974 index);
5975 if (!np) {
5976 dev_err(cdev,
5977 "%s: retrieving phandle for cpu dai %s failed\n",
5978 __func__,
5979 dai_link[i].cpu_dai_name);
5980 ret = -ENODEV;
5981 goto err;
5982 }
5983 dai_link[i].cpu_of_node = np;
5984 dai_link[i].cpu_dai_name = NULL;
5985 }
5986 }
5987
5988 /* populate codec_of_node for snd card dai links */
5989 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
5990 index = of_property_match_string(cdev->of_node,
5991 "asoc-codec-names",
5992 dai_link[i].codec_name);
5993 if (index < 0)
5994 continue;
5995 np = of_parse_phandle(cdev->of_node, "asoc-codec",
5996 index);
5997 if (!np) {
5998 dev_err(cdev,
5999 "%s: retrieving phandle for codec %s failed\n",
6000 __func__, dai_link[i].codec_name);
6001 ret = -ENODEV;
6002 goto err;
6003 }
6004 dai_link[i].codec_of_node = np;
6005 dai_link[i].codec_name = NULL;
6006 }
6007 }
6008
6009err:
6010 return ret;
6011}
6012
6013static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
6014{
6015 int ret = -EINVAL;
6016 struct snd_soc_component *component =
6017 snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
6018
6019 if (!component) {
6020 pr_err("* %s: No match for msm-stub-codec component\n",
6021 __func__);
6022 return ret;
6023 }
6024
6025 ret = snd_soc_add_component_controls(component, msm_snd_controls,
6026 ARRAY_SIZE(msm_snd_controls));
6027 if (ret < 0) {
6028 dev_err(component->dev,
6029 "%s: add_codec_controls failed, err = %d\n",
6030 __func__, ret);
6031 return ret;
6032 }
6033
6034 return ret;
6035}
6036
6037static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
6038 struct snd_pcm_hw_params *params)
6039{
6040 return 0;
6041}
6042
6043static struct snd_soc_ops msm_stub_be_ops = {
6044 .hw_params = msm_snd_stub_hw_params,
6045};
6046
6047struct snd_soc_card snd_soc_card_stub_msm = {
6048 .name = "bengal-stub-snd-card",
6049};
6050
6051static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
6052 /* FrontEnd DAI Links */
6053 {
6054 .name = "MSMSTUB Media1",
6055 .stream_name = "MultiMedia1",
6056 .cpu_dai_name = "MultiMedia1",
6057 .platform_name = "msm-pcm-dsp.0",
6058 .dynamic = 1,
6059 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6060 .dpcm_playback = 1,
6061 .dpcm_capture = 1,
6062 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6063 SND_SOC_DPCM_TRIGGER_POST},
6064 .codec_dai_name = "snd-soc-dummy-dai",
6065 .codec_name = "snd-soc-dummy",
6066 .ignore_suspend = 1,
6067 /* this dainlink has playback support */
6068 .ignore_pmdown_time = 1,
6069 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
6070 },
6071};
6072
6073static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
6074 /* Backend DAI Links */
6075 {
6076 .name = LPASS_BE_AUXPCM_RX,
6077 .stream_name = "AUX PCM Playback",
6078 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6079 .platform_name = "msm-pcm-routing",
6080 .codec_name = "msm-stub-codec.1",
6081 .codec_dai_name = "msm-stub-rx",
6082 .no_pcm = 1,
6083 .dpcm_playback = 1,
6084 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6085 .init = &msm_audrx_stub_init,
6086 .be_hw_params_fixup = msm_be_hw_params_fixup,
6087 .ignore_pmdown_time = 1,
6088 .ignore_suspend = 1,
6089 .ops = &msm_stub_be_ops,
6090 },
6091 {
6092 .name = LPASS_BE_AUXPCM_TX,
6093 .stream_name = "AUX PCM Capture",
6094 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6095 .platform_name = "msm-pcm-routing",
6096 .codec_name = "msm-stub-codec.1",
6097 .codec_dai_name = "msm-stub-tx",
6098 .no_pcm = 1,
6099 .dpcm_capture = 1,
6100 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6101 .be_hw_params_fixup = msm_be_hw_params_fixup,
6102 .ignore_suspend = 1,
6103 .ops = &msm_stub_be_ops,
6104 },
6105};
6106
6107static struct snd_soc_dai_link msm_stub_dai_links[
6108 ARRAY_SIZE(msm_stub_fe_dai_links) +
6109 ARRAY_SIZE(msm_stub_be_dai_links)];
6110
6111static const struct of_device_id bengal_asoc_machine_of_match[] = {
6112 { .compatible = "qcom,bengal-asoc-snd",
6113 .data = "codec"},
6114 { .compatible = "qcom,bengal-asoc-snd-stub",
6115 .data = "stub_codec"},
6116 {},
6117};
6118
Vatsal Bucha94bc9ea2020-05-21 12:04:20 +0530[diff] [blame]6119static int msm_snd_card_bengal_late_probe(struct snd_soc_card *card)
6120{
6121 struct snd_soc_component *component;
6122 struct platform_device *pdev = NULL;
6123 char *data = NULL;
6124 int ret = 0, i = 0;
6125 void *mbhc_calibration;
6126
6127 for (i = 0; i < card->num_aux_devs; i++)
6128 {
6129 if (msm_aux_dev[i].name != NULL ) {
6130 if (strstr(msm_aux_dev[i].name, "wsa"))
6131 continue;
6132 }
6133
6134 if (msm_aux_dev[i].codec_of_node) {
6135 pdev = of_find_device_by_node(
6136 msm_aux_dev[i].codec_of_node);
6137 if (pdev) {
6138 data = (char*) of_device_get_match_data(
6139 &pdev->dev);
6140 component = soc_find_component(
6141 msm_aux_dev[i].codec_of_node,
6142 NULL);
6143 }
6144 }
6145 }
6146
6147 if (data != NULL && component != NULL) {
6148 if (!strncmp(data, "wcd937x", sizeof("wcd937x"))) {
6149 mbhc_calibration = def_wcd_mbhc_cal();
6150 if (!mbhc_calibration)
6151 goto err_mbhc_cal;
6152 wcd_mbhc_cfg.calibration = mbhc_calibration;
6153 ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
6154 } else if (!strncmp( data, "rouleur", sizeof("rouleur"))) {
6155 mbhc_calibration = def_rouleur_mbhc_cal();
6156 if (!mbhc_calibration)
6157 goto err_mbhc_cal;
6158 wcd_mbhc_cfg.calibration = mbhc_calibration;
6159 ret = rouleur_mbhc_hs_detect(component, &wcd_mbhc_cfg);
6160 }
6161 }
6162
6163 if (ret) {
6164 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
6165 __func__, ret);
6166 goto err_hs_detect;
6167 }
6168 return 0;
6169
6170err_hs_detect:
6171 kfree(mbhc_calibration);
6172err_mbhc_cal:
6173 return ret;
6174}
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6175static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
6176{
6177 struct snd_soc_card *card = NULL;
6178 struct snd_soc_dai_link *dailink = NULL;
6179 int len_1 = 0;
6180 int len_2 = 0;
6181 int total_links = 0;
6182 int rc = 0;
6183 u32 mi2s_audio_intf = 0;
6184 u32 auxpcm_audio_intf = 0;
Laxminath Kasame1dc0d72019-11-05 21:19:45 +0530[diff] [blame]6185 u32 rxtx_bolero_codec = 0;
6186 u32 va_bolero_codec = 0;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6187 u32 val = 0;
6188 u32 wcn_btfm_intf = 0;
6189 const struct of_device_id *match;
6190
6191 match = of_match_node(bengal_asoc_machine_of_match, dev->of_node);
6192 if (!match) {
6193 dev_err(dev, "%s: No DT match found for sound card\n",
6194 __func__);
6195 return NULL;
6196 }
6197
6198 if (!strcmp(match->data, "codec")) {
6199 card = &snd_soc_card_bengal_msm;
6200
6201 memcpy(msm_bengal_dai_links + total_links,
6202 msm_common_dai_links,
6203 sizeof(msm_common_dai_links));
6204 total_links += ARRAY_SIZE(msm_common_dai_links);
6205
6206 memcpy(msm_bengal_dai_links + total_links,
6207 msm_common_misc_fe_dai_links,
6208 sizeof(msm_common_misc_fe_dai_links));
6209 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
6210
6211 memcpy(msm_bengal_dai_links + total_links,
6212 msm_common_be_dai_links,
6213 sizeof(msm_common_be_dai_links));
6214 total_links += ARRAY_SIZE(msm_common_be_dai_links);
6215
Laxminath Kasame1dc0d72019-11-05 21:19:45 +0530[diff] [blame]6216 rc = of_property_read_u32(dev->of_node,
6217 "qcom,rxtx-bolero-codec",
6218 &rxtx_bolero_codec);
6219 if (rc) {
6220 dev_dbg(dev, "%s: No DT match RXTX Macro codec\n",
6221 __func__);
6222 } else {
6223 if (rxtx_bolero_codec) {
6224 memcpy(msm_bengal_dai_links + total_links,
6225 msm_rx_tx_cdc_dma_be_dai_links,
6226 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
6227 total_links +=
6228 ARRAY_SIZE(
6229 msm_rx_tx_cdc_dma_be_dai_links);
6230 }
6231 }
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6232
Laxminath Kasame1dc0d72019-11-05 21:19:45 +0530[diff] [blame]6233 rc = of_property_read_u32(dev->of_node, "qcom,va-bolero-codec",
6234 &va_bolero_codec);
6235 if (rc) {
6236 dev_dbg(dev, "%s: No DT match VA Macro codec\n",
6237 __func__);
6238 } else {
6239 if (va_bolero_codec) {
6240 memcpy(msm_bengal_dai_links + total_links,
6241 msm_va_cdc_dma_be_dai_links,
6242 sizeof(msm_va_cdc_dma_be_dai_links));
6243 total_links +=
6244 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
6245 }
6246 }
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6247
6248 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
6249 &mi2s_audio_intf);
6250 if (rc) {
6251 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
6252 __func__);
6253 } else {
6254 if (mi2s_audio_intf) {
6255 memcpy(msm_bengal_dai_links + total_links,
6256 msm_mi2s_be_dai_links,
6257 sizeof(msm_mi2s_be_dai_links));
6258 total_links +=
6259 ARRAY_SIZE(msm_mi2s_be_dai_links);
6260 }
6261 }
6262
6263 rc = of_property_read_u32(dev->of_node,
6264 "qcom,auxpcm-audio-intf",
6265 &auxpcm_audio_intf);
6266 if (rc) {
6267 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
6268 __func__);
6269 } else {
6270 if (auxpcm_audio_intf) {
6271 memcpy(msm_bengal_dai_links + total_links,
6272 msm_auxpcm_be_dai_links,
6273 sizeof(msm_auxpcm_be_dai_links));
6274 total_links +=
6275 ARRAY_SIZE(msm_auxpcm_be_dai_links);
6276 }
6277 }
6278
6279 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
6280 &val);
6281 if (!rc && val) {
6282 memcpy(msm_bengal_dai_links + total_links,
6283 msm_afe_rxtx_lb_be_dai_link,
6284 sizeof(msm_afe_rxtx_lb_be_dai_link));
6285 total_links +=
6286 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
6287 }
6288
Harshal Ahire42999452020-01-28 14:22:01 +0530[diff] [blame]6289 rc = of_property_read_u32(dev->of_node, "qcom,tdm-audio-intf",
6290 &val);
6291 if (!rc && val) {
6292 memcpy(msm_bengal_dai_links + total_links,
6293 msm_tdm_be_dai_links,
6294 sizeof(msm_tdm_be_dai_links));
6295 total_links +=
6296 ARRAY_SIZE(msm_tdm_be_dai_links);
6297 }
6298
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6299 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
6300 &wcn_btfm_intf);
6301 if (rc) {
6302 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
6303 __func__);
6304 } else {
6305 if (wcn_btfm_intf) {
6306 memcpy(msm_bengal_dai_links + total_links,
6307 msm_wcn_btfm_be_dai_links,
6308 sizeof(msm_wcn_btfm_be_dai_links));
6309 total_links +=
6310 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
6311 }
6312 }
6313 dailink = msm_bengal_dai_links;
6314 } else if (!strcmp(match->data, "stub_codec")) {
6315 card = &snd_soc_card_stub_msm;
6316 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
6317 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
6318
6319 memcpy(msm_stub_dai_links,
6320 msm_stub_fe_dai_links,
6321 sizeof(msm_stub_fe_dai_links));
6322 memcpy(msm_stub_dai_links + len_1,
6323 msm_stub_be_dai_links,
6324 sizeof(msm_stub_be_dai_links));
6325
6326 dailink = msm_stub_dai_links;
6327 total_links = len_2;
6328 }
6329
6330 if (card) {
6331 card->dai_link = dailink;
6332 card->num_links = total_links;
Vatsal Bucha94bc9ea2020-05-21 12:04:20 +0530[diff] [blame]6333 card->late_probe = msm_snd_card_bengal_late_probe;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6334 }
6335
6336 return card;
6337}
6338
6339static int msm_aux_codec_init(struct snd_soc_component *component)
6340{
6341 struct snd_soc_dapm_context *dapm =
6342 snd_soc_component_get_dapm(component);
6343 int ret = 0;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6344 struct snd_info_entry *entry;
6345 struct snd_card *card = component->card->snd_card;
6346 struct msm_asoc_mach_data *pdata;
Aditya Bavanari707bf352020-03-12 12:30:10 +0530[diff] [blame]6347 struct platform_device *pdev = NULL;
6348 char *data = NULL;
6349 int i = 0;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6350
6351 snd_soc_dapm_ignore_suspend(dapm, "EAR");
6352 snd_soc_dapm_ignore_suspend(dapm, "AUX");
Aditya Bavanari707bf352020-03-12 12:30:10 +0530[diff] [blame]6353 snd_soc_dapm_ignore_suspend(dapm, "LO");
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6354 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
6355 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
6356 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
6357 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
6358 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
6359 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
6360 snd_soc_dapm_sync(dapm);
6361
6362 pdata = snd_soc_card_get_drvdata(component->card);
6363 if (!pdata->codec_root) {
6364 entry = snd_info_create_subdir(card->module, "codecs",
6365 card->proc_root);
6366 if (!entry) {
6367 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
6368 __func__);
6369 ret = 0;
Vatsal Bucha94bc9ea2020-05-21 12:04:20 +0530[diff] [blame]6370 goto err;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6371 }
6372 pdata->codec_root = entry;
6373 }
Aditya Bavanari707bf352020-03-12 12:30:10 +0530[diff] [blame]6374
6375 for (i = 0; i < component->card->num_aux_devs; i++)
6376 {
6377 if (msm_aux_dev[i].name != NULL ) {
6378 if (strstr(msm_aux_dev[i].name, "wsa"))
6379 continue;
6380 }
6381
6382 if (msm_aux_dev[i].codec_of_node) {
6383 pdev = of_find_device_by_node(
6384 msm_aux_dev[i].codec_of_node);
6385 if (pdev)
6386 data = (char*) of_device_get_match_data(
6387 &pdev->dev);
6388
6389 if (data != NULL) {
6390 if (!strncmp(data, "wcd937x",
6391 sizeof("wcd937x"))) {
6392 wcd937x_info_create_codec_entry(
6393 pdata->codec_root, component);
6394 break;
6395 } else if (!strncmp(data, "rouleur",
6396 sizeof("rouleur"))) {
6397 rouleur_info_create_codec_entry(
6398 pdata->codec_root, component);
6399 break;
6400 }
6401 }
6402 }
6403 }
Vatsal Bucha94bc9ea2020-05-21 12:04:20 +0530[diff] [blame]6404err:
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6405 return ret;
6406}
6407
6408static int msm_init_aux_dev(struct platform_device *pdev,
6409 struct snd_soc_card *card)
6410{
6411 struct device_node *wsa_of_node;
6412 struct device_node *aux_codec_of_node;
6413 u32 wsa_max_devs;
6414 u32 wsa_dev_cnt;
6415 u32 codec_max_aux_devs = 0;
6416 u32 codec_aux_dev_cnt = 0;
6417 int i;
6418 struct msm_wsa881x_dev_info *wsa881x_dev_info;
6419 struct aux_codec_dev_info *aux_cdc_dev_info;
6420 const char *auxdev_name_prefix[1];
6421 char *dev_name_str = NULL;
6422 int found = 0;
6423 int codecs_found = 0;
6424 int ret = 0;
6425
6426 /* Get maximum WSA device count for this platform */
6427 ret = of_property_read_u32(pdev->dev.of_node,
6428 "qcom,wsa-max-devs", &wsa_max_devs);
6429 if (ret) {
6430 dev_info(&pdev->dev,
6431 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
6432 __func__, pdev->dev.of_node->full_name, ret);
6433 wsa_max_devs = 0;
6434 goto codec_aux_dev;
6435 }
6436 if (wsa_max_devs == 0) {
6437 dev_warn(&pdev->dev,
6438 "%s: Max WSA devices is 0 for this target?\n",
6439 __func__);
6440 goto codec_aux_dev;
6441 }
6442
6443 /* Get count of WSA device phandles for this platform */
6444 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
6445 "qcom,wsa-devs", NULL);
6446 if (wsa_dev_cnt == -ENOENT) {
6447 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
6448 __func__);
6449 goto err;
6450 } else if (wsa_dev_cnt <= 0) {
6451 dev_err(&pdev->dev,
6452 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
6453 __func__, wsa_dev_cnt);
6454 ret = -EINVAL;
6455 goto err;
6456 }
6457
6458 /*
6459 * Expect total phandles count to be NOT less than maximum possible
6460 * WSA count. However, if it is less, then assign same value to
6461 * max count as well.
6462 */
6463 if (wsa_dev_cnt < wsa_max_devs) {
6464 dev_dbg(&pdev->dev,
6465 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
6466 __func__, wsa_max_devs, wsa_dev_cnt);
6467 wsa_max_devs = wsa_dev_cnt;
6468 }
6469
6470 /* Make sure prefix string passed for each WSA device */
6471 ret = of_property_count_strings(pdev->dev.of_node,
6472 "qcom,wsa-aux-dev-prefix");
6473 if (ret != wsa_dev_cnt) {
6474 dev_err(&pdev->dev,
6475 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
6476 __func__, wsa_dev_cnt, ret);
6477 ret = -EINVAL;
6478 goto err;
6479 }
6480
6481 /*
6482 * Alloc mem to store phandle and index info of WSA device, if already
6483 * registered with ALSA core
6484 */
6485 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
6486 sizeof(struct msm_wsa881x_dev_info),
6487 GFP_KERNEL);
6488 if (!wsa881x_dev_info) {
6489 ret = -ENOMEM;
6490 goto err;
6491 }
6492
6493 /*
6494 * search and check whether all WSA devices are already
6495 * registered with ALSA core or not. If found a node, store
6496 * the node and the index in a local array of struct for later
6497 * use.
6498 */
6499 for (i = 0; i < wsa_dev_cnt; i++) {
6500 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
6501 "qcom,wsa-devs", i);
6502 if (unlikely(!wsa_of_node)) {
6503 /* we should not be here */
6504 dev_err(&pdev->dev,
6505 "%s: wsa dev node is not present\n",
6506 __func__);
6507 ret = -EINVAL;
6508 goto err;
6509 }
Aditya Bavanari4fcf3b42020-06-02 16:00:14 +0530[diff] [blame]6510 if (soc_find_component_locked(wsa_of_node, NULL)) {
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6511 /* WSA device registered with ALSA core */
6512 wsa881x_dev_info[found].of_node = wsa_of_node;
6513 wsa881x_dev_info[found].index = i;
6514 found++;
6515 if (found == wsa_max_devs)
6516 break;
6517 }
6518 }
6519
6520 if (found < wsa_max_devs) {
6521 dev_dbg(&pdev->dev,
6522 "%s: failed to find %d components. Found only %d\n",
6523 __func__, wsa_max_devs, found);
6524 return -EPROBE_DEFER;
6525 }
6526 dev_info(&pdev->dev,
6527 "%s: found %d wsa881x devices registered with ALSA core\n",
6528 __func__, found);
6529
6530codec_aux_dev:
6531 /* Get maximum aux codec device count for this platform */
6532 ret = of_property_read_u32(pdev->dev.of_node,
6533 "qcom,codec-max-aux-devs",
6534 &codec_max_aux_devs);
6535 if (ret) {
6536 dev_err(&pdev->dev,
6537 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
6538 __func__, pdev->dev.of_node->full_name, ret);
6539 codec_max_aux_devs = 0;
6540 goto aux_dev_register;
6541 }
6542 if (codec_max_aux_devs == 0) {
6543 dev_dbg(&pdev->dev,
6544 "%s: Max aux codec devices is 0 for this target?\n",
6545 __func__);
6546 goto aux_dev_register;
6547 }
6548
6549 /* Get count of aux codec device phandles for this platform */
6550 codec_aux_dev_cnt = of_count_phandle_with_args(
6551 pdev->dev.of_node,
6552 "qcom,codec-aux-devs", NULL);
6553 if (codec_aux_dev_cnt == -ENOENT) {
6554 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
6555 __func__);
6556 goto err;
6557 } else if (codec_aux_dev_cnt <= 0) {
6558 dev_err(&pdev->dev,
6559 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
6560 __func__, codec_aux_dev_cnt);
6561 ret = -EINVAL;
6562 goto err;
6563 }
6564
6565 /*
6566 * Expect total phandles count to be NOT less than maximum possible
6567 * AUX device count. However, if it is less, then assign same value to
6568 * max count as well.
6569 */
6570 if (codec_aux_dev_cnt < codec_max_aux_devs) {
6571 dev_dbg(&pdev->dev,
6572 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
6573 __func__, codec_max_aux_devs,
6574 codec_aux_dev_cnt);
6575 codec_max_aux_devs = codec_aux_dev_cnt;
6576 }
6577
6578 /*
6579 * Alloc mem to store phandle and index info of aux codec
6580 * if already registered with ALSA core
6581 */
6582 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
6583 sizeof(struct aux_codec_dev_info),
6584 GFP_KERNEL);
6585 if (!aux_cdc_dev_info) {
6586 ret = -ENOMEM;
6587 goto err;
6588 }
6589
6590 /*
6591 * search and check whether all aux codecs are already
6592 * registered with ALSA core or not. If found a node, store
6593 * the node and the index in a local array of struct for later
6594 * use.
6595 */
6596 for (i = 0; i < codec_aux_dev_cnt; i++) {
6597 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
6598 "qcom,codec-aux-devs", i);
6599 if (unlikely(!aux_codec_of_node)) {
6600 /* we should not be here */
6601 dev_err(&pdev->dev,
6602 "%s: aux codec dev node is not present\n",
6603 __func__);
6604 ret = -EINVAL;
6605 goto err;
6606 }
Aditya Bavanari4fcf3b42020-06-02 16:00:14 +0530[diff] [blame]6607 if (soc_find_component_locked(aux_codec_of_node, NULL)) {
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6608 /* AUX codec registered with ALSA core */
6609 aux_cdc_dev_info[codecs_found].of_node =
6610 aux_codec_of_node;
6611 aux_cdc_dev_info[codecs_found].index = i;
6612 codecs_found++;
6613 }
6614 }
6615
6616 if (codecs_found < codec_aux_dev_cnt) {
6617 dev_dbg(&pdev->dev,
6618 "%s: failed to find %d components. Found only %d\n",
6619 __func__, codec_aux_dev_cnt, codecs_found);
6620 return -EPROBE_DEFER;
6621 }
6622 dev_info(&pdev->dev,
6623 "%s: found %d AUX codecs registered with ALSA core\n",
6624 __func__, codecs_found);
6625
6626aux_dev_register:
6627 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
6628 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
6629
6630 /* Alloc array of AUX devs struct */
6631 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
6632 sizeof(struct snd_soc_aux_dev),
6633 GFP_KERNEL);
6634 if (!msm_aux_dev) {
6635 ret = -ENOMEM;
6636 goto err;
6637 }
6638
6639 /* Alloc array of codec conf struct */
6640 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
6641 sizeof(struct snd_soc_codec_conf),
6642 GFP_KERNEL);
6643 if (!msm_codec_conf) {
6644 ret = -ENOMEM;
6645 goto err;
6646 }
6647
6648 for (i = 0; i < wsa_max_devs; i++) {
6649 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
6650 GFP_KERNEL);
6651 if (!dev_name_str) {
6652 ret = -ENOMEM;
6653 goto err;
6654 }
6655
6656 ret = of_property_read_string_index(pdev->dev.of_node,
6657 "qcom,wsa-aux-dev-prefix",
6658 wsa881x_dev_info[i].index,
6659 auxdev_name_prefix);
6660 if (ret) {
6661 dev_err(&pdev->dev,
6662 "%s: failed to read wsa aux dev prefix, ret = %d\n",
6663 __func__, ret);
6664 ret = -EINVAL;
6665 goto err;
6666 }
6667
6668 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
6669 msm_aux_dev[i].name = dev_name_str;
6670 msm_aux_dev[i].codec_name = NULL;
6671 msm_aux_dev[i].codec_of_node =
6672 wsa881x_dev_info[i].of_node;
6673 msm_aux_dev[i].init = NULL;
6674 msm_codec_conf[i].dev_name = NULL;
6675 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
6676 msm_codec_conf[i].of_node =
6677 wsa881x_dev_info[i].of_node;
6678 }
6679
6680 for (i = 0; i < codec_aux_dev_cnt; i++) {
6681 msm_aux_dev[wsa_max_devs + i].name = NULL;
6682 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
6683 msm_aux_dev[wsa_max_devs + i].codec_of_node =
6684 aux_cdc_dev_info[i].of_node;
6685 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
6686 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
6687 msm_codec_conf[wsa_max_devs + i].name_prefix =
6688 NULL;
6689 msm_codec_conf[wsa_max_devs + i].of_node =
6690 aux_cdc_dev_info[i].of_node;
6691 }
6692
6693 card->codec_conf = msm_codec_conf;
6694 card->aux_dev = msm_aux_dev;
6695err:
6696 return ret;
6697}
6698
6699static void msm_i2s_auxpcm_init(struct platform_device *pdev)
6700{
6701 int count = 0;
6702 u32 mi2s_master_slave[MI2S_MAX];
6703 int ret = 0;
6704
6705 for (count = 0; count < MI2S_MAX; count++) {
6706 mutex_init(&mi2s_intf_conf[count].lock);
6707 mi2s_intf_conf[count].ref_cnt = 0;
6708 }
6709
6710 ret = of_property_read_u32_array(pdev->dev.of_node,
6711 "qcom,msm-mi2s-master",
6712 mi2s_master_slave, MI2S_MAX);
6713 if (ret) {
6714 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
6715 __func__);
6716 } else {
6717 for (count = 0; count < MI2S_MAX; count++) {
6718 mi2s_intf_conf[count].msm_is_mi2s_master =
6719 mi2s_master_slave[count];
6720 }
6721 }
6722}
6723
6724static void msm_i2s_auxpcm_deinit(void)
6725{
6726 int count = 0;
6727
6728 for (count = 0; count < MI2S_MAX; count++) {
6729 mutex_destroy(&mi2s_intf_conf[count].lock);
6730 mi2s_intf_conf[count].ref_cnt = 0;
6731 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
6732 }
6733}
6734
6735static int bengal_ssr_enable(struct device *dev, void *data)
6736{
6737 struct platform_device *pdev = to_platform_device(dev);
6738 struct snd_soc_card *card = platform_get_drvdata(pdev);
6739 int ret = 0;
6740
6741 if (!card) {
6742 dev_err(dev, "%s: card is NULL\n", __func__);
6743 ret = -EINVAL;
6744 goto err;
6745 }
6746
6747 if (!strcmp(card->name, "bengal-stub-snd-card")) {
6748 /* TODO */
6749 dev_dbg(dev, "%s: TODO\n", __func__);
6750 }
6751
6752 snd_soc_card_change_online_state(card, 1);
6753 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
6754
6755err:
6756 return ret;
6757}
6758
6759static void bengal_ssr_disable(struct device *dev, void *data)
6760{
6761 struct platform_device *pdev = to_platform_device(dev);
6762 struct snd_soc_card *card = platform_get_drvdata(pdev);
6763
6764 if (!card) {
6765 dev_err(dev, "%s: card is NULL\n", __func__);
6766 return;
6767 }
6768
6769 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
6770 snd_soc_card_change_online_state(card, 0);
6771
6772 if (!strcmp(card->name, "bengal-stub-snd-card")) {
6773 /* TODO */
6774 dev_dbg(dev, "%s: TODO\n", __func__);
6775 }
6776}
6777
6778static const struct snd_event_ops bengal_ssr_ops = {
6779 .enable = bengal_ssr_enable,
6780 .disable = bengal_ssr_disable,
6781};
6782
6783static int msm_audio_ssr_compare(struct device *dev, void *data)
6784{
6785 struct device_node *node = data;
6786
6787 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
6788 __func__, dev->of_node, node);
6789 return (dev->of_node && dev->of_node == node);
6790}
6791
6792static int msm_audio_ssr_register(struct device *dev)
6793{
6794 struct device_node *np = dev->of_node;
6795 struct snd_event_clients *ssr_clients = NULL;
6796 struct device_node *node = NULL;
6797 int ret = 0;
6798 int i = 0;
6799
6800 for (i = 0; ; i++) {
6801 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
6802 if (!node)
6803 break;
6804 snd_event_mstr_add_client(&ssr_clients,
6805 msm_audio_ssr_compare, node);
6806 }
6807
6808 ret = snd_event_master_register(dev, &bengal_ssr_ops,
6809 ssr_clients, NULL);
6810 if (!ret)
6811 snd_event_notify(dev, SND_EVENT_UP);
6812
6813 return ret;
6814}
6815
lintaopei746b0122021-03-16 19:35:42 +0800[diff] [blame]6816#ifdef CONFIG_T2M_SND_FP4
6817int is_hac_pa_gpio_support(struct platform_device *pdev,
6818 struct msm_asoc_mach_data *pdata)
6819{
6820 const char *hac_pa_gpio = "qcom,msm-hac-pa-gpios";
6821 int ret = 0;
6822
6823 pr_debug("%s:Enter\n", __func__);
6824
6825 pdata->hac_pa_gpio_p= of_parse_phandle(pdev->dev.of_node,
6826 hac_pa_gpio, 0);
6827 if (!pdata->hac_pa_gpio_p) {
6828 dev_dbg(&pdev->dev, "property %s not detected in node %s",
6829 hac_pa_gpio, pdev->dev.of_node->full_name);
6830 } else {
6831 dev_dbg(&pdev->dev, "%s detected",
6832 hac_pa_gpio);
6833 if (pdata->hac_pa_gpio_p) {
6834 ret = msm_cdc_pinctrl_select_sleep_state(
6835 pdata->hac_pa_gpio_p);
6836 if (ret) {
6837 pr_err("%s: gpio set cannot be de-activated %s\n",
6838 __func__, "hac_pa");
6839 }
6840 }
6841 }
6842
6843 return 0;
6844}
6845#endif
6846
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6847static int msm_asoc_machine_probe(struct platform_device *pdev)
6848{
6849 struct snd_soc_card *card = NULL;
6850 struct msm_asoc_mach_data *pdata = NULL;
6851 const char *mbhc_audio_jack_type = NULL;
6852 int ret = 0;
6853 uint index = 0;
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame]6854 struct nvmem_cell *cell;
6855 size_t len;
6856 u32 *buf;
6857 u32 adsp_var_idx = 0;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6858
6859 if (!pdev->dev.of_node) {
6860 dev_err(&pdev->dev,
6861 "%s: No platform supplied from device tree\n",
6862 __func__);
6863 return -EINVAL;
6864 }
6865
6866 pdata = devm_kzalloc(&pdev->dev,
6867 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
6868 if (!pdata)
6869 return -ENOMEM;
6870
6871 card = populate_snd_card_dailinks(&pdev->dev);
6872 if (!card) {
6873 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
6874 ret = -EINVAL;
6875 goto err;
6876 }
6877
6878 card->dev = &pdev->dev;
6879 platform_set_drvdata(pdev, card);
6880 snd_soc_card_set_drvdata(card, pdata);
6881
6882 ret = snd_soc_of_parse_card_name(card, "qcom,model");
6883 if (ret) {
6884 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
6885 __func__, ret);
6886 goto err;
6887 }
6888
6889 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
6890 if (ret) {
6891 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
6892 __func__, ret);
6893 goto err;
6894 }
6895
6896 ret = msm_populate_dai_link_component_of_node(card);
6897 if (ret) {
6898 ret = -EPROBE_DEFER;
6899 goto err;
6900 }
6901
6902 ret = msm_init_aux_dev(pdev, card);
6903 if (ret)
6904 goto err;
6905
6906 ret = devm_snd_soc_register_card(&pdev->dev, card);
6907 if (ret == -EPROBE_DEFER) {
6908 if (codec_reg_done)
6909 ret = -EINVAL;
6910 goto err;
6911 } else if (ret) {
6912 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
6913 __func__, ret);
6914 goto err;
6915 }
6916 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
6917 __func__, card->name);
6918
6919 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
6920 "qcom,hph-en1-gpio", 0);
6921 if (!pdata->hph_en1_gpio_p) {
6922 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
6923 __func__, "qcom,hph-en1-gpio",
6924 pdev->dev.of_node->full_name);
6925 }
6926
6927 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
6928 "qcom,hph-en0-gpio", 0);
6929 if (!pdata->hph_en0_gpio_p) {
6930 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
6931 __func__, "qcom,hph-en0-gpio",
6932 pdev->dev.of_node->full_name);
6933 }
6934
6935 ret = of_property_read_string(pdev->dev.of_node,
6936 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
6937 if (ret) {
6938 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
6939 __func__, "qcom,mbhc-audio-jack-type",
6940 pdev->dev.of_node->full_name);
6941 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
6942 } else {
6943 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
6944 wcd_mbhc_cfg.enable_anc_mic_detect = false;
6945 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
6946 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
6947 wcd_mbhc_cfg.enable_anc_mic_detect = true;
6948 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
6949 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
6950 wcd_mbhc_cfg.enable_anc_mic_detect = true;
6951 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
6952 } else {
6953 wcd_mbhc_cfg.enable_anc_mic_detect = false;
6954 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
6955 }
6956 }
6957 /*
6958 * Parse US-Euro gpio info from DT. Report no error if us-euro
6959 * entry is not found in DT file as some targets do not support
6960 * US-Euro detection
6961 */
6962 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
6963 "qcom,us-euro-gpios", 0);
6964 if (!pdata->us_euro_gpio_p) {
6965 dev_dbg(&pdev->dev, "property %s not detected in node %s",
6966 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
6967 } else {
6968 dev_dbg(&pdev->dev, "%s detected\n",
6969 "qcom,us-euro-gpios");
6970 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
6971 }
lintaopei746b0122021-03-16 19:35:42 +0800[diff] [blame]6972#ifdef CONFIG_T2M_SND_FP4
6973 ret = is_hac_pa_gpio_support(pdev, pdata);
6974 if (ret < 0)
6975 pr_err("%s: doesn't support hac pa gpio\n",
6976 __func__);
6977#endif
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6978 if (wcd_mbhc_cfg.enable_usbc_analog)
6979 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
6980
6981 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
6982 "fsa4480-i2c-handle", 0);
6983 if (!pdata->fsa_handle)
6984 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
6985 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
6986
6987 msm_i2s_auxpcm_init(pdev);
6988 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
6989 "qcom,cdc-dmic01-gpios",
6990 0);
6991 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
6992 "qcom,cdc-dmic23-gpios",
6993 0);
6994
6995 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
6996 "qcom,pri-mi2s-gpios", 0);
6997 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
6998 "qcom,sec-mi2s-gpios", 0);
6999 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
7000 "qcom,tert-mi2s-gpios", 0);
7001 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
7002 "qcom,quat-mi2s-gpios", 0);
7003 for (index = PRIM_MI2S; index < MI2S_MAX; index++)
7004 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
7005
7006 ret = msm_audio_ssr_register(&pdev->dev);
7007 if (ret)
7008 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
7009 __func__, ret);
7010
7011 is_initial_boot = true;
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame]7012 /* get adsp variant idx */
7013 cell = nvmem_cell_get(&pdev->dev, "adsp_variant");
7014 if (IS_ERR_OR_NULL(cell)) {
7015 dev_dbg(&pdev->dev, "%s: FAILED to get nvmem cell \n", __func__);
7016 goto ret;
7017 }
7018 buf = nvmem_cell_read(cell, &len);
7019 nvmem_cell_put(cell);
Aditya Bavanarie88db602020-05-27 13:09:33 +0530[diff] [blame]7020 if (IS_ERR_OR_NULL(buf)) {
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame]7021 dev_dbg(&pdev->dev, "%s: FAILED to read nvmem cell \n", __func__);
7022 goto ret;
7023 }
Aditya Bavanarie88db602020-05-27 13:09:33 +0530[diff] [blame]7024 if (len <= 0 || len > sizeof(u32)) {
7025 dev_dbg(&pdev->dev, "%s: nvmem cell length out of range: %d\n",
7026 __func__, len);
7027 kfree(buf);
7028 goto ret;
7029 }
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame]7030 memcpy(&adsp_var_idx, buf, len);
7031 kfree(buf);
Laxminath Kasam37a89062020-01-07 14:53:01 +0530[diff] [blame]7032 pdata->va_disable = adsp_var_idx;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]7033
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame]7034ret:
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]7035 return 0;
7036err:
7037 devm_kfree(&pdev->dev, pdata);
7038 return ret;
7039}
7040
7041static int msm_asoc_machine_remove(struct platform_device *pdev)
7042{
7043 struct snd_soc_card *card = platform_get_drvdata(pdev);
7044
7045 snd_event_master_deregister(&pdev->dev);
7046 snd_soc_unregister_card(card);
7047 msm_i2s_auxpcm_deinit();
7048
7049 return 0;
7050}
7051
7052static struct platform_driver bengal_asoc_machine_driver = {
7053 .driver = {
7054 .name = DRV_NAME,
7055 .owner = THIS_MODULE,
7056 .pm = &snd_soc_pm_ops,
7057 .of_match_table = bengal_asoc_machine_of_match,
7058 .suppress_bind_attrs = true,
7059 },
7060 .probe = msm_asoc_machine_probe,
7061 .remove = msm_asoc_machine_remove,
7062};
7063module_platform_driver(bengal_asoc_machine_driver);
7064
7065MODULE_DESCRIPTION("ALSA SoC msm");
7066MODULE_LICENSE("GPL v2");
7067MODULE_ALIAS("platform:" DRV_NAME);
7068MODULE_DEVICE_TABLE(of, bengal_asoc_machine_of_match);