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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / d8bb93c41bb116b22ae1deb79cbb672b5b5e4ecd / . / asoc / kona.c
blob: 0272de53cd0a2fbb4af93b53011a1784c652f3f7 [file] [log] [blame]
Meng Wang688a8672019-01-29 13:43:33 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2/*
Xiao Lid8bb93c2020-01-07 12:59:05 +0800[diff] [blame^]3 * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]16#include <linux/soc/qcom/fsa4480-i2c.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]17#include <sound/core.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/info.h>
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]23#include <soc/snd_event.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]24#include <dsp/audio_notifier.h>
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -0800[diff] [blame]25#include <soc/swr-common.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]26#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]30#include "asoc/msm-cdc-pinctrl.h"
31#include "asoc/wcd-mbhc-v2.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]32#include "codecs/wcd938x/wcd938x-mbhc.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]33#include "codecs/wsa881x.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]34#include "codecs/wcd938x/wcd938x.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]35#include "codecs/bolero/bolero-cdc.h"
36#include <dt-bindings/sound/audio-codec-port-types.h>
37#include "codecs/bolero/wsa-macro.h"
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]38#include "kona-port-config.h"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]39
40#define DRV_NAME "kona-asoc-snd"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]41#define __CHIPSET__ "KONA "
42#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
43
44#define SAMPLING_RATE_8KHZ 8000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]45#define SAMPLING_RATE_11P025KHZ 11025
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]46#define SAMPLING_RATE_16KHZ 16000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]47#define SAMPLING_RATE_22P05KHZ 22050
48#define SAMPLING_RATE_32KHZ 32000
49#define SAMPLING_RATE_44P1KHZ 44100
50#define SAMPLING_RATE_48KHZ 48000
51#define SAMPLING_RATE_88P2KHZ 88200
52#define SAMPLING_RATE_96KHZ 96000
53#define SAMPLING_RATE_176P4KHZ 176400
54#define SAMPLING_RATE_192KHZ 192000
55#define SAMPLING_RATE_352P8KHZ 352800
56#define SAMPLING_RATE_384KHZ 384000
57
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]58#define IS_FRACTIONAL(x) \
59((x == SAMPLING_RATE_11P025KHZ) || (x == SAMPLING_RATE_22P05KHZ) || \
60(x == SAMPLING_RATE_44P1KHZ) || (x == SAMPLING_RATE_88P2KHZ) || \
61(x == SAMPLING_RATE_176P4KHZ) || (x == SAMPLING_RATE_352P8KHZ))
62
63#define IS_MSM_INTERFACE_MI2S(x) \
64((x == PRIM_MI2S) || (x == SEC_MI2S) || (x == TERT_MI2S))
65
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]66#define WCD9XXX_MBHC_DEF_RLOADS 5
67#define WCD9XXX_MBHC_DEF_BUTTONS 8
68#define CODEC_EXT_CLK_RATE 9600000
69#define ADSP_STATE_READY_TIMEOUT_MS 3000
70#define DEV_NAME_STR_LEN 32
71#define WCD_MBHC_HS_V_MAX 1600
72
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]73#define TDM_CHANNEL_MAX 8
74#define DEV_NAME_STR_LEN 32
75
76#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
77
78#define ADSP_STATE_READY_TIMEOUT_MS 3000
79
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]80#define WSA8810_NAME_1 "wsa881x.20170211"
81#define WSA8810_NAME_2 "wsa881x.20170212"
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]82#define WCN_CDC_SLIM_RX_CH_MAX 2
83#define WCN_CDC_SLIM_TX_CH_MAX 2
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]84#define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]85
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]86enum {
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]87 RX_PATH = 0,
88 TX_PATH,
89 MAX_PATH,
90};
91
92enum {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]93 TDM_0 = 0,
94 TDM_1,
95 TDM_2,
96 TDM_3,
97 TDM_4,
98 TDM_5,
99 TDM_6,
100 TDM_7,
101 TDM_PORT_MAX,
102};
103
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]104#define TDM_MAX_SLOTS 8
105#define TDM_SLOT_WIDTH_BITS 32
106
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]107enum {
108 TDM_PRI = 0,
109 TDM_SEC,
110 TDM_TERT,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]111 TDM_QUAT,
112 TDM_QUIN,
113 TDM_SEN,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]114 TDM_INTERFACE_MAX,
115};
116
117enum {
118 PRIM_AUX_PCM = 0,
119 SEC_AUX_PCM,
120 TERT_AUX_PCM,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]121 QUAT_AUX_PCM,
122 QUIN_AUX_PCM,
123 SEN_AUX_PCM,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]124 AUX_PCM_MAX,
125};
126
127enum {
128 PRIM_MI2S = 0,
129 SEC_MI2S,
130 TERT_MI2S,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]131 QUAT_MI2S,
132 QUIN_MI2S,
133 SEN_MI2S,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]134 MI2S_MAX,
135};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]136
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]137enum {
138 WSA_CDC_DMA_RX_0 = 0,
139 WSA_CDC_DMA_RX_1,
140 RX_CDC_DMA_RX_0,
141 RX_CDC_DMA_RX_1,
142 RX_CDC_DMA_RX_2,
143 RX_CDC_DMA_RX_3,
144 RX_CDC_DMA_RX_5,
145 CDC_DMA_RX_MAX,
146};
147
148enum {
149 WSA_CDC_DMA_TX_0 = 0,
150 WSA_CDC_DMA_TX_1,
151 WSA_CDC_DMA_TX_2,
152 TX_CDC_DMA_TX_0,
153 TX_CDC_DMA_TX_3,
154 TX_CDC_DMA_TX_4,
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]155 VA_CDC_DMA_TX_0,
156 VA_CDC_DMA_TX_1,
157 VA_CDC_DMA_TX_2,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]158 CDC_DMA_TX_MAX,
159};
160
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]161enum {
162 SLIM_RX_7 = 0,
163 SLIM_RX_MAX,
164};
165enum {
166 SLIM_TX_7 = 0,
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]167 SLIM_TX_8,
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]168 SLIM_TX_MAX,
169};
170
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]171enum {
172 AFE_LOOPBACK_TX_IDX = 0,
173 AFE_LOOPBACK_TX_IDX_MAX,
174};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]175struct msm_asoc_mach_data {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]176 struct snd_info_entry *codec_root;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]177 int usbc_en2_gpio; /* used by gpio driver API */
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]178 int lito_v2_enabled;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]179 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
180 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
181 struct device_node *dmic45_gpio_p; /* used by pinctrl API */
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]182 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
183 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]184 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
185 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
186 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
187 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
188 bool is_afe_config_done;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]189 struct device_node *fsa_handle;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]190 struct clk *lpass_audio_hw_vote;
191 int core_audio_vote_count;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]192};
193
194struct tdm_port {
195 u32 mode;
196 u32 channel;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]197};
198
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]199struct tdm_dev_config {
200 unsigned int tdm_slot_offset[TDM_MAX_SLOTS];
201};
202
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]203enum {
204 EXT_DISP_RX_IDX_DP = 0,
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]205 EXT_DISP_RX_IDX_DP1,
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]206 EXT_DISP_RX_IDX_MAX,
207};
208
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]209struct msm_wsa881x_dev_info {
210 struct device_node *of_node;
211 u32 index;
212};
213
214struct aux_codec_dev_info {
215 struct device_node *of_node;
216 u32 index;
217};
218
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]219struct dev_config {
220 u32 sample_rate;
221 u32 bit_format;
222 u32 channels;
223};
224
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]225/* Default configuration of slimbus channels */
226static struct dev_config slim_rx_cfg[] = {
227 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
228};
229
230static struct dev_config slim_tx_cfg[] = {
231 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]232 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]233};
234
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]235/* Default configuration of external display BE */
236static struct dev_config ext_disp_rx_cfg[] = {
237 [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]238 [EXT_DISP_RX_IDX_DP1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]239};
240
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]241static struct dev_config usb_rx_cfg = {
242 .sample_rate = SAMPLING_RATE_48KHZ,
243 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
244 .channels = 2,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]245};
246
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]247static struct dev_config usb_tx_cfg = {
248 .sample_rate = SAMPLING_RATE_48KHZ,
249 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
250 .channels = 1,
251};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]252
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]253static struct dev_config proxy_rx_cfg = {
254 .sample_rate = SAMPLING_RATE_48KHZ,
255 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
256 .channels = 2,
257};
258
259static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
260 {
261 AFE_API_VERSION_I2S_CONFIG,
262 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
263 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
264 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
265 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
266 0,
267 },
268 {
269 AFE_API_VERSION_I2S_CONFIG,
270 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
271 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
272 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
273 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
274 0,
275 },
276 {
277 AFE_API_VERSION_I2S_CONFIG,
278 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
279 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
280 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
281 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
282 0,
283 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]284 {
285 AFE_API_VERSION_I2S_CONFIG,
286 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
287 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
288 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
289 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
290 0,
291 },
292 {
293 AFE_API_VERSION_I2S_CONFIG,
294 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
295 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
296 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
297 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
298 0,
299 },
300 {
301 AFE_API_VERSION_I2S_CONFIG,
302 Q6AFE_LPASS_CLK_ID_SEN_MI2S_IBIT,
303 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
304 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
305 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
306 0,
307 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]308};
309
310struct mi2s_conf {
311 struct mutex lock;
312 u32 ref_cnt;
313 u32 msm_is_mi2s_master;
314};
315
316static u32 mi2s_ebit_clk[MI2S_MAX] = {
317 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
318 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
319 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
320};
321
322static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
323
324/* Default configuration of TDM channels */
325static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
326 { /* PRI TDM */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
335 },
336 { /* SEC TDM */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
345 },
346 { /* TERT TDM */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
349 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
350 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
351 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
352 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
353 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
354 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
355 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]356 { /* QUAT TDM */
357 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
358 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
359 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
360 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
361 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
362 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
363 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
364 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
365 },
366 { /* QUIN TDM */
367 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
368 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
369 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
370 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
371 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
372 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
373 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
374 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
375 },
376 { /* SEN TDM */
377 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
378 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
379 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
380 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
381 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
382 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
383 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
384 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
385 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]386};
387
388static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
389 { /* PRI TDM */
390 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
391 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
392 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
393 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
394 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
395 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
396 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
397 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
398 },
399 { /* SEC TDM */
400 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
401 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
402 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
403 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
404 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
405 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
406 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
407 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
408 },
409 { /* TERT TDM */
410 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
411 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
412 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
413 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
414 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
415 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
416 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
417 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
418 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]419 { /* QUAT TDM */
420 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
421 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
422 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
423 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
424 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
425 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
426 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
427 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
428 },
429 { /* QUIN TDM */
430 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
431 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
432 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
433 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
434 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
435 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
436 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
437 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
438 },
439 { /* SEN TDM */
440 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
441 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
442 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
443 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
444 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
445 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
446 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
447 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
448 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]449};
450
451/* Default configuration of AUX PCM channels */
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]452static struct dev_config aux_pcm_rx_cfg[] = {
453 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]454 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
455 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]456 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
457 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
458 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]459};
460
461static struct dev_config aux_pcm_tx_cfg[] = {
462 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]463 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
464 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]465 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
466 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
467 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]468};
469
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]470/* Default configuration of MI2S channels */
471static struct dev_config mi2s_rx_cfg[] = {
472 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
473 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
474 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]475 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
476 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
477 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]478};
479
480static struct dev_config mi2s_tx_cfg[] = {
481 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
482 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
483 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]484 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
485 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
486 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]487};
488
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]489static struct tdm_dev_config pri_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
490 { /* PRI TDM */
491 { {0, 4, 0xFFFF} }, /* RX_0 */
492 { {8, 12, 0xFFFF} }, /* RX_1 */
493 { {16, 20, 0xFFFF} }, /* RX_2 */
494 { {24, 28, 0xFFFF} }, /* RX_3 */
495 { {0xFFFF} }, /* RX_4 */
496 { {0xFFFF} }, /* RX_5 */
497 { {0xFFFF} }, /* RX_6 */
498 { {0xFFFF} }, /* RX_7 */
499 },
500 {
501 { {0, 4, 8, 12, 0xFFFF} }, /* TX_0 */
502 { {8, 12, 0xFFFF} }, /* TX_1 */
503 { {16, 20, 0xFFFF} }, /* TX_2 */
504 { {24, 28, 0xFFFF} }, /* TX_3 */
505 { {0xFFFF} }, /* TX_4 */
506 { {0xFFFF} }, /* TX_5 */
507 { {0xFFFF} }, /* TX_6 */
508 { {0xFFFF} }, /* TX_7 */
509 },
510};
511
512static struct tdm_dev_config sec_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
513 { /* SEC TDM */
514 { {0, 4, 0xFFFF} }, /* RX_0 */
515 { {8, 12, 0xFFFF} }, /* RX_1 */
516 { {16, 20, 0xFFFF} }, /* RX_2 */
517 { {24, 28, 0xFFFF} }, /* RX_3 */
518 { {0xFFFF} }, /* RX_4 */
519 { {0xFFFF} }, /* RX_5 */
520 { {0xFFFF} }, /* RX_6 */
521 { {0xFFFF} }, /* RX_7 */
522 },
523 {
524 { {0, 4, 0xFFFF} }, /* TX_0 */
525 { {8, 12, 0xFFFF} }, /* TX_1 */
526 { {16, 20, 0xFFFF} }, /* TX_2 */
527 { {24, 28, 0xFFFF} }, /* TX_3 */
528 { {0xFFFF} }, /* TX_4 */
529 { {0xFFFF} }, /* TX_5 */
530 { {0xFFFF} }, /* TX_6 */
531 { {0xFFFF} }, /* TX_7 */
532 },
533};
534
535static struct tdm_dev_config tert_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
536 { /* TERT TDM */
537 { {0, 4, 0xFFFF} }, /* RX_0 */
538 { {8, 12, 0xFFFF} }, /* RX_1 */
539 { {16, 20, 0xFFFF} }, /* RX_2 */
540 { {24, 28, 0xFFFF} }, /* RX_3 */
541 { {0xFFFF} }, /* RX_4 */
542 { {0xFFFF} }, /* RX_5 */
543 { {0xFFFF} }, /* RX_6 */
544 { {0xFFFF} }, /* RX_7 */
545 },
546 {
547 { {0, 4, 0xFFFF} }, /* TX_0 */
548 { {8, 12, 0xFFFF} }, /* TX_1 */
549 { {16, 20, 0xFFFF} }, /* TX_2 */
550 { {24, 28, 0xFFFF} }, /* TX_3 */
551 { {0xFFFF} }, /* TX_4 */
552 { {0xFFFF} }, /* TX_5 */
553 { {0xFFFF} }, /* TX_6 */
554 { {0xFFFF} }, /* TX_7 */
555 },
556};
557
558static struct tdm_dev_config quat_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
559 { /* QUAT TDM */
560 { {0, 4, 0xFFFF} }, /* RX_0 */
561 { {8, 12, 0xFFFF} }, /* RX_1 */
562 { {16, 20, 0xFFFF} }, /* RX_2 */
563 { {24, 28, 0xFFFF} }, /* RX_3 */
564 { {0xFFFF} }, /* RX_4 */
565 { {0xFFFF} }, /* RX_5 */
566 { {0xFFFF} }, /* RX_6 */
567 { {0xFFFF} }, /* RX_7 */
568 },
569 {
570 { {0, 4, 0xFFFF} }, /* TX_0 */
571 { {8, 12, 0xFFFF} }, /* TX_1 */
572 { {16, 20, 0xFFFF} }, /* TX_2 */
573 { {24, 28, 0xFFFF} }, /* TX_3 */
574 { {0xFFFF} }, /* TX_4 */
575 { {0xFFFF} }, /* TX_5 */
576 { {0xFFFF} }, /* TX_6 */
577 { {0xFFFF} }, /* TX_7 */
578 },
579};
580
581static struct tdm_dev_config quin_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
582 { /* QUIN TDM */
583 { {0, 4, 0xFFFF} }, /* RX_0 */
584 { {8, 12, 0xFFFF} }, /* RX_1 */
585 { {16, 20, 0xFFFF} }, /* RX_2 */
586 { {24, 28, 0xFFFF} }, /* RX_3 */
587 { {0xFFFF} }, /* RX_4 */
588 { {0xFFFF} }, /* RX_5 */
589 { {0xFFFF} }, /* RX_6 */
590 { {0xFFFF} }, /* RX_7 */
591 },
592 {
593 { {0, 4, 0xFFFF} }, /* TX_0 */
594 { {8, 12, 0xFFFF} }, /* TX_1 */
595 { {16, 20, 0xFFFF} }, /* TX_2 */
596 { {24, 28, 0xFFFF} }, /* TX_3 */
597 { {0xFFFF} }, /* TX_4 */
598 { {0xFFFF} }, /* TX_5 */
599 { {0xFFFF} }, /* TX_6 */
600 { {0xFFFF} }, /* TX_7 */
601 },
602};
603
604static struct tdm_dev_config sen_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
605 { /* SEN TDM */
606 { {0, 4, 0xFFFF} }, /* RX_0 */
607 { {8, 12, 0xFFFF} }, /* RX_1 */
608 { {16, 20, 0xFFFF} }, /* RX_2 */
609 { {24, 28, 0xFFFF} }, /* RX_3 */
610 { {0xFFFF} }, /* RX_4 */
611 { {0xFFFF} }, /* RX_5 */
612 { {0xFFFF} }, /* RX_6 */
613 { {0xFFFF} }, /* RX_7 */
614 },
615 {
616 { {0, 4, 0xFFFF} }, /* TX_0 */
617 { {8, 12, 0xFFFF} }, /* TX_1 */
618 { {16, 20, 0xFFFF} }, /* TX_2 */
619 { {24, 28, 0xFFFF} }, /* TX_3 */
620 { {0xFFFF} }, /* TX_4 */
621 { {0xFFFF} }, /* TX_5 */
622 { {0xFFFF} }, /* TX_6 */
623 { {0xFFFF} }, /* TX_7 */
624 },
625};
626
627static void *tdm_cfg[TDM_INTERFACE_MAX] = {
628 pri_tdm_dev_config,
629 sec_tdm_dev_config,
630 tert_tdm_dev_config,
631 quat_tdm_dev_config,
632 quin_tdm_dev_config,
633 sen_tdm_dev_config,
634};
635
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]636/* Default configuration of Codec DMA Interface RX */
637static struct dev_config cdc_dma_rx_cfg[] = {
638 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
639 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
640 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
641 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
642 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
643 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
644 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
645};
646
647/* Default configuration of Codec DMA Interface TX */
648static struct dev_config cdc_dma_tx_cfg[] = {
649 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
650 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
651 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
652 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
653 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
654 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]655 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
656 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
657 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]658};
659
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]660static struct dev_config afe_loopback_tx_cfg[] = {
661 [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
662};
663
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]664static int msm_vi_feed_tx_ch = 2;
665static const char *const vi_feed_ch_text[] = {"One", "Two"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]666static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
667 "S32_LE"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]668static char const *cdc80_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]669static char const *ch_text[] = {"Two", "Three", "Four", "Five",
670 "Six", "Seven", "Eight"};
671static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
672 "KHZ_16", "KHZ_22P05",
673 "KHZ_32", "KHZ_44P1", "KHZ_48",
674 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
675 "KHZ_192", "KHZ_352P8", "KHZ_384"};
676static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
677 "Five", "Six", "Seven",
678 "Eight"};
679static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
680 "KHZ_48", "KHZ_176P4",
681 "KHZ_352P8"};
682static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
683static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
684 "Five", "Six", "Seven", "Eight"};
685static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
686static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
687 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]688 "KHZ_48", "KHZ_88P2", "KHZ_96",
689 "KHZ_176P4", "KHZ_192","KHZ_352P8",
690 "KHZ_384"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]691static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
692 "Five", "Six", "Seven",
693 "Eight"};
694
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]695static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
696static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
697 "Five", "Six", "Seven",
698 "Eight"};
699static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
700 "KHZ_16", "KHZ_22P05",
701 "KHZ_32", "KHZ_44P1", "KHZ_48",
702 "KHZ_88P2", "KHZ_96",
703 "KHZ_176P4", "KHZ_192",
704 "KHZ_352P8", "KHZ_384"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]705static char const *cdc80_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
706 "KHZ_16", "KHZ_22P05",
707 "KHZ_32", "KHZ_44P1", "KHZ_48",
708 "KHZ_88P2", "KHZ_96",
709 "KHZ_176P4", "KHZ_192"};
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]710static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
711 "S24_3LE"};
712static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
713 "KHZ_192", "KHZ_32", "KHZ_44P1",
714 "KHZ_88P2", "KHZ_176P4"};
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]715static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
716 "KHZ_44P1", "KHZ_48",
717 "KHZ_88P2", "KHZ_96"};
718static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
719 "KHZ_44P1", "KHZ_48",
720 "KHZ_88P2", "KHZ_96"};
721static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
722 "KHZ_44P1", "KHZ_48",
723 "KHZ_88P2", "KHZ_96"};
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]724static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]725
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]726static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
727static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
728static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
729static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
730static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
731static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]732static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]733static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
734static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
735static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
736static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
737static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
738static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
739static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]740static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]741static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
742static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]743static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
744static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
745static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]746static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]747static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
748static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]749static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
750static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
751static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]752static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
753static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]754static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
755static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
756static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]757static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
758static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
759static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]760static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
761static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
762static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]763static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
764static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
765static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]766static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
767static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
768static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
769static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
770static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]771static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
772static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
773static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_chs, mi2s_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]774static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
775static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
776static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]777static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
778static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
779static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_chs, mi2s_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]780static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
781static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
782static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
783static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
784static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
785static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
786static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
787static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
788static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
789static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
790static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
791static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
792static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]793static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
794static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
795static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]796static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
797static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]798static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
799static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
800static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
801static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
802static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]803static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
804static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
805static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]806static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
807 cdc_dma_sample_rate_text);
808static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
809 cdc_dma_sample_rate_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]810static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
811 cdc_dma_sample_rate_text);
812static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
813 cdc_dma_sample_rate_text);
814static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
815 cdc_dma_sample_rate_text);
816static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
817 cdc_dma_sample_rate_text);
818static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
819 cdc_dma_sample_rate_text);
820static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
821 cdc_dma_sample_rate_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]822static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
823 cdc_dma_sample_rate_text);
824static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
825 cdc_dma_sample_rate_text);
826static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
827 cdc_dma_sample_rate_text);
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]828
829/* WCD9380 */
830static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_format, cdc80_bit_format_text);
831static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_format, cdc80_bit_format_text);
832static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_format, cdc80_bit_format_text);
833static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_format, cdc80_bit_format_text);
834static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_format, cdc80_bit_format_text);
835static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_sample_rate,
836 cdc80_dma_sample_rate_text);
837static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_sample_rate,
838 cdc80_dma_sample_rate_text);
839static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_sample_rate,
840 cdc80_dma_sample_rate_text);
841static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_sample_rate,
842 cdc80_dma_sample_rate_text);
843static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_sample_rate,
844 cdc80_dma_sample_rate_text);
845/* WCD9385 */
846static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_format, bit_format_text);
847static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_format, bit_format_text);
848static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_format, bit_format_text);
849static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_format, bit_format_text);
850static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_format, bit_format_text);
851static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_sample_rate,
852 cdc_dma_sample_rate_text);
853static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_sample_rate,
854 cdc_dma_sample_rate_text);
855static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_sample_rate,
856 cdc_dma_sample_rate_text);
857static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_sample_rate,
858 cdc_dma_sample_rate_text);
859static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_sample_rate,
860 cdc_dma_sample_rate_text);
861
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]862static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
863static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
864static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
865 ext_disp_sample_rate_text);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]866static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
867static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
868static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]869static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]870
871static bool is_initial_boot;
872static bool codec_reg_done;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]873static struct snd_soc_aux_dev *msm_aux_dev;
874static struct snd_soc_codec_conf *msm_codec_conf;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]875static struct snd_soc_card snd_soc_card_kona_msm;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]876static int dmic_0_1_gpio_cnt;
877static int dmic_2_3_gpio_cnt;
878static int dmic_4_5_gpio_cnt;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]879
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]880static void *def_wcd_mbhc_cal(void);
881
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]882/*
883 * Need to report LINEIN
884 * if R/L channel impedance is larger than 5K ohm
885 */
886static struct wcd_mbhc_config wcd_mbhc_cfg = {
887 .read_fw_bin = false,
888 .calibration = NULL,
889 .detect_extn_cable = true,
890 .mono_stero_detection = false,
891 .swap_gnd_mic = NULL,
892 .hs_ext_micbias = true,
893 .key_code[0] = KEY_MEDIA,
894 .key_code[1] = KEY_VOICECOMMAND,
895 .key_code[2] = KEY_VOLUMEUP,
896 .key_code[3] = KEY_VOLUMEDOWN,
897 .key_code[4] = 0,
898 .key_code[5] = 0,
899 .key_code[6] = 0,
900 .key_code[7] = 0,
901 .linein_th = 5000,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530[diff] [blame]902 .moisture_en = false,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]903 .mbhc_micbias = MIC_BIAS_2,
904 .anc_micbias = MIC_BIAS_2,
905 .enable_anc_mic_detect = false,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530[diff] [blame]906 .moisture_duty_cycle_en = true,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]907};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]908
909static inline int param_is_mask(int p)
910{
911 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
912 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
913}
914
915static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
916 int n)
917{
918 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
919}
920
921static void param_set_mask(struct snd_pcm_hw_params *p, int n,
922 unsigned int bit)
923{
924 if (bit >= SNDRV_MASK_MAX)
925 return;
926 if (param_is_mask(n)) {
927 struct snd_mask *m = param_to_mask(p, n);
928
929 m->bits[0] = 0;
930 m->bits[1] = 0;
931 m->bits[bit >> 5] |= (1 << (bit & 31));
932 }
933}
934
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]935static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
936 struct snd_ctl_elem_value *ucontrol)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]937{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]938 int sample_rate_val = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]939
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]940 switch (usb_rx_cfg.sample_rate) {
941 case SAMPLING_RATE_384KHZ:
942 sample_rate_val = 12;
943 break;
944 case SAMPLING_RATE_352P8KHZ:
945 sample_rate_val = 11;
946 break;
947 case SAMPLING_RATE_192KHZ:
948 sample_rate_val = 10;
949 break;
950 case SAMPLING_RATE_176P4KHZ:
951 sample_rate_val = 9;
952 break;
953 case SAMPLING_RATE_96KHZ:
954 sample_rate_val = 8;
955 break;
956 case SAMPLING_RATE_88P2KHZ:
957 sample_rate_val = 7;
958 break;
959 case SAMPLING_RATE_48KHZ:
960 sample_rate_val = 6;
961 break;
962 case SAMPLING_RATE_44P1KHZ:
963 sample_rate_val = 5;
964 break;
965 case SAMPLING_RATE_32KHZ:
966 sample_rate_val = 4;
967 break;
968 case SAMPLING_RATE_22P05KHZ:
969 sample_rate_val = 3;
970 break;
971 case SAMPLING_RATE_16KHZ:
972 sample_rate_val = 2;
973 break;
974 case SAMPLING_RATE_11P025KHZ:
975 sample_rate_val = 1;
976 break;
977 case SAMPLING_RATE_8KHZ:
978 default:
979 sample_rate_val = 0;
980 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]981 }
982
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]983 ucontrol->value.integer.value[0] = sample_rate_val;
984 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
985 usb_rx_cfg.sample_rate);
986 return 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]987}
988
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]989static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
990 struct snd_ctl_elem_value *ucontrol)
991{
992 switch (ucontrol->value.integer.value[0]) {
993 case 12:
994 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
995 break;
996 case 11:
997 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
998 break;
999 case 10:
1000 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1001 break;
1002 case 9:
1003 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1004 break;
1005 case 8:
1006 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1007 break;
1008 case 7:
1009 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1010 break;
1011 case 6:
1012 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1013 break;
1014 case 5:
1015 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1016 break;
1017 case 4:
1018 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1019 break;
1020 case 3:
1021 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1022 break;
1023 case 2:
1024 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1025 break;
1026 case 1:
1027 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1028 break;
1029 case 0:
1030 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1031 break;
1032 default:
1033 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1034 break;
1035 }
1036
1037 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1038 __func__, ucontrol->value.integer.value[0],
1039 usb_rx_cfg.sample_rate);
1040 return 0;
1041}
1042
1043static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1044 struct snd_ctl_elem_value *ucontrol)
1045{
1046 int sample_rate_val = 0;
1047
1048 switch (usb_tx_cfg.sample_rate) {
1049 case SAMPLING_RATE_384KHZ:
1050 sample_rate_val = 12;
1051 break;
1052 case SAMPLING_RATE_352P8KHZ:
1053 sample_rate_val = 11;
1054 break;
1055 case SAMPLING_RATE_192KHZ:
1056 sample_rate_val = 10;
1057 break;
1058 case SAMPLING_RATE_176P4KHZ:
1059 sample_rate_val = 9;
1060 break;
1061 case SAMPLING_RATE_96KHZ:
1062 sample_rate_val = 8;
1063 break;
1064 case SAMPLING_RATE_88P2KHZ:
1065 sample_rate_val = 7;
1066 break;
1067 case SAMPLING_RATE_48KHZ:
1068 sample_rate_val = 6;
1069 break;
1070 case SAMPLING_RATE_44P1KHZ:
1071 sample_rate_val = 5;
1072 break;
1073 case SAMPLING_RATE_32KHZ:
1074 sample_rate_val = 4;
1075 break;
1076 case SAMPLING_RATE_22P05KHZ:
1077 sample_rate_val = 3;
1078 break;
1079 case SAMPLING_RATE_16KHZ:
1080 sample_rate_val = 2;
1081 break;
1082 case SAMPLING_RATE_11P025KHZ:
1083 sample_rate_val = 1;
1084 break;
1085 case SAMPLING_RATE_8KHZ:
1086 sample_rate_val = 0;
1087 break;
1088 default:
1089 sample_rate_val = 6;
1090 break;
1091 }
1092
1093 ucontrol->value.integer.value[0] = sample_rate_val;
1094 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1095 usb_tx_cfg.sample_rate);
1096 return 0;
1097}
1098
1099static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1100 struct snd_ctl_elem_value *ucontrol)
1101{
1102 switch (ucontrol->value.integer.value[0]) {
1103 case 12:
1104 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1105 break;
1106 case 11:
1107 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1108 break;
1109 case 10:
1110 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1111 break;
1112 case 9:
1113 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1114 break;
1115 case 8:
1116 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1117 break;
1118 case 7:
1119 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1120 break;
1121 case 6:
1122 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1123 break;
1124 case 5:
1125 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1126 break;
1127 case 4:
1128 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1129 break;
1130 case 3:
1131 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1132 break;
1133 case 2:
1134 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1135 break;
1136 case 1:
1137 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1138 break;
1139 case 0:
1140 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1141 break;
1142 default:
1143 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1144 break;
1145 }
1146
1147 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1148 __func__, ucontrol->value.integer.value[0],
1149 usb_tx_cfg.sample_rate);
1150 return 0;
1151}
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]1152static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
1153 struct snd_ctl_elem_value *ucontrol)
1154{
1155 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1156 afe_loopback_tx_cfg[0].channels);
1157 ucontrol->value.enumerated.item[0] =
1158 afe_loopback_tx_cfg[0].channels - 1;
1159
1160 return 0;
1161}
1162
1163static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
1164 struct snd_ctl_elem_value *ucontrol)
1165{
1166 afe_loopback_tx_cfg[0].channels =
1167 ucontrol->value.enumerated.item[0] + 1;
1168 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1169 afe_loopback_tx_cfg[0].channels);
1170
1171 return 1;
1172}
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1173
1174static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1175 struct snd_ctl_elem_value *ucontrol)
1176{
1177 switch (usb_rx_cfg.bit_format) {
1178 case SNDRV_PCM_FORMAT_S32_LE:
1179 ucontrol->value.integer.value[0] = 3;
1180 break;
1181 case SNDRV_PCM_FORMAT_S24_3LE:
1182 ucontrol->value.integer.value[0] = 2;
1183 break;
1184 case SNDRV_PCM_FORMAT_S24_LE:
1185 ucontrol->value.integer.value[0] = 1;
1186 break;
1187 case SNDRV_PCM_FORMAT_S16_LE:
1188 default:
1189 ucontrol->value.integer.value[0] = 0;
1190 break;
1191 }
1192
1193 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1194 __func__, usb_rx_cfg.bit_format,
1195 ucontrol->value.integer.value[0]);
1196 return 0;
1197}
1198
1199static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1200 struct snd_ctl_elem_value *ucontrol)
1201{
1202 int rc = 0;
1203
1204 switch (ucontrol->value.integer.value[0]) {
1205 case 3:
1206 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1207 break;
1208 case 2:
1209 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1210 break;
1211 case 1:
1212 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1213 break;
1214 case 0:
1215 default:
1216 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1217 break;
1218 }
1219 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1220 __func__, usb_rx_cfg.bit_format,
1221 ucontrol->value.integer.value[0]);
1222
1223 return rc;
1224}
1225
1226static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1227 struct snd_ctl_elem_value *ucontrol)
1228{
1229 switch (usb_tx_cfg.bit_format) {
1230 case SNDRV_PCM_FORMAT_S32_LE:
1231 ucontrol->value.integer.value[0] = 3;
1232 break;
1233 case SNDRV_PCM_FORMAT_S24_3LE:
1234 ucontrol->value.integer.value[0] = 2;
1235 break;
1236 case SNDRV_PCM_FORMAT_S24_LE:
1237 ucontrol->value.integer.value[0] = 1;
1238 break;
1239 case SNDRV_PCM_FORMAT_S16_LE:
1240 default:
1241 ucontrol->value.integer.value[0] = 0;
1242 break;
1243 }
1244
1245 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1246 __func__, usb_tx_cfg.bit_format,
1247 ucontrol->value.integer.value[0]);
1248 return 0;
1249}
1250
1251static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1252 struct snd_ctl_elem_value *ucontrol)
1253{
1254 int rc = 0;
1255
1256 switch (ucontrol->value.integer.value[0]) {
1257 case 3:
1258 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1259 break;
1260 case 2:
1261 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1262 break;
1263 case 1:
1264 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1265 break;
1266 case 0:
1267 default:
1268 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1269 break;
1270 }
1271 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1272 __func__, usb_tx_cfg.bit_format,
1273 ucontrol->value.integer.value[0]);
1274
1275 return rc;
1276}
1277
1278static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1279 struct snd_ctl_elem_value *ucontrol)
1280{
1281 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1282 usb_rx_cfg.channels);
1283 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1284 return 0;
1285}
1286
1287static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1288 struct snd_ctl_elem_value *ucontrol)
1289{
1290 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1291
1292 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1293 return 1;
1294}
1295
1296static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1297 struct snd_ctl_elem_value *ucontrol)
1298{
1299 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1300 usb_tx_cfg.channels);
1301 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1302 return 0;
1303}
1304
1305static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1306 struct snd_ctl_elem_value *ucontrol)
1307{
1308 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1309
1310 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1311 return 1;
1312}
1313
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]1314static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1315 struct snd_ctl_elem_value *ucontrol)
1316{
1317 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1318 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1319 ucontrol->value.integer.value[0]);
1320 return 0;
1321}
1322
1323static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1324 struct snd_ctl_elem_value *ucontrol)
1325{
1326 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1327 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1328 return 1;
1329}
1330
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]1331static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1332{
1333 int idx = 0;
1334
1335 if (strnstr(kcontrol->id.name, "Display Port RX",
1336 sizeof("Display Port RX"))) {
1337 idx = EXT_DISP_RX_IDX_DP;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]1338 } else if (strnstr(kcontrol->id.name, "Display Port1 RX",
1339 sizeof("Display Port1 RX"))) {
1340 idx = EXT_DISP_RX_IDX_DP1;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]1341 } else {
1342 pr_err("%s: unsupported BE: %s\n",
1343 __func__, kcontrol->id.name);
1344 idx = -EINVAL;
1345 }
1346
1347 return idx;
1348}
1349
1350static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1351 struct snd_ctl_elem_value *ucontrol)
1352{
1353 int idx = ext_disp_get_port_idx(kcontrol);
1354
1355 if (idx < 0)
1356 return idx;
1357
1358 switch (ext_disp_rx_cfg[idx].bit_format) {
1359 case SNDRV_PCM_FORMAT_S24_3LE:
1360 ucontrol->value.integer.value[0] = 2;
1361 break;
1362 case SNDRV_PCM_FORMAT_S24_LE:
1363 ucontrol->value.integer.value[0] = 1;
1364 break;
1365 case SNDRV_PCM_FORMAT_S16_LE:
1366 default:
1367 ucontrol->value.integer.value[0] = 0;
1368 break;
1369 }
1370
1371 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1372 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1373 ucontrol->value.integer.value[0]);
1374 return 0;
1375}
1376
1377static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1378 struct snd_ctl_elem_value *ucontrol)
1379{
1380 int idx = ext_disp_get_port_idx(kcontrol);
1381
1382 if (idx < 0)
1383 return idx;
1384
1385 switch (ucontrol->value.integer.value[0]) {
1386 case 2:
1387 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1388 break;
1389 case 1:
1390 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1391 break;
1392 case 0:
1393 default:
1394 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1395 break;
1396 }
1397 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1398 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1399 ucontrol->value.integer.value[0]);
1400
1401 return 0;
1402}
1403
1404static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1405 struct snd_ctl_elem_value *ucontrol)
1406{
1407 int idx = ext_disp_get_port_idx(kcontrol);
1408
1409 if (idx < 0)
1410 return idx;
1411
1412 ucontrol->value.integer.value[0] =
1413 ext_disp_rx_cfg[idx].channels - 2;
1414
1415 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1416 idx, ext_disp_rx_cfg[idx].channels);
1417
1418 return 0;
1419}
1420
1421static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1422 struct snd_ctl_elem_value *ucontrol)
1423{
1424 int idx = ext_disp_get_port_idx(kcontrol);
1425
1426 if (idx < 0)
1427 return idx;
1428
1429 ext_disp_rx_cfg[idx].channels =
1430 ucontrol->value.integer.value[0] + 2;
1431
1432 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1433 idx, ext_disp_rx_cfg[idx].channels);
1434 return 1;
1435}
1436
1437static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1438 struct snd_ctl_elem_value *ucontrol)
1439{
1440 int sample_rate_val;
1441 int idx = ext_disp_get_port_idx(kcontrol);
1442
1443 if (idx < 0)
1444 return idx;
1445
1446 switch (ext_disp_rx_cfg[idx].sample_rate) {
1447 case SAMPLING_RATE_176P4KHZ:
1448 sample_rate_val = 6;
1449 break;
1450
1451 case SAMPLING_RATE_88P2KHZ:
1452 sample_rate_val = 5;
1453 break;
1454
1455 case SAMPLING_RATE_44P1KHZ:
1456 sample_rate_val = 4;
1457 break;
1458
1459 case SAMPLING_RATE_32KHZ:
1460 sample_rate_val = 3;
1461 break;
1462
1463 case SAMPLING_RATE_192KHZ:
1464 sample_rate_val = 2;
1465 break;
1466
1467 case SAMPLING_RATE_96KHZ:
1468 sample_rate_val = 1;
1469 break;
1470
1471 case SAMPLING_RATE_48KHZ:
1472 default:
1473 sample_rate_val = 0;
1474 break;
1475 }
1476
1477 ucontrol->value.integer.value[0] = sample_rate_val;
1478 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1479 idx, ext_disp_rx_cfg[idx].sample_rate);
1480
1481 return 0;
1482}
1483
1484static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1485 struct snd_ctl_elem_value *ucontrol)
1486{
1487 int idx = ext_disp_get_port_idx(kcontrol);
1488
1489 if (idx < 0)
1490 return idx;
1491
1492 switch (ucontrol->value.integer.value[0]) {
1493 case 6:
1494 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
1495 break;
1496 case 5:
1497 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
1498 break;
1499 case 4:
1500 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
1501 break;
1502 case 3:
1503 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
1504 break;
1505 case 2:
1506 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1507 break;
1508 case 1:
1509 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1510 break;
1511 case 0:
1512 default:
1513 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1514 break;
1515 }
1516
1517 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1518 __func__, ucontrol->value.integer.value[0], idx,
1519 ext_disp_rx_cfg[idx].sample_rate);
1520 return 0;
1521}
1522
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1523static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1524 struct snd_ctl_elem_value *ucontrol)
1525{
1526 pr_debug("%s: proxy_rx channels = %d\n",
1527 __func__, proxy_rx_cfg.channels);
1528 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1529
1530 return 0;
1531}
1532
1533static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1534 struct snd_ctl_elem_value *ucontrol)
1535{
1536 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1537 pr_debug("%s: proxy_rx channels = %d\n",
1538 __func__, proxy_rx_cfg.channels);
1539
1540 return 1;
1541}
1542
1543static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1544 struct tdm_port *port)
1545{
1546 if (port) {
1547 if (strnstr(kcontrol->id.name, "PRI",
1548 sizeof(kcontrol->id.name))) {
1549 port->mode = TDM_PRI;
1550 } else if (strnstr(kcontrol->id.name, "SEC",
1551 sizeof(kcontrol->id.name))) {
1552 port->mode = TDM_SEC;
1553 } else if (strnstr(kcontrol->id.name, "TERT",
1554 sizeof(kcontrol->id.name))) {
1555 port->mode = TDM_TERT;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]1556 } else if (strnstr(kcontrol->id.name, "QUAT",
1557 sizeof(kcontrol->id.name))) {
1558 port->mode = TDM_QUAT;
1559 } else if (strnstr(kcontrol->id.name, "QUIN",
1560 sizeof(kcontrol->id.name))) {
1561 port->mode = TDM_QUIN;
1562 } else if (strnstr(kcontrol->id.name, "SEN",
1563 sizeof(kcontrol->id.name))) {
1564 port->mode = TDM_SEN;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1565 } else {
1566 pr_err("%s: unsupported mode in: %s\n",
1567 __func__, kcontrol->id.name);
1568 return -EINVAL;
1569 }
1570
1571 if (strnstr(kcontrol->id.name, "RX_0",
1572 sizeof(kcontrol->id.name)) ||
1573 strnstr(kcontrol->id.name, "TX_0",
1574 sizeof(kcontrol->id.name))) {
1575 port->channel = TDM_0;
1576 } else if (strnstr(kcontrol->id.name, "RX_1",
1577 sizeof(kcontrol->id.name)) ||
1578 strnstr(kcontrol->id.name, "TX_1",
1579 sizeof(kcontrol->id.name))) {
1580 port->channel = TDM_1;
1581 } else if (strnstr(kcontrol->id.name, "RX_2",
1582 sizeof(kcontrol->id.name)) ||
1583 strnstr(kcontrol->id.name, "TX_2",
1584 sizeof(kcontrol->id.name))) {
1585 port->channel = TDM_2;
1586 } else if (strnstr(kcontrol->id.name, "RX_3",
1587 sizeof(kcontrol->id.name)) ||
1588 strnstr(kcontrol->id.name, "TX_3",
1589 sizeof(kcontrol->id.name))) {
1590 port->channel = TDM_3;
1591 } else if (strnstr(kcontrol->id.name, "RX_4",
1592 sizeof(kcontrol->id.name)) ||
1593 strnstr(kcontrol->id.name, "TX_4",
1594 sizeof(kcontrol->id.name))) {
1595 port->channel = TDM_4;
1596 } else if (strnstr(kcontrol->id.name, "RX_5",
1597 sizeof(kcontrol->id.name)) ||
1598 strnstr(kcontrol->id.name, "TX_5",
1599 sizeof(kcontrol->id.name))) {
1600 port->channel = TDM_5;
1601 } else if (strnstr(kcontrol->id.name, "RX_6",
1602 sizeof(kcontrol->id.name)) ||
1603 strnstr(kcontrol->id.name, "TX_6",
1604 sizeof(kcontrol->id.name))) {
1605 port->channel = TDM_6;
1606 } else if (strnstr(kcontrol->id.name, "RX_7",
1607 sizeof(kcontrol->id.name)) ||
1608 strnstr(kcontrol->id.name, "TX_7",
1609 sizeof(kcontrol->id.name))) {
1610 port->channel = TDM_7;
1611 } else {
1612 pr_err("%s: unsupported channel in: %s\n",
1613 __func__, kcontrol->id.name);
1614 return -EINVAL;
1615 }
1616 } else {
1617 return -EINVAL;
1618 }
1619 return 0;
1620}
1621
1622static int tdm_get_sample_rate(int value)
1623{
1624 int sample_rate = 0;
1625
1626 switch (value) {
1627 case 0:
1628 sample_rate = SAMPLING_RATE_8KHZ;
1629 break;
1630 case 1:
1631 sample_rate = SAMPLING_RATE_16KHZ;
1632 break;
1633 case 2:
1634 sample_rate = SAMPLING_RATE_32KHZ;
1635 break;
1636 case 3:
1637 sample_rate = SAMPLING_RATE_48KHZ;
1638 break;
1639 case 4:
1640 sample_rate = SAMPLING_RATE_176P4KHZ;
1641 break;
1642 case 5:
1643 sample_rate = SAMPLING_RATE_352P8KHZ;
1644 break;
1645 default:
1646 sample_rate = SAMPLING_RATE_48KHZ;
1647 break;
1648 }
1649 return sample_rate;
1650}
1651
1652static int tdm_get_sample_rate_val(int sample_rate)
1653{
1654 int sample_rate_val = 0;
1655
1656 switch (sample_rate) {
1657 case SAMPLING_RATE_8KHZ:
1658 sample_rate_val = 0;
1659 break;
1660 case SAMPLING_RATE_16KHZ:
1661 sample_rate_val = 1;
1662 break;
1663 case SAMPLING_RATE_32KHZ:
1664 sample_rate_val = 2;
1665 break;
1666 case SAMPLING_RATE_48KHZ:
1667 sample_rate_val = 3;
1668 break;
1669 case SAMPLING_RATE_176P4KHZ:
1670 sample_rate_val = 4;
1671 break;
1672 case SAMPLING_RATE_352P8KHZ:
1673 sample_rate_val = 5;
1674 break;
1675 default:
1676 sample_rate_val = 3;
1677 break;
1678 }
1679 return sample_rate_val;
1680}
1681
1682static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1683 struct snd_ctl_elem_value *ucontrol)
1684{
1685 struct tdm_port port;
1686 int ret = tdm_get_port_idx(kcontrol, &port);
1687
1688 if (ret) {
1689 pr_err("%s: unsupported control: %s\n",
1690 __func__, kcontrol->id.name);
1691 } else {
1692 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1693 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1694
1695 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1696 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1697 ucontrol->value.enumerated.item[0]);
1698 }
1699 return ret;
1700}
1701
1702static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1703 struct snd_ctl_elem_value *ucontrol)
1704{
1705 struct tdm_port port;
1706 int ret = tdm_get_port_idx(kcontrol, &port);
1707
1708 if (ret) {
1709 pr_err("%s: unsupported control: %s\n",
1710 __func__, kcontrol->id.name);
1711 } else {
1712 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1713 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1714
1715 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1716 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1717 ucontrol->value.enumerated.item[0]);
1718 }
1719 return ret;
1720}
1721
1722static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1723 struct snd_ctl_elem_value *ucontrol)
1724{
1725 struct tdm_port port;
1726 int ret = tdm_get_port_idx(kcontrol, &port);
1727
1728 if (ret) {
1729 pr_err("%s: unsupported control: %s\n",
1730 __func__, kcontrol->id.name);
1731 } else {
1732 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1733 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1734
1735 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1736 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1737 ucontrol->value.enumerated.item[0]);
1738 }
1739 return ret;
1740}
1741
1742static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1743 struct snd_ctl_elem_value *ucontrol)
1744{
1745 struct tdm_port port;
1746 int ret = tdm_get_port_idx(kcontrol, &port);
1747
1748 if (ret) {
1749 pr_err("%s: unsupported control: %s\n",
1750 __func__, kcontrol->id.name);
1751 } else {
1752 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1753 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1754
1755 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1756 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1757 ucontrol->value.enumerated.item[0]);
1758 }
1759 return ret;
1760}
1761
1762static int tdm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1763{
1764 int format = 0;
1765
1766 switch (value) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1767 case 0:
1768 format = SNDRV_PCM_FORMAT_S16_LE;
1769 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1770 case 1:
1771 format = SNDRV_PCM_FORMAT_S24_LE;
1772 break;
1773 case 2:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1774 format = SNDRV_PCM_FORMAT_S32_LE;
1775 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1776 default:
1777 format = SNDRV_PCM_FORMAT_S16_LE;
1778 break;
1779 }
1780 return format;
1781}
1782
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1783static int tdm_get_format_val(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1784{
1785 int value = 0;
1786
1787 switch (format) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1788 case SNDRV_PCM_FORMAT_S16_LE:
1789 value = 0;
1790 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1791 case SNDRV_PCM_FORMAT_S24_LE:
1792 value = 1;
1793 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1794 case SNDRV_PCM_FORMAT_S32_LE:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1795 value = 2;
1796 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1797 default:
1798 value = 0;
1799 break;
1800 }
1801 return value;
1802}
1803
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1804static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1805 struct snd_ctl_elem_value *ucontrol)
1806{
1807 struct tdm_port port;
1808 int ret = tdm_get_port_idx(kcontrol, &port);
1809
1810 if (ret) {
1811 pr_err("%s: unsupported control: %s\n",
1812 __func__, kcontrol->id.name);
1813 } else {
1814 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1815 tdm_rx_cfg[port.mode][port.channel].bit_format);
1816
1817 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1818 tdm_rx_cfg[port.mode][port.channel].bit_format,
1819 ucontrol->value.enumerated.item[0]);
1820 }
1821 return ret;
1822}
1823
1824static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1825 struct snd_ctl_elem_value *ucontrol)
1826{
1827 struct tdm_port port;
1828 int ret = tdm_get_port_idx(kcontrol, &port);
1829
1830 if (ret) {
1831 pr_err("%s: unsupported control: %s\n",
1832 __func__, kcontrol->id.name);
1833 } else {
1834 tdm_rx_cfg[port.mode][port.channel].bit_format =
1835 tdm_get_format(ucontrol->value.enumerated.item[0]);
1836
1837 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1838 tdm_rx_cfg[port.mode][port.channel].bit_format,
1839 ucontrol->value.enumerated.item[0]);
1840 }
1841 return ret;
1842}
1843
1844static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1845 struct snd_ctl_elem_value *ucontrol)
1846{
1847 struct tdm_port port;
1848 int ret = tdm_get_port_idx(kcontrol, &port);
1849
1850 if (ret) {
1851 pr_err("%s: unsupported control: %s\n",
1852 __func__, kcontrol->id.name);
1853 } else {
1854 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1855 tdm_tx_cfg[port.mode][port.channel].bit_format);
1856
1857 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1858 tdm_tx_cfg[port.mode][port.channel].bit_format,
1859 ucontrol->value.enumerated.item[0]);
1860 }
1861 return ret;
1862}
1863
1864static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1865 struct snd_ctl_elem_value *ucontrol)
1866{
1867 struct tdm_port port;
1868 int ret = tdm_get_port_idx(kcontrol, &port);
1869
1870 if (ret) {
1871 pr_err("%s: unsupported control: %s\n",
1872 __func__, kcontrol->id.name);
1873 } else {
1874 tdm_tx_cfg[port.mode][port.channel].bit_format =
1875 tdm_get_format(ucontrol->value.enumerated.item[0]);
1876
1877 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1878 tdm_tx_cfg[port.mode][port.channel].bit_format,
1879 ucontrol->value.enumerated.item[0]);
1880 }
1881 return ret;
1882}
1883
1884static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1885 struct snd_ctl_elem_value *ucontrol)
1886{
1887 struct tdm_port port;
1888 int ret = tdm_get_port_idx(kcontrol, &port);
1889
1890 if (ret) {
1891 pr_err("%s: unsupported control: %s\n",
1892 __func__, kcontrol->id.name);
1893 } else {
1894
1895 ucontrol->value.enumerated.item[0] =
1896 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1897
1898 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1899 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1900 ucontrol->value.enumerated.item[0]);
1901 }
1902 return ret;
1903}
1904
1905static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1906 struct snd_ctl_elem_value *ucontrol)
1907{
1908 struct tdm_port port;
1909 int ret = tdm_get_port_idx(kcontrol, &port);
1910
1911 if (ret) {
1912 pr_err("%s: unsupported control: %s\n",
1913 __func__, kcontrol->id.name);
1914 } else {
1915 tdm_rx_cfg[port.mode][port.channel].channels =
1916 ucontrol->value.enumerated.item[0] + 1;
1917
1918 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1919 tdm_rx_cfg[port.mode][port.channel].channels,
1920 ucontrol->value.enumerated.item[0] + 1);
1921 }
1922 return ret;
1923}
1924
1925static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1926 struct snd_ctl_elem_value *ucontrol)
1927{
1928 struct tdm_port port;
1929 int ret = tdm_get_port_idx(kcontrol, &port);
1930
1931 if (ret) {
1932 pr_err("%s: unsupported control: %s\n",
1933 __func__, kcontrol->id.name);
1934 } else {
1935 ucontrol->value.enumerated.item[0] =
1936 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1937
1938 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1939 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1940 ucontrol->value.enumerated.item[0]);
1941 }
1942 return ret;
1943}
1944
1945static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1946 struct snd_ctl_elem_value *ucontrol)
1947{
1948 struct tdm_port port;
1949 int ret = tdm_get_port_idx(kcontrol, &port);
1950
1951 if (ret) {
1952 pr_err("%s: unsupported control: %s\n",
1953 __func__, kcontrol->id.name);
1954 } else {
1955 tdm_tx_cfg[port.mode][port.channel].channels =
1956 ucontrol->value.enumerated.item[0] + 1;
1957
1958 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1959 tdm_tx_cfg[port.mode][port.channel].channels,
1960 ucontrol->value.enumerated.item[0] + 1);
1961 }
1962 return ret;
1963}
1964
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]1965static int tdm_slot_map_put(struct snd_kcontrol *kcontrol,
1966 struct snd_ctl_elem_value *ucontrol)
1967{
1968 int slot_index = 0;
1969 int interface = ucontrol->value.integer.value[0];
1970 int channel = ucontrol->value.integer.value[1];
1971 unsigned int offset_val = 0;
1972 unsigned int *slot_offset = NULL;
1973 struct tdm_dev_config *config = NULL;
1974
1975 if (interface < 0 || interface >= (TDM_INTERFACE_MAX * MAX_PATH)) {
1976 pr_err("%s: incorrect interface = %d\n", __func__, interface);
1977 return -EINVAL;
1978 }
1979 if (channel < 0 || channel >= TDM_PORT_MAX) {
1980 pr_err("%s: incorrect channel = %d\n", __func__, channel);
1981 return -EINVAL;
1982 }
1983
1984 pr_debug("%s: interface = %d, channel = %d\n", __func__,
1985 interface, channel);
1986
1987 config = ((struct tdm_dev_config *) tdm_cfg[interface / MAX_PATH]) +
1988 ((interface % MAX_PATH) * TDM_PORT_MAX) + channel;
1989 slot_offset = config->tdm_slot_offset;
1990
1991 for (slot_index = 0; slot_index < TDM_MAX_SLOTS; slot_index++) {
1992 offset_val = ucontrol->value.integer.value[MAX_PATH +
1993 slot_index];
1994 /* Offset value can only be 0, 4, 8, ..28 */
1995 if (offset_val % 4 == 0 && offset_val <= 28)
1996 slot_offset[slot_index] = offset_val;
1997 pr_debug("%s: slot offset[%d] = %d\n", __func__,
1998 slot_index, slot_offset[slot_index]);
1999 }
2000
2001 return 0;
2002}
2003
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2004static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2005{
2006 int idx = 0;
2007
2008 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2009 sizeof("PRIM_AUX_PCM"))) {
2010 idx = PRIM_AUX_PCM;
2011 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2012 sizeof("SEC_AUX_PCM"))) {
2013 idx = SEC_AUX_PCM;
2014 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2015 sizeof("TERT_AUX_PCM"))) {
2016 idx = TERT_AUX_PCM;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2017 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2018 sizeof("QUAT_AUX_PCM"))) {
2019 idx = QUAT_AUX_PCM;
2020 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2021 sizeof("QUIN_AUX_PCM"))) {
2022 idx = QUIN_AUX_PCM;
2023 } else if (strnstr(kcontrol->id.name, "SEN_AUX_PCM",
2024 sizeof("SEN_AUX_PCM"))) {
2025 idx = SEN_AUX_PCM;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2026 } else {
2027 pr_err("%s: unsupported port: %s\n",
2028 __func__, kcontrol->id.name);
2029 idx = -EINVAL;
2030 }
2031
2032 return idx;
2033}
2034
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2035static int aux_pcm_get_sample_rate(int value)
2036{
2037 int sample_rate = 0;
2038
2039 switch (value) {
2040 case 1:
2041 sample_rate = SAMPLING_RATE_16KHZ;
2042 break;
2043 case 0:
2044 default:
2045 sample_rate = SAMPLING_RATE_8KHZ;
2046 break;
2047 }
2048 return sample_rate;
2049}
2050
2051static int aux_pcm_get_sample_rate_val(int sample_rate)
2052{
2053 int sample_rate_val = 0;
2054
2055 switch (sample_rate) {
2056 case SAMPLING_RATE_16KHZ:
2057 sample_rate_val = 1;
2058 break;
2059 case SAMPLING_RATE_8KHZ:
2060 default:
2061 sample_rate_val = 0;
2062 break;
2063 }
2064 return sample_rate_val;
2065}
2066
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2067static int mi2s_auxpcm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2068{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2069 int format = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2070
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2071 switch (value) {
2072 case 0:
2073 format = SNDRV_PCM_FORMAT_S16_LE;
2074 break;
2075 case 1:
2076 format = SNDRV_PCM_FORMAT_S24_LE;
2077 break;
2078 case 2:
2079 format = SNDRV_PCM_FORMAT_S24_3LE;
2080 break;
2081 case 3:
2082 format = SNDRV_PCM_FORMAT_S32_LE;
2083 break;
2084 default:
2085 format = SNDRV_PCM_FORMAT_S16_LE;
2086 break;
2087 }
2088 return format;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2089}
2090
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2091static int mi2s_auxpcm_get_format_value(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2092{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2093 int value = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2094
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2095 switch (format) {
2096 case SNDRV_PCM_FORMAT_S16_LE:
2097 value = 0;
2098 break;
2099 case SNDRV_PCM_FORMAT_S24_LE:
2100 value = 1;
2101 break;
2102 case SNDRV_PCM_FORMAT_S24_3LE:
2103 value = 2;
2104 break;
2105 case SNDRV_PCM_FORMAT_S32_LE:
2106 value = 3;
2107 break;
2108 default:
2109 value = 0;
2110 break;
2111 }
2112 return value;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2113}
2114
2115static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2116 struct snd_ctl_elem_value *ucontrol)
2117{
2118 int idx = aux_pcm_get_port_idx(kcontrol);
2119
2120 if (idx < 0)
2121 return idx;
2122
2123 ucontrol->value.enumerated.item[0] =
2124 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2125
2126 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2127 idx, aux_pcm_rx_cfg[idx].sample_rate,
2128 ucontrol->value.enumerated.item[0]);
2129
2130 return 0;
2131}
2132
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2133static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2134 struct snd_ctl_elem_value *ucontrol)
2135{
2136 int idx = aux_pcm_get_port_idx(kcontrol);
2137
2138 if (idx < 0)
2139 return idx;
2140
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2141 aux_pcm_rx_cfg[idx].sample_rate =
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2142 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2143
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2144 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2145 idx, aux_pcm_rx_cfg[idx].sample_rate,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2146 ucontrol->value.enumerated.item[0]);
2147
2148 return 0;
2149}
2150
2151static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2152 struct snd_ctl_elem_value *ucontrol)
2153{
2154 int idx = aux_pcm_get_port_idx(kcontrol);
2155
2156 if (idx < 0)
2157 return idx;
2158
2159 ucontrol->value.enumerated.item[0] =
2160 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2161
2162 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2163 idx, aux_pcm_tx_cfg[idx].sample_rate,
2164 ucontrol->value.enumerated.item[0]);
2165
2166 return 0;
2167}
2168
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2169static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2170 struct snd_ctl_elem_value *ucontrol)
2171{
2172 int idx = aux_pcm_get_port_idx(kcontrol);
2173
2174 if (idx < 0)
2175 return idx;
2176
2177 aux_pcm_tx_cfg[idx].sample_rate =
2178 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2179
2180 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2181 idx, aux_pcm_tx_cfg[idx].sample_rate,
2182 ucontrol->value.enumerated.item[0]);
2183
2184 return 0;
2185}
2186
2187static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
2188 struct snd_ctl_elem_value *ucontrol)
2189{
2190 int idx = aux_pcm_get_port_idx(kcontrol);
2191
2192 if (idx < 0)
2193 return idx;
2194
2195 ucontrol->value.enumerated.item[0] =
2196 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
2197
2198 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2199 idx, aux_pcm_rx_cfg[idx].bit_format,
2200 ucontrol->value.enumerated.item[0]);
2201
2202 return 0;
2203}
2204
2205static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
2206 struct snd_ctl_elem_value *ucontrol)
2207{
2208 int idx = aux_pcm_get_port_idx(kcontrol);
2209
2210 if (idx < 0)
2211 return idx;
2212
2213 aux_pcm_rx_cfg[idx].bit_format =
2214 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2215
2216 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2217 idx, aux_pcm_rx_cfg[idx].bit_format,
2218 ucontrol->value.enumerated.item[0]);
2219
2220 return 0;
2221}
2222
2223static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
2224 struct snd_ctl_elem_value *ucontrol)
2225{
2226 int idx = aux_pcm_get_port_idx(kcontrol);
2227
2228 if (idx < 0)
2229 return idx;
2230
2231 ucontrol->value.enumerated.item[0] =
2232 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
2233
2234 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2235 idx, aux_pcm_tx_cfg[idx].bit_format,
2236 ucontrol->value.enumerated.item[0]);
2237
2238 return 0;
2239}
2240
2241static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
2242 struct snd_ctl_elem_value *ucontrol)
2243{
2244 int idx = aux_pcm_get_port_idx(kcontrol);
2245
2246 if (idx < 0)
2247 return idx;
2248
2249 aux_pcm_tx_cfg[idx].bit_format =
2250 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2251
2252 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2253 idx, aux_pcm_tx_cfg[idx].bit_format,
2254 ucontrol->value.enumerated.item[0]);
2255
2256 return 0;
2257}
2258
2259static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2260{
2261 int idx = 0;
2262
2263 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2264 sizeof("PRIM_MI2S_RX"))) {
2265 idx = PRIM_MI2S;
2266 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2267 sizeof("SEC_MI2S_RX"))) {
2268 idx = SEC_MI2S;
2269 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2270 sizeof("TERT_MI2S_RX"))) {
2271 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2272 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2273 sizeof("QUAT_MI2S_RX"))) {
2274 idx = QUAT_MI2S;
2275 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2276 sizeof("QUIN_MI2S_RX"))) {
2277 idx = QUIN_MI2S;
2278 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_RX",
2279 sizeof("SEN_MI2S_RX"))) {
2280 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2281 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2282 sizeof("PRIM_MI2S_TX"))) {
2283 idx = PRIM_MI2S;
2284 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2285 sizeof("SEC_MI2S_TX"))) {
2286 idx = SEC_MI2S;
2287 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2288 sizeof("TERT_MI2S_TX"))) {
2289 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2290 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2291 sizeof("QUAT_MI2S_TX"))) {
2292 idx = QUAT_MI2S;
2293 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2294 sizeof("QUIN_MI2S_TX"))) {
2295 idx = QUIN_MI2S;
2296 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_TX",
2297 sizeof("SEN_MI2S_TX"))) {
2298 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2299 } else {
2300 pr_err("%s: unsupported channel: %s\n",
2301 __func__, kcontrol->id.name);
2302 idx = -EINVAL;
2303 }
2304
2305 return idx;
2306}
2307
2308static int mi2s_get_sample_rate(int value)
2309{
2310 int sample_rate = 0;
2311
2312 switch (value) {
2313 case 0:
2314 sample_rate = SAMPLING_RATE_8KHZ;
2315 break;
2316 case 1:
2317 sample_rate = SAMPLING_RATE_11P025KHZ;
2318 break;
2319 case 2:
2320 sample_rate = SAMPLING_RATE_16KHZ;
2321 break;
2322 case 3:
2323 sample_rate = SAMPLING_RATE_22P05KHZ;
2324 break;
2325 case 4:
2326 sample_rate = SAMPLING_RATE_32KHZ;
2327 break;
2328 case 5:
2329 sample_rate = SAMPLING_RATE_44P1KHZ;
2330 break;
2331 case 6:
2332 sample_rate = SAMPLING_RATE_48KHZ;
2333 break;
2334 case 7:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2335 sample_rate = SAMPLING_RATE_88P2KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2336 break;
2337 case 8:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2338 sample_rate = SAMPLING_RATE_96KHZ;
2339 break;
2340 case 9:
2341 sample_rate = SAMPLING_RATE_176P4KHZ;
2342 break;
2343 case 10:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2344 sample_rate = SAMPLING_RATE_192KHZ;
2345 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2346 case 11:
2347 sample_rate = SAMPLING_RATE_352P8KHZ;
2348 break;
2349 case 12:
2350 sample_rate = SAMPLING_RATE_384KHZ;
2351 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2352 default:
2353 sample_rate = SAMPLING_RATE_48KHZ;
2354 break;
2355 }
2356 return sample_rate;
2357}
2358
2359static int mi2s_get_sample_rate_val(int sample_rate)
2360{
2361 int sample_rate_val = 0;
2362
2363 switch (sample_rate) {
2364 case SAMPLING_RATE_8KHZ:
2365 sample_rate_val = 0;
2366 break;
2367 case SAMPLING_RATE_11P025KHZ:
2368 sample_rate_val = 1;
2369 break;
2370 case SAMPLING_RATE_16KHZ:
2371 sample_rate_val = 2;
2372 break;
2373 case SAMPLING_RATE_22P05KHZ:
2374 sample_rate_val = 3;
2375 break;
2376 case SAMPLING_RATE_32KHZ:
2377 sample_rate_val = 4;
2378 break;
2379 case SAMPLING_RATE_44P1KHZ:
2380 sample_rate_val = 5;
2381 break;
2382 case SAMPLING_RATE_48KHZ:
2383 sample_rate_val = 6;
2384 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2385 case SAMPLING_RATE_88P2KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2386 sample_rate_val = 7;
2387 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2388 case SAMPLING_RATE_96KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2389 sample_rate_val = 8;
2390 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2391 case SAMPLING_RATE_176P4KHZ:
2392 sample_rate_val = 9;
2393 break;
2394 case SAMPLING_RATE_192KHZ:
2395 sample_rate_val = 10;
2396 break;
2397 case SAMPLING_RATE_352P8KHZ:
2398 sample_rate_val = 11;
2399 break;
2400 case SAMPLING_RATE_384KHZ:
2401 sample_rate_val = 12;
2402 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2403 default:
2404 sample_rate_val = 6;
2405 break;
2406 }
2407 return sample_rate_val;
2408}
2409
2410static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2411 struct snd_ctl_elem_value *ucontrol)
2412{
2413 int idx = mi2s_get_port_idx(kcontrol);
2414
2415 if (idx < 0)
2416 return idx;
2417
2418 ucontrol->value.enumerated.item[0] =
2419 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2420
2421 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2422 idx, mi2s_rx_cfg[idx].sample_rate,
2423 ucontrol->value.enumerated.item[0]);
2424
2425 return 0;
2426}
2427
2428static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2429 struct snd_ctl_elem_value *ucontrol)
2430{
2431 int idx = mi2s_get_port_idx(kcontrol);
2432
2433 if (idx < 0)
2434 return idx;
2435
2436 mi2s_rx_cfg[idx].sample_rate =
2437 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2438
2439 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2440 idx, mi2s_rx_cfg[idx].sample_rate,
2441 ucontrol->value.enumerated.item[0]);
2442
2443 return 0;
2444}
2445
2446static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2447 struct snd_ctl_elem_value *ucontrol)
2448{
2449 int idx = mi2s_get_port_idx(kcontrol);
2450
2451 if (idx < 0)
2452 return idx;
2453
2454 ucontrol->value.enumerated.item[0] =
2455 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
2456
2457 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2458 idx, mi2s_tx_cfg[idx].sample_rate,
2459 ucontrol->value.enumerated.item[0]);
2460
2461 return 0;
2462}
2463
2464static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2465 struct snd_ctl_elem_value *ucontrol)
2466{
2467 int idx = mi2s_get_port_idx(kcontrol);
2468
2469 if (idx < 0)
2470 return idx;
2471
2472 mi2s_tx_cfg[idx].sample_rate =
2473 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2474
2475 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2476 idx, mi2s_tx_cfg[idx].sample_rate,
2477 ucontrol->value.enumerated.item[0]);
2478
2479 return 0;
2480}
2481
2482static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
2483 struct snd_ctl_elem_value *ucontrol)
2484{
2485 int idx = mi2s_get_port_idx(kcontrol);
2486
2487 if (idx < 0)
2488 return idx;
2489
2490 ucontrol->value.enumerated.item[0] =
2491 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
2492
2493 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2494 idx, mi2s_rx_cfg[idx].bit_format,
2495 ucontrol->value.enumerated.item[0]);
2496
2497 return 0;
2498}
2499
2500static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
2501 struct snd_ctl_elem_value *ucontrol)
2502{
2503 int idx = mi2s_get_port_idx(kcontrol);
2504
2505 if (idx < 0)
2506 return idx;
2507
2508 mi2s_rx_cfg[idx].bit_format =
2509 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2510
2511 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2512 idx, mi2s_rx_cfg[idx].bit_format,
2513 ucontrol->value.enumerated.item[0]);
2514
2515 return 0;
2516}
2517
2518static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
2519 struct snd_ctl_elem_value *ucontrol)
2520{
2521 int idx = mi2s_get_port_idx(kcontrol);
2522
2523 if (idx < 0)
2524 return idx;
2525
2526 ucontrol->value.enumerated.item[0] =
2527 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
2528
2529 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2530 idx, mi2s_tx_cfg[idx].bit_format,
2531 ucontrol->value.enumerated.item[0]);
2532
2533 return 0;
2534}
2535
2536static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
2537 struct snd_ctl_elem_value *ucontrol)
2538{
2539 int idx = mi2s_get_port_idx(kcontrol);
2540
2541 if (idx < 0)
2542 return idx;
2543
2544 mi2s_tx_cfg[idx].bit_format =
2545 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2546
2547 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2548 idx, mi2s_tx_cfg[idx].bit_format,
2549 ucontrol->value.enumerated.item[0]);
2550
2551 return 0;
2552}
2553static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
2554 struct snd_ctl_elem_value *ucontrol)
2555{
2556 int idx = mi2s_get_port_idx(kcontrol);
2557
2558 if (idx < 0)
2559 return idx;
2560
2561 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2562 idx, mi2s_rx_cfg[idx].channels);
2563 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
2564
2565 return 0;
2566}
2567
2568static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
2569 struct snd_ctl_elem_value *ucontrol)
2570{
2571 int idx = mi2s_get_port_idx(kcontrol);
2572
2573 if (idx < 0)
2574 return idx;
2575
2576 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2577 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2578 idx, mi2s_rx_cfg[idx].channels);
2579
2580 return 1;
2581}
2582
2583static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
2584 struct snd_ctl_elem_value *ucontrol)
2585{
2586 int idx = mi2s_get_port_idx(kcontrol);
2587
2588 if (idx < 0)
2589 return idx;
2590
2591 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2592 idx, mi2s_tx_cfg[idx].channels);
2593 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
2594
2595 return 0;
2596}
2597
2598static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2599 struct snd_ctl_elem_value *ucontrol)
2600{
2601 int idx = mi2s_get_port_idx(kcontrol);
2602
2603 if (idx < 0)
2604 return idx;
2605
2606 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2607 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2608 idx, mi2s_tx_cfg[idx].channels);
2609
2610 return 1;
2611}
2612
2613static int msm_get_port_id(int be_id)
2614{
2615 int afe_port_id = 0;
2616
2617 switch (be_id) {
2618 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2619 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2620 break;
2621 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2622 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2623 break;
2624 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2625 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2626 break;
2627 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2628 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2629 break;
2630 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2631 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2632 break;
2633 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2634 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2635 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2636 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2637 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2638 break;
2639 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2640 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2641 break;
2642 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
2643 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
2644 break;
2645 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
2646 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
2647 break;
2648 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
2649 afe_port_id = AFE_PORT_ID_SENARY_MI2S_RX;
2650 break;
2651 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
2652 afe_port_id = AFE_PORT_ID_SENARY_MI2S_TX;
2653 break;
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]2654 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2655 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2656 break;
2657 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2658 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2659 break;
2660 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2661 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2662 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2663 default:
2664 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2665 afe_port_id = -EINVAL;
2666 }
2667
2668 return afe_port_id;
2669}
2670
2671static u32 get_mi2s_bits_per_sample(u32 bit_format)
2672{
2673 u32 bit_per_sample = 0;
2674
2675 switch (bit_format) {
2676 case SNDRV_PCM_FORMAT_S32_LE:
2677 case SNDRV_PCM_FORMAT_S24_3LE:
2678 case SNDRV_PCM_FORMAT_S24_LE:
2679 bit_per_sample = 32;
2680 break;
2681 case SNDRV_PCM_FORMAT_S16_LE:
2682 default:
2683 bit_per_sample = 16;
2684 break;
2685 }
2686
2687 return bit_per_sample;
2688}
2689
2690static void update_mi2s_clk_val(int dai_id, int stream)
2691{
2692 u32 bit_per_sample = 0;
2693
2694 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2695 bit_per_sample =
2696 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2697 mi2s_clk[dai_id].clk_freq_in_hz =
2698 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2699 } else {
2700 bit_per_sample =
2701 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2702 mi2s_clk[dai_id].clk_freq_in_hz =
2703 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2704 }
2705}
2706
2707static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2708{
2709 int ret = 0;
2710 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2711 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2712 int port_id = 0;
2713 int index = cpu_dai->id;
2714
2715 port_id = msm_get_port_id(rtd->dai_link->id);
2716 if (port_id < 0) {
2717 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2718 ret = port_id;
2719 goto err;
2720 }
2721
2722 if (enable) {
2723 update_mi2s_clk_val(index, substream->stream);
2724 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2725 mi2s_clk[index].clk_freq_in_hz);
2726 }
2727
2728 mi2s_clk[index].enable = enable;
2729 ret = afe_set_lpass_clock_v2(port_id,
2730 &mi2s_clk[index]);
2731 if (ret < 0) {
2732 dev_err(rtd->card->dev,
2733 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2734 __func__, port_id, ret);
2735 goto err;
2736 }
2737
2738err:
2739 return ret;
2740}
2741
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2742static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2743{
2744 int idx = 0;
2745
2746 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
2747 sizeof("WSA_CDC_DMA_RX_0")))
2748 idx = WSA_CDC_DMA_RX_0;
2749 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
2750 sizeof("WSA_CDC_DMA_RX_0")))
2751 idx = WSA_CDC_DMA_RX_1;
2752 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2753 sizeof("RX_CDC_DMA_RX_0")))
2754 idx = RX_CDC_DMA_RX_0;
2755 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2756 sizeof("RX_CDC_DMA_RX_1")))
2757 idx = RX_CDC_DMA_RX_1;
2758 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2759 sizeof("RX_CDC_DMA_RX_2")))
2760 idx = RX_CDC_DMA_RX_2;
2761 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2762 sizeof("RX_CDC_DMA_RX_3")))
2763 idx = RX_CDC_DMA_RX_3;
2764 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2765 sizeof("RX_CDC_DMA_RX_5")))
2766 idx = RX_CDC_DMA_RX_5;
2767 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
2768 sizeof("WSA_CDC_DMA_TX_0")))
2769 idx = WSA_CDC_DMA_TX_0;
2770 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
2771 sizeof("WSA_CDC_DMA_TX_1")))
2772 idx = WSA_CDC_DMA_TX_1;
2773 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
2774 sizeof("WSA_CDC_DMA_TX_2")))
2775 idx = WSA_CDC_DMA_TX_2;
2776 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2777 sizeof("TX_CDC_DMA_TX_0")))
2778 idx = TX_CDC_DMA_TX_0;
2779 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2780 sizeof("TX_CDC_DMA_TX_3")))
2781 idx = TX_CDC_DMA_TX_3;
2782 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2783 sizeof("TX_CDC_DMA_TX_4")))
2784 idx = TX_CDC_DMA_TX_4;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]2785 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2786 sizeof("VA_CDC_DMA_TX_0")))
2787 idx = VA_CDC_DMA_TX_0;
2788 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2789 sizeof("VA_CDC_DMA_TX_1")))
2790 idx = VA_CDC_DMA_TX_1;
2791 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2792 sizeof("VA_CDC_DMA_TX_2")))
2793 idx = VA_CDC_DMA_TX_2;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2794 else {
2795 pr_err("%s: unsupported channel: %s\n",
2796 __func__, kcontrol->id.name);
2797 return -EINVAL;
2798 }
2799
2800 return idx;
2801}
2802
2803static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2804 struct snd_ctl_elem_value *ucontrol)
2805{
2806 int ch_num = cdc_dma_get_port_idx(kcontrol);
2807
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2808 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2809 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2810 return ch_num;
2811 }
2812
2813 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2814 cdc_dma_rx_cfg[ch_num].channels - 1);
2815 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2816 return 0;
2817}
2818
2819static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2820 struct snd_ctl_elem_value *ucontrol)
2821{
2822 int ch_num = cdc_dma_get_port_idx(kcontrol);
2823
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2824 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2825 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2826 return ch_num;
2827 }
2828
2829 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2830
2831 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2832 cdc_dma_rx_cfg[ch_num].channels);
2833 return 1;
2834}
2835
2836static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2837 struct snd_ctl_elem_value *ucontrol)
2838{
2839 int ch_num = cdc_dma_get_port_idx(kcontrol);
2840
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2841 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2842 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2843 return ch_num;
2844 }
2845
2846 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2847 case SNDRV_PCM_FORMAT_S32_LE:
2848 ucontrol->value.integer.value[0] = 3;
2849 break;
2850 case SNDRV_PCM_FORMAT_S24_3LE:
2851 ucontrol->value.integer.value[0] = 2;
2852 break;
2853 case SNDRV_PCM_FORMAT_S24_LE:
2854 ucontrol->value.integer.value[0] = 1;
2855 break;
2856 case SNDRV_PCM_FORMAT_S16_LE:
2857 default:
2858 ucontrol->value.integer.value[0] = 0;
2859 break;
2860 }
2861
2862 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2863 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2864 ucontrol->value.integer.value[0]);
2865 return 0;
2866}
2867
2868static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2869 struct snd_ctl_elem_value *ucontrol)
2870{
2871 int rc = 0;
2872 int ch_num = cdc_dma_get_port_idx(kcontrol);
2873
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2874 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2875 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2876 return ch_num;
2877 }
2878
2879 switch (ucontrol->value.integer.value[0]) {
2880 case 3:
2881 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2882 break;
2883 case 2:
2884 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2885 break;
2886 case 1:
2887 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2888 break;
2889 case 0:
2890 default:
2891 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2892 break;
2893 }
2894 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2895 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2896 ucontrol->value.integer.value[0]);
2897
2898 return rc;
2899}
2900
2901
2902static int cdc_dma_get_sample_rate_val(int sample_rate)
2903{
2904 int sample_rate_val = 0;
2905
2906 switch (sample_rate) {
2907 case SAMPLING_RATE_8KHZ:
2908 sample_rate_val = 0;
2909 break;
2910 case SAMPLING_RATE_11P025KHZ:
2911 sample_rate_val = 1;
2912 break;
2913 case SAMPLING_RATE_16KHZ:
2914 sample_rate_val = 2;
2915 break;
2916 case SAMPLING_RATE_22P05KHZ:
2917 sample_rate_val = 3;
2918 break;
2919 case SAMPLING_RATE_32KHZ:
2920 sample_rate_val = 4;
2921 break;
2922 case SAMPLING_RATE_44P1KHZ:
2923 sample_rate_val = 5;
2924 break;
2925 case SAMPLING_RATE_48KHZ:
2926 sample_rate_val = 6;
2927 break;
2928 case SAMPLING_RATE_88P2KHZ:
2929 sample_rate_val = 7;
2930 break;
2931 case SAMPLING_RATE_96KHZ:
2932 sample_rate_val = 8;
2933 break;
2934 case SAMPLING_RATE_176P4KHZ:
2935 sample_rate_val = 9;
2936 break;
2937 case SAMPLING_RATE_192KHZ:
2938 sample_rate_val = 10;
2939 break;
2940 case SAMPLING_RATE_352P8KHZ:
2941 sample_rate_val = 11;
2942 break;
2943 case SAMPLING_RATE_384KHZ:
2944 sample_rate_val = 12;
2945 break;
2946 default:
2947 sample_rate_val = 6;
2948 break;
2949 }
2950 return sample_rate_val;
2951}
2952
2953static int cdc_dma_get_sample_rate(int value)
2954{
2955 int sample_rate = 0;
2956
2957 switch (value) {
2958 case 0:
2959 sample_rate = SAMPLING_RATE_8KHZ;
2960 break;
2961 case 1:
2962 sample_rate = SAMPLING_RATE_11P025KHZ;
2963 break;
2964 case 2:
2965 sample_rate = SAMPLING_RATE_16KHZ;
2966 break;
2967 case 3:
2968 sample_rate = SAMPLING_RATE_22P05KHZ;
2969 break;
2970 case 4:
2971 sample_rate = SAMPLING_RATE_32KHZ;
2972 break;
2973 case 5:
2974 sample_rate = SAMPLING_RATE_44P1KHZ;
2975 break;
2976 case 6:
2977 sample_rate = SAMPLING_RATE_48KHZ;
2978 break;
2979 case 7:
2980 sample_rate = SAMPLING_RATE_88P2KHZ;
2981 break;
2982 case 8:
2983 sample_rate = SAMPLING_RATE_96KHZ;
2984 break;
2985 case 9:
2986 sample_rate = SAMPLING_RATE_176P4KHZ;
2987 break;
2988 case 10:
2989 sample_rate = SAMPLING_RATE_192KHZ;
2990 break;
2991 case 11:
2992 sample_rate = SAMPLING_RATE_352P8KHZ;
2993 break;
2994 case 12:
2995 sample_rate = SAMPLING_RATE_384KHZ;
2996 break;
2997 default:
2998 sample_rate = SAMPLING_RATE_48KHZ;
2999 break;
3000 }
3001 return sample_rate;
3002}
3003
3004static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3005 struct snd_ctl_elem_value *ucontrol)
3006{
3007 int ch_num = cdc_dma_get_port_idx(kcontrol);
3008
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]3009 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3010 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3011 return ch_num;
3012 }
3013
3014 ucontrol->value.enumerated.item[0] =
3015 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
3016
3017 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
3018 cdc_dma_rx_cfg[ch_num].sample_rate);
3019 return 0;
3020}
3021
3022static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3023 struct snd_ctl_elem_value *ucontrol)
3024{
3025 int ch_num = cdc_dma_get_port_idx(kcontrol);
3026
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]3027 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3028 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3029 return ch_num;
3030 }
3031
3032 cdc_dma_rx_cfg[ch_num].sample_rate =
3033 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
3034
3035
3036 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
3037 __func__, ucontrol->value.enumerated.item[0],
3038 cdc_dma_rx_cfg[ch_num].sample_rate);
3039 return 0;
3040}
3041
3042static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
3043 struct snd_ctl_elem_value *ucontrol)
3044{
3045 int ch_num = cdc_dma_get_port_idx(kcontrol);
3046
3047 if (ch_num < 0) {
3048 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3049 return ch_num;
3050 }
3051
3052 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3053 cdc_dma_tx_cfg[ch_num].channels);
3054 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
3055 return 0;
3056}
3057
3058static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
3059 struct snd_ctl_elem_value *ucontrol)
3060{
3061 int ch_num = cdc_dma_get_port_idx(kcontrol);
3062
3063 if (ch_num < 0) {
3064 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3065 return ch_num;
3066 }
3067
3068 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
3069
3070 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3071 cdc_dma_tx_cfg[ch_num].channels);
3072 return 1;
3073}
3074
3075static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3076 struct snd_ctl_elem_value *ucontrol)
3077{
3078 int sample_rate_val;
3079 int ch_num = cdc_dma_get_port_idx(kcontrol);
3080
3081 if (ch_num < 0) {
3082 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3083 return ch_num;
3084 }
3085
3086 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
3087 case SAMPLING_RATE_384KHZ:
3088 sample_rate_val = 12;
3089 break;
3090 case SAMPLING_RATE_352P8KHZ:
3091 sample_rate_val = 11;
3092 break;
3093 case SAMPLING_RATE_192KHZ:
3094 sample_rate_val = 10;
3095 break;
3096 case SAMPLING_RATE_176P4KHZ:
3097 sample_rate_val = 9;
3098 break;
3099 case SAMPLING_RATE_96KHZ:
3100 sample_rate_val = 8;
3101 break;
3102 case SAMPLING_RATE_88P2KHZ:
3103 sample_rate_val = 7;
3104 break;
3105 case SAMPLING_RATE_48KHZ:
3106 sample_rate_val = 6;
3107 break;
3108 case SAMPLING_RATE_44P1KHZ:
3109 sample_rate_val = 5;
3110 break;
3111 case SAMPLING_RATE_32KHZ:
3112 sample_rate_val = 4;
3113 break;
3114 case SAMPLING_RATE_22P05KHZ:
3115 sample_rate_val = 3;
3116 break;
3117 case SAMPLING_RATE_16KHZ:
3118 sample_rate_val = 2;
3119 break;
3120 case SAMPLING_RATE_11P025KHZ:
3121 sample_rate_val = 1;
3122 break;
3123 case SAMPLING_RATE_8KHZ:
3124 sample_rate_val = 0;
3125 break;
3126 default:
3127 sample_rate_val = 6;
3128 break;
3129 }
3130
3131 ucontrol->value.integer.value[0] = sample_rate_val;
3132 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
3133 cdc_dma_tx_cfg[ch_num].sample_rate);
3134 return 0;
3135}
3136
3137static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3138 struct snd_ctl_elem_value *ucontrol)
3139{
3140 int ch_num = cdc_dma_get_port_idx(kcontrol);
3141
3142 if (ch_num < 0) {
3143 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3144 return ch_num;
3145 }
3146
3147 switch (ucontrol->value.integer.value[0]) {
3148 case 12:
3149 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
3150 break;
3151 case 11:
3152 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
3153 break;
3154 case 10:
3155 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
3156 break;
3157 case 9:
3158 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
3159 break;
3160 case 8:
3161 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
3162 break;
3163 case 7:
3164 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
3165 break;
3166 case 6:
3167 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3168 break;
3169 case 5:
3170 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
3171 break;
3172 case 4:
3173 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
3174 break;
3175 case 3:
3176 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
3177 break;
3178 case 2:
3179 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
3180 break;
3181 case 1:
3182 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
3183 break;
3184 case 0:
3185 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
3186 break;
3187 default:
3188 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3189 break;
3190 }
3191
3192 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
3193 __func__, ucontrol->value.integer.value[0],
3194 cdc_dma_tx_cfg[ch_num].sample_rate);
3195 return 0;
3196}
3197
3198static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
3199 struct snd_ctl_elem_value *ucontrol)
3200{
3201 int ch_num = cdc_dma_get_port_idx(kcontrol);
3202
3203 if (ch_num < 0) {
3204 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3205 return ch_num;
3206 }
3207
3208 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
3209 case SNDRV_PCM_FORMAT_S32_LE:
3210 ucontrol->value.integer.value[0] = 3;
3211 break;
3212 case SNDRV_PCM_FORMAT_S24_3LE:
3213 ucontrol->value.integer.value[0] = 2;
3214 break;
3215 case SNDRV_PCM_FORMAT_S24_LE:
3216 ucontrol->value.integer.value[0] = 1;
3217 break;
3218 case SNDRV_PCM_FORMAT_S16_LE:
3219 default:
3220 ucontrol->value.integer.value[0] = 0;
3221 break;
3222 }
3223
3224 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3225 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3226 ucontrol->value.integer.value[0]);
3227 return 0;
3228}
3229
3230static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
3231 struct snd_ctl_elem_value *ucontrol)
3232{
3233 int rc = 0;
3234 int ch_num = cdc_dma_get_port_idx(kcontrol);
3235
3236 if (ch_num < 0) {
3237 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3238 return ch_num;
3239 }
3240
3241 switch (ucontrol->value.integer.value[0]) {
3242 case 3:
3243 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
3244 break;
3245 case 2:
3246 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
3247 break;
3248 case 1:
3249 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
3250 break;
3251 case 0:
3252 default:
3253 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
3254 break;
3255 }
3256 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3257 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3258 ucontrol->value.integer.value[0]);
3259
3260 return rc;
3261}
3262
3263static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3264{
3265 int idx = 0;
3266
3267 switch (be_id) {
3268 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3269 idx = WSA_CDC_DMA_RX_0;
3270 break;
3271 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3272 idx = WSA_CDC_DMA_TX_0;
3273 break;
3274 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3275 idx = WSA_CDC_DMA_RX_1;
3276 break;
3277 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3278 idx = WSA_CDC_DMA_TX_1;
3279 break;
3280 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3281 idx = WSA_CDC_DMA_TX_2;
3282 break;
3283 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3284 idx = RX_CDC_DMA_RX_0;
3285 break;
3286 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3287 idx = RX_CDC_DMA_RX_1;
3288 break;
3289 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3290 idx = RX_CDC_DMA_RX_2;
3291 break;
3292 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3293 idx = RX_CDC_DMA_RX_3;
3294 break;
3295 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3296 idx = RX_CDC_DMA_RX_5;
3297 break;
3298 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3299 idx = TX_CDC_DMA_TX_0;
3300 break;
3301 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3302 idx = TX_CDC_DMA_TX_3;
3303 break;
3304 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3305 idx = TX_CDC_DMA_TX_4;
3306 break;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3307 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3308 idx = VA_CDC_DMA_TX_0;
3309 break;
3310 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3311 idx = VA_CDC_DMA_TX_1;
3312 break;
3313 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3314 idx = VA_CDC_DMA_TX_2;
3315 break;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3316 default:
3317 idx = RX_CDC_DMA_RX_0;
3318 break;
3319 }
3320
3321 return idx;
3322}
3323
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]3324static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
3325 struct snd_ctl_elem_value *ucontrol)
3326{
3327 /*
3328 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
3329 * when used for BT_SCO use case. Return either Rx or Tx sample rate
3330 * value.
3331 */
3332 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3333 case SAMPLING_RATE_96KHZ:
3334 ucontrol->value.integer.value[0] = 5;
3335 break;
3336 case SAMPLING_RATE_88P2KHZ:
3337 ucontrol->value.integer.value[0] = 4;
3338 break;
3339 case SAMPLING_RATE_48KHZ:
3340 ucontrol->value.integer.value[0] = 3;
3341 break;
3342 case SAMPLING_RATE_44P1KHZ:
3343 ucontrol->value.integer.value[0] = 2;
3344 break;
3345 case SAMPLING_RATE_16KHZ:
3346 ucontrol->value.integer.value[0] = 1;
3347 break;
3348 case SAMPLING_RATE_8KHZ:
3349 default:
3350 ucontrol->value.integer.value[0] = 0;
3351 break;
3352 }
3353 pr_debug("%s: sample rate = %d\n", __func__,
3354 slim_rx_cfg[SLIM_RX_7].sample_rate);
3355
3356 return 0;
3357}
3358
3359static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
3360 struct snd_ctl_elem_value *ucontrol)
3361{
3362 switch (ucontrol->value.integer.value[0]) {
3363 case 1:
3364 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3365 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3366 break;
3367 case 2:
3368 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3369 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3370 break;
3371 case 3:
3372 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3373 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3374 break;
3375 case 4:
3376 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3377 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3378 break;
3379 case 5:
3380 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3381 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3382 break;
3383 case 0:
3384 default:
3385 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3386 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3387 break;
3388 }
3389 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
3390 __func__,
3391 slim_rx_cfg[SLIM_RX_7].sample_rate,
3392 slim_tx_cfg[SLIM_TX_7].sample_rate,
3393 ucontrol->value.enumerated.item[0]);
3394
3395 return 0;
3396}
3397
3398static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
3399 struct snd_ctl_elem_value *ucontrol)
3400{
3401 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3402 case SAMPLING_RATE_96KHZ:
3403 ucontrol->value.integer.value[0] = 5;
3404 break;
3405 case SAMPLING_RATE_88P2KHZ:
3406 ucontrol->value.integer.value[0] = 4;
3407 break;
3408 case SAMPLING_RATE_48KHZ:
3409 ucontrol->value.integer.value[0] = 3;
3410 break;
3411 case SAMPLING_RATE_44P1KHZ:
3412 ucontrol->value.integer.value[0] = 2;
3413 break;
3414 case SAMPLING_RATE_16KHZ:
3415 ucontrol->value.integer.value[0] = 1;
3416 break;
3417 case SAMPLING_RATE_8KHZ:
3418 default:
3419 ucontrol->value.integer.value[0] = 0;
3420 break;
3421 }
3422 pr_debug("%s: sample rate rx = %d\n", __func__,
3423 slim_rx_cfg[SLIM_RX_7].sample_rate);
3424
3425 return 0;
3426}
3427
3428static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
3429 struct snd_ctl_elem_value *ucontrol)
3430{
3431 switch (ucontrol->value.integer.value[0]) {
3432 case 1:
3433 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3434 break;
3435 case 2:
3436 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3437 break;
3438 case 3:
3439 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3440 break;
3441 case 4:
3442 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3443 break;
3444 case 5:
3445 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3446 break;
3447 case 0:
3448 default:
3449 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3450 break;
3451 }
3452 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
3453 __func__,
3454 slim_rx_cfg[SLIM_RX_7].sample_rate,
3455 ucontrol->value.enumerated.item[0]);
3456
3457 return 0;
3458}
3459
3460static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
3461 struct snd_ctl_elem_value *ucontrol)
3462{
3463 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
3464 case SAMPLING_RATE_96KHZ:
3465 ucontrol->value.integer.value[0] = 5;
3466 break;
3467 case SAMPLING_RATE_88P2KHZ:
3468 ucontrol->value.integer.value[0] = 4;
3469 break;
3470 case SAMPLING_RATE_48KHZ:
3471 ucontrol->value.integer.value[0] = 3;
3472 break;
3473 case SAMPLING_RATE_44P1KHZ:
3474 ucontrol->value.integer.value[0] = 2;
3475 break;
3476 case SAMPLING_RATE_16KHZ:
3477 ucontrol->value.integer.value[0] = 1;
3478 break;
3479 case SAMPLING_RATE_8KHZ:
3480 default:
3481 ucontrol->value.integer.value[0] = 0;
3482 break;
3483 }
3484 pr_debug("%s: sample rate tx = %d\n", __func__,
3485 slim_tx_cfg[SLIM_TX_7].sample_rate);
3486
3487 return 0;
3488}
3489
3490static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
3491 struct snd_ctl_elem_value *ucontrol)
3492{
3493 switch (ucontrol->value.integer.value[0]) {
3494 case 1:
3495 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3496 break;
3497 case 2:
3498 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3499 break;
3500 case 3:
3501 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3502 break;
3503 case 4:
3504 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3505 break;
3506 case 5:
3507 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3508 break;
3509 case 0:
3510 default:
3511 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3512 break;
3513 }
3514 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
3515 __func__,
3516 slim_tx_cfg[SLIM_TX_7].sample_rate,
3517 ucontrol->value.enumerated.item[0]);
3518
3519 return 0;
3520}
3521
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3522static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3523 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3524 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3525 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3526 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3527 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3528 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3529 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3530 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3531 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3532 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3533 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3534 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3535 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3536 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3537 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3538 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3539 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3540 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3541 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3542 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3543 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3544 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3545 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3546 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3547 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3548 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3549 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
3550 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3551 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
3552 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3553 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
3554 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3555 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3556 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3557 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3558 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3559 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3560 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3561 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3562 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3563 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3564 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3565 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3566 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3567 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3568 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3569 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
3570 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3571 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
3572 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3573 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
3574 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3575 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3576 wsa_cdc_dma_rx_0_sample_rate,
3577 cdc_dma_rx_sample_rate_get,
3578 cdc_dma_rx_sample_rate_put),
3579 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3580 wsa_cdc_dma_rx_1_sample_rate,
3581 cdc_dma_rx_sample_rate_get,
3582 cdc_dma_rx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3583 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3584 wsa_cdc_dma_tx_0_sample_rate,
3585 cdc_dma_tx_sample_rate_get,
3586 cdc_dma_tx_sample_rate_put),
3587 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3588 wsa_cdc_dma_tx_1_sample_rate,
3589 cdc_dma_tx_sample_rate_get,
3590 cdc_dma_tx_sample_rate_put),
3591 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3592 wsa_cdc_dma_tx_2_sample_rate,
3593 cdc_dma_tx_sample_rate_get,
3594 cdc_dma_tx_sample_rate_put),
3595 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3596 tx_cdc_dma_tx_0_sample_rate,
3597 cdc_dma_tx_sample_rate_get,
3598 cdc_dma_tx_sample_rate_put),
3599 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3600 tx_cdc_dma_tx_3_sample_rate,
3601 cdc_dma_tx_sample_rate_get,
3602 cdc_dma_tx_sample_rate_put),
3603 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3604 tx_cdc_dma_tx_4_sample_rate,
3605 cdc_dma_tx_sample_rate_get,
3606 cdc_dma_tx_sample_rate_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3607 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
3608 va_cdc_dma_tx_0_sample_rate,
3609 cdc_dma_tx_sample_rate_get,
3610 cdc_dma_tx_sample_rate_put),
3611 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
3612 va_cdc_dma_tx_1_sample_rate,
3613 cdc_dma_tx_sample_rate_get,
3614 cdc_dma_tx_sample_rate_put),
3615 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
3616 va_cdc_dma_tx_2_sample_rate,
3617 cdc_dma_tx_sample_rate_get,
3618 cdc_dma_tx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3619};
3620
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]3621static const struct snd_kcontrol_new msm_int_wcd9380_snd_controls[] = {
3622 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc80_dma_rx_0_format,
3623 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3624 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc80_dma_rx_1_format,
3625 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3626 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc80_dma_rx_2_format,
3627 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3628 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc80_dma_rx_3_format,
3629 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3630 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc80_dma_rx_5_format,
3631 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3632 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3633 rx_cdc80_dma_rx_0_sample_rate,
3634 cdc_dma_rx_sample_rate_get,
3635 cdc_dma_rx_sample_rate_put),
3636 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3637 rx_cdc80_dma_rx_1_sample_rate,
3638 cdc_dma_rx_sample_rate_get,
3639 cdc_dma_rx_sample_rate_put),
3640 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3641 rx_cdc80_dma_rx_2_sample_rate,
3642 cdc_dma_rx_sample_rate_get,
3643 cdc_dma_rx_sample_rate_put),
3644 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3645 rx_cdc80_dma_rx_3_sample_rate,
3646 cdc_dma_rx_sample_rate_get,
3647 cdc_dma_rx_sample_rate_put),
3648 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3649 rx_cdc80_dma_rx_5_sample_rate,
3650 cdc_dma_rx_sample_rate_get,
3651 cdc_dma_rx_sample_rate_put),
3652};
3653
3654static const struct snd_kcontrol_new msm_int_wcd9385_snd_controls[] = {
3655 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc85_dma_rx_0_format,
3656 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3657 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc85_dma_rx_1_format,
3658 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3659 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc85_dma_rx_2_format,
3660 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3661 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc85_dma_rx_3_format,
3662 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3663 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc85_dma_rx_5_format,
3664 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3665 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3666 rx_cdc85_dma_rx_0_sample_rate,
3667 cdc_dma_rx_sample_rate_get,
3668 cdc_dma_rx_sample_rate_put),
3669 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3670 rx_cdc85_dma_rx_1_sample_rate,
3671 cdc_dma_rx_sample_rate_get,
3672 cdc_dma_rx_sample_rate_put),
3673 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3674 rx_cdc85_dma_rx_2_sample_rate,
3675 cdc_dma_rx_sample_rate_get,
3676 cdc_dma_rx_sample_rate_put),
3677 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3678 rx_cdc85_dma_rx_3_sample_rate,
3679 cdc_dma_rx_sample_rate_get,
3680 cdc_dma_rx_sample_rate_put),
3681 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3682 rx_cdc85_dma_rx_5_sample_rate,
3683 cdc_dma_rx_sample_rate_get,
3684 cdc_dma_rx_sample_rate_put),
3685};
3686
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3687static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3688 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3689 usb_audio_rx_sample_rate_get,
3690 usb_audio_rx_sample_rate_put),
3691 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3692 usb_audio_tx_sample_rate_get,
3693 usb_audio_tx_sample_rate_put),
3694 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3695 tdm_rx_sample_rate_get,
3696 tdm_rx_sample_rate_put),
3697 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3698 tdm_rx_sample_rate_get,
3699 tdm_rx_sample_rate_put),
3700 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3701 tdm_rx_sample_rate_get,
3702 tdm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3703 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3704 tdm_rx_sample_rate_get,
3705 tdm_rx_sample_rate_put),
3706 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3707 tdm_rx_sample_rate_get,
3708 tdm_rx_sample_rate_put),
3709 SOC_ENUM_EXT("SEN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3710 tdm_rx_sample_rate_get,
3711 tdm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3712 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3713 tdm_tx_sample_rate_get,
3714 tdm_tx_sample_rate_put),
3715 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3716 tdm_tx_sample_rate_get,
3717 tdm_tx_sample_rate_put),
3718 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3719 tdm_tx_sample_rate_get,
3720 tdm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3721 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3722 tdm_tx_sample_rate_get,
3723 tdm_tx_sample_rate_put),
3724 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3725 tdm_tx_sample_rate_get,
3726 tdm_tx_sample_rate_put),
3727 SOC_ENUM_EXT("SEN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3728 tdm_tx_sample_rate_get,
3729 tdm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3730 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3731 aux_pcm_rx_sample_rate_get,
3732 aux_pcm_rx_sample_rate_put),
3733 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3734 aux_pcm_rx_sample_rate_get,
3735 aux_pcm_rx_sample_rate_put),
3736 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3737 aux_pcm_rx_sample_rate_get,
3738 aux_pcm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3739 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3740 aux_pcm_rx_sample_rate_get,
3741 aux_pcm_rx_sample_rate_put),
3742 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3743 aux_pcm_rx_sample_rate_get,
3744 aux_pcm_rx_sample_rate_put),
3745 SOC_ENUM_EXT("SEN_AUX_PCM_RX SampleRate", sen_aux_pcm_rx_sample_rate,
3746 aux_pcm_rx_sample_rate_get,
3747 aux_pcm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3748 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3749 aux_pcm_tx_sample_rate_get,
3750 aux_pcm_tx_sample_rate_put),
3751 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3752 aux_pcm_tx_sample_rate_get,
3753 aux_pcm_tx_sample_rate_put),
3754 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3755 aux_pcm_tx_sample_rate_get,
3756 aux_pcm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3757 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3758 aux_pcm_tx_sample_rate_get,
3759 aux_pcm_tx_sample_rate_put),
3760 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3761 aux_pcm_tx_sample_rate_get,
3762 aux_pcm_tx_sample_rate_put),
3763 SOC_ENUM_EXT("SEN_AUX_PCM_TX SampleRate", sen_aux_pcm_tx_sample_rate,
3764 aux_pcm_tx_sample_rate_get,
3765 aux_pcm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3766 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3767 mi2s_rx_sample_rate_get,
3768 mi2s_rx_sample_rate_put),
3769 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3770 mi2s_rx_sample_rate_get,
3771 mi2s_rx_sample_rate_put),
3772 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3773 mi2s_rx_sample_rate_get,
3774 mi2s_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3775 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3776 mi2s_rx_sample_rate_get,
3777 mi2s_rx_sample_rate_put),
3778 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3779 mi2s_rx_sample_rate_get,
3780 mi2s_rx_sample_rate_put),
3781 SOC_ENUM_EXT("SEN_MI2S_RX SampleRate", sen_mi2s_rx_sample_rate,
3782 mi2s_rx_sample_rate_get,
3783 mi2s_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3784 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3785 mi2s_tx_sample_rate_get,
3786 mi2s_tx_sample_rate_put),
3787 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3788 mi2s_tx_sample_rate_get,
3789 mi2s_tx_sample_rate_put),
3790 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3791 mi2s_tx_sample_rate_get,
3792 mi2s_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3793 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3794 mi2s_tx_sample_rate_get,
3795 mi2s_tx_sample_rate_put),
3796 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3797 mi2s_tx_sample_rate_get,
3798 mi2s_tx_sample_rate_put),
3799 SOC_ENUM_EXT("SEN_MI2S_TX SampleRate", sen_mi2s_tx_sample_rate,
3800 mi2s_tx_sample_rate_get,
3801 mi2s_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3802 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3803 usb_audio_rx_format_get, usb_audio_rx_format_put),
3804 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3805 usb_audio_tx_format_get, usb_audio_tx_format_put),
3806 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3807 tdm_rx_format_get,
3808 tdm_rx_format_put),
3809 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3810 tdm_rx_format_get,
3811 tdm_rx_format_put),
3812 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3813 tdm_rx_format_get,
3814 tdm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3815 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3816 tdm_rx_format_get,
3817 tdm_rx_format_put),
3818 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3819 tdm_rx_format_get,
3820 tdm_rx_format_put),
3821 SOC_ENUM_EXT("SEN_TDM_RX_0 Format", tdm_rx_format,
3822 tdm_rx_format_get,
3823 tdm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3824 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3825 tdm_tx_format_get,
3826 tdm_tx_format_put),
3827 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3828 tdm_tx_format_get,
3829 tdm_tx_format_put),
3830 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3831 tdm_tx_format_get,
3832 tdm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3833 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3834 tdm_tx_format_get,
3835 tdm_tx_format_put),
3836 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3837 tdm_tx_format_get,
3838 tdm_tx_format_put),
3839 SOC_ENUM_EXT("SEN_TDM_TX_0 Format", tdm_tx_format,
3840 tdm_tx_format_get,
3841 tdm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3842 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3843 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3844 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3845 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3846 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3847 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3848 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3849 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3850 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3851 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3852 SOC_ENUM_EXT("SEN_AUX_PCM_RX Format", aux_pcm_rx_format,
3853 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3854 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3855 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3856 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3857 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3858 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3859 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3860 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3861 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3862 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3863 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3864 SOC_ENUM_EXT("SEN_AUX_PCM_TX Format", aux_pcm_tx_format,
3865 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3866 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3867 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3868 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3869 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3870 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3871 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3872 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3873 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3874 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3875 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3876 SOC_ENUM_EXT("SEN_MI2S_RX Format", mi2s_rx_format,
3877 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3878 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3879 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3880 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3881 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3882 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3883 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3884 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3885 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3886 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3887 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3888 SOC_ENUM_EXT("SEN_MI2S_TX Format", mi2s_tx_format,
3889 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3890 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3891 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3892 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3893 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3894 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3895 proxy_rx_ch_get, proxy_rx_ch_put),
3896 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3897 tdm_rx_ch_get,
3898 tdm_rx_ch_put),
3899 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3900 tdm_rx_ch_get,
3901 tdm_rx_ch_put),
3902 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3903 tdm_rx_ch_get,
3904 tdm_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3905 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3906 tdm_rx_ch_get,
3907 tdm_rx_ch_put),
3908 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3909 tdm_rx_ch_get,
3910 tdm_rx_ch_put),
3911 SOC_ENUM_EXT("SEN_TDM_RX_0 Channels", tdm_rx_chs,
3912 tdm_rx_ch_get,
3913 tdm_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3914 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3915 tdm_tx_ch_get,
3916 tdm_tx_ch_put),
3917 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3918 tdm_tx_ch_get,
3919 tdm_tx_ch_put),
3920 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3921 tdm_tx_ch_get,
3922 tdm_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3923 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3924 tdm_tx_ch_get,
3925 tdm_tx_ch_put),
3926 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3927 tdm_tx_ch_get,
3928 tdm_tx_ch_put),
3929 SOC_ENUM_EXT("SEN_TDM_TX_0 Channels", tdm_tx_chs,
3930 tdm_tx_ch_get,
3931 tdm_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3932 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3933 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3934 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3935 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3936 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3937 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3938 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3939 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3940 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3941 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3942 SOC_ENUM_EXT("SEN_MI2S_RX Channels", sen_mi2s_rx_chs,
3943 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3944 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3945 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3946 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3947 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3948 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3949 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3950 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3951 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3952 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3953 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3954 SOC_ENUM_EXT("SEN_MI2S_TX Channels", sen_mi2s_tx_chs,
3955 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Banajit Goswamib4347d52019-02-28 20:11:49 -0800[diff] [blame]3956 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3957 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3958 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3959 ext_disp_rx_format_get, ext_disp_rx_format_put),
3960 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3961 ext_disp_rx_sample_rate_get,
3962 ext_disp_rx_sample_rate_put),
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]3963 SOC_ENUM_EXT("Display Port1 RX Channels", ext_disp_rx_chs,
3964 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3965 SOC_ENUM_EXT("Display Port1 RX Bit Format", ext_disp_rx_format,
3966 ext_disp_rx_format_get, ext_disp_rx_format_put),
3967 SOC_ENUM_EXT("Display Port1 RX SampleRate", ext_disp_rx_sample_rate,
3968 ext_disp_rx_sample_rate_get,
3969 ext_disp_rx_sample_rate_put),
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]3970 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3971 msm_bt_sample_rate_get,
3972 msm_bt_sample_rate_put),
3973 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3974 msm_bt_sample_rate_rx_get,
3975 msm_bt_sample_rate_rx_put),
3976 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3977 msm_bt_sample_rate_tx_get,
3978 msm_bt_sample_rate_tx_put),
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]3979 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3980 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]3981 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3982 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]3983 SOC_SINGLE_MULTI_EXT("TDM Slot Map", SND_SOC_NOPM, 0, 255, 0,
3984 TDM_MAX_SLOTS + MAX_PATH, NULL, tdm_slot_map_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3985};
3986
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]3987static const struct snd_kcontrol_new msm_snd_controls[] = {
3988 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3989 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3990 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3991 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3992 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3993 aux_pcm_rx_sample_rate_get,
3994 aux_pcm_rx_sample_rate_put),
3995 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3996 aux_pcm_tx_sample_rate_get,
3997 aux_pcm_tx_sample_rate_put),
3998};
3999
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4000static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4001{
4002 int idx;
4003
4004 switch (be_id) {
4005 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4006 idx = EXT_DISP_RX_IDX_DP;
4007 break;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]4008 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
4009 idx = EXT_DISP_RX_IDX_DP1;
4010 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4011 default:
4012 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4013 idx = -EINVAL;
4014 break;
4015 }
4016
4017 return idx;
4018}
4019
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4020static int kona_send_island_va_config(int32_t be_id)
4021{
4022 int rc = 0;
4023 int port_id = 0xFFFF;
4024
4025 port_id = msm_get_port_id(be_id);
4026 if (port_id < 0) {
4027 pr_err("%s: Invalid island interface, be_id: %d\n",
4028 __func__, be_id);
4029 rc = -EINVAL;
4030 } else {
4031 /*
4032 * send island mode config
4033 * This should be the first configuration
4034 */
4035 rc = afe_send_port_island_mode(port_id);
4036 if (rc)
4037 pr_err("%s: afe send island mode failed %d\n",
4038 __func__, rc);
4039 }
4040
4041 return rc;
4042}
4043
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4044static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4045 struct snd_pcm_hw_params *params)
4046{
4047 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4048 struct snd_interval *rate = hw_param_interval(params,
4049 SNDRV_PCM_HW_PARAM_RATE);
4050 struct snd_interval *channels = hw_param_interval(params,
4051 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]4052 int idx = 0, rc = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4053
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4054 pr_debug("%s: dai_id= %d, format = %d, rate = %d\n",
4055 __func__, dai_link->id, params_format(params),
4056 params_rate(params));
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4057
4058 switch (dai_link->id) {
4059 case MSM_BACKEND_DAI_USB_RX:
4060 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4061 usb_rx_cfg.bit_format);
4062 rate->min = rate->max = usb_rx_cfg.sample_rate;
4063 channels->min = channels->max = usb_rx_cfg.channels;
4064 break;
4065
4066 case MSM_BACKEND_DAI_USB_TX:
4067 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4068 usb_tx_cfg.bit_format);
4069 rate->min = rate->max = usb_tx_cfg.sample_rate;
4070 channels->min = channels->max = usb_tx_cfg.channels;
4071 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4072
4073 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]4074 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4075 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4076 if (idx < 0) {
4077 pr_err("%s: Incorrect ext disp idx %d\n",
4078 __func__, idx);
4079 rc = idx;
4080 goto done;
4081 }
4082
4083 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4084 ext_disp_rx_cfg[idx].bit_format);
4085 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4086 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4087 break;
4088
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4089 case MSM_BACKEND_DAI_AFE_PCM_RX:
4090 channels->min = channels->max = proxy_rx_cfg.channels;
4091 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4092 break;
4093
4094 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4095 channels->min = channels->max =
4096 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4097 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4098 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4099 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4100 break;
4101
4102 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4103 channels->min = channels->max =
4104 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4105 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4106 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4107 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4108 break;
4109
4110 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4111 channels->min = channels->max =
4112 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4113 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4114 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4115 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4116 break;
4117
4118 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4119 channels->min = channels->max =
4120 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4121 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4122 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4123 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4124 break;
4125
4126 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4127 channels->min = channels->max =
4128 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4129 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4130 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4131 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4132 break;
4133
4134 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4135 channels->min = channels->max =
4136 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4137 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4138 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4139 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4140 break;
4141
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4142 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4143 channels->min = channels->max =
4144 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4145 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4146 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4147 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4148 break;
4149
4150 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4151 channels->min = channels->max =
4152 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4153 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4154 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4155 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4156 break;
4157
4158 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4159 channels->min = channels->max =
4160 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4161 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4162 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4163 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4164 break;
4165
4166 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4167 channels->min = channels->max =
4168 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4169 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4170 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4171 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4172 break;
4173
4174 case MSM_BACKEND_DAI_SEN_TDM_RX_0:
4175 channels->min = channels->max =
4176 tdm_rx_cfg[TDM_SEN][TDM_0].channels;
4177 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4178 tdm_rx_cfg[TDM_SEN][TDM_0].bit_format);
4179 rate->min = rate->max = tdm_rx_cfg[TDM_SEN][TDM_0].sample_rate;
4180 break;
4181
4182 case MSM_BACKEND_DAI_SEN_TDM_TX_0:
4183 channels->min = channels->max =
4184 tdm_tx_cfg[TDM_SEN][TDM_0].channels;
4185 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4186 tdm_tx_cfg[TDM_SEN][TDM_0].bit_format);
4187 rate->min = rate->max = tdm_tx_cfg[TDM_SEN][TDM_0].sample_rate;
4188 break;
4189
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4190 case MSM_BACKEND_DAI_AUXPCM_RX:
4191 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4192 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4193 rate->min = rate->max =
4194 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4195 channels->min = channels->max =
4196 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4197 break;
4198
4199 case MSM_BACKEND_DAI_AUXPCM_TX:
4200 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4201 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4202 rate->min = rate->max =
4203 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4204 channels->min = channels->max =
4205 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4206 break;
4207
4208 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4209 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4210 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4211 rate->min = rate->max =
4212 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4213 channels->min = channels->max =
4214 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4215 break;
4216
4217 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4218 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4219 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4220 rate->min = rate->max =
4221 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4222 channels->min = channels->max =
4223 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4224 break;
4225
4226 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4227 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4228 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4229 rate->min = rate->max =
4230 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4231 channels->min = channels->max =
4232 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4233 break;
4234
4235 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4236 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4237 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4238 rate->min = rate->max =
4239 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4240 channels->min = channels->max =
4241 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4242 break;
4243
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4244 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4245 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4246 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4247 rate->min = rate->max =
4248 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4249 channels->min = channels->max =
4250 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4251 break;
4252
4253 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4254 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4255 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4256 rate->min = rate->max =
4257 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4258 channels->min = channels->max =
4259 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4260 break;
4261
4262 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4263 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4264 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4265 rate->min = rate->max =
4266 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4267 channels->min = channels->max =
4268 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4269 break;
4270
4271 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4272 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4273 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4274 rate->min = rate->max =
4275 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4276 channels->min = channels->max =
4277 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4278 break;
4279
4280 case MSM_BACKEND_DAI_SEN_AUXPCM_RX:
4281 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4282 aux_pcm_rx_cfg[SEN_AUX_PCM].bit_format);
4283 rate->min = rate->max =
4284 aux_pcm_rx_cfg[SEN_AUX_PCM].sample_rate;
4285 channels->min = channels->max =
4286 aux_pcm_rx_cfg[SEN_AUX_PCM].channels;
4287 break;
4288
4289 case MSM_BACKEND_DAI_SEN_AUXPCM_TX:
4290 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4291 aux_pcm_tx_cfg[SEN_AUX_PCM].bit_format);
4292 rate->min = rate->max =
4293 aux_pcm_tx_cfg[SEN_AUX_PCM].sample_rate;
4294 channels->min = channels->max =
4295 aux_pcm_tx_cfg[SEN_AUX_PCM].channels;
4296 break;
4297
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4298 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4299 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4300 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4301 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4302 channels->min = channels->max =
4303 mi2s_rx_cfg[PRIM_MI2S].channels;
4304 break;
4305
4306 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4307 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4308 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4309 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4310 channels->min = channels->max =
4311 mi2s_tx_cfg[PRIM_MI2S].channels;
4312 break;
4313
4314 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4315 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4316 mi2s_rx_cfg[SEC_MI2S].bit_format);
4317 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4318 channels->min = channels->max =
4319 mi2s_rx_cfg[SEC_MI2S].channels;
4320 break;
4321
4322 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4323 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4324 mi2s_tx_cfg[SEC_MI2S].bit_format);
4325 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4326 channels->min = channels->max =
4327 mi2s_tx_cfg[SEC_MI2S].channels;
4328 break;
4329
4330 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4331 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4332 mi2s_rx_cfg[TERT_MI2S].bit_format);
4333 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4334 channels->min = channels->max =
4335 mi2s_rx_cfg[TERT_MI2S].channels;
4336 break;
4337
4338 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4339 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4340 mi2s_tx_cfg[TERT_MI2S].bit_format);
4341 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4342 channels->min = channels->max =
4343 mi2s_tx_cfg[TERT_MI2S].channels;
4344 break;
4345
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4346 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4347 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4348 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4349 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4350 channels->min = channels->max =
4351 mi2s_rx_cfg[QUAT_MI2S].channels;
4352 break;
4353
4354 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4355 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4356 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4357 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4358 channels->min = channels->max =
4359 mi2s_tx_cfg[QUAT_MI2S].channels;
4360 break;
4361
4362 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4363 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4364 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4365 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4366 channels->min = channels->max =
4367 mi2s_rx_cfg[QUIN_MI2S].channels;
4368 break;
4369
4370 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4371 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4372 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4373 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4374 channels->min = channels->max =
4375 mi2s_tx_cfg[QUIN_MI2S].channels;
4376 break;
4377
4378 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
4379 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4380 mi2s_rx_cfg[SEN_MI2S].bit_format);
4381 rate->min = rate->max = mi2s_rx_cfg[SEN_MI2S].sample_rate;
4382 channels->min = channels->max =
4383 mi2s_rx_cfg[SEN_MI2S].channels;
4384 break;
4385
4386 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
4387 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4388 mi2s_tx_cfg[SEN_MI2S].bit_format);
4389 rate->min = rate->max = mi2s_tx_cfg[SEN_MI2S].sample_rate;
4390 channels->min = channels->max =
4391 mi2s_tx_cfg[SEN_MI2S].channels;
4392 break;
4393
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4394 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4395 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4396 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4397 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4398 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4399 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4400 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4401 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4402 cdc_dma_rx_cfg[idx].bit_format);
4403 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4404 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4405 break;
4406
4407 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4408 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4409 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4410 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4411 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4412 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4413 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4414 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4415 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4416 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4417 cdc_dma_tx_cfg[idx].bit_format);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4418 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4419 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4420 break;
4421
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4422 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4423 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4424 SNDRV_PCM_FORMAT_S32_LE);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4425 rate->min = rate->max = SAMPLING_RATE_8KHZ;
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4426 channels->min = channels->max = msm_vi_feed_tx_ch;
4427 break;
4428
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]4429 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4430 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4431 slim_rx_cfg[SLIM_RX_7].bit_format);
4432 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4433 channels->min = channels->max =
4434 slim_rx_cfg[SLIM_RX_7].channels;
4435 break;
4436
4437 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
Prasad Kumpatlad7df1232019-11-29 19:39:17 +0530[diff] [blame]4438 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4439 slim_tx_cfg[SLIM_TX_7].bit_format);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]4440 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4441 channels->min = channels->max =
4442 slim_tx_cfg[SLIM_TX_7].channels;
4443 break;
4444
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4445 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4446 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4447 channels->min = channels->max =
4448 slim_tx_cfg[SLIM_TX_8].channels;
4449 break;
4450
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]4451 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
4452 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4453 afe_loopback_tx_cfg[idx].bit_format);
4454 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
4455 channels->min = channels->max =
4456 afe_loopback_tx_cfg[idx].channels;
4457 break;
4458
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4459 default:
4460 rate->min = rate->max = SAMPLING_RATE_48KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4461 break;
4462 }
4463
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4464done:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4465 return rc;
4466}
4467
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]4468static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
4469{
4470 struct snd_soc_card *card = component->card;
4471 struct msm_asoc_mach_data *pdata =
4472 snd_soc_card_get_drvdata(card);
4473
4474 if (!pdata->fsa_handle)
4475 return false;
4476
4477 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
4478}
4479
4480static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
4481{
4482 int value = 0;
4483 bool ret = false;
4484 struct snd_soc_card *card;
4485 struct msm_asoc_mach_data *pdata;
4486
4487 if (!component) {
4488 pr_err("%s component is NULL\n", __func__);
4489 return false;
4490 }
4491 card = component->card;
4492 pdata = snd_soc_card_get_drvdata(card);
4493
4494 if (!pdata)
4495 return false;
4496
4497 if (wcd_mbhc_cfg.enable_usbc_analog)
4498 return msm_usbc_swap_gnd_mic(component, active);
4499
4500 /* if usbc is not defined, swap using us_euro_gpio_p */
4501 if (pdata->us_euro_gpio_p) {
4502 value = msm_cdc_pinctrl_get_state(
4503 pdata->us_euro_gpio_p);
4504 if (value)
4505 msm_cdc_pinctrl_select_sleep_state(
4506 pdata->us_euro_gpio_p);
4507 else
4508 msm_cdc_pinctrl_select_active_state(
4509 pdata->us_euro_gpio_p);
4510 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
4511 __func__, value, !value);
4512 ret = true;
4513 }
4514
4515 return ret;
4516}
4517
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4518static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
4519 struct snd_pcm_hw_params *params)
4520{
4521 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4522 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4523 int ret = 0;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4524 int slot_width = TDM_SLOT_WIDTH_BITS;
4525 int channels, slots = TDM_MAX_SLOTS;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4526 unsigned int slot_mask, rate, clk_freq;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4527 unsigned int *slot_offset;
4528 struct tdm_dev_config *config;
4529 unsigned int path_dir = 0, interface = 0, channel_interface = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4530
4531 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
4532
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4533 if (cpu_dai->id < AFE_PORT_ID_TDM_PORT_RANGE_START) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4534 pr_err("%s: dai id 0x%x not supported\n",
4535 __func__, cpu_dai->id);
4536 return -EINVAL;
4537 }
4538
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4539 /* RX or TX */
4540 path_dir = cpu_dai->id % MAX_PATH;
4541
4542 /* PRI, SEC, TERT, QUAT, QUIN, ... */
4543 interface = (cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START)
4544 / (MAX_PATH * TDM_PORT_MAX);
4545
4546 /* 0, 1, 2, .. 7 */
4547 channel_interface =
4548 ((cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START) / MAX_PATH)
4549 % TDM_PORT_MAX;
4550
4551 pr_debug("%s: path dir: %u, interface %u, channel interface %u\n",
4552 __func__, path_dir, interface, channel_interface);
4553
4554 config = ((struct tdm_dev_config *) tdm_cfg[interface]) +
4555 (path_dir * TDM_PORT_MAX) + channel_interface;
4556 slot_offset = config->tdm_slot_offset;
4557
4558 if (path_dir)
4559 channels = tdm_tx_cfg[interface][channel_interface].channels;
4560 else
4561 channels = tdm_rx_cfg[interface][channel_interface].channels;
4562
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4563 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4564 /*2 slot config - bits 0 and 1 set for the first two slots */
4565 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4566
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4567 pr_debug("%s: tdm rx slot_width %d slots %d slot_mask %x\n",
4568 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4569
4570 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
4571 slots, slot_width);
4572 if (ret < 0) {
4573 pr_err("%s: failed to set tdm rx slot, err:%d\n",
4574 __func__, ret);
4575 goto end;
4576 }
4577
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4578 pr_debug("%s: tdm rx channels: %d\n", __func__, channels);
4579
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4580 ret = snd_soc_dai_set_channel_map(cpu_dai,
4581 0, NULL, channels, slot_offset);
4582 if (ret < 0) {
4583 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
4584 __func__, ret);
4585 goto end;
4586 }
4587 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4588 /*2 slot config - bits 0 and 1 set for the first two slots */
4589 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4590
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4591 pr_debug("%s: tdm tx slot_width %d slots %d slot_mask %x\n",
4592 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4593
4594 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
4595 slots, slot_width);
4596 if (ret < 0) {
4597 pr_err("%s: failed to set tdm tx slot, err:%d\n",
4598 __func__, ret);
4599 goto end;
4600 }
4601
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4602 pr_debug("%s: tdm tx channels: %d\n", __func__, channels);
4603
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4604 ret = snd_soc_dai_set_channel_map(cpu_dai,
4605 channels, slot_offset, 0, NULL);
4606 if (ret < 0) {
4607 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
4608 __func__, ret);
4609 goto end;
4610 }
4611 } else {
4612 ret = -EINVAL;
4613 pr_err("%s: invalid use case, err:%d\n",
4614 __func__, ret);
4615 goto end;
4616 }
4617
4618 rate = params_rate(params);
4619 clk_freq = rate * slot_width * slots;
4620 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
4621 if (ret < 0)
4622 pr_err("%s: failed to set tdm clk, err:%d\n",
4623 __func__, ret);
4624
4625end:
4626 return ret;
4627}
4628
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4629static int msm_get_tdm_mode(u32 port_id)
4630{
4631 int tdm_mode;
4632
4633 switch (port_id) {
4634 case AFE_PORT_ID_PRIMARY_TDM_RX:
4635 case AFE_PORT_ID_PRIMARY_TDM_TX:
4636 tdm_mode = TDM_PRI;
4637 break;
4638 case AFE_PORT_ID_SECONDARY_TDM_RX:
4639 case AFE_PORT_ID_SECONDARY_TDM_TX:
4640 tdm_mode = TDM_SEC;
4641 break;
4642 case AFE_PORT_ID_TERTIARY_TDM_RX:
4643 case AFE_PORT_ID_TERTIARY_TDM_TX:
4644 tdm_mode = TDM_TERT;
4645 break;
4646 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4647 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4648 tdm_mode = TDM_QUAT;
4649 break;
4650 case AFE_PORT_ID_QUINARY_TDM_RX:
4651 case AFE_PORT_ID_QUINARY_TDM_TX:
4652 tdm_mode = TDM_QUIN;
4653 break;
4654 case AFE_PORT_ID_SENARY_TDM_RX:
4655 case AFE_PORT_ID_SENARY_TDM_TX:
4656 tdm_mode = TDM_SEN;
4657 break;
4658 default:
4659 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
4660 tdm_mode = -EINVAL;
4661 }
4662 return tdm_mode;
4663}
4664
4665static int kona_tdm_snd_startup(struct snd_pcm_substream *substream)
4666{
4667 int ret = 0;
4668 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4669 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4670 struct snd_soc_card *card = rtd->card;
4671 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4672 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4673
4674 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4675 ret = -EINVAL;
4676 pr_err("%s: Invalid TDM interface %d\n",
4677 __func__, ret);
4678 return ret;
4679 }
4680
4681 if (pdata->mi2s_gpio_p[tdm_mode]) {
4682 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4683 == 0) {
4684 ret = msm_cdc_pinctrl_select_active_state(
4685 pdata->mi2s_gpio_p[tdm_mode]);
4686 if (ret) {
4687 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
4688 __func__, ret);
4689 goto done;
4690 }
4691 }
4692 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4693 }
4694
4695done:
4696 return ret;
4697}
4698
4699static void kona_tdm_snd_shutdown(struct snd_pcm_substream *substream)
4700{
4701 int ret = 0;
4702 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4703 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4704 struct snd_soc_card *card = rtd->card;
4705 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4706 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4707
4708 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4709 ret = -EINVAL;
4710 pr_err("%s: Invalid TDM interface %d\n",
4711 __func__, ret);
4712 return;
4713 }
4714
4715 if (pdata->mi2s_gpio_p[tdm_mode]) {
4716 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4717 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4718 == 0) {
4719 ret = msm_cdc_pinctrl_select_sleep_state(
4720 pdata->mi2s_gpio_p[tdm_mode]);
4721 if (ret)
4722 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
4723 __func__, ret);
4724 }
4725 }
4726}
4727
4728static int kona_aux_snd_startup(struct snd_pcm_substream *substream)
4729{
4730 int ret = 0;
4731 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4732 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4733 struct snd_soc_card *card = rtd->card;
4734 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4735 u32 aux_mode = cpu_dai->id - 1;
4736
4737 if (aux_mode >= AUX_PCM_MAX) {
4738 ret = -EINVAL;
4739 pr_err("%s: Invalid AUX interface %d\n",
4740 __func__, ret);
4741 return ret;
4742 }
4743
4744 if (pdata->mi2s_gpio_p[aux_mode]) {
4745 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4746 == 0) {
4747 ret = msm_cdc_pinctrl_select_active_state(
4748 pdata->mi2s_gpio_p[aux_mode]);
4749 if (ret) {
4750 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
4751 __func__, ret);
4752 goto done;
4753 }
4754 }
4755 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4756 }
4757
4758done:
4759 return ret;
4760}
4761
4762static void kona_aux_snd_shutdown(struct snd_pcm_substream *substream)
4763{
4764 int ret = 0;
4765 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4766 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4767 struct snd_soc_card *card = rtd->card;
4768 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4769 u32 aux_mode = cpu_dai->id - 1;
4770
4771 if (aux_mode >= AUX_PCM_MAX) {
4772 pr_err("%s: Invalid AUX interface %d\n",
4773 __func__, ret);
4774 return;
4775 }
4776
4777 if (pdata->mi2s_gpio_p[aux_mode]) {
4778 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4779 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4780 == 0) {
4781 ret = msm_cdc_pinctrl_select_sleep_state(
4782 pdata->mi2s_gpio_p[aux_mode]);
4783 if (ret)
4784 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
4785 __func__, ret);
4786 }
4787 }
4788}
4789
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4790static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
4791{
4792 int ret = 0;
4793 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4794 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4795
4796 switch (dai_link->id) {
4797 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4798 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4799 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4800 ret = kona_send_island_va_config(dai_link->id);
4801 if (ret)
4802 pr_err("%s: send island va cfg failed, err: %d\n",
4803 __func__, ret);
4804 break;
4805 }
4806
4807 return ret;
4808}
4809
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4810static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
4811 struct snd_pcm_hw_params *params)
4812{
4813 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4814 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4815 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4816 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4817
4818 int ret = 0;
4819 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
4820 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4821 u32 user_set_tx_ch = 0;
4822 u32 user_set_rx_ch = 0;
4823 u32 ch_id;
4824
4825 ret = snd_soc_dai_get_channel_map(codec_dai,
4826 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
4827 &rx_ch_cdc_dma);
4828 if (ret < 0) {
4829 pr_err("%s: failed to get codec chan map, err:%d\n",
4830 __func__, ret);
4831 goto err;
4832 }
4833
4834 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4835 switch (dai_link->id) {
4836 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4837 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4838 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4839 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4840 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4841 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4842 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
4843 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4844 {
4845 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4846 pr_debug("%s: id %d rx_ch=%d\n", __func__,
4847 ch_id, cdc_dma_rx_cfg[ch_id].channels);
4848 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
4849 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4850 user_set_rx_ch, &rx_ch_cdc_dma);
4851 if (ret < 0) {
4852 pr_err("%s: failed to set cpu chan map, err:%d\n",
4853 __func__, ret);
4854 goto err;
4855 }
4856
4857 }
4858 break;
4859 }
4860 } else {
4861 switch (dai_link->id) {
4862 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4863 {
4864 user_set_tx_ch = msm_vi_feed_tx_ch;
4865 }
4866 break;
4867 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4868 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4869 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4870 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4871 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4872 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4873 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4874 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4875 {
4876 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4877 pr_debug("%s: id %d tx_ch=%d\n", __func__,
4878 ch_id, cdc_dma_tx_cfg[ch_id].channels);
4879 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
4880 }
4881 break;
4882 }
4883
4884 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
4885 &tx_ch_cdc_dma, 0, 0);
4886 if (ret < 0) {
4887 pr_err("%s: failed to set cpu chan map, err:%d\n",
4888 __func__, ret);
4889 goto err;
4890 }
4891 }
4892
4893err:
4894 return ret;
4895}
4896
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4897static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
4898{
4899 cpumask_t mask;
4900
4901 if (pm_qos_request_active(&substream->latency_pm_qos_req))
4902 pm_qos_remove_request(&substream->latency_pm_qos_req);
4903
4904 cpumask_clear(&mask);
4905 cpumask_set_cpu(1, &mask); /* affine to core 1 */
4906 cpumask_set_cpu(2, &mask); /* affine to core 2 */
4907 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
4908
4909 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
4910
4911 pm_qos_add_request(&substream->latency_pm_qos_req,
4912 PM_QOS_CPU_DMA_LATENCY,
4913 MSM_LL_QOS_VALUE);
4914 return 0;
4915}
4916
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]4917void mi2s_disable_audio_vote(struct snd_pcm_substream *substream)
4918{
4919 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4920 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4921 int index = cpu_dai->id;
4922 struct snd_soc_card *card = rtd->card;
4923 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4924 int sample_rate = 0;
4925
4926 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4927 sample_rate = mi2s_rx_cfg[index].sample_rate;
4928 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4929 sample_rate = mi2s_tx_cfg[index].sample_rate;
4930 } else {
4931 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
4932 return;
4933 }
4934
4935 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
4936 if (pdata->lpass_audio_hw_vote != NULL) {
4937 if (--pdata->core_audio_vote_count == 0) {
4938 clk_disable_unprepare(
4939 pdata->lpass_audio_hw_vote);
4940 } else if (pdata->core_audio_vote_count < 0) {
4941 pr_err("%s: audio vote mismatch\n", __func__);
4942 pdata->core_audio_vote_count = 0;
4943 }
4944 } else {
4945 pr_err("%s: Invalid lpass audio hw node\n", __func__);
4946 }
4947 }
4948}
4949
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4950static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
4951{
4952 int ret = 0;
4953 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4954 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4955 int index = cpu_dai->id;
4956 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4957 struct snd_soc_card *card = rtd->card;
4958 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]4959 int sample_rate = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4960
4961 dev_dbg(rtd->card->dev,
4962 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
4963 __func__, substream->name, substream->stream,
4964 cpu_dai->name, cpu_dai->id);
4965
4966 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4967 ret = -EINVAL;
4968 dev_err(rtd->card->dev,
4969 "%s: CPU DAI id (%d) out of range\n",
4970 __func__, cpu_dai->id);
4971 goto err;
4972 }
4973 /*
4974 * Mutex protection in case the same MI2S
4975 * interface using for both TX and RX so
4976 * that the same clock won't be enable twice.
4977 */
4978 mutex_lock(&mi2s_intf_conf[index].lock);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]4979 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4980 sample_rate = mi2s_rx_cfg[index].sample_rate;
4981 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4982 sample_rate = mi2s_tx_cfg[index].sample_rate;
4983 } else {
4984 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
4985 ret = -EINVAL;
4986 goto vote_err;
4987 }
4988
4989 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
4990 if (pdata->lpass_audio_hw_vote == NULL) {
4991 dev_err(rtd->card->dev, "%s: Invalid lpass audio hw node\n",
4992 __func__);
4993 ret = -EINVAL;
4994 goto vote_err;
4995 }
4996 if (pdata->core_audio_vote_count == 0) {
4997 ret = clk_prepare_enable(pdata->lpass_audio_hw_vote);
4998 if (ret < 0) {
4999 dev_err(rtd->card->dev, "%s: audio vote error\n",
5000 __func__);
5001 goto vote_err;
5002 }
5003 }
5004 pdata->core_audio_vote_count++;
5005 }
5006
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5007 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5008 /* Check if msm needs to provide the clock to the interface */
5009 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5010 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5011 fmt = SND_SOC_DAIFMT_CBM_CFM;
5012 }
5013 ret = msm_mi2s_set_sclk(substream, true);
5014 if (ret < 0) {
5015 dev_err(rtd->card->dev,
5016 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5017 __func__, ret);
5018 goto clean_up;
5019 }
5020
5021 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5022 if (ret < 0) {
5023 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5024 __func__, index, ret);
5025 goto clk_off;
5026 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5027 if (pdata->mi2s_gpio_p[index]) {
5028 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5029 == 0) {
5030 ret = msm_cdc_pinctrl_select_active_state(
5031 pdata->mi2s_gpio_p[index]);
5032 if (ret) {
5033 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
5034 __func__, ret);
5035 goto clk_off;
5036 }
5037 }
5038 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
5039 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5040 }
5041clk_off:
5042 if (ret < 0)
5043 msm_mi2s_set_sclk(substream, false);
5044clean_up:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5045 if (ret < 0) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5046 mi2s_intf_conf[index].ref_cnt--;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5047 mi2s_disable_audio_vote(substream);
5048 }
5049vote_err:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5050 mutex_unlock(&mi2s_intf_conf[index].lock);
5051err:
5052 return ret;
5053}
5054
5055static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5056{
5057 int ret = 0;
5058 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5059 int index = rtd->cpu_dai->id;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5060 struct snd_soc_card *card = rtd->card;
5061 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5062
5063 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5064 substream->name, substream->stream);
5065 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5066 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5067 return;
5068 }
5069
5070 mutex_lock(&mi2s_intf_conf[index].lock);
5071 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5072 if (pdata->mi2s_gpio_p[index]) {
5073 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
5074 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5075 == 0) {
5076 ret = msm_cdc_pinctrl_select_sleep_state(
5077 pdata->mi2s_gpio_p[index]);
5078 if (ret)
5079 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
5080 __func__, ret);
5081 }
5082 }
5083
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5084 ret = msm_mi2s_set_sclk(substream, false);
5085 if (ret < 0)
5086 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5087 __func__, index, ret);
5088 }
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5089 mi2s_disable_audio_vote(substream);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5090 mutex_unlock(&mi2s_intf_conf[index].lock);
5091}
5092
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5093static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
5094 struct snd_pcm_hw_params *params)
5095{
5096 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5097 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5098 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5099 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5100 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
5101 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5102 int ret = 0;
5103
5104 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5105 codec_dai->name, codec_dai->id);
5106 ret = snd_soc_dai_get_channel_map(codec_dai,
5107 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5108 if (ret) {
5109 dev_err(rtd->dev,
5110 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5111 __func__, ret);
5112 goto err;
5113 }
5114
5115 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5116 __func__, tx_ch_cnt, dai_link->id);
5117
5118 ret = snd_soc_dai_set_channel_map(cpu_dai,
5119 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5120 if (ret)
5121 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5122 __func__, ret);
5123
5124err:
5125 return ret;
5126}
5127
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5128static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5129 struct snd_pcm_hw_params *params)
5130{
5131 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5132 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5133 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5134 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5135 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5136 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5137 int ret = 0;
5138
5139 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5140 codec_dai->name, codec_dai->id);
5141 ret = snd_soc_dai_get_channel_map(codec_dai,
5142 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5143 if (ret) {
5144 dev_err(rtd->dev,
5145 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5146 __func__, ret);
5147 goto err;
5148 }
5149
5150 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5151 __func__, tx_ch_cnt, dai_link->id);
5152
5153 ret = snd_soc_dai_set_channel_map(cpu_dai,
5154 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5155 if (ret)
5156 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5157 __func__, ret);
5158
5159err:
5160 return ret;
5161}
5162
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5163static struct snd_soc_ops kona_aux_be_ops = {
5164 .startup = kona_aux_snd_startup,
5165 .shutdown = kona_aux_snd_shutdown
5166};
5167
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5168static struct snd_soc_ops kona_tdm_be_ops = {
5169 .hw_params = kona_tdm_snd_hw_params,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5170 .startup = kona_tdm_snd_startup,
5171 .shutdown = kona_tdm_snd_shutdown
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5172};
5173
5174static struct snd_soc_ops msm_mi2s_be_ops = {
5175 .startup = msm_mi2s_snd_startup,
5176 .shutdown = msm_mi2s_snd_shutdown,
5177};
5178
5179static struct snd_soc_ops msm_fe_qos_ops = {
5180 .prepare = msm_fe_qos_prepare,
5181};
5182
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5183static struct snd_soc_ops msm_cdc_dma_be_ops = {
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]5184 .startup = msm_snd_cdc_dma_startup,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5185 .hw_params = msm_snd_cdc_dma_hw_params,
5186};
5187
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5188static struct snd_soc_ops msm_wcn_ops = {
5189 .hw_params = msm_wcn_hw_params,
5190};
5191
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5192static struct snd_soc_ops msm_wcn_ops_lito = {
5193 .hw_params = msm_wcn_hw_params_lito,
5194};
5195
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5196static int msm_dmic_event(struct snd_soc_dapm_widget *w,
5197 struct snd_kcontrol *kcontrol, int event)
5198{
5199 struct msm_asoc_mach_data *pdata = NULL;
5200 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
5201 int ret = 0;
5202 u32 dmic_idx;
5203 int *dmic_gpio_cnt;
5204 struct device_node *dmic_gpio;
5205 char *wname;
5206
5207 wname = strpbrk(w->name, "012345");
5208 if (!wname) {
5209 dev_err(component->dev, "%s: widget not found\n", __func__);
5210 return -EINVAL;
5211 }
5212
5213 ret = kstrtouint(wname, 10, &dmic_idx);
5214 if (ret < 0) {
5215 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
5216 __func__);
5217 return -EINVAL;
5218 }
5219
5220 pdata = snd_soc_card_get_drvdata(component->card);
5221
5222 switch (dmic_idx) {
5223 case 0:
5224 case 1:
5225 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
5226 dmic_gpio = pdata->dmic01_gpio_p;
5227 break;
5228 case 2:
5229 case 3:
5230 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
5231 dmic_gpio = pdata->dmic23_gpio_p;
5232 break;
5233 case 4:
5234 case 5:
5235 dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
5236 dmic_gpio = pdata->dmic45_gpio_p;
5237 break;
5238 default:
5239 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
5240 __func__);
5241 return -EINVAL;
5242 }
5243
5244 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
5245 __func__, event, dmic_idx, *dmic_gpio_cnt);
5246
5247 switch (event) {
5248 case SND_SOC_DAPM_PRE_PMU:
5249 (*dmic_gpio_cnt)++;
5250 if (*dmic_gpio_cnt == 1) {
5251 ret = msm_cdc_pinctrl_select_active_state(
5252 dmic_gpio);
5253 if (ret < 0) {
5254 pr_err("%s: gpio set cannot be activated %sd",
5255 __func__, "dmic_gpio");
5256 return ret;
5257 }
5258 }
5259
5260 break;
5261 case SND_SOC_DAPM_POST_PMD:
5262 (*dmic_gpio_cnt)--;
5263 if (*dmic_gpio_cnt == 0) {
5264 ret = msm_cdc_pinctrl_select_sleep_state(
5265 dmic_gpio);
5266 if (ret < 0) {
5267 pr_err("%s: gpio set cannot be de-activated %sd",
5268 __func__, "dmic_gpio");
5269 return ret;
5270 }
5271 }
5272 break;
5273 default:
5274 pr_err("%s: invalid DAPM event %d\n", __func__, event);
5275 return -EINVAL;
5276 }
5277 return 0;
5278}
5279
5280static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
5281 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
5282 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
5283 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
5284 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]5285 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5286 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
5287 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
5288 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
5289 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
5290 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
5291 SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +0530[diff] [blame]5292 SND_SOC_DAPM_MIC("Digital Mic6", NULL),
5293 SND_SOC_DAPM_MIC("Digital Mic7", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5294};
5295
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5296static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
5297{
5298 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5299 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
5300 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5301
5302 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5303 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5304}
5305
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5306static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
5307{
5308 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5309 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
5310 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5311
5312 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5313 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5314}
5315
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5316static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
5317{
5318 int ret = -EINVAL;
5319 struct snd_soc_component *component;
5320 struct snd_soc_dapm_context *dapm;
5321 struct snd_card *card;
5322 struct snd_info_entry *entry;
5323 struct snd_soc_component *aux_comp;
5324 struct msm_asoc_mach_data *pdata =
5325 snd_soc_card_get_drvdata(rtd->card);
5326
5327 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
5328 if (!component) {
5329 pr_err("%s: could not find component for bolero_codec\n",
5330 __func__);
5331 return ret;
5332 }
5333
5334 dapm = snd_soc_component_get_dapm(component);
5335
5336 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
5337 ARRAY_SIZE(msm_int_snd_controls));
5338 if (ret < 0) {
5339 pr_err("%s: add_component_controls failed: %d\n",
5340 __func__, ret);
5341 return ret;
5342 }
5343 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
5344 ARRAY_SIZE(msm_common_snd_controls));
5345 if (ret < 0) {
5346 pr_err("%s: add common snd controls failed: %d\n",
5347 __func__, ret);
5348 return ret;
5349 }
5350
5351 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
5352 ARRAY_SIZE(msm_int_dapm_widgets));
5353
5354 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
5355 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
5356 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
5357 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Sudheer Papothi3fc2d772019-05-11 14:11:29 +0530[diff] [blame]5358 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
5359 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +0530[diff] [blame]5360 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6");
5361 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic7");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5362
5363 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
5364 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
5365 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
5366 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]5367 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5368
5369 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
5370 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
5371 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
5372 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
5373
5374 snd_soc_dapm_sync(dapm);
5375
5376 /*
5377 * Send speaker configuration only for WSA8810.
5378 * Default configuration is for WSA8815.
5379 */
5380 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
5381 __func__, rtd->card->num_aux_devs);
5382 if (rtd->card->num_aux_devs &&
5383 !list_empty(&rtd->card->component_dev_list)) {
Meng Wangbb5e0e92019-06-05 15:24:39 +0800[diff] [blame]5384 list_for_each_entry(aux_comp,
5385 &rtd->card->aux_comp_list,
5386 card_aux_list) {
5387 if (aux_comp->name != NULL && (
5388 !strcmp(aux_comp->name, WSA8810_NAME_1) ||
5389 !strcmp(aux_comp->name, WSA8810_NAME_2))) {
5390 wsa_macro_set_spkr_mode(component,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5391 WSA_MACRO_SPKR_MODE_1);
Meng Wangbb5e0e92019-06-05 15:24:39 +0800[diff] [blame]5392 wsa_macro_set_spkr_gain_offset(component,
5393 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
5394 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5395 }
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]5396 if (pdata->lito_v2_enabled) {
5397 /*
5398 * Enable tx data line3 for saipan version v2 amd
5399 * write corresponding lpi register.
5400 */
5401 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map_v2),
5402 sm_port_map_v2);
5403 } else {
5404 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
5405 sm_port_map);
5406 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5407 }
5408 card = rtd->card->snd_card;
5409 if (!pdata->codec_root) {
5410 entry = snd_info_create_subdir(card->module, "codecs",
5411 card->proc_root);
5412 if (!entry) {
5413 pr_debug("%s: Cannot create codecs module entry\n",
5414 __func__);
5415 ret = 0;
5416 goto err;
5417 }
5418 pdata->codec_root = entry;
5419 }
5420 bolero_info_create_codec_entry(pdata->codec_root, component);
Karthikeyan Mani664bd4a2019-02-21 13:30:34 -0800[diff] [blame]5421 bolero_register_wake_irq(component, false);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5422 codec_reg_done = true;
5423 return 0;
5424err:
5425 return ret;
5426}
5427
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]5428static void *def_wcd_mbhc_cal(void)
5429{
5430 void *wcd_mbhc_cal;
5431 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5432 u16 *btn_high;
5433
5434 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5435 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5436 if (!wcd_mbhc_cal)
5437 return NULL;
5438
5439 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
5440 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
5441 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5442 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5443 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5444
5445 btn_high[0] = 75;
5446 btn_high[1] = 150;
5447 btn_high[2] = 237;
5448 btn_high[3] = 500;
5449 btn_high[4] = 500;
5450 btn_high[5] = 500;
5451 btn_high[6] = 500;
5452 btn_high[7] = 500;
5453
5454 return wcd_mbhc_cal;
5455}
5456
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5457/* Digital audio interface glue - connects codec <---> CPU */
5458static struct snd_soc_dai_link msm_common_dai_links[] = {
5459 /* FrontEnd DAI Links */
5460 {/* hw:x,0 */
5461 .name = MSM_DAILINK_NAME(Media1),
5462 .stream_name = "MultiMedia1",
5463 .cpu_dai_name = "MultiMedia1",
5464 .platform_name = "msm-pcm-dsp.0",
5465 .dynamic = 1,
5466 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5467 .dpcm_playback = 1,
5468 .dpcm_capture = 1,
5469 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5470 SND_SOC_DPCM_TRIGGER_POST},
5471 .codec_dai_name = "snd-soc-dummy-dai",
5472 .codec_name = "snd-soc-dummy",
5473 .ignore_suspend = 1,
5474 /* this dainlink has playback support */
5475 .ignore_pmdown_time = 1,
5476 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5477 },
5478 {/* hw:x,1 */
5479 .name = MSM_DAILINK_NAME(Media2),
5480 .stream_name = "MultiMedia2",
5481 .cpu_dai_name = "MultiMedia2",
5482 .platform_name = "msm-pcm-dsp.0",
5483 .dynamic = 1,
5484 .dpcm_playback = 1,
5485 .dpcm_capture = 1,
5486 .codec_dai_name = "snd-soc-dummy-dai",
5487 .codec_name = "snd-soc-dummy",
5488 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5489 SND_SOC_DPCM_TRIGGER_POST},
5490 .ignore_suspend = 1,
5491 /* this dainlink has playback support */
5492 .ignore_pmdown_time = 1,
5493 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5494 },
5495 {/* hw:x,2 */
5496 .name = "VoiceMMode1",
5497 .stream_name = "VoiceMMode1",
5498 .cpu_dai_name = "VoiceMMode1",
5499 .platform_name = "msm-pcm-voice",
5500 .dynamic = 1,
5501 .dpcm_playback = 1,
5502 .dpcm_capture = 1,
5503 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5504 SND_SOC_DPCM_TRIGGER_POST},
5505 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5506 .ignore_suspend = 1,
5507 .ignore_pmdown_time = 1,
5508 .codec_dai_name = "snd-soc-dummy-dai",
5509 .codec_name = "snd-soc-dummy",
5510 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5511 },
5512 {/* hw:x,3 */
5513 .name = "MSM VoIP",
5514 .stream_name = "VoIP",
5515 .cpu_dai_name = "VoIP",
5516 .platform_name = "msm-voip-dsp",
5517 .dynamic = 1,
5518 .dpcm_playback = 1,
5519 .dpcm_capture = 1,
5520 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5521 SND_SOC_DPCM_TRIGGER_POST},
5522 .codec_dai_name = "snd-soc-dummy-dai",
5523 .codec_name = "snd-soc-dummy",
5524 .ignore_suspend = 1,
5525 /* this dainlink has playback support */
5526 .ignore_pmdown_time = 1,
5527 .id = MSM_FRONTEND_DAI_VOIP,
5528 },
5529 {/* hw:x,4 */
5530 .name = MSM_DAILINK_NAME(ULL),
5531 .stream_name = "MultiMedia3",
5532 .cpu_dai_name = "MultiMedia3",
5533 .platform_name = "msm-pcm-dsp.2",
5534 .dynamic = 1,
5535 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5536 .dpcm_playback = 1,
5537 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5538 SND_SOC_DPCM_TRIGGER_POST},
5539 .codec_dai_name = "snd-soc-dummy-dai",
5540 .codec_name = "snd-soc-dummy",
5541 .ignore_suspend = 1,
5542 /* this dainlink has playback support */
5543 .ignore_pmdown_time = 1,
5544 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5545 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5546 {/* hw:x,5 */
5547 .name = "MSM AFE-PCM RX",
5548 .stream_name = "AFE-PROXY RX",
5549 .cpu_dai_name = "msm-dai-q6-dev.241",
5550 .codec_name = "msm-stub-codec.1",
5551 .codec_dai_name = "msm-stub-rx",
5552 .platform_name = "msm-pcm-afe",
5553 .dpcm_playback = 1,
5554 .ignore_suspend = 1,
5555 /* this dainlink has playback support */
5556 .ignore_pmdown_time = 1,
5557 },
5558 {/* hw:x,6 */
5559 .name = "MSM AFE-PCM TX",
5560 .stream_name = "AFE-PROXY TX",
5561 .cpu_dai_name = "msm-dai-q6-dev.240",
5562 .codec_name = "msm-stub-codec.1",
5563 .codec_dai_name = "msm-stub-tx",
5564 .platform_name = "msm-pcm-afe",
5565 .dpcm_capture = 1,
5566 .ignore_suspend = 1,
5567 },
5568 {/* hw:x,7 */
5569 .name = MSM_DAILINK_NAME(Compress1),
5570 .stream_name = "Compress1",
5571 .cpu_dai_name = "MultiMedia4",
5572 .platform_name = "msm-compress-dsp",
5573 .dynamic = 1,
5574 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5575 .dpcm_playback = 1,
5576 .dpcm_capture = 1,
5577 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5578 SND_SOC_DPCM_TRIGGER_POST},
5579 .codec_dai_name = "snd-soc-dummy-dai",
5580 .codec_name = "snd-soc-dummy",
5581 .ignore_suspend = 1,
5582 .ignore_pmdown_time = 1,
5583 /* this dainlink has playback support */
5584 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5585 },
Meng Wang197cb302019-03-01 13:54:38 +0800[diff] [blame]5586 /* Hostless PCM purpose */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5587 {/* hw:x,8 */
5588 .name = "AUXPCM Hostless",
5589 .stream_name = "AUXPCM Hostless",
5590 .cpu_dai_name = "AUXPCM_HOSTLESS",
5591 .platform_name = "msm-pcm-hostless",
5592 .dynamic = 1,
5593 .dpcm_playback = 1,
5594 .dpcm_capture = 1,
5595 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5596 SND_SOC_DPCM_TRIGGER_POST},
5597 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5598 .ignore_suspend = 1,
5599 /* this dainlink has playback support */
5600 .ignore_pmdown_time = 1,
5601 .codec_dai_name = "snd-soc-dummy-dai",
5602 .codec_name = "snd-soc-dummy",
5603 },
5604 {/* hw:x,9 */
5605 .name = MSM_DAILINK_NAME(LowLatency),
5606 .stream_name = "MultiMedia5",
5607 .cpu_dai_name = "MultiMedia5",
5608 .platform_name = "msm-pcm-dsp.1",
5609 .dynamic = 1,
5610 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5611 .dpcm_playback = 1,
5612 .dpcm_capture = 1,
5613 .codec_dai_name = "snd-soc-dummy-dai",
5614 .codec_name = "snd-soc-dummy",
5615 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5616 SND_SOC_DPCM_TRIGGER_POST},
5617 .ignore_suspend = 1,
5618 /* this dainlink has playback support */
5619 .ignore_pmdown_time = 1,
5620 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
5621 .ops = &msm_fe_qos_ops,
5622 },
5623 {/* hw:x,10 */
5624 .name = "Listen 1 Audio Service",
5625 .stream_name = "Listen 1 Audio Service",
5626 .cpu_dai_name = "LSM1",
5627 .platform_name = "msm-lsm-client",
5628 .dynamic = 1,
5629 .dpcm_capture = 1,
5630 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5631 SND_SOC_DPCM_TRIGGER_POST },
5632 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5633 .ignore_suspend = 1,
5634 .codec_dai_name = "snd-soc-dummy-dai",
5635 .codec_name = "snd-soc-dummy",
5636 .id = MSM_FRONTEND_DAI_LSM1,
5637 },
5638 /* Multiple Tunnel instances */
5639 {/* hw:x,11 */
5640 .name = MSM_DAILINK_NAME(Compress2),
5641 .stream_name = "Compress2",
5642 .cpu_dai_name = "MultiMedia7",
5643 .platform_name = "msm-compress-dsp",
5644 .dynamic = 1,
5645 .dpcm_playback = 1,
5646 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5647 SND_SOC_DPCM_TRIGGER_POST},
5648 .codec_dai_name = "snd-soc-dummy-dai",
5649 .codec_name = "snd-soc-dummy",
5650 .ignore_suspend = 1,
5651 .ignore_pmdown_time = 1,
5652 /* this dainlink has playback support */
5653 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
5654 },
5655 {/* hw:x,12 */
5656 .name = MSM_DAILINK_NAME(MultiMedia10),
5657 .stream_name = "MultiMedia10",
5658 .cpu_dai_name = "MultiMedia10",
5659 .platform_name = "msm-pcm-dsp.1",
5660 .dynamic = 1,
5661 .dpcm_playback = 1,
5662 .dpcm_capture = 1,
5663 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5664 SND_SOC_DPCM_TRIGGER_POST},
5665 .codec_dai_name = "snd-soc-dummy-dai",
5666 .codec_name = "snd-soc-dummy",
5667 .ignore_suspend = 1,
5668 .ignore_pmdown_time = 1,
5669 /* this dainlink has playback support */
5670 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
5671 },
5672 {/* hw:x,13 */
5673 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
5674 .stream_name = "MM_NOIRQ",
5675 .cpu_dai_name = "MultiMedia8",
5676 .platform_name = "msm-pcm-dsp-noirq",
5677 .dynamic = 1,
5678 .dpcm_playback = 1,
5679 .dpcm_capture = 1,
5680 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5681 SND_SOC_DPCM_TRIGGER_POST},
5682 .codec_dai_name = "snd-soc-dummy-dai",
5683 .codec_name = "snd-soc-dummy",
5684 .ignore_suspend = 1,
5685 .ignore_pmdown_time = 1,
5686 /* this dainlink has playback support */
5687 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
5688 .ops = &msm_fe_qos_ops,
5689 },
5690 /* HDMI Hostless */
5691 {/* hw:x,14 */
5692 .name = "HDMI_RX_HOSTLESS",
5693 .stream_name = "HDMI_RX_HOSTLESS",
5694 .cpu_dai_name = "HDMI_HOSTLESS",
5695 .platform_name = "msm-pcm-hostless",
5696 .dynamic = 1,
5697 .dpcm_playback = 1,
5698 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5699 SND_SOC_DPCM_TRIGGER_POST},
5700 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5701 .ignore_suspend = 1,
5702 .ignore_pmdown_time = 1,
5703 .codec_dai_name = "snd-soc-dummy-dai",
5704 .codec_name = "snd-soc-dummy",
5705 },
5706 {/* hw:x,15 */
5707 .name = "VoiceMMode2",
5708 .stream_name = "VoiceMMode2",
5709 .cpu_dai_name = "VoiceMMode2",
5710 .platform_name = "msm-pcm-voice",
5711 .dynamic = 1,
5712 .dpcm_playback = 1,
5713 .dpcm_capture = 1,
5714 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5715 SND_SOC_DPCM_TRIGGER_POST},
5716 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5717 .ignore_suspend = 1,
5718 .ignore_pmdown_time = 1,
5719 .codec_dai_name = "snd-soc-dummy-dai",
5720 .codec_name = "snd-soc-dummy",
5721 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
5722 },
5723 /* LSM FE */
5724 {/* hw:x,16 */
5725 .name = "Listen 2 Audio Service",
5726 .stream_name = "Listen 2 Audio Service",
5727 .cpu_dai_name = "LSM2",
5728 .platform_name = "msm-lsm-client",
5729 .dynamic = 1,
5730 .dpcm_capture = 1,
5731 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5732 SND_SOC_DPCM_TRIGGER_POST },
5733 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5734 .ignore_suspend = 1,
5735 .codec_dai_name = "snd-soc-dummy-dai",
5736 .codec_name = "snd-soc-dummy",
5737 .id = MSM_FRONTEND_DAI_LSM2,
5738 },
5739 {/* hw:x,17 */
5740 .name = "Listen 3 Audio Service",
5741 .stream_name = "Listen 3 Audio Service",
5742 .cpu_dai_name = "LSM3",
5743 .platform_name = "msm-lsm-client",
5744 .dynamic = 1,
5745 .dpcm_capture = 1,
5746 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5747 SND_SOC_DPCM_TRIGGER_POST },
5748 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5749 .ignore_suspend = 1,
5750 .codec_dai_name = "snd-soc-dummy-dai",
5751 .codec_name = "snd-soc-dummy",
5752 .id = MSM_FRONTEND_DAI_LSM3,
5753 },
5754 {/* hw:x,18 */
5755 .name = "Listen 4 Audio Service",
5756 .stream_name = "Listen 4 Audio Service",
5757 .cpu_dai_name = "LSM4",
5758 .platform_name = "msm-lsm-client",
5759 .dynamic = 1,
5760 .dpcm_capture = 1,
5761 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5762 SND_SOC_DPCM_TRIGGER_POST },
5763 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5764 .ignore_suspend = 1,
5765 .codec_dai_name = "snd-soc-dummy-dai",
5766 .codec_name = "snd-soc-dummy",
5767 .id = MSM_FRONTEND_DAI_LSM4,
5768 },
5769 {/* hw:x,19 */
5770 .name = "Listen 5 Audio Service",
5771 .stream_name = "Listen 5 Audio Service",
5772 .cpu_dai_name = "LSM5",
5773 .platform_name = "msm-lsm-client",
5774 .dynamic = 1,
5775 .dpcm_capture = 1,
5776 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5777 SND_SOC_DPCM_TRIGGER_POST },
5778 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5779 .ignore_suspend = 1,
5780 .codec_dai_name = "snd-soc-dummy-dai",
5781 .codec_name = "snd-soc-dummy",
5782 .id = MSM_FRONTEND_DAI_LSM5,
5783 },
5784 {/* hw:x,20 */
5785 .name = "Listen 6 Audio Service",
5786 .stream_name = "Listen 6 Audio Service",
5787 .cpu_dai_name = "LSM6",
5788 .platform_name = "msm-lsm-client",
5789 .dynamic = 1,
5790 .dpcm_capture = 1,
5791 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5792 SND_SOC_DPCM_TRIGGER_POST },
5793 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5794 .ignore_suspend = 1,
5795 .codec_dai_name = "snd-soc-dummy-dai",
5796 .codec_name = "snd-soc-dummy",
5797 .id = MSM_FRONTEND_DAI_LSM6,
5798 },
5799 {/* hw:x,21 */
5800 .name = "Listen 7 Audio Service",
5801 .stream_name = "Listen 7 Audio Service",
5802 .cpu_dai_name = "LSM7",
5803 .platform_name = "msm-lsm-client",
5804 .dynamic = 1,
5805 .dpcm_capture = 1,
5806 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5807 SND_SOC_DPCM_TRIGGER_POST },
5808 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5809 .ignore_suspend = 1,
5810 .codec_dai_name = "snd-soc-dummy-dai",
5811 .codec_name = "snd-soc-dummy",
5812 .id = MSM_FRONTEND_DAI_LSM7,
5813 },
5814 {/* hw:x,22 */
5815 .name = "Listen 8 Audio Service",
5816 .stream_name = "Listen 8 Audio Service",
5817 .cpu_dai_name = "LSM8",
5818 .platform_name = "msm-lsm-client",
5819 .dynamic = 1,
5820 .dpcm_capture = 1,
5821 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5822 SND_SOC_DPCM_TRIGGER_POST },
5823 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5824 .ignore_suspend = 1,
5825 .codec_dai_name = "snd-soc-dummy-dai",
5826 .codec_name = "snd-soc-dummy",
5827 .id = MSM_FRONTEND_DAI_LSM8,
5828 },
5829 {/* hw:x,23 */
5830 .name = MSM_DAILINK_NAME(Media9),
5831 .stream_name = "MultiMedia9",
5832 .cpu_dai_name = "MultiMedia9",
5833 .platform_name = "msm-pcm-dsp.0",
5834 .dynamic = 1,
5835 .dpcm_playback = 1,
5836 .dpcm_capture = 1,
5837 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5838 SND_SOC_DPCM_TRIGGER_POST},
5839 .codec_dai_name = "snd-soc-dummy-dai",
5840 .codec_name = "snd-soc-dummy",
5841 .ignore_suspend = 1,
5842 /* this dainlink has playback support */
5843 .ignore_pmdown_time = 1,
5844 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
5845 },
5846 {/* hw:x,24 */
5847 .name = MSM_DAILINK_NAME(Compress4),
5848 .stream_name = "Compress4",
5849 .cpu_dai_name = "MultiMedia11",
5850 .platform_name = "msm-compress-dsp",
5851 .dynamic = 1,
5852 .dpcm_playback = 1,
5853 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5854 SND_SOC_DPCM_TRIGGER_POST},
5855 .codec_dai_name = "snd-soc-dummy-dai",
5856 .codec_name = "snd-soc-dummy",
5857 .ignore_suspend = 1,
5858 .ignore_pmdown_time = 1,
5859 /* this dainlink has playback support */
5860 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
5861 },
5862 {/* hw:x,25 */
5863 .name = MSM_DAILINK_NAME(Compress5),
5864 .stream_name = "Compress5",
5865 .cpu_dai_name = "MultiMedia12",
5866 .platform_name = "msm-compress-dsp",
5867 .dynamic = 1,
5868 .dpcm_playback = 1,
5869 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5870 SND_SOC_DPCM_TRIGGER_POST},
5871 .codec_dai_name = "snd-soc-dummy-dai",
5872 .codec_name = "snd-soc-dummy",
5873 .ignore_suspend = 1,
5874 .ignore_pmdown_time = 1,
5875 /* this dainlink has playback support */
5876 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
5877 },
5878 {/* hw:x,26 */
5879 .name = MSM_DAILINK_NAME(Compress6),
5880 .stream_name = "Compress6",
5881 .cpu_dai_name = "MultiMedia13",
5882 .platform_name = "msm-compress-dsp",
5883 .dynamic = 1,
5884 .dpcm_playback = 1,
5885 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5886 SND_SOC_DPCM_TRIGGER_POST},
5887 .codec_dai_name = "snd-soc-dummy-dai",
5888 .codec_name = "snd-soc-dummy",
5889 .ignore_suspend = 1,
5890 .ignore_pmdown_time = 1,
5891 /* this dainlink has playback support */
5892 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
5893 },
5894 {/* hw:x,27 */
5895 .name = MSM_DAILINK_NAME(Compress7),
5896 .stream_name = "Compress7",
5897 .cpu_dai_name = "MultiMedia14",
5898 .platform_name = "msm-compress-dsp",
5899 .dynamic = 1,
5900 .dpcm_playback = 1,
5901 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5902 SND_SOC_DPCM_TRIGGER_POST},
5903 .codec_dai_name = "snd-soc-dummy-dai",
5904 .codec_name = "snd-soc-dummy",
5905 .ignore_suspend = 1,
5906 .ignore_pmdown_time = 1,
5907 /* this dainlink has playback support */
5908 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
5909 },
5910 {/* hw:x,28 */
5911 .name = MSM_DAILINK_NAME(Compress8),
5912 .stream_name = "Compress8",
5913 .cpu_dai_name = "MultiMedia15",
5914 .platform_name = "msm-compress-dsp",
5915 .dynamic = 1,
5916 .dpcm_playback = 1,
5917 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5918 SND_SOC_DPCM_TRIGGER_POST},
5919 .codec_dai_name = "snd-soc-dummy-dai",
5920 .codec_name = "snd-soc-dummy",
5921 .ignore_suspend = 1,
5922 .ignore_pmdown_time = 1,
5923 /* this dainlink has playback support */
5924 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
5925 },
5926 {/* hw:x,29 */
5927 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
5928 .stream_name = "MM_NOIRQ_2",
5929 .cpu_dai_name = "MultiMedia16",
5930 .platform_name = "msm-pcm-dsp-noirq",
5931 .dynamic = 1,
5932 .dpcm_playback = 1,
5933 .dpcm_capture = 1,
5934 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5935 SND_SOC_DPCM_TRIGGER_POST},
5936 .codec_dai_name = "snd-soc-dummy-dai",
5937 .codec_name = "snd-soc-dummy",
5938 .ignore_suspend = 1,
5939 .ignore_pmdown_time = 1,
5940 /* this dainlink has playback support */
5941 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
Arun Mirpuri149008c2019-07-17 17:49:49 -0700[diff] [blame]5942 .ops = &msm_fe_qos_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5943 },
5944 {/* hw:x,30 */
5945 .name = "CDC_DMA Hostless",
5946 .stream_name = "CDC_DMA Hostless",
5947 .cpu_dai_name = "CDC_DMA_HOSTLESS",
5948 .platform_name = "msm-pcm-hostless",
5949 .dynamic = 1,
5950 .dpcm_playback = 1,
5951 .dpcm_capture = 1,
5952 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5953 SND_SOC_DPCM_TRIGGER_POST},
5954 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5955 .ignore_suspend = 1,
5956 /* this dailink has playback support */
5957 .ignore_pmdown_time = 1,
5958 .codec_dai_name = "snd-soc-dummy-dai",
5959 .codec_name = "snd-soc-dummy",
5960 },
5961 {/* hw:x,31 */
5962 .name = "TX3_CDC_DMA Hostless",
5963 .stream_name = "TX3_CDC_DMA Hostless",
5964 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
5965 .platform_name = "msm-pcm-hostless",
5966 .dynamic = 1,
5967 .dpcm_capture = 1,
5968 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5969 SND_SOC_DPCM_TRIGGER_POST},
5970 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5971 .ignore_suspend = 1,
5972 .codec_dai_name = "snd-soc-dummy-dai",
5973 .codec_name = "snd-soc-dummy",
5974 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5975 {/* hw:x,32 */
5976 .name = "Tertiary MI2S TX_Hostless",
5977 .stream_name = "Tertiary MI2S_TX Hostless Capture",
5978 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
5979 .platform_name = "msm-pcm-hostless",
5980 .dynamic = 1,
5981 .dpcm_capture = 1,
5982 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5983 SND_SOC_DPCM_TRIGGER_POST},
5984 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5985 .ignore_suspend = 1,
5986 .ignore_pmdown_time = 1,
5987 .codec_dai_name = "snd-soc-dummy-dai",
5988 .codec_name = "snd-soc-dummy",
5989 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5990};
5991
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5992static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5993 {/* hw:x,33 */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5994 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
5995 .stream_name = "WSA CDC DMA0 Capture",
5996 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
5997 .platform_name = "msm-pcm-hostless",
5998 .codec_name = "bolero_codec",
5999 .codec_dai_name = "wsa_macro_vifeedback",
6000 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6001 .be_hw_params_fixup = msm_be_hw_params_fixup,
6002 .ignore_suspend = 1,
6003 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6004 .ops = &msm_cdc_dma_be_ops,
6005 },
6006};
6007
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6008static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6009 {/* hw:x,34 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6010 .name = MSM_DAILINK_NAME(ASM Loopback),
6011 .stream_name = "MultiMedia6",
6012 .cpu_dai_name = "MultiMedia6",
6013 .platform_name = "msm-pcm-loopback",
6014 .dynamic = 1,
6015 .dpcm_playback = 1,
6016 .dpcm_capture = 1,
6017 .codec_dai_name = "snd-soc-dummy-dai",
6018 .codec_name = "snd-soc-dummy",
6019 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6020 SND_SOC_DPCM_TRIGGER_POST},
6021 .ignore_suspend = 1,
6022 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6023 .ignore_pmdown_time = 1,
6024 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6025 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6026 {/* hw:x,35 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6027 .name = "USB Audio Hostless",
6028 .stream_name = "USB Audio Hostless",
6029 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6030 .platform_name = "msm-pcm-hostless",
6031 .dynamic = 1,
6032 .dpcm_playback = 1,
6033 .dpcm_capture = 1,
6034 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6035 SND_SOC_DPCM_TRIGGER_POST},
6036 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6037 .ignore_suspend = 1,
6038 .ignore_pmdown_time = 1,
6039 .codec_dai_name = "snd-soc-dummy-dai",
6040 .codec_name = "snd-soc-dummy",
6041 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6042 {/* hw:x,36 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6043 .name = "SLIMBUS_7 Hostless",
6044 .stream_name = "SLIMBUS_7 Hostless",
6045 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
6046 .platform_name = "msm-pcm-hostless",
6047 .dynamic = 1,
6048 .dpcm_capture = 1,
6049 .dpcm_playback = 1,
6050 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6051 SND_SOC_DPCM_TRIGGER_POST},
6052 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6053 .ignore_suspend = 1,
6054 .ignore_pmdown_time = 1,
6055 .codec_dai_name = "snd-soc-dummy-dai",
6056 .codec_name = "snd-soc-dummy",
6057 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6058 {/* hw:x,37 */
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6059 .name = "Compress Capture",
6060 .stream_name = "Compress9",
6061 .cpu_dai_name = "MultiMedia17",
6062 .platform_name = "msm-compress-dsp",
6063 .dynamic = 1,
6064 .dpcm_capture = 1,
6065 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6066 SND_SOC_DPCM_TRIGGER_POST},
6067 .codec_dai_name = "snd-soc-dummy-dai",
6068 .codec_name = "snd-soc-dummy",
6069 .ignore_suspend = 1,
6070 .ignore_pmdown_time = 1,
6071 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
6072 },
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6073 {/* hw:x,38 */
6074 .name = "SLIMBUS_8 Hostless",
6075 .stream_name = "SLIMBUS_8 Hostless",
6076 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6077 .platform_name = "msm-pcm-hostless",
6078 .dynamic = 1,
6079 .dpcm_capture = 1,
6080 .dpcm_playback = 1,
6081 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6082 SND_SOC_DPCM_TRIGGER_POST},
6083 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6084 .ignore_suspend = 1,
6085 .ignore_pmdown_time = 1,
6086 .codec_dai_name = "snd-soc-dummy-dai",
6087 .codec_name = "snd-soc-dummy",
6088 },
Karthikeyan Mani2176abc2019-07-11 14:41:05 -0700[diff] [blame]6089 {/* hw:x,39 */
6090 .name = LPASS_BE_TX_CDC_DMA_TX_5,
6091 .stream_name = "TX CDC DMA5 Capture",
6092 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
6093 .platform_name = "msm-pcm-hostless",
6094 .codec_name = "bolero_codec",
6095 .codec_dai_name = "tx_macro_tx3",
6096 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
6097 .be_hw_params_fixup = msm_be_hw_params_fixup,
6098 .ignore_suspend = 1,
6099 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6100 .ops = &msm_cdc_dma_be_ops,
6101 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6102};
6103
6104static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6105 /* Backend AFE DAI Links */
6106 {
6107 .name = LPASS_BE_AFE_PCM_RX,
6108 .stream_name = "AFE Playback",
6109 .cpu_dai_name = "msm-dai-q6-dev.224",
6110 .platform_name = "msm-pcm-routing",
6111 .codec_name = "msm-stub-codec.1",
6112 .codec_dai_name = "msm-stub-rx",
6113 .no_pcm = 1,
6114 .dpcm_playback = 1,
6115 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6116 .be_hw_params_fixup = msm_be_hw_params_fixup,
6117 /* this dainlink has playback support */
6118 .ignore_pmdown_time = 1,
6119 .ignore_suspend = 1,
6120 },
6121 {
6122 .name = LPASS_BE_AFE_PCM_TX,
6123 .stream_name = "AFE Capture",
6124 .cpu_dai_name = "msm-dai-q6-dev.225",
6125 .platform_name = "msm-pcm-routing",
6126 .codec_name = "msm-stub-codec.1",
6127 .codec_dai_name = "msm-stub-tx",
6128 .no_pcm = 1,
6129 .dpcm_capture = 1,
6130 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6131 .be_hw_params_fixup = msm_be_hw_params_fixup,
6132 .ignore_suspend = 1,
6133 },
6134 /* Incall Record Uplink BACK END DAI Link */
6135 {
6136 .name = LPASS_BE_INCALL_RECORD_TX,
6137 .stream_name = "Voice Uplink Capture",
6138 .cpu_dai_name = "msm-dai-q6-dev.32772",
6139 .platform_name = "msm-pcm-routing",
6140 .codec_name = "msm-stub-codec.1",
6141 .codec_dai_name = "msm-stub-tx",
6142 .no_pcm = 1,
6143 .dpcm_capture = 1,
6144 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6145 .be_hw_params_fixup = msm_be_hw_params_fixup,
6146 .ignore_suspend = 1,
6147 },
6148 /* Incall Record Downlink BACK END DAI Link */
6149 {
6150 .name = LPASS_BE_INCALL_RECORD_RX,
6151 .stream_name = "Voice Downlink Capture",
6152 .cpu_dai_name = "msm-dai-q6-dev.32771",
6153 .platform_name = "msm-pcm-routing",
6154 .codec_name = "msm-stub-codec.1",
6155 .codec_dai_name = "msm-stub-tx",
6156 .no_pcm = 1,
6157 .dpcm_capture = 1,
6158 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6159 .be_hw_params_fixup = msm_be_hw_params_fixup,
6160 .ignore_suspend = 1,
6161 },
6162 /* Incall Music BACK END DAI Link */
6163 {
6164 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6165 .stream_name = "Voice Farend Playback",
6166 .cpu_dai_name = "msm-dai-q6-dev.32773",
6167 .platform_name = "msm-pcm-routing",
6168 .codec_name = "msm-stub-codec.1",
6169 .codec_dai_name = "msm-stub-rx",
6170 .no_pcm = 1,
6171 .dpcm_playback = 1,
6172 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6173 .be_hw_params_fixup = msm_be_hw_params_fixup,
6174 .ignore_suspend = 1,
6175 .ignore_pmdown_time = 1,
6176 },
6177 /* Incall Music 2 BACK END DAI Link */
6178 {
6179 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6180 .stream_name = "Voice2 Farend Playback",
6181 .cpu_dai_name = "msm-dai-q6-dev.32770",
6182 .platform_name = "msm-pcm-routing",
6183 .codec_name = "msm-stub-codec.1",
6184 .codec_dai_name = "msm-stub-rx",
6185 .no_pcm = 1,
6186 .dpcm_playback = 1,
6187 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6188 .be_hw_params_fixup = msm_be_hw_params_fixup,
6189 .ignore_suspend = 1,
6190 .ignore_pmdown_time = 1,
6191 },
6192 {
6193 .name = LPASS_BE_USB_AUDIO_RX,
6194 .stream_name = "USB Audio Playback",
6195 .cpu_dai_name = "msm-dai-q6-dev.28672",
6196 .platform_name = "msm-pcm-routing",
6197 .codec_name = "msm-stub-codec.1",
6198 .codec_dai_name = "msm-stub-rx",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6199 .dynamic_be = 1,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6200 .no_pcm = 1,
6201 .dpcm_playback = 1,
6202 .id = MSM_BACKEND_DAI_USB_RX,
6203 .be_hw_params_fixup = msm_be_hw_params_fixup,
6204 .ignore_pmdown_time = 1,
6205 .ignore_suspend = 1,
6206 },
6207 {
6208 .name = LPASS_BE_USB_AUDIO_TX,
6209 .stream_name = "USB Audio Capture",
6210 .cpu_dai_name = "msm-dai-q6-dev.28673",
6211 .platform_name = "msm-pcm-routing",
6212 .codec_name = "msm-stub-codec.1",
6213 .codec_dai_name = "msm-stub-tx",
6214 .no_pcm = 1,
6215 .dpcm_capture = 1,
6216 .id = MSM_BACKEND_DAI_USB_TX,
6217 .be_hw_params_fixup = msm_be_hw_params_fixup,
6218 .ignore_suspend = 1,
6219 },
6220 {
6221 .name = LPASS_BE_PRI_TDM_RX_0,
6222 .stream_name = "Primary TDM0 Playback",
6223 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6224 .platform_name = "msm-pcm-routing",
6225 .codec_name = "msm-stub-codec.1",
6226 .codec_dai_name = "msm-stub-rx",
6227 .no_pcm = 1,
6228 .dpcm_playback = 1,
6229 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6230 .be_hw_params_fixup = msm_be_hw_params_fixup,
6231 .ops = &kona_tdm_be_ops,
6232 .ignore_suspend = 1,
6233 .ignore_pmdown_time = 1,
6234 },
6235 {
6236 .name = LPASS_BE_PRI_TDM_TX_0,
6237 .stream_name = "Primary TDM0 Capture",
6238 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6239 .platform_name = "msm-pcm-routing",
6240 .codec_name = "msm-stub-codec.1",
6241 .codec_dai_name = "msm-stub-tx",
6242 .no_pcm = 1,
6243 .dpcm_capture = 1,
6244 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6245 .be_hw_params_fixup = msm_be_hw_params_fixup,
6246 .ops = &kona_tdm_be_ops,
6247 .ignore_suspend = 1,
6248 },
6249 {
6250 .name = LPASS_BE_SEC_TDM_RX_0,
6251 .stream_name = "Secondary TDM0 Playback",
6252 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6253 .platform_name = "msm-pcm-routing",
6254 .codec_name = "msm-stub-codec.1",
6255 .codec_dai_name = "msm-stub-rx",
6256 .no_pcm = 1,
6257 .dpcm_playback = 1,
6258 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6259 .be_hw_params_fixup = msm_be_hw_params_fixup,
6260 .ops = &kona_tdm_be_ops,
6261 .ignore_suspend = 1,
6262 .ignore_pmdown_time = 1,
6263 },
6264 {
6265 .name = LPASS_BE_SEC_TDM_TX_0,
6266 .stream_name = "Secondary TDM0 Capture",
6267 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6268 .platform_name = "msm-pcm-routing",
6269 .codec_name = "msm-stub-codec.1",
6270 .codec_dai_name = "msm-stub-tx",
6271 .no_pcm = 1,
6272 .dpcm_capture = 1,
6273 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6274 .be_hw_params_fixup = msm_be_hw_params_fixup,
6275 .ops = &kona_tdm_be_ops,
6276 .ignore_suspend = 1,
6277 },
6278 {
6279 .name = LPASS_BE_TERT_TDM_RX_0,
6280 .stream_name = "Tertiary TDM0 Playback",
6281 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6282 .platform_name = "msm-pcm-routing",
6283 .codec_name = "msm-stub-codec.1",
6284 .codec_dai_name = "msm-stub-rx",
6285 .no_pcm = 1,
6286 .dpcm_playback = 1,
6287 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6288 .be_hw_params_fixup = msm_be_hw_params_fixup,
6289 .ops = &kona_tdm_be_ops,
6290 .ignore_suspend = 1,
6291 .ignore_pmdown_time = 1,
6292 },
6293 {
6294 .name = LPASS_BE_TERT_TDM_TX_0,
6295 .stream_name = "Tertiary TDM0 Capture",
6296 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6297 .platform_name = "msm-pcm-routing",
6298 .codec_name = "msm-stub-codec.1",
6299 .codec_dai_name = "msm-stub-tx",
6300 .no_pcm = 1,
6301 .dpcm_capture = 1,
6302 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6303 .be_hw_params_fixup = msm_be_hw_params_fixup,
6304 .ops = &kona_tdm_be_ops,
6305 .ignore_suspend = 1,
6306 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6307 {
6308 .name = LPASS_BE_QUAT_TDM_RX_0,
6309 .stream_name = "Quaternary TDM0 Playback",
6310 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6311 .platform_name = "msm-pcm-routing",
6312 .codec_name = "msm-stub-codec.1",
6313 .codec_dai_name = "msm-stub-rx",
6314 .no_pcm = 1,
6315 .dpcm_playback = 1,
6316 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6317 .be_hw_params_fixup = msm_be_hw_params_fixup,
6318 .ops = &kona_tdm_be_ops,
6319 .ignore_suspend = 1,
6320 .ignore_pmdown_time = 1,
6321 },
6322 {
6323 .name = LPASS_BE_QUAT_TDM_TX_0,
6324 .stream_name = "Quaternary TDM0 Capture",
6325 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6326 .platform_name = "msm-pcm-routing",
6327 .codec_name = "msm-stub-codec.1",
6328 .codec_dai_name = "msm-stub-tx",
6329 .no_pcm = 1,
6330 .dpcm_capture = 1,
6331 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6332 .be_hw_params_fixup = msm_be_hw_params_fixup,
6333 .ops = &kona_tdm_be_ops,
6334 .ignore_suspend = 1,
6335 },
6336 {
6337 .name = LPASS_BE_QUIN_TDM_RX_0,
6338 .stream_name = "Quinary TDM0 Playback",
6339 .cpu_dai_name = "msm-dai-q6-tdm.36928",
6340 .platform_name = "msm-pcm-routing",
6341 .codec_name = "msm-stub-codec.1",
6342 .codec_dai_name = "msm-stub-rx",
6343 .no_pcm = 1,
6344 .dpcm_playback = 1,
6345 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
6346 .be_hw_params_fixup = msm_be_hw_params_fixup,
6347 .ops = &kona_tdm_be_ops,
6348 .ignore_suspend = 1,
6349 .ignore_pmdown_time = 1,
6350 },
6351 {
6352 .name = LPASS_BE_QUIN_TDM_TX_0,
6353 .stream_name = "Quinary TDM0 Capture",
6354 .cpu_dai_name = "msm-dai-q6-tdm.36929",
6355 .platform_name = "msm-pcm-routing",
6356 .codec_name = "msm-stub-codec.1",
6357 .codec_dai_name = "msm-stub-tx",
6358 .no_pcm = 1,
6359 .dpcm_capture = 1,
6360 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
6361 .be_hw_params_fixup = msm_be_hw_params_fixup,
6362 .ops = &kona_tdm_be_ops,
6363 .ignore_suspend = 1,
6364 },
6365 {
6366 .name = LPASS_BE_SEN_TDM_RX_0,
6367 .stream_name = "Senary TDM0 Playback",
6368 .cpu_dai_name = "msm-dai-q6-tdm.36944",
6369 .platform_name = "msm-pcm-routing",
6370 .codec_name = "msm-stub-codec.1",
6371 .codec_dai_name = "msm-stub-rx",
6372 .no_pcm = 1,
6373 .dpcm_playback = 1,
6374 .id = MSM_BACKEND_DAI_SEN_TDM_RX_0,
6375 .be_hw_params_fixup = msm_be_hw_params_fixup,
6376 .ops = &kona_tdm_be_ops,
6377 .ignore_suspend = 1,
6378 .ignore_pmdown_time = 1,
6379 },
6380 {
6381 .name = LPASS_BE_SEN_TDM_TX_0,
6382 .stream_name = "Senary TDM0 Capture",
6383 .cpu_dai_name = "msm-dai-q6-tdm.36945",
6384 .platform_name = "msm-pcm-routing",
6385 .codec_name = "msm-stub-codec.1",
6386 .codec_dai_name = "msm-stub-tx",
6387 .no_pcm = 1,
6388 .dpcm_capture = 1,
6389 .id = MSM_BACKEND_DAI_SEN_TDM_TX_0,
6390 .be_hw_params_fixup = msm_be_hw_params_fixup,
6391 .ops = &kona_tdm_be_ops,
6392 .ignore_suspend = 1,
6393 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6394};
6395
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6396static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6397 {
6398 .name = LPASS_BE_SLIMBUS_7_RX,
6399 .stream_name = "Slimbus7 Playback",
6400 .cpu_dai_name = "msm-dai-q6-dev.16398",
6401 .platform_name = "msm-pcm-routing",
6402 .codec_name = "btfmslim_slave",
6403 /* BT codec driver determines capabilities based on
6404 * dai name, bt codecdai name should always contains
6405 * supported usecase information
6406 */
6407 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6408 .no_pcm = 1,
6409 .dpcm_playback = 1,
6410 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6411 .be_hw_params_fixup = msm_be_hw_params_fixup,
6412 .init = &msm_wcn_init,
6413 .ops = &msm_wcn_ops,
6414 /* dai link has playback support */
6415 .ignore_pmdown_time = 1,
6416 .ignore_suspend = 1,
6417 },
6418 {
6419 .name = LPASS_BE_SLIMBUS_7_TX,
6420 .stream_name = "Slimbus7 Capture",
6421 .cpu_dai_name = "msm-dai-q6-dev.16399",
6422 .platform_name = "msm-pcm-routing",
6423 .codec_name = "btfmslim_slave",
6424 .codec_dai_name = "btfm_bt_sco_slim_tx",
6425 .no_pcm = 1,
6426 .dpcm_capture = 1,
6427 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6428 .be_hw_params_fixup = msm_be_hw_params_fixup,
6429 .ops = &msm_wcn_ops,
6430 .ignore_suspend = 1,
6431 },
6432};
6433
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6434static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
6435 {
6436 .name = LPASS_BE_SLIMBUS_7_RX,
6437 .stream_name = "Slimbus7 Playback",
6438 .cpu_dai_name = "msm-dai-q6-dev.16398",
6439 .platform_name = "msm-pcm-routing",
6440 .codec_name = "btfmslim_slave",
6441 /* BT codec driver determines capabilities based on
6442 * dai name, bt codecdai name should always contains
6443 * supported usecase information
6444 */
6445 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6446 .no_pcm = 1,
6447 .dpcm_playback = 1,
6448 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6449 .be_hw_params_fixup = msm_be_hw_params_fixup,
6450 .init = &msm_wcn_init_lito,
6451 .ops = &msm_wcn_ops_lito,
6452 /* dai link has playback support */
6453 .ignore_pmdown_time = 1,
6454 .ignore_suspend = 1,
6455 },
6456 {
6457 .name = LPASS_BE_SLIMBUS_7_TX,
6458 .stream_name = "Slimbus7 Capture",
6459 .cpu_dai_name = "msm-dai-q6-dev.16399",
6460 .platform_name = "msm-pcm-routing",
6461 .codec_name = "btfmslim_slave",
6462 .codec_dai_name = "btfm_bt_sco_slim_tx",
6463 .no_pcm = 1,
6464 .dpcm_capture = 1,
6465 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6466 .be_hw_params_fixup = msm_be_hw_params_fixup,
6467 .ops = &msm_wcn_ops_lito,
6468 .ignore_suspend = 1,
6469 },
6470 {
6471 .name = LPASS_BE_SLIMBUS_8_TX,
6472 .stream_name = "Slimbus8 Capture",
6473 .cpu_dai_name = "msm-dai-q6-dev.16401",
6474 .platform_name = "msm-pcm-routing",
6475 .codec_name = "btfmslim_slave",
6476 .codec_dai_name = "btfm_fm_slim_tx",
6477 .no_pcm = 1,
6478 .dpcm_capture = 1,
6479 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6480 .be_hw_params_fixup = msm_be_hw_params_fixup,
6481 .ops = &msm_wcn_ops_lito,
6482 .ignore_suspend = 1,
6483 },
6484};
6485
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6486static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6487 /* DISP PORT BACK END DAI Link */
6488 {
6489 .name = LPASS_BE_DISPLAY_PORT,
6490 .stream_name = "Display Port Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]6491 .cpu_dai_name = "msm-dai-q6-dp.0",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6492 .platform_name = "msm-pcm-routing",
6493 .codec_name = "msm-ext-disp-audio-codec-rx",
6494 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6495 .no_pcm = 1,
6496 .dpcm_playback = 1,
6497 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6498 .be_hw_params_fixup = msm_be_hw_params_fixup,
6499 .ignore_pmdown_time = 1,
6500 .ignore_suspend = 1,
6501 },
6502 /* DISP PORT 1 BACK END DAI Link */
6503 {
6504 .name = LPASS_BE_DISPLAY_PORT1,
6505 .stream_name = "Display Port1 Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]6506 .cpu_dai_name = "msm-dai-q6-dp.1",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6507 .platform_name = "msm-pcm-routing",
6508 .codec_name = "msm-ext-disp-audio-codec-rx",
6509 .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
6510 .no_pcm = 1,
6511 .dpcm_playback = 1,
6512 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
6513 .be_hw_params_fixup = msm_be_hw_params_fixup,
6514 .ignore_pmdown_time = 1,
6515 .ignore_suspend = 1,
6516 },
6517};
6518
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6519static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6520 {
6521 .name = LPASS_BE_PRI_MI2S_RX,
6522 .stream_name = "Primary MI2S Playback",
6523 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6524 .platform_name = "msm-pcm-routing",
6525 .codec_name = "msm-stub-codec.1",
6526 .codec_dai_name = "msm-stub-rx",
6527 .no_pcm = 1,
6528 .dpcm_playback = 1,
6529 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
6530 .be_hw_params_fixup = msm_be_hw_params_fixup,
6531 .ops = &msm_mi2s_be_ops,
6532 .ignore_suspend = 1,
6533 .ignore_pmdown_time = 1,
6534 },
6535 {
6536 .name = LPASS_BE_PRI_MI2S_TX,
6537 .stream_name = "Primary MI2S Capture",
6538 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6539 .platform_name = "msm-pcm-routing",
6540 .codec_name = "msm-stub-codec.1",
6541 .codec_dai_name = "msm-stub-tx",
6542 .no_pcm = 1,
6543 .dpcm_capture = 1,
6544 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
6545 .be_hw_params_fixup = msm_be_hw_params_fixup,
6546 .ops = &msm_mi2s_be_ops,
6547 .ignore_suspend = 1,
6548 },
6549 {
6550 .name = LPASS_BE_SEC_MI2S_RX,
6551 .stream_name = "Secondary MI2S Playback",
6552 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6553 .platform_name = "msm-pcm-routing",
6554 .codec_name = "msm-stub-codec.1",
6555 .codec_dai_name = "msm-stub-rx",
6556 .no_pcm = 1,
6557 .dpcm_playback = 1,
6558 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
6559 .be_hw_params_fixup = msm_be_hw_params_fixup,
6560 .ops = &msm_mi2s_be_ops,
6561 .ignore_suspend = 1,
6562 .ignore_pmdown_time = 1,
6563 },
6564 {
6565 .name = LPASS_BE_SEC_MI2S_TX,
6566 .stream_name = "Secondary MI2S Capture",
6567 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6568 .platform_name = "msm-pcm-routing",
6569 .codec_name = "msm-stub-codec.1",
6570 .codec_dai_name = "msm-stub-tx",
6571 .no_pcm = 1,
6572 .dpcm_capture = 1,
6573 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
6574 .be_hw_params_fixup = msm_be_hw_params_fixup,
6575 .ops = &msm_mi2s_be_ops,
6576 .ignore_suspend = 1,
6577 },
6578 {
6579 .name = LPASS_BE_TERT_MI2S_RX,
6580 .stream_name = "Tertiary MI2S Playback",
6581 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6582 .platform_name = "msm-pcm-routing",
6583 .codec_name = "msm-stub-codec.1",
6584 .codec_dai_name = "msm-stub-rx",
6585 .no_pcm = 1,
6586 .dpcm_playback = 1,
6587 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
6588 .be_hw_params_fixup = msm_be_hw_params_fixup,
6589 .ops = &msm_mi2s_be_ops,
6590 .ignore_suspend = 1,
6591 .ignore_pmdown_time = 1,
6592 },
6593 {
6594 .name = LPASS_BE_TERT_MI2S_TX,
6595 .stream_name = "Tertiary MI2S Capture",
6596 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6597 .platform_name = "msm-pcm-routing",
6598 .codec_name = "msm-stub-codec.1",
6599 .codec_dai_name = "msm-stub-tx",
6600 .no_pcm = 1,
6601 .dpcm_capture = 1,
6602 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
6603 .be_hw_params_fixup = msm_be_hw_params_fixup,
6604 .ops = &msm_mi2s_be_ops,
6605 .ignore_suspend = 1,
6606 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6607 {
6608 .name = LPASS_BE_QUAT_MI2S_RX,
6609 .stream_name = "Quaternary MI2S Playback",
6610 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6611 .platform_name = "msm-pcm-routing",
6612 .codec_name = "msm-stub-codec.1",
6613 .codec_dai_name = "msm-stub-rx",
6614 .no_pcm = 1,
6615 .dpcm_playback = 1,
6616 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
6617 .be_hw_params_fixup = msm_be_hw_params_fixup,
6618 .ops = &msm_mi2s_be_ops,
6619 .ignore_suspend = 1,
6620 .ignore_pmdown_time = 1,
6621 },
6622 {
6623 .name = LPASS_BE_QUAT_MI2S_TX,
6624 .stream_name = "Quaternary MI2S Capture",
6625 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6626 .platform_name = "msm-pcm-routing",
6627 .codec_name = "msm-stub-codec.1",
6628 .codec_dai_name = "msm-stub-tx",
6629 .no_pcm = 1,
6630 .dpcm_capture = 1,
6631 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
6632 .be_hw_params_fixup = msm_be_hw_params_fixup,
6633 .ops = &msm_mi2s_be_ops,
6634 .ignore_suspend = 1,
6635 },
6636 {
6637 .name = LPASS_BE_QUIN_MI2S_RX,
6638 .stream_name = "Quinary MI2S Playback",
6639 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6640 .platform_name = "msm-pcm-routing",
6641 .codec_name = "msm-stub-codec.1",
6642 .codec_dai_name = "msm-stub-rx",
6643 .no_pcm = 1,
6644 .dpcm_playback = 1,
6645 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
6646 .be_hw_params_fixup = msm_be_hw_params_fixup,
6647 .ops = &msm_mi2s_be_ops,
6648 .ignore_suspend = 1,
6649 .ignore_pmdown_time = 1,
6650 },
6651 {
6652 .name = LPASS_BE_QUIN_MI2S_TX,
6653 .stream_name = "Quinary MI2S Capture",
6654 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6655 .platform_name = "msm-pcm-routing",
6656 .codec_name = "msm-stub-codec.1",
6657 .codec_dai_name = "msm-stub-tx",
6658 .no_pcm = 1,
6659 .dpcm_capture = 1,
6660 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
6661 .be_hw_params_fixup = msm_be_hw_params_fixup,
6662 .ops = &msm_mi2s_be_ops,
6663 .ignore_suspend = 1,
6664 },
6665 {
6666 .name = LPASS_BE_SENARY_MI2S_RX,
6667 .stream_name = "Senary MI2S Playback",
6668 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6669 .platform_name = "msm-pcm-routing",
6670 .codec_name = "msm-stub-codec.1",
6671 .codec_dai_name = "msm-stub-rx",
6672 .no_pcm = 1,
6673 .dpcm_playback = 1,
6674 .id = MSM_BACKEND_DAI_SENARY_MI2S_RX,
6675 .be_hw_params_fixup = msm_be_hw_params_fixup,
6676 .ops = &msm_mi2s_be_ops,
6677 .ignore_suspend = 1,
6678 .ignore_pmdown_time = 1,
6679 },
6680 {
6681 .name = LPASS_BE_SENARY_MI2S_TX,
6682 .stream_name = "Senary MI2S Capture",
6683 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6684 .platform_name = "msm-pcm-routing",
6685 .codec_name = "msm-stub-codec.1",
6686 .codec_dai_name = "msm-stub-tx",
6687 .no_pcm = 1,
6688 .dpcm_capture = 1,
6689 .id = MSM_BACKEND_DAI_SENARY_MI2S_TX,
6690 .be_hw_params_fixup = msm_be_hw_params_fixup,
6691 .ops = &msm_mi2s_be_ops,
6692 .ignore_suspend = 1,
6693 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6694};
6695
6696static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
6697 /* Primary AUX PCM Backend DAI Links */
6698 {
6699 .name = LPASS_BE_AUXPCM_RX,
6700 .stream_name = "AUX PCM Playback",
6701 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6702 .platform_name = "msm-pcm-routing",
6703 .codec_name = "msm-stub-codec.1",
6704 .codec_dai_name = "msm-stub-rx",
6705 .no_pcm = 1,
6706 .dpcm_playback = 1,
6707 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6708 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6709 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6710 .ignore_pmdown_time = 1,
6711 .ignore_suspend = 1,
6712 },
6713 {
6714 .name = LPASS_BE_AUXPCM_TX,
6715 .stream_name = "AUX PCM Capture",
6716 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6717 .platform_name = "msm-pcm-routing",
6718 .codec_name = "msm-stub-codec.1",
6719 .codec_dai_name = "msm-stub-tx",
6720 .no_pcm = 1,
6721 .dpcm_capture = 1,
6722 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6723 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6724 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6725 .ignore_suspend = 1,
6726 },
6727 /* Secondary AUX PCM Backend DAI Links */
6728 {
6729 .name = LPASS_BE_SEC_AUXPCM_RX,
6730 .stream_name = "Sec AUX PCM Playback",
6731 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6732 .platform_name = "msm-pcm-routing",
6733 .codec_name = "msm-stub-codec.1",
6734 .codec_dai_name = "msm-stub-rx",
6735 .no_pcm = 1,
6736 .dpcm_playback = 1,
6737 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
6738 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6739 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6740 .ignore_pmdown_time = 1,
6741 .ignore_suspend = 1,
6742 },
6743 {
6744 .name = LPASS_BE_SEC_AUXPCM_TX,
6745 .stream_name = "Sec AUX PCM Capture",
6746 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6747 .platform_name = "msm-pcm-routing",
6748 .codec_name = "msm-stub-codec.1",
6749 .codec_dai_name = "msm-stub-tx",
6750 .no_pcm = 1,
6751 .dpcm_capture = 1,
6752 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
6753 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6754 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6755 .ignore_suspend = 1,
6756 },
6757 /* Tertiary AUX PCM Backend DAI Links */
6758 {
6759 .name = LPASS_BE_TERT_AUXPCM_RX,
6760 .stream_name = "Tert AUX PCM Playback",
6761 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6762 .platform_name = "msm-pcm-routing",
6763 .codec_name = "msm-stub-codec.1",
6764 .codec_dai_name = "msm-stub-rx",
6765 .no_pcm = 1,
6766 .dpcm_playback = 1,
6767 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
6768 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6769 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6770 .ignore_suspend = 1,
6771 },
6772 {
6773 .name = LPASS_BE_TERT_AUXPCM_TX,
6774 .stream_name = "Tert AUX PCM Capture",
6775 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6776 .platform_name = "msm-pcm-routing",
6777 .codec_name = "msm-stub-codec.1",
6778 .codec_dai_name = "msm-stub-tx",
6779 .no_pcm = 1,
6780 .dpcm_capture = 1,
6781 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
6782 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6783 .ops = &kona_aux_be_ops,
6784 .ignore_suspend = 1,
6785 },
6786 /* Quaternary AUX PCM Backend DAI Links */
6787 {
6788 .name = LPASS_BE_QUAT_AUXPCM_RX,
6789 .stream_name = "Quat AUX PCM Playback",
6790 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6791 .platform_name = "msm-pcm-routing",
6792 .codec_name = "msm-stub-codec.1",
6793 .codec_dai_name = "msm-stub-rx",
6794 .no_pcm = 1,
6795 .dpcm_playback = 1,
6796 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
6797 .be_hw_params_fixup = msm_be_hw_params_fixup,
6798 .ops = &kona_aux_be_ops,
6799 .ignore_suspend = 1,
6800 },
6801 {
6802 .name = LPASS_BE_QUAT_AUXPCM_TX,
6803 .stream_name = "Quat AUX PCM Capture",
6804 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6805 .platform_name = "msm-pcm-routing",
6806 .codec_name = "msm-stub-codec.1",
6807 .codec_dai_name = "msm-stub-tx",
6808 .no_pcm = 1,
6809 .dpcm_capture = 1,
6810 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
6811 .be_hw_params_fixup = msm_be_hw_params_fixup,
6812 .ops = &kona_aux_be_ops,
6813 .ignore_suspend = 1,
6814 },
6815 /* Quinary AUX PCM Backend DAI Links */
6816 {
6817 .name = LPASS_BE_QUIN_AUXPCM_RX,
6818 .stream_name = "Quin AUX PCM Playback",
6819 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6820 .platform_name = "msm-pcm-routing",
6821 .codec_name = "msm-stub-codec.1",
6822 .codec_dai_name = "msm-stub-rx",
6823 .no_pcm = 1,
6824 .dpcm_playback = 1,
6825 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
6826 .be_hw_params_fixup = msm_be_hw_params_fixup,
6827 .ops = &kona_aux_be_ops,
6828 .ignore_suspend = 1,
6829 },
6830 {
6831 .name = LPASS_BE_QUIN_AUXPCM_TX,
6832 .stream_name = "Quin AUX PCM Capture",
6833 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6834 .platform_name = "msm-pcm-routing",
6835 .codec_name = "msm-stub-codec.1",
6836 .codec_dai_name = "msm-stub-tx",
6837 .no_pcm = 1,
6838 .dpcm_capture = 1,
6839 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
6840 .be_hw_params_fixup = msm_be_hw_params_fixup,
6841 .ops = &kona_aux_be_ops,
6842 .ignore_suspend = 1,
6843 },
6844 /* Senary AUX PCM Backend DAI Links */
6845 {
6846 .name = LPASS_BE_SEN_AUXPCM_RX,
6847 .stream_name = "Sen AUX PCM Playback",
6848 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6849 .platform_name = "msm-pcm-routing",
6850 .codec_name = "msm-stub-codec.1",
6851 .codec_dai_name = "msm-stub-rx",
6852 .no_pcm = 1,
6853 .dpcm_playback = 1,
6854 .id = MSM_BACKEND_DAI_SEN_AUXPCM_RX,
6855 .be_hw_params_fixup = msm_be_hw_params_fixup,
6856 .ops = &kona_aux_be_ops,
6857 .ignore_suspend = 1,
6858 },
6859 {
6860 .name = LPASS_BE_SEN_AUXPCM_TX,
6861 .stream_name = "Sen AUX PCM Capture",
6862 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6863 .platform_name = "msm-pcm-routing",
6864 .codec_name = "msm-stub-codec.1",
6865 .codec_dai_name = "msm-stub-tx",
6866 .no_pcm = 1,
6867 .dpcm_capture = 1,
6868 .id = MSM_BACKEND_DAI_SEN_AUXPCM_TX,
6869 .be_hw_params_fixup = msm_be_hw_params_fixup,
6870 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6871 .ignore_suspend = 1,
6872 },
6873};
6874
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6875static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
6876 /* WSA CDC DMA Backend DAI Links */
6877 {
6878 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
6879 .stream_name = "WSA CDC DMA0 Playback",
6880 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
6881 .platform_name = "msm-pcm-routing",
6882 .codec_name = "bolero_codec",
6883 .codec_dai_name = "wsa_macro_rx1",
6884 .no_pcm = 1,
6885 .dpcm_playback = 1,
6886 .init = &msm_int_audrx_init,
6887 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
6888 .be_hw_params_fixup = msm_be_hw_params_fixup,
6889 .ignore_pmdown_time = 1,
6890 .ignore_suspend = 1,
6891 .ops = &msm_cdc_dma_be_ops,
6892 },
6893 {
6894 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
6895 .stream_name = "WSA CDC DMA1 Playback",
6896 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
6897 .platform_name = "msm-pcm-routing",
6898 .codec_name = "bolero_codec",
6899 .codec_dai_name = "wsa_macro_rx_mix",
6900 .no_pcm = 1,
6901 .dpcm_playback = 1,
6902 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
6903 .be_hw_params_fixup = msm_be_hw_params_fixup,
6904 .ignore_pmdown_time = 1,
6905 .ignore_suspend = 1,
6906 .ops = &msm_cdc_dma_be_ops,
6907 },
6908 {
6909 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
6910 .stream_name = "WSA CDC DMA1 Capture",
6911 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
6912 .platform_name = "msm-pcm-routing",
6913 .codec_name = "bolero_codec",
6914 .codec_dai_name = "wsa_macro_echo",
6915 .no_pcm = 1,
6916 .dpcm_capture = 1,
6917 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
6918 .be_hw_params_fixup = msm_be_hw_params_fixup,
6919 .ignore_suspend = 1,
6920 .ops = &msm_cdc_dma_be_ops,
6921 },
6922};
6923
6924static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
6925 /* RX CDC DMA Backend DAI Links */
6926 {
6927 .name = LPASS_BE_RX_CDC_DMA_RX_0,
6928 .stream_name = "RX CDC DMA0 Playback",
6929 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
6930 .platform_name = "msm-pcm-routing",
6931 .codec_name = "bolero_codec",
6932 .codec_dai_name = "rx_macro_rx1",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6933 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6934 .no_pcm = 1,
6935 .dpcm_playback = 1,
6936 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
6937 .be_hw_params_fixup = msm_be_hw_params_fixup,
6938 .ignore_pmdown_time = 1,
6939 .ignore_suspend = 1,
6940 .ops = &msm_cdc_dma_be_ops,
6941 },
6942 {
6943 .name = LPASS_BE_RX_CDC_DMA_RX_1,
6944 .stream_name = "RX CDC DMA1 Playback",
6945 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
6946 .platform_name = "msm-pcm-routing",
6947 .codec_name = "bolero_codec",
6948 .codec_dai_name = "rx_macro_rx2",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6949 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6950 .no_pcm = 1,
6951 .dpcm_playback = 1,
6952 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
6953 .be_hw_params_fixup = msm_be_hw_params_fixup,
6954 .ignore_pmdown_time = 1,
6955 .ignore_suspend = 1,
6956 .ops = &msm_cdc_dma_be_ops,
6957 },
6958 {
6959 .name = LPASS_BE_RX_CDC_DMA_RX_2,
6960 .stream_name = "RX CDC DMA2 Playback",
6961 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
6962 .platform_name = "msm-pcm-routing",
6963 .codec_name = "bolero_codec",
6964 .codec_dai_name = "rx_macro_rx3",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6965 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6966 .no_pcm = 1,
6967 .dpcm_playback = 1,
6968 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
6969 .be_hw_params_fixup = msm_be_hw_params_fixup,
6970 .ignore_pmdown_time = 1,
6971 .ignore_suspend = 1,
6972 .ops = &msm_cdc_dma_be_ops,
6973 },
6974 {
6975 .name = LPASS_BE_RX_CDC_DMA_RX_3,
6976 .stream_name = "RX CDC DMA3 Playback",
6977 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
6978 .platform_name = "msm-pcm-routing",
6979 .codec_name = "bolero_codec",
6980 .codec_dai_name = "rx_macro_rx4",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6981 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6982 .no_pcm = 1,
6983 .dpcm_playback = 1,
6984 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
6985 .be_hw_params_fixup = msm_be_hw_params_fixup,
6986 .ignore_pmdown_time = 1,
6987 .ignore_suspend = 1,
6988 .ops = &msm_cdc_dma_be_ops,
6989 },
6990 /* TX CDC DMA Backend DAI Links */
6991 {
6992 .name = LPASS_BE_TX_CDC_DMA_TX_3,
6993 .stream_name = "TX CDC DMA3 Capture",
6994 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
6995 .platform_name = "msm-pcm-routing",
6996 .codec_name = "bolero_codec",
6997 .codec_dai_name = "tx_macro_tx1",
6998 .no_pcm = 1,
6999 .dpcm_capture = 1,
7000 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7001 .be_hw_params_fixup = msm_be_hw_params_fixup,
7002 .ignore_suspend = 1,
7003 .ops = &msm_cdc_dma_be_ops,
7004 },
7005 {
7006 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7007 .stream_name = "TX CDC DMA4 Capture",
7008 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
7009 .platform_name = "msm-pcm-routing",
7010 .codec_name = "bolero_codec",
7011 .codec_dai_name = "tx_macro_tx2",
7012 .no_pcm = 1,
7013 .dpcm_capture = 1,
7014 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7015 .be_hw_params_fixup = msm_be_hw_params_fixup,
7016 .ignore_suspend = 1,
7017 .ops = &msm_cdc_dma_be_ops,
7018 },
7019};
7020
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]7021static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
7022 {
7023 .name = LPASS_BE_VA_CDC_DMA_TX_0,
7024 .stream_name = "VA CDC DMA0 Capture",
7025 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
7026 .platform_name = "msm-pcm-routing",
7027 .codec_name = "bolero_codec",
7028 .codec_dai_name = "va_macro_tx1",
7029 .no_pcm = 1,
7030 .dpcm_capture = 1,
7031 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
7032 .be_hw_params_fixup = msm_be_hw_params_fixup,
7033 .ignore_suspend = 1,
7034 .ops = &msm_cdc_dma_be_ops,
7035 },
7036 {
7037 .name = LPASS_BE_VA_CDC_DMA_TX_1,
7038 .stream_name = "VA CDC DMA1 Capture",
7039 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
7040 .platform_name = "msm-pcm-routing",
7041 .codec_name = "bolero_codec",
7042 .codec_dai_name = "va_macro_tx2",
7043 .no_pcm = 1,
7044 .dpcm_capture = 1,
7045 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
7046 .be_hw_params_fixup = msm_be_hw_params_fixup,
7047 .ignore_suspend = 1,
7048 .ops = &msm_cdc_dma_be_ops,
7049 },
7050 {
7051 .name = LPASS_BE_VA_CDC_DMA_TX_2,
7052 .stream_name = "VA CDC DMA2 Capture",
7053 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
7054 .platform_name = "msm-pcm-routing",
7055 .codec_name = "bolero_codec",
7056 .codec_dai_name = "va_macro_tx3",
7057 .no_pcm = 1,
7058 .dpcm_capture = 1,
7059 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
7060 .be_hw_params_fixup = msm_be_hw_params_fixup,
7061 .ignore_suspend = 1,
7062 .ops = &msm_cdc_dma_be_ops,
7063 },
7064};
7065
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7066static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
7067 {
7068 .name = LPASS_BE_AFE_LOOPBACK_TX,
7069 .stream_name = "AFE Loopback Capture",
7070 .cpu_dai_name = "msm-dai-q6-dev.24577",
7071 .platform_name = "msm-pcm-routing",
7072 .codec_name = "msm-stub-codec.1",
7073 .codec_dai_name = "msm-stub-tx",
7074 .no_pcm = 1,
7075 .dpcm_capture = 1,
7076 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
7077 .be_hw_params_fixup = msm_be_hw_params_fixup,
7078 .ignore_pmdown_time = 1,
7079 .ignore_suspend = 1,
7080 },
7081};
7082
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7083static struct snd_soc_dai_link msm_kona_dai_links[
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7084 ARRAY_SIZE(msm_common_dai_links) +
7085 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7086 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7087 ARRAY_SIZE(msm_common_be_dai_links) +
7088 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7089 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7090 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]7091 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7092 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
7093 ARRAY_SIZE(ext_disp_be_dai_link) +
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7094 ARRAY_SIZE(msm_wcn_be_dai_links) +
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7095 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
7096 ARRAY_SIZE(msm_wcn_btfm_be_dai_links)];
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7097
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7098static int msm_populate_dai_link_component_of_node(
7099 struct snd_soc_card *card)
7100{
7101 int i, index, ret = 0;
7102 struct device *cdev = card->dev;
7103 struct snd_soc_dai_link *dai_link = card->dai_link;
7104 struct device_node *np;
7105
7106 if (!cdev) {
7107 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
7108 return -ENODEV;
7109 }
7110
7111 for (i = 0; i < card->num_links; i++) {
7112 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7113 continue;
7114
7115 /* populate platform_of_node for snd card dai links */
7116 if (dai_link[i].platform_name &&
7117 !dai_link[i].platform_of_node) {
7118 index = of_property_match_string(cdev->of_node,
7119 "asoc-platform-names",
7120 dai_link[i].platform_name);
7121 if (index < 0) {
7122 dev_err(cdev, "%s: No match found for platform name: %s\n",
7123 __func__, dai_link[i].platform_name);
7124 ret = index;
7125 goto err;
7126 }
7127 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7128 index);
7129 if (!np) {
7130 dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
7131 __func__, dai_link[i].platform_name,
7132 index);
7133 ret = -ENODEV;
7134 goto err;
7135 }
7136 dai_link[i].platform_of_node = np;
7137 dai_link[i].platform_name = NULL;
7138 }
7139
7140 /* populate cpu_of_node for snd card dai links */
7141 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7142 index = of_property_match_string(cdev->of_node,
7143 "asoc-cpu-names",
7144 dai_link[i].cpu_dai_name);
7145 if (index >= 0) {
7146 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7147 index);
7148 if (!np) {
7149 dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
7150 __func__,
7151 dai_link[i].cpu_dai_name);
7152 ret = -ENODEV;
7153 goto err;
7154 }
7155 dai_link[i].cpu_of_node = np;
7156 dai_link[i].cpu_dai_name = NULL;
7157 }
7158 }
7159
7160 /* populate codec_of_node for snd card dai links */
7161 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7162 index = of_property_match_string(cdev->of_node,
7163 "asoc-codec-names",
7164 dai_link[i].codec_name);
7165 if (index < 0)
7166 continue;
7167 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7168 index);
7169 if (!np) {
7170 dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
7171 __func__, dai_link[i].codec_name);
7172 ret = -ENODEV;
7173 goto err;
7174 }
7175 dai_link[i].codec_of_node = np;
7176 dai_link[i].codec_name = NULL;
7177 }
7178 }
7179
7180err:
7181 return ret;
7182}
7183
7184static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7185{
7186 int ret = -EINVAL;
7187 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
7188
7189 if (!component) {
7190 pr_err("* %s: No match for msm-stub-codec component\n", __func__);
7191 return ret;
7192 }
7193
7194 ret = snd_soc_add_component_controls(component, msm_snd_controls,
7195 ARRAY_SIZE(msm_snd_controls));
7196 if (ret < 0) {
7197 dev_err(component->dev,
7198 "%s: add_codec_controls failed, err = %d\n",
7199 __func__, ret);
7200 return ret;
7201 }
7202
7203 return ret;
7204}
7205
7206static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7207 struct snd_pcm_hw_params *params)
7208{
7209 return 0;
7210}
7211
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7212static struct snd_soc_ops msm_stub_be_ops = {
7213 .hw_params = msm_snd_stub_hw_params,
7214};
7215
7216struct snd_soc_card snd_soc_card_stub_msm = {
7217 .name = "kona-stub-snd-card",
7218};
7219
7220static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7221 /* FrontEnd DAI Links */
7222 {
7223 .name = "MSMSTUB Media1",
7224 .stream_name = "MultiMedia1",
7225 .cpu_dai_name = "MultiMedia1",
7226 .platform_name = "msm-pcm-dsp.0",
7227 .dynamic = 1,
7228 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7229 .dpcm_playback = 1,
7230 .dpcm_capture = 1,
7231 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7232 SND_SOC_DPCM_TRIGGER_POST},
7233 .codec_dai_name = "snd-soc-dummy-dai",
7234 .codec_name = "snd-soc-dummy",
7235 .ignore_suspend = 1,
7236 /* this dainlink has playback support */
7237 .ignore_pmdown_time = 1,
7238 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7239 },
7240};
7241
7242static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7243 /* Backend DAI Links */
7244 {
7245 .name = LPASS_BE_AUXPCM_RX,
7246 .stream_name = "AUX PCM Playback",
7247 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7248 .platform_name = "msm-pcm-routing",
7249 .codec_name = "msm-stub-codec.1",
7250 .codec_dai_name = "msm-stub-rx",
7251 .no_pcm = 1,
7252 .dpcm_playback = 1,
7253 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7254 .init = &msm_audrx_stub_init,
7255 .be_hw_params_fixup = msm_be_hw_params_fixup,
7256 .ignore_pmdown_time = 1,
7257 .ignore_suspend = 1,
7258 .ops = &msm_stub_be_ops,
7259 },
7260 {
7261 .name = LPASS_BE_AUXPCM_TX,
7262 .stream_name = "AUX PCM Capture",
7263 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7264 .platform_name = "msm-pcm-routing",
7265 .codec_name = "msm-stub-codec.1",
7266 .codec_dai_name = "msm-stub-tx",
7267 .no_pcm = 1,
7268 .dpcm_capture = 1,
7269 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7270 .be_hw_params_fixup = msm_be_hw_params_fixup,
7271 .ignore_suspend = 1,
7272 .ops = &msm_stub_be_ops,
7273 },
7274};
7275
7276static struct snd_soc_dai_link msm_stub_dai_links[
7277 ARRAY_SIZE(msm_stub_fe_dai_links) +
7278 ARRAY_SIZE(msm_stub_be_dai_links)];
7279
7280static const struct of_device_id kona_asoc_machine_of_match[] = {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7281 { .compatible = "qcom,kona-asoc-snd",
7282 .data = "codec"},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7283 { .compatible = "qcom,kona-asoc-snd-stub",
7284 .data = "stub_codec"},
7285 {},
7286};
7287
7288static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7289{
7290 struct snd_soc_card *card = NULL;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7291 struct snd_soc_dai_link *dailink = NULL;
7292 int len_1 = 0;
7293 int len_2 = 0;
7294 int total_links = 0;
7295 int rc = 0;
7296 u32 mi2s_audio_intf = 0;
7297 u32 auxpcm_audio_intf = 0;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7298 u32 val = 0;
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7299 u32 wcn_btfm_intf = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7300 const struct of_device_id *match;
7301
7302 match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
7303 if (!match) {
7304 dev_err(dev, "%s: No DT match found for sound card\n",
7305 __func__);
7306 return NULL;
7307 }
7308
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7309 if (!strcmp(match->data, "codec")) {
7310 card = &snd_soc_card_kona_msm;
7311
7312 memcpy(msm_kona_dai_links + total_links,
7313 msm_common_dai_links,
7314 sizeof(msm_common_dai_links));
7315 total_links += ARRAY_SIZE(msm_common_dai_links);
7316
7317 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7318 msm_bolero_fe_dai_links,
7319 sizeof(msm_bolero_fe_dai_links));
7320 total_links +=
7321 ARRAY_SIZE(msm_bolero_fe_dai_links);
7322
7323 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7324 msm_common_misc_fe_dai_links,
7325 sizeof(msm_common_misc_fe_dai_links));
7326 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7327
7328 memcpy(msm_kona_dai_links + total_links,
7329 msm_common_be_dai_links,
7330 sizeof(msm_common_be_dai_links));
7331 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7332
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7333 memcpy(msm_kona_dai_links + total_links,
7334 msm_wsa_cdc_dma_be_dai_links,
7335 sizeof(msm_wsa_cdc_dma_be_dai_links));
7336 total_links +=
7337 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
7338
7339 memcpy(msm_kona_dai_links + total_links,
7340 msm_rx_tx_cdc_dma_be_dai_links,
7341 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7342 total_links +=
7343 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7344
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]7345 memcpy(msm_kona_dai_links + total_links,
7346 msm_va_cdc_dma_be_dai_links,
7347 sizeof(msm_va_cdc_dma_be_dai_links));
7348 total_links +=
7349 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
7350
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7351 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7352 &mi2s_audio_intf);
7353 if (rc) {
7354 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7355 __func__);
7356 } else {
7357 if (mi2s_audio_intf) {
7358 memcpy(msm_kona_dai_links + total_links,
7359 msm_mi2s_be_dai_links,
7360 sizeof(msm_mi2s_be_dai_links));
7361 total_links +=
7362 ARRAY_SIZE(msm_mi2s_be_dai_links);
7363 }
7364 }
7365
7366 rc = of_property_read_u32(dev->of_node,
7367 "qcom,auxpcm-audio-intf",
7368 &auxpcm_audio_intf);
7369 if (rc) {
7370 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7371 __func__);
7372 } else {
7373 if (auxpcm_audio_intf) {
7374 memcpy(msm_kona_dai_links + total_links,
7375 msm_auxpcm_be_dai_links,
7376 sizeof(msm_auxpcm_be_dai_links));
7377 total_links +=
7378 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7379 }
7380 }
7381
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7382 rc = of_property_read_u32(dev->of_node,
7383 "qcom,ext-disp-audio-rx", &val);
7384 if (!rc && val) {
7385 dev_dbg(dev, "%s(): ext disp audio support present\n",
7386 __func__);
7387 memcpy(msm_kona_dai_links + total_links,
7388 ext_disp_be_dai_link,
7389 sizeof(ext_disp_be_dai_link));
7390 total_links += ARRAY_SIZE(ext_disp_be_dai_link);
7391 }
7392
7393 rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
7394 if (!rc && val) {
7395 dev_dbg(dev, "%s(): WCN BT support present\n",
7396 __func__);
7397 memcpy(msm_kona_dai_links + total_links,
7398 msm_wcn_be_dai_links,
7399 sizeof(msm_wcn_be_dai_links));
7400 total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
7401 }
7402
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7403 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
7404 &val);
7405 if (!rc && val) {
7406 memcpy(msm_kona_dai_links + total_links,
7407 msm_afe_rxtx_lb_be_dai_link,
7408 sizeof(msm_afe_rxtx_lb_be_dai_link));
7409 total_links +=
7410 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
7411 }
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7412
7413 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7414 &wcn_btfm_intf);
7415 if (rc) {
7416 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7417 __func__);
7418 } else {
7419 if (wcn_btfm_intf) {
7420 memcpy(msm_kona_dai_links + total_links,
7421 msm_wcn_btfm_be_dai_links,
7422 sizeof(msm_wcn_btfm_be_dai_links));
7423 total_links +=
7424 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
7425 }
7426 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7427 dailink = msm_kona_dai_links;
7428 } else if(!strcmp(match->data, "stub_codec")) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7429 card = &snd_soc_card_stub_msm;
7430 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
7431 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
7432
7433 memcpy(msm_stub_dai_links,
7434 msm_stub_fe_dai_links,
7435 sizeof(msm_stub_fe_dai_links));
7436 memcpy(msm_stub_dai_links + len_1,
7437 msm_stub_be_dai_links,
7438 sizeof(msm_stub_be_dai_links));
7439
7440 dailink = msm_stub_dai_links;
7441 total_links = len_2;
7442 }
7443
7444 if (card) {
7445 card->dai_link = dailink;
7446 card->num_links = total_links;
7447 }
7448
7449 return card;
7450}
7451
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7452static int msm_wsa881x_init(struct snd_soc_component *component)
7453{
7454 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7455 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7456 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7457 SPKR_L_BOOST, SPKR_L_VI};
7458 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7459 SPKR_R_BOOST, SPKR_R_VI};
7460 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7461 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7462 struct msm_asoc_mach_data *pdata;
7463 struct snd_soc_dapm_context *dapm;
7464 struct snd_card *card;
7465 struct snd_info_entry *entry;
7466 int ret = 0;
7467
7468 if (!component) {
7469 pr_err("%s component is NULL\n", __func__);
7470 return -EINVAL;
7471 }
7472
7473 card = component->card->snd_card;
7474 dapm = snd_soc_component_get_dapm(component);
7475
7476 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7477 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
7478 __func__, component->name);
7479 wsa881x_set_channel_map(component, &spkleft_ports[0],
7480 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7481 &ch_rate[0], &spkleft_port_types[0]);
7482 if (dapm->component) {
7483 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7484 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7485 }
7486 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7487 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
7488 __func__, component->name);
7489 wsa881x_set_channel_map(component, &spkright_ports[0],
7490 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7491 &ch_rate[0], &spkright_port_types[0]);
7492 if (dapm->component) {
7493 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7494 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7495 }
7496 } else {
7497 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
7498 component->name);
7499 ret = -EINVAL;
7500 goto err;
7501 }
7502 pdata = snd_soc_card_get_drvdata(component->card);
7503 if (!pdata->codec_root) {
7504 entry = snd_info_create_subdir(card->module, "codecs",
7505 card->proc_root);
7506 if (!entry) {
7507 pr_err("%s: Cannot create codecs module entry\n",
7508 __func__);
7509 ret = 0;
7510 goto err;
7511 }
7512 pdata->codec_root = entry;
7513 }
7514 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7515 component);
7516err:
7517 return ret;
7518}
7519
7520static int msm_aux_codec_init(struct snd_soc_component *component)
7521{
7522 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
7523 int ret = 0;
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]7524 int codec_variant = -1;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7525 void *mbhc_calibration;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7526 struct snd_info_entry *entry;
7527 struct snd_card *card = component->card->snd_card;
7528 struct msm_asoc_mach_data *pdata;
7529
7530 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7531 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7532 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7533 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7534 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7535 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7536 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7537 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7538 snd_soc_dapm_sync(dapm);
7539
7540 pdata = snd_soc_card_get_drvdata(component->card);
7541 if (!pdata->codec_root) {
7542 entry = snd_info_create_subdir(card->module, "codecs",
7543 card->proc_root);
7544 if (!entry) {
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7545 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7546 __func__);
7547 ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7548 goto mbhc_cfg_cal;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7549 }
7550 pdata->codec_root = entry;
7551 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7552 wcd938x_info_create_codec_entry(pdata->codec_root, component);
7553
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]7554 codec_variant = wcd938x_get_codec_variant(component);
7555 dev_dbg(component->dev, "%s: variant %d\n", __func__, codec_variant);
7556 if (codec_variant == WCD9380)
7557 ret = snd_soc_add_component_controls(component,
7558 msm_int_wcd9380_snd_controls,
7559 ARRAY_SIZE(msm_int_wcd9380_snd_controls));
7560 else if (codec_variant == WCD9385)
7561 ret = snd_soc_add_component_controls(component,
7562 msm_int_wcd9385_snd_controls,
7563 ARRAY_SIZE(msm_int_wcd9385_snd_controls));
7564
7565 if (ret < 0) {
7566 dev_err(component->dev, "%s: add codec specific snd controls failed: %d\n",
7567 __func__, ret);
7568 return ret;
7569 }
7570
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7571mbhc_cfg_cal:
7572 mbhc_calibration = def_wcd_mbhc_cal();
7573 if (!mbhc_calibration)
7574 return -ENOMEM;
7575 wcd_mbhc_cfg.calibration = mbhc_calibration;
7576 ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
7577 if (ret) {
7578 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
7579 __func__, ret);
7580 goto err_hs_detect;
7581 }
7582 return 0;
7583
7584err_hs_detect:
7585 kfree(mbhc_calibration);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7586 return ret;
7587}
7588
7589static int msm_init_aux_dev(struct platform_device *pdev,
7590 struct snd_soc_card *card)
7591{
7592 struct device_node *wsa_of_node;
7593 struct device_node *aux_codec_of_node;
7594 u32 wsa_max_devs;
7595 u32 wsa_dev_cnt;
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7596 u32 codec_max_aux_devs = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7597 u32 codec_aux_dev_cnt = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7598 int i;
Xiao Lid8bb93c2020-01-07 12:59:05 +0800[diff] [blame^]7599 struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
7600 struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7601 const char *auxdev_name_prefix[1];
7602 char *dev_name_str = NULL;
7603 int found = 0;
7604 int codecs_found = 0;
7605 int ret = 0;
7606
7607 /* Get maximum WSA device count for this platform */
7608 ret = of_property_read_u32(pdev->dev.of_node,
7609 "qcom,wsa-max-devs", &wsa_max_devs);
7610 if (ret) {
7611 dev_info(&pdev->dev,
7612 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7613 __func__, pdev->dev.of_node->full_name, ret);
7614 wsa_max_devs = 0;
7615 goto codec_aux_dev;
7616 }
7617 if (wsa_max_devs == 0) {
7618 dev_warn(&pdev->dev,
7619 "%s: Max WSA devices is 0 for this target?\n",
7620 __func__);
7621 goto codec_aux_dev;
7622 }
7623
7624 /* Get count of WSA device phandles for this platform */
7625 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7626 "qcom,wsa-devs", NULL);
7627 if (wsa_dev_cnt == -ENOENT) {
7628 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
7629 __func__);
7630 goto err;
7631 } else if (wsa_dev_cnt <= 0) {
7632 dev_err(&pdev->dev,
7633 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
7634 __func__, wsa_dev_cnt);
7635 ret = -EINVAL;
7636 goto err;
7637 }
7638
7639 /*
7640 * Expect total phandles count to be NOT less than maximum possible
7641 * WSA count. However, if it is less, then assign same value to
7642 * max count as well.
7643 */
7644 if (wsa_dev_cnt < wsa_max_devs) {
7645 dev_dbg(&pdev->dev,
7646 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
7647 __func__, wsa_max_devs, wsa_dev_cnt);
7648 wsa_max_devs = wsa_dev_cnt;
7649 }
7650
7651 /* Make sure prefix string passed for each WSA device */
7652 ret = of_property_count_strings(pdev->dev.of_node,
7653 "qcom,wsa-aux-dev-prefix");
7654 if (ret != wsa_dev_cnt) {
7655 dev_err(&pdev->dev,
7656 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
7657 __func__, wsa_dev_cnt, ret);
7658 ret = -EINVAL;
7659 goto err;
7660 }
7661
7662 /*
7663 * Alloc mem to store phandle and index info of WSA device, if already
7664 * registered with ALSA core
7665 */
7666 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
7667 sizeof(struct msm_wsa881x_dev_info),
7668 GFP_KERNEL);
7669 if (!wsa881x_dev_info) {
7670 ret = -ENOMEM;
7671 goto err;
7672 }
7673
7674 /*
7675 * search and check whether all WSA devices are already
7676 * registered with ALSA core or not. If found a node, store
7677 * the node and the index in a local array of struct for later
7678 * use.
7679 */
7680 for (i = 0; i < wsa_dev_cnt; i++) {
7681 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
7682 "qcom,wsa-devs", i);
7683 if (unlikely(!wsa_of_node)) {
7684 /* we should not be here */
7685 dev_err(&pdev->dev,
7686 "%s: wsa dev node is not present\n",
7687 __func__);
7688 ret = -EINVAL;
7689 goto err;
7690 }
7691 if (soc_find_component(wsa_of_node, NULL)) {
7692 /* WSA device registered with ALSA core */
7693 wsa881x_dev_info[found].of_node = wsa_of_node;
7694 wsa881x_dev_info[found].index = i;
7695 found++;
7696 if (found == wsa_max_devs)
7697 break;
7698 }
7699 }
7700
7701 if (found < wsa_max_devs) {
7702 dev_dbg(&pdev->dev,
7703 "%s: failed to find %d components. Found only %d\n",
7704 __func__, wsa_max_devs, found);
7705 return -EPROBE_DEFER;
7706 }
7707 dev_info(&pdev->dev,
7708 "%s: found %d wsa881x devices registered with ALSA core\n",
7709 __func__, found);
7710
7711codec_aux_dev:
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7712 /* Get maximum aux codec device count for this platform */
7713 ret = of_property_read_u32(pdev->dev.of_node,
7714 "qcom,codec-max-aux-devs",
7715 &codec_max_aux_devs);
7716 if (ret) {
7717 dev_err(&pdev->dev,
7718 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
7719 __func__, pdev->dev.of_node->full_name, ret);
7720 codec_max_aux_devs = 0;
7721 goto aux_dev_register;
7722 }
7723 if (codec_max_aux_devs == 0) {
7724 dev_dbg(&pdev->dev,
7725 "%s: Max aux codec devices is 0 for this target?\n",
7726 __func__);
7727 goto aux_dev_register;
7728 }
7729
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7730 /* Get count of aux codec device phandles for this platform */
7731 codec_aux_dev_cnt = of_count_phandle_with_args(
7732 pdev->dev.of_node,
7733 "qcom,codec-aux-devs", NULL);
7734 if (codec_aux_dev_cnt == -ENOENT) {
7735 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
7736 __func__);
7737 goto err;
7738 } else if (codec_aux_dev_cnt <= 0) {
7739 dev_err(&pdev->dev,
7740 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
7741 __func__, codec_aux_dev_cnt);
7742 ret = -EINVAL;
7743 goto err;
7744 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7745
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7746 /*
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7747 * Expect total phandles count to be NOT less than maximum possible
7748 * AUX device count. However, if it is less, then assign same value to
7749 * max count as well.
7750 */
7751 if (codec_aux_dev_cnt < codec_max_aux_devs) {
7752 dev_dbg(&pdev->dev,
7753 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
7754 __func__, codec_max_aux_devs,
7755 codec_aux_dev_cnt);
7756 codec_max_aux_devs = codec_aux_dev_cnt;
7757 }
7758
7759 /*
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7760 * Alloc mem to store phandle and index info of aux codec
7761 * if already registered with ALSA core
7762 */
7763 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
7764 sizeof(struct aux_codec_dev_info),
7765 GFP_KERNEL);
7766 if (!aux_cdc_dev_info) {
7767 ret = -ENOMEM;
7768 goto err;
7769 }
7770
7771 /*
7772 * search and check whether all aux codecs are already
7773 * registered with ALSA core or not. If found a node, store
7774 * the node and the index in a local array of struct for later
7775 * use.
7776 */
7777 for (i = 0; i < codec_aux_dev_cnt; i++) {
7778 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
7779 "qcom,codec-aux-devs", i);
7780 if (unlikely(!aux_codec_of_node)) {
7781 /* we should not be here */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7782 dev_err(&pdev->dev,
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7783 "%s: aux codec dev node is not present\n",
7784 __func__);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7785 ret = -EINVAL;
7786 goto err;
7787 }
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7788 if (soc_find_component(aux_codec_of_node, NULL)) {
7789 /* AUX codec registered with ALSA core */
7790 aux_cdc_dev_info[codecs_found].of_node =
7791 aux_codec_of_node;
7792 aux_cdc_dev_info[codecs_found].index = i;
7793 codecs_found++;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7794 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7795 }
7796
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7797 if (codecs_found < codec_aux_dev_cnt) {
7798 dev_dbg(&pdev->dev,
7799 "%s: failed to find %d components. Found only %d\n",
7800 __func__, codec_aux_dev_cnt, codecs_found);
7801 return -EPROBE_DEFER;
7802 }
7803 dev_info(&pdev->dev,
7804 "%s: found %d AUX codecs registered with ALSA core\n",
7805 __func__, codecs_found);
7806
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7807aux_dev_register:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7808 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
7809 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
7810
7811 /* Alloc array of AUX devs struct */
7812 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
7813 sizeof(struct snd_soc_aux_dev),
7814 GFP_KERNEL);
7815 if (!msm_aux_dev) {
7816 ret = -ENOMEM;
7817 goto err;
7818 }
7819
7820 /* Alloc array of codec conf struct */
7821 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
7822 sizeof(struct snd_soc_codec_conf),
7823 GFP_KERNEL);
7824 if (!msm_codec_conf) {
7825 ret = -ENOMEM;
7826 goto err;
7827 }
7828
7829 for (i = 0; i < wsa_max_devs; i++) {
7830 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
7831 GFP_KERNEL);
7832 if (!dev_name_str) {
7833 ret = -ENOMEM;
7834 goto err;
7835 }
7836
7837 ret = of_property_read_string_index(pdev->dev.of_node,
7838 "qcom,wsa-aux-dev-prefix",
7839 wsa881x_dev_info[i].index,
7840 auxdev_name_prefix);
7841 if (ret) {
7842 dev_err(&pdev->dev,
7843 "%s: failed to read wsa aux dev prefix, ret = %d\n",
7844 __func__, ret);
7845 ret = -EINVAL;
7846 goto err;
7847 }
7848
7849 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
7850 msm_aux_dev[i].name = dev_name_str;
7851 msm_aux_dev[i].codec_name = NULL;
7852 msm_aux_dev[i].codec_of_node =
7853 wsa881x_dev_info[i].of_node;
7854 msm_aux_dev[i].init = msm_wsa881x_init;
7855 msm_codec_conf[i].dev_name = NULL;
7856 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
7857 msm_codec_conf[i].of_node =
7858 wsa881x_dev_info[i].of_node;
7859 }
7860
7861 for (i = 0; i < codec_aux_dev_cnt; i++) {
7862 msm_aux_dev[wsa_max_devs + i].name = NULL;
7863 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
7864 msm_aux_dev[wsa_max_devs + i].codec_of_node =
7865 aux_cdc_dev_info[i].of_node;
7866 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
7867 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
7868 msm_codec_conf[wsa_max_devs + i].name_prefix =
7869 NULL;
7870 msm_codec_conf[wsa_max_devs + i].of_node =
7871 aux_cdc_dev_info[i].of_node;
7872 }
7873
7874 card->codec_conf = msm_codec_conf;
7875 card->aux_dev = msm_aux_dev;
7876err:
7877 return ret;
7878}
7879
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7880static void msm_i2s_auxpcm_init(struct platform_device *pdev)
7881{
7882 int count = 0;
7883 u32 mi2s_master_slave[MI2S_MAX];
7884 int ret = 0;
7885
7886 for (count = 0; count < MI2S_MAX; count++) {
7887 mutex_init(&mi2s_intf_conf[count].lock);
7888 mi2s_intf_conf[count].ref_cnt = 0;
7889 }
7890
7891 ret = of_property_read_u32_array(pdev->dev.of_node,
7892 "qcom,msm-mi2s-master",
7893 mi2s_master_slave, MI2S_MAX);
7894 if (ret) {
7895 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
7896 __func__);
7897 } else {
7898 for (count = 0; count < MI2S_MAX; count++) {
7899 mi2s_intf_conf[count].msm_is_mi2s_master =
7900 mi2s_master_slave[count];
7901 }
7902 }
7903}
7904
7905static void msm_i2s_auxpcm_deinit(void)
7906{
7907 int count = 0;
7908
7909 for (count = 0; count < MI2S_MAX; count++) {
7910 mutex_destroy(&mi2s_intf_conf[count].lock);
7911 mi2s_intf_conf[count].ref_cnt = 0;
7912 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
7913 }
7914}
7915
7916static int kona_ssr_enable(struct device *dev, void *data)
7917{
7918 struct platform_device *pdev = to_platform_device(dev);
7919 struct snd_soc_card *card = platform_get_drvdata(pdev);
7920 int ret = 0;
7921
7922 if (!card) {
7923 dev_err(dev, "%s: card is NULL\n", __func__);
7924 ret = -EINVAL;
7925 goto err;
7926 }
7927
7928 if (!strcmp(card->name, "kona-stub-snd-card")) {
7929 /* TODO */
7930 dev_dbg(dev, "%s: TODO \n", __func__);
7931 }
7932
7933 snd_soc_card_change_online_state(card, 1);
7934 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
7935
7936err:
7937 return ret;
7938}
7939
7940static void kona_ssr_disable(struct device *dev, void *data)
7941{
7942 struct platform_device *pdev = to_platform_device(dev);
7943 struct snd_soc_card *card = platform_get_drvdata(pdev);
7944
7945 if (!card) {
7946 dev_err(dev, "%s: card is NULL\n", __func__);
7947 return;
7948 }
7949
7950 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
7951 snd_soc_card_change_online_state(card, 0);
7952
7953 if (!strcmp(card->name, "kona-stub-snd-card")) {
7954 /* TODO */
7955 dev_dbg(dev, "%s: TODO \n", __func__);
7956 }
7957}
7958
7959static const struct snd_event_ops kona_ssr_ops = {
7960 .enable = kona_ssr_enable,
7961 .disable = kona_ssr_disable,
7962};
7963
7964static int msm_audio_ssr_compare(struct device *dev, void *data)
7965{
7966 struct device_node *node = data;
7967
7968 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
7969 __func__, dev->of_node, node);
7970 return (dev->of_node && dev->of_node == node);
7971}
7972
7973static int msm_audio_ssr_register(struct device *dev)
7974{
7975 struct device_node *np = dev->of_node;
7976 struct snd_event_clients *ssr_clients = NULL;
7977 struct device_node *node = NULL;
7978 int ret = 0;
7979 int i = 0;
7980
7981 for (i = 0; ; i++) {
7982 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
7983 if (!node)
7984 break;
7985 snd_event_mstr_add_client(&ssr_clients,
7986 msm_audio_ssr_compare, node);
7987 }
7988
7989 ret = snd_event_master_register(dev, &kona_ssr_ops,
7990 ssr_clients, NULL);
7991 if (!ret)
7992 snd_event_notify(dev, SND_EVENT_UP);
7993
7994 return ret;
7995}
7996
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7997static int msm_asoc_machine_probe(struct platform_device *pdev)
7998{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7999 struct snd_soc_card *card = NULL;
8000 struct msm_asoc_mach_data *pdata = NULL;
8001 const char *mbhc_audio_jack_type = NULL;
8002 int ret = 0;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8003 uint index = 0;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]8004 struct clk *lpass_audio_hw_vote = NULL;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8005
8006 if (!pdev->dev.of_node) {
8007 dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
8008 return -EINVAL;
8009 }
8010
8011 pdata = devm_kzalloc(&pdev->dev,
8012 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8013 if (!pdata)
8014 return -ENOMEM;
8015
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]8016 of_property_read_u32(pdev->dev.of_node,
8017 "qcom,lito-is-v2-enabled",
8018 &pdata->lito_v2_enabled);
8019
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8020 card = populate_snd_card_dailinks(&pdev->dev);
8021 if (!card) {
8022 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8023 ret = -EINVAL;
8024 goto err;
8025 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8026
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8027 card->dev = &pdev->dev;
8028 platform_set_drvdata(pdev, card);
8029 snd_soc_card_set_drvdata(card, pdata);
8030
8031 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8032 if (ret) {
8033 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
8034 __func__, ret);
8035 goto err;
8036 }
8037
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8038 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8039 if (ret) {
8040 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
8041 __func__, ret);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8042 goto err;
8043 }
8044
8045 ret = msm_populate_dai_link_component_of_node(card);
8046 if (ret) {
8047 ret = -EPROBE_DEFER;
8048 goto err;
8049 }
8050
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]8051 ret = msm_init_aux_dev(pdev, card);
8052 if (ret)
8053 goto err;
8054
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8055 ret = devm_snd_soc_register_card(&pdev->dev, card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8056 if (ret == -EPROBE_DEFER) {
8057 if (codec_reg_done)
8058 ret = -EINVAL;
8059 goto err;
8060 } else if (ret) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8061 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
8062 __func__, ret);
8063 goto err;
8064 }
8065 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
8066 __func__, card->name);
8067
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8068 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8069 "qcom,hph-en1-gpio", 0);
8070 if (!pdata->hph_en1_gpio_p) {
8071 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8072 __func__, "qcom,hph-en1-gpio",
8073 pdev->dev.of_node->full_name);
8074 }
8075
8076 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8077 "qcom,hph-en0-gpio", 0);
8078 if (!pdata->hph_en0_gpio_p) {
8079 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8080 __func__, "qcom,hph-en0-gpio",
8081 pdev->dev.of_node->full_name);
8082 }
8083
8084 ret = of_property_read_string(pdev->dev.of_node,
8085 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8086 if (ret) {
8087 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
8088 __func__, "qcom,mbhc-audio-jack-type",
8089 pdev->dev.of_node->full_name);
8090 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8091 } else {
8092 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8093 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8094 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8095 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8096 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8097 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8098 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8099 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8100 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8101 } else {
8102 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8103 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8104 }
8105 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]8106 /*
8107 * Parse US-Euro gpio info from DT. Report no error if us-euro
8108 * entry is not found in DT file as some targets do not support
8109 * US-Euro detection
8110 */
8111 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8112 "qcom,us-euro-gpios", 0);
8113 if (!pdata->us_euro_gpio_p) {
8114 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8115 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8116 } else {
8117 dev_dbg(&pdev->dev, "%s detected\n",
8118 "qcom,us-euro-gpios");
8119 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8120 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8121
Meng Wanga60b4082019-02-25 17:02:23 +0800[diff] [blame]8122 if (wcd_mbhc_cfg.enable_usbc_analog)
8123 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
8124
8125 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
8126 "fsa4480-i2c-handle", 0);
8127 if (!pdata->fsa_handle)
8128 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8129 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
8130
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8131 msm_i2s_auxpcm_init(pdev);
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]8132 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8133 "qcom,cdc-dmic01-gpios",
8134 0);
8135 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8136 "qcom,cdc-dmic23-gpios",
8137 0);
8138 pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
8139 "qcom,cdc-dmic45-gpios",
8140 0);
Laxminath Kasam168173e2019-09-16 12:59:43 +0530[diff] [blame]8141 if (pdata->dmic01_gpio_p)
8142 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic01_gpio_p, false);
8143 if (pdata->dmic23_gpio_p)
8144 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic23_gpio_p, false);
Sudheer Papothic51afbc2019-08-01 10:25:32 +0530[diff] [blame]8145 if (pdata->dmic45_gpio_p)
8146 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic45_gpio_p, false);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8147
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8148 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
8149 "qcom,pri-mi2s-gpios", 0);
8150 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
8151 "qcom,sec-mi2s-gpios", 0);
8152 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8153 "qcom,tert-mi2s-gpios", 0);
8154 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8155 "qcom,quat-mi2s-gpios", 0);
8156 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8157 "qcom,quin-mi2s-gpios", 0);
8158 pdata->mi2s_gpio_p[SEN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8159 "qcom,sen-mi2s-gpios", 0);
8160 for (index = PRIM_MI2S; index < MI2S_MAX; index++)
8161 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
8162
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]8163 /* Register LPASS audio hw vote */
8164 lpass_audio_hw_vote = devm_clk_get(&pdev->dev, "lpass_audio_hw_vote");
8165 if (IS_ERR(lpass_audio_hw_vote)) {
8166 ret = PTR_ERR(lpass_audio_hw_vote);
8167 dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
8168 __func__, "lpass_audio_hw_vote", ret);
8169 lpass_audio_hw_vote = NULL;
8170 ret = 0;
8171 }
8172 pdata->lpass_audio_hw_vote = lpass_audio_hw_vote;
8173 pdata->core_audio_vote_count = 0;
8174
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8175 ret = msm_audio_ssr_register(&pdev->dev);
8176 if (ret)
8177 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8178 __func__, ret);
8179
8180 is_initial_boot = true;
8181
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8182 return 0;
8183err:
8184 devm_kfree(&pdev->dev, pdata);
8185 return ret;
8186}
8187
8188static int msm_asoc_machine_remove(struct platform_device *pdev)
8189{
8190 struct snd_soc_card *card = platform_get_drvdata(pdev);
8191
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8192 snd_event_master_deregister(&pdev->dev);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8193 snd_soc_unregister_card(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8194 msm_i2s_auxpcm_deinit();
8195
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8196 return 0;
8197}
8198
8199static struct platform_driver kona_asoc_machine_driver = {
8200 .driver = {
8201 .name = DRV_NAME,
8202 .owner = THIS_MODULE,
8203 .pm = &snd_soc_pm_ops,
8204 .of_match_table = kona_asoc_machine_of_match,
Xiaojun Sang53cd13a2018-06-29 15:14:37 +0800[diff] [blame]8205 .suppress_bind_attrs = true,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8206 },
8207 .probe = msm_asoc_machine_probe,
8208 .remove = msm_asoc_machine_remove,
8209};
8210module_platform_driver(kona_asoc_machine_driver);
8211
8212MODULE_DESCRIPTION("ALSA SoC msm");
8213MODULE_LICENSE("GPL v2");
8214MODULE_ALIAS("platform:" DRV_NAME);
8215MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);