blob: 079918dc37a861b5306354cd112b7f5572d4a437 [file] [log] [blame]
Jeff Johnson295189b2012-06-20 16:38:30 -07001/*
Katya Nigama6fbf662015-03-17 18:35:47 +05302 * Copyright (c) 2012-2015 The Linux Foundation. All rights reserved.
Kiet Lam842dad02014-02-18 18:44:02 -08003 *
4 * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
5 *
6 *
7 * Permission to use, copy, modify, and/or distribute this software for
8 * any purpose with or without fee is hereby granted, provided that the
9 * above copyright notice and this permission notice appear in all
10 * copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
13 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
14 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
15 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
16 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
17 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
18 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
19 * PERFORMANCE OF THIS SOFTWARE.
Leo Chang416afe02013-07-01 13:58:13 -070020 */
Kiet Lam842dad02014-02-18 18:44:02 -080021
22/*
23 * This file was originally distributed by Qualcomm Atheros, Inc.
24 * under proprietary terms before Copyright ownership was assigned
25 * to the Linux Foundation.
26 */
27
Jeff Johnson295189b2012-06-20 16:38:30 -070028/**=========================================================================
29
30 @file wlan_qct_dxe.c
31
32 @brief
33
34 This file contains the external API exposed by the wlan data transfer abstraction layer module.
Jeff Johnson295189b2012-06-20 16:38:30 -070035========================================================================*/
36
37/*===========================================================================
38
39 EDIT HISTORY FOR FILE
40
41
42 This section contains comments describing changes made to the module.
43 Notice that changes are listed in reverse chronological order.
44
45
46 $Header:$ $DateTime: $ $Author: $
47
48
49when who what, where, why
50-------- --- ----------------------------------------------------------
5108/03/10 schang Created module.
52
53===========================================================================*/
54
55/*===========================================================================
56
57 INCLUDE FILES FOR MODULE
58
59===========================================================================*/
60
61/*----------------------------------------------------------------------------
62 * Include Files
63 * -------------------------------------------------------------------------*/
64#include "wlan_qct_dxe.h"
65#include "wlan_qct_dxe_i.h"
66#include "wlan_qct_pal_device.h"
Jeff Johnson295189b2012-06-20 16:38:30 -070067
68/*----------------------------------------------------------------------------
69 * Local Definitions
70 * -------------------------------------------------------------------------*/
71//#define WLANDXE_DEBUG_CH_INFO_DUMP
72
73/* Temporary configuration defines
74 * Have to find out permanent solution */
75#define T_WLANDXE_MAX_DESCRIPTOR_COUNT 40
76#define T_WLANDXE_MAX_FRAME_SIZE 2000
77#define T_WLANDXE_TX_INT_ENABLE_FCOUNT 1
78#define T_WLANDXE_MEMDUMP_BYTE_PER_LINE 16
79#define T_WLANDXE_MAX_RX_PACKET_WAIT 6000
Mihir Shetefdc9f532014-01-09 15:03:02 +053080#define T_WLANDXE_SSR_TIMEOUT 5000
Leo Chang5edb2d32013-04-03 13:32:58 -070081#define T_WLANDXE_PERIODIC_HEALTH_M_TIME 2500
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -070082#define T_WLANDXE_MAX_HW_ACCESS_WAIT 2000
Jeff Johnsone7245742012-09-05 17:12:55 -070083#define WLANDXE_MAX_REAPED_RX_FRAMES 512
Jeff Johnson295189b2012-06-20 16:38:30 -070084
Leo Chang094ece82013-04-23 17:57:41 -070085#define WLANPAL_RX_INTERRUPT_PRO_MASK 0x20
86#define WLANDXE_RX_INTERRUPT_PRO_UNMASK 0x5F
Leo Chang00708f62013-12-03 20:21:51 -080087
88/* 1msec busy wait in case CSR is not valid */
89#define WLANDXE_CSR_NEXT_READ_WAIT 1000
90/* CSR max retry count */
91#define WLANDXE_CSR_MAX_READ_COUNT 30
92
93
Jeff Johnson295189b2012-06-20 16:38:30 -070094/* This is temporary fot the compile
95 * WDI will release official version
96 * This must be removed */
97#define WDI_GET_PAL_CTX() NULL
98
Madan Mohan Koyyalamudidfd6aa82012-10-18 20:18:43 -070099
Jeff Johnson295189b2012-06-20 16:38:30 -0700100/*-------------------------------------------------------------------------
101 * Local Varables
102 *-------------------------------------------------------------------------*/
103/* This is temp, someone have to allocate for me, and must be part of global context */
Madan Mohan Koyyalamudidfd6aa82012-10-18 20:18:43 -0700104static WLANDXE_CtrlBlkType *tempDxeCtrlBlk;
Jeff Johnson295189b2012-06-20 16:38:30 -0700105static char *channelType[WDTS_CHANNEL_MAX] =
106 {
107 "TX_LOW_PRI",
108 "TX_HIGH_PRI",
109 "RX_LOW_PRI",
Jeff Johnson295189b2012-06-20 16:38:30 -0700110 "RX_HIGH_PRI",
Mihir Shetee6618162015-03-16 14:48:42 +0530111 "RX_FW_LOGS",
Jeff Johnson295189b2012-06-20 16:38:30 -0700112 };
Jeff Johnsone7245742012-09-05 17:12:55 -0700113static wpt_packet *rx_reaped_buf[WLANDXE_MAX_REAPED_RX_FRAMES];
Jeff Johnson295189b2012-06-20 16:38:30 -0700114
115/*-------------------------------------------------------------------------
116 * External Function Proto Type
117 *-------------------------------------------------------------------------*/
118
119/*-------------------------------------------------------------------------
120 * Local Function Proto Type
121 *-------------------------------------------------------------------------*/
122static wpt_status dxeRXFrameSingleBufferAlloc
123(
124 WLANDXE_CtrlBlkType *dxeCtxt,
125 WLANDXE_ChannelCBType *channelEntry,
126 WLANDXE_DescCtrlBlkType *currentCtrlBlock
127);
128
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700129static wpt_status dxeNotifySmsm
130(
131 wpt_boolean kickDxe,
132 wpt_boolean ringEmpty
133);
134
Mihir Shetefdc9f532014-01-09 15:03:02 +0530135static void dxeStartSSRTimer
136(
137 WLANDXE_CtrlBlkType *dxeCtxt
138);
139
Jeff Johnson295189b2012-06-20 16:38:30 -0700140/*-------------------------------------------------------------------------
141 * Local Function
142 *-------------------------------------------------------------------------*/
Jeff Johnson295189b2012-06-20 16:38:30 -0700143/*==========================================================================
144 @ Function Name
145 dxeChannelMonitor
146
147 @ Description
148
149 @ Parameters
150 WLANDXE_ChannelCBType *channelEntry
151 Channel specific control block
152
153 @ Return
154 wpt_status
155
156===========================================================================*/
157static wpt_status dxeChannelMonitor
158(
159 char *monitorDescription,
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530160 WLANDXE_ChannelCBType *channelEntry,
161 wpt_log_data_stall_channel_type *channelLog
Jeff Johnson295189b2012-06-20 16:38:30 -0700162)
163{
164 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
165
Jeff Johnsone7245742012-09-05 17:12:55 -0700166 if((NULL == monitorDescription) || (NULL == channelEntry))
167 {
168 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
169 "INVALID Input ARG");
170 return eWLAN_PAL_STATUS_E_INVAL;
171 }
172
Mihir Shetee6618162015-03-16 14:48:42 +0530173 if(channelEntry->channelType >= WDTS_CHANNEL_MAX)
Jeff Johnsone7245742012-09-05 17:12:55 -0700174 {
175 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
176 "INVALID Channel type");
177 return eWLAN_PAL_STATUS_E_INVAL;
178 }
179
Leo Chang345ef992013-07-12 10:17:29 -0700180 wpalTrace(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
181 "%11s : HCBO %d, HCBDP 0x%x, HCBDC 0x%x,",
182 channelType[channelEntry->channelType],
183 channelEntry->headCtrlBlk->ctrlBlkOrder,
184 channelEntry->headCtrlBlk->linkedDescPhyAddr,
185 channelEntry->headCtrlBlk->linkedDesc->descCtrl.ctrl);
186 wpalTrace(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
187 "%11s : TCBO %d, TCBDP 0x%x, TCBDC 0x%x",
188 channelType[channelEntry->channelType],
189 channelEntry->tailCtrlBlk->ctrlBlkOrder,
190 channelEntry->tailCtrlBlk->linkedDescPhyAddr,
191 channelEntry->tailCtrlBlk->linkedDesc->descCtrl.ctrl);
192 wpalTrace(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
193 "%11s : FDC %d, RDC %d, TFC %d",
194 channelType[channelEntry->channelType],
195 channelEntry->numFreeDesc,
196 channelEntry->numRsvdDesc,
197 channelEntry->numTotalFrame);
Jeff Johnson295189b2012-06-20 16:38:30 -0700198
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -0700199 if(channelLog)
200 {
201 channelLog->numDesc = channelEntry->numDesc;
202 channelLog->numFreeDesc = channelEntry->numFreeDesc;
203 channelLog->numRsvdDesc = channelEntry->numRsvdDesc;
204 channelLog->headDescOrder = channelEntry->headCtrlBlk->ctrlBlkOrder;
205 channelLog->tailDescOrder = channelEntry->tailCtrlBlk->ctrlBlkOrder;
206 }
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530207
Jeff Johnson295189b2012-06-20 16:38:30 -0700208 return status;
209}
210
Jeff Johnsone7245742012-09-05 17:12:55 -0700211#ifdef WLANDXE_DEBUG_MEMORY_DUMP
Jeff Johnson295189b2012-06-20 16:38:30 -0700212/*==========================================================================
213 @ Function Name
214 dxeMemoryDump
215
216 @ Description
217
218 @ Parameters
219 WLANDXE_ChannelCBType *channelEntry
220 Channel specific control block
221
222 @ Return
223 wpt_status
224
225===========================================================================*/
226static wpt_status dxeMemoryDump
227(
228 wpt_uint8 *dumpPointer,
229 wpt_uint32 dumpSize,
230 char *dumpTarget
231)
232{
233 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
234 wpt_uint32 numBytes = 0;
235 wpt_uint32 idx;
236
Jeff Johnsone7245742012-09-05 17:12:55 -0700237 if((NULL == dumpPointer) ||
238 (NULL == dumpTarget))
239 {
240 return status;
241 }
242
Jeff Johnson295189b2012-06-20 16:38:30 -0700243 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
244 "+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
245 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
246 "%s Location 0x%x, Size %d", dumpTarget, dumpPointer, dumpSize);
247
248 numBytes = dumpSize % T_WLANDXE_MEMDUMP_BYTE_PER_LINE;
249 for(idx = 0; idx < dumpSize; idx++)
250 {
251 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
252 "0x%2x ", dumpPointer[idx]);
253 if(0 == ((idx + 1) % T_WLANDXE_MEMDUMP_BYTE_PER_LINE))
254 {
255 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW, "\n");
256 }
257 }
258 if(0 != numBytes)
259 {
260 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW, "\n");
261 }
262 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
263 "+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
264
265 return status;
266}
Jeff Johnsone7245742012-09-05 17:12:55 -0700267#endif /* WLANDXE_DEBUG_MEMORY_DUMP */
Jeff Johnson295189b2012-06-20 16:38:30 -0700268
269/*==========================================================================
270 @ Function Name
271 dxeDescriptorDump
272
273 @ Description
274
275 @ Parameters
276 WLANDXE_ChannelCBType *channelEntry
277 Channel specific control block
278
279 @ Return
280 wpt_status
281
282===========================================================================*/
283wpt_status dxeDescriptorDump
284(
285 WLANDXE_ChannelCBType *channelEntry,
286 WLANDXE_DescType *targetDesc,
287 wpt_uint32 fragmentOrder
288)
289{
290 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
291
292
Jeff Johnsone7245742012-09-05 17:12:55 -0700293 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
Jeff Johnson295189b2012-06-20 16:38:30 -0700294 "+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
Jeff Johnsone7245742012-09-05 17:12:55 -0700295 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700296 "Descriptor Dump for channel %s, %d / %d fragment",
Jeff Johnson295189b2012-06-20 16:38:30 -0700297 channelType[channelEntry->channelType],
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700298 fragmentOrder + 1,
299 channelEntry->numFragmentCurrentChain);
Jeff Johnson295189b2012-06-20 16:38:30 -0700300
Jeff Johnsone7245742012-09-05 17:12:55 -0700301 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
Jeff Johnson295189b2012-06-20 16:38:30 -0700302 "CTRL WORD 0x%x, TransferSize %d",
303 WLANDXE_U32_SWAP_ENDIAN(targetDesc->descCtrl.ctrl),
304 WLANDXE_U32_SWAP_ENDIAN(targetDesc->xfrSize));
Jeff Johnsone7245742012-09-05 17:12:55 -0700305 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
Jeff Johnson295189b2012-06-20 16:38:30 -0700306 "SRC ADD 0x%x, DST ADD 0x%x, NEXT DESC 0x%x",
307 WLANDXE_U32_SWAP_ENDIAN(targetDesc->dxedesc.dxe_short_desc.srcMemAddrL),
308 WLANDXE_U32_SWAP_ENDIAN(targetDesc->dxedesc.dxe_short_desc.dstMemAddrL),
309 WLANDXE_U32_SWAP_ENDIAN(targetDesc->dxedesc.dxe_short_desc.phyNextL));
Jeff Johnsone7245742012-09-05 17:12:55 -0700310 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
Jeff Johnson295189b2012-06-20 16:38:30 -0700311 "+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
312
313 return status;
314}
315
316/*==========================================================================
317 @ Function Name
318 dxeChannelRegisterDump
319
320 @ Description
321
322 @ Parameters
323 WLANDXE_ChannelCBType *channelEntry
324 Channel specific control block
325
326 @ Return
327 wpt_status
328
329===========================================================================*/
330wpt_status dxeChannelRegisterDump
331(
332 WLANDXE_ChannelCBType *channelEntry,
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530333 char *dumpTarget,
334 wpt_log_data_stall_channel_type *channelLog
Jeff Johnson295189b2012-06-20 16:38:30 -0700335)
336{
Leo Chang345ef992013-07-12 10:17:29 -0700337 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
338 wpt_uint32 chStatusReg, chControlReg, chDescReg, chLDescReg;
339
340 /* Whatever RIVA power condition try to wakeup RIVA through SMSM
341 * This will not simply wakeup RIVA
342 * Just incase TX not wanted stuck, Trigger TX again */
343 dxeNotifySmsm(eWLAN_PAL_FALSE, eWLAN_PAL_TRUE);
344 dxeNotifySmsm(eWLAN_PAL_TRUE, eWLAN_PAL_FALSE);
345 wpalSleep(10);
Jeff Johnson295189b2012-06-20 16:38:30 -0700346
Mihir Shetee6618162015-03-16 14:48:42 +0530347 if(channelEntry->channelType >= WDTS_CHANNEL_MAX)
Tushnim Bhattacharyya5dd94562013-03-20 20:15:03 -0700348 {
349 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
350 "INVALID Channel type");
351 return eWLAN_PAL_STATUS_E_INVAL;
352 }
353
Leo Chang345ef992013-07-12 10:17:29 -0700354 wpalReadRegister(channelEntry->channelRegister.chDXEDesclRegAddr, &chDescReg);
355 wpalReadRegister(channelEntry->channelRegister.chDXELstDesclRegAddr, &chLDescReg);
356 wpalReadRegister(channelEntry->channelRegister.chDXECtrlRegAddr, &chControlReg);
357 wpalReadRegister(channelEntry->channelRegister.chDXEStatusRegAddr, &chStatusReg);
Jeff Johnson295189b2012-06-20 16:38:30 -0700358
Leo Chang345ef992013-07-12 10:17:29 -0700359 wpalTrace(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
360 "%11s : CCR 0x%x, CSR 0x%x, CDR 0x%x, CLDR 0x%x",
361 channelType[channelEntry->channelType],
362 chControlReg, chStatusReg, chDescReg, chLDescReg);
Jeff Johnson295189b2012-06-20 16:38:30 -0700363
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -0700364 if(channelLog)
365 {
366 channelLog->ctrlRegVal = chControlReg;
367 channelLog->statRegVal = chStatusReg;
368 }
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -0700369
Jeff Johnson295189b2012-06-20 16:38:30 -0700370 return status;
371}
Jeff Johnsone7245742012-09-05 17:12:55 -0700372
373/*==========================================================================
374 @ Function Name
375 dxeChannelAllDescDump
376
377 @ Description
378 Dump all DXE descriptors within assigned channe;
379
380 @ Parameters
381 WLANDXE_ChannelCBType *channelEntry
382
383 @ Return
384 NONE
385
386===========================================================================*/
387void dxeChannelAllDescDump
388(
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700389 WLANDXE_ChannelCBType *channelEntry,
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530390 WDTS_ChannelType channel,
391 wpt_log_data_stall_channel_type *channelLog
Jeff Johnsone7245742012-09-05 17:12:55 -0700392)
393{
394 wpt_uint32 channelLoop;
395 WLANDXE_DescCtrlBlkType *targetCtrlBlk;
Madan Mohan Koyyalamudi94d4c192012-09-24 14:06:14 -0700396 wpt_uint32 previousCtrlValue = 0;
Leo Chang345ef992013-07-12 10:17:29 -0700397 wpt_uint32 previousCtrlValid = 0;
398 wpt_uint32 currentCtrlValid = 0;
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -0700399 wpt_uint32 valDescCount = 0;
400 wpt_uint32 invalDescCount = 0;
Jeff Johnsone7245742012-09-05 17:12:55 -0700401
402 targetCtrlBlk = channelEntry->headCtrlBlk;
403
404 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
Leo Chang345ef992013-07-12 10:17:29 -0700405 "%11s : %d descriptor chains, head desc ctrl 0x%x",
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700406 channelType[channelEntry->channelType],
Madan Mohan Koyyalamudi24a00f92012-10-22 15:21:02 -0700407 channelEntry->numDesc,
408 targetCtrlBlk->linkedDesc->descCtrl.ctrl);
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700409 previousCtrlValue = targetCtrlBlk->linkedDesc->descCtrl.ctrl;
410
411 if((WDTS_CHANNEL_RX_LOW_PRI == channel) ||
Mihir Shetee6618162015-03-16 14:48:42 +0530412 (WDTS_CHANNEL_RX_HIGH_PRI == channel)||
413 (WDTS_CHANNEL_RX_LOG == channel))
Jeff Johnsone7245742012-09-05 17:12:55 -0700414 {
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700415 for(channelLoop = 0; channelLoop < channelEntry->numDesc; channelLoop++)
Madan Mohan Koyyalamudi94d4c192012-09-24 14:06:14 -0700416 {
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700417 if(previousCtrlValue != targetCtrlBlk->linkedDesc->descCtrl.ctrl)
418 {
419 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
420 "%5d : 0x%x", targetCtrlBlk->ctrlBlkOrder,
421 targetCtrlBlk->linkedDesc->descCtrl.ctrl);
422 }
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -0700423 if(targetCtrlBlk->linkedDesc->descCtrl.ctrl & WLANDXE_DESC_CTRL_VALID)
424 {
425 valDescCount++;
426 }
427 else
428 {
429 invalDescCount++;
430 }
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700431 previousCtrlValue = targetCtrlBlk->linkedDesc->descCtrl.ctrl;
432 targetCtrlBlk = (WLANDXE_DescCtrlBlkType *)targetCtrlBlk->nextCtrlBlk;
Madan Mohan Koyyalamudi94d4c192012-09-24 14:06:14 -0700433 }
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700434 }
435 else
436 {
Leo Chang345ef992013-07-12 10:17:29 -0700437 /* Head Descriptor is valid or not */
438 previousCtrlValid = targetCtrlBlk->linkedDesc->descCtrl.ctrl & WLANDXE_DESC_CTRL_VALID;
439 targetCtrlBlk = (WLANDXE_DescCtrlBlkType *)targetCtrlBlk->nextCtrlBlk;
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700440 for(channelLoop = 0; channelLoop < channelEntry->numDesc; channelLoop++)
441 {
Leo Chang345ef992013-07-12 10:17:29 -0700442 currentCtrlValid = targetCtrlBlk->linkedDesc->descCtrl.ctrl & WLANDXE_DESC_CTRL_VALID;
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -0700443 if(currentCtrlValid)
444 {
445 valDescCount++;
446 }
447 else
448 {
449 invalDescCount++;
450 }
Leo Chang345ef992013-07-12 10:17:29 -0700451 if(currentCtrlValid != previousCtrlValid)
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700452 {
453 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
454 "%5d : 0x%x", targetCtrlBlk->ctrlBlkOrder,
455 targetCtrlBlk->linkedDesc->descCtrl.ctrl);
456 }
Leo Chang345ef992013-07-12 10:17:29 -0700457 previousCtrlValid = currentCtrlValid;
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700458 targetCtrlBlk = (WLANDXE_DescCtrlBlkType *)targetCtrlBlk->nextCtrlBlk;
459 }
460 }
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530461
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -0700462 if(channelLog)
463 {
464 channelLog->numValDesc = valDescCount;
465 channelLog->numInvalDesc = invalDescCount;
466 }
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530467
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700468 return;
469}
470
471/*==========================================================================
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530472 @ Function Name
473 dxeErrChannelDebug
474
475 @ Description
476 Dump channel information for which Error interrupt has occured
477
478 @ Parameters
479 WLANDXE_ChannelCBType *channelCb
480
481 @ Return
482 NONE
483
484===========================================================================*/
485void dxeErrChannelDebug
486(
Mihir Shete79d6b582014-03-12 17:54:07 +0530487 WLANDXE_ChannelCBType *channelCb,
488 wpt_uint32 chStatusReg
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530489)
490{
491 wpt_log_data_stall_channel_type channelLog;
Mihir Shete79d6b582014-03-12 17:54:07 +0530492 wpt_uint32 chLDescReg, channelLoop;
493 WLANDXE_DescCtrlBlkType *targetCtrlBlk;
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530494
495 dxeChannelMonitor("INT_ERR", channelCb, &channelLog);
496 dxeDescriptorDump(channelCb, channelCb->headCtrlBlk->linkedDesc, 0);
497 dxeChannelRegisterDump(channelCb, "INT_ERR", &channelLog);
498 dxeChannelAllDescDump(channelCb, channelCb->channelType, &channelLog);
499 wpalMemoryCopy(channelLog.channelName,
500 "INT_ERR",
501 WPT_TRPT_CHANNEL_NAME);
502 wpalPacketStallUpdateInfo(NULL, NULL, &channelLog, channelCb->channelType);
503#ifdef FEATURE_WLAN_DIAG_SUPPORT
504 wpalPacketStallDumpLog();
505#endif /* FEATURE_WLAN_DIAG_SUPPORT */
Mihir Shete79d6b582014-03-12 17:54:07 +0530506 switch ((chStatusReg & WLANDXE_CH_STAT_ERR_CODE_MASK) >>
507 WLANDXE_CH_STAT_ERR_CODE_OFFSET)
508 {
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530509
Mihir Shete79d6b582014-03-12 17:54:07 +0530510 case WLANDXE_ERROR_PRG_INV_B2H_SRC_QID:
511 case WLANDXE_ERROR_PRG_INV_B2H_DST_QID:
512 case WLANDXE_ERROR_PRG_INV_B2H_SRC_IDX:
513 case WLANDXE_ERROR_PRG_INV_H2B_SRC_QID:
514 case WLANDXE_ERROR_PRG_INV_H2B_DST_QID:
515 case WLANDXE_ERROR_PRG_INV_H2B_DST_IDX:
516 {
517 dxeNotifySmsm(eWLAN_PAL_FALSE, eWLAN_PAL_TRUE);
518 dxeNotifySmsm(eWLAN_PAL_TRUE, eWLAN_PAL_FALSE);
519 wpalSleep(10);
520
521 if(channelCb->channelType > WDTS_CHANNEL_RX_HIGH_PRI)
522 {
523 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
524 "%s: Invalid Channel", __func__);
525 break;
526 }
527
528 wpalReadRegister(channelCb->channelRegister.chDXELstDesclRegAddr, &chLDescReg);
529
530 targetCtrlBlk = channelCb->headCtrlBlk;
531
532 for(channelLoop = 0; channelLoop < channelCb->numDesc; channelLoop++)
533 {
534 if (targetCtrlBlk->linkedDescPhyAddr == chLDescReg)
535 {
536 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
537 "%11s :CHx_DESCL: desc ctrl 0x%x, src 0x%x, dst 0x%x, next 0x%x",
538 channelType[channelCb->channelType],
539 targetCtrlBlk->linkedDesc->descCtrl.ctrl,
540 targetCtrlBlk->linkedDesc->dxedesc.dxe_short_desc.srcMemAddrL,
541 targetCtrlBlk->linkedDesc->dxedesc.dxe_short_desc.dstMemAddrL,
542 targetCtrlBlk->linkedDesc->dxedesc.dxe_short_desc.phyNextL);
543
544 targetCtrlBlk = (WLANDXE_DescCtrlBlkType *)targetCtrlBlk->nextCtrlBlk;
545
546 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
547 "%11s :Next Desc: desc ctrl 0x%x, src 0x%x, dst 0x%x, next 0x%x",
548 channelType[channelCb->channelType],
549 targetCtrlBlk->linkedDesc->descCtrl.ctrl,
550 targetCtrlBlk->linkedDesc->dxedesc.dxe_short_desc.srcMemAddrL,
551 targetCtrlBlk->linkedDesc->dxedesc.dxe_short_desc.dstMemAddrL,
552 targetCtrlBlk->linkedDesc->dxedesc.dxe_short_desc.phyNextL);
553 break;
554 }
555 targetCtrlBlk = (WLANDXE_DescCtrlBlkType *)targetCtrlBlk->nextCtrlBlk;
556 }
557 break;
558 }
559 default:
560 {
561 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
562 "%s: No Debug Inormation", __func__);
563 break;
564 }
565
566 }
Siddharth Bhal68115602015-01-18 20:44:55 +0530567 wpalFwDumpReq(17, 0, 0, 0, 0, 0);
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530568}
569/*==========================================================================
570 @ Function Name
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700571 dxeTxThreadChannelDebugHandler
572
573 @ Description
574 Dump TX channel information
575
576 @ Parameters
577 Wwpt_msg *msgPtr
578
579 @ Return
580 NONE
581
582===========================================================================*/
583void dxeTxThreadChannelDebugHandler
584(
585 wpt_msg *msgPtr
586)
587{
588 wpt_uint8 channelLoop;
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -0700589 wpt_log_data_stall_channel_type channelLog;
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700590
591 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -0700592 "%s Enter", __func__);
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700593
594 /* Whatever RIVA power condition try to wakeup RIVA through SMSM
595 * This will not simply wakeup RIVA
596 * Just incase TX not wanted stuck, Trigger TX again */
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700597 for(channelLoop = 0; channelLoop < WDTS_CHANNEL_RX_LOW_PRI; channelLoop++)
598 {
599 dxeChannelMonitor("******** Get Descriptor Snapshot ",
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530600 &tempDxeCtrlBlk->dxeChannel[channelLoop],
601 &channelLog);
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700602 dxeChannelRegisterDump(&tempDxeCtrlBlk->dxeChannel[channelLoop],
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530603 "Abnormal successive empty interrupt",
604 &channelLog);
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -0700605 dxeChannelAllDescDump(&tempDxeCtrlBlk->dxeChannel[channelLoop],
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530606 channelLoop,
607 &channelLog);
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -0700608
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -0700609 wpalMemoryCopy(channelLog.channelName,
610 channelType[channelLoop],
611 WPT_TRPT_CHANNEL_NAME);
612 wpalPacketStallUpdateInfo(NULL, NULL, &channelLog, channelLoop);
Jeff Johnsone7245742012-09-05 17:12:55 -0700613 }
614
Leo Chang345ef992013-07-12 10:17:29 -0700615 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
Jeff Johnson9e237fb2013-10-30 18:46:20 -0700616 "================== DXE Dump End ======================");
Madan Mohan Koyyalamudi24a00f92012-10-22 15:21:02 -0700617 wpalMemoryFree(msgPtr);
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -0700618
619#ifdef FEATURE_WLAN_DIAG_SUPPORT
620 wpalPacketStallDumpLog();
621#endif /* FEATURE_WLAN_DIAG_SUPPORT */
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700622 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -0700623 "%s Exit", __func__);
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700624 return;
625}
626
627/*==========================================================================
628 @ Function Name
629 dxeRxThreadChannelDebugHandler
630
631 @ Description
632 Dump RX channel information
633
634 @ Parameters
635 Wwpt_msg *msgPtr
636
637 @ Return
638 NONE
639
640===========================================================================*/
641void dxeRxThreadChannelDebugHandler
642(
643 wpt_msg *msgPtr
644)
645{
646 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
647 wpt_uint8 channelLoop;
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -0700648 wpt_log_data_stall_channel_type channelLog;
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700649
650 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -0700651 "%s Enter", __func__);
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700652
653 /* Whatever RIVA power condition try to wakeup RIVA through SMSM
654 * This will not simply wakeup RIVA
655 * Just incase TX not wanted stuck, Trigger TX again */
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700656 for(channelLoop = WDTS_CHANNEL_RX_LOW_PRI; channelLoop < WDTS_CHANNEL_MAX; channelLoop++)
657 {
Mihir Shetee6618162015-03-16 14:48:42 +0530658 if (!WLANDXE_IS_VALID_CHANNEL(channelLoop))
659 continue;
660
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700661 dxeChannelMonitor("******** Get Descriptor Snapshot ",
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530662 &tempDxeCtrlBlk->dxeChannel[channelLoop],
663 &channelLog);
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700664 dxeChannelRegisterDump(&tempDxeCtrlBlk->dxeChannel[channelLoop],
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530665 "Abnormal successive empty interrupt",
666 &channelLog);
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -0700667 dxeChannelAllDescDump(&tempDxeCtrlBlk->dxeChannel[channelLoop],
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530668 channelLoop, &channelLog);
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -0700669
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -0700670 wpalMemoryCopy(channelLog.channelName,
671 channelType[channelLoop],
672 WPT_TRPT_CHANNEL_NAME);
673 wpalPacketStallUpdateInfo(NULL, NULL, &channelLog, channelLoop);
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +0530674
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700675 }
676
677 /* Now serialise the message through Tx thread also to make sure
678 * no register access when RIVA is in powersave */
679 /*Use the same message pointer just change the call back function */
680 msgPtr->callback = dxeTxThreadChannelDebugHandler;
681 status = wpalPostTxMsg(WDI_GET_PAL_CTX(),
682 msgPtr);
683 if ( eWLAN_PAL_STATUS_SUCCESS != status )
684 {
685 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
Madan Mohan Koyyalamudi48139e32012-10-11 14:43:56 -0700686 "Tx thread state dump req serialize fail status=%d",
Jeff Johnson9e237fb2013-10-30 18:46:20 -0700687 status);
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -0700688 }
689
690 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -0700691 "%s Exit", __func__);
Jeff Johnsone7245742012-09-05 17:12:55 -0700692 return;
693}
Jeff Johnson295189b2012-06-20 16:38:30 -0700694
695/*==========================================================================
696 @ Function Name
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -0700697 dxeRXHealthMonitor
698
699 @ Description
700 Monitoring RX channel healthy stataus
701 If detect any problem, try to recover
702
703 @ Parameters
704 healthMonitorMsg MSG pointer.
705 will have low resource TX channel context
706
707 @ Return
708 NONE
709
710===========================================================================*/
711void dxeRXHealthMonitor
712(
713 wpt_msg *healthMonitorMsg
714)
715{
716 WLANDXE_ChannelCBType *channelCtrlBlk;
717 WLANDXE_ChannelCBType *testCHCtrlBlk;
718 wpt_uint32 regValue;
719 wpt_uint32 chStatusReg, chControlReg, chDescReg, chLDescReg;
720 wpt_uint32 hwWakeLoop, chLoop;
721
722 if(NULL == healthMonitorMsg)
723 {
724 return;
725 }
726
727 /* Make wake up HW */
728 dxeNotifySmsm(eWLAN_PAL_FALSE, eWLAN_PAL_TRUE);
729 dxeNotifySmsm(eWLAN_PAL_TRUE, eWLAN_PAL_FALSE);
Leo Chang5edb2d32013-04-03 13:32:58 -0700730 dxeNotifySmsm(eWLAN_PAL_FALSE, eWLAN_PAL_TRUE);
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -0700731
732 for(hwWakeLoop = 0; hwWakeLoop < T_WLANDXE_MAX_HW_ACCESS_WAIT; hwWakeLoop++)
733 {
734 wpalReadRegister(WLANDXE_BMU_AVAILABLE_BD_PDU, &regValue);
735 if(0 != regValue)
736 {
737 break;
738 }
739 }
740
741 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
742 "Scheduled RX, num free BD/PDU %d, loop Count %d",
Jeff Johnson9e237fb2013-10-30 18:46:20 -0700743 regValue, hwWakeLoop);
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -0700744
745 for(chLoop = WDTS_CHANNEL_RX_LOW_PRI; chLoop < WDTS_CHANNEL_MAX; chLoop++)
746 {
Mihir Shetee6618162015-03-16 14:48:42 +0530747 if (!WLANDXE_IS_VALID_CHANNEL(chLoop))
748 continue;
749
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -0700750 testCHCtrlBlk = &tempDxeCtrlBlk->dxeChannel[chLoop];
751 wpalReadRegister(testCHCtrlBlk->channelRegister.chDXECtrlRegAddr, &chControlReg);
752 wpalReadRegister(testCHCtrlBlk->channelRegister.chDXEStatusRegAddr, &chStatusReg);
753 wpalReadRegister(testCHCtrlBlk->channelRegister.chDXEDesclRegAddr, &chDescReg);
754 wpalReadRegister(testCHCtrlBlk->channelRegister.chDXELstDesclRegAddr, &chLDescReg);
755
756 wpalTrace(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO,
757 "%11s : CCR 0x%x, CSR 0x%x, CDR 0x%x, CLDR 0x%x, HCBO %d, HCBDP 0x%x, HCBDC 0x%x, TCBO %d,TCBDP 0x%x, TCBDC 0x%x",
758 channelType[chLoop],
759 chControlReg, chStatusReg, chDescReg, chLDescReg,
760 testCHCtrlBlk->headCtrlBlk->ctrlBlkOrder, testCHCtrlBlk->headCtrlBlk->linkedDescPhyAddr,
761 testCHCtrlBlk->headCtrlBlk->linkedDesc->descCtrl.ctrl,
762 testCHCtrlBlk->tailCtrlBlk->ctrlBlkOrder, testCHCtrlBlk->tailCtrlBlk->linkedDescPhyAddr,
763 testCHCtrlBlk->tailCtrlBlk->linkedDesc->descCtrl.ctrl);
764
765 if((chControlReg & WLANDXE_DESC_CTRL_VALID) &&
766 (chLDescReg != testCHCtrlBlk->headCtrlBlk->linkedDescPhyAddr))
767 {
768 wpalTrace(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
769 "%11s : CCR 0x%x, CSR 0x%x, CDR 0x%x, CLDR 0x%x, "
770 "HCBO %d, HCBDP 0x%x, HCBDC 0x%x, TCBO %d,TCBDP 0x%x, TCBDC 0x%x",
771 channelType[chLoop],
772 chControlReg, chStatusReg, chDescReg, chLDescReg,
773 testCHCtrlBlk->headCtrlBlk->ctrlBlkOrder, testCHCtrlBlk->headCtrlBlk->linkedDescPhyAddr,
774 testCHCtrlBlk->headCtrlBlk->linkedDesc->descCtrl.ctrl,
775 testCHCtrlBlk->tailCtrlBlk->ctrlBlkOrder, testCHCtrlBlk->tailCtrlBlk->linkedDescPhyAddr,
776 testCHCtrlBlk->tailCtrlBlk->linkedDesc->descCtrl.ctrl);
777 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
Jeff Johnson9e237fb2013-10-30 18:46:20 -0700778 "%11s : RX CH EN Descriptor Async, resync it", channelType[chLoop]);
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -0700779 wpalWriteRegister(testCHCtrlBlk->channelRegister.chDXELstDesclRegAddr,
780 testCHCtrlBlk->headCtrlBlk->linkedDescPhyAddr);
781 }
782 else if(!(chControlReg & WLANDXE_DESC_CTRL_VALID) &&
783 (chDescReg != testCHCtrlBlk->headCtrlBlk->linkedDescPhyAddr))
784 {
785 wpalTrace(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
786 "%11s : CCR 0x%x, CSR 0x%x, CDR 0x%x, CLDR 0x%x, "
787 "HCBO %d, HCBDP 0x%x, HCBDC 0x%x, TCBO %d,TCBDP 0x%x, TCBDC 0x%x",
788 channelType[chLoop],
789 chControlReg, chStatusReg, chDescReg, chLDescReg,
790 testCHCtrlBlk->headCtrlBlk->ctrlBlkOrder, testCHCtrlBlk->headCtrlBlk->linkedDescPhyAddr,
791 testCHCtrlBlk->headCtrlBlk->linkedDesc->descCtrl.ctrl,
792 testCHCtrlBlk->tailCtrlBlk->ctrlBlkOrder, testCHCtrlBlk->tailCtrlBlk->linkedDescPhyAddr,
793 testCHCtrlBlk->tailCtrlBlk->linkedDesc->descCtrl.ctrl);
794 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
Jeff Johnson9e237fb2013-10-30 18:46:20 -0700795 "%11s : RX CH DIS Descriptor Async, resync it", channelType[chLoop]);
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -0700796 wpalWriteRegister(testCHCtrlBlk->channelRegister.chDXEDesclRegAddr,
797 testCHCtrlBlk->headCtrlBlk->linkedDescPhyAddr);
798 }
799 }
800
801 channelCtrlBlk = (WLANDXE_ChannelCBType *)healthMonitorMsg->pContext;
802 if(channelCtrlBlk->hitLowResource)
803 {
804 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
805 "%11s : Still Low Resource, kick DXE TX and restart timer",
Jeff Johnson9e237fb2013-10-30 18:46:20 -0700806 channelType[channelCtrlBlk->channelType]);
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -0700807 /* Still Low Resource, Kick DXE again and start timer again */
808 wpalTimerStart(&channelCtrlBlk->healthMonitorTimer,
809 T_WLANDXE_PERIODIC_HEALTH_M_TIME);
810 }
811 else
812 {
813 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
814 "%11s : Out from Low resource condition, do nothing",
Jeff Johnson9e237fb2013-10-30 18:46:20 -0700815 channelType[channelCtrlBlk->channelType]);
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -0700816 /* Recovered from low resource condition
817 * Not need to do anything */
818 }
819
820 return;
821}
822
823/*==========================================================================
824 @ Function Name
825 dxeTXHealthMonitor
826
827 @ Description
828 Monitoring TX channel healthy stataus
829 If detect any problem, try to recover
830
831 @ Parameters
832 healthMonitorMsg MSG pointer.
833 will have low resource TX channel context
834
835 @ Return
836 NONE
837
838===========================================================================*/
839void dxeTXHealthMonitor
840(
841 wpt_msg *healthMonitorMsg
842)
843{
844 WLANDXE_ChannelCBType *channelCtrlBlk;
845 WLANDXE_ChannelCBType *testCHCtrlBlk;
846 wpt_uint32 regValue;
847 wpt_uint32 chStatusReg, chControlReg, chDescReg, chLDescReg;
848 wpt_uint32 hwWakeLoop, chLoop;
849 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
850
851 if(NULL == healthMonitorMsg)
852 {
853 return;
854 }
855
856 /* First of all kick TX channel
857 * This will fix if there is any problem with SMSM state */
858 dxeNotifySmsm(eWLAN_PAL_FALSE, eWLAN_PAL_TRUE);
859 dxeNotifySmsm(eWLAN_PAL_TRUE, eWLAN_PAL_FALSE);
Leo Chang5edb2d32013-04-03 13:32:58 -0700860 dxeNotifySmsm(eWLAN_PAL_FALSE, eWLAN_PAL_TRUE);
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -0700861
862 /* Wait till RIVA up */
863 for(hwWakeLoop = 0; hwWakeLoop < T_WLANDXE_MAX_HW_ACCESS_WAIT; hwWakeLoop++)
864 {
865 wpalReadRegister(WLANDXE_BMU_AVAILABLE_BD_PDU, &regValue);
866 if(0 != regValue)
867 {
868 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
869 "num free BD/PDU %d, loop Count %d",
Jeff Johnson9e237fb2013-10-30 18:46:20 -0700870 regValue, hwWakeLoop);
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -0700871 break;
872 }
873 }
874
875 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
876 "Scheduled TX, num free BD/PDU %d, loop Count %d",
Jeff Johnson9e237fb2013-10-30 18:46:20 -0700877 regValue, hwWakeLoop);
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -0700878
879 for(chLoop = 0; chLoop < WDTS_CHANNEL_RX_LOW_PRI; chLoop++)
880 {
881 testCHCtrlBlk = &tempDxeCtrlBlk->dxeChannel[chLoop];
882 wpalReadRegister(testCHCtrlBlk->channelRegister.chDXECtrlRegAddr, &chControlReg);
883 wpalReadRegister(testCHCtrlBlk->channelRegister.chDXEStatusRegAddr, &chStatusReg);
884 wpalReadRegister(testCHCtrlBlk->channelRegister.chDXEDesclRegAddr, &chDescReg);
885 wpalReadRegister(testCHCtrlBlk->channelRegister.chDXELstDesclRegAddr, &chLDescReg);
886
887 wpalTrace(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO,
888 "%11s : CCR 0x%x, CSR 0x%x, CDR 0x%x, CLDR 0x%x, HCBO %d, HCBDP 0x%x, HCBDC 0x%x, TCBO %d,TCBDP 0x%x, TCBDC 0x%x",
889 channelType[chLoop],
890 chControlReg, chStatusReg, chDescReg, chLDescReg,
891 testCHCtrlBlk->headCtrlBlk->ctrlBlkOrder, testCHCtrlBlk->headCtrlBlk->linkedDescPhyAddr,
892 testCHCtrlBlk->headCtrlBlk->linkedDesc->descCtrl.ctrl,
893 testCHCtrlBlk->tailCtrlBlk->ctrlBlkOrder, testCHCtrlBlk->tailCtrlBlk->linkedDescPhyAddr,
894 testCHCtrlBlk->tailCtrlBlk->linkedDesc->descCtrl.ctrl);
895
896 if((chControlReg & WLANDXE_DESC_CTRL_VALID) &&
897 (chLDescReg != testCHCtrlBlk->tailCtrlBlk->linkedDescPhyAddr))
898 {
899 wpalTrace(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
900 "%11s : CCR 0x%x, CSR 0x%x, CDR 0x%x, CLDR 0x%x, "
901 "HCBO %d, HCBDP 0x%x, HCBDC 0x%x, TCBO %d,TCBDP 0x%x, TCBDC 0x%x",
902 channelType[chLoop],
903 chControlReg, chStatusReg, chDescReg, chLDescReg,
904 testCHCtrlBlk->headCtrlBlk->ctrlBlkOrder, testCHCtrlBlk->headCtrlBlk->linkedDescPhyAddr,
905 testCHCtrlBlk->headCtrlBlk->linkedDesc->descCtrl.ctrl,
906 testCHCtrlBlk->tailCtrlBlk->ctrlBlkOrder, testCHCtrlBlk->tailCtrlBlk->linkedDescPhyAddr,
907 testCHCtrlBlk->tailCtrlBlk->linkedDesc->descCtrl.ctrl);
908 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
Jeff Johnson9e237fb2013-10-30 18:46:20 -0700909 "%11s : TX CH EN Descriptor Async, resync it", channelType[chLoop]);
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -0700910 wpalWriteRegister(testCHCtrlBlk->channelRegister.chDXELstDesclRegAddr,
911 testCHCtrlBlk->tailCtrlBlk->linkedDescPhyAddr);
912 }
913 else if(!(chControlReg & WLANDXE_DESC_CTRL_VALID) &&
914 (chDescReg != testCHCtrlBlk->tailCtrlBlk->linkedDescPhyAddr))
915 {
916 wpalTrace(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
917 "%11s : CCR 0x%x, CSR 0x%x, CDR 0x%x, CLDR 0x%x, "
918 "HCBO %d, HCBDP 0x%x, HCBDC 0x%x, TCBO %d,TCBDP 0x%x, TCBDC 0x%x",
919 channelType[chLoop],
920 chControlReg, chStatusReg, chDescReg, chLDescReg,
921 testCHCtrlBlk->headCtrlBlk->ctrlBlkOrder, testCHCtrlBlk->headCtrlBlk->linkedDescPhyAddr,
922 testCHCtrlBlk->headCtrlBlk->linkedDesc->descCtrl.ctrl,
923 testCHCtrlBlk->tailCtrlBlk->ctrlBlkOrder, testCHCtrlBlk->tailCtrlBlk->linkedDescPhyAddr,
924 testCHCtrlBlk->tailCtrlBlk->linkedDesc->descCtrl.ctrl);
925 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
Jeff Johnson9e237fb2013-10-30 18:46:20 -0700926 "%11s : TX CH DIS Descriptor Async, resync it", channelType[chLoop]);
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -0700927 wpalWriteRegister(testCHCtrlBlk->channelRegister.chDXEDesclRegAddr,
928 testCHCtrlBlk->tailCtrlBlk->linkedDescPhyAddr);
929 }
930 }
931
932 /* TX channel test done, test RX channels */
933 channelCtrlBlk = (WLANDXE_ChannelCBType *)healthMonitorMsg->pContext;
934 channelCtrlBlk->healthMonitorMsg->callback = dxeRXHealthMonitor;
935 status = wpalPostRxMsg(WDI_GET_PAL_CTX(),
936 channelCtrlBlk->healthMonitorMsg);
937 if (eWLAN_PAL_STATUS_SUCCESS != status)
938 {
939 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
Jeff Johnson9e237fb2013-10-30 18:46:20 -0700940 "TX Low resource Kick DXE MSG Serialize fail status=%d",
941 status);
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -0700942 }
943
944 return;
945}
946
947/*==========================================================================
948 @ Function Name
949 dxeHealthMonitorTimeout
950
951 @ Description
952 Health Monitor timer started when TX channel low resource condition
953 And if reciovered from low resource condition, timer would not fired
954 Timer fired means during certain time, TX CH could not be recovered
955
956 @ Parameters
957 channelCtxt Low resource condition happen Channel context
958
959 @ Return
960 NONE
961
962===========================================================================*/
963void dxeHealthMonitorTimeout
964(
965 void *channelCtxt
966)
967{
968 WLANDXE_ChannelCBType *channelCtrlBlk;
969 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
970
971 if(NULL == channelCtxt)
972 {
973 return;
974 }
975
976 /* Timeout Fired, DXE TX should kick on TX thread
977 * Serailize to TX Thread */
978 channelCtrlBlk = (WLANDXE_ChannelCBType *)channelCtxt;
979 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO,
980 "%11s : Health Monitor timer expired",
Jeff Johnson9e237fb2013-10-30 18:46:20 -0700981 channelType[channelCtrlBlk->channelType]);
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -0700982
983 channelCtrlBlk->healthMonitorMsg->callback = dxeTXHealthMonitor;
984 status = wpalPostTxMsg(WDI_GET_PAL_CTX(),
985 channelCtrlBlk->healthMonitorMsg);
986 if (eWLAN_PAL_STATUS_SUCCESS != status)
987 {
988 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
Jeff Johnson9e237fb2013-10-30 18:46:20 -0700989 "TX Low resource Kick DXE MSG Serialize fail status=%d",
990 status);
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -0700991 }
992
993 return;
994}
995
996/*==========================================================================
997 @ Function Name
Jeff Johnson295189b2012-06-20 16:38:30 -0700998 dxeCtrlBlkAlloc
999
1000 @ Description
1001 Allocate DXE Control block
1002 DXE control block will used by Host DXE driver only, internal structure
1003 Will make ring linked list
1004
1005 @ Parameters
1006 WLANDXE_CtrlBlkType *dxeCtrlBlk,
1007 DXE host driver main control block
1008 WLANDXE_ChannelCBType *channelEntry
1009 Channel specific control block
1010
1011 @ Return
1012 wpt_status
1013
1014===========================================================================*/
1015static wpt_status dxeCtrlBlkAlloc
1016(
1017 WLANDXE_CtrlBlkType *dxeCtrlBlk,
1018 WLANDXE_ChannelCBType *channelEntry
1019)
1020{
1021 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
1022 unsigned int idx, fIdx;
1023 WLANDXE_DescCtrlBlkType *currentCtrlBlk = NULL;
1024 WLANDXE_DescCtrlBlkType *freeCtrlBlk = NULL;
1025 WLANDXE_DescCtrlBlkType *prevCtrlBlk = NULL;
1026 WLANDXE_DescCtrlBlkType *nextCtrlBlk = NULL;
1027
1028 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001029 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001030
1031 /* Sanity check */
1032 if((NULL == dxeCtrlBlk) || (NULL == channelEntry))
1033 {
1034 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1035 "dxeCtrlBlkAlloc Channel Entry is not valid");
1036 return eWLAN_PAL_STATUS_E_INVAL;
1037 }
1038
1039 /* Allocate pre asigned number of control blocks */
1040 for(idx = 0; idx < channelEntry->numDesc; idx++)
1041 {
1042 currentCtrlBlk = (WLANDXE_DescCtrlBlkType *)wpalMemoryAllocate(sizeof(WLANDXE_DescCtrlBlkType));
1043 if(NULL == currentCtrlBlk)
1044 {
1045 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1046 "dxeCtrlBlkOpen MemAlloc Fail for channel %d",
1047 channelEntry->channelType);
1048 freeCtrlBlk = channelEntry->headCtrlBlk;
1049 for(fIdx = 0; fIdx < idx; fIdx++)
1050 {
1051 if(NULL == freeCtrlBlk)
1052 {
1053 break;
1054 }
1055
1056 nextCtrlBlk = freeCtrlBlk->nextCtrlBlk;
1057 wpalMemoryFree((void *)freeCtrlBlk);
1058 freeCtrlBlk = nextCtrlBlk;
1059 }
1060 return eWLAN_PAL_STATUS_E_FAULT;
1061 }
1062
1063 memset((wpt_uint8 *)currentCtrlBlk, 0, sizeof(WLANDXE_DescCtrlBlkType));
1064 /* Initialize common elements first */
1065 currentCtrlBlk->xfrFrame = NULL;
1066 currentCtrlBlk->linkedDesc = NULL;
1067 currentCtrlBlk->linkedDescPhyAddr = 0;
1068 currentCtrlBlk->ctrlBlkOrder = idx;
1069
1070 /* This is the first control block allocated
1071 * Next Control block is not allocated yet
1072 * head and tail must be first control block */
1073 if(0 == idx)
1074 {
1075 currentCtrlBlk->nextCtrlBlk = NULL;
1076 channelEntry->headCtrlBlk = currentCtrlBlk;
1077 channelEntry->tailCtrlBlk = currentCtrlBlk;
1078 }
1079 /* This is not first, not last control block
1080 * previous control block may has next linked block */
1081 else if((0 < idx) && (idx < (channelEntry->numDesc - 1)))
1082 {
1083 prevCtrlBlk->nextCtrlBlk = currentCtrlBlk;
1084 }
1085 /* This is last control blocl
1086 * next control block for the last control block is head, first control block
1087 * then whole linked list made RING */
1088 else if((channelEntry->numDesc - 1) == idx)
1089 {
1090 prevCtrlBlk->nextCtrlBlk = currentCtrlBlk;
1091 currentCtrlBlk->nextCtrlBlk = channelEntry->headCtrlBlk;
1092 }
1093 else
1094 {
1095 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1096 "dxeCtrlBlkOpen Invalid Ctrl Blk location %d",
1097 channelEntry->channelType);
1098 wpalMemoryFree(currentCtrlBlk);
1099 return eWLAN_PAL_STATUS_E_FAULT;
1100 }
1101
1102 prevCtrlBlk = currentCtrlBlk;
1103 channelEntry->numFreeDesc++;
1104 }
1105
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001106 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,"%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001107 return status;
1108}
1109
1110/*==========================================================================
1111 @ Function Name
1112 dxeDescLinkAlloc
1113
1114 @ Description
1115 Allocate DXE descriptor
1116 DXE descriptor will be shared by DXE host driver and RIVA DXE engine
1117 Will make RING linked list
1118 Will be linked with Descriptor control block one by one
1119
1120 @ Parameters
1121 WLANDXE_CtrlBlkType *dxeCtrlBlk,
1122 DXE host driver main control block
1123 WLANDXE_ChannelCBType *channelEntry
1124 Channel specific control block
1125 @ Return
1126 wpt_status
1127
1128===========================================================================*/
1129static wpt_status dxeDescAllocAndLink
1130(
1131 WLANDXE_CtrlBlkType *dxeCtrlBlk,
1132 WLANDXE_ChannelCBType *channelEntry
1133)
1134{
1135 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
1136 WLANDXE_DescType *currentDesc = NULL;
1137 WLANDXE_DescType *prevDesc = NULL;
1138 WLANDXE_DescCtrlBlkType *currentCtrlBlk = NULL;
1139 unsigned int idx;
Arun Kumar Khandavalli6119f7d2013-12-18 00:16:17 +05301140 void *physAddressAlloc = NULL;
1141 wpt_uint32 physAddress;
Jeff Johnson295189b2012-06-20 16:38:30 -07001142
1143 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001144 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001145
1146 /* Sanity Check */
1147 if((NULL == dxeCtrlBlk) || (NULL == channelEntry))
1148 {
1149 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1150 "dxeDescLinkAlloc Channel Entry is not valid");
1151 return eWLAN_PAL_STATUS_E_INVAL;
1152 }
1153
1154 currentCtrlBlk = channelEntry->headCtrlBlk;
1155
Jeff Johnson295189b2012-06-20 16:38:30 -07001156 /* allocate all DXE descriptors for this channel in one chunk */
1157 channelEntry->descriptorAllocation = (WLANDXE_DescType *)
1158 wpalDmaMemoryAllocate(sizeof(WLANDXE_DescType)*channelEntry->numDesc,
Arun Kumar Khandavalli6119f7d2013-12-18 00:16:17 +05301159 &physAddressAlloc);
1160 physAddress = (wpt_uint32) (uintptr_t)(physAddressAlloc);
Jeff Johnson295189b2012-06-20 16:38:30 -07001161 if(NULL == channelEntry->descriptorAllocation)
1162 {
1163 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1164 "dxeDescLinkAlloc Descriptor Alloc Fail");
1165 return eWLAN_PAL_STATUS_E_RESOURCES;
1166 }
1167 currentDesc = channelEntry->descriptorAllocation;
Jeff Johnson295189b2012-06-20 16:38:30 -07001168
1169 /* Allocate pre asigned number of descriptor */
1170 for(idx = 0; idx < channelEntry->numDesc; idx++)
1171 {
Jeff Johnson295189b2012-06-20 16:38:30 -07001172 // descriptors were allocated in a chunk -- use the current one
Jeff Johnson295189b2012-06-20 16:38:30 -07001173 if(NULL == currentDesc)
1174 {
1175 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1176 "dxeDescLinkAlloc MemAlloc Fail for channel %d",
1177 channelEntry->channelType);
1178 return eWLAN_PAL_STATUS_E_FAULT;
1179 }
Mihir Shete96cd1902015-03-04 15:47:31 +05301180 memset((wpt_uint8 *)currentDesc, 0, sizeof(WLANDXE_DescType));
1181 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
1182 "Allocated Descriptor VA %p, PA %p", currentDesc, physAddressAlloc);
Jeff Johnson295189b2012-06-20 16:38:30 -07001183
Jeff Johnson295189b2012-06-20 16:38:30 -07001184 currentCtrlBlk->linkedDesc = currentDesc;
Arun Kumar Khandavalli6119f7d2013-12-18 00:16:17 +05301185 currentCtrlBlk->linkedDescPhyAddr = physAddress;
Jeff Johnson295189b2012-06-20 16:38:30 -07001186 /* First descriptor, next none
1187 * descriptor bottom location is first descriptor address */
1188 if(0 == idx)
1189 {
1190 currentDesc->dxedesc.dxe_short_desc.phyNextL = 0;
1191 channelEntry->DescBottomLoc = currentDesc;
Arun Kumar Khandavalli6119f7d2013-12-18 00:16:17 +05301192 channelEntry->descBottomLocPhyAddr = physAddress;
Jeff Johnson295189b2012-06-20 16:38:30 -07001193 }
1194 /* Not first, not last descriptor
1195 * may make link for previous descriptor with current descriptor
1196 * ENDIAN SWAP needed ????? */
1197 else if((0 < idx) && (idx < (channelEntry->numDesc - 1)))
1198 {
1199 prevDesc->dxedesc.dxe_short_desc.phyNextL =
Arun Kumar Khandavalli6119f7d2013-12-18 00:16:17 +05301200 WLANDXE_U32_SWAP_ENDIAN(physAddress);
Jeff Johnson295189b2012-06-20 16:38:30 -07001201 }
1202 /* Last descriptor
1203 * make a ring by asign next pointer as first descriptor
1204 * ENDIAN SWAP NEEDED ??? */
1205 else if((channelEntry->numDesc - 1) == idx)
1206 {
1207 prevDesc->dxedesc.dxe_short_desc.phyNextL =
Arun Kumar Khandavalli6119f7d2013-12-18 00:16:17 +05301208 WLANDXE_U32_SWAP_ENDIAN(physAddress);
Jeff Johnson295189b2012-06-20 16:38:30 -07001209 currentDesc->dxedesc.dxe_short_desc.phyNextL =
Arun Kumar Khandavalli6119f7d2013-12-18 00:16:17 +05301210 WLANDXE_U32_SWAP_ENDIAN(channelEntry->headCtrlBlk->linkedDescPhyAddr);
Jeff Johnson295189b2012-06-20 16:38:30 -07001211 }
1212
1213 /* If Current Channel is RX channel PAL Packet and OS packet buffer should be
1214 * Pre allocated and physical address must be assigned into
1215 * Corresponding DXE Descriptor */
Jeff Johnson295189b2012-06-20 16:38:30 -07001216 if((WDTS_CHANNEL_RX_LOW_PRI == channelEntry->channelType) ||
Mihir Shetee6618162015-03-16 14:48:42 +05301217 (WDTS_CHANNEL_RX_HIGH_PRI == channelEntry->channelType) ||
1218 (WDTS_CHANNEL_RX_LOG == channelEntry->channelType))
Jeff Johnson295189b2012-06-20 16:38:30 -07001219 {
1220 status = dxeRXFrameSingleBufferAlloc(dxeCtrlBlk,
1221 channelEntry,
1222 currentCtrlBlk);
1223 if( !WLAN_PAL_IS_STATUS_SUCCESS(status) )
1224 {
1225 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1226 "dxeDescLinkAlloc RX Buffer Alloc Fail for channel %d",
1227 channelEntry->channelType);
1228 return status;
1229 }
1230 --channelEntry->numFreeDesc;
1231 }
1232
Leo Chang7e05f212013-07-01 19:54:15 -07001233 if((WDTS_CHANNEL_TX_LOW_PRI == channelEntry->channelType) ||
1234 (WDTS_CHANNEL_TX_HIGH_PRI == channelEntry->channelType))
1235 {
1236 currentDesc->descCtrl.ctrl = channelEntry->extraConfig.cw_ctrl_write;
1237 currentDesc->dxedesc.dxe_short_desc.dstMemAddrL = channelEntry->extraConfig.refWQ_swapped;
1238 }
1239 else if((WDTS_CHANNEL_RX_LOW_PRI == channelEntry->channelType) ||
Mihir Shetee6618162015-03-16 14:48:42 +05301240 (WDTS_CHANNEL_RX_HIGH_PRI == channelEntry->channelType)||
1241 (WDTS_CHANNEL_RX_LOG == channelEntry->channelType))
Leo Chang7e05f212013-07-01 19:54:15 -07001242 {
1243 currentDesc->descCtrl.ctrl = channelEntry->extraConfig.cw_ctrl_read;
1244 currentDesc->dxedesc.dxe_short_desc.srcMemAddrL = channelEntry->extraConfig.refWQ_swapped;
1245 }
1246 else
1247 {
1248 /* Just in case. H2H Test RX channel, do nothing
1249 * By Definition this must not happen */
1250 }
1251
Jeff Johnson295189b2012-06-20 16:38:30 -07001252 currentCtrlBlk = currentCtrlBlk->nextCtrlBlk;
1253 prevDesc = currentDesc;
1254
Jeff Johnson295189b2012-06-20 16:38:30 -07001255 // advance to the next pre-allocated descriptor in the chunk
1256 currentDesc++;
Arun Kumar Khandavalli6119f7d2013-12-18 00:16:17 +05301257 physAddress = (physAddress + sizeof(WLANDXE_DescType));
Jeff Johnson295189b2012-06-20 16:38:30 -07001258 }
1259
1260 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001261 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001262 return status;
1263}
1264
1265/*==========================================================================
1266 @ Function Name
1267
1268 @ Description
1269
1270 @ Parameters
1271
1272 @ Return
1273 wpt_status
1274
1275===========================================================================*/
1276static wpt_status dxeSetInterruptPath
1277(
1278 WLANDXE_CtrlBlkType *dxeCtrlBlk
1279)
1280{
1281 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
1282 wpt_uint32 interruptPath = 0;
1283 wpt_uint32 idx;
1284 WLANDXE_ChannelCBType *channelEntry = NULL;
1285
1286 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001287 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001288
Mihir Shetee6618162015-03-16 14:48:42 +05301289 foreach_valid_channel(idx)
Jeff Johnson295189b2012-06-20 16:38:30 -07001290 {
1291 channelEntry = &dxeCtrlBlk->dxeChannel[idx];
Jeff Johnson295189b2012-06-20 16:38:30 -07001292 if((WDTS_CHANNEL_TX_LOW_PRI == channelEntry->channelType) ||
1293 (WDTS_CHANNEL_TX_HIGH_PRI == channelEntry->channelType))
Jeff Johnson295189b2012-06-20 16:38:30 -07001294 {
1295 interruptPath |= (1 << channelEntry->assignedDMAChannel);
1296 }
1297 else if((WDTS_CHANNEL_RX_LOW_PRI == channelEntry->channelType) ||
Mihir Shetee6618162015-03-16 14:48:42 +05301298 (WDTS_CHANNEL_RX_HIGH_PRI == channelEntry->channelType)||
1299 (WDTS_CHANNEL_RX_LOG == channelEntry->channelType))
Jeff Johnson295189b2012-06-20 16:38:30 -07001300 {
1301 interruptPath |= (1 << (channelEntry->assignedDMAChannel + 16));
1302 }
1303 else
1304 {
1305 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1306 "H2H TEST RX???? %d", channelEntry->channelType);
1307 }
1308 }
1309 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
1310 "Interrupt Path Must be 0x%x", interruptPath);
1311 dxeCtrlBlk->interruptPath = interruptPath;
1312 wpalWriteRegister(WLANDXE_CCU_DXE_INT_SELECT, interruptPath);
1313
1314 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001315 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001316 return status;
1317}
1318
1319/*==========================================================================
1320 @ Function Name
1321 dxeEngineCoreStart
1322
1323 @ Description
1324 Trigger to start RIVA DXE Hardware
1325
1326 @ Parameters
1327 WLANDXE_CtrlBlkType *dxeCtrlBlk,
1328 DXE host driver main control block
1329
1330 @ Return
1331 wpt_status
1332
1333===========================================================================*/
1334static wpt_status dxeEngineCoreStart
1335(
1336 WLANDXE_CtrlBlkType *dxeCtrlBlk
1337)
1338{
1339 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
1340 wpt_uint32 registerData = 0;
Leo Chang00708f62013-12-03 20:21:51 -08001341 wpt_uint8 readRetry;
Jeff Johnson295189b2012-06-20 16:38:30 -07001342
1343 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001344 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001345
Leo Chang00708f62013-12-03 20:21:51 -08001346#ifdef WCN_PRONTO
1347 /* Read default */
1348 wpalReadRegister(WLANDXE_CCU_SOFT_RESET, &registerData);
1349 registerData |= WLANDXE_DMA_CCU_DXE_RESET_MASK;
1350
1351 /* Make reset */
1352 wpalWriteRegister(WLANDXE_CCU_SOFT_RESET, registerData);
1353
1354 /* Clear reset */
1355 registerData &= ~WLANDXE_DMA_CCU_DXE_RESET_MASK;
1356 wpalWriteRegister(WLANDXE_CCU_SOFT_RESET, registerData);
1357#else
Jeff Johnson295189b2012-06-20 16:38:30 -07001358 /* START This core init is not needed for the integrated system */
1359 /* Reset First */
1360 registerData = WLANDXE_DMA_CSR_RESET_MASK;
1361 wpalWriteRegister(WALNDEX_DMA_CSR_ADDRESS,
1362 registerData);
Leo Chang00708f62013-12-03 20:21:51 -08001363#endif /* WCN_PRONTO */
Jeff Johnson295189b2012-06-20 16:38:30 -07001364
Leo Chang00708f62013-12-03 20:21:51 -08001365 for(readRetry = 0; readRetry < WLANDXE_CSR_MAX_READ_COUNT; readRetry++)
1366 {
1367 wpalWriteRegister(WALNDEX_DMA_CSR_ADDRESS,
1368 WLANDXE_CSR_DEFAULT_ENABLE);
1369 wpalReadRegister(WALNDEX_DMA_CSR_ADDRESS, &registerData);
1370 if(!(registerData & WLANDXE_DMA_CSR_EN_MASK))
1371 {
1372 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1373 "%s CSR 0x%x, count %d",
1374 __func__, registerData, readRetry);
1375 /* CSR is not valid value, re-try to write */
1376 wpalBusyWait(WLANDXE_CSR_NEXT_READ_WAIT);
1377 }
1378 else
1379 {
1380 break;
1381 }
1382 }
1383 if(WLANDXE_CSR_MAX_READ_COUNT == readRetry)
1384 {
1385 /* MAX wait, still cannot write correct value
1386 * Panic device */
1387 wpalDevicePanic();
1388 }
Jeff Johnson295189b2012-06-20 16:38:30 -07001389
1390 /* Is This needed?
1391 * Not sure, revisit with integrated system */
1392 /* END This core init is not needed for the integrated system */
1393
1394 dxeSetInterruptPath(dxeCtrlBlk);
1395 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001396 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001397 return status;
1398}
1399
1400/*==========================================================================
1401 @ Function Name
1402 dxeChannelInitProgram
1403
1404 @ Description
1405 Program RIVA DXE engine register with initial value
1406 What must be programmed
1407 - Source Address (SADRL, chDXESadrlRegAddr)
1408 - Destination address (DADRL, chDXEDadrlRegAddr)
1409 - Next Descriptor address (DESCL, chDXEDesclRegAddr)
1410 - current descriptor address (LST_DESCL, chDXELstDesclRegAddr)
1411
1412 Not need to program now
1413 - Channel Control register (CH_CTRL, chDXECtrlRegAddr)
1414 TX : Have to program to trigger send out frame
1415 RX : programmed by DXE engine
1416
1417 @ Parameters
1418 WLANDXE_CtrlBlkType *dxeCtrlBlk,
1419 DXE host driver main control block
1420 WLANDXE_ChannelCBType *channelEntry
1421 Channel specific control block
1422 @ Return
1423 wpt_status
1424
1425===========================================================================*/
1426static wpt_status dxeChannelInitProgram
1427(
1428 WLANDXE_CtrlBlkType *dxeCtrlBlk,
1429 WLANDXE_ChannelCBType *channelEntry
1430)
1431{
1432 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
1433 wpt_uint32 idx;
1434 WLANDXE_DescType *currentDesc = NULL;
1435 WLANDXE_DescCtrlBlkType *currentCtrlBlk = NULL;
1436
1437 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001438 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001439
1440 /* Sanity Check */
1441 if((NULL == dxeCtrlBlk) || (NULL == channelEntry))
1442 {
1443 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1444 "dxeChannelInitProgram Channel Entry is not valid");
1445 return eWLAN_PAL_STATUS_E_INVAL;
1446 }
1447
1448 /* Program Source address and destination adderss */
1449 if(!channelEntry->channelConfig.useShortDescFmt)
1450 {
1451 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1452 "dxeChannelInitProgram Long Descriptor not support yet");
1453 return eWLAN_PAL_STATUS_E_FAILURE;
1454 }
1455
1456 /* Common register area */
1457 /* Next linked list Descriptor pointer */
1458 status = wpalWriteRegister(channelEntry->channelRegister.chDXEDesclRegAddr,
1459 channelEntry->headCtrlBlk->linkedDescPhyAddr);
1460 if(eWLAN_PAL_STATUS_SUCCESS != status)
1461 {
1462 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1463 "dxeChannelInitProgram Write DESC Address register fail");
1464 return status;
1465 }
1466
1467 if((WDTS_CHANNEL_TX_LOW_PRI == channelEntry->channelType) ||
1468 (WDTS_CHANNEL_TX_HIGH_PRI == channelEntry->channelType))
1469 {
1470 /* Program default registers */
1471 /* TX DMA channel, DMA destination address is work Q */
1472 status = wpalWriteRegister(channelEntry->channelRegister.chDXEDadrlRegAddr,
1473 channelEntry->channelConfig.refWQ);
1474 if(eWLAN_PAL_STATUS_SUCCESS != status)
1475 {
1476 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1477 "dxeChannelInitProgram Write TX DAddress register fail");
1478 return status;
1479 }
1480 }
1481 else if((WDTS_CHANNEL_RX_LOW_PRI == channelEntry->channelType) ||
Mihir Shetee6618162015-03-16 14:48:42 +05301482 (WDTS_CHANNEL_RX_HIGH_PRI == channelEntry->channelType) ||
1483 (WDTS_CHANNEL_RX_LOG == channelEntry->channelType))
Jeff Johnson295189b2012-06-20 16:38:30 -07001484 {
1485 /* Initialize Descriptor control Word First */
1486 currentCtrlBlk = channelEntry->headCtrlBlk;
1487 for(idx = 0; idx < channelEntry->channelConfig.nDescs; idx++)
1488 {
1489 currentDesc = currentCtrlBlk->linkedDesc;
1490 currentCtrlBlk = currentCtrlBlk->nextCtrlBlk;
1491 }
1492
1493 /* RX DMA channel, DMA source address is work Q */
1494 status = wpalWriteRegister(channelEntry->channelRegister.chDXESadrlRegAddr,
1495 channelEntry->channelConfig.refWQ);
1496 if(eWLAN_PAL_STATUS_SUCCESS != status)
1497 {
1498 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1499 "dxeChannelInitProgram Write RX SAddress WQ register fail");
1500 return status;
1501 }
1502
1503 /* RX DMA channel, Program pre allocated destination Address */
1504 status = wpalWriteRegister(channelEntry->channelRegister.chDXEDadrlRegAddr,
1505 WLANDXE_U32_SWAP_ENDIAN(channelEntry->DescBottomLoc->dxedesc.dxe_short_desc.phyNextL));
1506 if(eWLAN_PAL_STATUS_SUCCESS != status)
1507 {
1508 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1509 "dxeChannelInitProgram Write RX DAddress register fail");
1510 return status;
1511 }
1512
1513 /* RX Channels, default Control registers MUST BE ENABLED */
1514 wpalWriteRegister(channelEntry->channelRegister.chDXECtrlRegAddr,
1515 channelEntry->extraConfig.chan_mask);
1516 if(eWLAN_PAL_STATUS_SUCCESS != status)
1517 {
1518 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1519 "dxeChannelInitProgram Write RX Control register fail");
1520 return status;
1521 }
1522 }
1523 else
1524 {
1525 /* H2H test channel, not use work Q */
1526 /* Program pre allocated destination Address */
1527 status = wpalWriteRegister(channelEntry->channelRegister.chDXEDadrlRegAddr,
1528 WLANDXE_U32_SWAP_ENDIAN(channelEntry->DescBottomLoc->dxedesc.dxe_short_desc.phyNextL));
1529 if(eWLAN_PAL_STATUS_SUCCESS != status)
1530 {
1531 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1532 "dxeChannelInitProgram Write RX DAddress register fail");
1533 return status;
1534 }
1535 }
1536
1537 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001538 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001539 return status;
1540}
1541
1542
1543/*==========================================================================
1544 @ Function Name
1545 dxeChannelStart
1546
1547 @ Description
1548 Start Specific Channel
1549
1550 @ Parameters
1551 WLANDXE_CtrlBlkType *dxeCtrlBlk,
1552 DXE host driver main control block
1553 WLANDXE_ChannelCBType *channelEntry
1554 Channel specific control block
1555
1556 @ Return
1557 wpt_status
1558
1559===========================================================================*/
1560static wpt_status dxeChannelStart
1561(
1562 WLANDXE_CtrlBlkType *dxeCtrlBlk,
1563 WLANDXE_ChannelCBType *channelEntry
1564)
1565{
1566 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
1567 wpt_uint32 regValue = 0;
1568 wpt_uint32 intMaskVal = 0;
1569
1570 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001571 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001572
1573 channelEntry->extraConfig.chEnabled = eWLAN_PAL_TRUE;
1574 channelEntry->extraConfig.chConfigured = eWLAN_PAL_TRUE;
1575
1576 /* Enable individual channel
1577 * not to break current channel setup, first read register */
1578 status = wpalReadRegister(WALNDEX_DMA_CH_EN_ADDRESS,
1579 &regValue);
1580 if(eWLAN_PAL_STATUS_SUCCESS != status)
1581 {
1582 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1583 "dxeChannelStart Read Channel Enable register fail");
1584 return status;
1585 }
1586
1587 /* Enable Channel specific Interrupt */
1588 status = wpalReadRegister(WLANDXE_INT_MASK_REG_ADDRESS,
1589 &intMaskVal);
1590 if(eWLAN_PAL_STATUS_SUCCESS != status)
1591 {
1592 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1593 "dxeChannelStart Read INT_MASK register fail");
1594 return status;
1595 }
1596 intMaskVal |= channelEntry->extraConfig.intMask;
1597 status = wpalWriteRegister(WLANDXE_INT_MASK_REG_ADDRESS,
1598 intMaskVal);
1599 if(eWLAN_PAL_STATUS_SUCCESS != status)
1600 {
1601 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1602 "dxeChannelStart Write INT_MASK register fail");
1603 return status;
1604 }
1605
1606 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001607 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001608 return status;
1609}
1610
1611/*==========================================================================
1612 @ Function Name
1613 dxeChannelStop
1614
1615 @ Description
1616 Stop Specific Channel
1617
1618 @ Parameters
1619 WLANDXE_CtrlBlkType *dxeCtrlBlk,
1620 DXE host driver main control block
1621 WLANDXE_ChannelCBType *channelEntry
1622 Channel specific control block
1623
1624 @ Return
1625 wpt_status
1626
1627===========================================================================*/
1628static wpt_status dxeChannelStop
1629(
1630 WLANDXE_CtrlBlkType *dxeCtrlBlk,
1631 WLANDXE_ChannelCBType *channelEntry
1632)
1633{
1634 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
1635 wpt_uint32 intMaskVal = 0;
1636
1637 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001638 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001639
1640 /* Sanity */
1641 if((NULL == dxeCtrlBlk) || (NULL == channelEntry))
1642 {
1643 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1644 "dxeChannelStop Invalid arg input");
1645 return eWLAN_PAL_STATUS_E_INVAL;
1646 }
1647
Madan Mohan Koyyalamudid57ae632012-11-06 18:42:48 -08001648 if ( (channelEntry->extraConfig.chEnabled != eWLAN_PAL_TRUE) ||
1649 (channelEntry->extraConfig.chConfigured != eWLAN_PAL_TRUE))
1650 {
1651 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1652 "dxeChannelStop channels are not enabled ");
Madan Mohan Koyyalamudib2cb8be2012-11-27 15:07:43 -08001653 return status;
Madan Mohan Koyyalamudid57ae632012-11-06 18:42:48 -08001654 }
Jeff Johnson295189b2012-06-20 16:38:30 -07001655 /* Maskout interrupt */
1656 status = wpalReadRegister(WLANDXE_INT_MASK_REG_ADDRESS,
1657 &intMaskVal);
1658 if(eWLAN_PAL_STATUS_SUCCESS != status)
1659 {
1660 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1661 "dxeChannelStop Read INT_MASK register fail");
1662 return status;
1663 }
1664 intMaskVal ^= channelEntry->extraConfig.intMask;
1665 status = wpalWriteRegister(WLANDXE_INT_MASK_REG_ADDRESS,
1666 intMaskVal);
1667 if(eWLAN_PAL_STATUS_SUCCESS != status)
1668 {
1669 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1670 "dxeChannelStop Write INT_MASK register fail");
1671 return status;
1672 }
1673
1674 channelEntry->extraConfig.chEnabled = eWLAN_PAL_FALSE;
1675
1676 /* Stop Channel ??? */
1677 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001678 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001679 return status;
1680}
1681
1682/*==========================================================================
1683 @ Function Name
1684 dxeChannelClose
1685
1686 @ Description
1687 Close Specific Channel
1688 Free pre allocated RX frame buffer if RX channel
1689 Free DXE descriptor for each channel
1690 Free Descriptor control block for each channel
1691
1692 @ Parameters
1693 WLANDXE_CtrlBlkType *dxeCtrlBlk,
1694 DXE host driver main control block
1695 WLANDXE_ChannelCBType *channelEntry
1696 Channel specific control block
1697
1698 @ Return
1699 wpt_status
1700
1701===========================================================================*/
1702static wpt_status dxeChannelClose
1703(
1704 WLANDXE_CtrlBlkType *dxeCtrlBlk,
1705 WLANDXE_ChannelCBType *channelEntry
1706)
1707{
1708 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
1709 wpt_uint32 idx;
1710 WLANDXE_DescCtrlBlkType *currentCtrlBlk = NULL;
1711 WLANDXE_DescCtrlBlkType *nextCtrlBlk = NULL;
1712 WLANDXE_DescType *currentDescriptor = NULL;
1713 WLANDXE_DescType *nextDescriptor = NULL;
1714
1715 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001716 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001717
1718 /* Sanity */
1719 if((NULL == dxeCtrlBlk) || (NULL == channelEntry))
1720 {
1721 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1722 "dxeChannelStop Invalid arg input");
1723 return eWLAN_PAL_STATUS_E_INVAL;
1724 }
1725
1726 currentCtrlBlk = channelEntry->headCtrlBlk;
1727 if(NULL != currentCtrlBlk)
1728 {
1729 currentDescriptor = currentCtrlBlk->linkedDesc;
1730 for(idx = 0; idx < channelEntry->numDesc; idx++)
1731 {
1732 if (idx + 1 != channelEntry->numDesc)
1733 {
1734 nextCtrlBlk = currentCtrlBlk->nextCtrlBlk;
1735 nextDescriptor = nextCtrlBlk->linkedDesc;
1736 }
1737 else
1738 {
1739 nextCtrlBlk = NULL;
1740 nextDescriptor = NULL;
1741 }
1742 if((WDTS_CHANNEL_RX_LOW_PRI == channelEntry->channelType) ||
Mihir Shetee6618162015-03-16 14:48:42 +05301743 (WDTS_CHANNEL_RX_HIGH_PRI == channelEntry->channelType) ||
1744 (WDTS_CHANNEL_RX_LOG == channelEntry->channelType))
Jeff Johnson295189b2012-06-20 16:38:30 -07001745 {
1746 if (NULL != currentCtrlBlk->xfrFrame)
1747 {
1748 wpalUnlockPacket(currentCtrlBlk->xfrFrame);
1749 wpalPacketFree(currentCtrlBlk->xfrFrame);
1750 }
1751 }
1752 /*
1753 * It is the responsibility of DXE to walk through the
1754 * descriptor chain and unlock any pending packets (if
1755 * locked).
1756 */
1757 if((WDTS_CHANNEL_TX_LOW_PRI == channelEntry->channelType) ||
1758 (WDTS_CHANNEL_TX_HIGH_PRI == channelEntry->channelType))
1759 {
1760 if((NULL != currentCtrlBlk->xfrFrame) &&
1761 (eWLAN_PAL_STATUS_SUCCESS == wpalIsPacketLocked(currentCtrlBlk->xfrFrame)))
1762 {
1763 wpalUnlockPacket(currentCtrlBlk->xfrFrame);
1764 wpalPacketFree(currentCtrlBlk->xfrFrame);
1765 }
1766 }
Jeff Johnson295189b2012-06-20 16:38:30 -07001767 wpalMemoryFree(currentCtrlBlk);
1768
1769 currentCtrlBlk = nextCtrlBlk;
1770 currentDescriptor = nextDescriptor;
Madan Mohan Koyyalamudi74719a12012-10-21 12:09:36 -07001771 if(NULL == currentCtrlBlk)
1772 {
1773 /* Already reach last of the control block
1774 * Not need to process anymore, break */
1775 break;
1776 }
Jeff Johnson295189b2012-06-20 16:38:30 -07001777 }
1778 }
1779
Jeff Johnson295189b2012-06-20 16:38:30 -07001780 // descriptors were allocated as a single chunk so free the chunk
1781 if(NULL != channelEntry->descriptorAllocation)
1782 {
1783 wpalDmaMemoryFree(channelEntry->descriptorAllocation);
1784 }
Jeff Johnson295189b2012-06-20 16:38:30 -07001785
1786 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001787 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001788 return status;
1789}
1790
1791/*==========================================================================
1792 @ Function Name
1793 dxeChannelCleanInt
1794
1795 @ Description
1796 Clean up interrupt from RIVA HW
1797 After Host finish to handle interrupt, interrupt signal must be cleaned up
1798 Otherwise next interrupt will not be generated
1799
1800 @ Parameters
1801 WLANDXE_ChannelCBType *channelEntry
1802 Channel specific control block
1803 wpt_uint32 *chStat
1804 Channel Status register value
1805
1806 @ Return
1807 wpt_status
1808
1809===========================================================================*/
1810static wpt_status dxeChannelCleanInt
1811(
1812 WLANDXE_ChannelCBType *channelEntry,
1813 wpt_uint32 *chStat
1814)
1815{
1816 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
1817
1818 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001819 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001820
1821 /* Read Channel Status Register to know why INT Happen */
1822 status = wpalReadRegister(channelEntry->channelRegister.chDXEStatusRegAddr,
1823 chStat);
1824 if(eWLAN_PAL_STATUS_SUCCESS != status)
1825 {
1826 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1827 "dxeChannelCleanInt Read CH STAT register fail");
1828 return eWLAN_PAL_STATUS_E_FAULT;
1829 }
1830 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
1831 "%s Channel INT Clean, Status 0x%x",
1832 channelType[channelEntry->channelType], *chStat);
1833
1834 /* Clean up all the INT within this channel */
1835 status = wpalWriteRegister(WLANDXE_INT_CLR_ADDRESS,
1836 (1 << channelEntry->assignedDMAChannel));
1837 if(eWLAN_PAL_STATUS_SUCCESS != status)
1838 {
1839 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1840 "dxeChannelCleanInt Write CH Clean register fail");
1841 return eWLAN_PAL_STATUS_E_FAULT;
1842 }
1843
Jeff Johnsone7245742012-09-05 17:12:55 -07001844 /* Clean up Error INT Bit */
1845 if(WLANDXE_CH_STAT_INT_ERR_MASK & *chStat)
1846 {
1847 status = wpalWriteRegister(WLANDXE_INT_ERR_CLR_ADDRESS,
1848 (1 << channelEntry->assignedDMAChannel));
1849 if(eWLAN_PAL_STATUS_SUCCESS != status)
1850 {
1851 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1852 "dxeChannelCleanInt Read CH STAT register fail");
1853 return eWLAN_PAL_STATUS_E_FAULT;
1854 }
1855 }
1856
1857 /* Clean up DONE INT Bit */
1858 if(WLANDXE_CH_STAT_INT_DONE_MASK & *chStat)
1859 {
1860 status = wpalWriteRegister(WLANDXE_INT_DONE_CLR_ADDRESS,
1861 (1 << channelEntry->assignedDMAChannel));
1862 if(eWLAN_PAL_STATUS_SUCCESS != status)
1863 {
1864 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1865 "dxeChannelCleanInt Read CH STAT register fail");
1866 return eWLAN_PAL_STATUS_E_FAULT;
1867 }
1868 }
1869
1870 /* Clean up ED INT Bit */
1871 if(WLANDXE_CH_STAT_INT_ED_MASK & *chStat)
1872 {
1873 status = wpalWriteRegister(WLANDXE_INT_ED_CLR_ADDRESS,
1874 (1 << channelEntry->assignedDMAChannel));
1875 if(eWLAN_PAL_STATUS_SUCCESS != status)
1876 {
1877 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
1878 "dxeChannelCleanInt Read CH STAT register fail");
1879 return eWLAN_PAL_STATUS_E_FAULT;
1880 }
1881 }
1882
Jeff Johnson295189b2012-06-20 16:38:30 -07001883 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07001884 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07001885 return status;
1886}
1887
Mihir Shete44547fb2014-03-10 14:15:42 +05301888#ifdef WLAN_DXE_LOW_RESOURCE_TIMER
Jeff Johnson295189b2012-06-20 16:38:30 -07001889/*==========================================================================
Leo Chang72cdfd32013-10-17 20:36:30 -07001890 @ Function Name
1891 dxeRXResourceAvailableTimerExpHandler
1892
1893 @ Description
1894 During pre-set timeperiod, if free available RX buffer is not allocated
1895 Trigger Driver re-loading to recover RX dead end
1896
1897 @ Parameters
1898 v_VOID_t *usrData
1899 DXE context
1900
1901 @ Return
1902 NONE
1903
1904===========================================================================*/
1905void dxeRXResourceAvailableTimerExpHandler
1906(
1907 void *usrData
1908)
1909{
Katya Nigam93888ff2014-02-10 17:58:11 +05301910 WLANDXE_CtrlBlkType *dxeCtxt = NULL;
Mihir Shete058fcff2014-06-26 18:54:06 +05301911 wpt_uint32 numRxFreePackets;
Mihir Sheted183cef2014-09-26 19:17:56 +05301912 wpt_uint32 numAllocFailures;
Katya Nigam93888ff2014-02-10 17:58:11 +05301913
1914 dxeCtxt = (WLANDXE_CtrlBlkType *)usrData;
1915
Leo Chang72cdfd32013-10-17 20:36:30 -07001916 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
1917 "RX Low resource, Durign wait time period %d, RX resource not allocated",
Katya Nigama6fbf662015-03-17 18:35:47 +05301918 wpalGetDxeReplenishRXTimerVal());
Katya Nigam93888ff2014-02-10 17:58:11 +05301919
Mihir Shete058fcff2014-06-26 18:54:06 +05301920 //This API wil also try to replenish packets
1921 wpalGetNumRxFreePacket(&numRxFreePackets);
Mihir Sheted183cef2014-09-26 19:17:56 +05301922 wpalGetNumRxPacketAllocFailures(&numAllocFailures);
Mihir Shete058fcff2014-06-26 18:54:06 +05301923
Mihir Sheted183cef2014-09-26 19:17:56 +05301924 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
1925 "Free Packets: %u, Alloc Failures: %u",
1926 numRxFreePackets, numAllocFailures);
Mihir Shete058fcff2014-06-26 18:54:06 +05301927 if (numRxFreePackets > 0)
1928 {
1929 /* If no. of free packets is greater than 0, it means
1930 * that some packets were replenished and can be used
1931 * by DXE to receive frames. So try to restart the
1932 * resourceAvailable timer here, it will be stopped
1933 * by the DXE's low resource callback if atleast one
1934 * free packet reaches DXE.
1935 */
1936 if (NULL != dxeCtxt)
1937 {
1938 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
1939 "%s: Replenish successful. Restart the Rx Low resource timer",
1940 __func__);
1941 wpalTimerStart(&dxeCtxt->rxResourceAvailableTimer,
Katya Nigama6fbf662015-03-17 18:35:47 +05301942 wpalGetDxeReplenishRXTimerVal());
Mihir Shete058fcff2014-06-26 18:54:06 +05301943 return;
1944 }
1945 }
Katya Nigama6fbf662015-03-17 18:35:47 +05301946 if(wpalIsDxeSSREnable())
1947 {
1948 if (NULL != dxeCtxt)
1949 dxeCtxt->driverReloadInProcessing = eWLAN_PAL_TRUE;
Mihir Shete058fcff2014-06-26 18:54:06 +05301950
Katya Nigama6fbf662015-03-17 18:35:47 +05301951 wpalWlanReload();
Katya Nigam93888ff2014-02-10 17:58:11 +05301952
Katya Nigama6fbf662015-03-17 18:35:47 +05301953 if (NULL != usrData)
1954 dxeStartSSRTimer((WLANDXE_CtrlBlkType *)usrData);
1955 }
1956 else
1957 {
1958 wpalTimerStart(&dxeCtxt->rxResourceAvailableTimer,
1959 wpalGetDxeReplenishRXTimerVal());
1960 }
Mihir Shetefdc9f532014-01-09 15:03:02 +05301961 return;
1962}
Mihir Shete44547fb2014-03-10 14:15:42 +05301963#endif
Mihir Shetefdc9f532014-01-09 15:03:02 +05301964
1965/*==========================================================================
1966 @ Function Name
1967 dxeStartSSRTimer
1968
1969 @ Description
1970 Start the dxeSSRTimer after issuing the FIQ to restart the WCN chip,
1971 this makes sure that if the chip does not respond to the FIQ within
1972 the timeout period the dxeSSRTimer expiration handler will take the
1973 appropriate action.
1974
1975 @ Parameters
1976 NONE
1977
1978 @ Return
1979 NONE
1980
1981===========================================================================*/
1982static void dxeStartSSRTimer
1983(
1984 WLANDXE_CtrlBlkType *dxeCtxt
1985)
1986{
1987 if(VOS_TIMER_STATE_RUNNING !=
1988 wpalTimerGetCurStatus(&dxeCtxt->dxeSSRTimer))
1989 {
1990 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
1991 "%s: Starting SSR Timer",__func__);
1992 wpalTimerStart(&dxeCtxt->dxeSSRTimer,
1993 T_WLANDXE_SSR_TIMEOUT);
1994 }
1995}
1996
1997/*==========================================================================
1998 @ Function Name
1999 dxeSSRTimerExpHandler
2000
2001 @ Description
2002 Issue an explicit subsystem restart of the wcnss subsystem if the
2003 WCN chip does not respond to the FIQ within the timeout period
2004
2005 @ Parameters
2006 v_VOID_t *usrData
2007
2008 @ Return
2009 NONE
2010
2011===========================================================================*/
2012void dxeSSRTimerExpHandler
2013(
2014 void *usrData
2015)
2016{
2017 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
2018 "DXE not shutdown %d ms after FIQ!! Issue SSR",
2019 T_WLANDXE_SSR_TIMEOUT);
2020 wpalRivaSubystemRestart();
2021
Leo Chang72cdfd32013-10-17 20:36:30 -07002022 return;
2023}
2024
2025/*==========================================================================
Jeff Johnson295189b2012-06-20 16:38:30 -07002026 @ Function Name
2027 dxeRXPacketAvailableCB
2028
2029 @ Description
2030 If RX frame handler encounts RX buffer pool empty condition,
2031 DXE RX handle loop will be blocked till get available RX buffer pool.
2032 When new RX buffer pool available, Packet available CB function will
2033 be called.
2034
2035 @ Parameters
2036 wpt_packet *freePacket
2037 Newly allocated RX buffer
2038 v_VOID_t *usrData
2039 DXE context
2040
2041 @ Return
2042 NONE
2043
2044===========================================================================*/
2045void dxeRXPacketAvailableCB
2046(
2047 wpt_packet *freePacket,
2048 v_VOID_t *usrData
2049)
2050{
2051 WLANDXE_CtrlBlkType *dxeCtxt = NULL;
2052 wpt_status status;
2053
2054 /* Simple Sanity */
2055 if((NULL == freePacket) || (NULL == usrData))
2056 {
2057 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
2058 "Get Free RX Buffer fail, Critical Error");
2059 HDXE_ASSERT(0);
2060 return;
2061 }
2062
2063 dxeCtxt = (WLANDXE_CtrlBlkType *)usrData;
2064
2065 if(WLANDXE_CTXT_COOKIE != dxeCtxt->dxeCookie)
2066 {
2067 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
2068 "DXE Context data corrupted, Critical Error");
2069 HDXE_ASSERT(0);
2070 return;
2071 }
2072
2073 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO,
2074 "DXE RX packet available, post MSG to RX Thread");
2075
2076 dxeCtxt->freeRXPacket = freePacket;
2077
2078 /* Serialize RX Packet Available message upon RX thread */
Manjunathappa Prakashfb585462013-12-23 19:07:07 -08002079 if (NULL == dxeCtxt->rxPktAvailMsg)
2080 {
2081 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
2082 "DXE NULL pkt");
2083 HDXE_ASSERT(0);
2084 return;
2085 }
Jeff Johnson295189b2012-06-20 16:38:30 -07002086
2087 status = wpalPostRxMsg(WDI_GET_PAL_CTX(),
2088 dxeCtxt->rxPktAvailMsg);
2089 if(eWLAN_PAL_STATUS_SUCCESS != status)
2090 {
Jeff Johnson295189b2012-06-20 16:38:30 -07002091 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
2092 "dxeRXPacketAvailableCB serialize fail");
2093 }
2094
2095 return;
2096}
2097
2098/*==========================================================================
2099 @ Function Name
2100 dxeRXFrameSingleBufferAlloc
2101
2102 @ Description
2103 Allocate Platform packet buffer to prepare RX frame
2104 RX frame memory space must be pre allocted and must be asigned to
2105 descriptor
2106 then whenever DMA engine want to tranfer frame from BMU,
2107 buffer must be ready
2108
2109 @ Parameters
2110 WLANDXE_CtrlBlkType *dxeCtrlBlk,
2111 DXE host driver main control block
2112 WLANDXE_ChannelCBType *channelEntry
2113 Channel specific control block
2114 WLANDXE_DescCtrlBlkType currentCtrlBlock
2115 current control block which have to be asigned
2116 frame buffer
2117
2118 @ Return
2119 wpt_status
2120
2121===========================================================================*/
2122static wpt_status dxeRXFrameSingleBufferAlloc
2123(
2124 WLANDXE_CtrlBlkType *dxeCtxt,
2125 WLANDXE_ChannelCBType *channelEntry,
2126 WLANDXE_DescCtrlBlkType *currentCtrlBlock
2127)
2128{
2129 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
2130 wpt_packet *currentPalPacketBuffer = NULL;
2131 WLANDXE_DescType *currentDesc = NULL;
Jeff Johnson295189b2012-06-20 16:38:30 -07002132 wpt_iterator iterator;
2133 wpt_uint32 allocatedSize = 0;
2134 void *physAddress = NULL;
Jeff Johnson295189b2012-06-20 16:38:30 -07002135
2136 currentDesc = currentCtrlBlock->linkedDesc;
2137
Leo Chang7e05f212013-07-01 19:54:15 -07002138 if(currentDesc->descCtrl.valid)
2139 {
2140 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2141 "This Descriptor is valid, Do not refill");
2142 return eWLAN_PAL_STATUS_E_EXISTS;
2143 }
2144
Jeff Johnson295189b2012-06-20 16:38:30 -07002145 /* First check if a packet pointer has already been provided by a previously
2146 invoked Rx packet available callback. If so use that packet. */
2147 if(dxeCtxt->rxPalPacketUnavailable && (NULL != dxeCtxt->freeRXPacket))
2148 {
2149 currentPalPacketBuffer = dxeCtxt->freeRXPacket;
2150 dxeCtxt->rxPalPacketUnavailable = eWLAN_PAL_FALSE;
2151 dxeCtxt->freeRXPacket = NULL;
Mihir Sheted183cef2014-09-26 19:17:56 +05302152
2153 if (channelEntry->doneIntDisabled)
2154 {
2155 wpalWriteRegister(channelEntry->channelRegister.chDXECtrlRegAddr,
2156 channelEntry->extraConfig.chan_mask);
2157 channelEntry->doneIntDisabled = 0;
2158 }
Jeff Johnson295189b2012-06-20 16:38:30 -07002159 }
2160 else if(!dxeCtxt->rxPalPacketUnavailable)
2161 {
Leo Chang72cdfd32013-10-17 20:36:30 -07002162 /* Allocate platform Packet buffer and OS Frame Buffer at here */
2163 currentPalPacketBuffer = wpalPacketAlloc(eWLAN_PAL_PKT_TYPE_RX_RAW,
Jeff Johnson295189b2012-06-20 16:38:30 -07002164 WLANDXE_DEFAULT_RX_OS_BUFFER_SIZE,
2165 dxeRXPacketAvailableCB,
2166 (void *)dxeCtxt);
2167
2168 if(NULL == currentPalPacketBuffer)
2169 {
2170 dxeCtxt->rxPalPacketUnavailable = eWLAN_PAL_TRUE;
Mihir Shete44547fb2014-03-10 14:15:42 +05302171#ifdef WLAN_DXE_LOW_RESOURCE_TIMER
Leo Chang72cdfd32013-10-17 20:36:30 -07002172 /* Out of RX free buffer,
2173 * Start timer to recover from RX dead end */
2174 if(VOS_TIMER_STATE_RUNNING !=
2175 wpalTimerGetCurStatus(&dxeCtxt->rxResourceAvailableTimer))
2176 {
2177 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
2178 "RX Low resource, wait available resource");
2179 wpalTimerStart(&dxeCtxt->rxResourceAvailableTimer,
Katya Nigama6fbf662015-03-17 18:35:47 +05302180 wpalGetDxeReplenishRXTimerVal());
Leo Chang72cdfd32013-10-17 20:36:30 -07002181 }
Mihir Shete44547fb2014-03-10 14:15:42 +05302182#endif
Jeff Johnson295189b2012-06-20 16:38:30 -07002183 }
2184 }
2185
2186 if(NULL == currentPalPacketBuffer)
2187 {
Jeff Johnson295189b2012-06-20 16:38:30 -07002188 return eWLAN_PAL_STATUS_E_RESOURCES;
2189 }
2190
2191 currentCtrlBlock->xfrFrame = currentPalPacketBuffer;
2192 currentPalPacketBuffer->pktType = eWLAN_PAL_PKT_TYPE_RX_RAW;
2193 currentPalPacketBuffer->pBD = NULL;
2194 currentPalPacketBuffer->pBDPhys = NULL;
2195 currentPalPacketBuffer->BDLength = 0;
Jeff Johnson295189b2012-06-20 16:38:30 -07002196 status = wpalLockPacketForTransfer(currentPalPacketBuffer);
Mihir Shetebc338242015-03-04 15:34:19 +05302197
Jeff Johnson295189b2012-06-20 16:38:30 -07002198 if(eWLAN_PAL_STATUS_SUCCESS != status)
2199 {
2200 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2201 "dxeRXFrameBufferAlloc unable to lock packet");
2202 return status;
2203 }
2204
2205 /* Init iterator to get physical os buffer address */
2206 status = wpalIteratorInit(&iterator, currentPalPacketBuffer);
2207 if(eWLAN_PAL_STATUS_SUCCESS != status)
2208 {
2209 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2210 "dxeRXFrameBufferAlloc iterator init fail");
2211 return status;
2212 }
2213 status = wpalIteratorNext(&iterator,
2214 currentPalPacketBuffer,
2215 &physAddress,
2216 &allocatedSize);
2217 if(eWLAN_PAL_STATUS_SUCCESS != status)
2218 {
2219 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2220 "dxeRXFrameBufferAlloc iterator Get Next pointer fail");
2221 return status;
2222 }
2223 currentPalPacketBuffer->pBDPhys = physAddress;
Jeff Johnson295189b2012-06-20 16:38:30 -07002224
2225 /* DXE descriptor must have SWAPPED addres in it's structure
2226 * !!! SWAPPED !!! */
2227 currentDesc->dxedesc.dxe_short_desc.dstMemAddrL =
Arun Kumar Khandavalli6119f7d2013-12-18 00:16:17 +05302228 WLANDXE_U32_SWAP_ENDIAN((wpt_uint32)(uintptr_t)currentPalPacketBuffer->pBDPhys);
Jeff Johnson295189b2012-06-20 16:38:30 -07002229
Jeff Johnson295189b2012-06-20 16:38:30 -07002230 return status;
2231}
2232
2233/*==========================================================================
2234 @ Function Name
2235 dxeRXFrameRefillRing
2236
2237 @ Description
2238 Allocate Platform packet buffers to try to fill up the DXE Rx ring
2239
2240 @ Parameters
2241 WLANDXE_CtrlBlkType *dxeCtrlBlk,
2242 DXE host driver main control block
2243 WLANDXE_ChannelCBType *channelEntry
2244 Channel specific control block
2245
2246 @ Return
2247 wpt_status
2248
2249===========================================================================*/
2250static wpt_status dxeRXFrameRefillRing
2251(
2252 WLANDXE_CtrlBlkType *dxeCtxt,
2253 WLANDXE_ChannelCBType *channelEntry
2254)
2255{
2256 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
2257 WLANDXE_DescCtrlBlkType *currentCtrlBlk = channelEntry->tailCtrlBlk;
2258 WLANDXE_DescType *currentDesc = NULL;
2259
2260 while(channelEntry->numFreeDesc > 0)
2261 {
2262 /* Current Control block is free
2263 * and associated frame buffer is not linked with control block anymore
2264 * allocate new frame buffer for current control block */
2265 status = dxeRXFrameSingleBufferAlloc(dxeCtxt,
2266 channelEntry,
2267 currentCtrlBlk);
2268
Leo Chang7e05f212013-07-01 19:54:15 -07002269 if((eWLAN_PAL_STATUS_SUCCESS != status) &&
2270 (eWLAN_PAL_STATUS_E_EXISTS != status))
Jeff Johnson295189b2012-06-20 16:38:30 -07002271 {
2272 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
2273 "dxeRXFrameRefillRing, out of RX buffer pool, break here");
2274 break;
2275 }
2276
Leo Chang7e05f212013-07-01 19:54:15 -07002277 if(eWLAN_PAL_STATUS_E_EXISTS == status)
2278 {
2279 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2280 "dxeRXFrameRefillRing, Descriptor Non-Empry");
2281 }
2282
Jeff Johnson295189b2012-06-20 16:38:30 -07002283 currentDesc = currentCtrlBlk->linkedDesc;
2284 currentDesc->descCtrl.ctrl = channelEntry->extraConfig.cw_ctrl_read;
2285
2286 /* Issue a dummy read from the DXE descriptor DDR location to ensure
2287 that any posted writes are reflected in memory before DXE looks at
2288 the descriptor. */
2289 if(channelEntry->extraConfig.cw_ctrl_read != currentDesc->descCtrl.ctrl)
2290 {
Karthick S3254c5d2015-04-28 15:06:17 +05302291 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2292 "dxeRXFrameRefillRing, Descriptor write failed");
2293 ++channelEntry->desc_write_fail_count;
Jeff Johnson295189b2012-06-20 16:38:30 -07002294 //HDXE_ASSERT(0);
2295 }
2296
2297 /* Kick off the DXE ring, if not in any power save mode */
Leo Chang094ece82013-04-23 17:57:41 -07002298 if(WLANDXE_POWER_STATE_FULL == dxeCtxt->hostPowerState)
Jeff Johnson295189b2012-06-20 16:38:30 -07002299 {
2300 wpalWriteRegister(WALNDEX_DMA_ENCH_ADDRESS,
2301 1 << channelEntry->assignedDMAChannel);
2302 }
2303 currentCtrlBlk = currentCtrlBlk->nextCtrlBlk;
Leo Chang7e05f212013-07-01 19:54:15 -07002304 if(eWLAN_PAL_STATUS_E_EXISTS != status)
2305 {
2306 --channelEntry->numFreeDesc;
2307 }
Jeff Johnson295189b2012-06-20 16:38:30 -07002308 }
2309
2310 channelEntry->tailCtrlBlk = currentCtrlBlk;
2311
2312 return status;
2313}
2314
2315/*==========================================================================
Jeff Johnsone7245742012-09-05 17:12:55 -07002316 @ Function Name
2317 dxeRXFrameRouteUpperLayer
2318
2319 @ Description
2320 Test DXE descriptors and if any RX frame pending within RING,
2321 Route to upper layer
2322
2323 @ Parameters
2324 WLANDXE_CtrlBlkType *dxeCtrlBlk,
2325 DXE host driver main control block
2326 WLANDXE_ChannelCBType *channelEntry
2327 Channel specific control block
2328 @ Return
Madan Mohan Koyyalamudicae253a2012-11-06 19:10:35 -08002329 < 0 Any error happen
Jeff Johnsone7245742012-09-05 17:12:55 -07002330 0 No frame pulled from RX RING
2331 int number of RX frames pulled from RX ring
2332
2333===========================================================================*/
2334static wpt_int32 dxeRXFrameRouteUpperLayer
2335(
2336 WLANDXE_CtrlBlkType *dxeCtxt,
2337 WLANDXE_ChannelCBType *channelEntry
2338)
2339{
2340 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
2341 WLANDXE_DescCtrlBlkType *currentCtrlBlk = NULL;
2342 WLANDXE_DescType *currentDesc = NULL;
2343 wpt_uint32 descCtrl, frameCount = 0, i;
Madan Mohan Koyyalamudicae253a2012-11-06 19:10:35 -08002344 wpt_int32 ret_val = -1;
Jeff Johnsone7245742012-09-05 17:12:55 -07002345
2346 currentCtrlBlk = channelEntry->headCtrlBlk;
2347 currentDesc = currentCtrlBlk->linkedDesc;
2348
2349 /* Descriptoe should be SWAPPED ???? */
2350 descCtrl = currentDesc->descCtrl.ctrl;
2351
2352 /* Get frames while VALID bit is not set (DMA complete) and a data
2353 * associated with it */
2354 while(!(WLANDXE_U32_SWAP_ENDIAN(descCtrl) & WLANDXE_DESC_CTRL_VALID) &&
2355 (eWLAN_PAL_STATUS_SUCCESS == wpalIsPacketLocked(currentCtrlBlk->xfrFrame)) &&
2356 (currentCtrlBlk->xfrFrame->pInternalData != NULL) &&
2357 (frameCount < WLANDXE_MAX_REAPED_RX_FRAMES) )
2358 {
2359 channelEntry->numTotalFrame++;
2360 channelEntry->numFreeDesc++;
Jeff Johnsone7245742012-09-05 17:12:55 -07002361 status = wpalUnlockPacket(currentCtrlBlk->xfrFrame);
Mihir Shetebc338242015-03-04 15:34:19 +05302362
Jeff Johnsone7245742012-09-05 17:12:55 -07002363 if (eWLAN_PAL_STATUS_SUCCESS != status)
2364 {
2365 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2366 "dxeRXFrameReady unable to unlock packet");
Madan Mohan Koyyalamudicae253a2012-11-06 19:10:35 -08002367 return ret_val;
Jeff Johnsone7245742012-09-05 17:12:55 -07002368 }
Mihir Shetebc338242015-03-04 15:34:19 +05302369
Jeff Johnsone7245742012-09-05 17:12:55 -07002370 /* This Descriptor is valid, so linked Control block is also valid
2371 * Linked Control block has pre allocated packet buffer
2372 * So, just let upper layer knows preallocated frame pointer will be OK */
2373 /* Reap Rx frames */
2374 rx_reaped_buf[frameCount] = currentCtrlBlk->xfrFrame;
2375 frameCount++;
Madan Mohan Koyyalamudi0c325532012-09-24 13:24:42 -07002376 currentCtrlBlk->xfrFrame = NULL;
Jeff Johnsone7245742012-09-05 17:12:55 -07002377
2378 /* Now try to refill the ring with empty Rx buffers to keep DXE busy */
Leo Changd6de1c22013-03-21 15:42:41 -07002379 dxeRXFrameRefillRing(dxeCtxt, channelEntry);
Jeff Johnsone7245742012-09-05 17:12:55 -07002380
2381 /* Test next contorl block
2382 * if valid, this control block also has new RX frame must be handled */
2383 currentCtrlBlk = (WLANDXE_DescCtrlBlkType *)currentCtrlBlk->nextCtrlBlk;
2384 currentDesc = currentCtrlBlk->linkedDesc;
2385 descCtrl = currentDesc->descCtrl.ctrl;
2386 }
2387
2388 /* Update head control block
2389 * current control block's valid bit was 0
2390 * next trial first control block must be current control block */
2391 channelEntry->headCtrlBlk = currentCtrlBlk;
2392
2393 /* Deliver all the reaped RX frames to upper layers */
2394 i = 0;
Leo Changd6de1c22013-03-21 15:42:41 -07002395 while(i < frameCount)
2396 {
Jeff Johnsone7245742012-09-05 17:12:55 -07002397 dxeCtxt->rxReadyCB(dxeCtxt->clientCtxt, rx_reaped_buf[i], channelEntry->channelType);
2398 i++;
2399 }
2400
2401 return frameCount;
2402}
2403
2404/*==========================================================================
Jeff Johnson295189b2012-06-20 16:38:30 -07002405 @ Function Name
2406 dxeRXFrameReady
2407
2408 @ Description
2409 Pop frame from descriptor and route frame to upper transport layer
2410 Assign new platform packet buffer into used descriptor
2411 Actual frame pop and resource realloc
2412
2413 @ Parameters
2414 WLANDXE_CtrlBlkType *dxeCtrlBlk,
2415 DXE host driver main control block
2416 WLANDXE_ChannelCBType *channelEntry
2417 Channel specific control block
2418
2419 @ Return
2420 wpt_status
2421
2422===========================================================================*/
2423static wpt_status dxeRXFrameReady
2424(
2425 WLANDXE_CtrlBlkType *dxeCtxt,
Leo Changd6de1c22013-03-21 15:42:41 -07002426 WLANDXE_ChannelCBType *channelEntry,
2427 wpt_uint32 chStat
Jeff Johnson295189b2012-06-20 16:38:30 -07002428)
2429{
2430 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
2431 WLANDXE_DescCtrlBlkType *currentCtrlBlk = NULL;
2432 WLANDXE_DescType *currentDesc = NULL;
2433 wpt_uint32 descCtrl;
Jeff Johnsone7245742012-09-05 17:12:55 -07002434 wpt_int32 frameCount = 0;
2435
2436 wpt_uint32 descLoop;
2437 wpt_uint32 invalidatedFound = 0;
Jeff Johnson295189b2012-06-20 16:38:30 -07002438
2439 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07002440 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07002441
2442 /* Sanity Check */
2443 if((NULL == dxeCtxt) || (NULL == channelEntry))
2444 {
2445 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2446 "dxeRXFrameReady Channel Entry is not valid");
2447 return eWLAN_PAL_STATUS_E_INVAL;
2448 }
2449
Jeff Johnsone7245742012-09-05 17:12:55 -07002450 frameCount = dxeRXFrameRouteUpperLayer(dxeCtxt, channelEntry);
Jeff Johnson295189b2012-06-20 16:38:30 -07002451
Jeff Johnsone7245742012-09-05 17:12:55 -07002452 if(0 > frameCount)
Leo Changd6de1c22013-03-21 15:42:41 -07002453 {
2454 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
Jeff Johnsone7245742012-09-05 17:12:55 -07002455 "dxeRXFrameReady RX frame route fail");
Leo Changd6de1c22013-03-21 15:42:41 -07002456 return eWLAN_PAL_STATUS_E_INVAL;
2457 }
Jeff Johnson295189b2012-06-20 16:38:30 -07002458
Leo Changd6de1c22013-03-21 15:42:41 -07002459 if((0 == frameCount) &&
Jeff Johnsone7245742012-09-05 17:12:55 -07002460 ((WLANDXE_POWER_STATE_BMPS == dxeCtxt->hostPowerState) ||
2461 (WLANDXE_POWER_STATE_FULL == dxeCtxt->hostPowerState)))
2462 {
Leo Changd6de1c22013-03-21 15:42:41 -07002463 /* None of the frame handled and CH is not enabled
2464 * RX CH wrap around happen and No RX free frame
2465 * RX side should wait till new free frame available in the pool
2466 * Do not try reload driver at here*/
2467 if(!(chStat & WLANDXE_CH_CTRL_EN_MASK))
2468 {
Leo Changbbf86b72013-06-19 16:13:00 -07002469 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
Leo Changd6de1c22013-03-21 15:42:41 -07002470 "dxeRXFrameReady %s RING Wrapped, RX Free Low 0x%x",
2471 channelType[channelEntry->channelType], chStat);
Leo Chang3714c922013-07-10 20:33:30 -07002472 /* This is not empty interrupt case
2473 * If handle this as empty interrupt, false SSR might be issued
2474 * Frame count '1' is dummy frame count to avoid SSR */
2475 channelEntry->numFragmentCurrentChain = 1;
Leo Changd6de1c22013-03-21 15:42:41 -07002476 return eWLAN_PAL_STATUS_SUCCESS;
2477 }
2478
Jeff Johnsone7245742012-09-05 17:12:55 -07002479 currentCtrlBlk = channelEntry->headCtrlBlk;
Jeff Johnson295189b2012-06-20 16:38:30 -07002480 currentDesc = currentCtrlBlk->linkedDesc;
2481 descCtrl = currentDesc->descCtrl.ctrl;
Jeff Johnsone7245742012-09-05 17:12:55 -07002482
2483 if(WLANDXE_POWER_STATE_BMPS != dxeCtxt->hostPowerState)
2484 {
2485 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
2486 "RX ISR called but no frame handled PWS %d, channel %s",
2487 (int)dxeCtxt->hostPowerState,
2488 channelType[channelEntry->channelType]);
2489 }
2490
2491 /* Current interupt empty and previous interrupt also empty
2492 * detected successive empty interrupt
2493 * or first interrupt empty, this should not happen */
2494 if(0 == channelEntry->numFragmentCurrentChain)
2495 {
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -07002496 dxeChannelMonitor("RX Ready", channelEntry, NULL);
2497 dxeDescriptorDump(channelEntry, channelEntry->headCtrlBlk->linkedDesc, 0);
2498 dxeChannelRegisterDump(channelEntry, "RX successive empty interrupt", NULL);
2499 dxeChannelAllDescDump(channelEntry, channelEntry->channelType, NULL);
Jeff Johnsone7245742012-09-05 17:12:55 -07002500 /* Abnormal interrupt detected, try to find not validated descriptor */
2501 for(descLoop = 0; descLoop < channelEntry->numDesc; descLoop++)
2502 {
2503 if(!(WLANDXE_U32_SWAP_ENDIAN(descCtrl) & WLANDXE_DESC_CTRL_VALID))
2504 {
Leo Chang416afe02013-07-01 13:58:13 -07002505 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
Jeff Johnsone7245742012-09-05 17:12:55 -07002506 "Found Invalidated Descriptor %d", (int)descLoop);
2507 if(eWLAN_PAL_STATUS_SUCCESS == wpalIsPacketLocked(currentCtrlBlk->xfrFrame))
2508 {
Leo Chang416afe02013-07-01 13:58:13 -07002509 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
Jeff Johnsone7245742012-09-05 17:12:55 -07002510 "Packet locked, Resync Host and HW");
2511 channelEntry->headCtrlBlk = currentCtrlBlk;
2512 invalidatedFound = 1;
2513 break;
2514 }
2515 else
2516 {
Leo Chang416afe02013-07-01 13:58:13 -07002517 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
Jeff Johnsone7245742012-09-05 17:12:55 -07002518 "Packet Not Locked, cannot transfer frame");
2519 }
2520 }
2521 currentCtrlBlk = (WLANDXE_DescCtrlBlkType *)currentCtrlBlk->nextCtrlBlk;
2522 currentDesc = currentCtrlBlk->linkedDesc;
2523 descCtrl = currentDesc->descCtrl.ctrl;
2524 }
2525
Jeff Johnson32d95a32012-09-10 13:15:23 -07002526 /* Invalidated descriptor found, and that is not head descriptor
2527 * This means HW/SW descriptor miss match happen, and we may recover with just resync
2528 * Try re-sync here */
2529 if((invalidatedFound) && (0 != descLoop))
Jeff Johnsone7245742012-09-05 17:12:55 -07002530 {
2531 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2532 "Found New Sync location with HW, handle frames from there");
2533 frameCount = dxeRXFrameRouteUpperLayer(dxeCtxt, channelEntry);
2534 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2535 "re-sync routed %d frames to upper layer", (int)frameCount);
Madan Mohan Koyyalamudi0c325532012-09-24 13:24:42 -07002536 channelEntry->numFragmentCurrentChain = frameCount;
Jeff Johnsone7245742012-09-05 17:12:55 -07002537 }
Jeff Johnson32d95a32012-09-10 13:15:23 -07002538 /* Successive Empty interrupt
2539 * But this case, first descriptor also invalidated, then it means head descriptor
2540 * is linked with already handled RX frame, then could not unlock RX frame
2541 * This is just Out of RX buffer pool, not need to anything here */
2542 else if((invalidatedFound) && (0 == descLoop))
2543 {
2544 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2545 "Out of RX Low resource, and INT came in, do nothing till get RX resource");
2546 }
2547 /* Critical error, reload driver */
Jeff Johnsone7245742012-09-05 17:12:55 -07002548 else
2549 {
2550 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2551 "Could not found invalidated descriptor");
2552 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2553 "RX successive empty interrupt, Could not find invalidated DESC reload driver");
2554 dxeCtxt->driverReloadInProcessing = eWLAN_PAL_TRUE;
2555 wpalWlanReload();
Mihir Shetefdc9f532014-01-09 15:03:02 +05302556 dxeStartSSRTimer(dxeCtxt);
Jeff Johnsone7245742012-09-05 17:12:55 -07002557 }
2558 }
Jeff Johnson295189b2012-06-20 16:38:30 -07002559 }
Madan Mohan Koyyalamudi6646aad2012-09-24 14:10:39 -07002560 channelEntry->numFragmentCurrentChain = frameCount;
Jeff Johnson295189b2012-06-20 16:38:30 -07002561 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07002562 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07002563 return status;
2564}
2565
2566/*==========================================================================
2567 @ Function Name
2568 dxeNotifySmsm
2569
2570 @ Description: Notify SMSM to start DXE engine and/or condition of Tx ring
2571 buffer
2572
2573 @ Parameters
2574
2575 @ Return
2576 wpt_status
2577
2578===========================================================================*/
2579static wpt_status dxeNotifySmsm
2580(
2581 wpt_boolean kickDxe,
2582 wpt_boolean ringEmpty
2583)
2584{
2585 wpt_uint32 clrSt = 0;
2586 wpt_uint32 setSt = 0;
2587
2588 if(kickDxe)
2589 {
2590 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_MED, "Kick off DXE");
2591
2592 if(tempDxeCtrlBlk->lastKickOffDxe == 0)
2593 {
2594 setSt |= WPAL_SMSM_WLAN_TX_ENABLE;
2595 tempDxeCtrlBlk->lastKickOffDxe = 1;
2596 }
2597 else if(tempDxeCtrlBlk->lastKickOffDxe == 1)
2598 {
2599 clrSt |= WPAL_SMSM_WLAN_TX_ENABLE;
2600 tempDxeCtrlBlk->lastKickOffDxe = 0;
2601 }
2602 else
2603 {
2604 HDXE_ASSERT(0);
2605 }
2606 }
2607 else
2608 {
2609 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_MED, "no need to kick off DXE");
2610 }
2611
Mihir Shete68ed77a2014-10-10 10:47:12 +05302612 tempDxeCtrlBlk->txRingsEmpty = ringEmpty;
Jeff Johnson295189b2012-06-20 16:38:30 -07002613 if(ringEmpty)
2614 {
2615 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_MED, "SMSM Tx Ring Empty");
2616 clrSt |= WPAL_SMSM_WLAN_TX_RINGS_EMPTY;
2617 }
2618 else
2619 {
2620 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_MED, "SMSM Tx Ring Not Empty");
2621 setSt |= WPAL_SMSM_WLAN_TX_RINGS_EMPTY;
2622 }
2623
2624 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_HIGH, "C%x S%x", clrSt, setSt);
2625
2626 wpalNotifySmsm(clrSt, setSt);
2627
2628 return eWLAN_PAL_STATUS_SUCCESS;
2629}
2630
2631/*==========================================================================
2632 @ Function Name
2633 dxePsComplete
2634
2635 @ Description: Utility function to check the resv desc to deside if we can
2636 get into Power Save mode now
2637
2638 @ Parameters
2639
2640 @ Return
2641 None
2642
2643===========================================================================*/
2644static void dxePsComplete(WLANDXE_CtrlBlkType *dxeCtxt, wpt_boolean intr_based)
2645{
2646 if( dxeCtxt->hostPowerState == WLANDXE_POWER_STATE_FULL )
2647 {
2648 return;
2649 }
2650
2651 //if both HIGH & LOW Tx channels don't have anything on resv desc,all Tx pkts
2652 //must have been consumed by RIVA, OK to get into BMPS
2653 if((0 == dxeCtxt->dxeChannel[WDTS_CHANNEL_TX_LOW_PRI].numRsvdDesc) &&
2654 (0 == dxeCtxt->dxeChannel[WDTS_CHANNEL_TX_HIGH_PRI].numRsvdDesc))
2655 {
2656 tempDxeCtrlBlk->ringNotEmpty = eWLAN_PAL_FALSE;
2657 //if host is in BMPS & no pkt to Tx, RIVA can go to power save
2658 if(WLANDXE_POWER_STATE_BMPS == dxeCtxt->hostPowerState)
2659 {
2660 dxeCtxt->rivaPowerState = WLANDXE_RIVA_POWER_STATE_BMPS_UNKNOWN;
2661 dxeNotifySmsm(eWLAN_PAL_FALSE, eWLAN_PAL_TRUE);
2662 }
2663 }
2664 else //still more pkts to be served by RIVA
2665 {
2666 tempDxeCtrlBlk->ringNotEmpty = eWLAN_PAL_TRUE;
2667
2668 switch(dxeCtxt->rivaPowerState)
2669 {
2670 case WLANDXE_RIVA_POWER_STATE_ACTIVE:
2671 //NOP
2672 break;
2673 case WLANDXE_RIVA_POWER_STATE_BMPS_UNKNOWN:
2674 if(intr_based)
2675 {
2676 dxeCtxt->rivaPowerState = WLANDXE_RIVA_POWER_STATE_ACTIVE;
2677 dxeNotifySmsm(eWLAN_PAL_TRUE, eWLAN_PAL_FALSE);
2678 }
2679 break;
2680 default:
2681 //assert
2682 break;
2683 }
2684 }
2685}
2686
2687/*==========================================================================
2688 @ Function Name
2689 dxeRXEventHandler
2690
2691 @ Description
2692 Handle serailized RX frame ready event
2693 First disable interrupt then pick up frame from pre allocated buffer
2694 Since frame handle is doen, clear interrupt bit to ready next interrupt
2695 Finally re enable interrupt
2696
2697 @ Parameters
2698 wpt_msg *rxReadyMsg
2699 RX frame ready MSG pointer
2700 include DXE control context
2701
2702 @ Return
2703 NONE
2704
2705===========================================================================*/
2706void dxeRXEventHandler
2707(
2708 wpt_msg *rxReadyMsg
2709)
2710{
2711 wpt_msg *msgContent = (wpt_msg *)rxReadyMsg;
2712 WLANDXE_CtrlBlkType *dxeCtxt = NULL;
2713 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
2714 wpt_uint32 intSrc = 0;
2715 WLANDXE_ChannelCBType *channelCb = NULL;
Jeff Johnsone7245742012-09-05 17:12:55 -07002716 wpt_uint32 chHighStat = 0;
2717 wpt_uint32 chLowStat = 0;
Mihir Shetee6618162015-03-16 14:48:42 +05302718 wpt_uint32 chLogRxStat = 0;
Mihir Shetef2000552014-05-12 16:21:34 +05302719 wpt_uint32 regValue, chanMask;
Jeff Johnson295189b2012-06-20 16:38:30 -07002720
Jeff Johnsone7245742012-09-05 17:12:55 -07002721 dxeCtxt = (WLANDXE_CtrlBlkType *)(msgContent->pContext);
Jeff Johnson295189b2012-06-20 16:38:30 -07002722
Jeff Johnsone7245742012-09-05 17:12:55 -07002723 if(eWLAN_PAL_TRUE == dxeCtxt->driverReloadInProcessing)
Jeff Johnson295189b2012-06-20 16:38:30 -07002724 {
2725 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
Jeff Johnsone7245742012-09-05 17:12:55 -07002726 "RX Ready WLAN Driver re-loading in progress");
Jeff Johnson32d95a32012-09-10 13:15:23 -07002727 return;
Jeff Johnson295189b2012-06-20 16:38:30 -07002728 }
2729
Jeff Johnsone7245742012-09-05 17:12:55 -07002730 /* Now try to refill the ring with empty Rx buffers to keep DXE busy */
2731 dxeRXFrameRefillRing(dxeCtxt, &dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOW_PRI]);
2732 dxeRXFrameRefillRing(dxeCtxt, &dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_HIGH_PRI]);
Mihir Shetee6618162015-03-16 14:48:42 +05302733 if (WLANDXE_IS_VALID_CHANNEL(WDTS_CHANNEL_RX_LOG))
2734 dxeRXFrameRefillRing(dxeCtxt, &dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOG]);
Jeff Johnsone7245742012-09-05 17:12:55 -07002735
Jeff Johnson295189b2012-06-20 16:38:30 -07002736 dxeCtxt = (WLANDXE_CtrlBlkType *)(msgContent->pContext);
2737
2738 if((!dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_HIGH_PRI].extraConfig.chEnabled) ||
Mihir Shetee6618162015-03-16 14:48:42 +05302739 (!dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOW_PRI].extraConfig.chEnabled) ||
2740 (WLANDXE_IS_VALID_CHANNEL(WDTS_CHANNEL_RX_LOG) &&
2741 !dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOG].extraConfig.chEnabled))
Jeff Johnson295189b2012-06-20 16:38:30 -07002742 {
2743 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2744 "DXE already stopped in RX event handler. Just return");
2745 return;
2746 }
2747
2748 if((WLANDXE_POWER_STATE_IMPS == dxeCtxt->hostPowerState) ||
2749 (WLANDXE_POWER_STATE_DOWN == dxeCtxt->hostPowerState))
2750 {
2751 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
2752 "%s Riva is in %d, Just Pull frames without any register touch ",
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07002753 __func__, dxeCtxt->hostPowerState);
Jeff Johnson295189b2012-06-20 16:38:30 -07002754
2755 /* Not to touch any register, just pull frame directly from chain ring
2756 * First high priority */
2757 channelCb = &dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_HIGH_PRI];
2758 status = dxeRXFrameReady(dxeCtxt,
Leo Changd6de1c22013-03-21 15:42:41 -07002759 channelCb,
2760 chHighStat);
Jeff Johnson295189b2012-06-20 16:38:30 -07002761 if(eWLAN_PAL_STATUS_SUCCESS != status)
2762 {
2763 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2764 "dxeRXEventHandler Pull from RX high channel fail");
2765 }
Leo Chang46f36162014-01-14 21:47:24 -08002766 /* In case FW could not power collapse in IMPS mode
2767 * Next power restore might have empty interrupt
2768 * If IMPS mode has empty interrupt since RX thread race,
2769 * Invalid re-load driver might happen
2770 * To prevent invalid re-load driver,
2771 * IMPS event handler set dummpy frame count */
2772 channelCb->numFragmentCurrentChain = 1;
Jeff Johnson295189b2012-06-20 16:38:30 -07002773
2774 /* Second low priority */
2775 channelCb = &dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOW_PRI];
2776 status = dxeRXFrameReady(dxeCtxt,
Leo Changd6de1c22013-03-21 15:42:41 -07002777 channelCb,
2778 chLowStat);
Jeff Johnson295189b2012-06-20 16:38:30 -07002779 if(eWLAN_PAL_STATUS_SUCCESS != status)
2780 {
2781 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
Mihir Shetee6618162015-03-16 14:48:42 +05302782 "dxeRXEventHandler Pull from RX low channel fail");
Jeff Johnson295189b2012-06-20 16:38:30 -07002783 }
Leo Chang46f36162014-01-14 21:47:24 -08002784 /* LOW Priority CH same above */
2785 channelCb->numFragmentCurrentChain = 1;
Jeff Johnson295189b2012-06-20 16:38:30 -07002786
Mihir Shetee6618162015-03-16 14:48:42 +05302787 if (WLANDXE_IS_VALID_CHANNEL(WDTS_CHANNEL_RX_LOG))
2788 {
2789 channelCb = &dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOG];
2790 status = dxeRXFrameReady(dxeCtxt,
2791 channelCb,
2792 chLogRxStat);
2793 if(eWLAN_PAL_STATUS_SUCCESS != status)
2794 {
2795 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2796 "dxeRXEventHandler Pull from RX log channel fail");
2797 }
2798 channelCb->numFragmentCurrentChain = 1;
2799 }
Jeff Johnson295189b2012-06-20 16:38:30 -07002800 /* Interrupt will not enabled at here, it will be enabled at PS mode change */
2801 tempDxeCtrlBlk->rxIntDisabledByIMPS = eWLAN_PAL_TRUE;
2802
2803 return;
2804 }
2805
2806 /* Disable device interrupt */
2807 /* Read whole interrupt mask register and exclusive only this channel int */
2808 status = wpalReadRegister(WLANDXE_INT_SRC_RAW_ADDRESS,
2809 &intSrc);
2810 if(eWLAN_PAL_STATUS_SUCCESS != status)
2811 {
2812 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2813 "dxeRXEventHandler Read INT_SRC register fail");
2814 return;
2815 }
2816 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_MED,
2817 "RX Event Handler INT Source 0x%x", intSrc);
2818
Jeff Johnson295189b2012-06-20 16:38:30 -07002819 /* Test High Priority Channel interrupt is enabled or not */
2820 channelCb = &dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_HIGH_PRI];
2821 if(intSrc & (1 << channelCb->assignedDMAChannel))
2822 {
2823 status = dxeChannelCleanInt(channelCb, &chHighStat);
2824 if(eWLAN_PAL_STATUS_SUCCESS != status)
2825 {
2826 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2827 "dxeRXEventHandler INT Clean up fail");
2828 return;
2829 }
Jeff Johnson295189b2012-06-20 16:38:30 -07002830 if(WLANDXE_CH_STAT_INT_ERR_MASK & chHighStat)
2831 {
2832 /* Error Happen during transaction, Handle it */
Madan Mohan Koyyalamudide2f8ab2012-11-08 15:08:14 -08002833 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
2834 "%11s : 0x%x Error Reported, Reload Driver",
2835 channelType[channelCb->channelType], chHighStat);
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +05302836
Mihir Shete79d6b582014-03-12 17:54:07 +05302837 dxeErrChannelDebug(channelCb, chHighStat);
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +05302838
Madan Mohan Koyyalamudide2f8ab2012-11-08 15:08:14 -08002839 dxeCtxt->driverReloadInProcessing = eWLAN_PAL_TRUE;
2840 wpalWlanReload();
Mihir Shetefdc9f532014-01-09 15:03:02 +05302841 dxeStartSSRTimer(dxeCtxt);
Jeff Johnson295189b2012-06-20 16:38:30 -07002842 }
Jeff Johnson32d95a32012-09-10 13:15:23 -07002843 else if((WLANDXE_CH_STAT_INT_DONE_MASK & chHighStat) ||
2844 (WLANDXE_CH_STAT_INT_ED_MASK & chHighStat))
Jeff Johnson295189b2012-06-20 16:38:30 -07002845 {
2846 /* Handle RX Ready for high priority channel */
2847 status = dxeRXFrameReady(dxeCtxt,
Leo Changd6de1c22013-03-21 15:42:41 -07002848 channelCb,
2849 chHighStat);
Jeff Johnson295189b2012-06-20 16:38:30 -07002850 }
2851 else if(WLANDXE_CH_STAT_MASKED_MASK & chHighStat)
2852 {
2853 status = dxeRXFrameReady(dxeCtxt,
Leo Changd6de1c22013-03-21 15:42:41 -07002854 channelCb,
2855 chHighStat);
Jeff Johnson295189b2012-06-20 16:38:30 -07002856 }
2857 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO,
2858 "RX HIGH CH EVNT STAT 0x%x, %d frames handled", chHighStat, channelCb->numFragmentCurrentChain);
Jeff Johnsone7245742012-09-05 17:12:55 -07002859 /* Update the Rx DONE histogram */
2860 channelCb->rxDoneHistogram = (channelCb->rxDoneHistogram << 1);
2861 if(WLANDXE_CH_STAT_INT_DONE_MASK & chHighStat)
2862 {
2863 channelCb->rxDoneHistogram |= 1;
2864 }
2865 else
2866 {
2867 channelCb->rxDoneHistogram &= ~1;
2868 }
Jeff Johnson295189b2012-06-20 16:38:30 -07002869 }
Jeff Johnson295189b2012-06-20 16:38:30 -07002870
2871 /* Test Low Priority Channel interrupt is enabled or not */
Jeff Johnsone7245742012-09-05 17:12:55 -07002872 channelCb = &dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOW_PRI];
Jeff Johnson295189b2012-06-20 16:38:30 -07002873 if(intSrc & (1 << channelCb->assignedDMAChannel))
2874 {
2875 status = dxeChannelCleanInt(channelCb, &chLowStat);
2876 if(eWLAN_PAL_STATUS_SUCCESS != status)
2877 {
2878 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2879 "dxeRXEventHandler INT Clean up fail");
2880 return;
2881 }
2882
2883 if(WLANDXE_CH_STAT_INT_ERR_MASK & chLowStat)
2884 {
2885 /* Error Happen during transaction, Handle it */
Madan Mohan Koyyalamudide2f8ab2012-11-08 15:08:14 -08002886 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
2887 "%11s : 0x%x Error Reported, Reload Driver",
2888 channelType[channelCb->channelType], chLowStat);
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +05302889
Mihir Shete79d6b582014-03-12 17:54:07 +05302890 dxeErrChannelDebug(channelCb, chLowStat);
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +05302891
Madan Mohan Koyyalamudide2f8ab2012-11-08 15:08:14 -08002892 dxeCtxt->driverReloadInProcessing = eWLAN_PAL_TRUE;
2893 wpalWlanReload();
Mihir Shetefdc9f532014-01-09 15:03:02 +05302894 dxeStartSSRTimer(dxeCtxt);
Jeff Johnson295189b2012-06-20 16:38:30 -07002895 }
Mihir Shetef2000552014-05-12 16:21:34 +05302896 else if((WLANDXE_CH_STAT_INT_ED_MASK & chLowStat) ||
2897 (WLANDXE_CH_STAT_INT_DONE_MASK & chLowStat))
Jeff Johnson295189b2012-06-20 16:38:30 -07002898 {
2899 /* Handle RX Ready for low priority channel */
2900 status = dxeRXFrameReady(dxeCtxt,
Leo Changd6de1c22013-03-21 15:42:41 -07002901 channelCb,
2902 chLowStat);
Jeff Johnsone7245742012-09-05 17:12:55 -07002903 }
Jeff Johnson295189b2012-06-20 16:38:30 -07002904
2905 /* Update the Rx DONE histogram */
2906 channelCb->rxDoneHistogram = (channelCb->rxDoneHistogram << 1);
2907 if(WLANDXE_CH_STAT_INT_DONE_MASK & chLowStat)
2908 {
2909 channelCb->rxDoneHistogram |= 1;
Jeff Johnson295189b2012-06-20 16:38:30 -07002910 }
2911 else
2912 {
2913 channelCb->rxDoneHistogram &= ~1;
2914 }
2915 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO,
2916 "RX LOW CH EVNT STAT 0x%x, %d frames handled", chLowStat, channelCb->numFragmentCurrentChain);
2917 }
Mihir Shetee6618162015-03-16 14:48:42 +05302918
2919 if (WLANDXE_IS_VALID_CHANNEL(WDTS_CHANNEL_RX_LOG))
2920 {
2921 channelCb = &dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOG];
2922
2923 if(intSrc & (1 << channelCb->assignedDMAChannel))
2924 {
2925 status = dxeChannelCleanInt(channelCb,&chLogRxStat);
2926 if(eWLAN_PAL_STATUS_SUCCESS != status)
2927 {
2928 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2929 "dxeRXEventHandler INT Clean up fail");
2930 return;
2931 }
2932
2933 if(WLANDXE_CH_STAT_INT_ERR_MASK & chLogRxStat)
2934 {
2935 /* Error Happen during transaction, Handle it */
2936 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
2937 "%11s : 0x%x Error Reported, Reload Driver",
2938 channelType[channelCb->channelType], chLogRxStat);
2939
2940 dxeErrChannelDebug(channelCb, chLogRxStat);
2941
2942 dxeCtxt->driverReloadInProcessing = eWLAN_PAL_TRUE;
2943 wpalWlanReload();
2944 dxeStartSSRTimer(dxeCtxt);
2945 }
2946 else if((WLANDXE_CH_STAT_INT_ED_MASK & chLogRxStat) ||
2947 (WLANDXE_CH_STAT_INT_DONE_MASK & chLogRxStat))
2948 {
2949 /* Handle RX Ready for low priority channel */
2950 status = dxeRXFrameReady(dxeCtxt,
2951 channelCb,
2952 chLogRxStat);
2953 }
2954
2955 /* Update the Rx DONE histogram */
2956 channelCb->rxDoneHistogram = (channelCb->rxDoneHistogram << 1);
2957 if(WLANDXE_CH_STAT_INT_DONE_MASK & chLogRxStat)
2958 {
2959 channelCb->rxDoneHistogram |= 1;
2960 }
2961 else
2962 {
2963 channelCb->rxDoneHistogram &= ~1;
2964 }
2965 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO,
2966 "RX LOG CH EVNT STAT 0x%x, %d frames handled", chLogRxStat, channelCb->numFragmentCurrentChain);
2967 }
2968 }
2969
Jeff Johnson295189b2012-06-20 16:38:30 -07002970 if(eWLAN_PAL_STATUS_SUCCESS != status)
2971 {
2972 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
2973 "dxeRXEventHandler Handle Frame Ready Fail");
2974 return;
2975 }
2976
Jeff Johnson295189b2012-06-20 16:38:30 -07002977 /* Prepare Control Register EN Channel */
2978 if(!(dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_HIGH_PRI].extraConfig.chan_mask & WLANDXE_CH_CTRL_EN_MASK))
2979 {
2980 HDXE_ASSERT(0);
2981 }
Mihir Shetef2000552014-05-12 16:21:34 +05302982
2983 if (dxeCtxt->rxPalPacketUnavailable &&
2984 (WLANDXE_CH_STAT_INT_DONE_MASK & chHighStat))
2985 {
2986 chanMask = dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_HIGH_PRI].extraConfig.chan_mask &
2987 (~WLANDXE_CH_CTRL_INE_DONE_MASK);
Mihir Sheted183cef2014-09-26 19:17:56 +05302988 dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_HIGH_PRI].doneIntDisabled = 1;
Mihir Shetef2000552014-05-12 16:21:34 +05302989 }
2990 else
2991 {
2992 chanMask = dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_HIGH_PRI].extraConfig.chan_mask;
Mihir Sheted183cef2014-09-26 19:17:56 +05302993 dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_HIGH_PRI].doneIntDisabled = 0;
Mihir Shetef2000552014-05-12 16:21:34 +05302994 }
Leo Chang094ece82013-04-23 17:57:41 -07002995 wpalWriteRegister(dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_HIGH_PRI].channelRegister.chDXECtrlRegAddr,
Mihir Shetef2000552014-05-12 16:21:34 +05302996 chanMask);
Jeff Johnson295189b2012-06-20 16:38:30 -07002997
2998 /* Prepare Control Register EN Channel */
2999 if(!(dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOW_PRI].extraConfig.chan_mask & WLANDXE_CH_CTRL_EN_MASK))
3000 {
3001 HDXE_ASSERT(0);
3002 }
Leo Chang094ece82013-04-23 17:57:41 -07003003
Mihir Shetef2000552014-05-12 16:21:34 +05303004 if (dxeCtxt->rxPalPacketUnavailable &&
3005 (WLANDXE_CH_STAT_INT_DONE_MASK & chLowStat))
3006 {
3007 chanMask = dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOW_PRI].extraConfig.chan_mask &
3008 (~WLANDXE_CH_CTRL_INE_DONE_MASK);
Mihir Sheted183cef2014-09-26 19:17:56 +05303009 dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOW_PRI].doneIntDisabled = 1;
Mihir Shetef2000552014-05-12 16:21:34 +05303010 }
3011 else
3012 {
3013 chanMask = dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOW_PRI].extraConfig.chan_mask;
Mihir Sheted183cef2014-09-26 19:17:56 +05303014 dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOW_PRI].doneIntDisabled = 0;
Mihir Shetef2000552014-05-12 16:21:34 +05303015 }
Leo Chang094ece82013-04-23 17:57:41 -07003016 wpalWriteRegister(dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOW_PRI].channelRegister.chDXECtrlRegAddr,
Mihir Shetef2000552014-05-12 16:21:34 +05303017 chanMask);
3018
Mihir Shetee6618162015-03-16 14:48:42 +05303019 if (WLANDXE_IS_VALID_CHANNEL(WDTS_CHANNEL_RX_LOG))
3020 {
3021 if(!(dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOG].extraConfig.chan_mask & WLANDXE_CH_CTRL_EN_MASK))
3022 {
3023 HDXE_ASSERT(0);
3024 }
3025
3026 if (dxeCtxt->rxPalPacketUnavailable &&
3027 (WLANDXE_CH_STAT_INT_DONE_MASK & chLogRxStat))
3028 {
3029 chanMask = dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOG].extraConfig.chan_mask &
3030 (~WLANDXE_CH_CTRL_INE_DONE_MASK);
3031 dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOG].doneIntDisabled = 1;
3032 }
3033 else
3034 {
3035 chanMask = dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOG].extraConfig.chan_mask;
3036 dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOG].doneIntDisabled = 0;
3037 }
3038 wpalWriteRegister(dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOG].channelRegister.chDXECtrlRegAddr,
3039 chanMask);
3040 }
Leo Chang094ece82013-04-23 17:57:41 -07003041
3042 /* Clear Interrupt handle processing bit
3043 * RIVA may power down */
Mihir Sheted6274602015-04-28 16:13:21 +05303044 if (!wpalIsFwLoggingSupported())
3045 {
3046 wpalReadRegister(WLANDXE_INT_MASK_REG_ADDRESS, &regValue);
3047 regValue &= WLANDXE_RX_INTERRUPT_PRO_UNMASK;
3048 wpalWriteRegister(WLANDXE_INT_MASK_REG_ADDRESS, regValue);
3049 }
3050 else
3051 {
3052 wpalReadRegister(WALNDEX_DMA_CSR_ADDRESS, &regValue);
3053 regValue &= ~WLANDXE_RX_INTERRUPT_HANDLE_MASK;
3054 wpalWriteRegister(WALNDEX_DMA_CSR_ADDRESS, regValue);
3055 }
Jeff Johnson295189b2012-06-20 16:38:30 -07003056
Leo Chang416afe02013-07-01 13:58:13 -07003057 /* Enable system level ISR */
3058 /* Enable RX ready Interrupt at here */
3059 status = wpalEnableInterrupt(DXE_INTERRUPT_RX_READY);
3060 if(eWLAN_PAL_STATUS_SUCCESS != status)
3061 {
3062 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3063 "dxeRXEventHandler Enable RX Ready interrupt fail");
3064 return;
3065 }
3066
Jeff Johnson295189b2012-06-20 16:38:30 -07003067 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07003068 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07003069 return;
3070}
3071
3072/*==========================================================================
3073 @ Function Name
3074 dxeRXPacketAvailableEventHandler
3075
3076 @ Description
3077 Handle serialized RX Packet Available event when the corresponding callback
3078 is invoked by WPAL.
3079 Try to fill up any completed DXE descriptors with available Rx packet buffer
3080 pointers.
3081
3082 @ Parameters
3083 wpt_msg *rxPktAvailMsg
3084 RX frame ready MSG pointer
3085 include DXE control context
3086
3087 @ Return
3088 NONE
3089
3090===========================================================================*/
3091void dxeRXPacketAvailableEventHandler
3092(
3093 wpt_msg *rxPktAvailMsg
3094)
3095{
3096 WLANDXE_CtrlBlkType *dxeCtxt = NULL;
3097 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
3098 WLANDXE_ChannelCBType *channelCb = NULL;
3099
3100 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07003101 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07003102
3103 /* Sanity Check */
3104 if(NULL == rxPktAvailMsg)
3105 {
3106 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3107 "dxeRXPacketAvailableEventHandler Context is not valid");
3108 return;
3109 }
3110
3111 dxeCtxt = (WLANDXE_CtrlBlkType *)(rxPktAvailMsg->pContext);
Mihir Shete44547fb2014-03-10 14:15:42 +05303112
3113#ifdef WLAN_DXE_LOW_RESOURCE_TIMER
Leo Chang72cdfd32013-10-17 20:36:30 -07003114 /* Available resource allocated
3115 * Stop timer not needed */
3116 if(VOS_TIMER_STATE_RUNNING ==
3117 wpalTimerGetCurStatus(&dxeCtxt->rxResourceAvailableTimer))
3118 {
3119 wpalTimerStop(&dxeCtxt->rxResourceAvailableTimer);
3120 }
Mihir Shete44547fb2014-03-10 14:15:42 +05303121#endif
Jeff Johnson295189b2012-06-20 16:38:30 -07003122
3123 do
3124 {
3125 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
3126 "dxeRXPacketAvailableEventHandler, start refilling ring");
3127
3128 channelCb = &dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_HIGH_PRI];
3129 status = dxeRXFrameRefillRing(dxeCtxt,channelCb);
3130
3131 // Wait for another callback to indicate when Rx resources are available
3132 // again.
3133 if(eWLAN_PAL_STATUS_SUCCESS != status)
3134 {
3135 break;
3136 }
3137
3138 channelCb = &dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOW_PRI];
3139 status = dxeRXFrameRefillRing(dxeCtxt,channelCb);
3140 if(eWLAN_PAL_STATUS_SUCCESS != status)
3141 {
3142 break;
3143 }
Mihir Shetee6618162015-03-16 14:48:42 +05303144
3145 if (WLANDXE_IS_VALID_CHANNEL(WDTS_CHANNEL_RX_LOG))
3146 {
3147 channelCb = &dxeCtxt->dxeChannel[WDTS_CHANNEL_RX_LOG];
3148 status = dxeRXFrameRefillRing(dxeCtxt,channelCb);
3149 if(eWLAN_PAL_STATUS_SUCCESS != status)
3150 {
3151 break;
3152 }
3153 }
Jeff Johnson295189b2012-06-20 16:38:30 -07003154 } while(0);
3155
3156 if((WLANDXE_POWER_STATE_IMPS == dxeCtxt->hostPowerState) ||
3157 (WLANDXE_POWER_STATE_DOWN == dxeCtxt->hostPowerState))
3158 {
3159 /* Interrupt will not enabled at here, it will be enabled at PS mode change */
3160 tempDxeCtrlBlk->rxIntDisabledByIMPS = eWLAN_PAL_TRUE;
3161 }
3162}
3163
3164/*==========================================================================
3165 @ Function Name
3166 dxeRXISR
3167
3168 @ Description
3169 RX frame ready interrupt service routine
3170 interrupt entry function, this function called based on ISR context
3171 Must be serialized
3172
3173 @ Parameters
3174 void *hostCtxt
3175 DXE host driver control context,
3176 pre registerd during interrupt registration
3177
3178 @ Return
3179 NONE
3180
3181===========================================================================*/
3182static void dxeRXISR
3183(
3184 void *hostCtxt
3185)
3186{
3187 WLANDXE_CtrlBlkType *dxeCtxt = (WLANDXE_CtrlBlkType *)hostCtxt;
3188 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
Jeff Johnson295189b2012-06-20 16:38:30 -07003189 wpt_uint32 regValue;
Jeff Johnson295189b2012-06-20 16:38:30 -07003190
Leo Chang094ece82013-04-23 17:57:41 -07003191 /* Set Interrupt processing bit
3192 * During this bit set, WLAN HW may not power collapse */
Mihir Sheted6274602015-04-28 16:13:21 +05303193 if (!wpalIsFwLoggingSupported())
3194 {
3195 wpalReadRegister(WLANDXE_INT_MASK_REG_ADDRESS, &regValue);
3196 regValue |= WLANPAL_RX_INTERRUPT_PRO_MASK;
3197 wpalWriteRegister(WLANDXE_INT_MASK_REG_ADDRESS, regValue);
3198 }
3199 else
3200 {
3201 wpalReadRegister(WALNDEX_DMA_CSR_ADDRESS, &regValue);
3202 regValue |= WLANDXE_RX_INTERRUPT_HANDLE_MASK;
3203 wpalWriteRegister(WALNDEX_DMA_CSR_ADDRESS, regValue);
3204 }
Leo Chang094ece82013-04-23 17:57:41 -07003205
Jeff Johnson295189b2012-06-20 16:38:30 -07003206 /* Disable interrupt at here
3207 * Disable RX Ready system level Interrupt at here
3208 * Otherwise infinite loop might happen */
3209 status = wpalDisableInterrupt(DXE_INTERRUPT_RX_READY);
3210 if(eWLAN_PAL_STATUS_SUCCESS != status)
3211 {
3212 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3213 "dxeRXFrameReadyISR Disable RX ready interrupt fail");
3214 return;
3215 }
3216
3217 /* Serialize RX Ready interrupt upon RX thread */
Manjunathappa Prakashfb585462013-12-23 19:07:07 -08003218 if(NULL == dxeCtxt->rxIsrMsg)
3219 {
3220 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3221 "dxeRXFrameReadyISR NULL message");
3222 HDXE_ASSERT(0);
3223 return;
3224 }
3225
Jeff Johnson295189b2012-06-20 16:38:30 -07003226 status = wpalPostRxMsg(WDI_GET_PAL_CTX(),
3227 dxeCtxt->rxIsrMsg);
3228 if(eWLAN_PAL_STATUS_SUCCESS != status)
3229 {
Jeff Johnson295189b2012-06-20 16:38:30 -07003230 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
3231 "dxeRXFrameReadyISR interrupt serialize fail");
3232 }
3233
Jeff Johnson295189b2012-06-20 16:38:30 -07003234 return;
3235}
3236
3237/*==========================================================================
3238 @ Function Name
3239 dxeTXPushFrame
3240
3241 @ Description
3242 Push TX frame into DXE descriptor and DXE register
3243 Send notification to DXE register that TX frame is ready to transfer
3244
3245 @ Parameters
3246 WLANDXE_ChannelCBType *channelEntry
3247 Channel specific control block
3248 wpt_packet *palPacket
3249 Packet pointer ready to transfer
3250
3251 @ Return
3252 PAL_STATUS_T
3253===========================================================================*/
3254static wpt_status dxeTXPushFrame
3255(
3256 WLANDXE_ChannelCBType *channelEntry,
3257 wpt_packet *palPacket
3258)
3259{
3260 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
3261 WLANDXE_DescCtrlBlkType *currentCtrlBlk = NULL;
3262 WLANDXE_DescType *currentDesc = NULL;
3263 WLANDXE_DescType *firstDesc = NULL;
3264 WLANDXE_DescType *LastDesc = NULL;
3265 void *sourcePhysicalAddress = NULL;
3266 wpt_uint32 xferSize = 0;
Jeff Johnson295189b2012-06-20 16:38:30 -07003267 wpt_iterator iterator;
Leo Changac1d3612013-07-01 15:15:51 -07003268 wpt_uint32 isEmpty = 0;
Jeff Johnson295189b2012-06-20 16:38:30 -07003269
3270 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07003271 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07003272
Leo Changac1d3612013-07-01 15:15:51 -07003273 tempDxeCtrlBlk->smsmToggled = eWLAN_PAL_FALSE;
3274 if((0 == tempDxeCtrlBlk->dxeChannel[WDTS_CHANNEL_TX_LOW_PRI].numRsvdDesc) &&
3275 (0 == tempDxeCtrlBlk->dxeChannel[WDTS_CHANNEL_TX_HIGH_PRI].numRsvdDesc))
Jeff Johnson295189b2012-06-20 16:38:30 -07003276 {
Leo Changac1d3612013-07-01 15:15:51 -07003277 isEmpty = 1;
Jeff Johnson295189b2012-06-20 16:38:30 -07003278 }
3279
3280 channelEntry->numFragmentCurrentChain = 0;
3281 currentCtrlBlk = channelEntry->headCtrlBlk;
3282
3283 /* Initialize interator, TX is fragmented */
Jeff Johnson295189b2012-06-20 16:38:30 -07003284 status = wpalLockPacketForTransfer(palPacket);
3285 if(eWLAN_PAL_STATUS_SUCCESS != status)
3286 {
3287 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3288 "dxeTXPushFrame unable to lock packet");
3289 return status;
3290 }
3291
3292 status = wpalIteratorInit(&iterator, palPacket);
Jeff Johnson295189b2012-06-20 16:38:30 -07003293 if(eWLAN_PAL_STATUS_SUCCESS != status)
3294 {
3295 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3296 "dxeTXPushFrame iterator init fail");
3297 return status;
3298 }
3299
3300 /* !!!! Revisit break condition !!!!!!! */
3301 while(1)
3302 {
3303 /* Get current descriptor pointer from current control block */
3304 currentDesc = currentCtrlBlk->linkedDesc;
3305 if(NULL == firstDesc)
3306 {
3307 firstDesc = currentCtrlBlk->linkedDesc;
3308 }
3309 /* All control block will have same palPacket Pointer
3310 * to make logic simpler */
3311 currentCtrlBlk->xfrFrame = palPacket;
3312
3313 /* Get next fragment physical address and fragment size
3314 * if this is the first trial, will get first physical address
3315 * if no more fragment, Descriptor src address will be set as NULL, OK??? */
Jeff Johnson295189b2012-06-20 16:38:30 -07003316 status = wpalIteratorNext(&iterator,
3317 palPacket,
3318 &sourcePhysicalAddress,
3319 &xferSize);
3320 if((NULL == sourcePhysicalAddress) ||
3321 (0 == xferSize))
3322 {
3323 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
3324 "dxeTXPushFrame end of current frame");
3325 break;
3326 }
3327 if(eWLAN_PAL_STATUS_SUCCESS != status)
3328 {
3329 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3330 "dxeTXPushFrame Get next frame fail");
3331 return status;
3332 }
Jeff Johnson295189b2012-06-20 16:38:30 -07003333
3334 /* This is the LAST descriptor valid for this transaction */
3335 LastDesc = currentCtrlBlk->linkedDesc;
3336
3337 /* Program DXE descriptor */
3338 currentDesc->dxedesc.dxe_short_desc.srcMemAddrL =
Arun Kumar Khandavalli6119f7d2013-12-18 00:16:17 +05303339 WLANDXE_U32_SWAP_ENDIAN((wpt_uint32)(uintptr_t)sourcePhysicalAddress);
Jeff Johnson295189b2012-06-20 16:38:30 -07003340
3341 /* Just normal data transfer from aCPU Flat Memory to BMU Q */
3342 if((WDTS_CHANNEL_TX_LOW_PRI == channelEntry->channelType) ||
3343 (WDTS_CHANNEL_TX_HIGH_PRI == channelEntry->channelType))
3344 {
3345 currentDesc->dxedesc.dxe_short_desc.dstMemAddrL =
3346 WLANDXE_U32_SWAP_ENDIAN(channelEntry->channelConfig.refWQ);
3347 }
3348 else
3349 {
3350 /* Test specific H2H transfer, destination address already set
3351 * Do Nothing */
3352 }
3353 currentDesc->xfrSize = WLANDXE_U32_SWAP_ENDIAN(xferSize);
3354
3355 /* Program channel control register */
3356 /* First frame not set VAL bit, why ??? */
3357 if(0 == channelEntry->numFragmentCurrentChain)
3358 {
3359 currentDesc->descCtrl.ctrl = channelEntry->extraConfig.cw_ctrl_write;
3360 }
3361 else
3362 {
3363 currentDesc->descCtrl.ctrl = channelEntry->extraConfig.cw_ctrl_write_valid;
3364 }
3365
3366 /* Update statistics */
3367 channelEntry->numFragmentCurrentChain++;
3368 channelEntry->numFreeDesc--;
3369 channelEntry->numRsvdDesc++;
3370
3371 /* Get next control block */
3372 currentCtrlBlk = currentCtrlBlk->nextCtrlBlk;
3373 }
3374 channelEntry->numTotalFrame++;
3375 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
3376 "NUM TX FRAG %d, Total Frame %d",
3377 channelEntry->numFragmentCurrentChain, channelEntry->numTotalFrame);
3378
3379 /* Program Channel control register
3380 * Set as end of packet
3381 * Enable interrupt also for first code lock down
3382 * performace optimization, this will be revisited */
3383 if(NULL == LastDesc)
3384 {
3385 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3386 "dxeTXPushFrame NULL Last Descriptor, broken chain");
3387 return eWLAN_PAL_STATUS_E_FAULT;
3388 }
3389 LastDesc->descCtrl.ctrl = channelEntry->extraConfig.cw_ctrl_write_eop_int;
3390 /* Now First one also Valid ????
3391 * this procedure will prevent over handle descriptor from previous
3392 * TX trigger */
3393 firstDesc->descCtrl.ctrl = channelEntry->extraConfig.cw_ctrl_write_valid;
3394
3395 /* If in BMPS mode no need to notify the DXE Engine, notify SMSM instead */
3396 if(WLANDXE_RIVA_POWER_STATE_BMPS_UNKNOWN == tempDxeCtrlBlk->rivaPowerState)
3397 {
3398 /* Update channel head as next avaliable linked slot */
3399 channelEntry->headCtrlBlk = currentCtrlBlk;
Leo Changac1d3612013-07-01 15:15:51 -07003400 if(isEmpty)
3401 {
3402 tempDxeCtrlBlk->ringNotEmpty = eWLAN_PAL_TRUE;
3403 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
3404 "SMSM_ret LO=%d HI=%d",
3405 tempDxeCtrlBlk->dxeChannel[WDTS_CHANNEL_TX_LOW_PRI].numRsvdDesc,
3406 tempDxeCtrlBlk->dxeChannel[WDTS_CHANNEL_TX_HIGH_PRI].numRsvdDesc );
3407 dxeNotifySmsm(eWLAN_PAL_TRUE, eWLAN_PAL_FALSE);
3408 tempDxeCtrlBlk->smsmToggled = eWLAN_PAL_TRUE;
3409 }
Madan Mohan Koyyalamudi2edf6f62012-10-15 15:56:34 -07003410 return status;
Jeff Johnson295189b2012-06-20 16:38:30 -07003411 }
3412
3413 /* If DXE use external descriptor, registers are not needed to be programmed
3414 * Just after finish to program descriptor, tirigger to send */
3415 if(channelEntry->extraConfig.chan_mask & WLANDXE_CH_CTRL_EDEN_MASK)
3416 {
3417 /* Issue a dummy read from the DXE descriptor DDR location to
3418 ensure that any previously posted write to the descriptor
3419 completes. */
3420 if(channelEntry->extraConfig.cw_ctrl_write_valid != firstDesc->descCtrl.ctrl)
3421 {
3422 //HDXE_ASSERT(0);
3423 }
3424
3425 /* Everything is ready
3426 * Trigger to start DMA */
3427 status = wpalWriteRegister(channelEntry->channelRegister.chDXECtrlRegAddr,
3428 channelEntry->extraConfig.chan_mask);
3429 if(eWLAN_PAL_STATUS_SUCCESS != status)
3430 {
3431 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3432 "dxeTXPushFrame Write Channel Ctrl Register fail");
3433 return status;
3434 }
3435
3436 /* Update channel head as next avaliable linked slot */
3437 channelEntry->headCtrlBlk = currentCtrlBlk;
3438
3439 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07003440 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07003441 return status;
3442 }
3443
3444 /* If DXE not use external descriptor, program each registers */
3445 /* Circular buffer handle not need to program DESC register???
3446 * GEN5 code not programed RING buffer case
3447 * REVISIT THIS !!!!!! */
3448 if((WDTS_CHANNEL_TX_LOW_PRI == channelEntry->channelType) ||
3449 (WDTS_CHANNEL_TX_HIGH_PRI == channelEntry->channelType))
3450 {
3451 /* Destination address, assigned Work Q */
3452 status = wpalWriteRegister(channelEntry->channelRegister.chDXEDadrlRegAddr,
3453 channelEntry->channelConfig.refWQ);
3454 if(eWLAN_PAL_STATUS_SUCCESS != status)
3455 {
3456 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3457 "dxeTXPushFrame Program dest address register fail");
3458 return status;
3459 }
3460 /* If descriptor format is SHORT */
3461 if(channelEntry->channelConfig.useShortDescFmt)
3462 {
3463 status = wpalWriteRegister(channelEntry->channelRegister.chDXEDadrhRegAddr,
3464 0);
3465 if(eWLAN_PAL_STATUS_SUCCESS != status)
3466 {
3467 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3468 "dxeTXPushFrame Program dest address register fail");
3469 return status;
3470 }
3471 }
3472 else
3473 {
3474 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3475 "dxeTXPushFrame LONG Descriptor Format!!!");
3476 }
3477 }
Jeff Johnson295189b2012-06-20 16:38:30 -07003478
3479 /* Program Source address register
3480 * This address is already programmed into DXE Descriptor
3481 * But register also upadte */
3482 status = wpalWriteRegister(channelEntry->channelRegister.chDXESadrlRegAddr,
3483 WLANDXE_U32_SWAP_ENDIAN(firstDesc->dxedesc.dxe_short_desc.srcMemAddrL));
3484 if(eWLAN_PAL_STATUS_SUCCESS != status)
3485 {
3486 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3487 "dxeTXPushFrame Program src address register fail");
3488 return status;
3489 }
3490 /* If descriptor format is SHORT */
3491 if(channelEntry->channelConfig.useShortDescFmt)
3492 {
3493 status = wpalWriteRegister(channelEntry->channelRegister.chDXESadrhRegAddr,
3494 0);
3495 if(eWLAN_PAL_STATUS_SUCCESS != status)
3496 {
3497 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3498 "dxeTXPushFrame Program dest address register fail");
3499 return status;
3500 }
3501 }
3502 else
3503 {
3504 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3505 "dxeTXPushFrame LONG Descriptor Format!!!");
3506 }
3507
3508 /* Linked list Descriptor pointer */
3509 status = wpalWriteRegister(channelEntry->channelRegister.chDXEDesclRegAddr,
3510 channelEntry->headCtrlBlk->linkedDescPhyAddr);
3511 if(eWLAN_PAL_STATUS_SUCCESS != status)
3512 {
3513 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3514 "dxeTXPushFrame Write DESC Address register fail");
3515 return status;
3516 }
3517 /* If descriptor format is SHORT */
3518 if(channelEntry->channelConfig.useShortDescFmt)
3519 {
3520 status = wpalWriteRegister(channelEntry->channelRegister.chDXEDeschRegAddr,
3521 0);
3522 if(eWLAN_PAL_STATUS_SUCCESS != status)
3523 {
3524 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3525 "dxeTXPushFrame Program dest address register fail");
3526 return status;
3527 }
3528 }
3529 else
3530 {
3531 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3532 "dxeTXPushFrame LONG Descriptor Format!!!");
3533 }
3534
3535 /* Transfer Size */
3536 xferSize = WLANDXE_U32_SWAP_ENDIAN(firstDesc->xfrSize);
3537 status = wpalWriteRegister(channelEntry->channelRegister.chDXESzRegAddr,
3538 xferSize);
3539 if(eWLAN_PAL_STATUS_SUCCESS != status)
3540 {
3541 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3542 "dxeTXPushFrame Write DESC Address register fail");
3543 return status;
3544 }
3545
3546 /* Everything is ready
3547 * Trigger to start DMA */
3548 status = wpalWriteRegister(channelEntry->channelRegister.chDXECtrlRegAddr,
3549 channelEntry->extraConfig.chan_mask);
3550 if(eWLAN_PAL_STATUS_SUCCESS != status)
3551 {
3552 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3553 "dxeTXPushFrame Write Channel Ctrl Register fail");
3554 return status;
3555 }
3556
3557 /* Update channel head as next avaliable linked slot */
3558 channelEntry->headCtrlBlk = currentCtrlBlk;
3559
3560 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07003561 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07003562 return status;
3563}
3564
3565/*==========================================================================
3566 @ Function Name
3567 dxeTXCompFrame
3568
3569 @ Description
3570 TX Frame transfer complete event handler
3571
3572 @ Parameters
3573 WLANDXE_CtrlBlkType *dxeCtrlBlk,
3574 DXE host driver main control block
3575 WLANDXE_ChannelCBType *channelEntry
3576 Channel specific control block
3577
3578 @ Return
3579 PAL_STATUS_T
3580===========================================================================*/
3581static wpt_status dxeTXCompFrame
3582(
3583 WLANDXE_CtrlBlkType *hostCtxt,
3584 WLANDXE_ChannelCBType *channelEntry
3585)
3586{
3587 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
3588 WLANDXE_DescCtrlBlkType *currentCtrlBlk = NULL;
3589 WLANDXE_DescType *currentDesc = NULL;
3590 wpt_uint32 descCtrlValue = 0;
3591 unsigned int *lowThreshold = NULL;
3592
3593 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07003594 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07003595
3596 /* Sanity */
3597 if((NULL == hostCtxt) || (NULL == channelEntry))
3598 {
3599 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3600 "dxeTXCompFrame Invalid ARG");
3601 return eWLAN_PAL_STATUS_E_INVAL;
3602 }
3603
3604 if(NULL == hostCtxt->txCompCB)
3605 {
3606 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3607 "dxeTXCompFrame TXCompCB is not registered");
Jeff Johnsone7245742012-09-05 17:12:55 -07003608 return eWLAN_PAL_STATUS_SUCCESS;
Jeff Johnson295189b2012-06-20 16:38:30 -07003609 }
3610
Madan Mohan Koyyalamudib2cb8be2012-11-27 15:07:43 -08003611 status = wpalMutexAcquire(&channelEntry->dxeChannelLock);
3612 if(eWLAN_PAL_STATUS_SUCCESS != status)
3613 {
3614 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3615 "dxeTXCompFrame Mutex Acquire fail");
3616 return status;
3617 }
3618
Jeff Johnson295189b2012-06-20 16:38:30 -07003619 currentCtrlBlk = channelEntry->tailCtrlBlk;
3620 currentDesc = currentCtrlBlk->linkedDesc;
3621
3622 if( currentCtrlBlk == channelEntry->headCtrlBlk )
3623 {
Madan Mohan Koyyalamudib2cb8be2012-11-27 15:07:43 -08003624 status = wpalMutexRelease(&channelEntry->dxeChannelLock);
3625 if(eWLAN_PAL_STATUS_SUCCESS != status)
3626 {
3627 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3628 "dxeTXCompFrame Mutex Release fail");
3629 return status;
3630 }
Jeff Johnsone7245742012-09-05 17:12:55 -07003631 return eWLAN_PAL_STATUS_SUCCESS;
Jeff Johnson295189b2012-06-20 16:38:30 -07003632 }
3633
Kiet Lam842dad02014-02-18 18:44:02 -08003634
Jeff Johnson295189b2012-06-20 16:38:30 -07003635 while(1)
3636 {
3637// HDXE_ASSERT(WLAN_PAL_IS_STATUS_SUCCESS(WLAN_RivaValidateDesc(currentDesc)));
3638 descCtrlValue = currentDesc->descCtrl.ctrl;
3639 if((descCtrlValue & WLANDXE_DESC_CTRL_VALID))
3640 {
3641 /* caught up with head, bail out */
3642 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_MED,
3643 "dxeTXCompFrame caught up with head - next DESC has VALID set");
3644 break;
3645 }
3646
Manjunathappa Prakashfb585462013-12-23 19:07:07 -08003647 if(currentCtrlBlk->xfrFrame == NULL)
3648 {
3649 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3650 "Invalid transfer frame");
3651 HDXE_ASSERT(0);
3652 break;
3653 }
Jeff Johnson295189b2012-06-20 16:38:30 -07003654 channelEntry->numFreeDesc++;
3655 channelEntry->numRsvdDesc--;
3656
3657 /* Send Frame TX Complete notification with frame start fragment location */
3658 if(WLANDXE_U32_SWAP_ENDIAN(descCtrlValue) & WLANDXE_DESC_CTRL_EOP)
3659 {
3660 hostCtxt->txCompletedFrames--;
Jeff Johnson295189b2012-06-20 16:38:30 -07003661 status = wpalUnlockPacket(currentCtrlBlk->xfrFrame);
3662 if (eWLAN_PAL_STATUS_SUCCESS != status)
3663 {
3664 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3665 "dxeRXFrameReady unable to unlock packet");
Madan Mohan Koyyalamudib2cb8be2012-11-27 15:07:43 -08003666 status = wpalMutexRelease(&channelEntry->dxeChannelLock);
3667 if(eWLAN_PAL_STATUS_SUCCESS != status)
3668 {
3669 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3670 "dxeTXCompFrame Mutex Release fail");
3671 }
Jeff Johnson295189b2012-06-20 16:38:30 -07003672 return status;
3673 }
Jeff Johnson295189b2012-06-20 16:38:30 -07003674 hostCtxt->txCompCB(hostCtxt->clientCtxt,
3675 currentCtrlBlk->xfrFrame,
3676 eWLAN_PAL_STATUS_SUCCESS);
3677 channelEntry->numFragmentCurrentChain = 0;
3678 }
3679 currentCtrlBlk = currentCtrlBlk->nextCtrlBlk;
3680 currentDesc = currentCtrlBlk->linkedDesc;
3681
3682 /* Break condition
3683 * Head control block is the control block must be programed for the next TX
3684 * so, head control block is not programmed control block yet
3685 * if loop encounte head control block, stop to complete
3686 * in theory, COMP CB must be called already ??? */
3687 if(currentCtrlBlk == channelEntry->headCtrlBlk)
3688 {
3689 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_MED,
3690 "dxeTXCompFrame caught up with head ptr");
3691 break;
3692 }
3693 /* VALID Bit check ???? */
3694 }
3695
3696 /* Tail and Head Control block must be same */
3697 channelEntry->tailCtrlBlk = currentCtrlBlk;
3698
3699 lowThreshold = channelEntry->channelType == WDTS_CHANNEL_TX_LOW_PRI?
3700 &(hostCtxt->txCompInt.txLowResourceThreshold_LoPriCh):
3701 &(hostCtxt->txCompInt.txLowResourceThreshold_HiPriCh);
3702
3703 /* If specific channel hit low resource condition send notification to upper layer */
3704 if((eWLAN_PAL_TRUE == channelEntry->hitLowResource) &&
3705 (channelEntry->numFreeDesc > *lowThreshold))
3706 {
3707 /* Change it back if we raised it for fetching a remaining packet from TL */
3708 if(WLANDXE_TX_LOW_RES_THRESHOLD > *lowThreshold)
3709 {
3710 *lowThreshold = WLANDXE_TX_LOW_RES_THRESHOLD;
3711 }
3712
3713 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
3714 "DXE TX %d channel recovered from low resource", channelEntry->channelType);
3715 hostCtxt->lowResourceCB(hostCtxt->clientCtxt,
3716 channelEntry->channelType,
3717 eWLAN_PAL_TRUE);
3718 channelEntry->hitLowResource = eWLAN_PAL_FALSE;
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -07003719 wpalTimerStop(&channelEntry->healthMonitorTimer);
Jeff Johnson295189b2012-06-20 16:38:30 -07003720 }
3721
Madan Mohan Koyyalamudib2cb8be2012-11-27 15:07:43 -08003722 status = wpalMutexRelease(&channelEntry->dxeChannelLock);
3723 if(eWLAN_PAL_STATUS_SUCCESS != status)
3724 {
3725 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3726 "dxeTXCompFrame Mutex Release fail");
3727 }
Jeff Johnson295189b2012-06-20 16:38:30 -07003728
3729 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07003730 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07003731 return status;
3732}
3733
3734/*==========================================================================
3735 @ Function Name
3736 dxeTXEventHandler
3737
3738 @ Description
3739 If DXE HW sends TX related interrupt, this event handler will be called
3740 Handle higher priority channel first
3741 Figureout why interrupt happen and call appropriate final even handler
3742 TX complete or error happen
3743
3744 @ Parameters
3745 void *msgPtr
3746 Even MSG
3747
3748 @ Return
3749 PAL_STATUS_T
3750===========================================================================*/
3751void dxeTXEventHandler
3752(
3753 wpt_msg *msgPtr
3754)
3755{
3756 wpt_msg *msgContent = (wpt_msg *)msgPtr;
3757 WLANDXE_CtrlBlkType *dxeCtxt = NULL;
3758 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
3759 wpt_uint32 intSrc = 0;
3760 wpt_uint32 chStat = 0;
3761 WLANDXE_ChannelCBType *channelCb = NULL;
3762
Madan Mohan Koyyalamudi48e375a2012-09-24 13:19:17 -07003763 wpt_uint8 bEnableISR = 0;
Madan Mohan Koyyalamudidfd6aa82012-10-18 20:18:43 -07003764 static wpt_uint8 successiveIntWithIMPS;
Jeff Johnson295189b2012-06-20 16:38:30 -07003765
3766 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07003767 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07003768
3769 dxeCtxt = (WLANDXE_CtrlBlkType *)(msgContent->pContext);
Jeff Johnsone7245742012-09-05 17:12:55 -07003770 dxeCtxt->ucTxMsgCnt = 0;
3771
3772 if(eWLAN_PAL_TRUE == dxeCtxt->driverReloadInProcessing)
3773 {
3774 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3775 "wlan: TX COMP WLAN Driver re-loading in progress");
3776 return;
3777 }
3778
Jeff Johnson295189b2012-06-20 16:38:30 -07003779 /* Return from here if the RIVA is in IMPS, to avoid register access */
3780 if(WLANDXE_POWER_STATE_IMPS == dxeCtxt->hostPowerState)
3781 {
Madan Mohan Koyyalamudi48e375a2012-09-24 13:19:17 -07003782 successiveIntWithIMPS++;
Jeff Johnsone7245742012-09-05 17:12:55 -07003783 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
Madan Mohan Koyyalamudi48e375a2012-09-24 13:19:17 -07003784 "dxeTXEventHandler IMPS TX COMP INT successiveIntWithIMPS %d", successiveIntWithIMPS);
Jeff Johnsone7245742012-09-05 17:12:55 -07003785 status = dxeTXCompFrame(dxeCtxt, &dxeCtxt->dxeChannel[WDTS_CHANNEL_TX_HIGH_PRI]);
3786 if(eWLAN_PAL_STATUS_SUCCESS != status)
3787 {
3788 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
Madan Mohan Koyyalamudi48e375a2012-09-24 13:19:17 -07003789 "dxeTXEventHandler IMPS HC COMP interrupt fail");
Jeff Johnsone7245742012-09-05 17:12:55 -07003790 }
Madan Mohan Koyyalamudi1bed5982012-10-22 14:38:06 -07003791
Madan Mohan Koyyalamudi48e375a2012-09-24 13:19:17 -07003792 status = dxeTXCompFrame(dxeCtxt, &dxeCtxt->dxeChannel[WDTS_CHANNEL_TX_LOW_PRI]);
3793 if(eWLAN_PAL_STATUS_SUCCESS != status)
3794 {
3795 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3796 "dxeTXEventHandler IMPS LC COMP interrupt fail");
3797 }
3798
3799 if(((dxeCtxt->txCompletedFrames) &&
3800 (eWLAN_PAL_FALSE == dxeCtxt->txIntEnable)) &&
3801 (successiveIntWithIMPS == 1))
Jeff Johnsone7245742012-09-05 17:12:55 -07003802 {
3803 dxeCtxt->txIntEnable = eWLAN_PAL_TRUE;
3804 wpalEnableInterrupt(DXE_INTERRUPT_TX_COMPLE);
3805 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
Madan Mohan Koyyalamudide2f8ab2012-11-08 15:08:14 -08003806 "TX COMP INT Enabled, remain TX frame count on ring %d",
3807 dxeCtxt->txCompletedFrames);
Jeff Johnsone7245742012-09-05 17:12:55 -07003808 /*Kicking the DXE after the TX Complete interrupt was enabled - to avoid
3809 the posibility of a race*/
3810 dxePsComplete(dxeCtxt, eWLAN_PAL_TRUE);
3811 }
Madan Mohan Koyyalamudi48e375a2012-09-24 13:19:17 -07003812 else
3813 {
3814 dxeCtxt->txIntEnable = eWLAN_PAL_FALSE;
3815 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3816 "TX COMP INT NOT Enabled, RIVA still wake up? remain TX frame count on ring %d, successiveIntWithIMPS %d",
3817 dxeCtxt->txCompletedFrames, successiveIntWithIMPS);
3818 }
Jeff Johnson295189b2012-06-20 16:38:30 -07003819 return;
3820 }
3821
Madan Mohan Koyyalamudi48e375a2012-09-24 13:19:17 -07003822 successiveIntWithIMPS = 0;
Jeff Johnson295189b2012-06-20 16:38:30 -07003823 if((!dxeCtxt->dxeChannel[WDTS_CHANNEL_TX_HIGH_PRI].extraConfig.chEnabled) ||
3824 (!dxeCtxt->dxeChannel[WDTS_CHANNEL_TX_LOW_PRI].extraConfig.chEnabled))
3825 {
3826 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3827 "DXE already stopped in TX event handler. Just return");
3828 return;
3829 }
3830
Jeff Johnson295189b2012-06-20 16:38:30 -07003831 /* Disable device interrupt */
3832 /* Read whole interrupt mask register and exclusive only this channel int */
3833 status = wpalReadRegister(WLANDXE_INT_SRC_RAW_ADDRESS,
3834 &intSrc);
3835 if(eWLAN_PAL_STATUS_SUCCESS != status)
3836 {
3837 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3838 "dxeTXCompleteEventHandler Read INT_DONE_SRC register fail");
3839 return;
3840 }
3841 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_MED,
3842 "TX Event Handler INT Source 0x%x", intSrc);
3843
3844 /* Test High Priority Channel is the INT source or not */
3845 channelCb = &dxeCtxt->dxeChannel[WDTS_CHANNEL_TX_HIGH_PRI];
3846 if(intSrc & (1 << channelCb->assignedDMAChannel))
3847 {
3848 status = dxeChannelCleanInt(channelCb, &chStat);
3849 if(eWLAN_PAL_STATUS_SUCCESS != status)
3850 {
3851 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3852 "dxeTXEventHandler INT Clean up fail");
3853 return;
3854 }
3855
3856 if(WLANDXE_CH_STAT_INT_ERR_MASK & chStat)
3857 {
3858 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
Madan Mohan Koyyalamudide2f8ab2012-11-08 15:08:14 -08003859 "%11s : 0x%x Error Reported, Reload Driver",
3860 channelType[channelCb->channelType], chStat);
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +05303861
Mihir Shete79d6b582014-03-12 17:54:07 +05303862 dxeErrChannelDebug(channelCb, chStat);
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +05303863
Madan Mohan Koyyalamudide2f8ab2012-11-08 15:08:14 -08003864 dxeCtxt->driverReloadInProcessing = eWLAN_PAL_TRUE;
3865 wpalWlanReload();
Mihir Shetefdc9f532014-01-09 15:03:02 +05303866 dxeStartSSRTimer(dxeCtxt);
Jeff Johnson295189b2012-06-20 16:38:30 -07003867 }
3868 else if(WLANDXE_CH_STAT_INT_DONE_MASK & chStat)
3869 {
3870 /* Handle TX complete for high priority channel */
3871 status = dxeTXCompFrame(dxeCtxt,
3872 channelCb);
Jeff Johnsone7245742012-09-05 17:12:55 -07003873 bEnableISR = 1;
Jeff Johnson295189b2012-06-20 16:38:30 -07003874 }
3875 else if(WLANDXE_CH_STAT_INT_ED_MASK & chStat)
3876 {
3877 /* Handle TX complete for high priority channel */
3878 status = dxeTXCompFrame(dxeCtxt,
3879 channelCb);
Jeff Johnsone7245742012-09-05 17:12:55 -07003880 bEnableISR = 1;
Jeff Johnson295189b2012-06-20 16:38:30 -07003881 }
3882 else
3883 {
3884 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3885 "dxeTXEventHandler TX HI status=%x", chStat);
3886 }
3887
3888 if(WLANDXE_CH_STAT_MASKED_MASK & chStat)
3889 {
3890 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_HIGH,
3891 "dxeTXEventHandler TX HIGH Channel Masked Unmask it!!!!");
3892 }
3893
3894 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_HIGH,
3895 "TX HIGH STAT 0x%x RESRVD %d", chStat, channelCb->numRsvdDesc);
3896 }
3897
3898 /* Test Low Priority Channel interrupt is enabled or not */
3899 channelCb = &dxeCtxt->dxeChannel[WDTS_CHANNEL_TX_LOW_PRI];
3900 if(intSrc & (1 << channelCb->assignedDMAChannel))
3901 {
3902 status = dxeChannelCleanInt(channelCb, &chStat);
3903 if(eWLAN_PAL_STATUS_SUCCESS != status)
3904 {
3905 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3906 "dxeTXEventHandler INT Clean up fail");
3907 return;
3908 }
3909
3910 if(WLANDXE_CH_STAT_INT_ERR_MASK & chStat)
3911 {
3912 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
Madan Mohan Koyyalamudide2f8ab2012-11-08 15:08:14 -08003913 "%11s : 0x%x Error Reported, Reload Driver",
3914 channelType[channelCb->channelType], chStat);
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +05303915
Mihir Shete79d6b582014-03-12 17:54:07 +05303916 dxeErrChannelDebug(channelCb, chStat);
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +05303917
Madan Mohan Koyyalamudide2f8ab2012-11-08 15:08:14 -08003918 dxeCtxt->driverReloadInProcessing = eWLAN_PAL_TRUE;
3919 wpalWlanReload();
Mihir Shetefdc9f532014-01-09 15:03:02 +05303920 dxeStartSSRTimer(dxeCtxt);
Jeff Johnson295189b2012-06-20 16:38:30 -07003921 }
3922 else if(WLANDXE_CH_STAT_INT_DONE_MASK & chStat)
3923 {
3924 /* Handle TX complete for low priority channel */
3925 status = dxeTXCompFrame(dxeCtxt,
3926 channelCb);
Jeff Johnsone7245742012-09-05 17:12:55 -07003927 bEnableISR = 1;
Jeff Johnson295189b2012-06-20 16:38:30 -07003928 }
3929 else if(WLANDXE_CH_STAT_INT_ED_MASK & chStat)
3930 {
3931 /* Handle TX complete for low priority channel */
3932 status = dxeTXCompFrame(dxeCtxt,
3933 channelCb);
Jeff Johnsone7245742012-09-05 17:12:55 -07003934 bEnableISR = 1;
Jeff Johnson295189b2012-06-20 16:38:30 -07003935 }
3936 else
3937 {
3938 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
3939 "dxeTXEventHandler TX LO status=%x", chStat);
3940 }
3941
3942 if(WLANDXE_CH_STAT_MASKED_MASK & chStat)
3943 {
3944 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_HIGH,
3945 "dxeTXEventHandler TX Low Channel Masked Unmask it!!!!");
3946 }
3947 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO,
3948 "TX LOW STAT 0x%x RESRVD %d", chStat, channelCb->numRsvdDesc);
3949 }
3950
3951
Jeff Johnson295189b2012-06-20 16:38:30 -07003952 if((bEnableISR || (dxeCtxt->txCompletedFrames)) &&
3953 (eWLAN_PAL_FALSE == dxeCtxt->txIntEnable))
3954 {
3955 dxeCtxt->txIntEnable = eWLAN_PAL_TRUE;
3956 wpalEnableInterrupt(DXE_INTERRUPT_TX_COMPLE);
Madan Mohan Koyyalamudide2f8ab2012-11-08 15:08:14 -08003957 if(0 != dxeCtxt->txCompletedFrames)
3958 {
3959 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
3960 "TX COMP INT Enabled, remain TX frame count on ring %d",
3961 dxeCtxt->txCompletedFrames);
3962 }
Jeff Johnson295189b2012-06-20 16:38:30 -07003963 }
3964
3965 /*Kicking the DXE after the TX Complete interrupt was enabled - to avoid
3966 the posibility of a race*/
3967 dxePsComplete(dxeCtxt, eWLAN_PAL_TRUE);
3968
3969 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07003970 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07003971 return;
3972}
3973
3974
3975/*==========================================================================
3976 @ Function Name
3977 dxeTXCompleteProcessing
3978
3979 @ Description
3980 If DXE HW sends TX related interrupt, this event handler will be called
3981 Handle higher priority channel first
3982 Figureout why interrupt happen and call appropriate final even handler
3983 TX complete or error happen
3984
3985 @ Parameters
3986 dxeCtxt DXE context
3987
3988 @ Return
3989 PAL_STATUS_T
3990===========================================================================*/
3991void dxeTXCompleteProcessing
3992(
3993 WLANDXE_CtrlBlkType *dxeCtxt
3994)
3995{
3996 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
3997 WLANDXE_ChannelCBType *channelCb = NULL;
3998
3999 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07004000 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07004001
4002 /* Test High Priority Channel is the INT source or not */
4003 channelCb = &dxeCtxt->dxeChannel[WDTS_CHANNEL_TX_HIGH_PRI];
4004
4005 /* Handle TX complete for high priority channel */
4006 status = dxeTXCompFrame(dxeCtxt, channelCb);
4007
4008 /* Test Low Priority Channel interrupt is enabled or not */
4009 channelCb = &dxeCtxt->dxeChannel[WDTS_CHANNEL_TX_LOW_PRI];
4010
4011 /* Handle TX complete for low priority channel */
4012 status = dxeTXCompFrame(dxeCtxt, channelCb);
4013
4014 if((eWLAN_PAL_FALSE == dxeCtxt->txIntEnable) &&
4015 ((dxeCtxt->txCompletedFrames > 0) ||
4016 (WLANDXE_POWER_STATE_FULL == dxeCtxt->hostPowerState)))
4017 {
4018 dxeCtxt->txIntEnable = eWLAN_PAL_TRUE;
4019 wpalEnableInterrupt(DXE_INTERRUPT_TX_COMPLE);
4020 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07004021 "%s %s : %d, %s : %d", __func__,
Jeff Johnson295189b2012-06-20 16:38:30 -07004022 channelType[dxeCtxt->dxeChannel[WDTS_CHANNEL_TX_HIGH_PRI].channelType],
4023 dxeCtxt->dxeChannel[WDTS_CHANNEL_TX_HIGH_PRI].numRsvdDesc,
4024 channelType[dxeCtxt->dxeChannel[WDTS_CHANNEL_TX_LOW_PRI].channelType],
4025 dxeCtxt->dxeChannel[WDTS_CHANNEL_TX_LOW_PRI].numRsvdDesc);
Leo Changac1d3612013-07-01 15:15:51 -07004026
4027 if((WLANDXE_POWER_STATE_FULL != dxeCtxt->hostPowerState) &&
4028 (eWLAN_PAL_FALSE == tempDxeCtrlBlk->smsmToggled))
4029 {
4030 /* After TX Comp processing, still remaining frame on the DXE TX ring
4031 * And when push frame, RING was not empty marked
4032 * Then when push frame, no SMSM toggle happen
4033 * To avoid permanent TX stall, SMSM toggle is needed at here
4034 * With this toggle, host should gaurantee SMSM state should be changed */
Mihir Shete68ed77a2014-10-10 10:47:12 +05304035 dxeNotifySmsm(eWLAN_PAL_TRUE, dxeCtxt->txRingsEmpty);
Leo Changac1d3612013-07-01 15:15:51 -07004036 }
Jeff Johnson295189b2012-06-20 16:38:30 -07004037 }
4038
4039 /*Kicking the DXE after the TX Complete interrupt was enabled - to avoid
4040 the posibility of a race*/
4041 dxePsComplete(dxeCtxt, eWLAN_PAL_FALSE);
4042
4043 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07004044 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07004045 return;
4046}
Madan Mohan Koyyalamudi7f1020d2012-09-28 15:29:03 -07004047
4048/*==========================================================================
4049 @ Function Name
4050 dxeTXReSyncDesc
4051
4052 @ Description
4053 When STA comeout from IMPS, check DXE TX next transfer candidate descriptor
4054 And HW programmed descriptor.
4055 If any async happen between HW/SW TX stall will happen
4056
4057 @ Parameters
4058 void *msgPtr
4059 Message pointer to sync with TX thread
4060
4061 @ Return
4062 NONE
4063===========================================================================*/
4064void dxeTXReSyncDesc
4065(
4066 wpt_msg *msgPtr
4067)
4068{
4069 wpt_msg *msgContent = (wpt_msg *)msgPtr;
4070 WLANDXE_CtrlBlkType *pDxeCtrlBlk;
4071 wpt_uint32 nextDescReg;
4072 WLANDXE_ChannelCBType *channelEntry;
4073 WLANDXE_DescCtrlBlkType *validCtrlBlk;
4074 wpt_uint32 descLoop;
Madan Mohan Koyyalamudi01d7c532012-10-15 15:49:02 -07004075 wpt_uint32 channelLoop;
Madan Mohan Koyyalamudi7f1020d2012-09-28 15:29:03 -07004076
4077 if(NULL == msgContent)
4078 {
4079 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4080 "dxeTXReSyncDesc Invalid Control Block");
4081 return;
4082 }
4083
4084 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
4085 "dxeTXReSyncDesc Try to re-sync TX channel if any problem");
4086 pDxeCtrlBlk = (WLANDXE_CtrlBlkType *)(msgContent->pContext);
4087
Madan Mohan Koyyalamudi01d7c532012-10-15 15:49:02 -07004088 for(channelLoop = WDTS_CHANNEL_TX_LOW_PRI; channelLoop < WDTS_CHANNEL_RX_LOW_PRI; channelLoop++)
Madan Mohan Koyyalamudi7f1020d2012-09-28 15:29:03 -07004089 {
Madan Mohan Koyyalamudi01d7c532012-10-15 15:49:02 -07004090 channelEntry = &pDxeCtrlBlk->dxeChannel[channelLoop];
4091 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
4092 "%11s : Try to detect TX descriptor async", channelType[channelEntry->channelType]);
4093 wpalReadRegister(channelEntry->channelRegister.chDXEDesclRegAddr,
4094 &nextDescReg);
4095 /* Async detect without TX pending frame */
4096 if(channelEntry->tailCtrlBlk == channelEntry->headCtrlBlk)
Madan Mohan Koyyalamudi7f1020d2012-09-28 15:29:03 -07004097 {
Madan Mohan Koyyalamudi01d7c532012-10-15 15:49:02 -07004098 if(nextDescReg != channelEntry->tailCtrlBlk->linkedDescPhyAddr)
Madan Mohan Koyyalamudi7f1020d2012-09-28 15:29:03 -07004099 {
Madan Mohan Koyyalamudi01d7c532012-10-15 15:49:02 -07004100 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
4101 "TX Async no Pending frame");
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +05304102
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -07004103 dxeChannelMonitor("!!! TX Async no Pending frame !!!", channelEntry, NULL);
4104 dxeChannelRegisterDump(channelEntry, "!!! TX Async no Pending frame !!!", NULL);
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +05304105
Madan Mohan Koyyalamudi7f1020d2012-09-28 15:29:03 -07004106 wpalWriteRegister(channelEntry->channelRegister.chDXEDesclRegAddr,
Madan Mohan Koyyalamudi01d7c532012-10-15 15:49:02 -07004107 channelEntry->tailCtrlBlk->linkedDescPhyAddr);
Madan Mohan Koyyalamudi7f1020d2012-09-28 15:29:03 -07004108 }
Madan Mohan Koyyalamudi7f1020d2012-09-28 15:29:03 -07004109 }
Madan Mohan Koyyalamudi01d7c532012-10-15 15:49:02 -07004110 /* Async detect with some TX pending frames
4111 * next descriptor register should sync with first valid descriptor */
4112 else
Madan Mohan Koyyalamudi7f1020d2012-09-28 15:29:03 -07004113 {
Madan Mohan Koyyalamudi01d7c532012-10-15 15:49:02 -07004114 validCtrlBlk = channelEntry->tailCtrlBlk;
4115 for(descLoop = 0; descLoop < channelEntry->numDesc; descLoop++)
Madan Mohan Koyyalamudi7f1020d2012-09-28 15:29:03 -07004116 {
Madan Mohan Koyyalamudi01d7c532012-10-15 15:49:02 -07004117 if(validCtrlBlk->linkedDesc->descCtrl.ctrl & WLANDXE_DESC_CTRL_VALID)
4118 {
4119 if(nextDescReg != validCtrlBlk->linkedDescPhyAddr)
4120 {
4121 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
4122 "TX Async");
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +05304123
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -07004124 dxeChannelMonitor("!!! TX Async !!!", channelEntry, NULL);
4125 dxeChannelRegisterDump(channelEntry, "!!! TX Async !!!", NULL);
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +05304126
Madan Mohan Koyyalamudi01d7c532012-10-15 15:49:02 -07004127 wpalWriteRegister(channelEntry->channelRegister.chDXEDesclRegAddr,
4128 validCtrlBlk->linkedDescPhyAddr);
4129 }
4130 break;
4131 }
4132 validCtrlBlk = (WLANDXE_DescCtrlBlkType *)validCtrlBlk->nextCtrlBlk;
4133 if(validCtrlBlk == channelEntry->headCtrlBlk->nextCtrlBlk)
4134 {
4135 /* Finished to test till head control blcok, but could not find valid descriptor
4136 * from head to tail all descriptors are invalidated
4137 * host point of view head descriptor is next TX candidate
4138 * So, next descriptor control have to be programmed with head descriptor
4139 * check */
4140 if(nextDescReg != channelEntry->headCtrlBlk->linkedDescPhyAddr)
4141 {
4142 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
Jeff Johnsonab79c8d2012-12-10 14:30:13 -08004143 "TX Async with not completed transferred frames, next descriptor must be head");
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +05304144
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -07004145 dxeChannelMonitor("!!! TX Async !!!", channelEntry, NULL);
4146 dxeChannelRegisterDump(channelEntry, "!!! TX Async !!!", NULL);
Madan Mohan Koyyalamudi62080282013-08-05 12:51:17 +05304147
Madan Mohan Koyyalamudi01d7c532012-10-15 15:49:02 -07004148 wpalWriteRegister(channelEntry->channelRegister.chDXEDesclRegAddr,
4149 validCtrlBlk->linkedDescPhyAddr);
4150 }
4151 break;
4152 }
Madan Mohan Koyyalamudi7f1020d2012-09-28 15:29:03 -07004153 }
Madan Mohan Koyyalamudi7f1020d2012-09-28 15:29:03 -07004154 }
Madan Mohan Koyyalamudi7f1020d2012-09-28 15:29:03 -07004155 }
4156
Madan Mohan Koyyalamudi5f57c102012-10-15 15:52:54 -07004157 /* HW/SW descriptor resync is done.
4158 * Next if there are any valid descriptor in chain, Push to HW again */
4159 for(channelLoop = WDTS_CHANNEL_TX_LOW_PRI; channelLoop < WDTS_CHANNEL_RX_LOW_PRI; channelLoop++)
4160 {
4161 channelEntry = &pDxeCtrlBlk->dxeChannel[channelLoop];
4162 if(channelEntry->tailCtrlBlk == channelEntry->headCtrlBlk)
4163 {
4164 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
4165 "%11s : No TX Pending frame",
4166 channelType[channelEntry->channelType]);
4167 /* No Pending frame, Do nothing */
4168 }
4169 else
4170 {
4171 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
4172 "%11s : TX Pending frame, process it",
4173 channelType[channelEntry->channelType]);
4174 validCtrlBlk = channelEntry->tailCtrlBlk;
4175 for(descLoop = 0; descLoop < channelEntry->numDesc; descLoop++)
4176 {
4177 if(validCtrlBlk->linkedDesc->descCtrl.ctrl & WLANDXE_DESC_CTRL_VALID)
4178 {
4179 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
4180 "%11s : when exit IMPS found valid descriptor",
4181 channelType[channelEntry->channelType]);
4182
4183 /* Found valid descriptor, kick DXE */
4184 wpalWriteRegister(channelEntry->channelRegister.chDXECtrlRegAddr,
4185 channelEntry->extraConfig.chan_mask);
4186 break;
4187 }
4188 validCtrlBlk = (WLANDXE_DescCtrlBlkType *)validCtrlBlk->nextCtrlBlk;
4189 if(validCtrlBlk == channelEntry->headCtrlBlk->nextCtrlBlk)
4190 {
4191 /* Finished to test till head control blcok, but could not find valid descriptor
4192 * from head to tail all descriptors are invalidated */
4193 break;
4194 }
4195 }
4196 }
4197 }
4198
Madan Mohan Koyyalamudi7f1020d2012-09-28 15:29:03 -07004199 wpalMemoryFree(msgPtr);
4200 return;
4201}
4202
Jeff Johnson295189b2012-06-20 16:38:30 -07004203/*==========================================================================
Mihir Shete40a55652014-03-02 14:14:47 +05304204 @ Function Name
4205 dxeDebugTxDescReSync
4206
4207 @ Description
4208 Check DXE Tx channel state and correct it in
4209 case Tx Data stall is detected by calling
4210 %dxeTXReSyncDesc. Also ensure that WCN SS
4211 is not power collapsed before calling
4212 %dxeTXReSyncDesc
4213
4214 @ Parameters
4215 void *msgPtr
4216 Message pointer to sync with TX thread
4217
4218 @ Return
4219 NONE
4220===========================================================================*/
4221void dxeDebugTxDescReSync
4222(
4223 wpt_msg *msgPtr
4224)
4225{
4226 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4227 "%s: Check for DXE TX Async",__func__);
4228 /* Make wake up HW */
4229 dxeNotifySmsm(eWLAN_PAL_FALSE, eWLAN_PAL_TRUE);
4230 dxeNotifySmsm(eWLAN_PAL_TRUE, eWLAN_PAL_FALSE);
4231
4232 wpalSleep(10);
4233
4234 dxeTXReSyncDesc(msgPtr);
4235}
4236/*==========================================================================
Jeff Johnson295189b2012-06-20 16:38:30 -07004237 @ Function Name
4238 dxeTXISR
4239
4240 @ Description
4241 TX interrupt ISR
4242 Platform will call this function if INT is happen
4243 This function must be registered into platform interrupt module
4244
4245 @ Parameters
4246 void *hostCtxt
4247 DXE host driver control context,
4248 pre registerd during interrupt registration
4249
4250 @ Return
4251 PAL_STATUS_T
4252===========================================================================*/
4253static void dxeTXISR
4254(
4255 void *hostCtxt
4256)
4257{
4258 WLANDXE_CtrlBlkType *dxeCtxt = (WLANDXE_CtrlBlkType *)hostCtxt;
4259 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
Jeff Johnson295189b2012-06-20 16:38:30 -07004260
4261 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07004262 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07004263
4264 /* Return from here if the RIVA is in IMPS, to avoid register access */
Jeff Johnsone7245742012-09-05 17:12:55 -07004265 if(WLANDXE_POWER_STATE_DOWN == dxeCtxt->hostPowerState)
Jeff Johnson295189b2012-06-20 16:38:30 -07004266 {
Jeff Johnsone7245742012-09-05 17:12:55 -07004267 dxeCtxt->txIntEnable = eWLAN_PAL_FALSE;
Jeff Johnson295189b2012-06-20 16:38:30 -07004268 /* Disable interrupt at here,
4269 IMPS or IMPS Pending state should not access RIVA register */
4270 status = wpalDisableInterrupt(DXE_INTERRUPT_TX_COMPLE);
4271 if(eWLAN_PAL_STATUS_SUCCESS != status)
4272 {
4273 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4274 "dxeRXFrameReadyISR Disable RX ready interrupt fail");
4275 return;
4276 }
4277 dxeCtxt->txIntDisabledByIMPS = eWLAN_PAL_TRUE;
4278 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07004279 "%s Riva is in %d, return from here ", __func__, dxeCtxt->hostPowerState);
Jeff Johnson295189b2012-06-20 16:38:30 -07004280 return;
4281 }
4282
Jeff Johnson295189b2012-06-20 16:38:30 -07004283 /* Disable TX Complete Interrupt at here */
4284 status = wpalDisableInterrupt(DXE_INTERRUPT_TX_COMPLE);
4285 if(eWLAN_PAL_STATUS_SUCCESS != status)
4286 {
4287 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4288 "dxeTXCompISR Disable TX complete interrupt fail");
4289 return;
4290 }
4291 dxeCtxt->txIntEnable = eWLAN_PAL_FALSE;
4292
4293
4294 if( dxeCtxt->ucTxMsgCnt )
4295 {
4296 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO,
4297 "Avoiding serializing TX Complete event");
4298 return;
4299 }
4300
4301 dxeCtxt->ucTxMsgCnt = 1;
4302
4303 /* Serialize TX complete interrupt upon TX thread */
Manjunathappa Prakashfb585462013-12-23 19:07:07 -08004304 if(NULL == dxeCtxt->txIsrMsg)
4305 {
4306 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
4307 "Invalid message");
4308 HDXE_ASSERT(0);
4309 return;
4310 }
Jeff Johnson295189b2012-06-20 16:38:30 -07004311 status = wpalPostTxMsg(WDI_GET_PAL_CTX(),
4312 dxeCtxt->txIsrMsg);
4313 if(eWLAN_PAL_STATUS_SUCCESS != status)
4314 {
4315 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
4316 "dxeTXCompISR interrupt serialize fail status=%d", status);
4317 }
4318
4319 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07004320 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07004321 return;
4322}
4323
4324/*-------------------------------------------------------------------------
4325 * Global Function
4326 *-------------------------------------------------------------------------*/
4327/*==========================================================================
4328 @ Function Name
4329 WLANDXE_Open
4330
4331 @ Description
4332 Open host DXE driver, allocate DXE resources
4333 Allocate, DXE local control block, DXE descriptor pool, DXE descriptor control block pool
4334
4335 @ Parameters
Jeff Johnsona8a1a482012-12-12 16:49:33 -08004336 pVoid pAdapter : Driver global control block pointer
Jeff Johnson295189b2012-06-20 16:38:30 -07004337
4338 @ Return
4339 pVoid DXE local module control block pointer
4340===========================================================================*/
4341void *WLANDXE_Open
4342(
4343 void
4344)
4345{
4346 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
4347 unsigned int idx;
4348 WLANDXE_ChannelCBType *currentChannel = NULL;
4349 int smsmInitState;
Jeff Johnson295189b2012-06-20 16:38:30 -07004350
4351 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07004352 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07004353
Mihir Shetee6618162015-03-16 14:48:42 +05304354 if (wpalIsFwLoggingEnabled())
4355 {
4356 dxeSetEnabledChannels(WDTS_TRANSPORT_CHANNELS_MASK |
4357 WDTS_RX_LOG_CHANNEL_MASK);
4358 }
4359 else
4360 {
4361 dxeSetEnabledChannels(WDTS_TRANSPORT_CHANNELS_MASK);
4362 }
4363
Jeff Johnson295189b2012-06-20 16:38:30 -07004364 /* This is temporary allocation */
4365 tempDxeCtrlBlk = (WLANDXE_CtrlBlkType *)wpalMemoryAllocate(sizeof(WLANDXE_CtrlBlkType));
4366 if(NULL == tempDxeCtrlBlk)
4367 {
4368 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4369 "WLANDXE_Open Control Block Alloc Fail");
4370 return NULL;
4371 }
4372 wpalMemoryZero(tempDxeCtrlBlk, sizeof(WLANDXE_CtrlBlkType));
4373
4374 status = dxeCommonDefaultConfig(tempDxeCtrlBlk);
4375 if(eWLAN_PAL_STATUS_SUCCESS != status)
4376 {
4377 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4378 "WLANDXE_Open Common Configuration Fail");
4379 WLANDXE_Close(tempDxeCtrlBlk);
4380 return NULL;
4381 }
4382
Mihir Shetee6618162015-03-16 14:48:42 +05304383 foreach_valid_channel(idx)
Jeff Johnson295189b2012-06-20 16:38:30 -07004384 {
4385 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
4386 "WLANDXE_Open Channel %s Open Start", channelType[idx]);
4387 currentChannel = &tempDxeCtrlBlk->dxeChannel[idx];
4388 if(idx == WDTS_CHANNEL_TX_LOW_PRI)
4389 {
4390 currentChannel->channelType = WDTS_CHANNEL_TX_LOW_PRI;
4391 }
4392 else if(idx == WDTS_CHANNEL_TX_HIGH_PRI)
4393 {
4394 currentChannel->channelType = WDTS_CHANNEL_TX_HIGH_PRI;
4395 }
4396 else if(idx == WDTS_CHANNEL_RX_LOW_PRI)
4397 {
4398 currentChannel->channelType = WDTS_CHANNEL_RX_LOW_PRI;
4399 }
4400 else if(idx == WDTS_CHANNEL_RX_HIGH_PRI)
4401 {
4402 currentChannel->channelType = WDTS_CHANNEL_RX_HIGH_PRI;
4403 }
Mihir Shetee6618162015-03-16 14:48:42 +05304404 else if(idx == WDTS_CHANNEL_RX_LOG)
4405 {
4406 currentChannel->channelType = WDTS_CHANNEL_RX_LOG;
4407 }
Jeff Johnson295189b2012-06-20 16:38:30 -07004408
4409 /* Config individual channels from channel default setup table */
4410 status = dxeChannelDefaultConfig(tempDxeCtrlBlk,
4411 currentChannel);
4412 if(eWLAN_PAL_STATUS_SUCCESS != status)
4413 {
4414 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4415 "WLANDXE_Open Channel Basic Configuration Fail for channel %d", idx);
4416 WLANDXE_Close(tempDxeCtrlBlk);
4417 return NULL;
4418 }
4419
4420 /* Allocate DXE Control Block will be used by host DXE driver */
4421 status = dxeCtrlBlkAlloc(tempDxeCtrlBlk, currentChannel);
4422 if(eWLAN_PAL_STATUS_SUCCESS != status)
4423 {
4424 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4425 "WLANDXE_Open Alloc DXE Control Block Fail for channel %d", idx);
4426
4427 WLANDXE_Close(tempDxeCtrlBlk);
4428 return NULL;
4429 }
4430 status = wpalMutexInit(&currentChannel->dxeChannelLock);
4431 if(eWLAN_PAL_STATUS_SUCCESS != status)
4432 {
4433 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
4434 "WLANDXE_Open Lock Init Fail for channel %d", idx);
4435 WLANDXE_Close(tempDxeCtrlBlk);
4436 return NULL;
4437 }
4438
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -07004439 status = wpalTimerInit(&currentChannel->healthMonitorTimer,
4440 dxeHealthMonitorTimeout,
4441 (void *)currentChannel);
4442 if(eWLAN_PAL_STATUS_SUCCESS != status)
4443 {
4444 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
4445 "WLANDXE_Open Health Monitor timer init fail %d", idx);
4446 WLANDXE_Close(tempDxeCtrlBlk);
4447 return NULL;
4448 }
4449
4450 currentChannel->healthMonitorMsg = (wpt_msg *)wpalMemoryAllocate(sizeof(wpt_msg));
4451 if(NULL == currentChannel->healthMonitorMsg)
4452 {
4453 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
4454 "WLANDXE_Open Health Monitor MSG Alloc fail %d", idx);
4455 WLANDXE_Close(tempDxeCtrlBlk);
4456 return NULL;
4457 }
4458 wpalMemoryZero(currentChannel->healthMonitorMsg, sizeof(wpt_msg));
4459 currentChannel->healthMonitorMsg->callback = dxeTXHealthMonitor;
4460 currentChannel->healthMonitorMsg->pContext = (void *)currentChannel;
4461
Jeff Johnson295189b2012-06-20 16:38:30 -07004462 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
4463 "WLANDXE_Open Channel %s Open Success", channelType[idx]);
4464 }
4465
4466 /* Allocate and Init RX READY ISR Serialize Buffer */
4467 tempDxeCtrlBlk->rxIsrMsg = (wpt_msg *)wpalMemoryAllocate(sizeof(wpt_msg));
4468 if(NULL == tempDxeCtrlBlk->rxIsrMsg)
4469 {
4470 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4471 "WLANDXE_Open Alloc RX ISR Fail");
4472 WLANDXE_Close(tempDxeCtrlBlk);
4473 return NULL;
4474 }
4475 wpalMemoryZero(tempDxeCtrlBlk->rxIsrMsg, sizeof(wpt_msg));
4476 tempDxeCtrlBlk->rxIsrMsg->callback = dxeRXEventHandler;
4477 tempDxeCtrlBlk->rxIsrMsg->pContext = (void *)tempDxeCtrlBlk;
4478
4479 /* Allocate and Init TX COMP ISR Serialize Buffer */
4480 tempDxeCtrlBlk->txIsrMsg = (wpt_msg *)wpalMemoryAllocate(sizeof(wpt_msg));
4481 if(NULL == tempDxeCtrlBlk->txIsrMsg)
4482 {
4483 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4484 "WLANDXE_Open Alloc TX ISR Fail");
4485 WLANDXE_Close(tempDxeCtrlBlk);
4486 return NULL;
4487 }
4488 wpalMemoryZero(tempDxeCtrlBlk->txIsrMsg, sizeof(wpt_msg));
4489 tempDxeCtrlBlk->txIsrMsg->callback = dxeTXEventHandler;
4490 tempDxeCtrlBlk->txIsrMsg->pContext = (void *)tempDxeCtrlBlk;
4491
4492 /* Allocate and Init RX Packet Available Serialize Message Buffer */
4493 tempDxeCtrlBlk->rxPktAvailMsg = (wpt_msg *)wpalMemoryAllocate(sizeof(wpt_msg));
4494 if(NULL == tempDxeCtrlBlk->rxPktAvailMsg)
4495 {
4496 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4497 "WLANDXE_Open Alloc RX Packet Available Message Fail");
4498 WLANDXE_Close(tempDxeCtrlBlk);
4499 return NULL;
4500 }
4501 wpalMemoryZero(tempDxeCtrlBlk->rxPktAvailMsg, sizeof(wpt_msg));
4502 tempDxeCtrlBlk->rxPktAvailMsg->callback = dxeRXPacketAvailableEventHandler;
4503 tempDxeCtrlBlk->rxPktAvailMsg->pContext = (void *)tempDxeCtrlBlk;
4504
4505 tempDxeCtrlBlk->freeRXPacket = NULL;
4506 tempDxeCtrlBlk->dxeCookie = WLANDXE_CTXT_COOKIE;
4507 tempDxeCtrlBlk->rxIntDisabledByIMPS = eWLAN_PAL_FALSE;
4508 tempDxeCtrlBlk->txIntDisabledByIMPS = eWLAN_PAL_FALSE;
Jeff Johnsone7245742012-09-05 17:12:55 -07004509 tempDxeCtrlBlk->driverReloadInProcessing = eWLAN_PAL_FALSE;
Leo Changac1d3612013-07-01 15:15:51 -07004510 tempDxeCtrlBlk->smsmToggled = eWLAN_PAL_FALSE;
Jeff Johnson295189b2012-06-20 16:38:30 -07004511
4512 /* Initialize SMSM state
4513 * Init State is
4514 * Clear TX Enable
4515 * RING EMPTY STATE */
4516 smsmInitState = wpalNotifySmsm(WPAL_SMSM_WLAN_TX_ENABLE,
4517 WPAL_SMSM_WLAN_TX_RINGS_EMPTY);
4518 if(0 != smsmInitState)
4519 {
4520 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4521 "SMSM Channel init fail %d", smsmInitState);
Mihir Shetee6618162015-03-16 14:48:42 +05304522 foreach_valid_channel(idx)
Jeff Johnson295189b2012-06-20 16:38:30 -07004523 {
4524 dxeChannelClose(tempDxeCtrlBlk, &tempDxeCtrlBlk->dxeChannel[idx]);
4525 }
Madan Mohan Koyyalamudibe3597f2012-11-15 17:33:55 -08004526 wpalMemoryFree(tempDxeCtrlBlk->rxIsrMsg);
4527 wpalMemoryFree(tempDxeCtrlBlk->txIsrMsg);
Jeff Johnson295189b2012-06-20 16:38:30 -07004528 wpalMemoryFree(tempDxeCtrlBlk);
4529 return NULL;
4530 }
4531
Mihir Shete44547fb2014-03-10 14:15:42 +05304532#ifdef WLAN_DXE_LOW_RESOURCE_TIMER
Leo Chang72cdfd32013-10-17 20:36:30 -07004533 wpalTimerInit(&tempDxeCtrlBlk->rxResourceAvailableTimer,
4534 dxeRXResourceAvailableTimerExpHandler,
4535 tempDxeCtrlBlk);
Mihir Shete44547fb2014-03-10 14:15:42 +05304536#endif
Leo Chang72cdfd32013-10-17 20:36:30 -07004537
Mihir Shetefdc9f532014-01-09 15:03:02 +05304538 wpalTimerInit(&tempDxeCtrlBlk->dxeSSRTimer,
4539 dxeSSRTimerExpHandler, tempDxeCtrlBlk);
4540
Jeff Johnson295189b2012-06-20 16:38:30 -07004541 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
4542 "WLANDXE_Open Success");
4543 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07004544 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07004545 return (void *)tempDxeCtrlBlk;
4546}
4547
4548/*==========================================================================
4549 @ Function Name
4550 WLANDXE_ClientRegistration
4551
4552 @ Description
4553 Make callback functions registration into DXE driver from DXE driver client
4554
4555 @ Parameters
4556 pVoid pDXEContext : DXE module control block
4557 WDTS_RxFrameReadyCbType rxFrameReadyCB : RX Frame ready CB function pointer
4558 WDTS_TxCompleteCbType txCompleteCB : TX complete CB function pointer
4559 WDTS_LowResourceCbType lowResourceCB : Low DXE resource notification CB function pointer
4560 void *userContext : DXE Cliennt control block
4561
4562 @ Return
4563 wpt_status
4564===========================================================================*/
4565wpt_status WLANDXE_ClientRegistration
4566(
4567 void *pDXEContext,
4568 WLANDXE_RxFrameReadyCbType rxFrameReadyCB,
4569 WLANDXE_TxCompleteCbType txCompleteCB,
4570 WLANDXE_LowResourceCbType lowResourceCB,
4571 void *userContext
4572)
4573{
4574 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
4575 WLANDXE_CtrlBlkType *dxeCtxt;
4576
4577 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07004578 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07004579
4580 /* Sanity */
4581 if(NULL == pDXEContext)
4582 {
4583 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4584 "WLANDXE_ClientRegistration Invalid DXE CB");
4585 return eWLAN_PAL_STATUS_E_INVAL;
4586 }
4587
4588 if(NULL == rxFrameReadyCB)
4589 {
4590 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4591 "WLANDXE_ClientRegistration Invalid RX READY CB");
4592 return eWLAN_PAL_STATUS_E_INVAL;
4593 }
4594
4595 if(NULL == txCompleteCB)
4596 {
4597 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4598 "WLANDXE_ClientRegistration Invalid txCompleteCB");
4599 return eWLAN_PAL_STATUS_E_INVAL;
4600 }
4601
4602 if(NULL == lowResourceCB)
4603 {
4604 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4605 "WLANDXE_ClientRegistration Invalid lowResourceCB");
4606 return eWLAN_PAL_STATUS_E_INVAL;
4607 }
4608
4609 if(NULL == userContext)
4610 {
4611 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4612 "WLANDXE_ClientRegistration Invalid userContext");
4613 return eWLAN_PAL_STATUS_E_INVAL;
4614 }
4615
4616 dxeCtxt = (WLANDXE_CtrlBlkType *)pDXEContext;
4617
4618 /* Assign */
4619 dxeCtxt->rxReadyCB = rxFrameReadyCB;
4620 dxeCtxt->txCompCB = txCompleteCB;
4621 dxeCtxt->lowResourceCB = lowResourceCB;
4622 dxeCtxt->clientCtxt = userContext;
4623
4624 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07004625 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07004626 return status;
4627}
4628
4629/*==========================================================================
4630 @ Function Name
4631 WLANDXE_Start
4632
4633 @ Description
4634 Start Host DXE driver
4635 Initialize DXE channels and start channel
4636
4637 @ Parameters
4638 pVoid pDXEContext : DXE module control block
4639
4640 @ Return
4641 wpt_status
4642===========================================================================*/
4643wpt_status WLANDXE_Start
4644(
4645 void *pDXEContext
4646)
4647{
4648 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
4649 wpt_uint32 idx;
4650 WLANDXE_CtrlBlkType *dxeCtxt = NULL;
4651
4652 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07004653 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07004654
4655 /* Sanity */
4656 if(NULL == pDXEContext)
4657 {
4658 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4659 "WLANDXE_Start Invalid DXE CB");
4660 return eWLAN_PAL_STATUS_E_INVAL;
4661 }
4662 dxeCtxt = (WLANDXE_CtrlBlkType *)pDXEContext;
4663
4664 /* WLANDXE_Start called means DXE engine already initiates
4665 * And DXE HW is reset and init finished
4666 * But here to make sure HW is initialized, reset again */
4667 status = dxeEngineCoreStart(dxeCtxt);
4668 if(eWLAN_PAL_STATUS_SUCCESS != status)
4669 {
4670 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4671 "WLANDXE_Start DXE HW init Fail");
4672 return status;
4673 }
4674
4675 /* Individual Channel Start */
Mihir Shetee6618162015-03-16 14:48:42 +05304676 foreach_valid_channel(idx)
Jeff Johnson295189b2012-06-20 16:38:30 -07004677 {
4678 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
4679 "WLANDXE_Start Channel %s Start", channelType[idx]);
4680
4681 /* Allocate DXE descriptor will be shared by Host driver and DXE engine */
4682 /* Make connection between DXE descriptor and DXE control block */
4683 status = dxeDescAllocAndLink(tempDxeCtrlBlk, &dxeCtxt->dxeChannel[idx]);
4684 if(eWLAN_PAL_STATUS_SUCCESS != status)
4685 {
4686 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4687 "WLANDXE_Start Alloc DXE Descriptor Fail for channel %d", idx);
4688 return status;
4689 }
4690
4691 /* Program each channel register with configuration arguments */
4692 status = dxeChannelInitProgram(dxeCtxt,
4693 &dxeCtxt->dxeChannel[idx]);
4694 if(eWLAN_PAL_STATUS_SUCCESS != status)
4695 {
4696 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4697 "WLANDXE_Start %d Program DMA channel Fail", idx);
4698 return status;
4699 }
4700
4701 /* ??? Trigger to start DMA channel
4702 * This must be seperated from ??? */
4703 status = dxeChannelStart(dxeCtxt,
4704 &dxeCtxt->dxeChannel[idx]);
4705 if(eWLAN_PAL_STATUS_SUCCESS != status)
4706 {
4707 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4708 "WLANDXE_Start %d Channel Start Fail", idx);
4709 return status;
4710 }
4711 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
4712 "WLANDXE_Start Channel %s Start Success", channelType[idx]);
4713 }
4714
4715 /* Register ISR to OS */
4716 /* Register TX complete interrupt into platform */
4717 status = wpalRegisterInterrupt(DXE_INTERRUPT_TX_COMPLE,
4718 dxeTXISR,
4719 dxeCtxt);
4720 if(eWLAN_PAL_STATUS_SUCCESS != status)
4721 {
4722 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4723 "WLANDXE_Start TX comp interrupt registration Fail");
4724 return status;
4725 }
4726
4727 /* Register RX ready interrupt into platform */
4728 status = wpalRegisterInterrupt(DXE_INTERRUPT_RX_READY,
4729 dxeRXISR,
4730 dxeCtxt);
4731 if(eWLAN_PAL_STATUS_SUCCESS != status)
4732 {
4733 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4734 "WLANDXE_Start RX Ready interrupt registration Fail");
4735 return status;
4736 }
4737
4738 /* Enable system level ISR */
4739 /* Enable RX ready Interrupt at here */
4740 status = wpalEnableInterrupt(DXE_INTERRUPT_RX_READY);
4741 if(eWLAN_PAL_STATUS_SUCCESS != status)
4742 {
4743 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4744 "dxeTXCompleteEventHandler Enable TX complete interrupt fail");
4745 return status;
4746 }
4747
4748 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07004749 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07004750 return status;
4751}
4752
4753/*==========================================================================
4754 @ Function Name
4755 WLANDXE_TXFrame
4756
4757 @ Description
4758 Trigger frame transmit from host to RIVA
4759
4760 @ Parameters
4761 pVoid pDXEContext : DXE Control Block
4762 wpt_packet pPacket : transmit packet structure
4763 WDTS_ChannelType channel : TX channel
4764
4765 @ Return
4766 wpt_status
4767===========================================================================*/
4768wpt_status WLANDXE_TxFrame
4769(
4770 void *pDXEContext,
4771 wpt_packet *pPacket,
4772 WDTS_ChannelType channel
4773)
4774{
4775 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
4776 WLANDXE_ChannelCBType *currentChannel = NULL;
4777 WLANDXE_CtrlBlkType *dxeCtxt = NULL;
4778 unsigned int *lowThreshold = NULL;
4779
4780 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07004781 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07004782
4783 /* Sanity */
4784 if(NULL == pDXEContext)
4785 {
4786 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4787 "WLANDXE_Start Invalid DXE CB");
4788 return eWLAN_PAL_STATUS_E_INVAL;
4789 }
4790
4791 if(NULL == pPacket)
4792 {
4793 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4794 "WLANDXE_Start Invalid pPacket");
4795 return eWLAN_PAL_STATUS_E_INVAL;
4796 }
4797
Mihir Shetee6618162015-03-16 14:48:42 +05304798 if(WDTS_CHANNEL_MAX <= channel)
Jeff Johnson295189b2012-06-20 16:38:30 -07004799 {
4800 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4801 "WLANDXE_Start Invalid channel");
4802 return eWLAN_PAL_STATUS_E_INVAL;
4803 }
4804
4805 dxeCtxt = (WLANDXE_CtrlBlkType *)pDXEContext;
4806
4807 currentChannel = &dxeCtxt->dxeChannel[channel];
4808
4809
Madan Mohan Koyyalamudib2cb8be2012-11-27 15:07:43 -08004810 status = wpalMutexAcquire(&currentChannel->dxeChannelLock);
4811 if(eWLAN_PAL_STATUS_SUCCESS != status)
4812 {
4813 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4814 "WLANDXE_TxFrame Mutex Acquire fail");
4815 return status;
4816 }
Jeff Johnson295189b2012-06-20 16:38:30 -07004817
4818 lowThreshold = currentChannel->channelType == WDTS_CHANNEL_TX_LOW_PRI?
4819 &(dxeCtxt->txCompInt.txLowResourceThreshold_LoPriCh):
4820 &(dxeCtxt->txCompInt.txLowResourceThreshold_HiPriCh);
4821
4822 /* Decide have to activate TX complete event or not */
4823 switch(dxeCtxt->txCompInt.txIntEnable)
4824 {
4825 /* TX complete interrupt will be activated when low DXE resource */
4826 case WLANDXE_TX_COMP_INT_LR_THRESHOLD:
4827 if((currentChannel->numFreeDesc <= *lowThreshold) &&
4828 (eWLAN_PAL_FALSE == dxeCtxt->txIntEnable))
4829 {
4830 dxeCtxt->txIntEnable = eWLAN_PAL_TRUE;
4831 dxeCtxt->lowResourceCB(dxeCtxt->clientCtxt,
4832 channel,
4833 eWLAN_PAL_FALSE);
4834 }
4835 break;
4836
Jeff Johnsonab79c8d2012-12-10 14:30:13 -08004837 /* TX complete interrupt will be activated n number of frames transferred */
Jeff Johnson295189b2012-06-20 16:38:30 -07004838 case WLANDXE_TX_COMP_INT_PER_K_FRAMES:
4839 if(channel == WDTS_CHANNEL_TX_LOW_PRI)
4840 {
4841 currentChannel->numFrameBeforeInt++;
4842 }
4843 break;
4844
4845 /* TX complete interrupt will be activated periodically */
4846 case WLANDXE_TX_COMP_INT_TIMER:
4847 break;
4848 }
4849
4850 dxeCtxt->txCompletedFrames++;
4851
4852 /* Update DXE descriptor, this is frame based
4853 * if a frame consist of N fragments, N Descriptor will be programed */
4854 status = dxeTXPushFrame(currentChannel, pPacket);
4855 if(eWLAN_PAL_STATUS_SUCCESS != status)
4856 {
4857 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4858 "WLANDXE_TxFrame TX Push Frame fail");
Madan Mohan Koyyalamudib2cb8be2012-11-27 15:07:43 -08004859 status = wpalMutexRelease(&currentChannel->dxeChannelLock);
4860 if(eWLAN_PAL_STATUS_SUCCESS != status)
4861 {
4862 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4863 "WLANDXE_TxFrame Mutex Release fail");
4864 }
Jeff Johnson295189b2012-06-20 16:38:30 -07004865 return status;
4866 }
4867
4868 /* If specific channel hit low resource condition, send notification to upper layer */
4869 if(currentChannel->numFreeDesc <= *lowThreshold)
4870 {
4871 dxeCtxt->lowResourceCB(dxeCtxt->clientCtxt,
4872 channel,
4873 eWLAN_PAL_FALSE);
4874 currentChannel->hitLowResource = eWLAN_PAL_TRUE;
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -07004875
4876 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_WARN,
4877 "%11s : Low Resource currentChannel->numRsvdDesc %d",
4878 channelType[currentChannel->channelType],
4879 currentChannel->numRsvdDesc);
Mihir Shete68ed77a2014-10-10 10:47:12 +05304880 if (WLANDXE_RIVA_POWER_STATE_BMPS_UNKNOWN == dxeCtxt->rivaPowerState)
4881 {
4882 dxeNotifySmsm(eWLAN_PAL_FALSE, eWLAN_PAL_TRUE);
4883 dxeNotifySmsm(eWLAN_PAL_TRUE, eWLAN_PAL_FALSE);
4884 }
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -07004885 wpalTimerStart(&currentChannel->healthMonitorTimer,
4886 T_WLANDXE_PERIODIC_HEALTH_M_TIME);
Jeff Johnson295189b2012-06-20 16:38:30 -07004887 }
Madan Mohan Koyyalamudib2cb8be2012-11-27 15:07:43 -08004888 status = wpalMutexRelease(&currentChannel->dxeChannelLock);
4889 if(eWLAN_PAL_STATUS_SUCCESS != status)
4890 {
4891 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4892 "WLANDXE_TxFrame Mutex Release fail");
4893 }
Jeff Johnson295189b2012-06-20 16:38:30 -07004894
4895 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07004896 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07004897 return status;
4898}
4899
4900/*==========================================================================
4901 @ Function Name
4902 WLANDXE_CompleteTX
4903
4904 @ Description
4905 Informs DXE that the current series of Tx packets is complete
4906
4907 @ Parameters
4908 pContext pDXEContext : DXE Control Block
4909 ucTxResReq TX resource number required by TL/WDI
4910
4911 @ Return
4912 wpt_status
4913===========================================================================*/
4914wpt_status
4915WLANDXE_CompleteTX
4916(
4917 void* pContext,
4918 wpt_uint32 ucTxResReq
4919)
4920{
4921 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
4922 WLANDXE_CtrlBlkType *dxeCtxt = (WLANDXE_CtrlBlkType *)(pContext);
4923 WLANDXE_ChannelCBType *channelCb = NULL;
4924 wpt_boolean inLowRes;
4925
4926 /* Sanity Check */
4927 if( NULL == pContext )
4928 {
4929 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
4930 "WLANDXE_CompleteTX invalid param");
4931 return eWLAN_PAL_STATUS_E_INVAL;
4932 }
4933
4934 channelCb = &dxeCtxt->dxeChannel[WDTS_CHANNEL_TX_LOW_PRI];
4935 inLowRes = channelCb->hitLowResource;
4936
4937 if(WLANDXE_TX_LOW_RES_THRESHOLD < ucTxResReq)
4938 {
4939 /* Raise threshold temporarily if necessary */
4940 dxeCtxt->txCompInt.txLowResourceThreshold_LoPriCh = ucTxResReq;
4941
4942 if(eWLAN_PAL_FALSE == inLowRes)
4943 {
4944 /* Put the channel to low resource condition */
4945 dxeCtxt->lowResourceCB(dxeCtxt->clientCtxt,
4946 WDTS_CHANNEL_TX_LOW_PRI,
4947 eWLAN_PAL_FALSE);
4948 inLowRes = channelCb->hitLowResource = eWLAN_PAL_TRUE;
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -07004949 wpalTimerStart(&channelCb->healthMonitorTimer,
4950 T_WLANDXE_PERIODIC_HEALTH_M_TIME);
Jeff Johnson295189b2012-06-20 16:38:30 -07004951 }
4952 }
4953
4954 /*Try to reclaim resources*/
4955 dxeTXCompleteProcessing(dxeCtxt);
4956
4957 /* In previous WLANTL_GetFrames call, TL didn't fetch a packet
4958 because its fragment size is larger than DXE free resource. */
4959 if(0 < ucTxResReq)
4960 {
4961 /* DXE successfully claimed enough free DXE resouces for next fetch. */
4962 if(WLANDXE_GetFreeTxDataResNumber(dxeCtxt) >= ucTxResReq)
4963 {
4964 /* DXE has not been in low resource condition. DXE forces to kick off
4965 TX tranmit */
4966 if((eWLAN_PAL_FALSE == inLowRes) &&
4967 (eWLAN_PAL_FALSE == channelCb->hitLowResource))
4968 {
4969 dxeCtxt->lowResourceCB(dxeCtxt->clientCtxt,
4970 WDTS_CHANNEL_TX_LOW_PRI,
4971 eWLAN_PAL_FALSE);
4972 dxeCtxt->lowResourceCB(dxeCtxt->clientCtxt,
4973 WDTS_CHANNEL_TX_LOW_PRI,
4974 eWLAN_PAL_TRUE);
4975 channelCb->hitLowResource = eWLAN_PAL_FALSE;
4976 }
4977 }
4978 else
4979 {
4980 /* DXE doesn't have enough free DXE resources. Put the channel
4981 to low resource condition. */
4982 if(eWLAN_PAL_FALSE == channelCb->hitLowResource)
4983 {
4984 /* Put the channel to low resource condition */
4985 dxeCtxt->lowResourceCB(dxeCtxt->clientCtxt,
4986 WDTS_CHANNEL_TX_LOW_PRI,
4987 eWLAN_PAL_FALSE);
4988 channelCb->hitLowResource = eWLAN_PAL_TRUE;
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -07004989 wpalTimerStart(&channelCb->healthMonitorTimer,
4990 T_WLANDXE_PERIODIC_HEALTH_M_TIME);
Jeff Johnson295189b2012-06-20 16:38:30 -07004991 }
4992 }
4993 }
4994
4995 return status;
4996}
4997
4998/*==========================================================================
4999 @ Function Name
5000 WLANDXE_Stop
5001
5002 @ Description
5003 Stop DXE channels and DXE engine operations
5004 Disable all channel interrupt
5005 Stop all channel operation
5006
5007 @ Parameters
5008 pVoid pDXEContext : DXE Control Block
5009
5010 @ Return
5011 wpt_status
5012===========================================================================*/
5013wpt_status WLANDXE_Stop
5014(
5015 void *pDXEContext
5016)
5017{
5018 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
5019 wpt_uint32 idx;
5020 WLANDXE_CtrlBlkType *dxeCtxt = NULL;
5021
5022 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07005023 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07005024
5025 /* Sanity */
5026 if(NULL == pDXEContext)
5027 {
5028 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
5029 "WLANDXE_Stop Invalid DXE CB");
5030 return eWLAN_PAL_STATUS_E_INVAL;
5031 }
5032
5033 dxeCtxt = (WLANDXE_CtrlBlkType *)pDXEContext;
Mihir Shetee6618162015-03-16 14:48:42 +05305034 foreach_valid_channel(idx)
Jeff Johnson295189b2012-06-20 16:38:30 -07005035 {
Yue Ma7faf58c2013-04-25 12:04:13 -07005036 if(VOS_TIMER_STATE_RUNNING == wpalTimerGetCurStatus(&dxeCtxt->dxeChannel[idx].healthMonitorTimer))
5037 {
5038 wpalTimerStop(&dxeCtxt->dxeChannel[idx].healthMonitorTimer);
5039 }
5040
Jeff Johnson295189b2012-06-20 16:38:30 -07005041 status = dxeChannelStop(dxeCtxt, &dxeCtxt->dxeChannel[idx]);
5042 if(eWLAN_PAL_STATUS_SUCCESS != status)
5043 {
5044 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
5045 "WLANDXE_Stop Channel %d Stop Fail", idx);
Jeff Johnson295189b2012-06-20 16:38:30 -07005046 }
5047 }
5048
5049 /* During Stop unregister interrupt */
5050 wpalUnRegisterInterrupt(DXE_INTERRUPT_TX_COMPLE);
5051 wpalUnRegisterInterrupt(DXE_INTERRUPT_RX_READY);
5052
Mihir Shete44547fb2014-03-10 14:15:42 +05305053#ifdef WLAN_DXE_LOW_RESOURCE_TIMER
Leo Chang72cdfd32013-10-17 20:36:30 -07005054 if(VOS_TIMER_STATE_STOPPED !=
5055 wpalTimerGetCurStatus(&dxeCtxt->rxResourceAvailableTimer))
5056 {
5057 wpalTimerStop(&dxeCtxt->rxResourceAvailableTimer);
5058 }
Mihir Shete44547fb2014-03-10 14:15:42 +05305059#endif
Leo Chang72cdfd32013-10-17 20:36:30 -07005060
Jeff Johnson295189b2012-06-20 16:38:30 -07005061 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07005062 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07005063 return status;
5064}
5065
5066/*==========================================================================
5067 @ Function Name
5068 WLANDXE_Close
5069
5070 @ Description
5071 Close DXE channels
5072 Free DXE related resources
5073 DXE descriptor free
5074 Descriptor control block free
5075 Pre allocated RX buffer free
5076
5077 @ Parameters
5078 pVoid pDXEContext : DXE Control Block
5079
5080 @ Return
5081 wpt_status
5082===========================================================================*/
5083wpt_status WLANDXE_Close
5084(
5085 void *pDXEContext
5086)
5087{
5088 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
5089 wpt_uint32 idx;
5090 WLANDXE_CtrlBlkType *dxeCtxt = NULL;
Jeff Johnson295189b2012-06-20 16:38:30 -07005091
5092 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07005093 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07005094
5095 /* Sanity */
5096 if(NULL == pDXEContext)
5097 {
5098 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
5099 "WLANDXE_Stop Invalid DXE CB");
5100 return eWLAN_PAL_STATUS_E_INVAL;
5101 }
5102
5103 dxeCtxt = (WLANDXE_CtrlBlkType *)pDXEContext;
Mihir Shete44547fb2014-03-10 14:15:42 +05305104#ifdef WLAN_DXE_LOW_RESOURCE_TIMER
Leo Chang72cdfd32013-10-17 20:36:30 -07005105 wpalTimerDelete(&dxeCtxt->rxResourceAvailableTimer);
Mihir Shete44547fb2014-03-10 14:15:42 +05305106#endif
Mihir Shetefdc9f532014-01-09 15:03:02 +05305107 wpalTimerDelete(&dxeCtxt->dxeSSRTimer);
Mihir Shetee6618162015-03-16 14:48:42 +05305108 foreach_valid_channel(idx)
Jeff Johnson295189b2012-06-20 16:38:30 -07005109 {
5110 wpalMutexDelete(&dxeCtxt->dxeChannel[idx].dxeChannelLock);
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -07005111 wpalTimerDelete(&dxeCtxt->dxeChannel[idx].healthMonitorTimer);
5112 if(NULL != dxeCtxt->dxeChannel[idx].healthMonitorMsg)
5113 {
5114 wpalMemoryFree(dxeCtxt->dxeChannel[idx].healthMonitorMsg);
5115 }
Jeff Johnson295189b2012-06-20 16:38:30 -07005116 dxeChannelClose(dxeCtxt, &dxeCtxt->dxeChannel[idx]);
Jeff Johnson295189b2012-06-20 16:38:30 -07005117 }
5118
5119 if(NULL != dxeCtxt->rxIsrMsg)
5120 {
5121 wpalMemoryFree(dxeCtxt->rxIsrMsg);
5122 }
5123 if(NULL != dxeCtxt->txIsrMsg)
5124 {
5125 wpalMemoryFree(dxeCtxt->txIsrMsg);
5126 }
5127 if(NULL != dxeCtxt->rxPktAvailMsg)
5128 {
5129 wpalMemoryFree(dxeCtxt->rxPktAvailMsg);
5130 }
5131
5132 wpalMemoryFree(pDXEContext);
5133
5134 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07005135 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07005136 return status;
5137}
5138
5139/*==========================================================================
5140 @ Function Name
5141 WLANDXE_TriggerTX
5142
5143 @ Description
5144 TBD
5145
5146 @ Parameters
5147 pVoid pDXEContext : DXE Control Block
5148
5149 @ Return
5150 wpt_status
5151===========================================================================*/
5152wpt_status WLANDXE_TriggerTX
5153(
5154 void *pDXEContext
5155)
5156{
5157 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
5158
5159 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07005160 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07005161
5162 /* TBD */
5163
5164 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07005165 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07005166 return status;
5167}
5168
5169/*==========================================================================
5170 @ Function Name
5171 dxeTxThreadSetPowerStateEventHandler
5172
5173 @ Description
5174 If WDI sends set power state req, this event handler will be called in Tx
5175 thread context
5176
5177 @ Parameters
5178 void *msgPtr
5179 Event MSG
5180
5181 @ Return
5182 None
5183===========================================================================*/
5184void dxeTxThreadSetPowerStateEventHandler
5185(
5186 wpt_msg *msgPtr
5187)
5188{
5189 wpt_msg *msgContent = (wpt_msg *)msgPtr;
5190 WLANDXE_CtrlBlkType *dxeCtxt;
Mihir Shetea4306052014-03-25 00:02:54 +05305191 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
Jeff Johnson295189b2012-06-20 16:38:30 -07005192 WLANDXE_PowerStateType reqPowerState;
Mihir Shetea4306052014-03-25 00:02:54 +05305193 wpt_int8 i;
5194 WLANDXE_ChannelCBType *channelEntry;
5195 wpt_log_data_stall_channel_type channelLog;
Jeff Johnson295189b2012-06-20 16:38:30 -07005196
5197 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07005198 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07005199
Jeff Johnson295189b2012-06-20 16:38:30 -07005200 dxeCtxt = (WLANDXE_CtrlBlkType *)(msgContent->pContext);
5201 reqPowerState = (WLANDXE_PowerStateType)msgContent->val;
5202 dxeCtxt->setPowerStateCb = (WLANDXE_SetPowerStateCbType)msgContent->ptr;
5203
5204 switch(reqPowerState)
5205 {
5206 case WLANDXE_POWER_STATE_BMPS:
5207 if(WLANDXE_RIVA_POWER_STATE_ACTIVE == dxeCtxt->rivaPowerState)
5208 {
5209 //don't block MC waiting for num_rsvd to become 0 since it may take a while
5210 //based on amount of TX and RX activity - during this time any received
5211 // management frames will remain un-processed consuming RX buffers
5212 dxeCtxt->rivaPowerState = WLANDXE_RIVA_POWER_STATE_BMPS_UNKNOWN;
5213 dxeCtxt->hostPowerState = reqPowerState;
5214 }
5215 else
5216 {
5217 status = eWLAN_PAL_STATUS_E_INVAL;
5218 }
5219 break;
5220 case WLANDXE_POWER_STATE_IMPS:
5221 if(WLANDXE_RIVA_POWER_STATE_ACTIVE == dxeCtxt->rivaPowerState)
5222 {
Mihir Shetea4306052014-03-25 00:02:54 +05305223
5224 for(i = WDTS_CHANNEL_TX_LOW_PRI; i < WDTS_CHANNEL_RX_LOW_PRI; i++)
5225 {
5226 channelEntry = &dxeCtxt->dxeChannel[i];
5227 if(channelEntry->tailCtrlBlk != channelEntry->headCtrlBlk)
5228 {
5229 status = eWLAN_PAL_STATUS_E_FAILURE;
5230 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
5231 "%11s : %s :TX Pending frame",
5232 channelType[channelEntry->channelType], __func__);
5233
5234 dxeChannelMonitor("DXE_IMP_ERR", channelEntry, &channelLog);
5235 dxeDescriptorDump(channelEntry,
5236 channelEntry->headCtrlBlk->linkedDesc, 0);
5237 dxeChannelRegisterDump(channelEntry, "DXE_IMPS_ERR",
5238 &channelLog);
5239 dxeChannelAllDescDump(channelEntry,
5240 channelEntry->channelType,
5241 &channelLog);
5242 }
5243 }
5244
5245 if (eWLAN_PAL_STATUS_SUCCESS == status)
5246 {
5247 dxeCtxt->rivaPowerState = WLANDXE_RIVA_POWER_STATE_IMPS_UNKNOWN;
5248 dxeCtxt->hostPowerState = WLANDXE_POWER_STATE_IMPS;
5249 }
Jeff Johnson295189b2012-06-20 16:38:30 -07005250 }
5251 else
5252 {
5253 status = eWLAN_PAL_STATUS_E_INVAL;
5254 }
5255 break;
5256 case WLANDXE_POWER_STATE_FULL:
5257 if(WLANDXE_RIVA_POWER_STATE_BMPS_UNKNOWN == dxeCtxt->rivaPowerState)
5258 {
5259 dxeCtxt->rivaPowerState = WLANDXE_RIVA_POWER_STATE_ACTIVE;
5260 }
5261 dxeCtxt->hostPowerState = reqPowerState;
5262 dxeNotifySmsm(eWLAN_PAL_FALSE, eWLAN_PAL_TRUE);
5263 break;
5264 case WLANDXE_POWER_STATE_DOWN:
5265 WLANDXE_Stop((void *)dxeCtxt);
5266 break;
5267 default:
5268 //assert
5269 break;
5270 }
5271
5272 if(WLANDXE_POWER_STATE_BMPS_PENDING != dxeCtxt->hostPowerState)
5273 {
5274 dxeCtxt->setPowerStateCb(status,
5275 dxeCtxt->dxeChannel[WDTS_CHANNEL_TX_LOW_PRI].descBottomLocPhyAddr);
5276 }
Ravali85acf6b2012-12-12 14:01:38 -08005277 else
5278 {
5279 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
5280 "%s State of DXE is WLANDXE_POWER_STATE_BMPS_PENDING, so cannot proceed", __func__);
5281 }
Jeff Johnson295189b2012-06-20 16:38:30 -07005282 /* Free MSG buffer */
5283 wpalMemoryFree(msgPtr);
5284 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07005285 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07005286 return;
5287}
5288
5289
5290/*==========================================================================
5291 @ Function Name
5292 dxeRxThreadSetPowerStateEventHandler
5293
5294 @ Description
5295 If WDI sends set power state req, this event handler will be called in Rx
5296 thread context
5297
5298 @ Parameters
5299 void *msgPtr
5300 Event MSG
5301
5302 @ Return
5303 None
5304===========================================================================*/
5305void dxeRxThreadSetPowerStateEventHandler
5306(
5307 wpt_msg *msgPtr
5308)
5309{
5310 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
5311
5312 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07005313 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07005314
5315 /* Now serialise the message through Tx thread also to make sure
5316 * no register access when RIVA is in powersave */
5317 /*Use the same message pointer just change the call back function */
5318 msgPtr->callback = dxeTxThreadSetPowerStateEventHandler;
5319 status = wpalPostTxMsg(WDI_GET_PAL_CTX(),
5320 msgPtr);
5321 if ( eWLAN_PAL_STATUS_SUCCESS != status )
5322 {
5323 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
5324 "Tx thread Set power state req serialize fail status=%d",
Jeff Johnson9e237fb2013-10-30 18:46:20 -07005325 status);
Jeff Johnson295189b2012-06-20 16:38:30 -07005326 }
5327
5328 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07005329 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07005330}
5331
5332/*==========================================================================
5333 @ Function Name
5334 WLANDXE_SetPowerState
5335
5336 @ Description
5337 From Client let DXE knows what is the WLAN HW(RIVA) power state
5338
5339 @ Parameters
5340 pVoid pDXEContext : DXE Control Block
5341 WLANDXE_PowerStateType powerState
5342
5343 @ Return
5344 wpt_status
5345===========================================================================*/
5346wpt_status WLANDXE_SetPowerState
5347(
5348 void *pDXEContext,
5349 WDTS_PowerStateType powerState,
5350 WDTS_SetPSCbType cBack
5351)
5352{
5353 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
5354 WLANDXE_CtrlBlkType *pDxeCtrlBlk;
5355 WLANDXE_PowerStateType hostPowerState;
Madan Mohan Koyyalamudi7f1020d2012-09-28 15:29:03 -07005356 wpt_msg *rxCompMsg;
5357 wpt_msg *txDescReSyncMsg;
Jeff Johnson295189b2012-06-20 16:38:30 -07005358
5359 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07005360 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07005361 if(NULL == pDXEContext)
5362 {
5363 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
Jeff Johnson9e237fb2013-10-30 18:46:20 -07005364 "NULL pDXEContext passed by caller");
Jeff Johnson295189b2012-06-20 16:38:30 -07005365 return eWLAN_PAL_STATUS_E_FAILURE;
5366 }
5367 pDxeCtrlBlk = (WLANDXE_CtrlBlkType *)pDXEContext;
5368
Jeff Johnson295189b2012-06-20 16:38:30 -07005369 switch(powerState)
5370 {
5371 case WDTS_POWER_STATE_FULL:
Madan Mohan Koyyalamudi7f1020d2012-09-28 15:29:03 -07005372 if(WLANDXE_POWER_STATE_IMPS == pDxeCtrlBlk->hostPowerState)
5373 {
5374 txDescReSyncMsg = (wpt_msg *)wpalMemoryAllocate(sizeof(wpt_msg));
5375 if(NULL == txDescReSyncMsg)
5376 {
5377 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
5378 "WLANDXE_SetPowerState, TX Resync MSG MEM alloc Fail");
5379 }
5380 else
5381 {
5382 txDescReSyncMsg->callback = dxeTXReSyncDesc;
5383 txDescReSyncMsg->pContext = pDxeCtrlBlk;
5384 status = wpalPostTxMsg(WDI_GET_PAL_CTX(),
5385 txDescReSyncMsg);
5386 if(eWLAN_PAL_STATUS_SUCCESS != status)
5387 {
5388 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
5389 "WLANDXE_SetPowerState, Post TX re-sync MSG fail");
5390 }
5391 }
5392 }
Jeff Johnson295189b2012-06-20 16:38:30 -07005393 hostPowerState = WLANDXE_POWER_STATE_FULL;
5394 break;
5395 case WDTS_POWER_STATE_BMPS:
5396 pDxeCtrlBlk->hostPowerState = WLANDXE_POWER_STATE_BMPS;
5397 hostPowerState = WLANDXE_POWER_STATE_BMPS;
5398 break;
5399 case WDTS_POWER_STATE_IMPS:
Jeff Johnson295189b2012-06-20 16:38:30 -07005400 hostPowerState = WLANDXE_POWER_STATE_IMPS;
5401 break;
5402 case WDTS_POWER_STATE_DOWN:
5403 pDxeCtrlBlk->hostPowerState = WLANDXE_POWER_STATE_DOWN;
5404 hostPowerState = WLANDXE_POWER_STATE_DOWN;
5405 break;
5406 default:
5407 hostPowerState = WLANDXE_POWER_STATE_MAX;
5408 }
5409
5410 // A callback i.e. ACK back is needed only when we want to enable BMPS
5411 // and the data/management path is active because we want to ensure
5412 // DXE registers are not accessed when RIVA may be power-collapsed. So
5413 // we need a callback in enter_bmps_req (the request to RIVA is sent
5414 // only after ACK back from TX thread). A callback is not needed in
5415 // finish_scan_req during BMPS since data-path is resumed only in
5416 // finish_scan_rsp and no management frames are sent in between. No
5417 // callback is needed when going from BMPS enabled to BMPS suspended/
5418 // disabled when it is known that RIVA is awake and cannot enter power
5419 // collapse autonomously so no callback is needed in exit_bmps_rsp or
5420 // init_scan_rsp
5421 if ( cBack )
5422 {
5423 //serialize through Rx thread
5424 rxCompMsg = (wpt_msg *)wpalMemoryAllocate(sizeof(wpt_msg));
5425 if(NULL == rxCompMsg)
5426 {
5427 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
5428 "WLANDXE_SetPowerState, MSG MEM alloc Fail");
5429 return eWLAN_PAL_STATUS_E_RESOURCES;
5430 }
5431
5432 /* Event type, where it must be defined???? */
5433 /* THIS MUST BE CLEARED ASAP
5434 txCompMsg->type = TX_COMPLETE; */
5435 rxCompMsg->callback = dxeRxThreadSetPowerStateEventHandler;
5436 rxCompMsg->pContext = pDxeCtrlBlk;
5437 rxCompMsg->val = hostPowerState;
5438 rxCompMsg->ptr = cBack;
5439 status = wpalPostRxMsg(WDI_GET_PAL_CTX(),
5440 rxCompMsg);
5441 if ( eWLAN_PAL_STATUS_SUCCESS != status )
5442 {
5443 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
5444 "Rx thread Set power state req serialize fail status=%d",
Jeff Johnson9e237fb2013-10-30 18:46:20 -07005445 status);
Jeff Johnson295189b2012-06-20 16:38:30 -07005446 }
5447 }
5448 else
5449 {
5450 if ( WLANDXE_POWER_STATE_FULL == hostPowerState )
5451 {
5452 if( WLANDXE_POWER_STATE_BMPS == pDxeCtrlBlk->hostPowerState )
5453 {
5454 dxeNotifySmsm(eWLAN_PAL_FALSE, eWLAN_PAL_TRUE);
5455 }
5456 else if( WLANDXE_POWER_STATE_IMPS == pDxeCtrlBlk->hostPowerState )
5457 {
5458 /* Requested Full power from exit IMPS, reenable the interrupts*/
5459 if(eWLAN_PAL_TRUE == pDxeCtrlBlk->rxIntDisabledByIMPS)
5460 {
5461 pDxeCtrlBlk->rxIntDisabledByIMPS = eWLAN_PAL_FALSE;
5462 /* Enable RX interrupt at here, if new PS is not IMPS */
5463 status = wpalEnableInterrupt(DXE_INTERRUPT_RX_READY);
5464 if(eWLAN_PAL_STATUS_SUCCESS != status)
5465 {
5466 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07005467 "%s Enable RX ready interrupt fail", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07005468 return status;
5469 }
5470 }
5471 if(eWLAN_PAL_TRUE == pDxeCtrlBlk->txIntDisabledByIMPS)
5472 {
5473 pDxeCtrlBlk->txIntDisabledByIMPS = eWLAN_PAL_FALSE;
Jeff Johnsone7245742012-09-05 17:12:55 -07005474 pDxeCtrlBlk->txIntEnable = eWLAN_PAL_TRUE;
Jeff Johnson295189b2012-06-20 16:38:30 -07005475 /* Enable RX interrupt at here, if new PS is not IMPS */
5476 status = wpalEnableInterrupt(DXE_INTERRUPT_TX_COMPLE);
5477 if(eWLAN_PAL_STATUS_SUCCESS != status)
5478 {
5479 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07005480 "%s Enable TX comp interrupt fail", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07005481 return status;
5482 }
5483 }
5484 }
5485 pDxeCtrlBlk->hostPowerState = hostPowerState;
5486 pDxeCtrlBlk->rivaPowerState = WLANDXE_RIVA_POWER_STATE_ACTIVE;
5487 }
5488 else if ( hostPowerState == WLANDXE_POWER_STATE_BMPS )
5489 {
5490 pDxeCtrlBlk->hostPowerState = hostPowerState;
5491 pDxeCtrlBlk->rivaPowerState = WLANDXE_RIVA_POWER_STATE_BMPS_UNKNOWN;
5492 }
Mihir Shetea4306052014-03-25 00:02:54 +05305493 else if ( hostPowerState == WLANDXE_POWER_STATE_IMPS )
5494 {
5495 pDxeCtrlBlk->hostPowerState = WLANDXE_POWER_STATE_IMPS;
5496 }
Jeff Johnson295189b2012-06-20 16:38:30 -07005497 else
5498 {
5499 HDXE_ASSERT(0);
5500 }
5501 }
5502
5503 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07005504 "%s Exit", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07005505
5506 return status;
5507}
5508
5509/*==========================================================================
5510 @ Function Name
5511 WLANDXE_GetFreeTxDataResNumber
5512
5513 @ Description
5514 Returns free descriptor numbers for TX data channel (TX high priority)
5515
5516 @ Parameters
5517 pVoid pDXEContext : DXE Control Block
5518
5519 @ Return
5520 wpt_uint32 Free descriptor number of TX high pri ch
5521===========================================================================*/
5522wpt_uint32 WLANDXE_GetFreeTxDataResNumber
5523(
5524 void *pDXEContext
5525)
5526{
5527 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO_LOW,
Madan Mohan Koyyalamudi87054ba2012-11-02 13:24:12 -07005528 "%s Enter", __func__);
Jeff Johnson295189b2012-06-20 16:38:30 -07005529
5530 if(NULL == pDXEContext)
5531 {
5532 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
Jeff Johnson9e237fb2013-10-30 18:46:20 -07005533 "NULL parameter passed by caller");
Jeff Johnson295189b2012-06-20 16:38:30 -07005534 return (0);
5535 }
5536
Mihir Shetee6618162015-03-16 14:48:42 +05305537 return ((WLANDXE_CtrlBlkType *)pDXEContext)->dxeChannel[WDTS_CHANNEL_TX_LOW_PRI].numFreeDesc;
Jeff Johnson295189b2012-06-20 16:38:30 -07005538}
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -07005539
5540/*==========================================================================
5541 @ Function Name
5542 WLANDXE_ChannelDebug
5543
5544 @ Description
5545 Display DXE Channel debugging information
5546 User may request to display DXE channel snapshot
5547 Or if host driver detects any abnormal stcuk may display
5548
5549 @ Parameters
Jeff Johnsonb88db982012-12-10 13:34:59 -08005550 displaySnapshot : Display DXE snapshot option
Mihir Shete40a55652014-03-02 14:14:47 +05305551 debugFlags : Enable stall detect features
5552 defined by WPAL_DeviceDebugFlags
5553 These features may effect
5554 data performance.
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -07005555
5556 @ Return
5557 NONE
5558
5559===========================================================================*/
5560void WLANDXE_ChannelDebug
5561(
Mihir Shete40a55652014-03-02 14:14:47 +05305562 wpt_boolean displaySnapshot,
5563 wpt_uint8 debugFlags
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -07005564)
5565{
Madan Mohan Koyyalamudi24a00f92012-10-22 15:21:02 -07005566 wpt_msg *channelDebugMsg;
Mihir Shete40a55652014-03-02 14:14:47 +05305567 wpt_msg *txDescReSyncMsg ;
Mihir Shete41c41bb2014-08-18 17:37:12 +05305568 wpt_uint32 regValue, regValueLocal = 0;
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -07005569 wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
5570
5571 /* Debug Type 1, Display current snapshot */
5572 if(displaySnapshot)
5573 {
5574 /* Whatever RIVA power condition try to wakeup RIVA through SMSM
5575 * This will not simply wakeup RIVA
5576 * Just incase TX not wanted stuck, Trigger TX again */
Leo Chang345ef992013-07-12 10:17:29 -07005577 dxeNotifySmsm(eWLAN_PAL_FALSE, eWLAN_PAL_TRUE);
5578 dxeNotifySmsm(eWLAN_PAL_TRUE, eWLAN_PAL_FALSE);
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -07005579 /* Get free BD count */
Leo Chang345ef992013-07-12 10:17:29 -07005580 wpalSleep(10);
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -07005581 wpalReadRegister(WLANDXE_BMU_AVAILABLE_BD_PDU, &regValue);
Mihir Shete41c41bb2014-08-18 17:37:12 +05305582#ifdef WCN_PRONTO
5583 wpalReadRegister(WLANDXE_BMU_AVAILABLE_BD_PDU_LOCAL, &regValueLocal);
5584#endif
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -07005585 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_FATAL,
Mihir Shete41c41bb2014-08-18 17:37:12 +05305586 "===== DXE Dump Start HPS %d, FWS %d, TX PFC %d, ABD %d, ABD LOCAL %d =====",
Leo Chang345ef992013-07-12 10:17:29 -07005587 tempDxeCtrlBlk->hostPowerState, tempDxeCtrlBlk->rivaPowerState,
Mihir Shete41c41bb2014-08-18 17:37:12 +05305588 tempDxeCtrlBlk->txCompletedFrames, regValue, regValueLocal);
Madan Mohan Koyyalamudi24a00f92012-10-22 15:21:02 -07005589
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -07005590 wpalPacketStallUpdateInfo((wpt_uint32 *)&tempDxeCtrlBlk->rivaPowerState,
5591 &regValue,
5592 NULL,
5593 0);
Bansidhar Gopalachari609b79e2013-07-31 17:03:15 -07005594
Madan Mohan Koyyalamudi24a00f92012-10-22 15:21:02 -07005595 channelDebugMsg = (wpt_msg *)wpalMemoryAllocate(sizeof(wpt_msg));
5596 if(NULL == channelDebugMsg)
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -07005597 {
Madan Mohan Koyyalamudi24a00f92012-10-22 15:21:02 -07005598 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
5599 "WLANDXE_ChannelDebug, MSG MEM alloc Fail");
5600 return ;
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -07005601 }
Madan Mohan Koyyalamudi24a00f92012-10-22 15:21:02 -07005602
5603 channelDebugMsg->callback = dxeRxThreadChannelDebugHandler;
5604 status = wpalPostRxMsg(WDI_GET_PAL_CTX(), channelDebugMsg);
5605 if ( eWLAN_PAL_STATUS_SUCCESS != status )
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -07005606 {
Madan Mohan Koyyalamudi24a00f92012-10-22 15:21:02 -07005607 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
5608 "Tx thread Set power state req serialize fail status=%d",
Jeff Johnson9e237fb2013-10-30 18:46:20 -07005609 status);
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -07005610 }
5611 }
5612
Mihir Shete40a55652014-03-02 14:14:47 +05305613 if(debugFlags & WPAL_DEBUG_TX_DESC_RESYNC)
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -07005614 {
Mihir Shete40a55652014-03-02 14:14:47 +05305615 txDescReSyncMsg = (wpt_msg *)wpalMemoryAllocate(sizeof(wpt_msg));
5616 if(NULL == txDescReSyncMsg)
5617 {
5618 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
5619 "%s: Resync MSG MEM alloc Fail",__func__);
5620 }
5621 else
5622 {
5623 txDescReSyncMsg->callback = dxeDebugTxDescReSync;
5624 txDescReSyncMsg->pContext = tempDxeCtrlBlk;
5625 status = wpalPostTxMsg(WDI_GET_PAL_CTX(),
5626 txDescReSyncMsg);
5627 if(eWLAN_PAL_STATUS_SUCCESS != status)
5628 {
5629 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
5630 "%s: Post TX re-sync MSG fail",__func__);
5631 }
5632 }
5633 }
5634
5635 if(debugFlags & WPAL_DEBUG_START_HEALTH_TIMER)
5636 {
5637 HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
Jeff Johnson9e237fb2013-10-30 18:46:20 -07005638 "DXE TX Stall detect");
Madan Mohan Koyyalamudiea777012012-10-31 14:22:34 -07005639 /* Start Stall detect timer and detect stall */
5640 wpalTimerStart(&tempDxeCtrlBlk->dxeChannel[WDTS_CHANNEL_TX_LOW_PRI].healthMonitorTimer,
5641 T_WLANDXE_PERIODIC_HEALTH_M_TIME);
Madan Mohan Koyyalamudi8cb53982012-09-28 14:34:47 -07005642 }
5643 return;
Madan Mohan Koyyalamudi48139e32012-10-11 14:43:56 -07005644}