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gerrit-public.fairphone.software / toolchain / llvm-project / 00b51bf123d83d19b4dfc916676a7aed1b9da41e / . / llvm / test / CodeGen / ARM / atomic-64bit.ll
blob: 8841483c97a47cd312b1b2c5e5f40082141c98a4 [file] [log] [blame]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]1; RUN: llc < %s -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-LE
2; RUN: llc < %s -mtriple=thumbv7-none-linux-gnueabihf | FileCheck %s --check-prefix=CHECK-THUMB --check-prefix=CHECK-THUMB-LE
Eric Christopher661f2d12014-12-18 02:20:58 +0000[diff] [blame]3; RUN: llc < %s -mtriple=armebv7 -target-abi apcs | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-BE
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]4; RUN: llc < %s -mtriple=thumbebv7-none-linux-gnueabihf | FileCheck %s --check-prefix=CHECK-THUMB --check-prefix=CHECK-THUMB-BE
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]5
6define i64 @test1(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]7; CHECK-LABEL: test1:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]8; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]9; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]10; CHECK-LE: adds [[REG3:(r[0-9]?[02468])]], [[REG1]]
11; CHECK-LE: adc [[REG4:(r[0-9]?[13579])]], [[REG2]]
12; CHECK-BE: adds [[REG4:(r[0-9]?[13579])]], [[REG2]]
13; CHECK-BE: adc [[REG3:(r[0-9]?[02468])]], [[REG1]]
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]14; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]15; CHECK: cmp
16; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]17; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]18
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]19; CHECK-THUMB-LABEL: test1:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]20; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]21; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]22; CHECK-THUMB-LE: adds.w [[REG3:[a-z0-9]+]], [[REG1]]
23; CHECK-THUMB-LE: adc.w [[REG4:[a-z0-9]+]], [[REG2]]
24; CHECK-THUMB-BE: adds.w [[REG4:[a-z0-9]+]], [[REG2]]
25; CHECK-THUMB-BE: adc.w [[REG3:[a-z0-9]+]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]26; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
27; CHECK-THUMB: cmp
28; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]29; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]30
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]31 %r = atomicrmw add i64* %ptr, i64 %val seq_cst
32 ret i64 %r
33}
34
35define i64 @test2(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]36; CHECK-LABEL: test2:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]37; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]38; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]39; CHECK-LE: subs [[REG3:(r[0-9]?[02468])]], [[REG1]]
40; CHECK-LE: sbc [[REG4:(r[0-9]?[13579])]], [[REG2]]
41; CHECK-BE: subs [[REG4:(r[0-9]?[13579])]], [[REG2]]
42; CHECK-BE: sbc [[REG3:(r[0-9]?[02468])]], [[REG1]]
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]43; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]44; CHECK: cmp
45; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]46; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]47
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]48; CHECK-THUMB-LABEL: test2:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]49; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]50; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]51; CHECK-THUMB-LE: subs.w [[REG3:[a-z0-9]+]], [[REG1]]
52; CHECK-THUMB-LE: sbc.w [[REG4:[a-z0-9]+]], [[REG2]]
53; CHECK-THUMB-BE: subs.w [[REG4:[a-z0-9]+]], [[REG2]]
54; CHECK-THUMB-BE: sbc.w [[REG3:[a-z0-9]+]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]55; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
56; CHECK-THUMB: cmp
57; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]58; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]59
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]60 %r = atomicrmw sub i64* %ptr, i64 %val seq_cst
61 ret i64 %r
62}
63
64define i64 @test3(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]65; CHECK-LABEL: test3:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]66; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]67; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]68; CHECK-LE-DAG: and [[REG3:(r[0-9]?[02468])]], [[REG1]]
69; CHECK-LE-DAG: and [[REG4:(r[0-9]?[13579])]], [[REG2]]
70; CHECK-BE-DAG: and [[REG4:(r[0-9]?[13579])]], [[REG2]]
71; CHECK-BE-DAG: and [[REG3:(r[0-9]?[02468])]], [[REG1]]
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]72; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]73; CHECK: cmp
74; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]75; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]76
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]77; CHECK-THUMB-LABEL: test3:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]78; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]79; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]80; CHECK-THUMB-LE-DAG: and.w [[REG3:[a-z0-9]+]], [[REG1]]
81; CHECK-THUMB-LE-DAG: and.w [[REG4:[a-z0-9]+]], [[REG2]]
82; CHECK-THUMB-BE-DAG: and.w [[REG4:[a-z0-9]+]], [[REG2]]
83; CHECK-THUMB-BE-DAG: and.w [[REG3:[a-z0-9]+]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]84; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
85; CHECK-THUMB: cmp
86; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]87; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]88
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]89 %r = atomicrmw and i64* %ptr, i64 %val seq_cst
90 ret i64 %r
91}
92
93define i64 @test4(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]94; CHECK-LABEL: test4:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]95; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]96; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]97; CHECK-LE-DAG: orr [[REG3:(r[0-9]?[02468])]], [[REG1]]
98; CHECK-LE-DAG: orr [[REG4:(r[0-9]?[13579])]], [[REG2]]
99; CHECK-BE-DAG: orr [[REG4:(r[0-9]?[13579])]], [[REG2]]
100; CHECK-BE-DAG: orr [[REG3:(r[0-9]?[02468])]], [[REG1]]
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]101; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]102; CHECK: cmp
103; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]104; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]105
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]106; CHECK-THUMB-LABEL: test4:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]107; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]108; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]109; CHECK-THUMB-LE-DAG: orr.w [[REG3:[a-z0-9]+]], [[REG1]]
110; CHECK-THUMB-LE-DAG: orr.w [[REG4:[a-z0-9]+]], [[REG2]]
111; CHECK-THUMB-BE-DAG: orr.w [[REG4:[a-z0-9]+]], [[REG2]]
112; CHECK-THUMB-BE-DAG: orr.w [[REG3:[a-z0-9]+]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]113; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
114; CHECK-THUMB: cmp
115; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]116; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]117
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]118 %r = atomicrmw or i64* %ptr, i64 %val seq_cst
119 ret i64 %r
120}
121
122define i64 @test5(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]123; CHECK-LABEL: test5:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]124; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]125; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]126; CHECK-LE-DAG: eor [[REG3:(r[0-9]?[02468])]], [[REG1]]
127; CHECK-LE-DAG: eor [[REG4:(r[0-9]?[13579])]], [[REG2]]
128; CHECK-BE-DAG: eor [[REG4:(r[0-9]?[13579])]], [[REG2]]
129; CHECK-BE-DAG: eor [[REG3:(r[0-9]?[02468])]], [[REG1]]
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]130; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]131; CHECK: cmp
132; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]133; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]134
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]135; CHECK-THUMB-LABEL: test5:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]136; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]137; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]138; CHECK-THUMB-LE-DAG: eor.w [[REG3:[a-z0-9]+]], [[REG1]]
139; CHECK-THUMB-LE-DAG: eor.w [[REG4:[a-z0-9]+]], [[REG2]]
140; CHECK-THUMB-BE-DAG: eor.w [[REG4:[a-z0-9]+]], [[REG2]]
141; CHECK-THUMB-BE-DAG: eor.w [[REG3:[a-z0-9]+]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]142; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
143; CHECK-THUMB: cmp
144; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]145; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]146
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]147 %r = atomicrmw xor i64* %ptr, i64 %val seq_cst
148 ret i64 %r
149}
150
151define i64 @test6(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]152; CHECK-LABEL: test6:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]153; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]154; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
155; CHECK: strexd {{[a-z0-9]+}}, {{r[0-9]?[02468]}}, {{r[0-9]?[13579]}}
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]156; CHECK: cmp
157; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]158; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]159
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]160; CHECK-THUMB-LABEL: test6:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]161; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]162; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
163; CHECK-THUMB: strexd {{[a-z0-9]+}}, {{[a-z0-9]+}}, {{[a-z0-9]+}}
164; CHECK-THUMB: cmp
165; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]166; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]167
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]168 %r = atomicrmw xchg i64* %ptr, i64 %val seq_cst
169 ret i64 %r
Eli Friedman2c7bb522011-08-31 00:41:05 +0000[diff] [blame]170}
Eli Friedman1ccecbb2011-08-31 17:52:22 +0000[diff] [blame]171
172define i64 @test7(i64* %ptr, i64 %val1, i64 %val2) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]173; CHECK-LABEL: test7:
Tim Northover20b9f732014-06-13 16:45:52 +0000[diff] [blame]174; CHECK-DAG: mov [[VAL1LO:r[0-9]+]], r1
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]175; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northoverd32f8e62016-02-22 20:55:50 +0000[diff] [blame]176; CHECK-LE-DAG: eor [[MISMATCH_LO:.*]], [[REG1]], [[VAL1LO]]
177; CHECK-LE-DAG: eor [[MISMATCH_HI:.*]], [[REG2]], r2
178; CHECK-BE-DAG: eor [[MISMATCH_LO:.*]], [[REG2]], r2
179; CHECK-BE-DAG: eor [[MISMATCH_HI:.*]], [[REG1]], r1
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]180; CHECK: orrs {{r[0-9]+}}, [[MISMATCH_LO]], [[MISMATCH_HI]]
Eli Friedman1ccecbb2011-08-31 17:52:22 +0000[diff] [blame]181; CHECK: bne
Tim Northoverd32f8e62016-02-22 20:55:50 +0000[diff] [blame]182; CHECK-DAG: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]183; CHECK: strexd {{[a-z0-9]+}}, {{r[0-9]?[02468]}}, {{r[0-9]?[13579]}}
Eli Friedman1ccecbb2011-08-31 17:52:22 +0000[diff] [blame]184; CHECK: cmp
Tim Northoverd32f8e62016-02-22 20:55:50 +0000[diff] [blame]185; CHECK: beq
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]186; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]187
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]188; CHECK-THUMB-LABEL: test7:
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]189; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]190; CHECK-THUMB-LE-DAG: eor.w [[MISMATCH_LO:[a-z0-9]+]], [[REG1]], r2
191; CHECK-THUMB-LE-DAG: eor.w [[MISMATCH_HI:[a-z0-9]+]], [[REG2]], r3
Tim Northoverb4ddc082014-05-30 10:09:59 +0000[diff] [blame]192; CHECK-THUMB-BE-DAG: eor.w [[MISMATCH_HI:[a-z0-9]+]], [[REG1]], r2
193; CHECK-THUMB-BE-DAG: eor.w [[MISMATCH_LO:[a-z0-9]+]], [[REG2]], r3
Tim Northoverd32f8e62016-02-22 20:55:50 +0000[diff] [blame]194; CHECK-THUMB-LE: orrs.w {{.*}}, [[MISMATCH_LO]], [[MISMATCH_HI]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]195; CHECK-THUMB: bne
Tim Northoverd32f8e62016-02-22 20:55:50 +0000[diff] [blame]196; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]197; CHECK-THUMB: strexd {{[a-z0-9]+}}, {{[a-z0-9]+}}, {{[a-z0-9]+}}
198; CHECK-THUMB: cmp
Tim Northoverd32f8e62016-02-22 20:55:50 +0000[diff] [blame]199; CHECK-THUMB: beq
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]200; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]201
Tim Northover420a2162014-06-13 14:24:07 +0000[diff] [blame]202 %pair = cmpxchg i64* %ptr, i64 %val1, i64 %val2 seq_cst seq_cst
203 %r = extractvalue { i64, i1 } %pair, 0
Eli Friedman1ccecbb2011-08-31 17:52:22 +0000[diff] [blame]204 ret i64 %r
205}
Eli Friedman7c3bded2011-08-31 18:26:09 +0000[diff] [blame]206
Amara Emersonb4ad2f32013-09-26 12:22:36 +0000[diff] [blame]207; Compiles down to a single ldrexd
Eli Friedman7c3bded2011-08-31 18:26:09 +0000[diff] [blame]208define i64 @test8(i64* %ptr) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]209; CHECK-LABEL: test8:
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]210; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northoverf520eff2015-12-02 18:12:57 +0000[diff] [blame]211; CHECK-NOT: strexd
212; CHECK: clrex
213; CHECK-NOT: strexd
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]214; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]215
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]216; CHECK-THUMB-LABEL: test8:
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]217; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Tim Northoverf520eff2015-12-02 18:12:57 +0000[diff] [blame]218; CHECK-THUMB-NOT: strexd
219; CHECK-THUMB: clrex
220; CHECK-THUMB-NOT: strexd
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]221; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]222
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]223 %r = load atomic i64, i64* %ptr seq_cst, align 8
Eli Friedman7c3bded2011-08-31 18:26:09 +0000[diff] [blame]224 ret i64 %r
225}
226
227; Compiles down to atomicrmw xchg; there really isn't any more efficient
228; way to write it.
229define void @test9(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]230; CHECK-LABEL: test9:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]231; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]232; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
233; CHECK: strexd {{[a-z0-9]+}}, {{r[0-9]?[02468]}}, {{r[0-9]?[13579]}}
Eli Friedman7c3bded2011-08-31 18:26:09 +0000[diff] [blame]234; CHECK: cmp
235; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]236; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]237
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]238; CHECK-THUMB-LABEL: test9:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]239; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]240; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
241; CHECK-THUMB: strexd {{[a-z0-9]+}}, {{[a-z0-9]+}}, {{[a-z0-9]+}}
242; CHECK-THUMB: cmp
243; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]244; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]245
Eli Friedman7c3bded2011-08-31 18:26:09 +0000[diff] [blame]246 store atomic i64 %val, i64* %ptr seq_cst, align 8
247 ret void
248}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]249
250define i64 @test10(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]251; CHECK-LABEL: test10:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]252; CHECK: dmb {{ish$}}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]253; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]254; CHECK: mov [[OUT_HI:[a-z0-9]+]], r2
Peter Collingbourne86b9fbe2016-03-21 18:00:02 +0000[diff] [blame]255; CHECK-LE: subs {{[^,]+}}, r1, [[REG1]]
256; CHECK-BE: subs {{[^,]+}}, r2, [[REG2]]
257; CHECK-LE: sbcs {{[^,]+}}, r2, [[REG2]]
258; CHECK-BE: sbcs {{[^,]+}}, r1, [[REG1]]
259; CHECK: mov [[CMP:[a-z0-9]+]], #0
260; CHECK: movwge [[CMP]], #1
261; CHECK: cmp [[CMP]], #0
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]262; CHECK: movne [[OUT_HI]], [[REG2]]
263; CHECK: mov [[OUT_LO:[a-z0-9]+]], r1
264; CHECK: movne [[OUT_LO]], [[REG1]]
Peter Collingbourne86b9fbe2016-03-21 18:00:02 +0000[diff] [blame]265; CHECK: strexd {{[a-z0-9]+}}, [[OUT_LO]], [[OUT_HI]]
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]266; CHECK: cmp
267; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]268; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]269
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]270; CHECK-THUMB-LABEL: test10:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]271; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]272; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Peter Collingbourne86b9fbe2016-03-21 18:00:02 +0000[diff] [blame]273; CHECK-THUMB: mov [[OUT_LO:[a-z0-9]+]], r2
274; CHECK-THUMB-LE: subs.w {{[^,]+}}, r2, [[REG1]]
275; CHECK-THUMB-BE: subs.w {{[^,]+}}, r3, [[REG2]]
276; CHECK-THUMB-LE: sbcs.w {{[^,]+}}, r3, [[REG2]]
277; CHECK-THUMB-BE: sbcs.w {{[^,]+}}, r2, [[REG1]]
278; CHECK-THUMB: mov.w [[CMP:[a-z0-9]+]], #0
279; CHECK-THUMB: movge.w [[CMP]], #1
280; CHECK-THUMB: cmp.w [[CMP]], #0
281; CHECK-THUMB: mov [[OUT_HI:[a-z0-9]+]], r3
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]282; CHECK-THUMB: movne [[OUT_HI]], [[REG2]]
283; CHECK-THUMB: movne [[OUT_LO]], [[REG1]]
Peter Collingbourne86b9fbe2016-03-21 18:00:02 +0000[diff] [blame]284; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[OUT_LO]], [[OUT_HI]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]285; CHECK-THUMB: cmp
286; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]287; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]288
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]289 %r = atomicrmw min i64* %ptr, i64 %val seq_cst
290 ret i64 %r
291}
292
293define i64 @test11(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]294; CHECK-LABEL: test11:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]295; CHECK: dmb {{ish$}}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]296; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]297; CHECK: mov [[OUT_HI:[a-z0-9]+]], r2
Peter Collingbourne86b9fbe2016-03-21 18:00:02 +0000[diff] [blame]298; CHECK-LE: subs {{[^,]+}}, r1, [[REG1]]
299; CHECK-BE: subs {{[^,]+}}, r2, [[REG2]]
300; CHECK-LE: sbcs {{[^,]+}}, r2, [[REG2]]
301; CHECK-BE: sbcs {{[^,]+}}, r1, [[REG1]]
302; CHECK: mov [[CMP:[a-z0-9]+]], #0
303; CHECK: movwhs [[CMP]], #1
304; CHECK: cmp [[CMP]], #0
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]305; CHECK: movne [[OUT_HI]], [[REG2]]
306; CHECK: mov [[OUT_LO:[a-z0-9]+]], r1
307; CHECK: movne [[OUT_LO]], [[REG1]]
Peter Collingbourne86b9fbe2016-03-21 18:00:02 +0000[diff] [blame]308; CHECK: strexd {{[a-z0-9]+}}, [[OUT_LO]], [[OUT_HI]]
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]309; CHECK: cmp
310; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]311; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]312
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]313; CHECK-THUMB-LABEL: test11:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]314; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]315; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Peter Collingbourne86b9fbe2016-03-21 18:00:02 +0000[diff] [blame]316; CHECK-THUMB: mov [[OUT_LO:[a-z0-9]+]], r2
317; CHECK-THUMB-LE: subs.w {{[^,]+}}, r2, [[REG1]]
318; CHECK-THUMB-BE: subs.w {{[^,]+}}, r3, [[REG2]]
319; CHECK-THUMB-LE: sbcs.w {{[^,]+}}, r3, [[REG2]]
320; CHECK-THUMB-BE: sbcs.w {{[^,]+}}, r2, [[REG1]]
321; CHECK-THUMB: mov.w [[CMP:[a-z0-9]+]], #0
322; CHECK-THUMB: movhs.w [[CMP]], #1
323; CHECK-THUMB: cmp.w [[CMP]], #0
324; CHECK-THUMB: mov [[OUT_HI:[a-z0-9]+]], r3
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]325; CHECK-THUMB: movne [[OUT_HI]], [[REG2]]
326; CHECK-THUMB: movne [[OUT_LO]], [[REG1]]
Peter Collingbourne86b9fbe2016-03-21 18:00:02 +0000[diff] [blame]327; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[OUT_LO]], [[OUT_HI]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]328; CHECK-THUMB: cmp
329; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]330; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]331
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]332 %r = atomicrmw umin i64* %ptr, i64 %val seq_cst
333 ret i64 %r
334}
335
336define i64 @test12(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]337; CHECK-LABEL: test12:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]338; CHECK: dmb {{ish$}}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]339; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]340; CHECK: mov [[OUT_HI:[a-z0-9]+]], r2
Peter Collingbourne86b9fbe2016-03-21 18:00:02 +0000[diff] [blame]341; CHECK-LE: subs {{[^,]+}}, r1, [[REG1]]
342; CHECK-BE: subs {{[^,]+}}, r2, [[REG2]]
343; CHECK-LE: sbcs {{[^,]+}}, r2, [[REG2]]
344; CHECK-BE: sbcs {{[^,]+}}, r1, [[REG1]]
345; CHECK: mov [[CMP:[a-z0-9]+]], #0
346; CHECK: movwlt [[CMP]], #1
347; CHECK: cmp [[CMP]], #0
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]348; CHECK: movne [[OUT_HI]], [[REG2]]
349; CHECK: mov [[OUT_LO:[a-z0-9]+]], r1
350; CHECK: movne [[OUT_LO]], [[REG1]]
Peter Collingbourne86b9fbe2016-03-21 18:00:02 +0000[diff] [blame]351; CHECK: strexd {{[a-z0-9]+}}, [[OUT_LO]], [[OUT_HI]]
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]352; CHECK: cmp
353; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]354; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]355
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]356; CHECK-THUMB-LABEL: test12:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]357; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]358; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Peter Collingbourne86b9fbe2016-03-21 18:00:02 +0000[diff] [blame]359; CHECK-THUMB: mov [[OUT_LO:[a-z0-9]+]], r2
360; CHECK-THUMB-LE: subs.w {{[^,]+}}, r2, [[REG1]]
361; CHECK-THUMB-BE: subs.w {{[^,]+}}, r3, [[REG2]]
362; CHECK-THUMB-LE: sbcs.w {{[^,]+}}, r3, [[REG2]]
363; CHECK-THUMB-BE: sbcs.w {{[^,]+}}, r2, [[REG1]]
364; CHECK-THUMB: mov.w [[CMP:[a-z0-9]+]], #0
365; CHECK-THUMB: movlt.w [[CMP]], #1
366; CHECK-THUMB: cmp.w [[CMP]], #0
367; CHECK-THUMB: mov [[OUT_HI:[a-z0-9]+]], r3
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]368; CHECK-THUMB: movne [[OUT_HI]], [[REG2]]
369; CHECK-THUMB: movne [[OUT_LO]], [[REG1]]
Peter Collingbourne86b9fbe2016-03-21 18:00:02 +0000[diff] [blame]370; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[OUT_LO]], [[OUT_HI]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]371; CHECK-THUMB: cmp
372; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]373; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]374
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]375 %r = atomicrmw max i64* %ptr, i64 %val seq_cst
376 ret i64 %r
377}
378
379define i64 @test13(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]380; CHECK-LABEL: test13:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]381; CHECK: dmb {{ish$}}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]382; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]383; CHECK: mov [[OUT_HI:[a-z0-9]+]], r2
Peter Collingbourne86b9fbe2016-03-21 18:00:02 +0000[diff] [blame]384; CHECK-LE: subs {{[^,]+}}, r1, [[REG1]]
385; CHECK-BE: subs {{[^,]+}}, r2, [[REG2]]
386; CHECK-LE: sbcs {{[^,]+}}, r2, [[REG2]]
387; CHECK-BE: sbcs {{[^,]+}}, r1, [[REG1]]
388; CHECK: mov [[CMP:[a-z0-9]+]], #0
389; CHECK: movwlo [[CMP]], #1
390; CHECK: cmp [[CMP]], #0
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]391; CHECK: movne [[OUT_HI]], [[REG2]]
392; CHECK: mov [[OUT_LO:[a-z0-9]+]], r1
393; CHECK: movne [[OUT_LO]], [[REG1]]
Peter Collingbourne86b9fbe2016-03-21 18:00:02 +0000[diff] [blame]394; CHECK: strexd {{[a-z0-9]+}}, [[OUT_LO]], [[OUT_HI]]
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]395; CHECK: cmp
396; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]397; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]398
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]399; CHECK-THUMB-LABEL: test13:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]400; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]401; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Peter Collingbourne86b9fbe2016-03-21 18:00:02 +0000[diff] [blame]402; CHECK-THUMB: mov [[OUT_LO:[a-z0-9]+]], r2
403; CHECK-THUMB-LE: subs.w {{[^,]+}}, r2, [[REG1]]
404; CHECK-THUMB-BE: subs.w {{[^,]+}}, r3, [[REG2]]
405; CHECK-THUMB-LE: sbcs.w {{[^,]+}}, r3, [[REG2]]
406; CHECK-THUMB-BE: sbcs.w {{[^,]+}}, r2, [[REG1]]
407; CHECK-THUMB: mov.w [[CMP:[a-z0-9]+]], #0
408; CHECK-THUMB: movlo.w [[CMP]], #1
409; CHECK-THUMB: cmp.w [[CMP]], #0
410; CHECK-THUMB: mov [[OUT_HI:[a-z0-9]+]], r3
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]411; CHECK-THUMB: movne [[OUT_HI]], [[REG2]]
412; CHECK-THUMB: movne [[OUT_LO]], [[REG1]]
Peter Collingbourne86b9fbe2016-03-21 18:00:02 +0000[diff] [blame]413; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[OUT_LO]], [[OUT_HI]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]414; CHECK-THUMB: cmp
415; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]416; CHECK-THUMB: dmb {{ish$}}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]417 %r = atomicrmw umax i64* %ptr, i64 %val seq_cst
418 ret i64 %r
419}
420