blob: fea50824e447d00492b3d2ccbbf54a13109ed6ea [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -07001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Mitchel Humpherys52ffaec2012-10-09 15:40:13 -070014/include/ "msm8226-ion.dtsi"
Patrick Dalye8977aa2012-11-06 15:25:58 -080015/include/ "msm-gdsc.dtsi"
Mitchel Humpherys85d08692012-10-23 12:56:35 -070016/include/ "msm8226-iommu.dtsi"
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -070017/include/ "msm8226-pm.dtsi"
Eric Holmberg3d112ee2013-01-29 19:12:39 -070018/include/ "msm8226-smp2p.dtsi"
liu zhongf5c0edb2013-01-25 11:18:53 -070019/include/ "msm8226-gpu.dtsi"
Gagan Macf5b34d82013-01-28 17:11:10 -070020/include/ "msm8226-bus.dtsi"
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070021
22/ {
23 model = "Qualcomm MSM 8226";
24 compatible = "qcom,msm8226";
25 interrupt-parent = <&intc>;
26
27 intc: interrupt-controller@f9000000 {
28 compatible = "qcom,msm-qgic2";
29 interrupt-controller;
30 #interrupt-cells = <3>;
31 reg = <0xF9000000 0x1000>,
32 <0xF9002000 0x1000>;
33 };
34
35 msmgpio: gpio@fd510000 {
36 compatible = "qcom,msm-gpio";
37 interrupt-controller;
38 #interrupt-cells = <2>;
39 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -080040 gpio-controller;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070041 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -080042 ngpio = <117>;
Rohit Vaswanid2001522012-12-05 19:23:44 -080043 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -080044 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070045 };
46
47 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -080048 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070049 interrupts = <1 2 0 1 3 0>;
50 clock-frequency = <19200000>;
51 };
52
53 serial@f991f000 {
54 compatible = "qcom,msm-lsuart-v14";
55 reg = <0xf991f000 0x1000>;
56 interrupts = <0 109 0>;
57 status = "disabled";
58 };
59
60 serial@f995e000 {
61 compatible = "qcom,msm-lsuart-v14";
62 reg = <0xf995e000 0x1000>;
63 interrupts = <0 114 0>;
64 status = "disabled";
65 };
66
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -080067 qcom,msm-imem@fe805000 {
68 compatible = "qcom,msm-imem";
69 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
70 };
71
Yan He7c06ce32012-12-03 17:12:31 -080072 qcom,sps@f9984000 {
73 compatible = "qcom,msm_sps";
74 reg = <0xf9984000 0x15000>,
75 <0xf9999000 0xb000>;
76 interrupts = <0 94 0>;
77 };
78
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070079 usb@f9a55000 {
80 compatible = "qcom,hsusb-otg";
81 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +053082 interrupts = <0 134 0>, <0 140 0>;
83 interrupt-names = "core_irq", "async_irq";
David Keitel7184c6e2013-02-11 13:23:04 -080084 HSUSB_VDDCX-supply = <&pm8226_s1>;
85 HSUSB_1p8-supply = <&pm8226_l10>;
86 HSUSB_3p3-supply = <&pm8226_l20>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070087
88 qcom,hsusb-otg-phy-type = <2>;
89 qcom,hsusb-otg-mode = <1>;
90 qcom,hsusb-otg-otg-control = <1>;
91 qcom,hsusb-otg-disable-reset;
Mayank Rana5403e2a2013-02-26 11:18:39 +053092
93 qcom,msm-bus,name = "usb2";
94 qcom,msm-bus,num-cases = <2>;
95 qcom,msm-bus,active-only = <0>;
96 qcom,msm-bus,num-paths = <1>;
97 qcom,msm-bus,vectors-KBps =
98 <87 512 0 0>,
99 <87 512 60000 960000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700100 };
101
Mayank Rana6bd9a272013-01-29 16:23:23 +0530102 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700103 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530104 reg = <0xfe8050c8 0xc8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700105 };
106
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800107 wcd9xxx_intc: wcd9xxx-irq {
108 compatible = "qcom,wcd9xxx-irq";
109 interrupt-controller;
110 #interrupt-cells = <1>;
111 interrupt-parent = <&msmgpio>;
112 interrupts = <68 0>;
113 interrupt-names = "cdc-int";
114 };
115
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800116 slim@fe12f000 {
117 cell-index = <1>;
118 compatible = "qcom,slim-ngd";
119 reg = <0xfe12f000 0x35000>,
120 <0xfe104000 0x20000>;
121 reg-names = "slimbus_physical", "slimbus_bam_physical";
122 interrupts = <0 163 0>, <0 164 0>;
123 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800124
125 tapan_codec {
126 compatible = "qcom,tapan-slim-pgd";
127 elemental-addr = [00 01 E0 00 17 02];
128
129 interrupt-parent = <&wcd9xxx_intc>;
130 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
131 17 18 19 20 21 22 23 24 25 26 27 28>;
132 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
133
David Keitel7184c6e2013-02-11 13:23:04 -0800134 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800135 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
136 qcom,cdc-vdd-buck-current = <650000>;
137
David Keitel7184c6e2013-02-11 13:23:04 -0800138 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800139 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
140 qcom,cdc-vdd-h-current = <25000>;
141
David Keitel7184c6e2013-02-11 13:23:04 -0800142 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800143 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
144 qcom,cdc-vdd-px-current = <25000>;
145
David Keitel7184c6e2013-02-11 13:23:04 -0800146 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800147 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
148 qcom,cdc-vdd-a-1p2v-current = <10000>;
149
David Keitel7184c6e2013-02-11 13:23:04 -0800150 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800151 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
152 qcom,cdc-vdd-cx-current = <10000>;
153
154 qcom,cdc-micbias-ldoh-v = <0x3>;
155 qcom,cdc-micbias-cfilt1-mv = <1800>;
156 qcom,cdc-micbias-cfilt2-mv = <1800>;
157 qcom,cdc-micbias-cfilt3-mv = <1800>;
158
159 qcom,cdc-micbias1-cfilt-sel = <0x0>;
160 qcom,cdc-micbias2-cfilt-sel = <0x1>;
161 qcom,cdc-micbias3-cfilt-sel = <0x2>;
162
163 qcom,cdc-mclk-clk-rate = <9600000>;
164 qcom,cdc-slim-ifd = "tapan-slim-ifd";
165 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
166 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800167 };
168
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800169 qcom,msm-adsp-loader {
170 compatible = "qcom,adsp-loader";
171 qcom,adsp-state = <0>;
172 };
173
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800174 sound {
175 compatible = "qcom,msm8226-audio-tapan";
176 qcom,model = "msm8226-tapan-snd-card";
177
178 qcom,audio-routing =
179 "RX_BIAS", "MCLK",
180 "LDO_H", "MCLK",
181 "AMIC1", "MIC BIAS1 Internal1",
182 "MIC BIAS1 Internal1", "Handset Mic",
183 "AMIC2", "MIC BIAS2 External",
184 "MIC BIAS2 External", "Headset Mic",
185 "AMIC3", "MIC BIAS2 External",
186 "MIC BIAS2 External", "ANCRight Headset Mic",
187 "AMIC4", "MIC BIAS2 External",
188 "MIC BIAS2 External", "ANCLeft Headset Mic",
189 "DMIC1", "MIC BIAS1 External",
190 "MIC BIAS1 External", "Digital Mic1",
191 "DMIC2", "MIC BIAS1 External",
192 "MIC BIAS1 External", "Digital Mic2",
193 "DMIC3", "MIC BIAS3 External",
194 "MIC BIAS3 External", "Digital Mic3",
195 "DMIC4", "MIC BIAS3 External",
196 "MIC BIAS3 External", "Digital Mic4",
197 "DMIC5", "MIC BIAS4 External",
198 "MIC BIAS4 External", "Digital Mic5",
199 "DMIC6", "MIC BIAS4 External",
200 "MIC BIAS4 External", "Digital Mic6";
201 qcom,tapan-mclk-clk-freq = <9600000>;
202 };
203
204 qcom,msm-pcm {
205 compatible = "qcom,msm-pcm-dsp";
206 };
207
208 qcom,msm-pcm-routing {
209 compatible = "qcom,msm-pcm-routing";
210 };
211
212 qcom,msm-pcm-lpa {
213 compatible = "qcom,msm-pcm-lpa";
214 };
215
216 qcom,msm-compr-dsp {
217 compatible = "qcom,msm-compr-dsp";
218 };
219
220 qcom,msm-voip-dsp {
221 compatible = "qcom,msm-voip-dsp";
222 };
223
224 qcom,msm-pcm-voice {
225 compatible = "qcom,msm-pcm-voice";
226 };
227
228 qcom,msm-stub-codec {
229 compatible = "qcom,msm-stub-codec";
230 };
231
232 qcom,msm-dai-fe {
233 compatible = "qcom,msm-dai-fe";
234 };
235
236 qcom,msm-pcm-afe {
237 compatible = "qcom,msm-pcm-afe";
238 };
239
240 qcom,msm-dai-q6-hdmi {
241 compatible = "qcom,msm-dai-q6-hdmi";
242 qcom,msm-dai-q6-dev-id = <8>;
243 };
244
245 qcom,msm-dai-q6 {
246 compatible = "qcom,msm-dai-q6";
247 qcom,msm-dai-q6-sb-0-rx {
248 compatible = "qcom,msm-dai-q6-dev";
249 qcom,msm-dai-q6-dev-id = <16384>;
250 };
251
252 qcom,msm-dai-q6-sb-0-tx {
253 compatible = "qcom,msm-dai-q6-dev";
254 qcom,msm-dai-q6-dev-id = <16385>;
255 };
256
257 qcom,msm-dai-q6-sb-1-rx {
258 compatible = "qcom,msm-dai-q6-dev";
259 qcom,msm-dai-q6-dev-id = <16386>;
260 };
261
262 qcom,msm-dai-q6-sb-1-tx {
263 compatible = "qcom,msm-dai-q6-dev";
264 qcom,msm-dai-q6-dev-id = <16387>;
265 };
266
267 qcom,msm-dai-q6-sb-3-rx {
268 compatible = "qcom,msm-dai-q6-dev";
269 qcom,msm-dai-q6-dev-id = <16390>;
270 };
271
272 qcom,msm-dai-q6-sb-3-tx {
273 compatible = "qcom,msm-dai-q6-dev";
274 qcom,msm-dai-q6-dev-id = <16391>;
275 };
276
277 qcom,msm-dai-q6-sb-4-rx {
278 compatible = "qcom,msm-dai-q6-dev";
279 qcom,msm-dai-q6-dev-id = <16392>;
280 };
281
282 qcom,msm-dai-q6-sb-4-tx {
283 compatible = "qcom,msm-dai-q6-dev";
284 qcom,msm-dai-q6-dev-id = <16393>;
285 };
286
287 qcom,msm-dai-q6-bt-sco-rx {
288 compatible = "qcom,msm-dai-q6-dev";
289 qcom,msm-dai-q6-dev-id = <12288>;
290 };
291
292 qcom,msm-dai-q6-bt-sco-tx {
293 compatible = "qcom,msm-dai-q6-dev";
294 qcom,msm-dai-q6-dev-id = <12289>;
295 };
296
297 qcom,msm-dai-q6-int-fm-rx {
298 compatible = "qcom,msm-dai-q6-dev";
299 qcom,msm-dai-q6-dev-id = <12292>;
300 };
301
302 qcom,msm-dai-q6-int-fm-tx {
303 compatible = "qcom,msm-dai-q6-dev";
304 qcom,msm-dai-q6-dev-id = <12293>;
305 };
306
307 qcom,msm-dai-q6-be-afe-pcm-rx {
308 compatible = "qcom,msm-dai-q6-dev";
309 qcom,msm-dai-q6-dev-id = <224>;
310 };
311
312 qcom,msm-dai-q6-be-afe-pcm-tx {
313 compatible = "qcom,msm-dai-q6-dev";
314 qcom,msm-dai-q6-dev-id = <225>;
315 };
316
317 qcom,msm-dai-q6-afe-proxy-rx {
318 compatible = "qcom,msm-dai-q6-dev";
319 qcom,msm-dai-q6-dev-id = <241>;
320 };
321
322 qcom,msm-dai-q6-afe-proxy-tx {
323 compatible = "qcom,msm-dai-q6-dev";
324 qcom,msm-dai-q6-dev-id = <240>;
325 };
326 };
327
328 qcom,msm-pcm-hostless {
329 compatible = "qcom,msm-pcm-hostless";
330 };
331
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700332 qcom,wdt@f9017000 {
333 compatible = "qcom,msm-watchdog";
334 reg = <0xf9017000 0x1000>;
335 interrupts = <0 3 0>, <0 4 0>;
336 qcom,bark-time = <11000>;
337 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800338 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700339 };
340
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600341 qcom,smem@fa00000 {
342 compatible = "qcom,smem";
343 reg = <0xfa00000 0x200000>,
344 <0xfa006000 0x1000>,
345 <0xfc428000 0x4000>;
346 reg-names = "smem", "irq-reg-base", "aux-mem1";
347
348 qcom,smd-modem {
349 compatible = "qcom,smd";
350 qcom,smd-edge = <0>;
351 qcom,smd-irq-offset = <0x8>;
352 qcom,smd-irq-bitmask = <0x1000>;
353 qcom,pil-string = "modem";
354 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800355 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600356
357 qcom,smsm-modem {
358 compatible = "qcom,smsm";
359 qcom,smsm-edge = <0>;
360 qcom,smsm-irq-offset = <0x8>;
361 qcom,smsm-irq-bitmask = <0x2000>;
362 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800363 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600364
365 qcom,smd-adsp {
366 compatible = "qcom,smd";
367 qcom,smd-edge = <1>;
368 qcom,smd-irq-offset = <0x8>;
369 qcom,smd-irq-bitmask = <0x100>;
370 qcom,pil-string = "adsp";
371 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800372 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600373
374 qcom,smsm-adsp {
375 compatible = "qcom,smsm";
376 qcom,smsm-edge = <1>;
377 qcom,smsm-irq-offset = <0x8>;
378 qcom,smsm-irq-bitmask = <0x200>;
379 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800380 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600381
382 qcom,smd-wcnss {
383 compatible = "qcom,smd";
384 qcom,smd-edge = <6>;
385 qcom,smd-irq-offset = <0x8>;
386 qcom,smd-irq-bitmask = <0x20000>;
387 qcom,pil-string = "wcnss";
388 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800389 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600390
391 qcom,smsm-wcnss {
392 compatible = "qcom,smsm";
393 qcom,smsm-edge = <6>;
394 qcom,smsm-irq-offset = <0x8>;
395 qcom,smsm-irq-bitmask = <0x80000>;
396 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800397 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600398
399 qcom,smd-rpm {
400 compatible = "qcom,smd";
401 qcom,smd-edge = <15>;
402 qcom,smd-irq-offset = <0x8>;
403 qcom,smd-irq-bitmask = <0x1>;
404 interrupts = <0 168 1>;
405 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800406 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600407 };
408
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700409 rpm_bus: qcom,rpm-smd {
410 compatible = "qcom,rpm-smd";
411 rpm-channel-name = "rpm_requests";
412 rpm-channel-type = <15>; /* SMD_APPS_RPM */
413 rpm-standalone;
414 };
415
Asutosh Das99912e62012-12-06 12:38:46 +0530416 sdcc1: qcom,sdcc@f9824000 {
417 cell-index = <1>; /* SDC1 eMMC slot */
418 compatible = "qcom,msm-sdcc";
419
Asutosh Das6b82fc52012-11-23 12:00:26 +0530420 reg = <0xf9824000 0x800>,
421 <0xf9824800 0x100>,
422 <0xf9804000 0x7000>;
423 reg-names = "core_mem", "dml_mem", "bam_mem";
424 interrupts = <0 123 0>, <0 137 0>;
425 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530426
427 qcom,bus-width = <8>;
428 status = "disabled";
429 };
430
431 sdcc2: qcom,sdcc@f98a4000 {
432 cell-index = <2>; /* SDC2 SD card slot */
433 compatible = "qcom,msm-sdcc";
434
Asutosh Das6b82fc52012-11-23 12:00:26 +0530435 reg = <0xf98a4000 0x800>,
436 <0xf98a4800 0x100>,
437 <0xf9884000 0x7000>;
438 reg-names = "core_mem", "dml_mem", "bam_mem";
439 interrupts = <0 125 0>, <0 220 0>;
440 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530441
442 qcom,bus-width = <4>;
443 status = "disabled";
444 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700445
446 spmi_bus: qcom,spmi@fc4c0000 {
447 cell-index = <0>;
448 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700449 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700450 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700451 <0Xfc4cb000 0x1000>,
452 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700453 /* 190,ee0_krait_hlos_spmi_periph_irq */
454 /* 187,channel_0_krait_hlos_trans_done_irq */
455 interrupts = <0 190 0>, <0 187 0>;
456 qcom,not-wakeup;
457 qcom,pmic-arb-ee = <0>;
458 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700459 };
460
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700461 i2c@f9926000 { /* BLSP-1 QUP-4 */
462 cell-index = <0>;
463 compatible = "qcom,i2c-qup";
464 reg = <0xf9926000 0x1000>;
465 #address-cells = <1>;
466 #size-cells = <0>;
467 reg-names = "qup_phys_addr";
468 interrupts = <0 98 0>;
469 interrupt-names = "qup_err_intr";
470 qcom,i2c-bus-freq = <100000>;
471 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700472
473 qcom,acpuclk@f9011050 {
474 compatible = "qcom,acpuclk-a7";
475 reg = <0xf9011050 0x8>;
476 reg-names = "rcg_base";
David Keitel7184c6e2013-02-11 13:23:04 -0800477 a7_cpu-supply = <&pm8226_s2>;
478 a7_mem-supply = <&pm8226_l3>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700479 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700480
481 qcom,ocmem@fdd00000 {
482 compatible = "qcom,msm-ocmem";
483 reg = <0xfdd00000 0x2000>,
484 <0xfdd02000 0x2000>,
485 <0xfe039000 0x400>,
486 <0xfec00000 0x180000>;
487 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
488 interrupts = <0 76 0 0 77 0>;
489 interrupt-names = "ocmem_irq", "dm_irq";
490 qcom,ocmem-num-regions = <0x1>;
491 qcom,ocmem-num-macros = <0x2>;
492 qcom,resource-type = <0x706d636f>;
493 #address-cells = <1>;
494 #size-cells = <1>;
495 ranges = <0x0 0xfec00000 0x180000>;
496
497 partition@0 {
498 reg = <0x0 0x100000>;
499 qcom,ocmem-part-name = "graphics";
500 qcom,ocmem-part-min = <0x80000>;
501 };
502 };
503
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800504 qcom,venus@fdce0000 {
505 compatible = "qcom,pil-venus";
506 reg = <0xfdce0000 0x4000>,
507 <0xfdc80000 0x400>;
508 reg-names = "wrapper_base", "vbif_base";
509 vdd-supply = <&gdsc_venus>;
510
511 qcom,firmware-name = "venus";
512 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800513
514 qcom,pronto@fb21b000 {
515 compatible = "qcom,pil-pronto";
516 reg = <0xfb21b000 0x3000>,
517 <0xfc401700 0x4>,
518 <0xfd485300 0xc>;
519 reg-names = "pmu_base", "clk_base", "halt_base";
520 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800521 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800522
523 qcom,firmware-name = "wcnss";
524 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800525
Patrick Daly4df59842013-01-09 12:31:40 -0800526 qcom,lpass@fe200000 {
527 compatible = "qcom,pil-q6v5-lpass";
528 reg = <0xfe200000 0x00100>,
529 <0xfd485100 0x00010>;
530 reg-names = "qdsp6_base", "halt_base";
Patrick Dalyea7111c2013-02-08 17:48:20 -0800531 vdd_cx-supply = <&pm8026_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800532 interrupts = <0 162 1>;
533
534 qcom,firmware-name = "adsp";
535 };
536
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800537 qcom,msm-mem-hole {
538 compatible = "qcom,msm-mem-hole";
539 qcom,memblock-remove = <0x8100000 0x7e00000>; /* Address and Size of Hole */
540 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800541
542 tsens: tsens@fc4a8000 {
543 compatible = "qcom,msm-tsens";
544 reg = <0xfc4a8000 0x2000>,
545 <0xfc4b8000 0x1000>;
546 reg-names = "tsens_physical", "tsens_eeprom_physical";
547 interrupts = <0 184 0>;
548 qcom,sensors = <7>;
549 qcom,slope = <3200 3200 3200 3200 3200 3200 3200>;
550 qcom,calib-mode = "fuse_map2";
551 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700552
553 qcom,msm-thermal {
554 compatible = "qcom,msm-thermal";
555 qcom,sensor-id = <0>;
556 qcom,poll-ms = <250>;
557 qcom,limit-temp = <60>;
558 qcom,temp-hysteresis = <10>;
559 qcom,freq-step = <2>;
560 };
561
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700562};
David Collins37ddb972012-10-17 15:00:26 -0700563
Patrick Dalye8977aa2012-11-06 15:25:58 -0800564&gdsc_venus {
565 status = "ok";
566};
567
568&gdsc_mdss {
569 status = "ok";
570};
571
572&gdsc_jpeg {
573 status = "ok";
574};
575
576&gdsc_vfe {
577 status = "ok";
578};
579
580&gdsc_oxili_cx {
581 status = "ok";
582};
583
584&gdsc_usb_hsic {
585 status = "ok";
586};
587
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700588/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800589/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800590
591&pm8226_vadc {
592 chan@0 {
593 label = "usb_in";
594 reg = <0>;
595 qcom,decimation = <0>;
596 qcom,pre-div-channel-scaling = <4>;
597 qcom,calibration-type = "absolute";
598 qcom,scale-function = <0>;
599 qcom,hw-settle-time = <0>;
600 qcom,fast-avg-setup = <0>;
601 };
602
603 chan@2 {
604 label = "vchg_sns";
605 reg = <2>;
606 qcom,decimation = <0>;
607 qcom,pre-div-channel-scaling = <3>;
608 qcom,calibration-type = "absolute";
609 qcom,scale-function = <0>;
610 qcom,hw-settle-time = <0>;
611 qcom,fast-avg-setup = <0>;
612 };
613
614 chan@5 {
615 label = "vcoin";
616 reg = <5>;
617 qcom,decimation = <0>;
618 qcom,pre-div-channel-scaling = <1>;
619 qcom,calibration-type = "absolute";
620 qcom,scale-function = <0>;
621 qcom,hw-settle-time = <0>;
622 qcom,fast-avg-setup = <0>;
623 };
624
625 chan@6 {
626 label = "vbat_sns";
627 reg = <6>;
628 qcom,decimation = <0>;
629 qcom,pre-div-channel-scaling = <1>;
630 qcom,calibration-type = "absolute";
631 qcom,scale-function = <0>;
632 qcom,hw-settle-time = <0>;
633 qcom,fast-avg-setup = <0>;
634 };
635
636 chan@7 {
637 label = "vph_pwr";
638 reg = <7>;
639 qcom,decimation = <0>;
640 qcom,pre-div-channel-scaling = <1>;
641 qcom,calibration-type = "absolute";
642 qcom,scale-function = <0>;
643 qcom,hw-settle-time = <0>;
644 qcom,fast-avg-setup = <0>;
645 };
646
647 chan@30 {
648 label = "batt_therm";
649 reg = <0x30>;
650 qcom,decimation = <0>;
651 qcom,pre-div-channel-scaling = <0>;
652 qcom,calibration-type = "ratiometric";
653 qcom,scale-function = <1>;
654 qcom,hw-settle-time = <0>;
655 qcom,fast-avg-setup = <0>;
656 };
657
658 chan@31 {
659 label = "batt_id";
660 reg = <0x31>;
661 qcom,decimation = <0>;
662 qcom,pre-div-channel-scaling = <0>;
663 qcom,calibration-type = "ratiometric";
664 qcom,scale-function = <0>;
665 qcom,hw-settle-time = <2>;
666 qcom,fast-avg-setup = <0>;
667 };
668
669 chan@b2 {
670 label = "xo_therm_pu2";
671 reg = <0xb2>;
672 qcom,decimation = <0>;
673 qcom,pre-div-channel-scaling = <0>;
674 qcom,calibration-type = "ratiometric";
675 qcom,scale-function = <4>;
676 qcom,hw-settle-time = <0>;
677 qcom,fast-avg-setup = <0>;
678 };
679};