Jim Grosbach | 31c24bf | 2009-11-07 22:00:39 +0000 | [diff] [blame] | 1 | //===- Thumb1InstrInfo.cpp - Thumb-1 Instruction Information ----*- C++ -*-===// |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
David Goodwin | b50ea5c | 2009-07-02 22:18:33 +0000 | [diff] [blame] | 10 | // This file contains the Thumb-1 implementation of the TargetInstrInfo class. |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
Evan Cheng | b9803a8 | 2009-11-06 23:52:48 +0000 | [diff] [blame] | 14 | #include "Thumb1InstrInfo.h" |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 15 | #include "ARM.h" |
| 16 | #include "ARMGenInstrInfo.inc" |
| 17 | #include "ARMMachineFunctionInfo.h" |
| 18 | #include "llvm/CodeGen/MachineFrameInfo.h" |
| 19 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
Evan Cheng | 2457f2c | 2010-05-22 01:47:14 +0000 | [diff] [blame] | 20 | #include "llvm/CodeGen/MachineRegisterInfo.h" |
Evan Cheng | e3ce8aa | 2009-11-01 22:04:35 +0000 | [diff] [blame] | 21 | #include "llvm/CodeGen/MachineMemOperand.h" |
| 22 | #include "llvm/CodeGen/PseudoSourceValue.h" |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 23 | #include "llvm/ADT/SmallVector.h" |
David Goodwin | b50ea5c | 2009-07-02 22:18:33 +0000 | [diff] [blame] | 24 | #include "Thumb1InstrInfo.h" |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 25 | |
| 26 | using namespace llvm; |
| 27 | |
Anton Korobeynikov | f95215f | 2009-11-02 00:10:38 +0000 | [diff] [blame] | 28 | Thumb1InstrInfo::Thumb1InstrInfo(const ARMSubtarget &STI) |
| 29 | : ARMBaseInstrInfo(STI), RI(*this, STI) { |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 30 | } |
| 31 | |
Evan Cheng | 446c428 | 2009-07-11 06:43:01 +0000 | [diff] [blame] | 32 | unsigned Thumb1InstrInfo::getUnindexedOpcode(unsigned Opc) const { |
David Goodwin | 334c264 | 2009-07-08 16:09:28 +0000 | [diff] [blame] | 33 | return 0; |
| 34 | } |
| 35 | |
Jakob Stoklund Olesen | ac27366 | 2010-07-11 06:33:54 +0000 | [diff] [blame] | 36 | void Thumb1InstrInfo::copyPhysReg(MachineBasicBlock &MBB, |
| 37 | MachineBasicBlock::iterator I, DebugLoc DL, |
| 38 | unsigned DestReg, unsigned SrcReg, |
| 39 | bool KillSrc) const { |
| 40 | bool tDest = ARM::tGPRRegClass.contains(DestReg); |
| 41 | bool tSrc = ARM::tGPRRegClass.contains(SrcReg); |
| 42 | unsigned Opc = ARM::tMOVgpr2gpr; |
| 43 | if (tDest && tSrc) |
| 44 | Opc = ARM::tMOVr; |
| 45 | else if (tSrc) |
| 46 | Opc = ARM::tMOVtgpr2gpr; |
| 47 | else if (tDest) |
| 48 | Opc = ARM::tMOVgpr2tgpr; |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 49 | |
Jakob Stoklund Olesen | ac27366 | 2010-07-11 06:33:54 +0000 | [diff] [blame] | 50 | BuildMI(MBB, I, DL, get(Opc), DestReg) |
| 51 | .addReg(SrcReg, getKillRegState(KillSrc)); |
| 52 | assert(ARM::GPRRegClass.contains(DestReg, SrcReg) && |
| 53 | "Thumb1 can only copy GPR registers"); |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 54 | } |
| 55 | |
David Goodwin | b50ea5c | 2009-07-02 22:18:33 +0000 | [diff] [blame] | 56 | void Thumb1InstrInfo:: |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 57 | storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, |
| 58 | unsigned SrcReg, bool isKill, int FI, |
Evan Cheng | 746ad69 | 2010-05-06 19:06:44 +0000 | [diff] [blame] | 59 | const TargetRegisterClass *RC, |
| 60 | const TargetRegisterInfo *TRI) const { |
Evan Cheng | 86e5f7b | 2009-08-13 05:40:51 +0000 | [diff] [blame] | 61 | assert((RC == ARM::tGPRRegisterClass || |
| 62 | (TargetRegisterInfo::isPhysicalRegister(SrcReg) && |
| 63 | isARMLowRegister(SrcReg))) && "Unknown regclass!"); |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 64 | |
Jim Grosbach | 98793b9 | 2010-01-15 22:21:03 +0000 | [diff] [blame] | 65 | if (RC == ARM::tGPRRegisterClass || |
| 66 | (TargetRegisterInfo::isPhysicalRegister(SrcReg) && |
| 67 | isARMLowRegister(SrcReg))) { |
Evan Cheng | 746ad69 | 2010-05-06 19:06:44 +0000 | [diff] [blame] | 68 | DebugLoc DL; |
| 69 | if (I != MBB.end()) DL = I->getDebugLoc(); |
| 70 | |
Evan Cheng | e3ce8aa | 2009-11-01 22:04:35 +0000 | [diff] [blame] | 71 | MachineFunction &MF = *MBB.getParent(); |
| 72 | MachineFrameInfo &MFI = *MF.getFrameInfo(); |
| 73 | MachineMemOperand *MMO = |
Chris Lattner | 59db549 | 2010-09-21 04:39:43 +0000 | [diff] [blame] | 74 | MF.getMachineMemOperand( |
| 75 | MachinePointerInfo(PseudoSourceValue::getFixedStack(FI)), |
| 76 | MachineMemOperand::MOStore, |
Evan Cheng | e3ce8aa | 2009-11-01 22:04:35 +0000 | [diff] [blame] | 77 | MFI.getObjectSize(FI), |
| 78 | MFI.getObjectAlignment(FI)); |
Evan Cheng | 446c428 | 2009-07-11 06:43:01 +0000 | [diff] [blame] | 79 | AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tSpill)) |
| 80 | .addReg(SrcReg, getKillRegState(isKill)) |
Evan Cheng | e3ce8aa | 2009-11-01 22:04:35 +0000 | [diff] [blame] | 81 | .addFrameIndex(FI).addImm(0).addMemOperand(MMO)); |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 82 | } |
| 83 | } |
| 84 | |
David Goodwin | b50ea5c | 2009-07-02 22:18:33 +0000 | [diff] [blame] | 85 | void Thumb1InstrInfo:: |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 86 | loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, |
| 87 | unsigned DestReg, int FI, |
Evan Cheng | 746ad69 | 2010-05-06 19:06:44 +0000 | [diff] [blame] | 88 | const TargetRegisterClass *RC, |
| 89 | const TargetRegisterInfo *TRI) const { |
Evan Cheng | 86e5f7b | 2009-08-13 05:40:51 +0000 | [diff] [blame] | 90 | assert((RC == ARM::tGPRRegisterClass || |
| 91 | (TargetRegisterInfo::isPhysicalRegister(DestReg) && |
| 92 | isARMLowRegister(DestReg))) && "Unknown regclass!"); |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 93 | |
Jim Grosbach | 98793b9 | 2010-01-15 22:21:03 +0000 | [diff] [blame] | 94 | if (RC == ARM::tGPRRegisterClass || |
| 95 | (TargetRegisterInfo::isPhysicalRegister(DestReg) && |
| 96 | isARMLowRegister(DestReg))) { |
Evan Cheng | 746ad69 | 2010-05-06 19:06:44 +0000 | [diff] [blame] | 97 | DebugLoc DL; |
| 98 | if (I != MBB.end()) DL = I->getDebugLoc(); |
| 99 | |
Evan Cheng | e3ce8aa | 2009-11-01 22:04:35 +0000 | [diff] [blame] | 100 | MachineFunction &MF = *MBB.getParent(); |
| 101 | MachineFrameInfo &MFI = *MF.getFrameInfo(); |
| 102 | MachineMemOperand *MMO = |
Chris Lattner | 59db549 | 2010-09-21 04:39:43 +0000 | [diff] [blame] | 103 | MF.getMachineMemOperand( |
| 104 | MachinePointerInfo(PseudoSourceValue::getFixedStack(FI)), |
| 105 | MachineMemOperand::MOLoad, |
Evan Cheng | e3ce8aa | 2009-11-01 22:04:35 +0000 | [diff] [blame] | 106 | MFI.getObjectSize(FI), |
| 107 | MFI.getObjectAlignment(FI)); |
Evan Cheng | 446c428 | 2009-07-11 06:43:01 +0000 | [diff] [blame] | 108 | AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tRestore), DestReg) |
Evan Cheng | e3ce8aa | 2009-11-01 22:04:35 +0000 | [diff] [blame] | 109 | .addFrameIndex(FI).addImm(0).addMemOperand(MMO)); |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 110 | } |
| 111 | } |