blob: 10a545cc7ee07ff346b6665a114406680658046d [file] [log] [blame]
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Greg Hackmann86eb1c62012-05-30 09:25:51 -070016#include <errno.h>
17#include <fcntl.h>
Greg Hackmann29724852012-07-23 15:31:10 -070018#include <poll.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070019#include <pthread.h>
20#include <stdio.h>
21#include <stdlib.h>
22
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25#include <sys/time.h>
26#include <sys/resource.h>
27
28#include <s3c-fb.h>
29
30#include <EGL/egl.h>
31
Erik Gilling87e707e2012-06-29 17:35:13 -070032#define HWC_REMOVE_DEPRECATED_VERSIONS 1
33
Greg Hackmann86eb1c62012-05-30 09:25:51 -070034#include <cutils/log.h>
35#include <hardware/gralloc.h>
36#include <hardware/hardware.h>
37#include <hardware/hwcomposer.h>
38#include <hardware_legacy/uevent.h>
Greg Hackmann600867e2012-08-23 12:58:02 -070039#include <utils/String8.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070040#include <utils/Vector.h>
41
Greg Hackmannf4cc0c32012-05-30 09:28:52 -070042#include <sync/sync.h>
43
Greg Hackmann86eb1c62012-05-30 09:25:51 -070044#include "ion.h"
45#include "gralloc_priv.h"
Benoit Gobycdd61b32012-07-09 12:09:59 -070046#include "exynos_gscaler.h"
Greg Hackmann9130e702012-07-30 14:53:04 -070047#include "exynos_format.h"
Benoit Goby8bad7e32012-08-16 14:17:14 -070048#include "exynos_v4l2.h"
49#include "s5p_tvout_v4l2.h"
Greg Hackmann86eb1c62012-05-30 09:25:51 -070050
Greg Hackmannf6f2e542012-07-16 16:10:27 -070051struct hwc_callback_entry {
52 void (*callback)(void *, private_handle_t *);
53 void *data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070054};
55typedef android::Vector<struct hwc_callback_entry> hwc_callback_queue_t;
56
Greg Hackmann31991d52012-07-13 13:23:11 -070057const size_t NUM_HW_WINDOWS = 5;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070058const size_t NO_FB_NEEDED = NUM_HW_WINDOWS + 1;
Greg Hackmann31991d52012-07-13 13:23:11 -070059const size_t MAX_PIXELS = 2560 * 1600 * 2;
Greg Hackmann9130e702012-07-30 14:53:04 -070060const size_t GSC_W_ALIGNMENT = 16;
61const size_t GSC_H_ALIGNMENT = 16;
Greg Hackmann2ddbc742012-08-17 15:41:29 -070062const int AVAILABLE_GSC_UNITS[] = { 0, 3 };
63const size_t NUM_GSC_UNITS = sizeof(AVAILABLE_GSC_UNITS) /
64 sizeof(AVAILABLE_GSC_UNITS[0]);
Greg Hackmann86eb1c62012-05-30 09:25:51 -070065
Erik Gilling87e707e2012-06-29 17:35:13 -070066struct exynos5_hwc_composer_device_1_t;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070067
Greg Hackmann9130e702012-07-30 14:53:04 -070068struct exynos5_gsc_map_t {
69 enum {
70 GSC_NONE = 0,
71 GSC_M2M,
72 // TODO: GSC_LOCAL_PATH
73 } mode;
74 int idx;
75};
76
Greg Hackmann86eb1c62012-05-30 09:25:51 -070077struct exynos5_hwc_post_data_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070078 exynos5_hwc_composer_device_1_t *pdev;
79 int overlay_map[NUM_HW_WINDOWS];
Greg Hackmann9130e702012-07-30 14:53:04 -070080 exynos5_gsc_map_t gsc_map[NUM_HW_WINDOWS];
Greg Hackmannf6f2e542012-07-16 16:10:27 -070081 hwc_layer_1_t overlays[NUM_HW_WINDOWS];
82 int num_overlays;
83 size_t fb_window;
84 int fence;
85 pthread_mutex_t completion_lock;
86 pthread_cond_t completion;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070087};
88
Greg Hackmann9130e702012-07-30 14:53:04 -070089const size_t NUM_GSC_DST_BUFS = 2;
90struct exynos5_gsc_data_t {
91 void *gsc;
92 exynos_gsc_img src_cfg;
93 exynos_gsc_img dst_cfg;
94 buffer_handle_t dst_buf[NUM_GSC_DST_BUFS];
95 size_t current_buf;
96};
97
Erik Gilling87e707e2012-06-29 17:35:13 -070098struct exynos5_hwc_composer_device_1_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070099 hwc_composer_device_1_t base;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700100
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700101 int fd;
Greg Hackmann29724852012-07-23 15:31:10 -0700102 int vsync_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700103 exynos5_hwc_post_data_t bufs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700104
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700105 const private_module_t *gralloc_module;
Greg Hackmann9130e702012-07-30 14:53:04 -0700106 alloc_device_t *alloc_device;
Jesse Hallda5a71d2012-08-21 12:12:55 -0700107 const hwc_procs_t *procs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700108 pthread_t vsync_thread;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700109
Benoit Goby8bad7e32012-08-16 14:17:14 -0700110 int hdmi_mixer0;
111 int hdmi_layer0;
112 int hdmi_layer1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700113 bool hdmi_hpd;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700114 bool hdmi_enabled;
Benoit Gobyad4e3582012-08-30 17:17:34 -0700115 bool hdmi_blanked;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700116 void *hdmi_gsc;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700117 int hdmi_w;
118 int hdmi_h;
119 exynos_gsc_img hdmi_src;
120 exynos_gsc_img hdmi_dst;
Greg Hackmann9130e702012-07-30 14:53:04 -0700121
122 exynos5_gsc_data_t gsc[NUM_GSC_UNITS];
Greg Hackmann600867e2012-08-23 12:58:02 -0700123
124 struct s3c_fb_win_config last_config[NUM_HW_WINDOWS];
125 const void *last_handles[NUM_HW_WINDOWS];
126 exynos5_gsc_map_t last_gsc_map[NUM_HW_WINDOWS];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700127};
128
Greg Hackmann9130e702012-07-30 14:53:04 -0700129static void dump_handle(private_handle_t *h)
130{
Greg Hackmanneba34a92012-08-14 16:10:05 -0700131 ALOGV("\t\tformat = %d, width = %u, height = %u, stride = %u, vstride = %u",
132 h->format, h->width, h->height, h->stride, h->vstride);
Greg Hackmann9130e702012-07-30 14:53:04 -0700133}
134
Erik Gilling87e707e2012-06-29 17:35:13 -0700135static void dump_layer(hwc_layer_1_t const *l)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700136{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700137 ALOGV("\ttype=%d, flags=%08x, handle=%p, tr=%02x, blend=%04x, "
138 "{%d,%d,%d,%d}, {%d,%d,%d,%d}",
139 l->compositionType, l->flags, l->handle, l->transform,
140 l->blending,
141 l->sourceCrop.left,
142 l->sourceCrop.top,
143 l->sourceCrop.right,
144 l->sourceCrop.bottom,
145 l->displayFrame.left,
146 l->displayFrame.top,
147 l->displayFrame.right,
148 l->displayFrame.bottom);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700149
Greg Hackmann9130e702012-07-30 14:53:04 -0700150 if(l->handle && !(l->flags & HWC_SKIP_LAYER))
151 dump_handle(private_handle_t::dynamicCast(l->handle));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700152}
153
154static void dump_config(s3c_fb_win_config &c)
155{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700156 ALOGV("\tstate = %u", c.state);
157 if (c.state == c.S3C_FB_WIN_STATE_BUFFER) {
158 ALOGV("\t\tfd = %d, offset = %u, stride = %u, "
159 "x = %d, y = %d, w = %u, h = %u, "
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700160 "format = %u, blending = %u",
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700161 c.fd, c.offset, c.stride,
162 c.x, c.y, c.w, c.h,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700163 c.format, c.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700164 }
165 else if (c.state == c.S3C_FB_WIN_STATE_COLOR) {
166 ALOGV("\t\tcolor = %u", c.color);
167 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700168}
169
Greg Hackmann9130e702012-07-30 14:53:04 -0700170static void dump_gsc_img(exynos_gsc_img &c)
171{
172 ALOGV("\tx = %u, y = %u, w = %u, h = %u, fw = %u, fh = %u",
173 c.x, c.y, c.w, c.h, c.fw, c.fh);
174 ALOGV("\taddr = {%u, %u, %u}, rot = %u, cacheable = %u, drmMode = %u",
175 c.yaddr, c.uaddr, c.vaddr, c.rot, c.cacheable, c.drmMode);
176}
177
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700178inline int WIDTH(const hwc_rect &rect) { return rect.right - rect.left; }
179inline int HEIGHT(const hwc_rect &rect) { return rect.bottom - rect.top; }
Greg Hackmann31991d52012-07-13 13:23:11 -0700180template<typename T> inline T max(T a, T b) { return (a > b) ? a : b; }
181template<typename T> inline T min(T a, T b) { return (a < b) ? a : b; }
182
183static bool is_transformed(const hwc_layer_1_t &layer)
184{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700185 return layer.transform != 0;
Greg Hackmann31991d52012-07-13 13:23:11 -0700186}
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700187
Greg Hackmann9130e702012-07-30 14:53:04 -0700188static bool is_rotated(const hwc_layer_1_t &layer)
189{
190 return (layer.transform & HAL_TRANSFORM_ROT_90) ||
191 (layer.transform & HAL_TRANSFORM_ROT_180);
192}
193
Erik Gilling87e707e2012-06-29 17:35:13 -0700194static bool is_scaled(const hwc_layer_1_t &layer)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700195{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700196 return WIDTH(layer.displayFrame) != WIDTH(layer.sourceCrop) ||
197 HEIGHT(layer.displayFrame) != HEIGHT(layer.sourceCrop);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700198}
199
Benoit Goby8bad7e32012-08-16 14:17:14 -0700200static inline bool gsc_dst_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
201{
202 return c1.x != c2.x ||
203 c1.y != c2.y ||
204 c1.w != c2.w ||
205 c1.h != c2.h ||
206 c1.format != c2.format ||
207 c1.rot != c2.rot ||
208 c1.cacheable != c2.cacheable ||
209 c1.drmMode != c2.drmMode;
210}
211
212static inline bool gsc_src_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
213{
214 return gsc_dst_cfg_changed(c1, c2) ||
215 c1.fw != c2.fw ||
216 c1.fh != c2.fh;
217}
218
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700219static enum s3c_fb_pixel_format exynos5_format_to_s3c_format(int format)
220{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700221 switch (format) {
222 case HAL_PIXEL_FORMAT_RGBA_8888:
223 return S3C_FB_PIXEL_FORMAT_RGBA_8888;
224 case HAL_PIXEL_FORMAT_RGBX_8888:
225 return S3C_FB_PIXEL_FORMAT_RGBX_8888;
226 case HAL_PIXEL_FORMAT_RGBA_5551:
227 return S3C_FB_PIXEL_FORMAT_RGBA_5551;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700228
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700229 default:
230 return S3C_FB_PIXEL_FORMAT_MAX;
231 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700232}
233
234static bool exynos5_format_is_supported(int format)
235{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700236 return exynos5_format_to_s3c_format(format) < S3C_FB_PIXEL_FORMAT_MAX;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700237}
238
239static bool exynos5_format_is_supported_by_gscaler(int format)
240{
Greg Hackmann9130e702012-07-30 14:53:04 -0700241 switch (format) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700242 case HAL_PIXEL_FORMAT_RGBX_8888:
243 case HAL_PIXEL_FORMAT_RGB_565:
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700244 case HAL_PIXEL_FORMAT_EXYNOS_YV12:
Greg Hackmann9130e702012-07-30 14:53:04 -0700245 case HAL_PIXEL_FORMAT_YCbCr_420_P:
246 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
247 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_422_SP:
248 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
249 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_420_SP:
250 case HAL_PIXEL_FORMAT_YCbCr_422_I:
251 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_422_I:
252 case HAL_PIXEL_FORMAT_YCbCr_422_P:
253 case HAL_PIXEL_FORMAT_CbYCrY_422_I:
254 case HAL_PIXEL_FORMAT_CUSTOM_CbYCrY_422_I:
255 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
256 case HAL_PIXEL_FORMAT_CUSTOM_YCrCb_422_SP:
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700257 case HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP:
Greg Hackmann9130e702012-07-30 14:53:04 -0700258 case HAL_PIXEL_FORMAT_CUSTOM_YCrCb_420_SP:
259 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
260 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_420_SP_TILED:
261 case HAL_PIXEL_FORMAT_CUSTOM_YCrCb_422_I:
262 case HAL_PIXEL_FORMAT_CUSTOM_CrYCbY_422_I:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700263 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700264
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700265 default:
266 return false;
267 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700268}
269
Greg Hackmann296668e2012-08-14 15:51:40 -0700270static bool exynos5_format_is_ycrcb(int format)
271{
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700272 return format == HAL_PIXEL_FORMAT_EXYNOS_YV12;
Greg Hackmann296668e2012-08-14 15:51:40 -0700273}
274
Greg Hackmann9130e702012-07-30 14:53:04 -0700275static bool exynos5_format_requires_gscaler(int format)
276{
277 return exynos5_format_is_supported_by_gscaler(format) &&
278 format != HAL_PIXEL_FORMAT_RGBX_8888;
279}
280
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700281static uint8_t exynos5_format_to_bpp(int format)
282{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700283 switch (format) {
284 case HAL_PIXEL_FORMAT_RGBA_8888:
285 case HAL_PIXEL_FORMAT_RGBX_8888:
286 return 32;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700287
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700288 case HAL_PIXEL_FORMAT_RGBA_5551:
289 case HAL_PIXEL_FORMAT_RGBA_4444:
290 return 16;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700291
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700292 default:
293 ALOGW("unrecognized pixel format %u", format);
294 return 0;
295 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700296}
297
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700298static bool exynos5_supports_gscaler(hwc_layer_1_t &layer, int format,
299 bool local_path)
Greg Hackmann9130e702012-07-30 14:53:04 -0700300{
301 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
302
303 int max_w = is_rotated(layer) ? 2048 : 4800;
304 int max_h = is_rotated(layer) ? 2048 : 3344;
305
306 bool rot90or270 = !!(layer.transform & HAL_TRANSFORM_ROT_90);
307 // n.b.: HAL_TRANSFORM_ROT_270 = HAL_TRANSFORM_ROT_90 |
308 // HAL_TRANSFORM_ROT_180
309
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700310 int src_w = WIDTH(layer.sourceCrop), src_h = HEIGHT(layer.sourceCrop);
311 int dest_w, dest_h;
312 if (rot90or270) {
313 dest_w = HEIGHT(layer.displayFrame);
314 dest_h = WIDTH(layer.displayFrame);
315 } else {
316 dest_w = WIDTH(layer.displayFrame);
317 dest_h = HEIGHT(layer.displayFrame);
318 }
319 int max_downscale = local_path ? 4 : 16;
320 const int max_upscale = 8;
321
Greg Hackmann9130e702012-07-30 14:53:04 -0700322 return exynos5_format_is_supported_by_gscaler(format) &&
323 handle->stride <= max_w &&
324 handle->stride % GSC_W_ALIGNMENT == 0 &&
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700325 src_w <= dest_w * max_downscale &&
326 dest_w <= src_w * max_upscale &&
Greg Hackmanneba34a92012-08-14 16:10:05 -0700327 handle->vstride <= max_h &&
328 handle->vstride % GSC_H_ALIGNMENT == 0 &&
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700329 src_h <= dest_h * max_downscale &&
330 dest_h <= src_h * max_upscale &&
Greg Hackmann9130e702012-07-30 14:53:04 -0700331 // per 46.2
332 (!rot90or270 || layer.sourceCrop.top % 2 == 0) &&
333 (!rot90or270 || layer.sourceCrop.left % 2 == 0);
334 // per 46.3.1.6
335}
336
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700337int hdmi_get_config(struct exynos5_hwc_composer_device_1_t *dev)
338{
339 struct v4l2_dv_preset preset;
340 struct v4l2_dv_enum_preset enum_preset;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700341 int index = 0;
342 bool found = false;
343 int ret;
344
Benoit Goby8bad7e32012-08-16 14:17:14 -0700345 if (ioctl(dev->hdmi_layer0, VIDIOC_G_DV_PRESET, &preset) < 0) {
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700346 ALOGE("%s: g_dv_preset error, %d", __func__, errno);
347 return -1;
348 }
349
350 while (true) {
351 enum_preset.index = index++;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700352 ret = ioctl(dev->hdmi_layer0, VIDIOC_ENUM_DV_PRESETS, &enum_preset);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700353
354 if (ret < 0) {
355 if (errno == EINVAL)
356 break;
357 ALOGE("%s: enum_dv_presets error, %d", __func__, errno);
358 return -1;
359 }
360
361 ALOGV("%s: %d preset=%02d width=%d height=%d name=%s",
362 __func__, enum_preset.index, enum_preset.preset,
363 enum_preset.width, enum_preset.height, enum_preset.name);
364
365 if (preset.preset == enum_preset.preset) {
Benoit Goby8bad7e32012-08-16 14:17:14 -0700366 dev->hdmi_w = enum_preset.width;
367 dev->hdmi_h = enum_preset.height;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700368 found = true;
369 }
370 }
371
372 return found ? 0 : -1;
373}
374
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700375static enum s3c_fb_blending exynos5_blending_to_s3c_blending(int32_t blending)
376{
377 switch (blending) {
378 case HWC_BLENDING_NONE:
379 return S3C_FB_BLENDING_NONE;
380 case HWC_BLENDING_PREMULT:
381 return S3C_FB_BLENDING_PREMULT;
382 case HWC_BLENDING_COVERAGE:
383 return S3C_FB_BLENDING_COVERAGE;
384
385 default:
386 return S3C_FB_BLENDING_MAX;
387 }
388}
389
390static bool exynos5_blending_is_supported(int32_t blending)
391{
392 return exynos5_blending_to_s3c_blending(blending) < S3C_FB_BLENDING_MAX;
393}
394
Benoit Goby8bad7e32012-08-16 14:17:14 -0700395static int hdmi_start_background(struct exynos5_hwc_composer_device_1_t *dev)
396{
397 struct v4l2_requestbuffers reqbuf;
398 struct v4l2_subdev_format sd_fmt;
399 struct v4l2_subdev_crop sd_crop;
400 struct v4l2_format fmt;
401 struct v4l2_buffer buffer;
402 struct v4l2_plane planes[1];
403
404 memset(&reqbuf, 0, sizeof(reqbuf));
405 memset(&sd_fmt, 0, sizeof(sd_fmt));
406 memset(&sd_crop, 0, sizeof(sd_crop));
407 memset(&fmt, 0, sizeof(fmt));
408 memset(&buffer, 0, sizeof(buffer));
409 memset(planes, 0, sizeof(planes));
410
411 sd_fmt.pad = MIXER_G1_SUBDEV_PAD_SINK;
412 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
413 sd_fmt.format.width = 1;
414 sd_fmt.format.height = 1;
415 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
416 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
417 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
418 return -1;
419 }
420
421 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SINK;
422 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
423 sd_crop.rect.left = 0;
424 sd_crop.rect.top = 0;
425 sd_crop.rect.width = 1;
426 sd_crop.rect.height = 1;
427 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
428 ALOGE("%s: set_crop failed pad=%d", __func__, sd_crop.pad);
429 return -1;
430 }
431
432 sd_fmt.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
433 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
434 sd_fmt.format.width = dev->hdmi_w;
435 sd_fmt.format.height = dev->hdmi_h;
436 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
437 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
438 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
439 return -1;
440 }
441
442 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
443 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
444 sd_crop.rect.left = 0;
445 sd_crop.rect.top = 0;
446 sd_crop.rect.width = 1;
447 sd_crop.rect.height = 1;
448 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
449 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
450 return -1;
451 }
452
453 fmt.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
454 fmt.fmt.pix_mp.width = 1;
455 fmt.fmt.pix_mp.height = 1;
456 fmt.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_BGR32;
457 fmt.fmt.pix_mp.field = V4L2_FIELD_ANY;
458 fmt.fmt.pix_mp.num_planes = 1;
459 if (exynos_v4l2_s_fmt(dev->hdmi_layer1, &fmt) < 0) {
460 ALOGE("%s::videodev set format failed", __func__);
461 return -1;
462 }
463
464 reqbuf.count = 1;
465 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
466 reqbuf.memory = V4L2_MEMORY_MMAP;
467
468 if (exynos_v4l2_reqbufs(dev->hdmi_layer1, &reqbuf) < 0) {
469 ALOGE("%s: exynos_v4l2_reqbufs failed %d", __func__, errno);
470 return -1;
471 }
472
473 if (reqbuf.count != 1) {
474 ALOGE("%s: didn't get buffer", __func__);
475 return -1;
476 }
477
478 memset(&buffer, 0, sizeof(buffer));
479 buffer.type = reqbuf.type;
480 buffer.memory = V4L2_MEMORY_MMAP;
481 buffer.length = 1;
482 buffer.m.planes = planes;
483 if (exynos_v4l2_querybuf(dev->hdmi_layer1, &buffer) < 0) {
484 ALOGE("%s: exynos_v4l2_querybuf failed %d", __func__, errno);
485 return -1;
486 }
487
488 void *start = mmap(NULL, planes[0].length, PROT_READ | PROT_WRITE,
489 MAP_SHARED, dev->hdmi_layer1, planes[0].m.mem_offset);
490 if (start == MAP_FAILED) {
491 ALOGE("%s: mmap failed %d", __func__, errno);
492 return -1;
493 }
494
495 memset(start, 0, planes[0].length);
496
497 munmap(start, planes[0].length);
498
499 if (exynos_v4l2_qbuf(dev->hdmi_layer1, &buffer) < 0) {
500 ALOGE("%s: exynos_v4l2_qbuf failed %d", __func__, errno);
501 return -1;
502 }
503
504 if (exynos_v4l2_streamon(dev->hdmi_layer1, buffer.type) < 0) {
505 ALOGE("%s:stream on failed", __func__);
506 return -1;
507 }
508
509 if (exynos_v4l2_s_ctrl(dev->hdmi_layer1, V4L2_CID_TV_LAYER_PRIO, 0) < 0) {
510 ALOGE("%s: s_ctrl LAYER_PRIO failed", __func__);
511 return -1;
512 }
513
514 return 0;
515}
516
517static int hdmi_stop_background(struct exynos5_hwc_composer_device_1_t *dev)
518{
519 struct v4l2_requestbuffers reqbuf;
520
521 if (exynos_v4l2_streamoff(dev->hdmi_layer1, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) < 0) {
522 ALOGE("%s:stream off failed", __func__);
523 return -1;
524 }
525
526 memset(&reqbuf, 0, sizeof(reqbuf));
527 reqbuf.count = 0;
528 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
529 reqbuf.memory = V4L2_MEMORY_MMAP;
530 if (exynos_v4l2_reqbufs(dev->hdmi_layer1, &reqbuf) < 0) {
531 ALOGE("%s: exynos_v4l2_reqbufs failed %d", __func__, errno);
532 return -1;
533 }
534
535 return 0;
536}
537
Benoit Gobycdd61b32012-07-09 12:09:59 -0700538static int hdmi_enable(struct exynos5_hwc_composer_device_1_t *dev)
539{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700540 if (dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700541 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700542
Benoit Gobyad4e3582012-08-30 17:17:34 -0700543 if (dev->hdmi_blanked)
544 return 0;
545
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700546 dev->hdmi_gsc = exynos_gsc_create_exclusive(3, GSC_OUTPUT_MODE, GSC_OUT_TV);
547 if (!dev->hdmi_gsc) {
548 ALOGE("%s: exynos_gsc_create_exclusive failed", __func__);
549 return -ENODEV;
550 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700551
Benoit Goby8bad7e32012-08-16 14:17:14 -0700552 memset(&dev->hdmi_src, 0, sizeof(dev->hdmi_src));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700553
Benoit Goby8bad7e32012-08-16 14:17:14 -0700554 if (hdmi_start_background(dev) < 0) {
555 ALOGE("%s: hdmi_start_background failed", __func__);
556 return -1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700557 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700558
Benoit Goby8bad7e32012-08-16 14:17:14 -0700559 dev->hdmi_enabled = true;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700560 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700561}
562
563static void hdmi_disable(struct exynos5_hwc_composer_device_1_t *dev)
564{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700565 if (!dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700566 return;
567 exynos_gsc_destroy(dev->hdmi_gsc);
Benoit Gobyad4e3582012-08-30 17:17:34 -0700568 hdmi_stop_background(dev);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700569 dev->hdmi_gsc = NULL;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700570 dev->hdmi_enabled = false;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700571}
572
Benoit Goby8bad7e32012-08-16 14:17:14 -0700573static int hdmi_configure(struct exynos5_hwc_composer_device_1_t *dev,
574 exynos_gsc_img &src_cfg,
575 exynos_gsc_img &dst_cfg)
576{
577 if (!gsc_src_cfg_changed(src_cfg, dev->hdmi_src)
578 && !gsc_dst_cfg_changed(dst_cfg, dev->hdmi_dst))
579 return 0;
580
581 ALOGV("HDMI source config:");
582 dump_gsc_img(src_cfg);
583 ALOGV("HDMI dest config:");
584 dump_gsc_img(dst_cfg);
585
586 exynos_gsc_stop_exclusive(dev->hdmi_gsc);
587
588 int ret = exynos_gsc_config_exclusive(dev->hdmi_gsc, &src_cfg, &dst_cfg);
589 if (ret < 0) {
590 ALOGE("%s: exynos_gsc_config_exclusive failed %d", __func__, ret);
591 return ret;
592 }
593
594 dev->hdmi_src = src_cfg;
595 dev->hdmi_dst = dst_cfg;
596 return ret;
597}
598
599static int hdmi_configure_handle(struct exynos5_hwc_composer_device_1_t *dev, private_handle_t *h)
600{
601 exynos_gsc_img src_cfg, dst_cfg;
602 memset(&src_cfg, 0, sizeof(src_cfg));
603 memset(&dst_cfg, 0, sizeof(dst_cfg));
604
605 src_cfg.w = src_cfg.fw = h->width;
606 src_cfg.h = src_cfg.fh = h->height;
607 src_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
608
609 dst_cfg.w = dst_cfg.fw = dev->hdmi_w;
610 dst_cfg.h = dst_cfg.fh = dev->hdmi_h;
611 dst_cfg.format = HAL_PIXEL_FORMAT_EXYNOS_YV12;
612
613 return hdmi_configure(dev, src_cfg, dst_cfg);
614}
615
616static int hdmi_configure_layer(struct exynos5_hwc_composer_device_1_t *dev, hwc_layer_1_t &layer)
617{
618 exynos_gsc_img src_cfg, dst_cfg;
619 memset(&src_cfg, 0, sizeof(src_cfg));
620 memset(&dst_cfg, 0, sizeof(dst_cfg));
621 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
622
623 src_cfg.x = layer.sourceCrop.left;
624 src_cfg.y = layer.sourceCrop.top;
625 src_cfg.w = WIDTH(layer.sourceCrop);
626 src_cfg.fw = src_handle->stride;
627 src_cfg.h = HEIGHT(layer.sourceCrop);
628 src_cfg.fh = src_handle->vstride;
629 src_cfg.format = src_handle->format;
630
631 if (dev->hdmi_w * src_cfg.h < dev->hdmi_h * src_cfg.w) {
632 dst_cfg.w = dev->hdmi_w;
633 dst_cfg.fw = dev->hdmi_w;
634 dst_cfg.fh = dev->hdmi_h;
635 dst_cfg.h = dev->hdmi_w * src_cfg.h / src_cfg.w;
636 dst_cfg.y = (dev->hdmi_h - dst_cfg.h) / 2;
637 }
638 else {
639 dst_cfg.w = dev->hdmi_h * src_cfg.w / src_cfg.h;
640 dst_cfg.fw = dev->hdmi_w;
641 dst_cfg.h = dev->hdmi_h;
642 dst_cfg.fh = dev->hdmi_h;
643 dst_cfg.x = (dev->hdmi_w - dst_cfg.w) / 2;
644 }
645 dst_cfg.format = HAL_PIXEL_FORMAT_EXYNOS_YV12;
646 dst_cfg.rot = layer.transform;
647
648 return hdmi_configure(dev, src_cfg, dst_cfg);
649}
650
651static int hdmi_output(struct exynos5_hwc_composer_device_1_t *dev, private_handle_t *h)
Benoit Gobycdd61b32012-07-09 12:09:59 -0700652{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700653 exynos_gsc_img src_info;
654 exynos_gsc_img dst_info;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700655
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700656 memset(&src_info, 0, sizeof(src_info));
657 memset(&dst_info, 0, sizeof(dst_info));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700658
Benoit Goby8bad7e32012-08-16 14:17:14 -0700659 src_info.yaddr = h->fd;
660 if (exynos5_format_is_ycrcb(h->format)) {
661 src_info.uaddr = h->fd2;
662 src_info.vaddr = h->fd1;
663 } else {
664 src_info.uaddr = h->fd1;
665 src_info.vaddr = h->fd2;
666 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700667
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700668 int ret = exynos_gsc_run_exclusive(dev->hdmi_gsc, &src_info, &dst_info);
669 if (ret < 0) {
670 ALOGE("%s: exynos_gsc_run_exclusive failed %d", __func__, ret);
671 return ret;
672 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700673
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700674 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700675}
676
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700677bool exynos5_supports_overlay(hwc_layer_1_t &layer, size_t i)
678{
Greg Hackmannd82ad202012-07-24 13:49:47 -0700679 if (layer.flags & HWC_SKIP_LAYER) {
680 ALOGV("\tlayer %u: skipping", i);
681 return false;
682 }
683
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700684 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700685
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700686 if (!handle) {
687 ALOGV("\tlayer %u: handle is NULL", i);
688 return false;
689 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700690 if (exynos5_format_requires_gscaler(handle->format)) {
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700691 if (!exynos5_supports_gscaler(layer, handle->format, false)) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700692 ALOGV("\tlayer %u: gscaler required but not supported", i);
693 return false;
694 }
695 } else {
696 if (!exynos5_format_is_supported(handle->format)) {
697 ALOGV("\tlayer %u: pixel format %u not supported", i, handle->format);
698 return false;
699 }
700 if (is_scaled(layer)) {
701 ALOGV("\tlayer %u: scaling not supported", i);
702 return false;
703 }
704 if (is_transformed(layer)) {
705 ALOGV("\tlayer %u: transformations not supported", i);
706 return false;
707 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700708 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700709 if (!exynos5_blending_is_supported(layer.blending)) {
710 ALOGV("\tlayer %u: blending %d not supported", i, layer.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700711 return false;
712 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700713
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700714 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700715}
716
Greg Hackmann31991d52012-07-13 13:23:11 -0700717inline bool intersect(const hwc_rect &r1, const hwc_rect &r2)
718{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700719 return !(r1.left > r2.right ||
720 r1.right < r2.left ||
721 r1.top > r2.bottom ||
722 r1.bottom < r2.top);
Greg Hackmann31991d52012-07-13 13:23:11 -0700723}
724
725inline hwc_rect intersection(const hwc_rect &r1, const hwc_rect &r2)
726{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700727 hwc_rect i;
728 i.top = max(r1.top, r2.top);
729 i.bottom = min(r1.bottom, r2.bottom);
730 i.left = max(r1.left, r2.left);
731 i.right = min(r1.right, r2.right);
732 return i;
Greg Hackmann31991d52012-07-13 13:23:11 -0700733}
734
Jesse Halle94046d2012-07-31 14:34:08 -0700735static int exynos5_prepare(hwc_composer_device_1_t *dev,
736 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700737{
Jesse Halle94046d2012-07-31 14:34:08 -0700738 if (!numDisplays || !displays)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700739 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700740
Jesse Halle94046d2012-07-31 14:34:08 -0700741 ALOGV("preparing %u layers", displays[0]->numHwLayers);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700742
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700743 exynos5_hwc_composer_device_1_t *pdev =
744 (exynos5_hwc_composer_device_1_t *)dev;
745 memset(pdev->bufs.overlays, 0, sizeof(pdev->bufs.overlays));
Greg Hackmann9130e702012-07-30 14:53:04 -0700746 memset(pdev->bufs.gsc_map, 0, sizeof(pdev->bufs.gsc_map));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700747
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700748 bool force_fb = false;
749 if (pdev->hdmi_hpd) {
750 hdmi_enable(pdev);
751 force_fb = true;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700752 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
753 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
754 if (layer.flags & HWC_SKIP_LAYER)
755 continue;
756 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
757 if (handle->flags & GRALLOC_USAGE_EXTERNAL_DISP) {
758 force_fb = false;
759 break;
760 }
761 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700762 } else {
763 hdmi_disable(pdev);
764 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700765
Erik Gilling87e707e2012-06-29 17:35:13 -0700766 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
767 pdev->bufs.overlay_map[i] = -1;
768
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700769 bool fb_needed = false;
770 size_t first_fb = 0, last_fb = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700771
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700772 // find unsupported overlays
Jesse Halle94046d2012-07-31 14:34:08 -0700773 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
774 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700775
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700776 if (layer.compositionType == HWC_BACKGROUND && !force_fb) {
777 ALOGV("\tlayer %u: background supported", i);
Jesse Halle94046d2012-07-31 14:34:08 -0700778 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700779 continue;
780 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700781
Jesse Halle94046d2012-07-31 14:34:08 -0700782 if (exynos5_supports_overlay(displays[0]->hwLayers[i], i) && !force_fb) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700783 ALOGV("\tlayer %u: overlay supported", i);
784 layer.compositionType = HWC_OVERLAY;
Jesse Halle94046d2012-07-31 14:34:08 -0700785 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700786 continue;
787 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700788
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700789 if (!fb_needed) {
790 first_fb = i;
791 fb_needed = true;
792 }
793 last_fb = i;
794 layer.compositionType = HWC_FRAMEBUFFER;
Greg Hackmann9130e702012-07-30 14:53:04 -0700795
Jesse Halle94046d2012-07-31 14:34:08 -0700796 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700797 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700798
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700799 // can't composite overlays sandwiched between framebuffers
800 if (fb_needed)
801 for (size_t i = first_fb; i < last_fb; i++)
Jesse Halle94046d2012-07-31 14:34:08 -0700802 displays[0]->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700803
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700804 // Incrementally try to add our supported layers to hardware windows.
805 // If adding a layer would violate a hardware constraint, force it
806 // into the framebuffer and try again. (Revisiting the entire list is
807 // necessary because adding a layer to the framebuffer can cause other
808 // windows to retroactively violate constraints.)
809 bool changed;
810 do {
811 android::Vector<hwc_rect> rects;
812 android::Vector<hwc_rect> overlaps;
Greg Hackmann9130e702012-07-30 14:53:04 -0700813 size_t pixels_left, windows_left, gsc_left = NUM_GSC_UNITS;
Greg Hackmann31991d52012-07-13 13:23:11 -0700814
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700815 if (fb_needed) {
816 hwc_rect_t fb_rect;
817 fb_rect.top = fb_rect.left = 0;
818 fb_rect.right = pdev->gralloc_module->xres - 1;
819 fb_rect.bottom = pdev->gralloc_module->yres - 1;
820 pixels_left = MAX_PIXELS - pdev->gralloc_module->xres *
821 pdev->gralloc_module->yres;
822 windows_left = NUM_HW_WINDOWS - 1;
823 rects.push_back(fb_rect);
824 }
825 else {
826 pixels_left = MAX_PIXELS;
827 windows_left = NUM_HW_WINDOWS;
828 }
Benoit Goby8bad7e32012-08-16 14:17:14 -0700829 if (pdev->hdmi_enabled)
Greg Hackmann9130e702012-07-30 14:53:04 -0700830 gsc_left--;
831
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700832 changed = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700833
Jesse Halle94046d2012-07-31 14:34:08 -0700834 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
835 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann9130e702012-07-30 14:53:04 -0700836 if (layer.flags & HWC_SKIP_LAYER)
837 continue;
838
839 private_handle_t *handle = private_handle_t::dynamicCast(
840 layer.handle);
Greg Hackmann31991d52012-07-13 13:23:11 -0700841
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700842 // we've already accounted for the framebuffer above
843 if (layer.compositionType == HWC_FRAMEBUFFER)
844 continue;
Greg Hackmann31991d52012-07-13 13:23:11 -0700845
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700846 // only layer 0 can be HWC_BACKGROUND, so we can
847 // unconditionally allow it without extra checks
848 if (layer.compositionType == HWC_BACKGROUND) {
849 windows_left--;
850 continue;
851 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700852
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700853 size_t pixels_needed = WIDTH(layer.displayFrame) *
854 HEIGHT(layer.displayFrame);
855 bool can_compose = windows_left && pixels_needed <= pixels_left;
Greg Hackmann9130e702012-07-30 14:53:04 -0700856 bool gsc_required = exynos5_format_requires_gscaler(handle->format);
857 if (gsc_required)
858 can_compose = can_compose && gsc_left;
Greg Hackmann31991d52012-07-13 13:23:11 -0700859
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700860 // hwc_rect_t right and bottom values are normally exclusive;
861 // the intersection logic is simpler if we make them inclusive
862 hwc_rect_t visible_rect = layer.displayFrame;
863 visible_rect.right--; visible_rect.bottom--;
Greg Hackmann31991d52012-07-13 13:23:11 -0700864
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700865 // no more than 2 layers can overlap on a given pixel
866 for (size_t j = 0; can_compose && j < overlaps.size(); j++) {
867 if (intersect(visible_rect, overlaps.itemAt(j)))
868 can_compose = false;
869 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700870
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700871 if (!can_compose) {
872 layer.compositionType = HWC_FRAMEBUFFER;
873 if (!fb_needed) {
874 first_fb = last_fb = i;
875 fb_needed = true;
876 }
877 else {
878 first_fb = min(i, first_fb);
879 last_fb = max(i, last_fb);
880 }
881 changed = true;
882 break;
883 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700884
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700885 for (size_t j = 0; j < rects.size(); j++) {
886 const hwc_rect_t &other_rect = rects.itemAt(j);
887 if (intersect(visible_rect, other_rect))
888 overlaps.push_back(intersection(visible_rect, other_rect));
889 }
890 rects.push_back(visible_rect);
891 pixels_left -= pixels_needed;
892 windows_left--;
Greg Hackmann9130e702012-07-30 14:53:04 -0700893 if (gsc_required)
894 gsc_left--;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700895 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700896
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700897 if (changed)
898 for (size_t i = first_fb; i < last_fb; i++)
Jesse Halle94046d2012-07-31 14:34:08 -0700899 displays[0]->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700900 } while(changed);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700901
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700902 unsigned int nextWindow = 0;
Greg Hackmann9130e702012-07-30 14:53:04 -0700903 int nextGsc = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700904
Jesse Halle94046d2012-07-31 14:34:08 -0700905 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
906 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700907
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700908 if (fb_needed && i == first_fb) {
909 ALOGV("assigning framebuffer to window %u\n",
910 nextWindow);
911 nextWindow++;
912 continue;
913 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700914
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700915 if (layer.compositionType != HWC_FRAMEBUFFER) {
916 ALOGV("assigning layer %u to window %u", i, nextWindow);
917 pdev->bufs.overlay_map[nextWindow] = i;
Greg Hackmann9130e702012-07-30 14:53:04 -0700918 if (layer.compositionType == HWC_OVERLAY) {
919 private_handle_t *handle =
920 private_handle_t::dynamicCast(layer.handle);
921 if (exynos5_format_requires_gscaler(handle->format)) {
Greg Hackmann2ddbc742012-08-17 15:41:29 -0700922 ALOGV("\tusing gscaler %u", AVAILABLE_GSC_UNITS[nextGsc]);
Greg Hackmann9130e702012-07-30 14:53:04 -0700923 pdev->bufs.gsc_map[i].mode =
924 exynos5_gsc_map_t::GSC_M2M;
925 pdev->bufs.gsc_map[i].idx = nextGsc++;
926 }
927 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700928 nextWindow++;
929 }
930 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700931
Greg Hackmann9130e702012-07-30 14:53:04 -0700932 for (size_t i = nextGsc; i < NUM_GSC_UNITS; i++) {
933 for (size_t j = 0; j < NUM_GSC_DST_BUFS; j++)
934 if (pdev->gsc[i].dst_buf[j])
935 pdev->alloc_device->free(pdev->alloc_device,
936 pdev->gsc[i].dst_buf[j]);
937 memset(&pdev->gsc[i], 0, sizeof(pdev->gsc[i]));
938 }
939
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700940 if (fb_needed)
941 pdev->bufs.fb_window = first_fb;
942 else
943 pdev->bufs.fb_window = NO_FB_NEEDED;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700944
Greg Hackmann9130e702012-07-30 14:53:04 -0700945 return 0;
946}
947
Greg Hackmann9130e702012-07-30 14:53:04 -0700948static int exynos5_config_gsc_m2m(hwc_layer_1_t &layer,
949 alloc_device_t* alloc_device, exynos5_gsc_data_t *gsc_data,
950 int gsc_idx)
951{
952 ALOGV("configuring gscaler %u for memory-to-memory", gsc_idx);
953
954 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
955 buffer_handle_t dst_buf;
956 private_handle_t *dst_handle;
957 int ret = 0;
958
959 exynos_gsc_img src_cfg, dst_cfg;
960 memset(&src_cfg, 0, sizeof(src_cfg));
961 memset(&dst_cfg, 0, sizeof(dst_cfg));
962
963 src_cfg.x = layer.sourceCrop.left;
964 src_cfg.y = layer.sourceCrop.top;
965 src_cfg.w = WIDTH(layer.sourceCrop);
966 src_cfg.fw = src_handle->stride;
967 src_cfg.h = HEIGHT(layer.sourceCrop);
Greg Hackmanneba34a92012-08-14 16:10:05 -0700968 src_cfg.fh = src_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -0700969 src_cfg.yaddr = src_handle->fd;
Greg Hackmann296668e2012-08-14 15:51:40 -0700970 if (exynos5_format_is_ycrcb(src_handle->format)) {
971 src_cfg.uaddr = src_handle->fd2;
972 src_cfg.vaddr = src_handle->fd1;
973 } else {
974 src_cfg.uaddr = src_handle->fd1;
975 src_cfg.vaddr = src_handle->fd2;
976 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700977 src_cfg.format = src_handle->format;
Sanghee Kim7bd58622012-08-08 23:31:10 -0700978 src_cfg.drmMode = !!(src_handle->flags & GRALLOC_USAGE_PROTECTED);
Greg Hackmann9130e702012-07-30 14:53:04 -0700979
980 dst_cfg.x = 0;
981 dst_cfg.y = 0;
982 dst_cfg.w = WIDTH(layer.displayFrame);
983 dst_cfg.h = HEIGHT(layer.displayFrame);
Greg Hackmanna00c0432012-07-31 15:20:00 -0700984 dst_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
Greg Hackmann9130e702012-07-30 14:53:04 -0700985 dst_cfg.rot = layer.transform;
986
987 ALOGV("source configuration:");
988 dump_gsc_img(src_cfg);
989
990 if (gsc_src_cfg_changed(src_cfg, gsc_data->src_cfg) ||
991 gsc_dst_cfg_changed(dst_cfg, gsc_data->dst_cfg)) {
992 int dst_stride;
993 int usage = GRALLOC_USAGE_SW_READ_NEVER |
994 GRALLOC_USAGE_SW_WRITE_NEVER |
995 GRALLOC_USAGE_HW_COMPOSER;
Sanghee Kim7bd58622012-08-08 23:31:10 -0700996
997 if (src_handle->flags & GRALLOC_USAGE_PROTECTED)
998 usage |= GRALLOC_USAGE_PROTECTED;
Greg Hackmann9130e702012-07-30 14:53:04 -0700999
1000 int w = ALIGN(WIDTH(layer.displayFrame), GSC_W_ALIGNMENT);
1001 int h = ALIGN(HEIGHT(layer.displayFrame), GSC_H_ALIGNMENT);
1002
1003 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1004 if (gsc_data->dst_buf[i]) {
1005 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1006 gsc_data->dst_buf[i] = NULL;
1007 }
1008
1009 int ret = alloc_device->alloc(alloc_device, w, h,
1010 HAL_PIXEL_FORMAT_RGBX_8888, usage, &gsc_data->dst_buf[i],
1011 &dst_stride);
1012 if (ret < 0) {
1013 ALOGE("failed to allocate destination buffer: %s",
1014 strerror(-ret));
1015 goto err_alloc;
1016 }
1017 }
1018
1019 gsc_data->current_buf = 0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001020 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001021
Greg Hackmann9130e702012-07-30 14:53:04 -07001022 dst_buf = gsc_data->dst_buf[gsc_data->current_buf];
1023 dst_handle = private_handle_t::dynamicCast(dst_buf);
1024
1025 dst_cfg.fw = dst_handle->stride;
Greg Hackmanneba34a92012-08-14 16:10:05 -07001026 dst_cfg.fh = dst_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -07001027 dst_cfg.yaddr = dst_handle->fd;
Sanghee Kim7bd58622012-08-08 23:31:10 -07001028 dst_cfg.drmMode = !!(dst_handle->flags & GRALLOC_USAGE_PROTECTED);
Greg Hackmann9130e702012-07-30 14:53:04 -07001029
1030 ALOGV("destination configuration:");
1031 dump_gsc_img(dst_cfg);
1032
Greg Hackmann2ddbc742012-08-17 15:41:29 -07001033 gsc_data->gsc = exynos_gsc_create_exclusive(AVAILABLE_GSC_UNITS[gsc_idx],
1034 GSC_M2M_MODE, GSC_DUMMY);
Greg Hackmann9130e702012-07-30 14:53:04 -07001035 if (!gsc_data->gsc) {
1036 ALOGE("failed to create gscaler handle");
1037 ret = -1;
1038 goto err_alloc;
1039 }
1040
1041 ret = exynos_gsc_config_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1042 if (ret < 0) {
1043 ALOGE("failed to configure gscaler %u", gsc_idx);
1044 goto err_gsc_config;
1045 }
1046
1047 ret = exynos_gsc_run_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1048 if (ret < 0) {
1049 ALOGE("failed to run gscaler %u", gsc_idx);
1050 goto err_gsc_config;
1051 }
1052
1053 gsc_data->src_cfg = src_cfg;
1054 gsc_data->dst_cfg = dst_cfg;
1055
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001056 return 0;
Greg Hackmann9130e702012-07-30 14:53:04 -07001057
1058err_gsc_config:
1059 exynos_gsc_destroy(gsc_data->gsc);
1060 gsc_data->gsc = NULL;
1061err_alloc:
1062 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1063 if (gsc_data->dst_buf[i]) {
1064 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1065 gsc_data->dst_buf[i] = NULL;
1066 }
1067 }
1068 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001069}
1070
1071static void exynos5_config_handle(private_handle_t *handle,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001072 hwc_rect_t &sourceCrop, hwc_rect_t &displayFrame,
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001073 int32_t blending, s3c_fb_win_config &cfg)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001074{
1075 cfg.state = cfg.S3C_FB_WIN_STATE_BUFFER;
1076 cfg.fd = handle->fd;
1077 cfg.x = displayFrame.left;
1078 cfg.y = displayFrame.top;
1079 cfg.w = WIDTH(displayFrame);
1080 cfg.h = HEIGHT(displayFrame);
1081 cfg.format = exynos5_format_to_s3c_format(handle->format);
1082 uint8_t bpp = exynos5_format_to_bpp(handle->format);
1083 cfg.offset = (sourceCrop.top * handle->stride + sourceCrop.left) * bpp / 8;
1084 cfg.stride = handle->stride * bpp / 8;
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001085 cfg.blending = exynos5_blending_to_s3c_blending(blending);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001086}
1087
Erik Gilling87e707e2012-06-29 17:35:13 -07001088static void exynos5_config_overlay(hwc_layer_1_t *layer, s3c_fb_win_config &cfg,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001089 const private_module_t *gralloc_module)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001090{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001091 if (layer->compositionType == HWC_BACKGROUND) {
1092 hwc_color_t color = layer->backgroundColor;
1093 cfg.state = cfg.S3C_FB_WIN_STATE_COLOR;
1094 cfg.color = (color.r << 16) | (color.g << 8) | color.b;
1095 cfg.x = 0;
1096 cfg.y = 0;
1097 cfg.w = gralloc_module->xres;
1098 cfg.h = gralloc_module->yres;
1099 return;
1100 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001101
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001102 private_handle_t *handle = private_handle_t::dynamicCast(layer->handle);
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001103 exynos5_config_handle(handle, layer->sourceCrop, layer->displayFrame,
1104 layer->blending, cfg);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001105}
1106
1107static void exynos5_post_callback(void *data, private_handle_t *fb)
1108{
Benoit Goby8bad7e32012-08-16 14:17:14 -07001109 hwc_layer_1_t *hdmi_layer = NULL;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001110 exynos5_hwc_post_data_t *pdata = (exynos5_hwc_post_data_t *)data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001111
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001112 struct s3c_fb_win_config_data win_data;
1113 struct s3c_fb_win_config *config = win_data.config;
1114 memset(config, 0, sizeof(win_data.config));
Greg Hackmann9130e702012-07-30 14:53:04 -07001115
1116 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1117 if ( pdata->overlay_map[i] != -1) {
1118 hwc_layer_1_t &layer = pdata->overlays[i];
1119 private_handle_t *handle =
1120 private_handle_t::dynamicCast(layer.handle);
1121
1122 if (layer.acquireFenceFd != -1) {
1123 int err = sync_wait(layer.acquireFenceFd, 100);
1124 if (err != 0)
1125 ALOGW("fence for layer %zu didn't signal in 100 ms: %s",
1126 i, strerror(errno));
1127 close(layer.acquireFenceFd);
1128 }
1129
1130 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
1131 int gsc_idx = pdata->gsc_map[i].idx;
1132 exynos5_config_gsc_m2m(layer, pdata->pdev->alloc_device,
1133 &pdata->pdev->gsc[gsc_idx], gsc_idx);
1134 }
1135 }
1136 }
1137
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001138 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1139 if (i == pdata->fb_window) {
1140 hwc_rect_t rect = { 0, 0, fb->width, fb->height };
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001141 int32_t blending = (i == 0) ? HWC_BLENDING_NONE :
1142 HWC_BLENDING_PREMULT;
1143 exynos5_config_handle(fb, rect, rect, blending, config[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001144 } else if ( pdata->overlay_map[i] != -1) {
Greg Hackmann9130e702012-07-30 14:53:04 -07001145 hwc_layer_1_t &layer = pdata->overlays[i];
1146 private_handle_t *handle =
1147 private_handle_t::dynamicCast(layer.handle);
1148
1149 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
1150 int gsc_idx = pdata->gsc_map[i].idx;
1151 exynos5_gsc_data_t &gsc = pdata->pdev->gsc[gsc_idx];
1152
1153 if (!gsc.gsc) {
1154 ALOGE("failed to queue gscaler %u input for layer %u",
1155 gsc_idx, i);
1156 continue;
1157 }
1158
1159 int err = exynos_gsc_stop_exclusive(gsc.gsc);
1160 exynos_gsc_destroy(gsc.gsc);
1161 gsc.gsc = NULL;
1162 if (err < 0) {
1163 ALOGE("failed to dequeue gscaler output for layer %u", i);
1164 continue;
1165 }
1166
1167 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
1168 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
1169 private_handle_t *dst_handle =
1170 private_handle_t::dynamicCast(dst_buf);
Greg Hackmann90219f32012-08-16 17:28:57 -07001171 hwc_rect_t sourceCrop = { 0, 0,
1172 WIDTH(layer.displayFrame), HEIGHT(layer.displayFrame) };
1173 exynos5_config_handle(dst_handle, sourceCrop,
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001174 layer.displayFrame, layer.blending, config[i]);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001175
1176 if (handle->flags & GRALLOC_USAGE_EXTERNAL_DISP)
1177 hdmi_layer = &layer;
Greg Hackmann9130e702012-07-30 14:53:04 -07001178 }
1179 else {
1180 exynos5_config_overlay(&layer, config[i],
1181 pdata->pdev->gralloc_module);
Erik Gilling87e707e2012-06-29 17:35:13 -07001182 }
1183 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001184 if (i == 0 && config[i].blending != S3C_FB_BLENDING_NONE) {
1185 ALOGV("blending not supported on window 0; forcing BLENDING_NONE");
1186 config[i].blending = S3C_FB_BLENDING_NONE;
1187 }
1188
Greg Hackmann9130e702012-07-30 14:53:04 -07001189 ALOGV("window %u configuration:", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001190 dump_config(config[i]);
1191 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001192
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001193 int ret = ioctl(pdata->pdev->fd, S3CFB_WIN_CONFIG, &win_data);
1194 if (ret < 0)
1195 ALOGE("ioctl S3CFB_WIN_CONFIG failed: %d", errno);
Greg Hackmann600867e2012-08-23 12:58:02 -07001196 else {
1197 memcpy(pdata->pdev->last_config, &win_data.config,
1198 sizeof(win_data.config));
1199 memcpy(pdata->pdev->last_gsc_map, pdata->gsc_map,
1200 sizeof(pdata->gsc_map));
1201 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1202 if (i == pdata->fb_window) {
1203 pdata->pdev->last_handles[i] = NULL;
1204 } else if (pdata->overlay_map[i] != -1) {
1205 hwc_layer_1_t &layer = pdata->overlays[i];
1206 pdata->pdev->last_handles[i] = layer.handle;
1207 }
1208 }
1209 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001210
Benoit Goby8bad7e32012-08-16 14:17:14 -07001211 if (pdata->pdev->hdmi_enabled) {
1212 if (hdmi_layer) {
1213 private_handle_t *handle =
1214 private_handle_t::dynamicCast(hdmi_layer->handle);
1215 hdmi_configure_layer(pdata->pdev, *hdmi_layer);
1216 hdmi_output(pdata->pdev, handle);
1217 } else {
1218 hdmi_configure_handle(pdata->pdev, fb);
1219 hdmi_output(pdata->pdev, fb);
1220 }
1221 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001222
Erik Gilling87e707e2012-06-29 17:35:13 -07001223 pthread_mutex_lock(&pdata->completion_lock);
1224 pdata->fence = win_data.fence;
1225 pthread_cond_signal(&pdata->completion);
1226 pthread_mutex_unlock(&pdata->completion_lock);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001227}
1228
Jesse Halle94046d2012-07-31 14:34:08 -07001229static int exynos5_set(struct hwc_composer_device_1 *dev,
1230 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001231{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001232 exynos5_hwc_composer_device_1_t *pdev =
1233 (exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001234
Jesse Halle94046d2012-07-31 14:34:08 -07001235 if (!numDisplays || !displays || !displays[0] || !displays[0]->dpy || !displays[0]->sur)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001236 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001237
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001238 hwc_callback_queue_t *queue = NULL;
1239 pthread_mutex_t *lock = NULL;
1240 exynos5_hwc_post_data_t *data = NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001241
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001242 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1243 if (pdev->bufs.overlay_map[i] != -1) {
1244 pdev->bufs.overlays[i] =
1245 displays[0]->hwLayers[pdev->bufs.overlay_map[i]];
Erik Gilling87e707e2012-06-29 17:35:13 -07001246 }
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001247 }
Erik Gilling87e707e2012-06-29 17:35:13 -07001248
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001249 data = (exynos5_hwc_post_data_t *)
1250 malloc(sizeof(exynos5_hwc_post_data_t));
1251 memcpy(data, &pdev->bufs, sizeof(pdev->bufs));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001252
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001253 data->fence = -1;
1254 pthread_mutex_init(&data->completion_lock, NULL);
1255 pthread_cond_init(&data->completion, NULL);
Erik Gilling87e707e2012-06-29 17:35:13 -07001256
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001257 if (displays[0]->numHwLayers && pdev->bufs.fb_window == NO_FB_NEEDED) {
1258 exynos5_post_callback(data, NULL);
1259 } else {
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001260
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001261 struct hwc_callback_entry entry;
1262 entry.callback = exynos5_post_callback;
1263 entry.data = data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001264
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001265 queue = reinterpret_cast<hwc_callback_queue_t *>(
1266 pdev->gralloc_module->queue);
1267 lock = const_cast<pthread_mutex_t *>(
1268 &pdev->gralloc_module->queue_lock);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001269
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001270 pthread_mutex_lock(lock);
1271 queue->push_front(entry);
1272 pthread_mutex_unlock(lock);
Erik Gilling87e707e2012-06-29 17:35:13 -07001273
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001274 EGLBoolean success = eglSwapBuffers((EGLDisplay)displays[0]->dpy,
1275 (EGLSurface)displays[0]->sur);
1276 if (!success) {
1277 ALOGE("HWC_EGL_ERROR");
1278 if (displays[0]) {
1279 pthread_mutex_lock(lock);
1280 queue->removeAt(0);
1281 pthread_mutex_unlock(lock);
1282 free(data);
Erik Gilling87e707e2012-06-29 17:35:13 -07001283 }
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001284 return HWC_EGL_ERROR;
Erik Gilling87e707e2012-06-29 17:35:13 -07001285 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001286 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001287
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001288
Erik Gilling87e707e2012-06-29 17:35:13 -07001289 pthread_mutex_lock(&data->completion_lock);
1290 while (data->fence == -1)
1291 pthread_cond_wait(&data->completion, &data->completion_lock);
1292 pthread_mutex_unlock(&data->completion_lock);
1293
1294 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1295 if (pdev->bufs.overlay_map[i] != -1) {
1296 int dup_fd = dup(data->fence);
1297 if (dup_fd < 0)
1298 ALOGW("release fence dup failed: %s", strerror(errno));
Jesse Halle94046d2012-07-31 14:34:08 -07001299 displays[0]->hwLayers[pdev->bufs.overlay_map[i]].releaseFenceFd = dup_fd;
Erik Gilling87e707e2012-06-29 17:35:13 -07001300 }
1301 }
1302 close(data->fence);
1303 free(data);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001304 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001305}
1306
Erik Gilling87e707e2012-06-29 17:35:13 -07001307static void exynos5_registerProcs(struct hwc_composer_device_1* dev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001308 hwc_procs_t const* procs)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001309{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001310 struct exynos5_hwc_composer_device_1_t* pdev =
1311 (struct exynos5_hwc_composer_device_1_t*)dev;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001312 pdev->procs = procs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001313}
1314
Erik Gilling87e707e2012-06-29 17:35:13 -07001315static int exynos5_query(struct hwc_composer_device_1* dev, int what, int *value)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001316{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001317 struct exynos5_hwc_composer_device_1_t *pdev =
1318 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001319
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001320 switch (what) {
1321 case HWC_BACKGROUND_LAYER_SUPPORTED:
1322 // we support the background layer
1323 value[0] = 1;
1324 break;
1325 case HWC_VSYNC_PERIOD:
1326 // vsync period in nanosecond
1327 value[0] = 1000000000.0 / pdev->gralloc_module->fps;
1328 break;
1329 default:
1330 // unsupported query
1331 return -EINVAL;
1332 }
1333 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001334}
1335
Jesse Halle94046d2012-07-31 14:34:08 -07001336static int exynos5_eventControl(struct hwc_composer_device_1 *dev, int dpy,
1337 int event, int enabled)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001338{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001339 struct exynos5_hwc_composer_device_1_t *pdev =
1340 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001341
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001342 switch (event) {
1343 case HWC_EVENT_VSYNC:
1344 __u32 val = !!enabled;
1345 int err = ioctl(pdev->fd, S3CFB_SET_VSYNC_INT, &val);
1346 if (err < 0) {
1347 ALOGE("vsync ioctl failed");
1348 return -errno;
1349 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001350
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001351 return 0;
1352 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001353
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001354 return -EINVAL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001355}
1356
Benoit Gobycdd61b32012-07-09 12:09:59 -07001357static void handle_hdmi_uevent(struct exynos5_hwc_composer_device_1_t *pdev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001358 const char *buff, int len)
Benoit Gobycdd61b32012-07-09 12:09:59 -07001359{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001360 const char *s = buff;
1361 s += strlen(s) + 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001362
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001363 while (*s) {
1364 if (!strncmp(s, "SWITCH_STATE=", strlen("SWITCH_STATE=")))
1365 pdev->hdmi_hpd = atoi(s + strlen("SWITCH_STATE=")) == 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001366
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001367 s += strlen(s) + 1;
1368 if (s - buff >= len)
1369 break;
1370 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001371
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001372 if (pdev->hdmi_hpd) {
1373 if (hdmi_get_config(pdev)) {
1374 ALOGE("Error reading HDMI configuration");
1375 pdev->hdmi_hpd = false;
1376 return;
1377 }
1378 }
1379
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001380 ALOGV("HDMI HPD changed to %s", pdev->hdmi_hpd ? "enabled" : "disabled");
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001381 if (pdev->hdmi_hpd)
Benoit Goby8bad7e32012-08-16 14:17:14 -07001382 ALOGI("HDMI Resolution changed to %dx%d", pdev->hdmi_h, pdev->hdmi_w);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001383
Jesse Hallda5a71d2012-08-21 12:12:55 -07001384 /* hwc_dev->procs is set right after the device is opened, but there is
1385 * still a race condition where a hotplug event might occur after the open
1386 * but before the procs are registered. */
1387 if (pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001388 pdev->procs->invalidate(pdev->procs);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001389}
1390
Greg Hackmann29724852012-07-23 15:31:10 -07001391static void handle_vsync_event(struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001392{
Jesse Hallda5a71d2012-08-21 12:12:55 -07001393 if (!pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001394 return;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001395
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001396 int err = lseek(pdev->vsync_fd, 0, SEEK_SET);
1397 if (err < 0) {
1398 ALOGE("error seeking to vsync timestamp: %s", strerror(errno));
1399 return;
1400 }
1401
Greg Hackmann29724852012-07-23 15:31:10 -07001402 char buf[4096];
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001403 err = read(pdev->vsync_fd, buf, sizeof(buf));
Greg Hackmann29724852012-07-23 15:31:10 -07001404 if (err < 0) {
1405 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1406 return;
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001407 }
Greg Hackmann29724852012-07-23 15:31:10 -07001408 buf[sizeof(buf) - 1] = '\0';
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001409
Greg Hackmann29724852012-07-23 15:31:10 -07001410 errno = 0;
1411 uint64_t timestamp = strtoull(buf, NULL, 0);
1412 if (!errno)
1413 pdev->procs->vsync(pdev->procs, 0, timestamp);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001414}
1415
1416static void *hwc_vsync_thread(void *data)
1417{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001418 struct exynos5_hwc_composer_device_1_t *pdev =
1419 (struct exynos5_hwc_composer_device_1_t *)data;
1420 char uevent_desc[4096];
1421 memset(uevent_desc, 0, sizeof(uevent_desc));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001422
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001423 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001424
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001425 uevent_init();
Greg Hackmann29724852012-07-23 15:31:10 -07001426
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001427 char temp[4096];
1428 int err = read(pdev->vsync_fd, temp, sizeof(temp));
1429 if (err < 0) {
1430 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1431 return NULL;
1432 }
1433
Greg Hackmann29724852012-07-23 15:31:10 -07001434 struct pollfd fds[2];
1435 fds[0].fd = pdev->vsync_fd;
1436 fds[0].events = POLLPRI;
1437 fds[1].fd = uevent_get_fd();
1438 fds[1].events = POLLIN;
1439
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001440 while (true) {
Greg Hackmann29724852012-07-23 15:31:10 -07001441 int err = poll(fds, 2, -1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001442
Greg Hackmann29724852012-07-23 15:31:10 -07001443 if (err > 0) {
1444 if (fds[0].revents & POLLPRI) {
1445 handle_vsync_event(pdev);
1446 }
1447 else if (fds[1].revents & POLLIN) {
1448 int len = uevent_next_event(uevent_desc,
1449 sizeof(uevent_desc) - 2);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001450
Greg Hackmann29724852012-07-23 15:31:10 -07001451 bool hdmi = !strcmp(uevent_desc,
1452 "change@/devices/virtual/switch/hdmi");
1453 if (hdmi)
1454 handle_hdmi_uevent(pdev, uevent_desc, len);
1455 }
1456 }
1457 else if (err == -1) {
1458 if (errno == EINTR)
1459 break;
1460 ALOGE("error in vsync thread: %s", strerror(errno));
1461 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001462 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001463
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001464 return NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001465}
1466
Jesse Halle94046d2012-07-31 14:34:08 -07001467static int exynos5_blank(struct hwc_composer_device_1 *dev, int dpy, int blank)
Colin Cross00359a82012-07-12 17:54:17 -07001468{
1469 struct exynos5_hwc_composer_device_1_t *pdev =
1470 (struct exynos5_hwc_composer_device_1_t *)dev;
1471
1472 int fb_blank = blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK;
1473 int err = ioctl(pdev->fd, FBIOBLANK, fb_blank);
1474 if (err < 0) {
1475 ALOGE("%sblank ioctl failed", blank ? "" : "un");
1476 return -errno;
1477 }
1478
Benoit Gobyad4e3582012-08-30 17:17:34 -07001479 if (pdev->hdmi_hpd) {
1480 if (blank && !pdev->hdmi_blanked)
1481 hdmi_disable(pdev);
1482 pdev->hdmi_blanked = !!blank;
1483 }
1484
Colin Cross00359a82012-07-12 17:54:17 -07001485 return 0;
1486}
1487
Greg Hackmann600867e2012-08-23 12:58:02 -07001488static void exynos5_dump(hwc_composer_device_1* dev, char *buff, int buff_len)
1489{
1490 if (buff_len <= 0)
1491 return;
1492
1493 struct exynos5_hwc_composer_device_1_t *pdev =
1494 (struct exynos5_hwc_composer_device_1_t *)dev;
1495
1496 android::String8 result;
1497
Benoit Goby8bad7e32012-08-16 14:17:14 -07001498 result.appendFormat(" hdmi_enabled=%u\n", pdev->hdmi_enabled);
1499 if (pdev->hdmi_enabled)
1500 result.appendFormat(" w=%u, h=%u\n", pdev->hdmi_w, pdev->hdmi_h);
Greg Hackmann600867e2012-08-23 12:58:02 -07001501 result.append(
1502 " type | handle | color | blend | format | position | size | gsc \n"
1503 "----------+----------|----------+-------+--------+---------------+---------------------\n");
1504 // 8_______ | 8_______ | 8_______ | 5____ | 6_____ | [5____,5____] | [5____,5____] | 3__ \n"
1505
1506 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1507 struct s3c_fb_win_config &config = pdev->last_config[i];
1508 if (config.state == config.S3C_FB_WIN_STATE_DISABLED) {
1509 result.appendFormat(" %8s | %8s | %8s | %5s | %6s | %13s | %13s",
1510 "DISABLED", "-", "-", "-", "-", "-", "-");
1511 }
1512 else {
1513 if (config.state == config.S3C_FB_WIN_STATE_COLOR)
1514 result.appendFormat(" %8s | %8s | %8x | %5s | %6s", "COLOR",
1515 "-", config.color, "-", "-");
1516 else {
1517 if (pdev->last_handles[i])
1518 result.appendFormat(" %8s | %8x", "OVERLAY", intptr_t(pdev->last_handles[i]));
1519 else
1520 result.appendFormat(" %8s | %8s", "FB", "-");
1521
1522 result.appendFormat(" | %8s | %5x | %6x", "-", config.blending,
1523 config.format);
1524 }
1525
1526 result.appendFormat(" | [%5d,%5d] | [%5u,%5u]", config.x, config.y,
1527 config.w, config.h);
1528 }
1529 if (pdev->last_gsc_map[i].mode == exynos5_gsc_map_t::GSC_NONE)
1530 result.appendFormat(" | %3s", "-");
1531 else
1532 result.appendFormat(" | %3d",
1533 AVAILABLE_GSC_UNITS[pdev->last_gsc_map[i].idx]);
1534 result.append("\n");
1535 }
1536
1537 strlcpy(buff, result.string(), buff_len);
1538}
1539
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001540static int exynos5_close(hw_device_t* device);
1541
1542static int exynos5_open(const struct hw_module_t *module, const char *name,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001543 struct hw_device_t **device)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001544{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001545 int ret;
1546 int sw_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001547
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001548 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1549 return -EINVAL;
1550 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001551
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001552 struct exynos5_hwc_composer_device_1_t *dev;
1553 dev = (struct exynos5_hwc_composer_device_1_t *)malloc(sizeof(*dev));
1554 memset(dev, 0, sizeof(*dev));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001555
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001556 if (hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
1557 (const struct hw_module_t **)&dev->gralloc_module)) {
1558 ALOGE("failed to get gralloc hw module");
1559 ret = -EINVAL;
1560 goto err_get_module;
1561 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001562
Greg Hackmann9130e702012-07-30 14:53:04 -07001563 if (gralloc_open((const hw_module_t *)dev->gralloc_module,
1564 &dev->alloc_device)) {
1565 ALOGE("failed to open gralloc");
1566 ret = -EINVAL;
1567 goto err_get_module;
1568 }
1569
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001570 dev->fd = open("/dev/graphics/fb0", O_RDWR);
1571 if (dev->fd < 0) {
1572 ALOGE("failed to open framebuffer");
1573 ret = dev->fd;
Greg Hackmann9130e702012-07-30 14:53:04 -07001574 goto err_open_fb;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001575 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001576
Benoit Goby8bad7e32012-08-16 14:17:14 -07001577 dev->hdmi_mixer0 = open("/dev/v4l-subdev7", O_RDWR);
1578 if (dev->hdmi_layer0 < 0) {
1579 ALOGE("failed to open hdmi mixer0 subdev");
1580 ret = dev->hdmi_layer0;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001581 goto err_ioctl;
1582 }
1583
Benoit Goby8bad7e32012-08-16 14:17:14 -07001584 dev->hdmi_layer0 = open("/dev/video16", O_RDWR);
1585 if (dev->hdmi_layer0 < 0) {
1586 ALOGE("failed to open hdmi layer0 device");
1587 ret = dev->hdmi_layer0;
1588 goto err_mixer0;
1589 }
1590
1591 dev->hdmi_layer1 = open("/dev/video17", O_RDWR);
1592 if (dev->hdmi_layer1 < 0) {
1593 ALOGE("failed to open hdmi layer1 device");
1594 ret = dev->hdmi_layer1;
1595 goto err_hdmi0;
1596 }
1597
Greg Hackmann29724852012-07-23 15:31:10 -07001598 dev->vsync_fd = open("/sys/devices/platform/exynos5-fb.1/vsync", O_RDONLY);
1599 if (dev->vsync_fd < 0) {
1600 ALOGE("failed to open vsync attribute");
1601 ret = dev->vsync_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001602 goto err_hdmi1;
Greg Hackmann29724852012-07-23 15:31:10 -07001603 }
1604
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001605 sw_fd = open("/sys/class/switch/hdmi/state", O_RDONLY);
1606 if (sw_fd) {
1607 char val;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001608 if (read(sw_fd, &val, 1) == 1 && val == '1') {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001609 dev->hdmi_hpd = true;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001610 if (hdmi_get_config(dev)) {
1611 ALOGE("Error reading HDMI configuration");
1612 dev->hdmi_hpd = false;
1613 }
1614 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001615 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001616
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001617 dev->base.common.tag = HARDWARE_DEVICE_TAG;
1618 dev->base.common.version = HWC_DEVICE_API_VERSION_1_0;
1619 dev->base.common.module = const_cast<hw_module_t *>(module);
1620 dev->base.common.close = exynos5_close;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001621
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001622 dev->base.prepare = exynos5_prepare;
1623 dev->base.set = exynos5_set;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001624 dev->base.eventControl = exynos5_eventControl;
1625 dev->base.blank = exynos5_blank;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001626 dev->base.query = exynos5_query;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001627 dev->base.registerProcs = exynos5_registerProcs;
Greg Hackmann600867e2012-08-23 12:58:02 -07001628 dev->base.dump = exynos5_dump;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001629
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001630 dev->bufs.pdev = dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001631
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001632 *device = &dev->base.common;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001633
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001634 ret = pthread_create(&dev->vsync_thread, NULL, hwc_vsync_thread, dev);
1635 if (ret) {
1636 ALOGE("failed to start vsync thread: %s", strerror(ret));
1637 ret = -ret;
Greg Hackmann29724852012-07-23 15:31:10 -07001638 goto err_vsync;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001639 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001640
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001641 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001642
Greg Hackmann29724852012-07-23 15:31:10 -07001643err_vsync:
1644 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001645err_mixer0:
1646 close(dev->hdmi_mixer0);
1647err_hdmi1:
1648 close(dev->hdmi_layer0);
1649err_hdmi0:
1650 close(dev->hdmi_layer1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001651err_ioctl:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001652 close(dev->fd);
Greg Hackmann9130e702012-07-30 14:53:04 -07001653err_open_fb:
1654 gralloc_close(dev->alloc_device);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001655err_get_module:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001656 free(dev);
1657 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001658}
1659
1660static int exynos5_close(hw_device_t *device)
1661{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001662 struct exynos5_hwc_composer_device_1_t *dev =
1663 (struct exynos5_hwc_composer_device_1_t *)device;
Greg Hackmann29724852012-07-23 15:31:10 -07001664 pthread_kill(dev->vsync_thread, SIGTERM);
1665 pthread_join(dev->vsync_thread, NULL);
Greg Hackmann9130e702012-07-30 14:53:04 -07001666 for (size_t i = 0; i < NUM_GSC_UNITS; i++) {
1667 if (dev->gsc[i].gsc)
1668 exynos_gsc_destroy(dev->gsc[i].gsc);
1669 for (size_t j = 0; i < NUM_GSC_DST_BUFS; j++)
1670 if (dev->gsc[i].dst_buf[j])
1671 dev->alloc_device->free(dev->alloc_device, dev->gsc[i].dst_buf[j]);
1672 }
1673 gralloc_close(dev->alloc_device);
Greg Hackmann29724852012-07-23 15:31:10 -07001674 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001675 close(dev->hdmi_mixer0);
1676 close(dev->hdmi_layer0);
1677 close(dev->hdmi_layer1);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001678 close(dev->fd);
1679 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001680}
1681
1682static struct hw_module_methods_t exynos5_hwc_module_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001683 open: exynos5_open,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001684};
1685
1686hwc_module_t HAL_MODULE_INFO_SYM = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001687 common: {
1688 tag: HARDWARE_MODULE_TAG,
1689 module_api_version: HWC_MODULE_API_VERSION_0_1,
1690 hal_api_version: HARDWARE_HAL_API_VERSION,
1691 id: HWC_HARDWARE_MODULE_ID,
1692 name: "Samsung exynos5 hwcomposer module",
1693 author: "Google",
1694 methods: &exynos5_hwc_module_methods,
1695 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001696};