Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2014, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #include <debug.h> |
| 30 | #include <platform/iomap.h> |
| 31 | #include <reg.h> |
| 32 | #include <target.h> |
| 33 | #include <platform.h> |
| 34 | #include <uart_dm.h> |
| 35 | #include <mmc.h> |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 36 | #include <platform/gpio.h> |
| 37 | #include <dev/keys.h> |
| 38 | #include <spmi_v2.h> |
| 39 | #include <pm8x41.h> |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 40 | #include <board.h> |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 41 | #include <baseband.h> |
| 42 | #include <hsusb.h> |
Aparna Mallavarapu | acb6ede | 2014-03-21 19:22:00 +0530 | [diff] [blame] | 43 | #include <scm.h> |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 44 | #include <platform/gpio.h> |
| 45 | #include <platform/gpio.h> |
| 46 | #include <platform/irqs.h> |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 47 | #include <platform/clock.h> |
| 48 | #include <crypto5_wrapper.h> |
| 49 | #include <partition_parser.h> |
| 50 | #include <stdlib.h> |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 51 | |
Matthew Qin | f3ebf18 | 2014-04-08 11:38:14 +0800 | [diff] [blame] | 52 | #if LONG_PRESS_POWER_ON |
| 53 | #include <shutdown_detect.h> |
| 54 | #endif |
| 55 | |
Matthew Qin | 7f5ab93 | 2014-04-08 15:25:54 +0800 | [diff] [blame] | 56 | #if PON_VIB_SUPPORT |
| 57 | #include <vibrator.h> |
| 58 | #endif |
| 59 | |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 60 | #define PMIC_ARB_CHANNEL_NUM 0 |
| 61 | #define PMIC_ARB_OWNER_ID 0 |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 62 | #define TLMM_VOL_UP_BTN_GPIO 107 |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 63 | |
Matthew Qin | 7f5ab93 | 2014-04-08 15:25:54 +0800 | [diff] [blame] | 64 | #if PON_VIB_SUPPORT |
| 65 | #define VIBRATE_TIME 250 |
| 66 | #endif |
| 67 | |
Aparna Mallavarapu | acb6ede | 2014-03-21 19:22:00 +0530 | [diff] [blame] | 68 | #define FASTBOOT_MODE 0x77665500 |
| 69 | |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 70 | #define CE1_INSTANCE 1 |
| 71 | #define CE_EE 1 |
| 72 | #define CE_FIFO_SIZE 64 |
| 73 | #define CE_READ_PIPE 3 |
| 74 | #define CE_WRITE_PIPE 2 |
| 75 | #define CE_READ_PIPE_LOCK_GRP 0 |
| 76 | #define CE_WRITE_PIPE_LOCK_GRP 0 |
| 77 | #define CE_ARRAY_SIZE 20 |
| 78 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 79 | static void set_sdc_power_ctrl(void); |
| 80 | |
| 81 | struct mmc_device *dev; |
| 82 | |
| 83 | static uint32_t mmc_pwrctl_base[] = |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 84 | { MSM_SDC1_BASE, MSM_SDC2_BASE }; |
| 85 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 86 | static uint32_t mmc_sdhci_base[] = |
| 87 | { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE }; |
| 88 | |
| 89 | static uint32_t mmc_sdc_pwrctl_irq[] = |
| 90 | { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ }; |
| 91 | |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 92 | void target_early_init(void) |
| 93 | { |
| 94 | #if WITH_DEBUG_UART |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 95 | uart_dm_init(2, 0, BLSP1_UART1_BASE); |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 96 | #endif |
| 97 | } |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 98 | |
| 99 | void target_sdc_init() |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 100 | { |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 101 | struct mmc_config_data config; |
| 102 | |
| 103 | /* Set drive strength & pull ctrl values */ |
| 104 | set_sdc_power_ctrl(); |
| 105 | |
| 106 | config.bus_width = DATA_BUS_WIDTH_8BIT; |
Aparna Mallavarapu | 53b0940 | 2014-03-26 14:46:43 +0530 | [diff] [blame] | 107 | config.max_clk_rate = MMC_CLK_177MHZ; |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 108 | |
| 109 | /* Try slot 1*/ |
| 110 | config.slot = 1; |
| 111 | config.sdhc_base = mmc_sdhci_base[config.slot - 1]; |
| 112 | config.pwrctl_base = mmc_pwrctl_base[config.slot - 1]; |
| 113 | config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1]; |
| 114 | config.hs400_support = 0; |
| 115 | |
| 116 | if (!(dev = mmc_init(&config))) { |
| 117 | /* Try slot 2 */ |
| 118 | config.slot = 2; |
Aparna Mallavarapu | 53b0940 | 2014-03-26 14:46:43 +0530 | [diff] [blame] | 119 | config.max_clk_rate = MMC_CLK_200MHZ; |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 120 | config.sdhc_base = mmc_sdhci_base[config.slot - 1]; |
| 121 | config.pwrctl_base = mmc_pwrctl_base[config.slot - 1]; |
| 122 | config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1]; |
| 123 | |
| 124 | if (!(dev = mmc_init(&config))) { |
| 125 | dprintf(CRITICAL, "mmc init failed!"); |
| 126 | ASSERT(0); |
| 127 | } |
| 128 | } |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 129 | } |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 130 | |
| 131 | void *target_mmc_device() |
| 132 | { |
| 133 | return (void *) dev; |
| 134 | } |
| 135 | |
| 136 | /* Return 1 if vol_up pressed */ |
| 137 | static int target_volume_up() |
| 138 | { |
| 139 | uint8_t status = 0; |
| 140 | |
| 141 | gpio_tlmm_config(TLMM_VOL_UP_BTN_GPIO, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA, GPIO_ENABLE); |
| 142 | |
| 143 | /* Wait for the gpio config to take effect - debounce time */ |
| 144 | thread_sleep(10); |
| 145 | |
| 146 | /* Get status of GPIO */ |
| 147 | status = gpio_status(TLMM_VOL_UP_BTN_GPIO); |
| 148 | |
| 149 | /* Active low signal. */ |
| 150 | return !status; |
| 151 | } |
| 152 | |
| 153 | /* Return 1 if vol_down pressed */ |
| 154 | uint32_t target_volume_down() |
| 155 | { |
| 156 | /* Volume down button tied in with PMIC RESIN. */ |
| 157 | return pm8x41_resin_status(); |
| 158 | } |
| 159 | |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 160 | static void target_keystatus() |
| 161 | { |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 162 | keys_init(); |
| 163 | |
| 164 | if(target_volume_down()) |
| 165 | keys_post_event(KEY_VOLUMEDOWN, 1); |
| 166 | |
| 167 | if(target_volume_up()) |
| 168 | keys_post_event(KEY_VOLUMEUP, 1); |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 169 | } |
| 170 | |
| 171 | void target_init(void) |
| 172 | { |
| 173 | uint32_t base_addr; |
| 174 | uint8_t slot; |
| 175 | |
| 176 | dprintf(INFO, "target_init()\n"); |
| 177 | |
| 178 | spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID); |
| 179 | |
| 180 | target_keystatus(); |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 181 | set_sdc_power_ctrl(); |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 182 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 183 | target_sdc_init(); |
| 184 | if (partition_read_table()) |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 185 | { |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 186 | dprintf(CRITICAL, "Error reading the partition table info\n"); |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 187 | ASSERT(0); |
| 188 | } |
Matthew Qin | f3ebf18 | 2014-04-08 11:38:14 +0800 | [diff] [blame] | 189 | |
| 190 | #if LONG_PRESS_POWER_ON |
| 191 | shutdown_detect(); |
| 192 | #endif |
Matthew Qin | 7f5ab93 | 2014-04-08 15:25:54 +0800 | [diff] [blame] | 193 | |
| 194 | #if PON_VIB_SUPPORT |
| 195 | /* turn on vibrator to indicate that phone is booting up to end user */ |
| 196 | vib_timed_turn_on(VIBRATE_TIME); |
| 197 | #endif |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 198 | |
| 199 | if (target_use_signed_kernel()) |
| 200 | target_crypto_init_params(); |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 201 | } |
| 202 | |
| 203 | void target_serialno(unsigned char *buf) |
| 204 | { |
| 205 | uint32_t serialno; |
| 206 | if (target_is_emmc_boot()) { |
| 207 | serialno = mmc_get_psn(); |
| 208 | snprintf((char *)buf, 13, "%x", serialno); |
| 209 | } |
| 210 | } |
| 211 | |
| 212 | unsigned board_machtype(void) |
| 213 | { |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 214 | return LINUX_MACHTYPE_UNKNOWN; |
| 215 | } |
| 216 | |
| 217 | unsigned check_reboot_mode(void) |
| 218 | { |
| 219 | uint32_t restart_reason = 0; |
| 220 | |
| 221 | /* Read reboot reason and scrub it */ |
| 222 | restart_reason = readl(RESTART_REASON_ADDR); |
| 223 | writel(0x00, RESTART_REASON_ADDR); |
| 224 | |
| 225 | return restart_reason; |
| 226 | } |
| 227 | |
Aparna Mallavarapu | acb6ede | 2014-03-21 19:22:00 +0530 | [diff] [blame] | 228 | static int scm_dload_mode(int mode) |
| 229 | { |
| 230 | int ret = 0; |
| 231 | uint32_t dload_type; |
| 232 | |
| 233 | dprintf(SPEW, "DLOAD mode: %d\n", mode); |
| 234 | if (mode == NORMAL_DLOAD) |
| 235 | dload_type = SCM_DLOAD_MODE; |
| 236 | else if(mode == EMERGENCY_DLOAD) |
| 237 | dload_type = SCM_EDLOAD_MODE; |
| 238 | else |
| 239 | dload_type = 0; |
| 240 | |
| 241 | ret = scm_call_atomic2(SCM_SVC_BOOT, SCM_DLOAD_CMD, dload_type, 0); |
| 242 | if (ret) |
| 243 | dprintf(CRITICAL, "Failed to write to boot misc: %d\n", ret); |
| 244 | |
| 245 | ret = scm_call_atomic2(SCM_SVC_BOOT, WDOG_DEBUG_DISABLE, 1, 0); |
| 246 | if (ret) |
| 247 | dprintf(CRITICAL, "Failed to disable the wdog debug \n"); |
| 248 | |
| 249 | return ret; |
| 250 | } |
Matthew Qin | 6ba6ed1 | 2014-04-08 11:29:48 +0800 | [diff] [blame] | 251 | /* Configure PMIC and Drop PS_HOLD for shutdown */ |
| 252 | void shutdown_device() |
| 253 | { |
| 254 | dprintf(CRITICAL, "Going down for shutdown.\n"); |
| 255 | |
| 256 | /* Configure PMIC for shutdown */ |
| 257 | pm8x41_reset_configure(PON_PSHOLD_SHUTDOWN); |
| 258 | |
| 259 | /* Drop PS_HOLD for MSM */ |
| 260 | writel(0x00, MPM2_MPM_PS_HOLD); |
| 261 | |
| 262 | mdelay(5000); |
| 263 | |
| 264 | dprintf(CRITICAL, "shutdown failed\n"); |
| 265 | |
| 266 | ASSERT(0); |
| 267 | } |
| 268 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 269 | void reboot_device(unsigned reboot_reason) |
| 270 | { |
Aparna Mallavarapu | acb6ede | 2014-03-21 19:22:00 +0530 | [diff] [blame] | 271 | uint8_t reset_type = 0; |
| 272 | uint32_t ret = 0; |
| 273 | |
| 274 | /* Need to clear the SW_RESET_ENTRY register and |
| 275 | * write to the BOOT_MISC_REG for known reset cases |
| 276 | */ |
| 277 | if(reboot_reason != DLOAD) |
| 278 | scm_dload_mode(NORMAL_MODE); |
| 279 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 280 | writel(reboot_reason, RESTART_REASON_ADDR); |
| 281 | |
Aparna Mallavarapu | acb6ede | 2014-03-21 19:22:00 +0530 | [diff] [blame] | 282 | /* For Reboot-bootloader and Dload cases do a warm reset |
| 283 | * For Reboot cases do a hard reset |
| 284 | */ |
| 285 | if((reboot_reason == FASTBOOT_MODE) || (reboot_reason == DLOAD)) |
| 286 | reset_type = PON_PSHOLD_WARM_RESET; |
| 287 | else |
| 288 | reset_type = PON_PSHOLD_HARD_RESET; |
| 289 | |
| 290 | pm8x41_reset_configure(reset_type); |
| 291 | |
| 292 | ret = scm_halt_pmic_arbiter(); |
| 293 | if (ret) |
| 294 | dprintf(CRITICAL , "Failed to halt pmic arbiter: %d\n", ret); |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 295 | |
| 296 | /* Drop PS_HOLD for MSM */ |
| 297 | writel(0x00, MPM2_MPM_PS_HOLD); |
| 298 | |
| 299 | mdelay(5000); |
| 300 | |
| 301 | dprintf(CRITICAL, "Rebooting failed\n"); |
| 302 | } |
| 303 | |
| 304 | /* Detect the target type */ |
| 305 | void target_detect(struct board_data *board) |
| 306 | { |
| 307 | /* |
| 308 | * already fill the board->target on board.c |
| 309 | */ |
| 310 | } |
| 311 | |
| 312 | void target_baseband_detect(struct board_data *board) |
| 313 | { |
| 314 | uint32_t platform; |
| 315 | |
| 316 | platform = board->platform; |
| 317 | switch(platform) |
| 318 | { |
| 319 | case MSM8916: |
Aparna Mallavarapu | 9b482a8 | 2014-06-02 21:18:34 +0530 | [diff] [blame] | 320 | case MSM8116: |
| 321 | case MSM8216: |
| 322 | case MSM8616: |
Aparna Mallavarapu | d81c99e | 2014-04-20 23:32:51 +0530 | [diff] [blame] | 323 | case MSM8939: |
| 324 | case MSM8236: |
| 325 | case MSM8636: |
Unnati Gandhi | ad17b72 | 2014-06-11 23:04:54 +0530 | [diff] [blame] | 326 | case MSM8936: |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 327 | board->baseband = BASEBAND_MSM; |
| 328 | break; |
Aparna Mallavarapu | 9b482a8 | 2014-06-02 21:18:34 +0530 | [diff] [blame] | 329 | case APQ8016: |
Aparna Mallavarapu | d81c99e | 2014-04-20 23:32:51 +0530 | [diff] [blame] | 330 | case APQ8039: |
| 331 | case APQ8036: |
| 332 | board->baseband = BASEBAND_APQ; |
| 333 | break; |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 334 | default: |
| 335 | dprintf(CRITICAL, "Platform type: %u is not supported\n", platform); |
| 336 | ASSERT(0); |
| 337 | }; |
| 338 | } |
| 339 | |
| 340 | unsigned target_baseband() |
| 341 | { |
| 342 | return board_baseband(); |
| 343 | } |
| 344 | |
| 345 | int emmc_recovery_init(void) |
| 346 | { |
| 347 | return _emmc_recovery_init(); |
| 348 | } |
| 349 | |
| 350 | static void set_sdc_power_ctrl() |
| 351 | { |
| 352 | /* Drive strength configs for sdc pins */ |
| 353 | struct tlmm_cfgs sdc1_hdrv_cfg[] = |
| 354 | { |
| 355 | { SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK }, |
| 356 | { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK }, |
| 357 | { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_6MA, TLMM_HDRV_MASK }, |
| 358 | }; |
| 359 | |
| 360 | /* Pull configs for sdc pins */ |
| 361 | struct tlmm_cfgs sdc1_pull_cfg[] = |
| 362 | { |
| 363 | { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK }, |
| 364 | { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK }, |
| 365 | { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK }, |
| 366 | }; |
| 367 | |
| 368 | /* Set the drive strength & pull control values */ |
| 369 | tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg)); |
| 370 | tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg)); |
| 371 | } |
| 372 | |
| 373 | void target_usb_init(void) |
| 374 | { |
| 375 | uint32_t val; |
| 376 | |
| 377 | /* Select and enable external configuration with USB PHY */ |
| 378 | ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_SET); |
| 379 | |
| 380 | /* Enable sess_vld */ |
| 381 | val = readl(USB_GENCONFIG_2) | GEN2_SESS_VLD_CTRL_EN; |
| 382 | writel(val, USB_GENCONFIG_2); |
| 383 | |
| 384 | /* Enable external vbus configuration in the LINK */ |
| 385 | val = readl(USB_USBCMD); |
| 386 | val |= SESS_VLD_CTRL; |
| 387 | writel(val, USB_USBCMD); |
| 388 | } |
| 389 | |
Padmanabhan Komanduru | 1869a76 | 2014-04-01 20:12:05 +0530 | [diff] [blame] | 390 | uint8_t target_panel_auto_detect_enabled() |
| 391 | { |
| 392 | uint8_t ret = 0; |
| 393 | uint32_t hw_subtype = board_hardware_subtype(); |
| 394 | |
| 395 | switch(board_hardware_id()) { |
| 396 | case HW_PLATFORM_SURF: |
| 397 | ret = 1; |
| 398 | break; |
| 399 | default: |
| 400 | ret = 0; |
| 401 | break; |
| 402 | } |
| 403 | return ret; |
| 404 | } |
| 405 | |
| 406 | static uint8_t splash_override; |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 407 | /* Returns 1 if target supports continuous splash screen. */ |
| 408 | int target_cont_splash_screen() |
| 409 | { |
| 410 | uint8_t splash_screen = 0; |
Padmanabhan Komanduru | 1869a76 | 2014-04-01 20:12:05 +0530 | [diff] [blame] | 411 | if (!splash_override) { |
| 412 | switch (board_hardware_id()) { |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 413 | case HW_PLATFORM_MTP: |
| 414 | case HW_PLATFORM_SURF: |
Mao Flynn | 8140947 | 2014-04-10 15:01:30 +0800 | [diff] [blame] | 415 | case HW_PLATFORM_QRD: |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 416 | splash_screen = 1; |
| 417 | break; |
| 418 | default: |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 419 | splash_screen = 0; |
| 420 | break; |
Padmanabhan Komanduru | 1869a76 | 2014-04-01 20:12:05 +0530 | [diff] [blame] | 421 | } |
| 422 | dprintf(SPEW, "Target_cont_splash=%d\n", splash_screen); |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 423 | } |
Padmanabhan Komanduru | 1869a76 | 2014-04-01 20:12:05 +0530 | [diff] [blame] | 424 | return splash_screen; |
| 425 | } |
| 426 | |
| 427 | void target_force_cont_splash_disable(uint8_t override) |
| 428 | { |
| 429 | splash_override = override; |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 430 | } |
| 431 | |
Zhenhua Huang | 9b8cb1c | 2014-04-11 15:23:05 +0800 | [diff] [blame] | 432 | unsigned target_pause_for_battery_charge(void) |
| 433 | { |
| 434 | uint8_t pon_reason = pm8x41_get_pon_reason(); |
| 435 | uint8_t is_cold_boot = pm8x41_get_is_cold_boot(); |
| 436 | dprintf(INFO, "%s : pon_reason is %d cold_boot:%d\n", __func__, |
| 437 | pon_reason, is_cold_boot); |
| 438 | /* In case of fastboot reboot,adb reboot or if we see the power key |
| 439 | * pressed we do not want go into charger mode. |
| 440 | * fastboot reboot is warm boot with PON hard reset bit not set |
| 441 | * adb reboot is a cold boot with PON hard reset bit set |
| 442 | */ |
| 443 | if (is_cold_boot && |
| 444 | (!(pon_reason & HARD_RST)) && |
| 445 | (!(pon_reason & KPDPWR_N)) && |
| 446 | ((pon_reason & USB_CHG) || (pon_reason & DC_CHG))) |
| 447 | return 1; |
| 448 | else |
| 449 | return 0; |
| 450 | } |
| 451 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 452 | void target_usb_stop(void) |
| 453 | { |
| 454 | /* Disable VBUS mimicing in the controller. */ |
| 455 | ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_CLEAR); |
| 456 | } |
| 457 | |
| 458 | |
| 459 | void target_uninit(void) |
| 460 | { |
Matthew Qin | 7f5ab93 | 2014-04-08 15:25:54 +0800 | [diff] [blame] | 461 | #if PON_VIB_SUPPORT |
| 462 | /* wait for the vibrator timer is expried */ |
| 463 | wait_vib_timeout(); |
| 464 | #endif |
| 465 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 466 | mmc_put_card_to_sleep(dev); |
| 467 | sdhci_mode_disable(&dev->host); |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 468 | |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 469 | if (crypto_initialized()) |
| 470 | crypto_eng_cleanup(); |
Aparna Mallavarapu | 25aff01 | 2014-05-08 12:21:44 +0530 | [diff] [blame] | 471 | |
| 472 | if (target_is_ssd_enabled()) |
| 473 | clock_ce_disable(CE1_INSTANCE); |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 474 | } |
| 475 | |
| 476 | /* Do any target specific intialization needed before entering fastboot mode */ |
| 477 | void target_fastboot_init(void) |
| 478 | { |
| 479 | /* Set the BOOT_DONE flag in PM8916 */ |
| 480 | pm8x41_set_boot_done(); |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 481 | |
| 482 | if (target_is_ssd_enabled()) { |
| 483 | clock_ce_enable(CE1_INSTANCE); |
| 484 | target_load_ssd_keystore(); |
| 485 | } |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 486 | } |
Aparna Mallavarapu | acb6ede | 2014-03-21 19:22:00 +0530 | [diff] [blame] | 487 | |
| 488 | int set_download_mode(enum dload_mode mode) |
| 489 | { |
| 490 | int ret = 0; |
| 491 | ret = scm_dload_mode(mode); |
| 492 | |
| 493 | pm8x41_clear_pmic_watchdog(); |
| 494 | |
| 495 | return ret; |
| 496 | } |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 497 | |
| 498 | void target_load_ssd_keystore(void) |
| 499 | { |
| 500 | uint64_t ptn; |
| 501 | int index; |
| 502 | uint64_t size; |
| 503 | uint32_t *buffer = NULL; |
| 504 | |
| 505 | if (!target_is_ssd_enabled()) |
| 506 | return; |
| 507 | |
| 508 | index = partition_get_index("ssd"); |
| 509 | |
| 510 | ptn = partition_get_offset(index); |
| 511 | if (ptn == 0){ |
| 512 | dprintf(CRITICAL, "Error: ssd partition not found\n"); |
| 513 | return; |
| 514 | } |
| 515 | |
| 516 | size = partition_get_size(index); |
| 517 | if (size == 0) { |
| 518 | dprintf(CRITICAL, "Error: invalid ssd partition size\n"); |
| 519 | return; |
| 520 | } |
| 521 | |
| 522 | buffer = memalign(CACHE_LINE, ROUNDUP(size, CACHE_LINE)); |
| 523 | if (!buffer) { |
| 524 | dprintf(CRITICAL, "Error: allocating memory for ssd buffer\n"); |
| 525 | return; |
| 526 | } |
| 527 | |
| 528 | if (mmc_read(ptn, buffer, size)) { |
| 529 | dprintf(CRITICAL, "Error: cannot read data\n"); |
| 530 | free(buffer); |
| 531 | return; |
| 532 | } |
| 533 | |
| 534 | clock_ce_enable(CE1_INSTANCE); |
| 535 | scm_protect_keystore(buffer, size); |
| 536 | clock_ce_disable(CE1_INSTANCE); |
| 537 | free(buffer); |
| 538 | } |
| 539 | |
| 540 | crypto_engine_type board_ce_type(void) |
| 541 | { |
| 542 | return CRYPTO_ENGINE_TYPE_HW; |
| 543 | } |
| 544 | |
| 545 | /* Set up params for h/w CE. */ |
| 546 | void target_crypto_init_params() |
| 547 | { |
| 548 | struct crypto_init_params ce_params; |
| 549 | |
| 550 | /* Set up base addresses and instance. */ |
| 551 | ce_params.crypto_instance = CE1_INSTANCE; |
| 552 | ce_params.crypto_base = MSM_CE1_BASE; |
| 553 | ce_params.bam_base = MSM_CE1_BAM_BASE; |
| 554 | |
| 555 | /* Set up BAM config. */ |
| 556 | ce_params.bam_ee = CE_EE; |
| 557 | ce_params.pipes.read_pipe = CE_READ_PIPE; |
| 558 | ce_params.pipes.write_pipe = CE_WRITE_PIPE; |
| 559 | ce_params.pipes.read_pipe_grp = CE_READ_PIPE_LOCK_GRP; |
| 560 | ce_params.pipes.write_pipe_grp = CE_WRITE_PIPE_LOCK_GRP; |
| 561 | |
| 562 | /* Assign buffer sizes. */ |
| 563 | ce_params.num_ce = CE_ARRAY_SIZE; |
| 564 | ce_params.read_fifo_size = CE_FIFO_SIZE; |
| 565 | ce_params.write_fifo_size = CE_FIFO_SIZE; |
| 566 | |
| 567 | /* BAM is initialized by TZ for this platform. |
| 568 | * Do not do it again as the initialization address space |
| 569 | * is locked. |
| 570 | */ |
| 571 | ce_params.do_bam_init = 0; |
| 572 | |
| 573 | crypto_init_params(&ce_params); |
| 574 | } |
Aparna Mallavarapu | a115824 | 2014-05-23 14:47:44 +0530 | [diff] [blame] | 575 | |
| 576 | uint32_t target_get_hlos_subtype() |
| 577 | { |
| 578 | return board_hlos_subtype(); |
| 579 | } |