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Channagoud Kadabi31d648c2015-01-29 12:59:00 -08001/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <string.h>
30#include <stdlib.h>
31#include <debug.h>
32#include <reg.h>
33#include <mmc_sdhci.h>
34#include <sdhci.h>
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070035#include <sdhci_msm.h>
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070036#include <partition_parser.h>
37#include <platform/iomap.h>
38#include <platform/timer.h>
vijay kumar4f4405f2014-08-08 11:49:53 +053039#include <platform.h>
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070040
41extern void clock_init_mmc(uint32_t);
42extern void clock_config_mmc(uint32_t, uint32_t);
43
44/* data access time unit in ns */
45static const uint32_t taac_unit[] =
46{
47 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
48};
49
50/* data access time value x 10 */
51static const uint32_t taac_value[] =
52{
53 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
54};
55
56/* data transfer rate in kbit/s */
57static const uint32_t xfer_rate_unit[] =
58{
59 100, 1000, 10000, 100000, 0, 0, 0, 0
60};
61
62/* data transfer rate value x 10*/
63static const uint32_t xfer_rate_value[] =
64{
65 0, 10, 12, 13, 15, 20, 26, 30, 35, 40, 45, 52, 55, 60, 70, 80
66};
67
68/*
69 * Function: mmc decode and save csd
70 * Arg : Card structure & raw csd
71 * Return : 0 on Success, 1 on Failure
72 * Flow : Decodes CSD response received from the card.
73 * Note that we have defined only few of the CSD elements
74 * in csd structure. We'll only decode those values.
75 */
76static uint32_t mmc_decode_and_save_csd(struct mmc_card *card)
77{
78 uint32_t mmc_sizeof = 0;
79 uint32_t mmc_unit = 0;
80 uint32_t mmc_value = 0;
81 uint32_t mmc_temp = 0;
82 uint32_t *raw_csd = card->raw_csd;
83
84 struct mmc_csd mmc_csd;
85
86 mmc_sizeof = sizeof(uint32_t) * 8;
87
88 mmc_csd.cmmc_structure = UNPACK_BITS(raw_csd, 126, 2, mmc_sizeof);
89
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070090 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070091 /* Parse CSD according to SD card spec. */
92
93 /* CSD register is little bit differnet for CSD version 2.0 High
94 * Capacity and CSD version 1.0/2.0 Standard memory cards.
95 * In Version 2.0 some of the fields have fixed values and it's
96 * not necessary for host to refer these fields in CSD sent by
97 * card
98 */
99
100 if (mmc_csd.cmmc_structure == 1) {
101 /* CSD Version 2.0 */
102 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
103 /* Fixed value is 9 = 2^9 = 512 */
104 mmc_csd.write_blk_len = 512;
105 /* Fixed value is 9 = 512 */
106 mmc_csd.read_blk_len = 512;
107 /* Fixed value: 010b */
108 mmc_csd.r2w_factor = 0x2;
109 /* Not there in version 2.0 */
110 mmc_csd.c_size_mult = 0;
111 mmc_csd.c_size = UNPACK_BITS(raw_csd, 48, 22, mmc_sizeof);
112 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
113 * 100;
114
115 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
116 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
117 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
118 / 10;
119
120 mmc_csd.erase_blk_len = 1;
121 mmc_csd.read_blk_misalign = 0;
122 mmc_csd.write_blk_misalign = 0;
123 mmc_csd.read_blk_partial = 0;
124 mmc_csd.write_blk_partial = 0;
125
126 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
127 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
128 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
129 xfer_rate_unit[mmc_unit]) / 10;
130
131 mmc_csd.wp_grp_size = 0x0;
132 mmc_csd.wp_grp_enable = 0x0;
133 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
134 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
135
136 /* Calculate the card capcity */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700137 card->capacity = (unsigned long long) (1 + mmc_csd.c_size) * 512 * 1024;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700138 } else {
139 /* CSD Version 1.0 */
140 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
141
142 mmc_temp = UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
143 mmc_csd.write_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
144 (1 << mmc_temp) : 512;
145
146 mmc_temp = UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
147 mmc_csd.read_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
148 (1 << mmc_temp) : 512;
149
150 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
151 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
152 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
153 / 10;
154
155 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
156 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
157 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
158 xfer_rate_unit[mmc_unit]) / 10;
159
160 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
161 * 100;
162
163 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
164 mmc_csd.sector_size = UNPACK_BITS(raw_csd, 39, 7, mmc_sizeof) + 1;
165
166 mmc_csd.erase_blk_len = UNPACK_BITS(raw_csd, 46, 1, mmc_sizeof);
167 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
168 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
169 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
170 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
171
172 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
173 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
174 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 7, mmc_sizeof);
175 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
176 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
177 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
178
179 /* Calculate the card capacity */
180 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700181 card->capacity = (unsigned long long)mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700182 }
183 } else {
184 /* Parse CSD according to MMC card spec. */
185 mmc_csd.spec_vers = UNPACK_BITS(raw_csd, 122, 4, mmc_sizeof);
186 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
187 mmc_csd.write_blk_len = 1 << UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
188 mmc_csd.read_blk_len = 1 << UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
189 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
190 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
191 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
192 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof) * 100;
193
194 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
195 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
196 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit]) / 10;
197
198 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
199 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
200 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
201 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
202
203 /* Ignore -- no use of this value. */
204 mmc_csd.tran_speed = 0x00;
205
206 mmc_csd.erase_grp_size = UNPACK_BITS(raw_csd, 42, 5, mmc_sizeof);
207 mmc_csd.erase_grp_mult = UNPACK_BITS(raw_csd, 37, 5, mmc_sizeof);
208 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 5, mmc_sizeof);
209 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
210 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
211 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
212
213 /* Calculate the card capcity */
214 if (mmc_csd.c_size != 0xFFF) {
215 /* For cards less than or equal to 2GB */
216 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700217 card->capacity = (unsigned long long) mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700218 } else {
219 /* For cards greater than 2GB, Ext CSD register's SEC_COUNT
220 * is used to calculate the size.
221 */
222 uint64_t sec_count;
223
224 sec_count = (card->ext_csd[MMC_SEC_COUNT4] << MMC_SEC_COUNT4_SHIFT)
225 | (card->ext_csd[MMC_SEC_COUNT3] << MMC_SEC_COUNT3_SHIFT)
226 | (card->ext_csd[MMC_SEC_COUNT2] << MMC_SEC_COUNT2_SHIFT)
227 | card->ext_csd[MMC_SEC_COUNT1];
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700228 card->capacity = sec_count * MMC_BLK_SZ;
229 }
230 }
231
232 /* save the information in card structure */
233 memcpy((struct mmc_csd *)&card->csd,(struct mmc_csd *)&mmc_csd,
234 sizeof(struct mmc_csd));
235
vijay kumar697dbfd2014-04-24 17:12:49 +0530236 /* Calculate the wp grp size */
237 if (card->ext_csd[MMC_ERASE_GRP_DEF])
238 card->wp_grp_size = MMC_HC_ERASE_MULT * card->ext_csd[MMC_HC_ERASE_GRP_SIZE] / MMC_BLK_SZ;
239 else
240 card->wp_grp_size = (card->csd.wp_grp_size + 1) * (card->csd.erase_grp_size + 1) \
241 * (card->csd.erase_grp_mult + 1);
242
Channagoud Kadabi31d648c2015-01-29 12:59:00 -0800243 card->rpmb_size = RPMB_PART_MIN_SIZE * card->ext_csd[RPMB_SIZE_MULT];
244 card->rel_wr_count = card->ext_csd[REL_WR_SEC_C];
245
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700246 dprintf(SPEW, "Decoded CSD fields:\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700247 dprintf(SPEW, "cmmc_structure: %u\n", mmc_csd.cmmc_structure);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700248 dprintf(SPEW, "card_cmd_class: %x\n", mmc_csd.card_cmd_class);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700249 dprintf(SPEW, "write_blk_len: %u\n", mmc_csd.write_blk_len);
250 dprintf(SPEW, "read_blk_len: %u\n", mmc_csd.read_blk_len);
251 dprintf(SPEW, "r2w_factor: %u\n", mmc_csd.r2w_factor);
252 dprintf(SPEW, "sector_size: %u\n", mmc_csd.sector_size);
253 dprintf(SPEW, "c_size_mult:%u\n", mmc_csd.c_size_mult);
254 dprintf(SPEW, "c_size: %u\n", mmc_csd.c_size);
255 dprintf(SPEW, "nsac_clk_cycle: %u\n", mmc_csd.nsac_clk_cycle);
256 dprintf(SPEW, "taac_ns: %u\n", mmc_csd.taac_ns);
257 dprintf(SPEW, "tran_speed: %u kbps\n", mmc_csd.tran_speed);
258 dprintf(SPEW, "erase_blk_len: %u\n", mmc_csd.erase_blk_len);
259 dprintf(SPEW, "read_blk_misalign: %u\n", mmc_csd.read_blk_misalign);
260 dprintf(SPEW, "write_blk_misalign: %u\n", mmc_csd.write_blk_misalign);
261 dprintf(SPEW, "read_blk_partial: %u\n", mmc_csd.read_blk_partial);
262 dprintf(SPEW, "write_blk_partial: %u\n", mmc_csd.write_blk_partial);
vijay kumar697dbfd2014-04-24 17:12:49 +0530263 dprintf(SPEW, "wp_grp_size: %u\n", card->wp_grp_size);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700264 dprintf(SPEW, "Card Capacity: %llu Bytes\n", card->capacity);
265
266 return 0;
267}
268
269/*
270 * Function: mmc decode & save cid
271 * Arg : card structure & raw cid
272 * Return : 0 on Success, 1 on Failure
273 * Flow : Decode CID sent by the card.
274 */
275static uint32_t mmc_decode_and_save_cid(struct mmc_card *card,
276 uint32_t *raw_cid)
277{
278 struct mmc_cid mmc_cid;
279 uint32_t mmc_sizeof = 0;
280 int i = 0;
281
282 if (!raw_cid) {
283 return 1;
284 }
285
286 mmc_sizeof = sizeof(uint32_t) * 8;
287
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700288 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700289 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
290 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
291
292 for (i = 0; i < 5; i++) {
293 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid,
294 (104 - 8 * (i + 1)),
295 8,
296 mmc_sizeof);
297 }
298 mmc_cid.pnm[5] = 0;
299 mmc_cid.pnm[6] = 0;
300
301 mmc_cid.prv = UNPACK_BITS(raw_cid, 56, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700302 mmc_cid.psn = UNPACK_BITS(raw_cid, 24, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700303 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
304 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 8, mmc_sizeof);
305 mmc_cid.year += 2000;
306 } else {
307 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
308 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
309
310 for (i = 0; i < 6; i++) {
311 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid, (104 - 8 * (i + 1)),
312 8, mmc_sizeof);
313 }
314 mmc_cid.pnm[6] = 0;
315
316 mmc_cid.prv = UNPACK_BITS(raw_cid, 48, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700317 mmc_cid.psn = UNPACK_BITS(raw_cid, 16, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700318 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
319 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 4, mmc_sizeof);
320 mmc_cid.year += 1997;
321 }
322
323 /* save it in card database */
324 memcpy((struct mmc_cid *)&card->cid,
325 (struct mmc_cid *)&mmc_cid, sizeof(struct mmc_cid));
326
327 dprintf(SPEW, "Decoded CID fields:\n");
328 dprintf(SPEW, "Manufacturer ID: %x\n", mmc_cid.mid);
329 dprintf(SPEW, "OEM ID: 0x%x\n", mmc_cid.oid);
330 dprintf(SPEW, "Product Name: %s\n", mmc_cid.pnm);
331 dprintf(SPEW, "Product revision: %d.%d\n", (mmc_cid.prv >> 4),
332 (mmc_cid.prv & 0xF));
333 dprintf(SPEW, "Product serial number: %X\n", mmc_cid.psn);
334 dprintf(SPEW, "Manufacturing date: %d %d\n", mmc_cid.month, mmc_cid.year);
335
336 return 0;
337}
338
339/*
340 * Function: mmc reset cards
341 * Arg : host structure
342 * Return : 0 on Success, 1 on Failure
343 * Flow : Reset all the cards to idle condition (CMD 0)
344 */
345static uint8_t mmc_reset_card(struct sdhci_host *host)
346{
347 struct mmc_command cmd;
348
349 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
350
351 cmd.cmd_index = CMD0_GO_IDLE_STATE;
352 cmd.argument = 0;
353 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
354 cmd.resp_type = SDHCI_CMD_RESP_NONE;
355
356 /* send command */
357 return sdhci_send_command(host, &cmd);
358}
359
360/*
361 * Function: mmc operations command
362 * Arg : host & card structure
363 * Return : 0 on Success, 1 on Failure
364 * Flow : Send CMD1 to know whether the card supports host VDD profile or not.
365 */
366static uint32_t mmc_send_op_cond(struct sdhci_host *host, struct mmc_card *card)
367{
368 struct mmc_command cmd;
369 uint32_t mmc_resp = 0;
370 uint32_t mmc_ret = 0;
371 uint32_t mmc_retry = 0;
372
373 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
374
375 /* CMD1 format:
376 * [31] Busy bit
377 * [30:29] Access mode
378 * [28:24] reserved
379 * [23:15] 2.7-3.6
380 * [14:8] 2.0-2.6
381 * [7] 1.7-1.95
382 * [6:0] reserved
383 */
384
385 cmd.cmd_index = CMD1_SEND_OP_COND;
386 cmd.argument = card->ocr;
387 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
388 cmd.resp_type = SDHCI_CMD_RESP_R3;
389
390 do {
391 mmc_ret = sdhci_send_command(host, &cmd);
392 if (mmc_ret)
393 return mmc_ret;
394
395 /* Command returned success, now it's time to examine response */
396 mmc_resp = cmd.resp[0];
397
398 /* Check the response for busy status */
399 if (!(mmc_resp & MMC_OCR_BUSY)) {
400 mmc_retry++;
401 mdelay(1);
402 continue;
403 } else
404 break;
405 } while (mmc_retry < MMC_MAX_COMMAND_RETRY);
406
407 /* If we reached here after max retries, we failed to get OCR */
408 if (mmc_retry == MMC_MAX_COMMAND_RETRY && !(mmc_resp & MMC_OCR_BUSY)) {
409 dprintf(CRITICAL, "Card has busy status set. Init did not complete\n");
410 return 1;
411 }
412
413 /* Response contains card's ocr. Update card's information */
414 card->ocr = mmc_resp;
415
416 if (mmc_resp & MMC_OCR_SEC_MODE)
417 card->type = MMC_TYPE_MMCHC;
418 else
419 card->type = MMC_TYPE_STD_MMC;
420
421 return 0;
422}
423
424/*
425 * Function: mmc send cid
426 * Arg : host & card structure
427 * Return : 0 on Success, 1 on Failure
428 * Flow : Request any card to send its uniquie card identification
429 * (CID) number (CMD2).
430 */
431static uint32_t mmc_all_send_cid(struct sdhci_host *host, struct mmc_card *card)
432{
433 struct mmc_command cmd;
434 uint32_t mmc_ret = 0;
435
436 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
437
438 /* CMD2 Format:
439 * [31:0] stuff bits
440 */
441 cmd.cmd_index = CMD2_ALL_SEND_CID;
442 cmd.argument = 0;
443 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
444 cmd.resp_type = SDHCI_CMD_RESP_R2;
445
446 /* send command */
447 mmc_ret = sdhci_send_command(host, &cmd);
448 if (mmc_ret) {
449 return mmc_ret;
450 }
451
452 /* Response contains card's 128 bits CID register */
453 mmc_ret = mmc_decode_and_save_cid(card, cmd.resp);
454 if (mmc_ret) {
455 return mmc_ret;
456 }
457
458 return 0;
459}
460
461/*
462 * Function: mmc send relative address
463 * Arg : host & card structure
464 * Return : 0 on Success, 1 on Failure
465 * Flow : Ask card to send it's relative card address (RCA).
466 * This RCA number is shorter than CID and is used by
467 * the host to address the card in future (CMD3)
468 */
469static uint32_t mmc_send_relative_address(struct sdhci_host *host,
470 struct mmc_card *card)
471{
472 struct mmc_command cmd;
473 uint32_t mmc_ret = 0;
474
475 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
476
477 /* CMD3 Format:
478 * [31:0] stuff bits
479 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700480 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700481 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
482 cmd.argument = 0;
483 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
484 cmd.resp_type = SDHCI_CMD_RESP_R6;
485
486 /* send command */
487 mmc_ret = sdhci_send_command(host, &cmd);
488 if (mmc_ret)
489 return mmc_ret;
490
491 /* For sD, card will send RCA. Store it */
492 card->rca = (cmd.resp[0] >> 16);
493 } else {
494 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
495 cmd.argument = (MMC_RCA << 16);
496 card->rca = (cmd.argument >> 16);
497 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
498 cmd.resp_type = SDHCI_CMD_RESP_R6;
499
500 /* send command */
501 mmc_ret = sdhci_send_command(host, &cmd);
502 if (mmc_ret)
503 return mmc_ret;
504 }
505
506 return 0;
507}
508
509/*
510 * Function: mmc send csd
511 * Arg : host, card structure & o/p arg to store csd
512 * Return : 0 on Success, 1 on Failure
513 * Flow : Requests card to send it's CSD register's contents. (CMD9)
514 */
515static uint32_t mmc_send_csd(struct sdhci_host *host, struct mmc_card *card)
516{
517 struct mmc_command cmd;
518 uint32_t mmc_arg = 0;
519 uint32_t mmc_ret = 0;
520
521 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
522
523 /* CMD9 Format:
524 * [31:16] RCA
525 * [15:0] stuff bits
526 */
527 mmc_arg |= card->rca << 16;
528
529 cmd.cmd_index = CMD9_SEND_CSD;
530 cmd.argument = mmc_arg;
531 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
532 cmd.resp_type = SDHCI_CMD_RESP_R2;
533
534 /* send command */
535 mmc_ret = sdhci_send_command(host, &cmd);
536 if (mmc_ret)
537 return mmc_ret;
538
539 /* response contains the card csd */
540 memcpy(card->raw_csd, cmd.resp, sizeof(cmd.resp));
541
542 return 0;
543}
544
545/*
546 * Function: mmc select card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700547 * Arg : host, card structure
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700548 * Return : 0 on Success, 1 on Failure
549 * Flow : Selects a card by sending CMD7 to the card with its RCA.
550 * If RCA field is set as 0 ( or any other address ),
551 * the card will be de-selected. (CMD7)
552 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700553static uint32_t mmc_select_card(struct sdhci_host *host, struct mmc_card *card)
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700554{
555 struct mmc_command cmd;
556 uint32_t mmc_arg = 0;
557 uint32_t mmc_ret = 0;
558
559 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
560
561 /* CMD7 Format:
562 * [31:16] RCA
563 * [15:0] stuff bits
564 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700565 mmc_arg |= card->rca << 16;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700566
567 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
568 cmd.argument = mmc_arg;
569 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
570
571 /* If we are deselecting card, we do not get response */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700572 if (card->rca) {
573 if (MMC_CARD_SD(card))
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700574 cmd.resp_type = SDHCI_CMD_RESP_R1B;
575 else
576 cmd.resp_type = SDHCI_CMD_RESP_R1;
577 } else
578 cmd.resp_type = SDHCI_CMD_RESP_NONE;
579
580 /* send command */
581 mmc_ret = sdhci_send_command(host, &cmd);
582 if (mmc_ret)
583 return mmc_ret;
584
585 return 0;
586}
587
588/*
589 * Function: mmc set block len
590 * Arg : host, card structure & block length
591 * Return : 0 on Success, 1 on Failure
592 * Flow : Send command to set block length.
593 */
594static uint32_t mmc_set_block_len(struct sdhci_host *host,
595 struct mmc_card *card,
596 uint32_t block_len)
597{
598 struct mmc_command cmd;
599 uint32_t mmc_ret = 0;
600
601 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
602
603 /* CMD16 Format:
604 * [31:0] block length
605 */
606
607 cmd.cmd_index = CMD16_SET_BLOCKLEN;
608 cmd.argument = block_len;
609 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
610 cmd.resp_type = SDHCI_CMD_RESP_R1;
611
612 /* send command */
613 mmc_ret = sdhci_send_command(host, &cmd);
614 if (mmc_ret)
615 return mmc_ret;
616
617 /*
618 * If blocklength is larger than 512 bytes,
619 * the card sets BLOCK_LEN_ERROR bit.
620 */
621 if (cmd.resp[0] & MMC_R1_BLOCK_LEN_ERR) {
622 dprintf(CRITICAL, "The block length is not supported by the card\n");
623 return 1;
624 }
625
626 return 0;
627}
628
629/*
630 * Function: mmc get card status
631 * Arg : host, card structure & o/p argument card status
632 * Return : 0 on Success, 1 on Failure
633 * Flow : Get the current status of the card
634 */
635static uint32_t mmc_get_card_status(struct sdhci_host *host,
636 struct mmc_card *card, uint32_t *status)
637{
638 struct mmc_command cmd;
639 uint32_t mmc_ret = 0;
640
641 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
642
643 /* CMD13 Format:
644 * [31:16] RCA
645 * [15:0] stuff bits
646 */
647 cmd.cmd_index = CMD13_SEND_STATUS;
648 cmd.argument = card->rca << 16;
649 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
650 cmd.resp_type = SDHCI_CMD_RESP_R1;
651
652 /* send command */
653 mmc_ret = sdhci_send_command(host, &cmd);
654 if (mmc_ret)
655 return mmc_ret;
656
657 /* Checking ADDR_OUT_OF_RANGE error in CMD13 response */
658 if ((cmd.resp[0] >> 31) & 0x01)
659 return 1;
660
661 *status = cmd.resp[0];
662 return 0;
663}
664
665/*
666 * Function: mmc get ext csd
667 * Arg : host, card structure & array to hold ext attributes
668 * Return : 0 on Success, 1 on Failure
669 * Flow : Send ext csd command & get the card attributes
670 */
671static uint32_t mmc_get_ext_csd(struct sdhci_host *host, struct mmc_card *card)
672{
673 struct mmc_command cmd;
674 uint32_t mmc_ret = 0;
675
676 card->ext_csd = memalign(CACHE_LINE, ROUNDUP(512, CACHE_LINE));
677
678 ASSERT(card->ext_csd);
679
680 memset(card->ext_csd, 0, sizeof(card->ext_csd));
681
682 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
683
684 /* CMD8 */
685 cmd.cmd_index = CMD8_SEND_EXT_CSD;
686 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
687 cmd.resp_type = SDHCI_CMD_RESP_R1;
688 cmd.data.data_ptr = card->ext_csd;
689 cmd.data.num_blocks = 1;
690 cmd.data_present = 0x1;
691 cmd.trans_mode = SDHCI_MMC_READ;
692
693 /* send command */
694 mmc_ret = sdhci_send_command(host, &cmd);
695 if (mmc_ret)
696 return mmc_ret;
697
698 return mmc_ret;
699}
700
701/*
702 * Function: mmc switch command
703 * Arg : Host, card structure, access mode, index & value to be set
704 * Return : 0 on Success, 1 on Failure
705 * Flow : Send switch command to the card to set the ext attribute @ index
706 */
707static uint32_t mmc_switch_cmd(struct sdhci_host *host, struct mmc_card *card,
708 uint32_t access, uint32_t index, uint32_t value)
709{
710
711 struct mmc_command cmd;
712 uint32_t mmc_ret = 0;
713 uint32_t mmc_status;
714
715 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
716
717 /* CMD6 Format:
718 * [31:26] set to 0
719 * [25:24] access
720 * [23:16] index
721 * [15:8] value
722 * [7:3] set to 0
723 * [2:0] cmd set
724 */
725 cmd.cmd_index = CMD6_SWITCH_FUNC;
726 cmd.argument |= (access << 24);
727 cmd.argument |= (index << 16);
728 cmd.argument |= (value << 8);
729 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
730 cmd.resp_type = SDHCI_CMD_RESP_R1B;
731
732 mmc_ret = sdhci_send_command(host, &cmd);
733 if (mmc_ret) {
734 dprintf(CRITICAL, "CMD6 send failed\n");
735 return mmc_ret;
736 }
737
738 /* Check if the card completed the switch command processing */
739 mmc_ret = mmc_get_card_status(host, card, &mmc_status);
740 if (mmc_ret) {
741 dprintf(CRITICAL, "Get card status failed\n");
742 return mmc_ret;
743 }
744
745 if (MMC_CARD_STATUS(mmc_status) != MMC_TRAN_STATE) {
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700746 dprintf(CRITICAL, "Switch cmd failed. Card not in tran state %x\n", mmc_status);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700747 mmc_ret = 1;
748 }
749
750 if (mmc_status & MMC_SWITCH_FUNC_ERR_FLAG) {
751 dprintf(CRITICAL, "Switch cmd failed. Switch Error.\n");
752 mmc_ret = 1;
753 }
754
755 return mmc_ret;
756}
757
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700758bool mmc_set_drv_type(struct sdhci_host *host, struct mmc_card *card, uint8_t drv_type)
759{
760 uint32_t ret = 0;
761 bool drv_type_changed = false;
762
763 uint32_t value = ((drv_type << 4) | MMC_HS200_TIMING);
764
765 if (card->ext_csd[MMC_EXT_MMC_DRV_STRENGTH] & (1 << drv_type))
766 ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, value);
767 if (!ret)
768 drv_type_changed = true;
769
770 return drv_type_changed;
771}
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700772/*
773 * Function: mmc set bus width
774 * Arg : Host, card structure & width
775 * Return : 0 on Success, 1 on Failure
776 * Flow : Send switch command to set bus width
777 */
778static uint32_t mmc_set_bus_width(struct sdhci_host *host,
779 struct mmc_card *card,
780 uint32_t width)
781{
782 uint32_t mmc_ret = 0;
783
784 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
785 MMC_EXT_MMC_BUS_WIDTH, width);
786
787 if (mmc_ret) {
788 dprintf(CRITICAL, "Switch cmd failed\n");
789 return mmc_ret;
790 }
791
792 return 0;
793}
794
795
796/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700797 * Function: mmc card supports hs400 mode
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700798 * Arg : None
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700799 * Return : 1 if hs400 mode is supported, 0 otherwise
800 * Flow : Check the ext csd attributes of the card
801 */
802static uint8_t mmc_card_supports_hs400_mode(struct mmc_card *card)
803{
804 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS400_MODE)
805 return 1;
806 else
807 return 0;
808}
809
810/*
811 * Function: mmc card supports hs200 mode
812 * Arg : None
813 * Return : 1 if HS200 mode is supported, 0 otherwise
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700814 * Flow : Check the ext csd attributes of the card
815 */
816static uint8_t mmc_card_supports_hs200_mode(struct mmc_card *card)
817{
818 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS200_MODE)
819 return 1;
820 else
821 return 0;
822}
823
824/*
825 * Function: mmc card supports ddr mode
826 * Arg : None
827 * Return : 1 if DDR mode is supported, 0 otherwise
828 * Flow : Check the ext csd attributes of the card
829 */
830static uint8_t mmc_card_supports_ddr_mode(struct mmc_card *card)
831{
832 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_DDR_MODE)
833 return 1;
834 else
835 return 0;
836}
837
838/*
839 * Function : Enable HS200 mode
840 * Arg : Host, card structure and bus width
841 * Return : 0 on Success, 1 on Failure
842 * Flow :
843 * - Set the bus width to 4/8 bit SDR as supported by the target & host
844 * - Set the HS_TIMING on ext_csd 185 for the card
845 */
846static uint32_t mmc_set_hs200_mode(struct sdhci_host *host,
847 struct mmc_card *card, uint32_t width)
848{
849 uint32_t mmc_ret = 0;
850
Channagoud Kadabie632e252014-03-31 15:26:00 -0700851 DBG("\n Enabling HS200 Mode Start\n");
852
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700853 /* Set 4/8 bit SDR bus width */
854 mmc_ret = mmc_set_bus_width(host, card, width);
855 if (mmc_ret) {
856 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
857 card->rca);
858 return mmc_ret;
859 }
860
861 /* Setting HS200 in HS_TIMING using EXT_CSD (CMD6) */
862 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS200_TIMING);
863
864 if (mmc_ret) {
865 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
866 return mmc_ret;
867 }
868
Channagoud Kadabi1dc6aab2013-11-20 12:46:15 -0800869 /* Enable SDR104 mode in controller */
870 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
871
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700872 /* Run the clock @ 400 Mhz */
Channagoud Kadabie9168e82014-01-28 21:33:34 -0800873 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700874 {
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700875 /* Save the timing value, before changing the clock */
876 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
Channagoud Kadabi86756c12014-03-12 17:16:39 -0700877 /*
878 * Set the MCI_CLK divider before changing the sdcc core
879 * core clk to ensure card receives no more than 200 MHZ
880 * clock frequency
881 */
882 sdhci_msm_set_mci_clk(host);
883 clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700884 }
Channagoud Kadabi642ff552014-08-12 21:40:59 -0700885
886 /* Execute Tuning for hs200 mode */
887 if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))
888 dprintf(CRITICAL, "Tuning for hs200 failed\n");
889
890 /* Once the tuning is executed revert back the clock to 200MHZ
891 * and disable the MCI_CLK divider so that we can use SDHC clock
892 * divider to supply clock to the card
893 */
894 if (host->timing == MMC_HS400_TIMING)
895 {
896 MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
897 sdhci_msm_set_mci_clk(host);
898 clock_config_mmc(host->msm_host->slot, MMC_CLK_192MHZ);
899 }
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700900 else
901 {
902 /* Save the timing value, before changing the clock */
903 MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
904 }
905
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700906
Channagoud Kadabie632e252014-03-31 15:26:00 -0700907 DBG("\n Enabling HS200 Mode Done\n");
908
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700909 return mmc_ret;
910}
911
912/*
913 * Function: mmc set ddr mode
914 * Arg : Host & card structure
915 * Return : 0 on Success, 1 on Failure
916 * Flow : Set bus width for ddr mode & set controller in DDR mode
917*/
918static uint8_t mmc_set_ddr_mode(struct sdhci_host *host, struct mmc_card *card)
919{
920 uint8_t mmc_ret = 0;
921
Channagoud Kadabie632e252014-03-31 15:26:00 -0700922 DBG("\n Enabling DDR Mode Start\n");
923
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700924 /* Set width for 8 bit DDR mode by default */
925 mmc_ret = mmc_set_bus_width(host, card, DATA_DDR_BUS_WIDTH_8BIT);
926
927 if (mmc_ret) {
928 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
929 card->rca);
930 return mmc_ret;
931 }
932
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700933 /* Save the timing value, before changing the clock */
934 MMC_SAVE_TIMING(host, SDHCI_DDR50_MODE);
935
936 /* Set the DDR mode in controller */
937 sdhci_set_uhs_mode(host, SDHCI_DDR50_MODE);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700938
Channagoud Kadabie632e252014-03-31 15:26:00 -0700939 DBG("\n Enabling DDR Mode Done\n");
940
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700941 return 0;
942}
943
944/*
945 * Function: mmc set high speed interface
946 * Arg : Host & card structure
947 * Return : None
948 * Flow : Sets the sdcc clock & clock divider in the host controller
949 * Adjust the interface speed to optimal speed
950 */
951static uint32_t mmc_set_hs_interface(struct sdhci_host *host,
952 struct mmc_card *card)
953{
954 uint32_t mmc_ret = 0;
955
956 /* Setting HS_TIMING in EXT_CSD (CMD6) */
957 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
958 MMC_EXT_MMC_HS_TIMING, MMC_HS_TIMING);
959
960 if (mmc_ret) {
961 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
962 return mmc_ret;
963 }
964
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700965 /* Save the timing value, before changing the clock */
966 MMC_SAVE_TIMING(host, SDHCI_SDR25_MODE);
967
968 /* Set the SDR25 mode in controller */
969 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
970
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700971 return 0;
972}
973
974/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700975 * Function : Enable HS400 mode
976 * Arg : Host, card structure and bus width
977 * Return : 0 on Success, 1 on Failure
978 * Flow :
979 * - Set the bus width to 8 bit DDR
980 * - Set the HS_TIMING on ext_csd 185 for the card
981 */
982uint32_t mmc_set_hs400_mode(struct sdhci_host *host,
983 struct mmc_card *card, uint32_t width)
984{
985 uint32_t mmc_ret = 0;
986
987 /*
988 * Emmc 5.0 spec does not allow changing to hs400 mode directly
989 * Need to follow the sequence to change to hs400 mode
990 * 1. Enable HS200 mode, perform tuning
991 * 2. Change to high speed mode
992 * 3. Enable DDR mode
993 * 4. Enable HS400 mode & execute tuning
994 */
995
Channagoud Kadabie632e252014-03-31 15:26:00 -0700996 DBG("\n Enabling HS400 Mode Start\n");
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700997 /* HS400 mode is supported only in DDR 8-bit */
998 if (width != DATA_BUS_WIDTH_8BIT)
999 {
1000 dprintf(CRITICAL, "Bus width is not 8-bit, cannot switch to hs400: %u\n", width);
1001 return 1;
1002 }
1003
1004 /* 1.Enable HS200 mode */
1005 mmc_ret = mmc_set_hs200_mode(host, card, width);
1006
1007 if (mmc_ret)
1008 {
1009 dprintf(CRITICAL, "Failure Setting HS200 mode %s\t%d\n",__func__, __LINE__);
1010 return mmc_ret;
1011 }
1012
1013 /* 2. Enable High speed mode */
1014 /* This is needed to set the clock to a low value &
1015 * so that we can switch to hs_timing --> 0x1 */
1016 /* Save the timing value, before changing the clock */
1017 MMC_SAVE_TIMING(host, SDHCI_SDR12_MODE);
1018 sdhci_set_uhs_mode(host, SDHCI_SDR12_MODE);
1019
1020 /* 3. Set HS_TIMING to 0x1 */
1021 mmc_ret = mmc_set_hs_interface(host, card);
1022 if (mmc_ret)
1023 {
1024 dprintf(CRITICAL, "Error adjusting interface speed!:%s\t%d\n", __func__, __LINE__);
1025 return mmc_ret;
1026 }
1027
1028 /*4. Enable DDR mode */
1029 mmc_ret = mmc_set_ddr_mode(host, card);
1030 if (mmc_ret)
1031 {
1032 dprintf(CRITICAL, "Failure setting DDR mode:%s\t%d\n", __func__, __LINE__);
1033 return mmc_ret;
1034 }
1035
1036 /*5. Set hs400 timing */
1037 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS400_TIMING);
1038
1039 if (mmc_ret)
1040 {
1041 dprintf(CRITICAL, "Switch cmd returned failure %s\t%d\n",__func__, __LINE__);
1042 return mmc_ret;
1043 }
1044
1045 /* 6. Enable SDR104 mode in controller */
1046 /* Save the timing value, before changing the clock */
1047 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
1048 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
Channagoud Kadabi86756c12014-03-12 17:16:39 -07001049 /*
1050 * Enable HS400 mode
1051 */
1052 sdhci_msm_set_mci_clk(host);
Channagoud Kadabi642ff552014-08-12 21:40:59 -07001053 /* Set the clock back to 400 MHZ */
1054 clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001055
1056 /* 7. Execute Tuning for hs400 mode */
Channagoud Kadabie106d1f2014-04-25 18:26:26 -07001057 if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001058 dprintf(CRITICAL, "Tuning for hs400 failed\n");
1059
Channagoud Kadabie632e252014-03-31 15:26:00 -07001060 DBG("\n Enabling HS400 Mode Done\n");
1061
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001062 return mmc_ret;
1063}
1064
1065/*
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001066 * Function: mmc_host_init
1067 * Arg : mmc device structure
1068 * Return : 0 on success, 1 on Failure
1069 * Flow : Initialize the host contoller
1070 * Set the clock rate to 400 KHZ for init
1071 */
1072static uint8_t mmc_host_init(struct mmc_device *dev)
1073{
1074 uint8_t mmc_ret = 0;
1075
1076 struct sdhci_host *host;
1077 struct mmc_config_data *cfg;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001078 struct sdhci_msm_data *data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001079
1080 event_t sdhc_event;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001081
1082 host = &dev->host;
1083 cfg = &dev->config;
1084
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001085 event_init(&sdhc_event, false, EVENT_FLAG_AUTOUNSIGNAL);
1086
1087 host->base = cfg->sdhc_base;
1088 host->sdhc_event = &sdhc_event;
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001089 host->caps.hs200_support = cfg->hs200_support;
Aparna Mallavarapue1cdd302014-03-07 07:12:44 +05301090 host->caps.hs400_support = cfg->hs400_support;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001091
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001092 data = (struct sdhci_msm_data *) malloc(sizeof(struct sdhci_msm_data));
1093 ASSERT(data);
1094
1095 data->sdhc_event = &sdhc_event;
1096 data->pwrctl_base = cfg->pwrctl_base;
1097 data->pwr_irq = cfg->pwr_irq;
1098 data->slot = cfg->slot;
Channagoud Kadabi17e69972014-10-13 11:42:24 -07001099 data->use_io_switch = cfg->use_io_switch;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001100
1101 host->msm_host = data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001102
Channagoud Kadabi4b2f9672013-08-08 17:44:03 -07001103 /* Initialize any clocks needed for SDC controller */
1104 clock_init_mmc(cfg->slot);
1105
1106 clock_config_mmc(cfg->slot, cfg->max_clk_rate);
1107
Channagoud Kadabie632e252014-03-31 15:26:00 -07001108 /* Configure the CDC clocks needed for emmc storage
1109 * we use slot '1' for emmc
1110 */
1111 if (cfg->slot == 1)
1112 clock_config_cdc(cfg->slot);
1113
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001114 /*
1115 * MSM specific sdhc init
1116 */
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001117 sdhci_msm_init(host, data);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001118
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001119 /*
1120 * Initialize the controller, read the host capabilities
1121 * set power on mode
1122 */
1123 sdhci_init(host);
1124
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001125 /* Setup initial freq to 400KHz */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001126 mmc_ret = sdhci_clk_supply(host, SDHCI_CLK_400KHZ);
1127
1128 return mmc_ret;
1129}
1130
1131/*
1132 * Function: mmc identify card
1133 * Arg : host & card structure
1134 * Return : 0 on Success, 1 on Failure
1135 * Flow : Performs card identification process:
1136 * 1. Get card's unique identification number (CID)
1137 * 2. Get(for sd)/set (for mmc) relative card address (RCA)
1138 * 3. Select the card to put it in TRAN state
1139 */
1140static uint32_t mmc_identify_card(struct sdhci_host *host, struct mmc_card *card)
1141{
1142 uint32_t mmc_return = 0;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001143
1144 /* Ask card to send its unique card identification (CID) number (CMD2) */
1145 mmc_return = mmc_all_send_cid(host, card);
1146 if (mmc_return) {
1147 dprintf(CRITICAL,"Failure getting card's CID number!\n");
1148 return mmc_return;
1149 }
1150
1151 /* Ask card to send a relative card address (RCA) (CMD3) */
1152 mmc_return = mmc_send_relative_address(host, card);
1153 if (mmc_return) {
1154 dprintf(CRITICAL, "Failure getting card's RCA!\n");
1155 return mmc_return;
1156 }
1157
1158 /* Get card's CSD register (CMD9) */
1159 mmc_return = mmc_send_csd(host, card);
1160 if (mmc_return) {
1161 dprintf(CRITICAL,"Failure getting card's CSD information!\n");
1162 return mmc_return;
1163 }
1164
1165 /* Select the card (CMD7) */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001166 mmc_return = mmc_select_card(host, card);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001167 if (mmc_return) {
1168 dprintf(CRITICAL, "Failure selecting the Card with RCA: %x\n",card->rca);
1169 return mmc_return;
1170 }
1171
1172 /* Set the card status as active */
1173 card->status = MMC_STATUS_ACTIVE;
1174
1175 return 0;
1176}
1177
1178/*
1179 * Function: mmc_reset_card_and_send_op
1180 * Arg : Host & Card structure
1181 * Return : 0 on Success, 1 on Failure
1182 * Flow : Routine to initialize MMC card. It resets a card to idle state,
1183 * verify operating voltage and set the card in ready state.
1184 */
1185static uint32_t mmc_reset_card_and_send_op(struct sdhci_host *host, struct mmc_card *card)
1186{
1187 uint32_t mmc_return = 0;
1188
1189 /* 1. Card Reset - CMD0 */
1190 mmc_return = mmc_reset_card(host);
1191 if (mmc_return) {
1192 dprintf(CRITICAL, "Failure resetting MMC cards!\n");
1193 return mmc_return;
1194 }
1195
1196 /* 2. Card Initialization process */
1197
1198 /*
1199 * Send CMD1 to identify and reject cards that do not match host's VDD range
1200 * profile. Cards sends its OCR register in response.
1201 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001202
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001203 mmc_return = mmc_send_op_cond(host, card);
1204
1205 /* OCR is not received, init could not complete */
1206 if (mmc_return) {
1207 dprintf(CRITICAL, "Failure getting OCR response from MMC Card\n");
1208 return mmc_return;
1209 }
1210
1211 return 0;
1212}
1213
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001214static uint32_t mmc_send_app_cmd(struct sdhci_host *host, struct mmc_card *card)
1215{
1216 struct mmc_command cmd = {0};
1217
1218 cmd.cmd_index = CMD55_APP_CMD;
1219 cmd.argument = (card->rca << 16);
1220 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1221 cmd.resp_type = SDHCI_CMD_RESP_R1;
1222
1223 if (sdhci_send_command(host, &cmd))
1224 {
1225 dprintf(CRITICAL, "Failed Sending CMD55\n");
1226 return 1;
1227 }
1228 return 0;
1229}
1230
1231uint32_t mmc_sd_card_init(struct sdhci_host *host, struct mmc_card *card)
1232{
1233 uint8_t i;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001234 struct mmc_command cmd;
1235
1236 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1237
1238 /* Use the SD card RCA 0x0 during init */
1239 card->rca = SD_CARD_RCA;
1240
1241 /* Send CMD8 for voltage check*/
1242 for (i = 0 ;i < SD_CMD8_MAX_RETRY; i++)
1243 {
1244 cmd.cmd_index = CMD8_SEND_IF_COND;
1245 cmd.argument = MMC_SD_HC_VOLT_SUPPLIED;
1246 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1247 cmd.resp_type = SDHCI_CMD_RESP_R7;
1248
1249 if (sdhci_send_command(host, &cmd))
1250 {
1251 dprintf(CRITICAL, "The response for CMD8 does not match the supplied value\n");
1252 return 1;
1253 }
1254 else
1255 {
1256 /* If the command response echos the voltage back */
1257 if (cmd.resp[0] == MMC_SD_HC_VOLT_SUPPLIED)
1258 break;
1259 }
1260 /* As per SDCC the spec try for max three times with
1261 * 1 ms delay
1262 */
1263 mdelay(1);
1264 }
1265
1266 if (i == SD_CMD8_MAX_RETRY && (cmd.resp[0] != MMC_SD_HC_VOLT_SUPPLIED))
1267 {
1268 dprintf(CRITICAL, "Error: CMD8 response timed out\n");
1269 return 1;
1270 }
1271
1272 /* Send ACMD41 for OCR */
1273 for (i = 0; i < SD_ACMD41_MAX_RETRY; i++)
1274 {
1275 /* Send APP_CMD before ACMD41*/
1276 if (mmc_send_app_cmd(host, card))
1277 {
1278 dprintf(CRITICAL, "Failed sending App command\n");
1279 return 1;
1280 }
1281
1282 /* APP_CMD is successful, send ACMD41 now */
1283 cmd.cmd_index = ACMD41_SEND_OP_COND;
1284 cmd.argument = MMC_SD_OCR | MMC_SD_HC_HCS;
1285 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1286 cmd.resp_type = SDHCI_CMD_RESP_R3;
1287
1288 if (sdhci_send_command(host, &cmd))
1289 {
1290 dprintf(CRITICAL, "Failure sending ACMD41\n");
1291 return 1;
1292 }
1293 else
1294 {
1295 if (cmd.resp[0] & MMC_SD_DEV_READY)
1296 {
1297 if (cmd.resp[0] & (1 << 30))
1298 card->type = MMC_CARD_TYPE_SDHC;
1299 else
1300 card->type = MMC_CARD_TYPE_STD_SD;
1301
1302 break;
1303 }
1304 }
1305 /*
1306 * As per SDCC spec try for max 1 second
1307 */
1308 mdelay(50);
1309 }
1310
1311 if (i == SD_ACMD41_MAX_RETRY && !(cmd.resp[0] & MMC_SD_DEV_READY))
1312 {
1313 dprintf(CRITICAL, "Error: ACMD41 response timed out\n");
1314 return 1;
1315 }
1316
1317 return 0;
1318}
1319
1320/*
1321 * Function to read SD card information from SD status
1322 */
1323static uint32_t mmc_sd_get_card_ssr(struct sdhci_host *host, struct mmc_card *card)
1324{
1325 BUF_DMA_ALIGN(raw_sd_status, 64);
1326 struct mmc_command cmd = {0};
1327 uint32_t sd_status[16];
1328 uint32_t *status = sd_status;
1329 uint32_t au_size;
1330 int i;
1331 int j;
1332
1333 if (mmc_send_app_cmd(host, card))
1334 {
1335 dprintf(CRITICAL, "Failed sending App command\n");
1336 return 1;
1337 }
1338
1339 cmd.cmd_index = ACMD13_SEND_SD_STATUS;
1340 cmd.argument = 0x0;
1341 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
Channagoud Kadabi57f37a82014-08-25 13:33:49 -07001342 cmd.resp_type = SDHCI_CMD_RESP_R1;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001343 cmd.trans_mode = SDHCI_MMC_READ;
1344 cmd.data_present = 0x1;
1345 cmd.data.data_ptr = raw_sd_status;
1346 cmd.data.num_blocks = 0x1;
1347 cmd.data.blk_sz = 0x40;
1348
1349 /* send command */
1350 if (sdhci_send_command(host, &cmd))
1351 return 1;
1352
1353 memcpy(sd_status, raw_sd_status, sizeof(sd_status));
1354
1355 for (i = 15, j = 0; i >=0 ; i--, j++)
1356 sd_status[i] = swap_endian32(sd_status[j]);
1357
1358 au_size = UNPACK_BITS(status, MMC_SD_AU_SIZE_BIT, MMC_SD_AU_SIZE_LEN, 32);
1359 /* Card AU size in sectors */
1360 card->ssr.au_size = 1 << (au_size + 4);
1361 card->ssr.num_aus = UNPACK_BITS(status, MMC_SD_ERASE_SIZE_BIT, MMC_SD_ERASE_SIZE_LEN, 32);
1362
1363 return 0;
1364}
1365
1366/*
1367 * Function to read the SD CARD configuration register
1368 */
1369static uint32_t mmc_sd_get_card_scr(struct sdhci_host *host, struct mmc_card *card)
1370{
1371 BUF_DMA_ALIGN(scr_resp, 8);
1372 struct mmc_command cmd = {0};
1373 uint32_t raw_scr[2];
1374
1375 /* Now read the SCR register */
1376 /* Send APP_CMD before ACMD51*/
1377 if (mmc_send_app_cmd(host, card))
1378 {
1379 dprintf(CRITICAL, "Failed sending App command\n");
1380 return 1;
1381 }
1382
1383 cmd.cmd_index = ACMD51_READ_CARD_SCR;
1384 cmd.argument = 0x0;
1385 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1386 cmd.resp_type = SDHCI_CMD_RESP_R1;
1387 cmd.trans_mode = SDHCI_MMC_READ;
1388 cmd.data_present = 0x1;
1389 cmd.data.data_ptr = scr_resp;
1390 cmd.data.num_blocks = 0x1;
1391 cmd.data.blk_sz = 0x8;
1392
1393 /* send command */
1394 if (sdhci_send_command(host, &cmd))
1395 return 1;
1396
1397 memcpy(raw_scr, scr_resp, sizeof(raw_scr));
1398
1399 card->raw_scr[0] = swap_endian32(raw_scr[0]);
1400 card->raw_scr[1] = swap_endian32(raw_scr[1]);
1401
1402 /*
1403 * Parse & Populate the SCR data as per sdcc spec
1404 */
1405 card->scr.bus_widths = (card->raw_scr[0] & SD_SCR_BUS_WIDTH_MASK) >> SD_SCR_BUS_WIDTH;
1406 card->scr.cmd23_support = (card->raw_scr[0] & SD_SCR_CMD23_SUPPORT);
1407 card->scr.sd_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC_MASK) >> SD_SCR_SD_SPEC;
1408 card->scr.sd3_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC3_MASK) >> SD_SCR_SD_SPEC3;
1409
1410 return 0;
1411}
1412
1413/*
1414 * Function: mmc_set_sd_bus_width
1415 * Arg : host, device structure & width
1416 * Return : 0 on Success, 1 on Failure
1417 * Flow : Set the bus width for the card
1418 */
1419uint32_t mmc_sd_set_bus_width(struct sdhci_host *host, struct mmc_card *card, uint8_t width)
1420{
1421 struct mmc_command cmd = {0};
1422
1423 /* Send APP_CMD before ACMD6*/
1424 if (mmc_send_app_cmd(host, card))
1425 {
1426 dprintf(CRITICAL, "Failed sending App command\n");
1427 return 1;
1428 }
1429
1430 cmd.cmd_index = ACMD6_SET_BUS_WIDTH;
1431 cmd.argument = (width == DATA_BUS_WIDTH_4BIT) ? (1<<1) : 0;
1432 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1433 cmd.resp_type = SDHCI_CMD_RESP_R1;
1434
1435 /* send command */
1436 if (sdhci_send_command(host, &cmd))
1437 return 1;
1438
1439 return 0;
1440}
1441
1442uint32_t mmc_sd_set_hs(struct sdhci_host *host, struct mmc_card *card)
1443{
1444 struct mmc_command cmd = {0};
1445 BUF_DMA_ALIGN(switch_resp, 64);
1446
1447 cmd.cmd_index = CMD6_SWITCH_FUNC;
1448 cmd.argument = MMC_SD_SWITCH_HS;
1449 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1450 cmd.resp_type = SDHCI_CMD_RESP_R1;
1451 cmd.trans_mode = SDHCI_MMC_READ;
1452 cmd.data_present = 0x1;
1453 cmd.data.data_ptr = switch_resp;
1454 cmd.data.num_blocks = 0x1;
1455 cmd.data.blk_sz = 0x40;
1456
1457 /* send command */
1458 if (sdhci_send_command(host, &cmd))
1459 return 1;
1460
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001461 /* Set the SDR25 mode in controller*/
1462 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
1463
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001464 return 0;
1465}
1466
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001467/*
1468 * Function: mmc_init_card
1469 * Arg : mmc device structure
1470 * Return : 0 on Success, 1 on Failure
1471 * Flow : Performs initialization and identification of eMMC cards connected
1472 * to the host.
1473 */
1474
1475static uint32_t mmc_card_init(struct mmc_device *dev)
1476{
1477 uint32_t mmc_return = 0;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001478 uint8_t bus_width = 0;
1479
1480 struct sdhci_host *host;
1481 struct mmc_card *card;
1482 struct mmc_config_data *cfg;
1483
1484 host = &dev->host;
1485 card = &dev->card;
1486 cfg = &dev->config;
1487
1488 /* Initialize MMC card structure */
1489 card->status = MMC_STATUS_INACTIVE;
1490
1491 /* TODO: Get the OCR params from target */
1492 card->ocr = MMC_OCR_27_36 | MMC_OCR_SEC_MODE;
1493
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001494 /* Initialize the internal MMC */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001495 mmc_return = mmc_reset_card_and_send_op(host, card);
1496 if (mmc_return)
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001497 {
1498 dprintf(CRITICAL, "MMC card failed to respond, try for SD card\n");
1499 /* Reset the card & get the OCR */
1500 mmc_return = mmc_sd_card_init(host, card);
1501 if (mmc_return)
1502 {
1503 dprintf(CRITICAL, "Failed to initialize SD card\n");
1504 return mmc_return;
1505 }
1506 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001507
1508 /* Identify (CMD2, CMD3 & CMD9) and select the card (CMD7) */
1509 mmc_return = mmc_identify_card(host, card);
1510 if (mmc_return)
1511 return mmc_return;
1512
1513 /* set interface speed */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001514 if (MMC_CARD_SD(card))
1515 {
1516 mmc_return = mmc_sd_set_hs(host, card);
1517 if (mmc_return)
1518 {
1519 dprintf(CRITICAL, "Failed to set HS for SD card\n");
1520 return mmc_return;
1521 }
1522 }
1523 else
1524 {
1525 mmc_return = mmc_set_hs_interface(host, card);
1526 if (mmc_return) {
1527 dprintf(CRITICAL, "Error adjusting interface speed!\n");
1528 return mmc_return;
1529 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001530 }
1531
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001532 /* Now get the extended CSD for the card */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001533 if (MMC_CARD_MMC(card))
1534 {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001535 /* For MMC cards, also get the extended csd */
1536 mmc_return = mmc_get_ext_csd(host, card);
1537
1538 if (mmc_return) {
1539 dprintf(CRITICAL, "Failure getting card's ExtCSD information!\n");
1540 return mmc_return;
1541 }
1542 }
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001543 else
1544 {
1545 /*Read SCR for sd card */
1546 if (mmc_sd_get_card_scr(host, card))
1547 {
1548 dprintf(CRITICAL, "Failure getting card's SCR register\n");
1549 return 1;
1550 }
1551 /* Read SSR for the SD card */
1552 if (mmc_sd_get_card_ssr(host, card))
1553 {
1554 dprintf(CRITICAL, "Failed to get SSR from the card\n");
1555 return 1;
1556 }
1557 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001558
1559 /* Decode and save the CSD register */
1560 mmc_return = mmc_decode_and_save_csd(card);
1561 if (mmc_return) {
1562 dprintf(CRITICAL, "Failure decoding card's CSD information!\n");
1563 return mmc_return;
1564 }
1565
1566
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001567 if (MMC_CARD_MMC(card))
1568 {
1569 /* Set the bus width based on host, target capbilities */
1570 if (cfg->bus_width == DATA_BUS_WIDTH_8BIT && host->caps.bus_width_8bit)
1571 bus_width = DATA_BUS_WIDTH_8BIT;
1572 /*
1573 * Host contoller by default supports 4 bit & 1 bit mode.
1574 * No need to check for host support here
1575 */
1576 else if (cfg->bus_width == DATA_BUS_WIDTH_4BIT)
1577 bus_width = DATA_BUS_WIDTH_4BIT;
1578 else
1579 bus_width = DATA_BUS_WIDTH_1BIT;
1580
1581 /* Set 4/8 bit SDR bus width in controller */
1582 mmc_return = sdhci_set_bus_width(host, bus_width);
1583
1584 if (mmc_return) {
1585 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
1586 return 1;
1587 }
1588
1589 /* Enable high speed mode in the follwing order:
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001590 * 1. HS400 mode if supported by host & card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001591 * 1. HS200 mode if supported by host & card
1592 * 2. DDR mode host, if supported by host & card
1593 * 3. Use normal speed mode with supported bus width
1594 */
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001595 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001596 {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001597 dprintf(INFO, "SDHC Running in HS400 mode\n");
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001598 mmc_return = mmc_set_hs400_mode(host, card, bus_width);
1599 if (mmc_return)
1600 {
1601 dprintf(CRITICAL, "Failure to set HS400 mode for Card(RCA:%x)\n",
1602 card->rca);
1603 return mmc_return;
1604 }
1605 }
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001606#if USE_TARGET_HS200_CAPS
1607 else if (host->caps.hs200_support && host->caps.sdr104_support && mmc_card_supports_hs200_mode(card))
1608#else
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001609 else if (host->caps.sdr104_support && mmc_card_supports_hs200_mode(card))
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001610#endif
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001611 {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001612 dprintf(INFO, "SDHC Running in HS200 mode\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001613 mmc_return = mmc_set_hs200_mode(host, card, bus_width);
1614
1615 if (mmc_return) {
1616 dprintf(CRITICAL, "Failure to set HS200 mode for Card(RCA:%x)\n",
1617 card->rca);
1618 return mmc_return;
1619 }
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001620 } else if (host->caps.ddr_support && mmc_card_supports_ddr_mode(card)) {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001621 dprintf(INFO, "SDHC Running in DDR mode\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001622 mmc_return = mmc_set_ddr_mode(host, card);
1623
1624 if (mmc_return) {
1625 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
1626 card->rca);
1627 return mmc_return;
1628 }
1629 } else {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001630 dprintf(INFO, "SDHC Running in High Speed mode\n");
1631 /* Set HS_TIMING mode */
1632 mmc_return = mmc_set_hs_interface(host, card);
1633 if (mmc_return) {
1634 dprintf(CRITICAL, "Failure to enalbe HS mode for Card(RCA:%x)\n",
1635 card->rca);
1636 return mmc_return;
1637 }
1638 /* Set wide bus mode */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001639 mmc_return = mmc_set_bus_width(host, card, bus_width);
1640 if (mmc_return) {
1641 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
1642 card->rca);
1643 return mmc_return;
1644 }
1645 }
1646 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001647 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001648 {
1649 /* Check the supported bus width for the card from SCR register */
1650 if (card->scr.bus_widths & SD_SCR_WIDTH_4BIT)
1651 bus_width = DATA_BUS_WIDTH_4BIT;
1652 else
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001653 bus_width = DATA_BUS_WIDTH_1BIT;
1654
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001655 mmc_return = mmc_sd_set_bus_width(host, card, bus_width);
1656 if (mmc_return)
1657 {
1658 dprintf(CRITICAL, "Failed to set bus width for the card\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001659 return mmc_return;
1660 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001661
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001662 /* Set bit SDR bus width in controller */
1663 mmc_return = sdhci_set_bus_width(host, bus_width);
1664 if (mmc_return)
1665 {
1666 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001667 return mmc_return;
1668 }
1669 }
1670
1671
Channagoud Kadabi96c629e2013-09-10 14:21:30 -07001672 card->block_size = MMC_BLK_SZ;
1673
Channagoud Kadabifaf20f62014-10-21 22:22:37 -07001674 /* Enable RST_n_FUNCTION */
1675 if (!card->ext_csd[MMC_EXT_CSD_RST_N_FUNC])
1676 {
1677 mmc_return = mmc_switch_cmd(host, card, MMC_SET_BIT, MMC_EXT_CSD_RST_N_FUNC, RST_N_FUNC_ENABLE);
1678
1679 if (mmc_return)
1680 {
1681 dprintf(CRITICAL, "Failed to enable RST_n_FUNCTION\n");
1682 return mmc_return;
1683 }
1684 }
1685
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001686 return mmc_return;
1687}
1688
1689/*
1690 * Function: mmc display csd
1691 * Arg : None
1692 * Return : None
1693 * Flow : Displays the csd information
1694 */
1695static void mmc_display_csd(struct mmc_card *card)
1696{
1697 dprintf(SPEW, "erase_grpsize: %d\n", card->csd.erase_grp_size);
1698 dprintf(SPEW, "erase_grpmult: %d\n", card->csd.erase_grp_mult);
1699 dprintf(SPEW, "wp_grpsize: %d\n", card->csd.wp_grp_size);
1700 dprintf(SPEW, "wp_grpen: %d\n", card->csd.wp_grp_enable);
1701 dprintf(SPEW, "perm_wp: %d\n", card->csd.perm_wp);
1702 dprintf(SPEW, "temp_wp: %d\n", card->csd.temp_wp);
1703}
1704
1705/*
1706 * Function: mmc_init
1707 * Arg : MMC configuration data
1708 * Return : Pointer to mmc device
1709 * Flow : Entry point to MMC boot process
1710 * Initialize the sd host controller
1711 * Initialize the mmc card
1712 * Set the clock & high speed mode
1713 */
1714struct mmc_device *mmc_init(struct mmc_config_data *data)
1715{
1716 uint8_t mmc_ret = 0;
1717 struct mmc_device *dev;
1718
1719 dev = (struct mmc_device *) malloc (sizeof(struct mmc_device));
1720
1721 if (!dev) {
1722 dprintf(CRITICAL, "Error allocating mmc device\n");
1723 return NULL;
1724 }
1725
1726 ASSERT(data);
1727
1728 memcpy((void*)&dev->config, (void*)data, sizeof(struct mmc_config_data));
1729
1730 memset((struct mmc_card *)&dev->card, 0, sizeof(struct mmc_card));
1731
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001732 /* Initialize the host & clock */
1733 dprintf(SPEW, " Initializing MMC host data structure and clock!\n");
1734
1735 mmc_ret = mmc_host_init(dev);
1736 if (mmc_ret) {
1737 dprintf(CRITICAL, "Error Initializing MMC host : %u\n", mmc_ret);
1738 return NULL;
1739 }
1740
1741 /* Initialize and identify cards connected to host */
1742 mmc_ret = mmc_card_init(dev);
1743 if (mmc_ret) {
1744 dprintf(CRITICAL, "Failed detecting MMC/SDC @ slot%d\n",
1745 dev->config.slot);
1746 return NULL;
1747 }
1748
1749 dprintf(INFO, "Done initialization of the card\n");
1750
1751 mmc_display_csd(&dev->card);
1752
1753 return dev;
1754}
1755
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001756static uint32_t mmc_parse_response(uint32_t resp)
1757{
1758 /* Trying to write beyond card capacity */
1759 if (resp & MMC_R1_ADDR_OUT_OF_RANGE) {
1760 dprintf(CRITICAL, "Attempting to read or write beyond the Device capacity\n");
1761 return 1;
1762 }
1763
1764 /* Misaligned address not matching block length */
1765 if (resp & MMC_R1_ADDR_ERR) {
1766 dprintf(CRITICAL, "The misaligned address did not match the block length used\n");
1767 return 1;
1768 }
1769
1770 /* Invalid block length */
1771 if (resp & MMC_R1_BLOCK_LEN_ERR) {
1772 dprintf(CRITICAL, "The transferred bytes does not match the block length\n");
1773 return 1;
1774 }
1775
1776 /* Tried to program write protected block */
1777 if (resp & MMC_R1_WP_VIOLATION) {
1778 dprintf(CRITICAL, "Attempt to program a write protected block\n");
1779 return 1;
1780 }
1781
1782 /* card controller error */
1783 if (resp & MMC_R1_CC_ERROR) {
1784 dprintf(CRITICAL, "Device error occurred, which is not related to the host command\n");
1785 return 1;
1786 }
1787
1788 /* Generic error */
1789 if (resp & MMC_R1_GENERIC_ERR) {
1790 dprintf(CRITICAL, "A generic Device error\n");
1791 return 1;
1792 }
1793
1794 /* Finally check for card in TRAN state */
1795 if (MMC_CARD_STATUS(resp) != MMC_TRAN_STATE) {
1796 dprintf(CRITICAL, "MMC card is not in TRAN state\n");
1797 return 1;
1798 }
1799
1800 return 0;
1801}
1802
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001803static uint32_t mmc_stop_command(struct mmc_device *dev)
1804{
1805 struct mmc_command cmd;
1806 uint32_t mmc_ret = 0;
1807
1808 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1809
1810 cmd.cmd_index = CMD12_STOP_TRANSMISSION;
1811 cmd.argument = (dev->card.rca << 16);
1812 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1813 cmd.resp_type = SDHCI_CMD_RESP_R1;
1814
1815 mmc_ret = sdhci_send_command(&dev->host, &cmd);
1816 if(mmc_ret)
1817 {
1818 dprintf(CRITICAL, "Failed to send stop command\n");
1819 return mmc_ret;
1820 }
1821
1822 /* Response contains 32 bit Card status.
1823 * Parse the errors & provide relevant information */
1824
1825 return mmc_parse_response(cmd.resp[0]);
1826}
1827
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001828/*
1829 * Function: mmc sdhci read
1830 * Arg : mmc device structure, block address, number of blocks & destination
1831 * Return : 0 on Success, non zero on success
1832 * Flow : Fill in the command structure & send the command
1833 */
1834uint32_t mmc_sdhci_read(struct mmc_device *dev, void *dest,
1835 uint64_t blk_addr, uint32_t num_blocks)
1836{
1837 uint32_t mmc_ret = 0;
1838 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001839 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001840
1841 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1842
1843 /* CMD17/18 Format:
1844 * [31:0] Data Address
1845 */
1846 if (num_blocks == 1)
1847 cmd.cmd_index = CMD17_READ_SINGLE_BLOCK;
1848 else
1849 cmd.cmd_index = CMD18_READ_MULTIPLE_BLOCK;
1850
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001851 /*
1852 * Standard emmc cards use byte mode addressing
1853 * convert the block address to byte address before
1854 * sending the command
1855 */
1856 if (card->type == MMC_TYPE_STD_MMC)
1857 cmd.argument = blk_addr * card->block_size;
1858 else
1859 cmd.argument = blk_addr;
1860
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001861 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1862 cmd.resp_type = SDHCI_CMD_RESP_R1;
1863 cmd.trans_mode = SDHCI_MMC_READ;
1864 cmd.data_present = 0x1;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001865
1866 /* Use CMD23 If card supports CMD23:
1867 * For SD card use the value read from SCR register
1868 * For emmc by default use CMD23.
1869 * Also as per SDCC spec always use CMD23 to stop
1870 * multiblock read/write if UHS (Ultra High Speed) is
1871 * enabled
1872 */
1873 if (MMC_CARD_SD(card))
1874 cmd.cmd23_support = dev->card.scr.cmd23_support;
1875 else
1876 cmd.cmd23_support = 0x1;
1877
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001878 cmd.data.data_ptr = dest;
1879 cmd.data.num_blocks = num_blocks;
1880
1881 /* send command */
1882 mmc_ret = sdhci_send_command(&dev->host, &cmd);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001883
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001884 /* For multi block read failures send stop command */
1885 if (mmc_ret && num_blocks > 1)
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001886 {
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001887 return mmc_stop_command(dev);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001888 }
1889
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001890 /*
1891 * Response contains 32 bit Card status.
1892 * Parse the errors & provide relevant information
1893 */
1894 return mmc_parse_response(cmd.resp[0]);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001895}
1896
1897/*
1898 * Function: mmc sdhci write
1899 * Arg : mmc device structure, block address, number of blocks & source
1900 * Return : 0 on Success, non zero on success
1901 * Flow : Fill in the command structure & send the command
1902 */
1903uint32_t mmc_sdhci_write(struct mmc_device *dev, void *src,
1904 uint64_t blk_addr, uint32_t num_blocks)
1905{
1906 uint32_t mmc_ret = 0;
1907 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001908 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001909
1910 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1911
1912 /* CMD24/25 Format:
1913 * [31:0] Data Address
1914 */
1915
1916 if (num_blocks == 1)
1917 cmd.cmd_index = CMD24_WRITE_SINGLE_BLOCK;
1918 else
1919 cmd.cmd_index = CMD25_WRITE_MULTIPLE_BLOCK;
1920
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001921 /*
1922 * Standard emmc cards use byte mode addressing
1923 * convert the block address to byte address before
1924 * sending the command
1925 */
1926 if (card->type == MMC_TYPE_STD_MMC)
1927 cmd.argument = blk_addr * card->block_size;
1928 else
1929 cmd.argument = blk_addr;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001930 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1931 cmd.resp_type = SDHCI_CMD_RESP_R1;
1932 cmd.trans_mode = SDHCI_MMC_WRITE;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001933
1934 /* Use CMD23 If card supports CMD23:
1935 * For SD card use the value read from SCR register
1936 * For emmc by default use CMD23.
1937 * Also as per SDCC spec always use CMD23 to stop
1938 * multiblock read/write if UHS (Ultra High Speed) is
1939 * enabled
1940 */
1941 if (MMC_CARD_SD(card))
1942 cmd.cmd23_support = dev->card.scr.cmd23_support;
1943 else
1944 cmd.cmd23_support = 0x1;
1945
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001946 cmd.data_present = 0x1;
1947 cmd.data.data_ptr = src;
1948 cmd.data.num_blocks = num_blocks;
1949
1950 /* send command */
1951 mmc_ret = sdhci_send_command(&dev->host, &cmd);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001952
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001953 /* For multi block write failures send stop command */
1954 if (mmc_ret && num_blocks > 1)
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001955 {
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001956 return mmc_stop_command(dev);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001957 }
1958
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001959 /*
1960 * Response contains 32 bit Card status.
1961 * Parse the errors & provide relevant information
1962 */
1963 return mmc_parse_response(cmd.resp[0]);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001964}
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001965
1966/*
1967 * Send the erase group start address using CMD35
1968 */
1969static uint32_t mmc_send_erase_grp_start(struct mmc_device *dev, uint32_t erase_start)
1970{
1971 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001972 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001973
1974 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1975
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001976 if (MMC_CARD_MMC(card))
1977 cmd.cmd_index = CMD35_ERASE_GROUP_START;
1978 else
1979 cmd.cmd_index = CMD32_ERASE_WR_BLK_START;
1980
vijay kumar1129e4e2014-03-28 11:24:48 +05301981 /*
1982 * Standard emmc cards use byte mode addressing
1983 * convert the block address to byte address before
1984 * sending the command
1985 */
1986 if (card->type == MMC_TYPE_STD_MMC)
1987 cmd.argument = erase_start * card->block_size;
1988 else
1989 cmd.argument = erase_start;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001990 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1991 cmd.resp_type = SDHCI_CMD_RESP_R1;
1992
1993 /* send command */
1994 if (sdhci_send_command(&dev->host, &cmd))
1995 return 1;
1996
1997 /*
1998 * CMD35 on failure returns address out of range error
1999 */
2000 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2001 {
2002 dprintf(CRITICAL, "Address for CMD35 is out of range\n");
2003 return 1;
2004 }
2005
2006 return 0;
2007}
2008
2009/*
2010 * Send the erase group end address using CMD36
2011 */
2012static uint32_t mmc_send_erase_grp_end(struct mmc_device *dev, uint32_t erase_end)
2013{
2014 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002015 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002016
2017 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2018
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002019 if (MMC_CARD_MMC(card))
2020 cmd.cmd_index = CMD36_ERASE_GROUP_END;
2021 else
2022 cmd.cmd_index = CMD33_ERASE_WR_BLK_END;
2023
vijay kumar1129e4e2014-03-28 11:24:48 +05302024 /*
2025 * Standard emmc cards use byte mode addressing
2026 * convert the block address to byte address before
2027 * sending the command
2028 */
2029 if (card->type == MMC_TYPE_STD_MMC)
2030 cmd.argument = erase_end * card->block_size;
2031 else
2032 cmd.argument = erase_end;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002033 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2034 cmd.resp_type = SDHCI_CMD_RESP_R1;
2035
2036 /* send command */
2037 if (sdhci_send_command(&dev->host, &cmd))
2038 return 1;
2039
2040 /*
2041 * CMD3 on failure returns address out of range error
2042 */
2043 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2044 {
2045 dprintf(CRITICAL, "Address for CMD36 is out of range\n");
2046 return 1;
2047 }
2048
2049 return 0;
2050}
2051
2052/*
2053 * Send the erase CMD38, to erase the selected erase groups
2054 */
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002055static uint32_t mmc_send_erase(struct mmc_device *dev, uint64_t erase_timeout)
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002056{
2057 struct mmc_command cmd;
2058 uint32_t status;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002059 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002060
2061 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2062
2063 cmd.cmd_index = CMD38_ERASE;
2064 cmd.argument = 0x00000000;
2065 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2066 cmd.resp_type = SDHCI_CMD_RESP_R1B;
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002067 cmd.cmd_timeout = erase_timeout;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002068
2069 /* send command */
2070 if (sdhci_send_command(&dev->host, &cmd))
2071 return 1;
2072
2073 do
2074 {
2075 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2076 {
2077 dprintf(CRITICAL, "Failed to get card status after erase\n");
2078 return 1;
2079 }
2080 /* Check if the response of erase command has eras skip status set */
2081 if (status & MMC_R1_WP_ERASE_SKIP)
2082 dprintf(CRITICAL, "Write Protect set for the region, only partial space was erased\n");
2083
2084 retry++;
2085 udelay(1000);
2086 if (retry == MMC_MAX_CARD_STAT_RETRY)
2087 {
2088 dprintf(CRITICAL, "Card status check timed out after sending erase command\n");
2089 return 1;
2090 }
2091 } while(!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2092
2093
2094 return 0;
2095}
2096
2097
2098/*
2099 * Function: mmc sdhci erase
2100 * Arg : mmc device structure, block address and length
2101 * Return : 0 on Success, non zero on failure
2102 * Flow : Fill in the command structure & send the command
2103 */
2104uint32_t mmc_sdhci_erase(struct mmc_device *dev, uint32_t blk_addr, uint64_t len)
2105{
2106 uint32_t erase_unit_sz = 0;
2107 uint32_t erase_start;
2108 uint32_t erase_end;
2109 uint32_t blk_end;
2110 uint32_t num_erase_grps;
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002111 uint64_t erase_timeout = 0;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002112 struct mmc_card *card;
2113
2114
2115 card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002116
2117 /*
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002118 * Calculate the erase unit size,
2119 * 1. Based on emmc 4.5 spec for emmc card
2120 * 2. Use SD Card Status info for SD cards
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002121 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002122 if (MMC_CARD_MMC(card))
2123 {
2124 /*
2125 * Calculate the erase unit size as per the emmc specification v4.5
2126 */
2127 if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
2128 erase_unit_sz = (MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE]) / MMC_BLK_SZ;
2129 else
2130 erase_unit_sz = (dev->card.csd.erase_grp_size + 1) * (dev->card.csd.erase_grp_mult + 1);
2131 }
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002132 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002133 erase_unit_sz = dev->card.ssr.au_size * dev->card.ssr.num_aus;
2134
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002135
2136 /* Convert length in blocks */
2137 len = len / MMC_BLK_SZ;
2138
2139 if (len < erase_unit_sz)
2140 {
2141 dprintf(CRITICAL, "Requested length is less than min erase group size\n");
2142 return 1;
2143 }
2144
2145 /* Calculate erase groups based on the length in blocks */
2146 num_erase_grps = len / erase_unit_sz;
2147
2148 /* Start address of the erase range */
2149 erase_start = blk_addr;
2150
2151 /* Last address of the erase range */
2152 erase_end = blk_addr + ((num_erase_grps - 1) * erase_unit_sz);
2153
2154 /* Boundary check for overlap */
2155 blk_end = blk_addr + len;
2156
2157 if (erase_end > blk_end)
2158 {
2159 dprintf(CRITICAL, "The erase group overlaps the max requested for erase\n");
2160 erase_end -= erase_unit_sz;
2161 }
2162
2163 /* Send CMD35 for erase group start */
2164 if (mmc_send_erase_grp_start(dev, erase_start))
2165 {
2166 dprintf(CRITICAL, "Failed to send erase grp start address\n");
2167 return 1;
2168 }
2169
2170 /* Send CMD36 for erase group end */
2171 if (mmc_send_erase_grp_end(dev, erase_end))
2172 {
2173 dprintf(CRITICAL, "Failed to send erase grp end address\n");
2174 return 1;
2175 }
2176
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002177 /*
2178 * As per emmc 4.5 spec section 7.4.27, calculate the erase timeout
Channagoud Kadabi7491e6c2014-12-02 15:42:11 -08002179 * erase_timeout = 300ms * ERASE_TIMEOUT_MULT * num_erase_grps
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002180 */
Channagoud Kadabi7491e6c2014-12-02 15:42:11 -08002181 erase_timeout = (300 * 1000 * card->ext_csd[MMC_ERASE_TIMEOUT_MULT] * num_erase_grps);
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002182
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002183 /* Send CMD38 to perform erase */
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002184 if (mmc_send_erase(dev, erase_timeout))
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002185 {
2186 dprintf(CRITICAL, "Failed to erase the specified partition\n");
2187 return 1;
2188 }
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002189
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002190 return 0;
2191}
2192
2193/*
2194 * Function: mmc get wp status
2195 * Arg : mmc device structure, block address and buffer for getting wp status
2196 * Return : 0 on Success, 1 on Failure
2197 * Flow : Get the WP group status by sending CMD31
2198 */
2199uint32_t mmc_get_wp_status(struct mmc_device *dev, uint32_t addr, uint8_t *wp_status)
2200{
2201 struct mmc_command cmd;
2202
2203 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2204
2205 cmd.cmd_index = CMD31_SEND_WRITE_PROT_TYPE;
2206 cmd.argument = addr;
2207 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2208 cmd.resp_type = SDHCI_CMD_RESP_R1;
2209 cmd.trans_mode = SDHCI_MMC_READ;
2210 cmd.data_present = 0x1;
2211 cmd.data.data_ptr = wp_status;
2212 cmd.data.num_blocks = 0x1;
2213 cmd.data.blk_sz = 0x8;
2214
2215 if (sdhci_send_command(&dev->host, &cmd))
2216 {
2217 dprintf(CRITICAL, "Failed to get status of write protect bits\n");
2218 return 1;
2219 }
2220
2221 return 0;
2222}
2223
2224/*
2225 * Function: mmc set/clear WP on user area
2226 * Arg : mmc device structure, block address,len, & flag to set or clear
2227 * Return : 0 on success, 1 on failure
2228 * Flow : Function to set/clear power on write protect on user area
2229 */
2230
2231uint32_t mmc_set_clr_power_on_wp_user(struct mmc_device *dev, uint32_t addr, uint64_t len, uint8_t set_clr)
2232{
2233 struct mmc_command cmd;
vijay kumar7420baa2014-05-02 12:01:49 +05302234 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002235 uint32_t wp_grp_size;
2236 uint32_t status;
2237 uint32_t num_wp_grps;
2238 uint32_t ret;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002239 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002240 uint32_t i;
2241
2242 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2243
2244 /* Convert len into blocks */
2245 len = len / MMC_BLK_SZ;
vijay kumar697dbfd2014-04-24 17:12:49 +05302246 wp_grp_size = dev->card.wp_grp_size;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002247
2248 /* Disable PERM WP */
2249 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PERM_WP_DIS);
2250
2251 if (ret)
2252 {
2253 dprintf(CRITICAL, "Failed to Disable PERM WP\n");
2254 return ret;
2255 }
2256
2257 /* Read the default values for user WP */
2258 ret = mmc_get_ext_csd(&dev->host, &dev->card);
2259
2260 if (ret)
2261 {
2262 dprintf(CRITICAL, "Failed to read ext csd for the card\n");
2263 return ret;
2264 }
2265
2266 /* Check if user power on WP is disabled or perm WP is enabled */
2267 if ((dev->card.ext_csd[MMC_USR_WP] & MMC_US_PWR_WP_DIS)
2268 || (dev->card.ext_csd[MMC_USR_WP] & MMC_US_PERM_WP_EN))
2269 {
2270 dprintf(CRITICAL, "Power on protection is disabled, cannot be set\n");
2271 return 1;
2272 }
2273
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002274 if (len < wp_grp_size)
2275 {
2276 dprintf(CRITICAL, "Length is less than min WP size, WP was not set\n");
2277 return 1;
2278 }
2279
2280 /* Set power on USER WP */
2281 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PWR_WP_EN);
2282
2283 if (ret)
2284 {
2285 dprintf(CRITICAL, "Failed to set power on WP for user\n");
2286 return ret;
2287 }
2288
2289 num_wp_grps = ROUNDUP(len, wp_grp_size) / wp_grp_size;
2290
2291 if (set_clr)
2292 cmd.cmd_index = CMD28_SET_WRITE_PROTECT;
2293 else
2294 cmd.cmd_index = CMD29_CLEAR_WRITE_PROTECT;
2295
2296 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2297 cmd.resp_type = SDHCI_CMD_RESP_R1B;
2298
2299 for(i = 0; i < num_wp_grps; i++)
2300 {
vijay kumar7420baa2014-05-02 12:01:49 +05302301 /*
2302 * Standard emmc cards use byte mode addressing
2303 * convert the block address to byte address before
2304 * sending the command
2305 */
2306 if (card->type == MMC_TYPE_STD_MMC)
2307 cmd.argument = (addr + (i * wp_grp_size)) * card->block_size;
2308 else
2309 cmd.argument = addr + (i * wp_grp_size);
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002310
2311 if (sdhci_send_command(&dev->host, &cmd))
2312 return 1;
2313
2314 /* CMD28/CMD29 On failure returns address out of range error */
2315 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2316 {
2317 dprintf(CRITICAL, "Address for CMD28/29 is out of range\n");
2318 return 1;
2319 }
2320
2321 /* Check the card status */
2322 do
2323 {
2324 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2325 {
2326 dprintf(CRITICAL, "Failed to get card status afterapplying write protect\n");
2327 return 1;
2328 }
2329
2330 /* Time out for WP command */
2331 retry++;
2332 udelay(1000);
2333 if (retry == MMC_MAX_CARD_STAT_RETRY)
2334 {
2335 dprintf(CRITICAL, "Card status timed out after sending write protect command\n");
2336 return 1;
2337 }
2338 } while (!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2339
2340 }
2341
2342 return 0;
2343}
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002344
2345/* Function to put the mmc card to sleep */
2346void mmc_put_card_to_sleep(struct mmc_device *dev)
2347{
2348 struct mmc_command cmd = {0};
2349 struct mmc_card *card = &dev->card;
2350
2351 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
2352 cmd.argument = 0x00000000;
2353 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2354 cmd.resp_type = SDHCI_CMD_RESP_NONE;
2355
2356 /* send command */
2357 if(sdhci_send_command(&dev->host, &cmd))
2358 {
2359 dprintf(CRITICAL, "card deselect error: %s\n", __func__);
2360 return;
2361 }
2362
2363 cmd.cmd_index = CMD5_SLEEP_AWAKE;
2364 cmd.argument = (card->rca << MMC_CARD_RCA_BIT) | MMC_CARD_SLEEP;
2365 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2366 cmd.resp_type = SDHCI_CMD_RESP_R1B;
2367
2368 /* send command */
2369 if(sdhci_send_command(&dev->host, &cmd))
2370 dprintf(CRITICAL, "card sleep error: %s\n", __func__);
2371}
Channagoud Kadabi31d648c2015-01-29 12:59:00 -08002372
2373/*
2374 * Switch the partition access type to rpmb or default
2375 */
2376static uint32_t mmc_sdhci_switch_part(struct mmc_device *dev, uint32_t type)
2377{
2378 uint32_t part_access;
2379 uint32_t ret;
2380
2381 /* Clear the partition access */
2382 part_access = dev->card.ext_csd[MMC_PARTITION_CONFIG] & ~PARTITION_ACCESS_MASK;
2383 part_access |= type;
2384
2385 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_ACCESS_WRITE, MMC_PARTITION_CONFIG, part_access);
2386
2387 if (ret)
2388 {
2389 dprintf(CRITICAL, "Failed to switch partition to type: %u\n", type);
2390 return 1;
2391 }
2392
2393 dev->card.ext_csd[MMC_PARTITION_CONFIG] = part_access;
2394 return 0;
2395}
2396
2397static uint32_t mmc_sdhci_set_blk_cnt(struct mmc_device *dev, uint32_t blk_cnt, uint32_t rel_write)
2398{
2399 struct mmc_command cmd = {0};
2400
2401 cmd.cmd_index = CMD23_SET_BLOCK_COUNT;
2402 cmd.argument = blk_cnt & 0x0000ffff;
2403 cmd.argument |= rel_write;
2404 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2405 cmd.resp_type = SDHCI_CMD_RESP_R1;
2406
2407 if (sdhci_send_command(&dev->host, &cmd))
2408 {
2409 dprintf(CRITICAL, "Set block count failed: %s\n", __func__);
2410 return 1;
2411 }
2412
2413 return 0;
2414}
2415
2416uint32_t mmc_sdhci_rpmb_send(struct mmc_device *dev, struct mmc_command *cmd)
2417{
2418 int i;
2419 uint32_t retry = 5;
2420 uint32_t status;
2421 uint32_t rel_write = 0;
2422 uint32_t ret = 1;
2423
2424 ASSERT(cmd);
2425
2426 /* 1. Set the partition type to rpmb */
2427 if (mmc_sdhci_switch_part(dev, PART_ACCESS_RPMB))
2428 return 1;
2429
2430 for (i = 0; i < MAX_RPMB_CMDS; i++)
2431 {
2432 if (!cmd[i].cmd_index)
2433 break;
2434
2435 if (cmd[i].write_flag == true)
2436 rel_write = BIT(31);
2437 else
2438 rel_write = 0;
2439
2440 /* 2. Set the block count using cmd23 */
2441 if (mmc_sdhci_set_blk_cnt(dev, cmd[i].data.num_blocks, rel_write))
2442 goto err;
2443
2444 /* 3. Send the command */
2445 if (sdhci_send_command(&dev->host, &cmd[i]))
2446 goto err;
2447 do
2448 {
2449 /* 4. Poll for card status to ensure rpmb operation completeness */
2450 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2451 {
2452 dprintf(CRITICAL, "Failed to get card status after rpmb operations\n");
2453 goto err;
2454 }
2455
2456 retry--;
2457 udelay(500);
2458 if (!retry)
2459 {
2460 dprintf(CRITICAL, "Card status check timed out after rpmb operations\n");
2461 goto err;
2462 }
2463 } while(!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2464 }
2465
2466 /* If we reach here, that means success */
2467 ret = 0;
2468
2469err:
2470 /* 5. Switch the partition back to default type */
2471 if (mmc_sdhci_switch_part(dev, PART_ACCESS_DEFAULT))
2472 ret = 1;
2473
2474 return ret;
2475}