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Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#ifndef __VIDC_HFI_API_H__
15#define __VIDC_HFI_API_H__
16
17#include <linux/log2.h>
18#include <linux/platform_device.h>
19#include <linux/types.h>
Maheshwar Ajjac6407c02017-06-09 18:53:20 -070020#include <linux/errno.h>
21#include <linux/hash.h>
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -080022#include <media/msm_vidc.h>
23#include "msm_vidc_resources.h"
24
Chinmay Sawarkarcbd3f592017-04-10 15:42:30 -070025#define CONTAINS(__a, __sz, __t) (\
26 (__t >= __a) && \
27 (__t < __a + __sz) \
28)
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -080029
Chinmay Sawarkarcbd3f592017-04-10 15:42:30 -070030#define OVERLAPS(__t, __tsz, __a, __asz) (\
31 (__t <= __a) && \
32 (__t + __tsz >= __a + __asz) \
33)
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -080034
35#define HAL_BUFFERFLAG_EOS 0x00000001
36#define HAL_BUFFERFLAG_STARTTIME 0x00000002
37#define HAL_BUFFERFLAG_DECODEONLY 0x00000004
38#define HAL_BUFFERFLAG_DATACORRUPT 0x00000008
39#define HAL_BUFFERFLAG_ENDOFFRAME 0x00000010
40#define HAL_BUFFERFLAG_SYNCFRAME 0x00000020
41#define HAL_BUFFERFLAG_EXTRADATA 0x00000040
42#define HAL_BUFFERFLAG_CODECCONFIG 0x00000080
43#define HAL_BUFFERFLAG_TIMESTAMPINVALID 0x00000100
44#define HAL_BUFFERFLAG_READONLY 0x00000200
45#define HAL_BUFFERFLAG_ENDOFSUBFRAME 0x00000400
46#define HAL_BUFFERFLAG_EOSEQ 0x00200000
47#define HAL_BUFFERFLAG_MBAFF 0x08000000
48#define HAL_BUFFERFLAG_YUV_601_709_CSC_CLAMP 0x10000000
49#define HAL_BUFFERFLAG_DROP_FRAME 0x20000000
50#define HAL_BUFFERFLAG_TS_DISCONTINUITY 0x40000000
51#define HAL_BUFFERFLAG_TS_ERROR 0x80000000
52
53
54
55#define HAL_DEBUG_MSG_LOW 0x00000001
56#define HAL_DEBUG_MSG_MEDIUM 0x00000002
57#define HAL_DEBUG_MSG_HIGH 0x00000004
58#define HAL_DEBUG_MSG_ERROR 0x00000008
59#define HAL_DEBUG_MSG_FATAL 0x00000010
60#define MAX_PROFILE_COUNT 16
61
62#define HAL_MAX_MATRIX_COEFFS 9
63#define HAL_MAX_BIAS_COEFFS 3
64#define HAL_MAX_LIMIT_COEFFS 6
65#define VENUS_VERSION_LENGTH 128
66
67/* 16 encoder and 16 decoder sessions */
68#define VIDC_MAX_SESSIONS 32
69
70enum vidc_status {
71 VIDC_ERR_NONE = 0x0,
72 VIDC_ERR_FAIL = 0x80000000,
73 VIDC_ERR_ALLOC_FAIL,
74 VIDC_ERR_ILLEGAL_OP,
75 VIDC_ERR_BAD_PARAM,
76 VIDC_ERR_BAD_HANDLE,
77 VIDC_ERR_NOT_SUPPORTED,
78 VIDC_ERR_BAD_STATE,
79 VIDC_ERR_MAX_CLIENTS,
80 VIDC_ERR_IFRAME_EXPECTED,
81 VIDC_ERR_HW_FATAL,
82 VIDC_ERR_BITSTREAM_ERR,
83 VIDC_ERR_INDEX_NOMORE,
84 VIDC_ERR_SEQHDR_PARSE_FAIL,
85 VIDC_ERR_INSUFFICIENT_BUFFER,
86 VIDC_ERR_BAD_POWER_STATE,
87 VIDC_ERR_NO_VALID_SESSION,
88 VIDC_ERR_TIMEOUT,
89 VIDC_ERR_CMDQFULL,
90 VIDC_ERR_START_CODE_NOT_FOUND,
91 VIDC_ERR_CLIENT_PRESENT = 0x90000001,
92 VIDC_ERR_CLIENT_FATAL,
93 VIDC_ERR_CMD_QUEUE_FULL,
94 VIDC_ERR_UNUSED = 0x10000000
95};
96
97enum hal_extradata_id {
98 HAL_EXTRADATA_NONE,
99 HAL_EXTRADATA_MB_QUANTIZATION,
100 HAL_EXTRADATA_INTERLACE_VIDEO,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800101 HAL_EXTRADATA_TIMESTAMP,
102 HAL_EXTRADATA_S3D_FRAME_PACKING,
103 HAL_EXTRADATA_FRAME_RATE,
104 HAL_EXTRADATA_PANSCAN_WINDOW,
105 HAL_EXTRADATA_RECOVERY_POINT_SEI,
106 HAL_EXTRADATA_MULTISLICE_INFO,
107 HAL_EXTRADATA_INDEX,
108 HAL_EXTRADATA_NUM_CONCEALED_MB,
109 HAL_EXTRADATA_METADATA_FILLER,
110 HAL_EXTRADATA_ASPECT_RATIO,
111 HAL_EXTRADATA_MPEG2_SEQDISP,
112 HAL_EXTRADATA_STREAM_USERDATA,
113 HAL_EXTRADATA_FRAME_QP,
114 HAL_EXTRADATA_FRAME_BITS_INFO,
115 HAL_EXTRADATA_INPUT_CROP,
116 HAL_EXTRADATA_DIGITAL_ZOOM,
117 HAL_EXTRADATA_LTR_INFO,
118 HAL_EXTRADATA_METADATA_MBI,
119 HAL_EXTRADATA_VQZIP_SEI,
120 HAL_EXTRADATA_YUV_STATS,
121 HAL_EXTRADATA_ROI_QP,
122 HAL_EXTRADATA_OUTPUT_CROP,
123 HAL_EXTRADATA_MASTERING_DISPLAY_COLOUR_SEI,
124 HAL_EXTRADATA_CONTENT_LIGHT_LEVEL_SEI,
125 HAL_EXTRADATA_PQ_INFO,
126 HAL_EXTRADATA_VUI_DISPLAY_INFO,
127 HAL_EXTRADATA_VPX_COLORSPACE,
Praneeth Paladugua51b2c42017-06-23 12:48:06 -0700128 HAL_EXTRADATA_UBWC_CR_STATS_INFO,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800129};
130
131enum hal_property {
132 HAL_CONFIG_FRAME_RATE = 0x04000001,
133 HAL_PARAM_UNCOMPRESSED_FORMAT_SELECT,
134 HAL_PARAM_UNCOMPRESSED_PLANE_ACTUAL_CONSTRAINTS_INFO,
135 HAL_PARAM_UNCOMPRESSED_PLANE_ACTUAL_INFO,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800136 HAL_PARAM_INDEX_EXTRADATA,
137 HAL_PARAM_FRAME_SIZE,
138 HAL_CONFIG_REALTIME,
139 HAL_PARAM_BUFFER_COUNT_ACTUAL,
140 HAL_PARAM_BUFFER_SIZE_MINIMUM,
141 HAL_PARAM_NAL_STREAM_FORMAT_SELECT,
142 HAL_PARAM_VDEC_OUTPUT_ORDER,
143 HAL_PARAM_VDEC_PICTURE_TYPE_DECODE,
144 HAL_PARAM_VDEC_OUTPUT2_KEEP_ASPECT_RATIO,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800145 HAL_PARAM_VDEC_MULTI_STREAM,
146 HAL_PARAM_VDEC_DISPLAY_PICTURE_BUFFER_COUNT,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800147 HAL_CONFIG_VDEC_MB_ERROR_MAP_REPORTING,
148 HAL_PARAM_VDEC_CONTINUE_DATA_TRANSFER,
149 HAL_CONFIG_VDEC_MB_ERROR_MAP,
150 HAL_CONFIG_VENC_REQUEST_IFRAME,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800151 HAL_CONFIG_VENC_TARGET_BITRATE,
152 HAL_PARAM_PROFILE_LEVEL_CURRENT,
153 HAL_PARAM_VENC_H264_ENTROPY_CONTROL,
154 HAL_PARAM_VENC_RATE_CONTROL,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800155 HAL_PARAM_VENC_H264_DEBLOCK_CONTROL,
156 HAL_PARAM_VENC_TEMPORAL_SPATIAL_TRADEOFF,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800157 HAL_PARAM_VENC_SESSION_QP_RANGE,
158 HAL_CONFIG_VENC_INTRA_PERIOD,
159 HAL_CONFIG_VENC_IDR_PERIOD,
Chinmay Sawarkar582c72a2017-05-24 14:29:12 -0700160 HAL_PARAM_VPE_ROTATION,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800161 HAL_PARAM_VENC_INTRA_REFRESH,
162 HAL_PARAM_VENC_MULTI_SLICE_CONTROL,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800163 HAL_SYS_DEBUG_CONFIG,
164 HAL_CONFIG_BUFFER_REQUIREMENTS,
165 HAL_CONFIG_PRIORITY,
166 HAL_CONFIG_BATCH_INFO,
167 HAL_PARAM_METADATA_PASS_THROUGH,
168 HAL_SYS_IDLE_INDICATOR,
169 HAL_PARAM_UNCOMPRESSED_FORMAT_SUPPORTED,
170 HAL_PARAM_INTERLACE_FORMAT_SUPPORTED,
171 HAL_PARAM_CHROMA_SITE,
172 HAL_PARAM_PROPERTIES_SUPPORTED,
173 HAL_PARAM_PROFILE_LEVEL_SUPPORTED,
174 HAL_PARAM_CAPABILITY_SUPPORTED,
175 HAL_PARAM_NAL_STREAM_FORMAT_SUPPORTED,
176 HAL_PARAM_MULTI_VIEW_FORMAT,
177 HAL_PARAM_MAX_SEQUENCE_HEADER_SIZE,
178 HAL_PARAM_CODEC_SUPPORTED,
179 HAL_PARAM_VDEC_MULTI_VIEW_SELECT,
180 HAL_PARAM_VDEC_MB_QUANTIZATION,
181 HAL_PARAM_VDEC_NUM_CONCEALED_MB,
182 HAL_PARAM_VDEC_H264_ENTROPY_SWITCHING,
183 HAL_PARAM_VENC_SLICE_DELIVERY_MODE,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800184 HAL_CONFIG_BUFFER_COUNT_ACTUAL,
185 HAL_CONFIG_VDEC_MULTI_STREAM,
186 HAL_PARAM_VENC_MULTI_SLICE_INFO,
187 HAL_CONFIG_VENC_TIMESTAMP_SCALE,
188 HAL_PARAM_VENC_SYNC_FRAME_SEQUENCE_HEADER,
189 HAL_PARAM_VDEC_SYNC_FRAME_DECODE,
190 HAL_PARAM_VENC_H264_ENTROPY_CABAC_MODEL,
191 HAL_CONFIG_VENC_MAX_BITRATE,
Chinmay Sawarkard0054622017-05-04 13:50:59 -0700192 HAL_PARAM_VENC_VUI_TIMING_INFO,
Umesh Pandey7fce7ee2017-03-13 17:59:48 -0700193 HAL_PARAM_VENC_GENERATE_AUDNAL,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800194 HAL_PARAM_BUFFER_ALLOC_MODE,
195 HAL_PARAM_VDEC_FRAME_ASSEMBLY,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800196 HAL_PARAM_VENC_PRESERVE_TEXT_QUALITY,
197 HAL_PARAM_VDEC_CONCEAL_COLOR,
198 HAL_PARAM_VDEC_SCS_THRESHOLD,
199 HAL_PARAM_GET_BUFFER_REQUIREMENTS,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800200 HAL_PARAM_VENC_LTRMODE,
201 HAL_CONFIG_VENC_MARKLTRFRAME,
202 HAL_CONFIG_VENC_USELTRFRAME,
203 HAL_CONFIG_VENC_LTRPERIOD,
204 HAL_CONFIG_VENC_HIER_P_NUM_FRAMES,
205 HAL_PARAM_VENC_HIER_P_MAX_ENH_LAYERS,
206 HAL_PARAM_VENC_DISABLE_RC_TIMESTAMP,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800207 HAL_PARAM_VENC_SEARCH_RANGE,
208 HAL_PARAM_VPE_COLOR_SPACE_CONVERSION,
209 HAL_PARAM_VENC_VPX_ERROR_RESILIENCE_MODE,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800210 HAL_CONFIG_VENC_PERF_MODE,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800211 HAL_PARAM_VDEC_NON_SECURE_OUTPUT2,
212 HAL_PARAM_VENC_HIER_P_HYBRID_MODE,
213 HAL_PARAM_VENC_MBI_STATISTICS_MODE,
214 HAL_PARAM_SYNC_BASED_INTERRUPT,
215 HAL_CONFIG_VENC_FRAME_QP,
216 HAL_CONFIG_VENC_BASELAYER_PRIORITYID,
217 HAL_PARAM_VENC_VQZIP_SEI,
218 HAL_PROPERTY_PARAM_VENC_ASPECT_RATIO,
219 HAL_CONFIG_VDEC_ENTROPY,
220 HAL_PARAM_VENC_BITRATE_TYPE,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800221 HAL_PARAM_VENC_LOW_LATENCY,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800222 HAL_CONFIG_VENC_BLUR_RESOLUTION,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800223 HAL_PARAM_VENC_H264_TRANSFORM_8x8,
224 HAL_PARAM_VENC_VIDEO_SIGNAL_INFO,
225 HAL_PARAM_VENC_IFRAMESIZE_TYPE,
Praneeth Paladugu238977b2016-12-06 12:51:26 -0800226 HAL_PARAM_VIDEO_CORES_USAGE,
227 HAL_PARAM_VIDEO_WORK_MODE,
Karthikeyan Periasamya0e4bad2017-04-26 12:51:10 -0700228 HAL_PARAM_SECURE,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800229};
230
231enum hal_domain {
232 HAL_VIDEO_DOMAIN_VPE,
233 HAL_VIDEO_DOMAIN_ENCODER,
234 HAL_VIDEO_DOMAIN_DECODER,
235 HAL_UNUSED_DOMAIN = 0x10000000,
236};
237
238enum multi_stream {
239 HAL_VIDEO_DECODER_NONE = 0x00000000,
240 HAL_VIDEO_DECODER_PRIMARY = 0x00000001,
241 HAL_VIDEO_DECODER_SECONDARY = 0x00000002,
242 HAL_VIDEO_DECODER_BOTH_OUTPUTS = 0x00000004,
243 HAL_VIDEO_UNUSED_OUTPUTS = 0x10000000,
244};
245
246enum hal_core_capabilities {
247 HAL_VIDEO_ENCODER_ROTATION_CAPABILITY = 0x00000001,
248 HAL_VIDEO_ENCODER_SCALING_CAPABILITY = 0x00000002,
249 HAL_VIDEO_ENCODER_DEINTERLACE_CAPABILITY = 0x00000004,
250 HAL_VIDEO_DECODER_MULTI_STREAM_CAPABILITY = 0x00000008,
251 HAL_VIDEO_UNUSED_CAPABILITY = 0x10000000,
252};
253
254enum hal_default_properties {
255 HAL_VIDEO_DYNAMIC_BUF_MODE = 0x00000001,
256 HAL_VIDEO_CONTINUE_DATA_TRANSFER = 0x00000002,
257};
258
259enum hal_video_codec {
260 HAL_VIDEO_CODEC_UNKNOWN = 0x00000000,
261 HAL_VIDEO_CODEC_MVC = 0x00000001,
262 HAL_VIDEO_CODEC_H264 = 0x00000002,
263 HAL_VIDEO_CODEC_H263 = 0x00000004,
264 HAL_VIDEO_CODEC_MPEG1 = 0x00000008,
265 HAL_VIDEO_CODEC_MPEG2 = 0x00000010,
266 HAL_VIDEO_CODEC_MPEG4 = 0x00000020,
267 HAL_VIDEO_CODEC_DIVX_311 = 0x00000040,
268 HAL_VIDEO_CODEC_DIVX = 0x00000080,
269 HAL_VIDEO_CODEC_VC1 = 0x00000100,
270 HAL_VIDEO_CODEC_SPARK = 0x00000200,
271 HAL_VIDEO_CODEC_VP6 = 0x00000400,
272 HAL_VIDEO_CODEC_VP7 = 0x00000800,
273 HAL_VIDEO_CODEC_VP8 = 0x00001000,
274 HAL_VIDEO_CODEC_HEVC = 0x00002000,
275 HAL_VIDEO_CODEC_VP9 = 0x00004000,
Surajit Poddere502daa2017-05-30 19:17:45 +0530276 HAL_VIDEO_CODEC_TME = 0x00008000,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800277 HAL_VIDEO_CODEC_HEVC_HYBRID = 0x80000000,
278 HAL_UNUSED_CODEC = 0x10000000,
279};
280
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800281enum hal_mpeg2_profile {
Vaibhav Deshu Venkatesh0ad53f02017-08-07 13:21:47 -0700282 HAL_UNUSED_MPEG2_PROFILE = 0x00000000,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800283 HAL_MPEG2_PROFILE_SIMPLE = 0x00000001,
284 HAL_MPEG2_PROFILE_MAIN = 0x00000002,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800285};
286
287enum hal_mpeg2_level {
Vaibhav Deshu Venkatesh0ad53f02017-08-07 13:21:47 -0700288 HAL_UNUSED_MEPG2_LEVEL = 0x00000000,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800289 HAL_MPEG2_LEVEL_LL = 0x00000001,
290 HAL_MPEG2_LEVEL_ML = 0x00000002,
Vaibhav Deshu Venkatesh0ad53f02017-08-07 13:21:47 -0700291 HAL_MPEG2_LEVEL_HL = 0x00000004,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800292};
293
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800294enum hal_h264_profile {
Vaibhav Deshu Venkatesh0ad53f02017-08-07 13:21:47 -0700295 HAL_UNUSED_H264_PROFILE = 0x00000000,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800296 HAL_H264_PROFILE_BASELINE = 0x00000001,
297 HAL_H264_PROFILE_MAIN = 0x00000002,
298 HAL_H264_PROFILE_HIGH = 0x00000004,
Vaibhav Deshu Venkatesh0ad53f02017-08-07 13:21:47 -0700299 HAL_H264_PROFILE_STEREO_HIGH = 0x00000008,
300 HAL_H264_PROFILE_MULTIVIEW_HIGH = 0x00000010,
301 HAL_H264_PROFILE_CONSTRAINED_BASE = 0x00000020,
302 HAL_H264_PROFILE_CONSTRAINED_HIGH = 0x00000040,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800303};
304
305enum hal_h264_level {
Vaibhav Deshu Venkatesh234b4dc2017-03-21 16:54:28 -0700306 HAL_H264_LEVEL_UNKNOWN = 0x00000000,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800307 HAL_H264_LEVEL_1 = 0x00000001,
308 HAL_H264_LEVEL_1b = 0x00000002,
309 HAL_H264_LEVEL_11 = 0x00000004,
310 HAL_H264_LEVEL_12 = 0x00000008,
311 HAL_H264_LEVEL_13 = 0x00000010,
312 HAL_H264_LEVEL_2 = 0x00000020,
313 HAL_H264_LEVEL_21 = 0x00000040,
314 HAL_H264_LEVEL_22 = 0x00000080,
315 HAL_H264_LEVEL_3 = 0x00000100,
316 HAL_H264_LEVEL_31 = 0x00000200,
317 HAL_H264_LEVEL_32 = 0x00000400,
318 HAL_H264_LEVEL_4 = 0x00000800,
319 HAL_H264_LEVEL_41 = 0x00001000,
320 HAL_H264_LEVEL_42 = 0x00002000,
321 HAL_H264_LEVEL_5 = 0x00004000,
322 HAL_H264_LEVEL_51 = 0x00008000,
323 HAL_H264_LEVEL_52 = 0x00010000,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800324};
325
326enum hal_hevc_profile {
Vaibhav Deshu Venkatesh0ad53f02017-08-07 13:21:47 -0700327 HAL_UNUSED_HEVC_PROFILE = 0x00000000,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800328 HAL_HEVC_PROFILE_MAIN = 0x00000001,
329 HAL_HEVC_PROFILE_MAIN10 = 0x00000002,
330 HAL_HEVC_PROFILE_MAIN_STILL_PIC = 0x00000004,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800331};
332
333enum hal_hevc_level {
Vaibhav Deshu Venkatesh234b4dc2017-03-21 16:54:28 -0700334 HAL_HEVC_TIER_LEVEL_UNKNOWN = 0x00000000,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800335 HAL_HEVC_MAIN_TIER_LEVEL_1 = 0x10000001,
336 HAL_HEVC_MAIN_TIER_LEVEL_2 = 0x10000002,
337 HAL_HEVC_MAIN_TIER_LEVEL_2_1 = 0x10000004,
338 HAL_HEVC_MAIN_TIER_LEVEL_3 = 0x10000008,
339 HAL_HEVC_MAIN_TIER_LEVEL_3_1 = 0x10000010,
340 HAL_HEVC_MAIN_TIER_LEVEL_4 = 0x10000020,
341 HAL_HEVC_MAIN_TIER_LEVEL_4_1 = 0x10000040,
342 HAL_HEVC_MAIN_TIER_LEVEL_5 = 0x10000080,
343 HAL_HEVC_MAIN_TIER_LEVEL_5_1 = 0x10000100,
344 HAL_HEVC_MAIN_TIER_LEVEL_5_2 = 0x10000200,
345 HAL_HEVC_MAIN_TIER_LEVEL_6 = 0x10000400,
346 HAL_HEVC_MAIN_TIER_LEVEL_6_1 = 0x10000800,
347 HAL_HEVC_MAIN_TIER_LEVEL_6_2 = 0x10001000,
348 HAL_HEVC_HIGH_TIER_LEVEL_1 = 0x20000001,
349 HAL_HEVC_HIGH_TIER_LEVEL_2 = 0x20000002,
350 HAL_HEVC_HIGH_TIER_LEVEL_2_1 = 0x20000004,
351 HAL_HEVC_HIGH_TIER_LEVEL_3 = 0x20000008,
352 HAL_HEVC_HIGH_TIER_LEVEL_3_1 = 0x20000010,
353 HAL_HEVC_HIGH_TIER_LEVEL_4 = 0x20000020,
354 HAL_HEVC_HIGH_TIER_LEVEL_4_1 = 0x20000040,
355 HAL_HEVC_HIGH_TIER_LEVEL_5 = 0x20000080,
356 HAL_HEVC_HIGH_TIER_LEVEL_5_1 = 0x20000100,
357 HAL_HEVC_HIGH_TIER_LEVEL_5_2 = 0x20000200,
358 HAL_HEVC_HIGH_TIER_LEVEL_6 = 0x20000400,
359 HAL_HEVC_HIGH_TIER_LEVEL_6_1 = 0x20000800,
360 HAL_HEVC_HIGH_TIER_LEVEL_6_2 = 0x20001000,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800361};
362
363enum hal_hevc_tier {
364 HAL_HEVC_TIER_MAIN = 0x00000001,
365 HAL_HEVC_TIER_HIGH = 0x00000002,
366 HAL_UNUSED_HEVC_TIER = 0x10000000,
367};
368
Vaibhav Deshu Venkatesh0ad53f02017-08-07 13:21:47 -0700369enum hal_vp8_profile {
370 HAL_VP8_PROFILE_UNUSED = 0x00000000,
371 HAL_VP8_PROFILE_MAIN = 0x00000001,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800372};
373
Vaibhav Deshu Venkatesh0ad53f02017-08-07 13:21:47 -0700374enum hal_vp8_level {
375 HAL_VP8_LEVEL_UNUSED = 0x00000000,
376 HAL_VP8_LEVEL_VERSION_0 = 0x00000001,
377 HAL_VP8_LEVEL_VERSION_1 = 0x00000002,
378 HAL_VP8_LEVEL_VERSION_2 = 0x00000004,
379 HAL_VP8_LEVEL_VERSION_3 = 0x00000008,
Chinmay Sawarkar7f1cc152017-05-05 18:16:36 -0700380};
381
Surajit Poddere502daa2017-05-30 19:17:45 +0530382enum hal_tme_profile {
383 HAL_TME_PROFILE_0 = 0x00000001,
384 HAL_TME_PROFILE_1 = 0x00000002,
385 HAL_TME_PROFILE_2 = 0x00000004,
386 HAL_TME_PROFILE_3 = 0x00000008,
387};
388
389enum hal_tme_level {
390 HAL_TME_LEVEL_INTEGER = 0x00000001,
391};
392
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800393struct hal_frame_rate {
394 enum hal_buffer buffer_type;
395 u32 frame_rate;
396};
397
398enum hal_uncompressed_format {
399 HAL_COLOR_FORMAT_MONOCHROME = 0x00000001,
400 HAL_COLOR_FORMAT_NV12 = 0x00000002,
401 HAL_COLOR_FORMAT_NV21 = 0x00000004,
402 HAL_COLOR_FORMAT_NV12_4x4TILE = 0x00000008,
403 HAL_COLOR_FORMAT_NV21_4x4TILE = 0x00000010,
404 HAL_COLOR_FORMAT_YUYV = 0x00000020,
405 HAL_COLOR_FORMAT_YVYU = 0x00000040,
406 HAL_COLOR_FORMAT_UYVY = 0x00000080,
407 HAL_COLOR_FORMAT_VYUY = 0x00000100,
408 HAL_COLOR_FORMAT_RGB565 = 0x00000200,
409 HAL_COLOR_FORMAT_BGR565 = 0x00000400,
410 HAL_COLOR_FORMAT_RGB888 = 0x00000800,
411 HAL_COLOR_FORMAT_BGR888 = 0x00001000,
412 HAL_COLOR_FORMAT_NV12_UBWC = 0x00002000,
413 HAL_COLOR_FORMAT_NV12_TP10_UBWC = 0x00004000,
414 HAL_COLOR_FORMAT_RGBA8888 = 0x00008000,
415 HAL_COLOR_FORMAT_RGBA8888_UBWC = 0x00010000,
416 HAL_UNUSED_COLOR = 0x10000000,
417};
418
419enum hal_statistics_mode_type {
420 HAL_STATISTICS_MODE_DEFAULT = 0x00000001,
421 HAL_STATISTICS_MODE_1 = 0x00000002,
422 HAL_STATISTICS_MODE_2 = 0x00000004,
423 HAL_STATISTICS_MODE_3 = 0x00000008,
424};
425
426enum hal_ssr_trigger_type {
427 SSR_ERR_FATAL = 1,
428 SSR_SW_DIV_BY_ZERO,
429 SSR_HW_WDOG_IRQ,
430};
431
432struct hal_uncompressed_format_select {
433 enum hal_buffer buffer_type;
434 enum hal_uncompressed_format format;
435};
436
437struct hal_uncompressed_plane_actual {
438 int actual_stride;
439 u32 actual_plane_buffer_height;
440};
441
442struct hal_uncompressed_plane_actual_info {
443 enum hal_buffer buffer_type;
444 u32 num_planes;
445 struct hal_uncompressed_plane_actual rg_plane_format[1];
446};
447
448struct hal_uncompressed_plane_constraints {
449 u32 stride_multiples;
450 u32 max_stride;
451 u32 min_plane_buffer_height_multiple;
452 u32 buffer_alignment;
453};
454
455struct hal_uncompressed_plane_actual_constraints_info {
456 enum hal_buffer buffer_type;
457 u32 num_planes;
458 struct hal_uncompressed_plane_constraints rg_plane_format[1];
459};
460
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800461struct hal_frame_size {
462 enum hal_buffer buffer_type;
463 u32 width;
464 u32 height;
465};
466
467struct hal_enable {
468 bool enable;
469};
470
471struct hal_buffer_count_actual {
472 enum hal_buffer buffer_type;
473 u32 buffer_count_actual;
Praneeth Paladugudefea4e2017-02-09 23:44:08 -0800474 u32 buffer_count_min_host;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800475};
476
477struct hal_buffer_size_minimum {
478 enum hal_buffer buffer_type;
479 u32 buffer_size;
480};
481
482struct hal_buffer_display_hold_count_actual {
483 enum hal_buffer buffer_type;
484 u32 hold_count;
485};
486
487enum hal_nal_stream_format {
488 HAL_NAL_FORMAT_STARTCODES = 0x00000001,
489 HAL_NAL_FORMAT_ONE_NAL_PER_BUFFER = 0x00000002,
490 HAL_NAL_FORMAT_ONE_BYTE_LENGTH = 0x00000004,
491 HAL_NAL_FORMAT_TWO_BYTE_LENGTH = 0x00000008,
492 HAL_NAL_FORMAT_FOUR_BYTE_LENGTH = 0x00000010,
493};
494
495enum hal_output_order {
496 HAL_OUTPUT_ORDER_DISPLAY,
497 HAL_OUTPUT_ORDER_DECODE,
498 HAL_UNUSED_OUTPUT = 0x10000000,
499};
500
501enum hal_picture {
502 HAL_PICTURE_I = 0x01,
503 HAL_PICTURE_P = 0x02,
504 HAL_PICTURE_B = 0x04,
505 HAL_PICTURE_IDR = 0x08,
506 HAL_PICTURE_CRA = 0x10,
507 HAL_FRAME_NOTCODED = 0x7F002000,
508 HAL_FRAME_YUV = 0x7F004000,
509 HAL_UNUSED_PICT = 0x10000000,
510};
511
512struct hal_extradata_enable {
513 u32 enable;
514 enum hal_extradata_id index;
515};
516
517struct hal_enable_picture {
518 u32 picture_type;
519};
520
521struct hal_multi_stream {
522 enum hal_buffer buffer_type;
523 u32 enable;
524 u32 width;
525 u32 height;
526};
527
528struct hal_display_picture_buffer_count {
529 u32 enable;
530 u32 count;
531};
532
533struct hal_mb_error_map {
534 u32 error_map_size;
535 u8 rg_error_map[1];
536};
537
538struct hal_request_iframe {
539 u32 enable;
540};
541
542struct hal_bitrate {
543 u32 bit_rate;
544 u32 layer_id;
545};
546
547struct hal_profile_level {
548 u32 profile;
549 u32 level;
550};
551
552struct hal_profile_level_supported {
553 u32 profile_count;
554 struct hal_profile_level profile_level[MAX_PROFILE_COUNT];
555};
556
557enum hal_h264_entropy {
558 HAL_H264_ENTROPY_CAVLC = 1,
559 HAL_H264_ENTROPY_CABAC = 2,
560 HAL_UNUSED_ENTROPY = 0x10000000,
561};
562
563enum hal_h264_cabac_model {
564 HAL_H264_CABAC_MODEL_0 = 1,
565 HAL_H264_CABAC_MODEL_1 = 2,
566 HAL_H264_CABAC_MODEL_2 = 4,
567 HAL_UNUSED_CABAC = 0x10000000,
568};
569
570struct hal_h264_entropy_control {
571 enum hal_h264_entropy entropy_mode;
572 enum hal_h264_cabac_model cabac_model;
573};
574
575enum hal_rate_control {
576 HAL_RATE_CONTROL_OFF,
577 HAL_RATE_CONTROL_VBR_VFR,
578 HAL_RATE_CONTROL_VBR_CFR,
579 HAL_RATE_CONTROL_CBR_VFR,
580 HAL_RATE_CONTROL_CBR_CFR,
581 HAL_RATE_CONTROL_MBR_CFR,
582 HAL_RATE_CONTROL_MBR_VFR,
583 HAL_UNUSED_RC = 0x10000000,
584};
585
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800586enum hal_h264_db_mode {
587 HAL_H264_DB_MODE_DISABLE,
588 HAL_H264_DB_MODE_SKIP_SLICE_BOUNDARY,
589 HAL_H264_DB_MODE_ALL_BOUNDARY,
590 HAL_UNUSED_H264_DB = 0x10000000,
591};
592
593struct hal_h264_db_control {
594 enum hal_h264_db_mode mode;
595 int slice_alpha_offset;
596 int slice_beta_offset;
597};
598
599struct hal_temporal_spatial_tradeoff {
600 u32 ts_factor;
601};
602
603struct hal_quantization {
604 u32 qpi;
605 u32 qpp;
606 u32 qpb;
607 u32 layer_id;
Vaibhav Deshu Venkatesh3a147162017-04-27 16:21:12 -0700608 u32 enable;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800609};
610
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800611struct hal_quantization_range {
Praneeth Paladugu7fbd2792017-01-27 13:39:03 -0800612 u32 qpi_min;
613 u32 qpp_min;
614 u32 qpb_min;
615 u32 qpi_max;
616 u32 qpp_max;
617 u32 qpb_max;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800618 u32 layer_id;
619};
620
621struct hal_intra_period {
622 u32 pframes;
623 u32 bframes;
624};
625
626struct hal_idr_period {
627 u32 idr_period;
628};
629
630enum hal_rotate {
631 HAL_ROTATE_NONE,
632 HAL_ROTATE_90,
633 HAL_ROTATE_180,
634 HAL_ROTATE_270,
635 HAL_UNUSED_ROTATE = 0x10000000,
636};
637
638enum hal_flip {
639 HAL_FLIP_NONE,
640 HAL_FLIP_HORIZONTAL,
641 HAL_FLIP_VERTICAL,
642 HAL_UNUSED_FLIP = 0x10000000,
643};
644
Chinmay Sawarkar582c72a2017-05-24 14:29:12 -0700645struct hal_vpe_rotation {
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800646 enum hal_rotate rotate;
647 enum hal_flip flip;
648};
649
650enum hal_intra_refresh_mode {
651 HAL_INTRA_REFRESH_NONE,
652 HAL_INTRA_REFRESH_CYCLIC,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800653 HAL_INTRA_REFRESH_RANDOM,
654 HAL_UNUSED_INTRA = 0x10000000,
655};
656
657struct hal_intra_refresh {
658 enum hal_intra_refresh_mode mode;
Saurabh Kothawadeabed16c2017-03-22 17:06:40 -0700659 u32 ir_mbs;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800660};
661
662enum hal_multi_slice {
663 HAL_MULTI_SLICE_OFF,
664 HAL_MULTI_SLICE_BY_MB_COUNT,
665 HAL_MULTI_SLICE_BY_BYTE_COUNT,
666 HAL_MULTI_SLICE_GOB,
667 HAL_UNUSED_SLICE = 0x10000000,
668};
669
670struct hal_multi_slice_control {
671 enum hal_multi_slice multi_slice;
672 u32 slice_size;
673};
674
675struct hal_debug_config {
676 u32 debug_config;
677};
678
679struct hal_buffer_requirements {
680 enum hal_buffer buffer_type;
681 u32 buffer_size;
682 u32 buffer_region_size;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800683 u32 buffer_count_min;
Praneeth Paladugudefea4e2017-02-09 23:44:08 -0800684 u32 buffer_count_min_host;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800685 u32 buffer_count_actual;
686 u32 contiguous;
687 u32 buffer_alignment;
688};
689
690enum hal_priority {/* Priority increases with number */
691 HAL_PRIORITY_LOW = 10,
692 HAL_PRIOIRTY_MEDIUM = 20,
693 HAL_PRIORITY_HIGH = 30,
694 HAL_UNUSED_PRIORITY = 0x10000000,
695};
696
697struct hal_batch_info {
698 u32 input_batch_count;
699 u32 output_batch_count;
700};
701
702struct hal_metadata_pass_through {
703 u32 enable;
704 u32 size;
705};
706
707struct hal_uncompressed_format_supported {
708 enum hal_buffer buffer_type;
709 u32 format_entries;
710 u32 rg_format_info[1];
711};
712
713enum hal_interlace_format {
714 HAL_INTERLACE_FRAME_PROGRESSIVE = 0x01,
715 HAL_INTERLACE_INTERLEAVE_FRAME_TOPFIELDFIRST = 0x02,
716 HAL_INTERLACE_INTERLEAVE_FRAME_BOTTOMFIELDFIRST = 0x04,
717 HAL_INTERLACE_FRAME_TOPFIELDFIRST = 0x08,
718 HAL_INTERLACE_FRAME_BOTTOMFIELDFIRST = 0x10,
719 HAL_UNUSED_INTERLACE = 0x10000000,
720};
721
722struct hal_interlace_format_supported {
723 enum hal_buffer buffer_type;
724 enum hal_interlace_format format;
725};
726
727enum hal_chroma_site {
728 HAL_CHROMA_SITE_0,
729 HAL_CHROMA_SITE_1,
730 HAL_UNUSED_CHROMA = 0x10000000,
731};
732
733struct hal_properties_supported {
734 u32 num_properties;
735 u32 rg_properties[1];
736};
737
738enum hal_capability {
739 HAL_CAPABILITY_FRAME_WIDTH = 0x1,
740 HAL_CAPABILITY_FRAME_HEIGHT,
741 HAL_CAPABILITY_MBS_PER_FRAME,
742 HAL_CAPABILITY_MBS_PER_SECOND,
743 HAL_CAPABILITY_FRAMERATE,
744 HAL_CAPABILITY_SCALE_X,
745 HAL_CAPABILITY_SCALE_Y,
746 HAL_CAPABILITY_BITRATE,
747 HAL_CAPABILITY_BFRAME,
748 HAL_CAPABILITY_PEAKBITRATE,
749 HAL_CAPABILITY_HIER_P_NUM_ENH_LAYERS,
750 HAL_CAPABILITY_ENC_LTR_COUNT,
751 HAL_CAPABILITY_SECURE_OUTPUT2_THRESHOLD,
752 HAL_CAPABILITY_HIER_B_NUM_ENH_LAYERS,
753 HAL_CAPABILITY_LCU_SIZE,
754 HAL_CAPABILITY_HIER_P_HYBRID_NUM_ENH_LAYERS,
755 HAL_CAPABILITY_MBS_PER_SECOND_POWER_SAVE,
Praneeth Paladugu520c7592017-01-26 13:53:14 -0800756 HAL_CAPABILITY_EXTRADATA,
757 HAL_CAPABILITY_PROFILE,
758 HAL_CAPABILITY_LEVEL,
759 HAL_CAPABILITY_I_FRAME_QP,
760 HAL_CAPABILITY_P_FRAME_QP,
761 HAL_CAPABILITY_B_FRAME_QP,
762 HAL_CAPABILITY_RATE_CONTROL_MODES,
763 HAL_CAPABILITY_BLUR_WIDTH,
764 HAL_CAPABILITY_BLUR_HEIGHT,
765 HAL_CAPABILITY_SLICE_DELIVERY_MODES,
766 HAL_CAPABILITY_SLICE_BYTE,
767 HAL_CAPABILITY_SLICE_MB,
768 HAL_CAPABILITY_SECURE,
769 HAL_CAPABILITY_MAX_NUM_B_FRAMES,
770 HAL_CAPABILITY_MAX_VIDEOCORES,
771 HAL_CAPABILITY_MAX_WORKMODES,
772 HAL_CAPABILITY_UBWC_CR_STATS,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800773 HAL_UNUSED_CAPABILITY = 0x10000000,
774};
775
776struct hal_capability_supported {
777 enum hal_capability capability_type;
778 u32 min;
779 u32 max;
780 u32 step_size;
781};
782
783struct hal_capability_supported_info {
784 u32 num_capabilities;
785 struct hal_capability_supported rg_data[1];
786};
787
788struct hal_nal_stream_format_supported {
789 u32 nal_stream_format_supported;
790};
791
792struct hal_nal_stream_format_select {
793 u32 nal_stream_format_select;
794};
795
796struct hal_multi_view_format {
797 u32 views;
798 u32 rg_view_order[1];
799};
800
801enum hal_buffer_layout_type {
802 HAL_BUFFER_LAYOUT_TOP_BOTTOM,
803 HAL_BUFFER_LAYOUT_SEQ,
804 HAL_UNUSED_BUFFER_LAYOUT = 0x10000000,
805};
806
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800807struct hal_aspect_ratio {
808 u32 aspect_width;
809 u32 aspect_height;
810};
811
812struct hal_codec_supported {
813 u32 decoder_codec_supported;
814 u32 encoder_codec_supported;
815};
816
817struct hal_multi_view_select {
818 u32 view_index;
819};
820
821struct hal_timestamp_scale {
822 u32 time_stamp_scale;
823};
824
825
Chinmay Sawarkard0054622017-05-04 13:50:59 -0700826struct hal_vui_timing_info {
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800827 u32 enable;
828 u32 fixed_frame_rate;
829 u32 time_scale;
830};
831
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800832struct hal_preserve_text_quality {
833 u32 enable;
834};
835
Praneeth Paladugu238977b2016-12-06 12:51:26 -0800836enum hal_core_id {
837 VIDC_CORE_ID_DEFAULT = 0,
838 VIDC_CORE_ID_1 = 1, /* 0b01 */
839 VIDC_CORE_ID_2 = 2, /* 0b10 */
840 VIDC_CORE_ID_3 = 3, /* 0b11 */
841 VIDC_CORE_ID_UNUSED = 0x10000000,
842};
843
844struct hal_videocores_usage_info {
845 u32 video_core_enable_mask;
846};
847
848enum hal_work_mode {
849 VIDC_WORK_MODE_1,
850 VIDC_WORK_MODE_2,
851 VIDC_WORK_MODE_UNUSED = 0x10000000,
852};
853
854struct hal_video_work_mode {
855 u32 video_work_mode;
856};
857
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800858struct hal_vpe_color_space_conversion {
859 u32 csc_matrix[HAL_MAX_MATRIX_COEFFS];
860 u32 csc_bias[HAL_MAX_BIAS_COEFFS];
861 u32 csc_limit[HAL_MAX_LIMIT_COEFFS];
862};
863
864struct hal_video_signal_info {
865 u32 color_space;
866 u32 transfer_chars;
867 u32 matrix_coeffs;
868 bool full_range;
869};
870
871enum hal_iframesize_type {
872 HAL_IFRAMESIZE_TYPE_DEFAULT,
873 HAL_IFRAMESIZE_TYPE_MEDIUM,
874 HAL_IFRAMESIZE_TYPE_HUGE,
875 HAL_IFRAMESIZE_TYPE_UNLIMITED,
876};
877
878enum vidc_resource_id {
879 VIDC_RESOURCE_NONE,
Shivendra Kakraniac1f60e02017-04-13 00:07:26 -0700880 VIDC_RESOURCE_SYSCACHE,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800881 VIDC_UNUSED_RESOURCE = 0x10000000,
882};
883
884struct vidc_resource_hdr {
885 enum vidc_resource_id resource_id;
886 void *resource_handle;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800887};
888
889struct vidc_buffer_addr_info {
890 enum hal_buffer buffer_type;
891 u32 buffer_size;
892 u32 num_buffers;
Maheshwar Ajjac6407c02017-06-09 18:53:20 -0700893 u32 align_device_addr;
894 u32 extradata_addr;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800895 u32 extradata_size;
896 u32 response_required;
897};
898
899/* Needs to be exactly the same as hfi_buffer_info */
900struct hal_buffer_info {
901 u32 buffer_addr;
902 u32 extra_data_addr;
903};
904
905struct vidc_frame_plane_config {
906 u32 left;
907 u32 top;
908 u32 width;
909 u32 height;
910 u32 stride;
911 u32 scan_lines;
912};
913
914struct vidc_uncompressed_frame_config {
915 struct vidc_frame_plane_config luma_plane;
916 struct vidc_frame_plane_config chroma_plane;
917};
918
919struct vidc_frame_data {
920 enum hal_buffer buffer_type;
Maheshwar Ajjac6407c02017-06-09 18:53:20 -0700921 u32 device_addr;
922 u32 extradata_addr;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800923 int64_t timestamp;
924 u32 flags;
925 u32 offset;
926 u32 alloc_len;
927 u32 filled_len;
928 u32 mark_target;
929 u32 mark_data;
930 u32 clnt_data;
931 u32 extradata_size;
932};
933
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800934struct hal_fw_info {
935 char version[VENUS_VERSION_LENGTH];
936 phys_addr_t base_addr;
937 int register_base;
938 int register_size;
939 int irq;
940};
941
942enum hal_flush {
943 HAL_FLUSH_INPUT,
944 HAL_FLUSH_OUTPUT,
945 HAL_FLUSH_ALL,
946 HAL_UNUSED_FLUSH = 0x10000000,
947};
948
949enum hal_event_type {
950 HAL_EVENT_SEQ_CHANGED_SUFFICIENT_RESOURCES,
951 HAL_EVENT_SEQ_CHANGED_INSUFFICIENT_RESOURCES,
952 HAL_EVENT_RELEASE_BUFFER_REFERENCE,
953 HAL_UNUSED_SEQCHG = 0x10000000,
954};
955
956enum buffer_mode_type {
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800957 HAL_BUFFER_MODE_DYNAMIC = 0x100,
Chinmay Sawarkar2de3f772017-02-07 12:03:44 -0800958 HAL_BUFFER_MODE_STATIC = 0x001,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800959};
960
961struct hal_buffer_alloc_mode {
962 enum hal_buffer buffer_type;
963 enum buffer_mode_type buffer_mode;
964};
965
966enum ltr_mode {
967 HAL_LTR_MODE_DISABLE,
968 HAL_LTR_MODE_MANUAL,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -0800969};
970
971struct hal_ltr_mode {
972 enum ltr_mode mode;
973 u32 count;
974 u32 trust_mode;
975};
976
977struct hal_ltr_use {
978 u32 ref_ltr;
979 u32 use_constraint;
980 u32 frames;
981};
982
983struct hal_ltr_mark {
984 u32 mark_frame;
985};
986
987enum hal_perf_mode {
988 HAL_PERF_MODE_POWER_SAVE,
989 HAL_PERF_MODE_POWER_MAX_QUALITY,
990};
991
992struct hal_hybrid_hierp {
993 u32 layers;
994};
995
996struct hal_scs_threshold {
997 u32 threshold_value;
998};
999
1000struct buffer_requirements {
1001 struct hal_buffer_requirements buffer[HAL_BUFFER_MAX];
1002};
1003
Umesh Pandey42313a72017-07-05 18:20:06 -07001004struct hal_conceal_color {
1005 u32 conceal_color_8bit;
1006 u32 conceal_color_10bit;
1007};
1008
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001009union hal_get_property {
1010 struct hal_frame_rate frame_rate;
1011 struct hal_uncompressed_format_select format_select;
1012 struct hal_uncompressed_plane_actual plane_actual;
1013 struct hal_uncompressed_plane_actual_info plane_actual_info;
1014 struct hal_uncompressed_plane_constraints plane_constraints;
1015 struct hal_uncompressed_plane_actual_constraints_info
1016 plane_constraints_info;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001017 struct hal_frame_size frame_size;
1018 struct hal_enable enable;
1019 struct hal_buffer_count_actual buffer_count_actual;
1020 struct hal_extradata_enable extradata_enable;
1021 struct hal_enable_picture enable_picture;
1022 struct hal_multi_stream multi_stream;
1023 struct hal_display_picture_buffer_count display_picture_buffer_count;
1024 struct hal_mb_error_map mb_error_map;
1025 struct hal_request_iframe request_iframe;
1026 struct hal_bitrate bitrate;
1027 struct hal_profile_level profile_level;
1028 struct hal_profile_level_supported profile_level_supported;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001029 struct hal_h264_db_control h264_db_control;
1030 struct hal_temporal_spatial_tradeoff temporal_spatial_tradeoff;
1031 struct hal_quantization quantization;
1032 struct hal_quantization_range quantization_range;
1033 struct hal_intra_period intra_period;
1034 struct hal_idr_period idr_period;
Chinmay Sawarkar582c72a2017-05-24 14:29:12 -07001035 struct hal_vpe_rotation vpe_rotation;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001036 struct hal_intra_refresh intra_refresh;
1037 struct hal_multi_slice_control multi_slice_control;
1038 struct hal_debug_config debug_config;
1039 struct hal_batch_info batch_info;
1040 struct hal_metadata_pass_through metadata_pass_through;
1041 struct hal_uncompressed_format_supported uncompressed_format_supported;
1042 struct hal_interlace_format_supported interlace_format_supported;
1043 struct hal_properties_supported properties_supported;
1044 struct hal_capability_supported capability_supported;
1045 struct hal_capability_supported_info capability_supported_info;
1046 struct hal_nal_stream_format_supported nal_stream_format_supported;
1047 struct hal_nal_stream_format_select nal_stream_format_select;
1048 struct hal_multi_view_format multi_view_format;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001049 struct hal_codec_supported codec_supported;
1050 struct hal_multi_view_select multi_view_select;
1051 struct hal_timestamp_scale timestamp_scale;
Chinmay Sawarkard0054622017-05-04 13:50:59 -07001052 struct hal_vui_timing_info vui_timing_info;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001053 struct hal_preserve_text_quality preserve_text_quality;
1054 struct hal_buffer_info buffer_info;
1055 struct hal_buffer_alloc_mode buffer_alloc_mode;
1056 struct buffer_requirements buf_req;
1057 enum hal_h264_entropy h264_entropy;
Umesh Pandey42313a72017-07-05 18:20:06 -07001058 struct hal_conceal_color conceal_color;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001059};
1060
1061/* HAL Response */
1062#define IS_HAL_SYS_CMD(cmd) ((cmd) >= HAL_SYS_INIT_DONE && \
1063 (cmd) <= HAL_SYS_ERROR)
1064#define IS_HAL_SESSION_CMD(cmd) ((cmd) >= HAL_SESSION_EVENT_CHANGE && \
1065 (cmd) <= HAL_SESSION_ERROR)
1066enum hal_command_response {
1067 /* SYSTEM COMMANDS_DONE*/
1068 HAL_SYS_INIT_DONE,
1069 HAL_SYS_SET_RESOURCE_DONE,
1070 HAL_SYS_RELEASE_RESOURCE_DONE,
1071 HAL_SYS_PING_ACK_DONE,
1072 HAL_SYS_PC_PREP_DONE,
1073 HAL_SYS_IDLE,
1074 HAL_SYS_DEBUG,
1075 HAL_SYS_WATCHDOG_TIMEOUT,
1076 HAL_SYS_ERROR,
1077 /* SESSION COMMANDS_DONE */
1078 HAL_SESSION_EVENT_CHANGE,
1079 HAL_SESSION_LOAD_RESOURCE_DONE,
1080 HAL_SESSION_INIT_DONE,
1081 HAL_SESSION_END_DONE,
1082 HAL_SESSION_ABORT_DONE,
1083 HAL_SESSION_START_DONE,
1084 HAL_SESSION_STOP_DONE,
1085 HAL_SESSION_ETB_DONE,
1086 HAL_SESSION_FTB_DONE,
1087 HAL_SESSION_FLUSH_DONE,
1088 HAL_SESSION_SUSPEND_DONE,
1089 HAL_SESSION_RESUME_DONE,
1090 HAL_SESSION_SET_PROP_DONE,
1091 HAL_SESSION_GET_PROP_DONE,
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001092 HAL_SESSION_RELEASE_BUFFER_DONE,
1093 HAL_SESSION_RELEASE_RESOURCE_DONE,
1094 HAL_SESSION_PROPERTY_INFO,
1095 HAL_SESSION_ERROR,
1096 HAL_RESPONSE_UNUSED = 0x10000000,
1097};
1098
Praneeth Paladugu319e7922017-03-16 11:09:06 -07001099struct ubwc_cr_stats_info_type {
1100 u32 cr_stats_info0;
1101 u32 cr_stats_info1;
1102 u32 cr_stats_info2;
1103 u32 cr_stats_info3;
1104 u32 cr_stats_info4;
1105 u32 cr_stats_info5;
1106 u32 cr_stats_info6;
1107};
1108
1109struct recon_stats_type {
1110 u32 buffer_index;
1111 u32 complexity_number;
1112 struct ubwc_cr_stats_info_type ubwc_stats_info;
1113};
1114
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001115struct vidc_hal_ebd {
1116 u32 timestamp_hi;
1117 u32 timestamp_lo;
1118 u32 flags;
1119 enum vidc_status status;
1120 u32 mark_target;
1121 u32 mark_data;
1122 u32 stats;
1123 u32 offset;
1124 u32 alloc_len;
1125 u32 filled_len;
1126 enum hal_picture picture_type;
Praneeth Paladugu319e7922017-03-16 11:09:06 -07001127 struct recon_stats_type recon_stats;
Maheshwar Ajjac6407c02017-06-09 18:53:20 -07001128 u32 packet_buffer;
1129 u32 extra_data_buffer;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001130};
1131
1132struct vidc_hal_fbd {
1133 u32 stream_id;
1134 u32 view_id;
1135 u32 timestamp_hi;
1136 u32 timestamp_lo;
1137 u32 flags1;
1138 u32 mark_target;
1139 u32 mark_data;
1140 u32 stats;
1141 u32 alloc_len1;
1142 u32 filled_len1;
1143 u32 offset1;
1144 u32 frame_width;
1145 u32 frame_height;
1146 u32 start_x_coord;
1147 u32 start_y_coord;
1148 u32 input_tag;
1149 u32 input_tag1;
1150 enum hal_picture picture_type;
Maheshwar Ajjac6407c02017-06-09 18:53:20 -07001151 u32 packet_buffer1;
1152 u32 extra_data_buffer;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001153 u32 flags2;
1154 u32 alloc_len2;
1155 u32 filled_len2;
1156 u32 offset2;
Maheshwar Ajjac6407c02017-06-09 18:53:20 -07001157 u32 packet_buffer2;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001158 u32 flags3;
1159 u32 alloc_len3;
1160 u32 filled_len3;
1161 u32 offset3;
Maheshwar Ajjac6407c02017-06-09 18:53:20 -07001162 u32 packet_buffer3;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001163 enum hal_buffer buffer_type;
1164};
1165
1166struct msm_vidc_capability {
1167 enum hal_domain domain;
1168 enum hal_video_codec codec;
1169 struct hal_capability_supported width;
1170 struct hal_capability_supported height;
1171 struct hal_capability_supported mbs_per_frame;
1172 struct hal_capability_supported mbs_per_sec;
1173 struct hal_capability_supported frame_rate;
1174 struct hal_capability_supported scale_x;
1175 struct hal_capability_supported scale_y;
1176 struct hal_capability_supported bitrate;
1177 struct hal_capability_supported bframe;
1178 struct hal_capability_supported peakbitrate;
1179 struct hal_capability_supported hier_p;
1180 struct hal_capability_supported ltr_count;
1181 struct hal_capability_supported secure_output2_threshold;
1182 struct hal_capability_supported hier_b;
1183 struct hal_capability_supported lcu_size;
1184 struct hal_capability_supported hier_p_hybrid;
1185 struct hal_capability_supported mbs_per_sec_power_save;
Praneeth Paladugu520c7592017-01-26 13:53:14 -08001186 struct hal_capability_supported extradata;
1187 struct hal_capability_supported profile;
1188 struct hal_capability_supported level;
1189 struct hal_capability_supported i_qp;
1190 struct hal_capability_supported p_qp;
1191 struct hal_capability_supported b_qp;
1192 struct hal_capability_supported rc_modes;
1193 struct hal_capability_supported blur_width;
1194 struct hal_capability_supported blur_height;
1195 struct hal_capability_supported slice_delivery_mode;
1196 struct hal_capability_supported slice_bytes;
1197 struct hal_capability_supported slice_mbs;
1198 struct hal_capability_supported secure;
1199 struct hal_capability_supported max_num_b_frames;
1200 struct hal_capability_supported max_video_cores;
1201 struct hal_capability_supported max_work_modes;
1202 struct hal_capability_supported ubwc_cr_stats;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001203 struct hal_profile_level_supported profile_level;
1204 struct hal_uncompressed_format_supported uncomp_format;
1205 struct hal_interlace_format_supported HAL_format;
1206 struct hal_nal_stream_format_supported nal_stream_format;
1207 struct hal_intra_refresh intra_refresh;
1208 enum buffer_mode_type alloc_mode_out;
1209 enum buffer_mode_type alloc_mode_in;
1210 u32 pixelprocess_capabilities;
Surajit Poddere502daa2017-05-30 19:17:45 +05301211 u32 tme_version;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001212};
1213
1214struct vidc_hal_sys_init_done {
1215 u32 dec_codec_supported;
1216 u32 enc_codec_supported;
1217 u32 codec_count;
1218 struct msm_vidc_capability *capabilities;
1219 u32 max_sessions_supported;
1220};
1221
1222struct vidc_hal_session_init_done {
1223 struct msm_vidc_capability capability;
1224};
1225
1226struct msm_vidc_cb_cmd_done {
1227 u32 device_id;
1228 void *session_id;
1229 enum vidc_status status;
1230 u32 size;
1231 union {
1232 struct vidc_resource_hdr resource_hdr;
1233 struct vidc_buffer_addr_info buffer_addr_info;
1234 struct vidc_frame_plane_config frame_plane_config;
1235 struct vidc_uncompressed_frame_config uncompressed_frame_config;
1236 struct vidc_frame_data frame_data;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001237 struct vidc_hal_ebd ebd;
1238 struct vidc_hal_fbd fbd;
1239 struct vidc_hal_sys_init_done sys_init_done;
1240 struct vidc_hal_session_init_done session_init_done;
1241 struct hal_buffer_info buffer_info;
1242 union hal_get_property property;
1243 enum hal_flush flush_type;
1244 } data;
1245};
1246
Praneeth Paladugu520e9b22017-05-31 13:25:18 -07001247struct hal_index_extradata_input_crop_payload {
1248 u32 size;
1249 u32 version;
1250 u32 port_index;
1251 u32 left;
1252 u32 top;
1253 u32 width;
1254 u32 height;
1255};
1256
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001257struct msm_vidc_cb_event {
1258 u32 device_id;
1259 void *session_id;
1260 enum vidc_status status;
1261 u32 height;
1262 u32 width;
1263 enum msm_vidc_pixel_depth bit_depth;
1264 u32 hal_event_type;
Maheshwar Ajjac6407c02017-06-09 18:53:20 -07001265 u32 packet_buffer;
1266 u32 extra_data_buffer;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001267 u32 pic_struct;
1268 u32 colour_space;
Chinmay Sawarkarb3c6ccb2017-02-23 18:01:32 -08001269 u32 profile;
1270 u32 level;
1271 u32 entropy_mode;
Praneeth Paladugu520e9b22017-05-31 13:25:18 -07001272 u32 capture_buf_count;
1273 struct hal_index_extradata_input_crop_payload crop_data;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001274};
1275
1276struct msm_vidc_cb_data_done {
1277 u32 device_id;
1278 void *session_id;
1279 enum vidc_status status;
1280 u32 size;
1281 u32 clnt_data;
1282 union {
1283 struct vidc_hal_ebd input_done;
1284 struct vidc_hal_fbd output_done;
1285 };
1286};
1287
1288struct msm_vidc_cb_info {
1289 enum hal_command_response response_type;
1290 union {
1291 struct msm_vidc_cb_cmd_done cmd;
1292 struct msm_vidc_cb_event event;
1293 struct msm_vidc_cb_data_done data;
1294 } response;
1295};
1296
1297enum msm_vidc_hfi_type {
1298 VIDC_HFI_VENUS,
1299};
1300
1301enum msm_vidc_thermal_level {
1302 VIDC_THERMAL_NORMAL = 0,
1303 VIDC_THERMAL_LOW,
1304 VIDC_THERMAL_HIGH,
1305 VIDC_THERMAL_CRITICAL
1306};
1307
1308enum vidc_vote_data_session {
1309 VIDC_BUS_VOTE_DATA_SESSION_INVALID = 0,
1310 /*
1311 * No declarations exist. Values generated by VIDC_VOTE_DATA_SESSION_VAL
1312 * describe the enumerations e.g.:
1313 *
1314 * enum vidc_bus_vote_data_session_type h264_decoder_session =
1315 * VIDC_VOTE_DATA_SESSION_VAL(HAL_VIDEO_CODEC_H264,
1316 * HAL_VIDEO_DOMAIN_DECODER);
1317 */
1318};
1319
1320/*
1321 * Careful modifying VIDC_VOTE_DATA_SESSION_VAL().
1322 *
1323 * This macro assigns two bits to each codec: the lower bit denoting the codec
1324 * type, and the higher bit denoting session type.
1325 */
1326static inline enum vidc_vote_data_session VIDC_VOTE_DATA_SESSION_VAL(
1327 enum hal_video_codec c, enum hal_domain d) {
1328 if (d != HAL_VIDEO_DOMAIN_ENCODER && d != HAL_VIDEO_DOMAIN_DECODER)
1329 return VIDC_BUS_VOTE_DATA_SESSION_INVALID;
1330
1331 return (1 << ilog2(c) * 2) | ((d - 1) << (ilog2(c) * 2 + 1));
1332}
1333
1334struct msm_vidc_gov_data {
1335 struct vidc_bus_vote_data *data;
1336 u32 data_count;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001337};
1338
1339enum msm_vidc_power_mode {
1340 VIDC_POWER_NORMAL = 0,
1341 VIDC_POWER_LOW,
1342 VIDC_POWER_TURBO
1343};
1344
1345struct vidc_bus_vote_data {
1346 enum hal_domain domain;
1347 enum hal_video_codec codec;
1348 enum hal_uncompressed_format color_formats[2];
1349 int num_formats; /* 1 = DPB-OPB unified; 2 = split */
Praneeth Paladugu319e7922017-03-16 11:09:06 -07001350 int input_height, input_width, fps;
1351 int output_height, output_width;
1352 int compression_ratio;
1353 int complexity_factor;
Praneeth Paladugu7722b4e2017-07-07 11:01:56 -07001354 int input_cr;
Praneeth Paladugu04e77722017-06-21 11:38:31 -07001355 bool use_dpb_read;
Praneeth Paladugu319e7922017-03-16 11:09:06 -07001356 unsigned int lcu_size;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001357 enum msm_vidc_power_mode power_mode;
Praneeth Paladugu319e7922017-03-16 11:09:06 -07001358 enum hal_work_mode work_mode;
Shivendra Kakraniaac170f92017-05-22 13:08:09 -07001359 bool use_sys_cache;
Praneeth Paladugu7722b4e2017-07-07 11:01:56 -07001360 bool b_frames_enabled;
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001361};
1362
1363struct vidc_clk_scale_data {
1364 enum vidc_vote_data_session session[VIDC_MAX_SESSIONS];
1365 enum msm_vidc_power_mode power_mode[VIDC_MAX_SESSIONS];
1366 u32 load[VIDC_MAX_SESSIONS];
1367 int num_sessions;
1368};
1369
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001370struct hal_cmd_sys_get_property_packet {
1371 u32 size;
1372 u32 packet_type;
1373 u32 num_properties;
1374 u32 rg_property_data[1];
1375};
1376
1377#define call_hfi_op(q, op, args...) \
1378 (((q) && (q)->op) ? ((q)->op(args)) : 0)
1379
1380struct hfi_device {
1381 void *hfi_device_data;
1382
1383 /*Add function pointers for all the hfi functions below*/
1384 int (*core_init)(void *device);
1385 int (*core_release)(void *device);
1386 int (*core_ping)(void *device);
1387 int (*core_trigger_ssr)(void *device, enum hal_ssr_trigger_type);
1388 int (*session_init)(void *device, void *session_id,
1389 enum hal_domain session_type, enum hal_video_codec codec_type,
1390 void **new_session);
1391 int (*session_end)(void *session);
1392 int (*session_abort)(void *session);
1393 int (*session_set_buffers)(void *sess,
1394 struct vidc_buffer_addr_info *buffer_info);
1395 int (*session_release_buffers)(void *sess,
1396 struct vidc_buffer_addr_info *buffer_info);
1397 int (*session_load_res)(void *sess);
1398 int (*session_release_res)(void *sess);
1399 int (*session_start)(void *sess);
1400 int (*session_continue)(void *sess);
1401 int (*session_stop)(void *sess);
1402 int (*session_etb)(void *sess, struct vidc_frame_data *input_frame);
1403 int (*session_ftb)(void *sess, struct vidc_frame_data *output_frame);
1404 int (*session_process_batch)(void *sess,
1405 int num_etbs, struct vidc_frame_data etbs[],
1406 int num_ftbs, struct vidc_frame_data ftbs[]);
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001407 int (*session_get_buf_req)(void *sess);
1408 int (*session_flush)(void *sess, enum hal_flush flush_mode);
1409 int (*session_set_property)(void *sess, enum hal_property ptype,
1410 void *pdata);
1411 int (*session_get_property)(void *sess, enum hal_property ptype);
Praneeth Paladugub71968b2015-08-19 20:47:57 -07001412 int (*scale_clocks)(void *dev, u32 freq);
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001413 int (*vote_bus)(void *dev, struct vidc_bus_vote_data *data,
1414 int num_data);
1415 int (*get_fw_info)(void *dev, struct hal_fw_info *fw_info);
1416 int (*session_clean)(void *sess);
1417 int (*get_core_capabilities)(void *dev);
1418 int (*suspend)(void *dev);
1419 int (*flush_debug_queue)(void *dev);
Maheshwar Ajja9ff81a22017-08-05 13:25:55 -07001420 int (*noc_error_info)(void *dev);
Praneeth Paladugu6e6fbdb2017-01-16 15:43:01 -08001421 enum hal_default_properties (*get_default_properties)(void *dev);
1422};
1423
1424typedef void (*hfi_cmd_response_callback) (enum hal_command_response cmd,
1425 void *data);
1426typedef void (*msm_vidc_callback) (u32 response, void *callback);
1427
1428struct hfi_device *vidc_hfi_initialize(enum msm_vidc_hfi_type hfi_type,
1429 u32 device_id, struct msm_vidc_platform_resources *res,
1430 hfi_cmd_response_callback callback);
1431void vidc_hfi_deinitialize(enum msm_vidc_hfi_type hfi_type,
1432 struct hfi_device *hdev);
1433u32 vidc_get_hfi_domain(enum hal_domain hal_domain);
1434u32 vidc_get_hfi_codec(enum hal_video_codec hal_codec);
1435enum hal_domain vidc_get_hal_domain(u32 hfi_domain);
1436enum hal_video_codec vidc_get_hal_codec(u32 hfi_codec);
1437
1438#endif /*__VIDC_HFI_API_H__ */