Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2008 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
| 21 | * IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Eric Anholt <eric@anholt.net> |
| 25 | * Keith Packard <keithp@keithp.com> |
| 26 | * |
| 27 | */ |
| 28 | |
| 29 | #include <linux/seq_file.h> |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 30 | #include <linux/debugfs.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 31 | #include <linux/slab.h> |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 32 | #include "drmP.h" |
| 33 | #include "drm.h" |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 34 | #include "intel_drv.h" |
Chris Wilson | e5c6526 | 2010-11-01 11:35:28 +0000 | [diff] [blame] | 35 | #include "intel_ringbuffer.h" |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 36 | #include "i915_drm.h" |
| 37 | #include "i915_drv.h" |
| 38 | |
| 39 | #define DRM_I915_RING_DEBUG 1 |
| 40 | |
| 41 | |
| 42 | #if defined(CONFIG_DEBUG_FS) |
| 43 | |
Chris Wilson | f13d3f7 | 2010-09-20 17:36:15 +0100 | [diff] [blame] | 44 | enum { |
Chris Wilson | 69dc498 | 2010-10-19 10:36:51 +0100 | [diff] [blame] | 45 | ACTIVE_LIST, |
Chris Wilson | f13d3f7 | 2010-09-20 17:36:15 +0100 | [diff] [blame] | 46 | FLUSHING_LIST, |
| 47 | INACTIVE_LIST, |
Chris Wilson | d21d597 | 2010-09-26 11:19:33 +0100 | [diff] [blame] | 48 | PINNED_LIST, |
| 49 | DEFERRED_FREE_LIST, |
Chris Wilson | f13d3f7 | 2010-09-20 17:36:15 +0100 | [diff] [blame] | 50 | }; |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 51 | |
Chris Wilson | 70d39fe | 2010-08-25 16:03:34 +0100 | [diff] [blame] | 52 | static const char *yesno(int v) |
| 53 | { |
| 54 | return v ? "yes" : "no"; |
| 55 | } |
| 56 | |
| 57 | static int i915_capabilities(struct seq_file *m, void *data) |
| 58 | { |
| 59 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 60 | struct drm_device *dev = node->minor->dev; |
| 61 | const struct intel_device_info *info = INTEL_INFO(dev); |
| 62 | |
| 63 | seq_printf(m, "gen: %d\n", info->gen); |
| 64 | #define B(x) seq_printf(m, #x ": %s\n", yesno(info->x)) |
| 65 | B(is_mobile); |
Chris Wilson | 70d39fe | 2010-08-25 16:03:34 +0100 | [diff] [blame] | 66 | B(is_i85x); |
| 67 | B(is_i915g); |
Chris Wilson | 70d39fe | 2010-08-25 16:03:34 +0100 | [diff] [blame] | 68 | B(is_i945gm); |
Chris Wilson | 70d39fe | 2010-08-25 16:03:34 +0100 | [diff] [blame] | 69 | B(is_g33); |
| 70 | B(need_gfx_hws); |
| 71 | B(is_g4x); |
| 72 | B(is_pineview); |
| 73 | B(is_broadwater); |
| 74 | B(is_crestline); |
Chris Wilson | 70d39fe | 2010-08-25 16:03:34 +0100 | [diff] [blame] | 75 | B(has_fbc); |
Chris Wilson | 70d39fe | 2010-08-25 16:03:34 +0100 | [diff] [blame] | 76 | B(has_pipe_cxsr); |
| 77 | B(has_hotplug); |
| 78 | B(cursor_needs_physical); |
| 79 | B(has_overlay); |
| 80 | B(overlay_needs_physical); |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 81 | B(supports_tv); |
Chris Wilson | 549f736 | 2010-10-19 11:19:32 +0100 | [diff] [blame] | 82 | B(has_bsd_ring); |
| 83 | B(has_blt_ring); |
Chris Wilson | 70d39fe | 2010-08-25 16:03:34 +0100 | [diff] [blame] | 84 | #undef B |
| 85 | |
| 86 | return 0; |
| 87 | } |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 88 | |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 89 | static const char *get_pin_flag(struct drm_i915_gem_object *obj) |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 90 | { |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 91 | if (obj->user_pin_count > 0) |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 92 | return "P"; |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 93 | else if (obj->pin_count > 0) |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 94 | return "p"; |
| 95 | else |
| 96 | return " "; |
| 97 | } |
| 98 | |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 99 | static const char *get_tiling_flag(struct drm_i915_gem_object *obj) |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 100 | { |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 101 | switch (obj->tiling_mode) { |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 102 | default: |
| 103 | case I915_TILING_NONE: return " "; |
| 104 | case I915_TILING_X: return "X"; |
| 105 | case I915_TILING_Y: return "Y"; |
| 106 | } |
| 107 | } |
| 108 | |
Chris Wilson | 93dfb40 | 2011-03-29 16:59:50 -0700 | [diff] [blame] | 109 | static const char *cache_level_str(int type) |
Chris Wilson | 08c1832 | 2011-01-10 00:00:24 +0000 | [diff] [blame] | 110 | { |
| 111 | switch (type) { |
Chris Wilson | 93dfb40 | 2011-03-29 16:59:50 -0700 | [diff] [blame] | 112 | case I915_CACHE_NONE: return " uncached"; |
| 113 | case I915_CACHE_LLC: return " snooped (LLC)"; |
| 114 | case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)"; |
Chris Wilson | 08c1832 | 2011-01-10 00:00:24 +0000 | [diff] [blame] | 115 | default: return ""; |
| 116 | } |
| 117 | } |
| 118 | |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 119 | static void |
| 120 | describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj) |
| 121 | { |
Chris Wilson | 08c1832 | 2011-01-10 00:00:24 +0000 | [diff] [blame] | 122 | seq_printf(m, "%p: %s%s %8zd %04x %04x %d %d%s%s%s", |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 123 | &obj->base, |
| 124 | get_pin_flag(obj), |
| 125 | get_tiling_flag(obj), |
| 126 | obj->base.size, |
| 127 | obj->base.read_domains, |
| 128 | obj->base.write_domain, |
| 129 | obj->last_rendering_seqno, |
Chris Wilson | caea747 | 2010-11-12 13:53:37 +0000 | [diff] [blame] | 130 | obj->last_fenced_seqno, |
Chris Wilson | 93dfb40 | 2011-03-29 16:59:50 -0700 | [diff] [blame] | 131 | cache_level_str(obj->cache_level), |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 132 | obj->dirty ? " dirty" : "", |
| 133 | obj->madv == I915_MADV_DONTNEED ? " purgeable" : ""); |
| 134 | if (obj->base.name) |
| 135 | seq_printf(m, " (name: %d)", obj->base.name); |
| 136 | if (obj->fence_reg != I915_FENCE_REG_NONE) |
| 137 | seq_printf(m, " (fence: %d)", obj->fence_reg); |
| 138 | if (obj->gtt_space != NULL) |
Chris Wilson | a00b10c | 2010-09-24 21:15:47 +0100 | [diff] [blame] | 139 | seq_printf(m, " (gtt offset: %08x, size: %08x)", |
| 140 | obj->gtt_offset, (unsigned int)obj->gtt_space->size); |
Chris Wilson | 6299f99 | 2010-11-24 12:23:44 +0000 | [diff] [blame] | 141 | if (obj->pin_mappable || obj->fault_mappable) { |
| 142 | char s[3], *t = s; |
| 143 | if (obj->pin_mappable) |
| 144 | *t++ = 'p'; |
| 145 | if (obj->fault_mappable) |
| 146 | *t++ = 'f'; |
| 147 | *t = '\0'; |
| 148 | seq_printf(m, " (%s mappable)", s); |
| 149 | } |
Chris Wilson | 69dc498 | 2010-10-19 10:36:51 +0100 | [diff] [blame] | 150 | if (obj->ring != NULL) |
| 151 | seq_printf(m, " (%s)", obj->ring->name); |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 152 | } |
| 153 | |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 154 | static int i915_gem_object_list_info(struct seq_file *m, void *data) |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 155 | { |
| 156 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 157 | uintptr_t list = (uintptr_t) node->info_ent->data; |
| 158 | struct list_head *head; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 159 | struct drm_device *dev = node->minor->dev; |
| 160 | drm_i915_private_t *dev_priv = dev->dev_private; |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 161 | struct drm_i915_gem_object *obj; |
Chris Wilson | 8f2480f | 2010-09-26 11:44:19 +0100 | [diff] [blame] | 162 | size_t total_obj_size, total_gtt_size; |
| 163 | int count, ret; |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 164 | |
| 165 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 166 | if (ret) |
| 167 | return ret; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 168 | |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 169 | switch (list) { |
| 170 | case ACTIVE_LIST: |
| 171 | seq_printf(m, "Active:\n"); |
Chris Wilson | 69dc498 | 2010-10-19 10:36:51 +0100 | [diff] [blame] | 172 | head = &dev_priv->mm.active_list; |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 173 | break; |
| 174 | case INACTIVE_LIST: |
Ben Gamari | a17458f | 2009-07-01 15:01:36 -0400 | [diff] [blame] | 175 | seq_printf(m, "Inactive:\n"); |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 176 | head = &dev_priv->mm.inactive_list; |
| 177 | break; |
Chris Wilson | f13d3f7 | 2010-09-20 17:36:15 +0100 | [diff] [blame] | 178 | case PINNED_LIST: |
| 179 | seq_printf(m, "Pinned:\n"); |
| 180 | head = &dev_priv->mm.pinned_list; |
| 181 | break; |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 182 | case FLUSHING_LIST: |
| 183 | seq_printf(m, "Flushing:\n"); |
| 184 | head = &dev_priv->mm.flushing_list; |
| 185 | break; |
Chris Wilson | d21d597 | 2010-09-26 11:19:33 +0100 | [diff] [blame] | 186 | case DEFERRED_FREE_LIST: |
| 187 | seq_printf(m, "Deferred free:\n"); |
| 188 | head = &dev_priv->mm.deferred_free_list; |
| 189 | break; |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 190 | default: |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 191 | mutex_unlock(&dev->struct_mutex); |
| 192 | return -EINVAL; |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 193 | } |
| 194 | |
Chris Wilson | 8f2480f | 2010-09-26 11:44:19 +0100 | [diff] [blame] | 195 | total_obj_size = total_gtt_size = count = 0; |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 196 | list_for_each_entry(obj, head, mm_list) { |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 197 | seq_printf(m, " "); |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 198 | describe_obj(m, obj); |
Eric Anholt | f4ceda8 | 2009-02-17 23:53:41 -0800 | [diff] [blame] | 199 | seq_printf(m, "\n"); |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 200 | total_obj_size += obj->base.size; |
| 201 | total_gtt_size += obj->gtt_space->size; |
Chris Wilson | 8f2480f | 2010-09-26 11:44:19 +0100 | [diff] [blame] | 202 | count++; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 203 | } |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 204 | mutex_unlock(&dev->struct_mutex); |
Carl Worth | 5e118f4 | 2009-03-20 11:54:25 -0700 | [diff] [blame] | 205 | |
Chris Wilson | 8f2480f | 2010-09-26 11:44:19 +0100 | [diff] [blame] | 206 | seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n", |
| 207 | count, total_obj_size, total_gtt_size); |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 208 | return 0; |
| 209 | } |
| 210 | |
Chris Wilson | 6299f99 | 2010-11-24 12:23:44 +0000 | [diff] [blame] | 211 | #define count_objects(list, member) do { \ |
| 212 | list_for_each_entry(obj, list, member) { \ |
| 213 | size += obj->gtt_space->size; \ |
| 214 | ++count; \ |
| 215 | if (obj->map_and_fenceable) { \ |
| 216 | mappable_size += obj->gtt_space->size; \ |
| 217 | ++mappable_count; \ |
| 218 | } \ |
| 219 | } \ |
| 220 | } while(0) |
| 221 | |
Chris Wilson | 73aa808 | 2010-09-30 11:46:12 +0100 | [diff] [blame] | 222 | static int i915_gem_object_info(struct seq_file *m, void* data) |
| 223 | { |
| 224 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 225 | struct drm_device *dev = node->minor->dev; |
| 226 | struct drm_i915_private *dev_priv = dev->dev_private; |
Chris Wilson | 6299f99 | 2010-11-24 12:23:44 +0000 | [diff] [blame] | 227 | u32 count, mappable_count; |
| 228 | size_t size, mappable_size; |
| 229 | struct drm_i915_gem_object *obj; |
Chris Wilson | 73aa808 | 2010-09-30 11:46:12 +0100 | [diff] [blame] | 230 | int ret; |
| 231 | |
| 232 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 233 | if (ret) |
| 234 | return ret; |
| 235 | |
Chris Wilson | 6299f99 | 2010-11-24 12:23:44 +0000 | [diff] [blame] | 236 | seq_printf(m, "%u objects, %zu bytes\n", |
| 237 | dev_priv->mm.object_count, |
| 238 | dev_priv->mm.object_memory); |
| 239 | |
| 240 | size = count = mappable_size = mappable_count = 0; |
| 241 | count_objects(&dev_priv->mm.gtt_list, gtt_list); |
| 242 | seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n", |
| 243 | count, mappable_count, size, mappable_size); |
| 244 | |
| 245 | size = count = mappable_size = mappable_count = 0; |
| 246 | count_objects(&dev_priv->mm.active_list, mm_list); |
| 247 | count_objects(&dev_priv->mm.flushing_list, mm_list); |
| 248 | seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n", |
| 249 | count, mappable_count, size, mappable_size); |
| 250 | |
| 251 | size = count = mappable_size = mappable_count = 0; |
| 252 | count_objects(&dev_priv->mm.pinned_list, mm_list); |
| 253 | seq_printf(m, " %u [%u] pinned objects, %zu [%zu] bytes\n", |
| 254 | count, mappable_count, size, mappable_size); |
| 255 | |
| 256 | size = count = mappable_size = mappable_count = 0; |
| 257 | count_objects(&dev_priv->mm.inactive_list, mm_list); |
| 258 | seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n", |
| 259 | count, mappable_count, size, mappable_size); |
| 260 | |
| 261 | size = count = mappable_size = mappable_count = 0; |
| 262 | count_objects(&dev_priv->mm.deferred_free_list, mm_list); |
| 263 | seq_printf(m, " %u [%u] freed objects, %zu [%zu] bytes\n", |
| 264 | count, mappable_count, size, mappable_size); |
| 265 | |
| 266 | size = count = mappable_size = mappable_count = 0; |
| 267 | list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) { |
| 268 | if (obj->fault_mappable) { |
| 269 | size += obj->gtt_space->size; |
| 270 | ++count; |
| 271 | } |
| 272 | if (obj->pin_mappable) { |
| 273 | mappable_size += obj->gtt_space->size; |
| 274 | ++mappable_count; |
| 275 | } |
| 276 | } |
| 277 | seq_printf(m, "%u pinned mappable objects, %zu bytes\n", |
| 278 | mappable_count, mappable_size); |
| 279 | seq_printf(m, "%u fault mappable objects, %zu bytes\n", |
| 280 | count, size); |
| 281 | |
| 282 | seq_printf(m, "%zu [%zu] gtt total\n", |
| 283 | dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total); |
Chris Wilson | 73aa808 | 2010-09-30 11:46:12 +0100 | [diff] [blame] | 284 | |
| 285 | mutex_unlock(&dev->struct_mutex); |
| 286 | |
| 287 | return 0; |
| 288 | } |
| 289 | |
Chris Wilson | 08c1832 | 2011-01-10 00:00:24 +0000 | [diff] [blame] | 290 | static int i915_gem_gtt_info(struct seq_file *m, void* data) |
| 291 | { |
| 292 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 293 | struct drm_device *dev = node->minor->dev; |
| 294 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 295 | struct drm_i915_gem_object *obj; |
| 296 | size_t total_obj_size, total_gtt_size; |
| 297 | int count, ret; |
| 298 | |
| 299 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 300 | if (ret) |
| 301 | return ret; |
| 302 | |
| 303 | total_obj_size = total_gtt_size = count = 0; |
| 304 | list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) { |
| 305 | seq_printf(m, " "); |
| 306 | describe_obj(m, obj); |
| 307 | seq_printf(m, "\n"); |
| 308 | total_obj_size += obj->base.size; |
| 309 | total_gtt_size += obj->gtt_space->size; |
| 310 | count++; |
| 311 | } |
| 312 | |
| 313 | mutex_unlock(&dev->struct_mutex); |
| 314 | |
| 315 | seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n", |
| 316 | count, total_obj_size, total_gtt_size); |
| 317 | |
| 318 | return 0; |
| 319 | } |
| 320 | |
Chris Wilson | 73aa808 | 2010-09-30 11:46:12 +0100 | [diff] [blame] | 321 | |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 322 | static int i915_gem_pageflip_info(struct seq_file *m, void *data) |
| 323 | { |
| 324 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 325 | struct drm_device *dev = node->minor->dev; |
| 326 | unsigned long flags; |
| 327 | struct intel_crtc *crtc; |
| 328 | |
| 329 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) { |
Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 330 | const char pipe = pipe_name(crtc->pipe); |
| 331 | const char plane = plane_name(crtc->plane); |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 332 | struct intel_unpin_work *work; |
| 333 | |
| 334 | spin_lock_irqsave(&dev->event_lock, flags); |
| 335 | work = crtc->unpin_work; |
| 336 | if (work == NULL) { |
Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 337 | seq_printf(m, "No flip due on pipe %c (plane %c)\n", |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 338 | pipe, plane); |
| 339 | } else { |
| 340 | if (!work->pending) { |
Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 341 | seq_printf(m, "Flip queued on pipe %c (plane %c)\n", |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 342 | pipe, plane); |
| 343 | } else { |
Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 344 | seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n", |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 345 | pipe, plane); |
| 346 | } |
| 347 | if (work->enable_stall_check) |
| 348 | seq_printf(m, "Stall check enabled, "); |
| 349 | else |
| 350 | seq_printf(m, "Stall check waiting for page flip ioctl, "); |
| 351 | seq_printf(m, "%d prepares\n", work->pending); |
| 352 | |
| 353 | if (work->old_fb_obj) { |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 354 | struct drm_i915_gem_object *obj = work->old_fb_obj; |
| 355 | if (obj) |
| 356 | seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset); |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 357 | } |
| 358 | if (work->pending_flip_obj) { |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 359 | struct drm_i915_gem_object *obj = work->pending_flip_obj; |
| 360 | if (obj) |
| 361 | seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset); |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 362 | } |
| 363 | } |
| 364 | spin_unlock_irqrestore(&dev->event_lock, flags); |
| 365 | } |
| 366 | |
| 367 | return 0; |
| 368 | } |
| 369 | |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 370 | static int i915_gem_request_info(struct seq_file *m, void *data) |
| 371 | { |
| 372 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 373 | struct drm_device *dev = node->minor->dev; |
| 374 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 375 | struct drm_i915_gem_request *gem_request; |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 376 | int ret, count; |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 377 | |
| 378 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 379 | if (ret) |
| 380 | return ret; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 381 | |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 382 | count = 0; |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 383 | if (!list_empty(&dev_priv->ring[RCS].request_list)) { |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 384 | seq_printf(m, "Render requests:\n"); |
| 385 | list_for_each_entry(gem_request, |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 386 | &dev_priv->ring[RCS].request_list, |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 387 | list) { |
| 388 | seq_printf(m, " %d @ %d\n", |
| 389 | gem_request->seqno, |
| 390 | (int) (jiffies - gem_request->emitted_jiffies)); |
| 391 | } |
| 392 | count++; |
| 393 | } |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 394 | if (!list_empty(&dev_priv->ring[VCS].request_list)) { |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 395 | seq_printf(m, "BSD requests:\n"); |
| 396 | list_for_each_entry(gem_request, |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 397 | &dev_priv->ring[VCS].request_list, |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 398 | list) { |
| 399 | seq_printf(m, " %d @ %d\n", |
| 400 | gem_request->seqno, |
| 401 | (int) (jiffies - gem_request->emitted_jiffies)); |
| 402 | } |
| 403 | count++; |
| 404 | } |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 405 | if (!list_empty(&dev_priv->ring[BCS].request_list)) { |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 406 | seq_printf(m, "BLT requests:\n"); |
| 407 | list_for_each_entry(gem_request, |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 408 | &dev_priv->ring[BCS].request_list, |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 409 | list) { |
| 410 | seq_printf(m, " %d @ %d\n", |
| 411 | gem_request->seqno, |
| 412 | (int) (jiffies - gem_request->emitted_jiffies)); |
| 413 | } |
| 414 | count++; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 415 | } |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 416 | mutex_unlock(&dev->struct_mutex); |
| 417 | |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 418 | if (count == 0) |
| 419 | seq_printf(m, "No requests\n"); |
| 420 | |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 421 | return 0; |
| 422 | } |
| 423 | |
Chris Wilson | b222349 | 2010-10-27 15:27:33 +0100 | [diff] [blame] | 424 | static void i915_ring_seqno_info(struct seq_file *m, |
| 425 | struct intel_ring_buffer *ring) |
| 426 | { |
| 427 | if (ring->get_seqno) { |
| 428 | seq_printf(m, "Current sequence (%s): %d\n", |
| 429 | ring->name, ring->get_seqno(ring)); |
| 430 | seq_printf(m, "Waiter sequence (%s): %d\n", |
| 431 | ring->name, ring->waiting_seqno); |
| 432 | seq_printf(m, "IRQ sequence (%s): %d\n", |
| 433 | ring->name, ring->irq_seqno); |
| 434 | } |
| 435 | } |
| 436 | |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 437 | static int i915_gem_seqno_info(struct seq_file *m, void *data) |
| 438 | { |
| 439 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 440 | struct drm_device *dev = node->minor->dev; |
| 441 | drm_i915_private_t *dev_priv = dev->dev_private; |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 442 | int ret, i; |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 443 | |
| 444 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 445 | if (ret) |
| 446 | return ret; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 447 | |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 448 | for (i = 0; i < I915_NUM_RINGS; i++) |
| 449 | i915_ring_seqno_info(m, &dev_priv->ring[i]); |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 450 | |
| 451 | mutex_unlock(&dev->struct_mutex); |
| 452 | |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 453 | return 0; |
| 454 | } |
| 455 | |
| 456 | |
| 457 | static int i915_interrupt_info(struct seq_file *m, void *data) |
| 458 | { |
| 459 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 460 | struct drm_device *dev = node->minor->dev; |
| 461 | drm_i915_private_t *dev_priv = dev->dev_private; |
Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 462 | int ret, i, pipe; |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 463 | |
| 464 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 465 | if (ret) |
| 466 | return ret; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 467 | |
Eric Anholt | bad720f | 2009-10-22 16:11:14 -0700 | [diff] [blame] | 468 | if (!HAS_PCH_SPLIT(dev)) { |
Zhenyu Wang | 5f6a169 | 2009-08-10 21:37:24 +0800 | [diff] [blame] | 469 | seq_printf(m, "Interrupt enable: %08x\n", |
| 470 | I915_READ(IER)); |
| 471 | seq_printf(m, "Interrupt identity: %08x\n", |
| 472 | I915_READ(IIR)); |
| 473 | seq_printf(m, "Interrupt mask: %08x\n", |
| 474 | I915_READ(IMR)); |
Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 475 | for_each_pipe(pipe) |
| 476 | seq_printf(m, "Pipe %c stat: %08x\n", |
| 477 | pipe_name(pipe), |
| 478 | I915_READ(PIPESTAT(pipe))); |
Zhenyu Wang | 5f6a169 | 2009-08-10 21:37:24 +0800 | [diff] [blame] | 479 | } else { |
| 480 | seq_printf(m, "North Display Interrupt enable: %08x\n", |
| 481 | I915_READ(DEIER)); |
| 482 | seq_printf(m, "North Display Interrupt identity: %08x\n", |
| 483 | I915_READ(DEIIR)); |
| 484 | seq_printf(m, "North Display Interrupt mask: %08x\n", |
| 485 | I915_READ(DEIMR)); |
| 486 | seq_printf(m, "South Display Interrupt enable: %08x\n", |
| 487 | I915_READ(SDEIER)); |
| 488 | seq_printf(m, "South Display Interrupt identity: %08x\n", |
| 489 | I915_READ(SDEIIR)); |
| 490 | seq_printf(m, "South Display Interrupt mask: %08x\n", |
| 491 | I915_READ(SDEIMR)); |
| 492 | seq_printf(m, "Graphics Interrupt enable: %08x\n", |
| 493 | I915_READ(GTIER)); |
| 494 | seq_printf(m, "Graphics Interrupt identity: %08x\n", |
| 495 | I915_READ(GTIIR)); |
| 496 | seq_printf(m, "Graphics Interrupt mask: %08x\n", |
| 497 | I915_READ(GTIMR)); |
| 498 | } |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 499 | seq_printf(m, "Interrupts received: %d\n", |
| 500 | atomic_read(&dev_priv->irq_received)); |
Chris Wilson | 9862e60 | 2011-01-04 22:22:17 +0000 | [diff] [blame] | 501 | for (i = 0; i < I915_NUM_RINGS; i++) { |
| 502 | if (IS_GEN6(dev)) { |
| 503 | seq_printf(m, "Graphics Interrupt mask (%s): %08x\n", |
| 504 | dev_priv->ring[i].name, |
| 505 | I915_READ_IMR(&dev_priv->ring[i])); |
| 506 | } |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 507 | i915_ring_seqno_info(m, &dev_priv->ring[i]); |
Chris Wilson | 9862e60 | 2011-01-04 22:22:17 +0000 | [diff] [blame] | 508 | } |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 509 | mutex_unlock(&dev->struct_mutex); |
| 510 | |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 511 | return 0; |
| 512 | } |
| 513 | |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 514 | static int i915_gem_fence_regs_info(struct seq_file *m, void *data) |
| 515 | { |
| 516 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 517 | struct drm_device *dev = node->minor->dev; |
| 518 | drm_i915_private_t *dev_priv = dev->dev_private; |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 519 | int i, ret; |
| 520 | |
| 521 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 522 | if (ret) |
| 523 | return ret; |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 524 | |
| 525 | seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start); |
| 526 | seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs); |
| 527 | for (i = 0; i < dev_priv->num_fence_regs; i++) { |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 528 | struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj; |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 529 | |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 530 | seq_printf(m, "Fenced object[%2d] = ", i); |
| 531 | if (obj == NULL) |
| 532 | seq_printf(m, "unused"); |
| 533 | else |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 534 | describe_obj(m, obj); |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 535 | seq_printf(m, "\n"); |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 536 | } |
| 537 | |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 538 | mutex_unlock(&dev->struct_mutex); |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 539 | return 0; |
| 540 | } |
| 541 | |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 542 | static int i915_hws_info(struct seq_file *m, void *data) |
| 543 | { |
| 544 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 545 | struct drm_device *dev = node->minor->dev; |
| 546 | drm_i915_private_t *dev_priv = dev->dev_private; |
Chris Wilson | 4066c0a | 2010-10-29 21:00:54 +0100 | [diff] [blame] | 547 | struct intel_ring_buffer *ring; |
Chris Wilson | 311bd68 | 2011-01-13 19:06:50 +0000 | [diff] [blame] | 548 | const volatile u32 __iomem *hws; |
Chris Wilson | 4066c0a | 2010-10-29 21:00:54 +0100 | [diff] [blame] | 549 | int i; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 550 | |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 551 | ring = &dev_priv->ring[(uintptr_t)node->info_ent->data]; |
Chris Wilson | 311bd68 | 2011-01-13 19:06:50 +0000 | [diff] [blame] | 552 | hws = (volatile u32 __iomem *)ring->status_page.page_addr; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 553 | if (hws == NULL) |
| 554 | return 0; |
| 555 | |
| 556 | for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) { |
| 557 | seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n", |
| 558 | i * 4, |
| 559 | hws[i], hws[i + 1], hws[i + 2], hws[i + 3]); |
| 560 | } |
| 561 | return 0; |
| 562 | } |
| 563 | |
Chris Wilson | 5cdf588 | 2010-09-27 15:51:07 +0100 | [diff] [blame] | 564 | static void i915_dump_object(struct seq_file *m, |
| 565 | struct io_mapping *mapping, |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 566 | struct drm_i915_gem_object *obj) |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 567 | { |
Chris Wilson | 5cdf588 | 2010-09-27 15:51:07 +0100 | [diff] [blame] | 568 | int page, page_count, i; |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 569 | |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 570 | page_count = obj->base.size / PAGE_SIZE; |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 571 | for (page = 0; page < page_count; page++) { |
Chris Wilson | 5cdf588 | 2010-09-27 15:51:07 +0100 | [diff] [blame] | 572 | u32 *mem = io_mapping_map_wc(mapping, |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 573 | obj->gtt_offset + page * PAGE_SIZE); |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 574 | for (i = 0; i < PAGE_SIZE; i += 4) |
| 575 | seq_printf(m, "%08x : %08x\n", i, mem[i / 4]); |
Chris Wilson | 5cdf588 | 2010-09-27 15:51:07 +0100 | [diff] [blame] | 576 | io_mapping_unmap(mem); |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 577 | } |
| 578 | } |
| 579 | |
| 580 | static int i915_batchbuffer_info(struct seq_file *m, void *data) |
| 581 | { |
| 582 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 583 | struct drm_device *dev = node->minor->dev; |
| 584 | drm_i915_private_t *dev_priv = dev->dev_private; |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 585 | struct drm_i915_gem_object *obj; |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 586 | int ret; |
| 587 | |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 588 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 589 | if (ret) |
| 590 | return ret; |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 591 | |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 592 | list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) { |
| 593 | if (obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) { |
| 594 | seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset); |
| 595 | i915_dump_object(m, dev_priv->mm.gtt_mapping, obj); |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 596 | } |
| 597 | } |
| 598 | |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 599 | mutex_unlock(&dev->struct_mutex); |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 600 | return 0; |
| 601 | } |
| 602 | |
| 603 | static int i915_ringbuffer_data(struct seq_file *m, void *data) |
| 604 | { |
| 605 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 606 | struct drm_device *dev = node->minor->dev; |
| 607 | drm_i915_private_t *dev_priv = dev->dev_private; |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 608 | struct intel_ring_buffer *ring; |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 609 | int ret; |
| 610 | |
| 611 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 612 | if (ret) |
| 613 | return ret; |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 614 | |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 615 | ring = &dev_priv->ring[(uintptr_t)node->info_ent->data]; |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 616 | if (!ring->obj) { |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 617 | seq_printf(m, "No ringbuffer setup\n"); |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 618 | } else { |
Chris Wilson | 311bd68 | 2011-01-13 19:06:50 +0000 | [diff] [blame] | 619 | const u8 __iomem *virt = ring->virtual_start; |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 620 | uint32_t off; |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 621 | |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 622 | for (off = 0; off < ring->size; off += 4) { |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 623 | uint32_t *ptr = (uint32_t *)(virt + off); |
| 624 | seq_printf(m, "%08x : %08x\n", off, *ptr); |
| 625 | } |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 626 | } |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 627 | mutex_unlock(&dev->struct_mutex); |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 628 | |
| 629 | return 0; |
| 630 | } |
| 631 | |
| 632 | static int i915_ringbuffer_info(struct seq_file *m, void *data) |
| 633 | { |
| 634 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 635 | struct drm_device *dev = node->minor->dev; |
| 636 | drm_i915_private_t *dev_priv = dev->dev_private; |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 637 | struct intel_ring_buffer *ring; |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 638 | |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 639 | ring = &dev_priv->ring[(uintptr_t)node->info_ent->data]; |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 640 | if (ring->size == 0) |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 641 | return 0; |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 642 | |
| 643 | seq_printf(m, "Ring %s:\n", ring->name); |
| 644 | seq_printf(m, " Head : %08x\n", I915_READ_HEAD(ring) & HEAD_ADDR); |
| 645 | seq_printf(m, " Tail : %08x\n", I915_READ_TAIL(ring) & TAIL_ADDR); |
| 646 | seq_printf(m, " Size : %08x\n", ring->size); |
| 647 | seq_printf(m, " Active : %08x\n", intel_ring_get_active_head(ring)); |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 648 | seq_printf(m, " NOPID : %08x\n", I915_READ_NOPID(ring)); |
| 649 | if (IS_GEN6(dev)) { |
| 650 | seq_printf(m, " Sync 0 : %08x\n", I915_READ_SYNC_0(ring)); |
| 651 | seq_printf(m, " Sync 1 : %08x\n", I915_READ_SYNC_1(ring)); |
| 652 | } |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 653 | seq_printf(m, " Control : %08x\n", I915_READ_CTL(ring)); |
| 654 | seq_printf(m, " Start : %08x\n", I915_READ_START(ring)); |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 655 | |
| 656 | return 0; |
| 657 | } |
| 658 | |
Chris Wilson | e5c6526 | 2010-11-01 11:35:28 +0000 | [diff] [blame] | 659 | static const char *ring_str(int ring) |
| 660 | { |
| 661 | switch (ring) { |
Chris Wilson | 3685092 | 2010-11-23 08:49:38 +0000 | [diff] [blame] | 662 | case RING_RENDER: return " render"; |
| 663 | case RING_BSD: return " bsd"; |
| 664 | case RING_BLT: return " blt"; |
Chris Wilson | e5c6526 | 2010-11-01 11:35:28 +0000 | [diff] [blame] | 665 | default: return ""; |
| 666 | } |
| 667 | } |
| 668 | |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 669 | static const char *pin_flag(int pinned) |
| 670 | { |
| 671 | if (pinned > 0) |
| 672 | return " P"; |
| 673 | else if (pinned < 0) |
| 674 | return " p"; |
| 675 | else |
| 676 | return ""; |
| 677 | } |
| 678 | |
| 679 | static const char *tiling_flag(int tiling) |
| 680 | { |
| 681 | switch (tiling) { |
| 682 | default: |
| 683 | case I915_TILING_NONE: return ""; |
| 684 | case I915_TILING_X: return " X"; |
| 685 | case I915_TILING_Y: return " Y"; |
| 686 | } |
| 687 | } |
| 688 | |
| 689 | static const char *dirty_flag(int dirty) |
| 690 | { |
| 691 | return dirty ? " dirty" : ""; |
| 692 | } |
| 693 | |
| 694 | static const char *purgeable_flag(int purgeable) |
| 695 | { |
| 696 | return purgeable ? " purgeable" : ""; |
| 697 | } |
| 698 | |
Chris Wilson | c724e8a | 2010-11-22 08:07:02 +0000 | [diff] [blame] | 699 | static void print_error_buffers(struct seq_file *m, |
| 700 | const char *name, |
| 701 | struct drm_i915_error_buffer *err, |
| 702 | int count) |
| 703 | { |
| 704 | seq_printf(m, "%s [%d]:\n", name, count); |
| 705 | |
| 706 | while (count--) { |
Chris Wilson | 833bcb0 | 2011-01-12 12:14:13 +0000 | [diff] [blame] | 707 | seq_printf(m, " %08x %8u %04x %04x %08x%s%s%s%s%s%s", |
Chris Wilson | c724e8a | 2010-11-22 08:07:02 +0000 | [diff] [blame] | 708 | err->gtt_offset, |
| 709 | err->size, |
| 710 | err->read_domains, |
| 711 | err->write_domain, |
| 712 | err->seqno, |
| 713 | pin_flag(err->pinned), |
| 714 | tiling_flag(err->tiling), |
| 715 | dirty_flag(err->dirty), |
| 716 | purgeable_flag(err->purgeable), |
Chris Wilson | a779e5a | 2011-01-09 21:07:49 +0000 | [diff] [blame] | 717 | ring_str(err->ring), |
Chris Wilson | 93dfb40 | 2011-03-29 16:59:50 -0700 | [diff] [blame] | 718 | cache_level_str(err->cache_level)); |
Chris Wilson | c724e8a | 2010-11-22 08:07:02 +0000 | [diff] [blame] | 719 | |
| 720 | if (err->name) |
| 721 | seq_printf(m, " (name: %d)", err->name); |
| 722 | if (err->fence_reg != I915_FENCE_REG_NONE) |
| 723 | seq_printf(m, " (fence: %d)", err->fence_reg); |
| 724 | |
| 725 | seq_printf(m, "\n"); |
| 726 | err++; |
| 727 | } |
| 728 | } |
| 729 | |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 730 | static int i915_error_state(struct seq_file *m, void *unused) |
| 731 | { |
| 732 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 733 | struct drm_device *dev = node->minor->dev; |
| 734 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 735 | struct drm_i915_error_state *error; |
| 736 | unsigned long flags; |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 737 | int i, page, offset, elt; |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 738 | |
| 739 | spin_lock_irqsave(&dev_priv->error_lock, flags); |
| 740 | if (!dev_priv->first_error) { |
| 741 | seq_printf(m, "no error state collected\n"); |
| 742 | goto out; |
| 743 | } |
| 744 | |
| 745 | error = dev_priv->first_error; |
| 746 | |
Jesse Barnes | 8a90523 | 2009-07-11 16:48:03 -0400 | [diff] [blame] | 747 | seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec, |
| 748 | error->time.tv_usec); |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 749 | seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device); |
Chris Wilson | 1d8f38f | 2010-10-29 19:00:51 +0100 | [diff] [blame] | 750 | seq_printf(m, "EIR: 0x%08x\n", error->eir); |
| 751 | seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); |
Chris Wilson | f406839 | 2010-10-27 20:36:41 +0100 | [diff] [blame] | 752 | if (INTEL_INFO(dev)->gen >= 6) { |
| 753 | seq_printf(m, "ERROR: 0x%08x\n", error->error); |
Chris Wilson | 1d8f38f | 2010-10-29 19:00:51 +0100 | [diff] [blame] | 754 | seq_printf(m, "Blitter command stream:\n"); |
| 755 | seq_printf(m, " ACTHD: 0x%08x\n", error->bcs_acthd); |
Chris Wilson | 1d8f38f | 2010-10-29 19:00:51 +0100 | [diff] [blame] | 756 | seq_printf(m, " IPEIR: 0x%08x\n", error->bcs_ipeir); |
Chris Wilson | e5c6526 | 2010-11-01 11:35:28 +0000 | [diff] [blame] | 757 | seq_printf(m, " IPEHR: 0x%08x\n", error->bcs_ipehr); |
Chris Wilson | 1d8f38f | 2010-10-29 19:00:51 +0100 | [diff] [blame] | 758 | seq_printf(m, " INSTDONE: 0x%08x\n", error->bcs_instdone); |
| 759 | seq_printf(m, " seqno: 0x%08x\n", error->bcs_seqno); |
Chris Wilson | add354d | 2010-10-29 19:00:51 +0100 | [diff] [blame] | 760 | seq_printf(m, "Video (BSD) command stream:\n"); |
| 761 | seq_printf(m, " ACTHD: 0x%08x\n", error->vcs_acthd); |
Chris Wilson | add354d | 2010-10-29 19:00:51 +0100 | [diff] [blame] | 762 | seq_printf(m, " IPEIR: 0x%08x\n", error->vcs_ipeir); |
Chris Wilson | e5c6526 | 2010-11-01 11:35:28 +0000 | [diff] [blame] | 763 | seq_printf(m, " IPEHR: 0x%08x\n", error->vcs_ipehr); |
Chris Wilson | add354d | 2010-10-29 19:00:51 +0100 | [diff] [blame] | 764 | seq_printf(m, " INSTDONE: 0x%08x\n", error->vcs_instdone); |
| 765 | seq_printf(m, " seqno: 0x%08x\n", error->vcs_seqno); |
Chris Wilson | f406839 | 2010-10-27 20:36:41 +0100 | [diff] [blame] | 766 | } |
Chris Wilson | 1d8f38f | 2010-10-29 19:00:51 +0100 | [diff] [blame] | 767 | seq_printf(m, "Render command stream:\n"); |
| 768 | seq_printf(m, " ACTHD: 0x%08x\n", error->acthd); |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 769 | seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir); |
| 770 | seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr); |
| 771 | seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone); |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 772 | if (INTEL_INFO(dev)->gen >= 4) { |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 773 | seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1); |
Chris Wilson | 1d8f38f | 2010-10-29 19:00:51 +0100 | [diff] [blame] | 774 | seq_printf(m, " INSTPS: 0x%08x\n", error->instps); |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 775 | } |
Chris Wilson | 1d8f38f | 2010-10-29 19:00:51 +0100 | [diff] [blame] | 776 | seq_printf(m, " INSTPM: 0x%08x\n", error->instpm); |
| 777 | seq_printf(m, " seqno: 0x%08x\n", error->seqno); |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 778 | |
Daniel Vetter | bf3301a | 2011-05-12 22:17:12 +0100 | [diff] [blame] | 779 | for (i = 0; i < dev_priv->num_fence_regs; i++) |
Chris Wilson | 748ebc6 | 2010-10-24 10:28:47 +0100 | [diff] [blame] | 780 | seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]); |
| 781 | |
Chris Wilson | c724e8a | 2010-11-22 08:07:02 +0000 | [diff] [blame] | 782 | if (error->active_bo) |
| 783 | print_error_buffers(m, "Active", |
| 784 | error->active_bo, |
| 785 | error->active_bo_count); |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 786 | |
Chris Wilson | c724e8a | 2010-11-22 08:07:02 +0000 | [diff] [blame] | 787 | if (error->pinned_bo) |
| 788 | print_error_buffers(m, "Pinned", |
| 789 | error->pinned_bo, |
| 790 | error->pinned_bo_count); |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 791 | |
| 792 | for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) { |
| 793 | if (error->batchbuffer[i]) { |
| 794 | struct drm_i915_error_object *obj = error->batchbuffer[i]; |
| 795 | |
Chris Wilson | bcfb2e2 | 2011-01-07 21:06:07 +0000 | [diff] [blame] | 796 | seq_printf(m, "%s --- gtt_offset = 0x%08x\n", |
| 797 | dev_priv->ring[i].name, |
| 798 | obj->gtt_offset); |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 799 | offset = 0; |
| 800 | for (page = 0; page < obj->page_count; page++) { |
| 801 | for (elt = 0; elt < PAGE_SIZE/4; elt++) { |
| 802 | seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]); |
| 803 | offset += 4; |
| 804 | } |
| 805 | } |
| 806 | } |
| 807 | } |
| 808 | |
Chris Wilson | e2f973d | 2011-01-27 19:15:11 +0000 | [diff] [blame] | 809 | for (i = 0; i < ARRAY_SIZE(error->ringbuffer); i++) { |
| 810 | if (error->ringbuffer[i]) { |
| 811 | struct drm_i915_error_object *obj = error->ringbuffer[i]; |
| 812 | seq_printf(m, "%s --- ringbuffer = 0x%08x\n", |
| 813 | dev_priv->ring[i].name, |
| 814 | obj->gtt_offset); |
| 815 | offset = 0; |
| 816 | for (page = 0; page < obj->page_count; page++) { |
| 817 | for (elt = 0; elt < PAGE_SIZE/4; elt++) { |
| 818 | seq_printf(m, "%08x : %08x\n", |
| 819 | offset, |
| 820 | obj->pages[page][elt]); |
| 821 | offset += 4; |
| 822 | } |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 823 | } |
| 824 | } |
| 825 | } |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 826 | |
Chris Wilson | 6ef3d42 | 2010-08-04 20:26:07 +0100 | [diff] [blame] | 827 | if (error->overlay) |
| 828 | intel_overlay_print_error_state(m, error->overlay); |
| 829 | |
Chris Wilson | c4a1d9e | 2010-11-21 13:12:35 +0000 | [diff] [blame] | 830 | if (error->display) |
| 831 | intel_display_print_error_state(m, dev, error->display); |
| 832 | |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 833 | out: |
| 834 | spin_unlock_irqrestore(&dev_priv->error_lock, flags); |
| 835 | |
| 836 | return 0; |
| 837 | } |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 838 | |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 839 | static int i915_rstdby_delays(struct seq_file *m, void *unused) |
| 840 | { |
| 841 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 842 | struct drm_device *dev = node->minor->dev; |
| 843 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 844 | u16 crstanddelay = I915_READ16(CRSTANDVID); |
| 845 | |
| 846 | seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f)); |
| 847 | |
| 848 | return 0; |
| 849 | } |
| 850 | |
| 851 | static int i915_cur_delayinfo(struct seq_file *m, void *unused) |
| 852 | { |
| 853 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 854 | struct drm_device *dev = node->minor->dev; |
| 855 | drm_i915_private_t *dev_priv = dev->dev_private; |
Ben Widawsky | d1ebd816 | 2011-04-25 20:11:50 +0100 | [diff] [blame] | 856 | int ret; |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 857 | |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 858 | if (IS_GEN5(dev)) { |
| 859 | u16 rgvswctl = I915_READ16(MEMSWCTL); |
| 860 | u16 rgvstat = I915_READ16(MEMSTAT_ILK); |
| 861 | |
| 862 | seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf); |
| 863 | seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f); |
| 864 | seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >> |
| 865 | MEMSTAT_VID_SHIFT); |
| 866 | seq_printf(m, "Current P-state: %d\n", |
| 867 | (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT); |
Jesse Barnes | 1c70c0c | 2011-06-29 13:34:36 -0700 | [diff] [blame^] | 868 | } else if (IS_GEN6(dev) || IS_GEN7(dev)) { |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 869 | u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS); |
| 870 | u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS); |
| 871 | u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP); |
Jesse Barnes | ccab5c8 | 2011-01-18 15:49:25 -0800 | [diff] [blame] | 872 | u32 rpstat; |
| 873 | u32 rpupei, rpcurup, rpprevup; |
| 874 | u32 rpdownei, rpcurdown, rpprevdown; |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 875 | int max_freq; |
| 876 | |
| 877 | /* RPSTAT1 is in the GT power well */ |
Ben Widawsky | d1ebd816 | 2011-04-25 20:11:50 +0100 | [diff] [blame] | 878 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 879 | if (ret) |
| 880 | return ret; |
| 881 | |
Ben Widawsky | fcca792 | 2011-04-25 11:23:07 -0700 | [diff] [blame] | 882 | gen6_gt_force_wake_get(dev_priv); |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 883 | |
Jesse Barnes | ccab5c8 | 2011-01-18 15:49:25 -0800 | [diff] [blame] | 884 | rpstat = I915_READ(GEN6_RPSTAT1); |
| 885 | rpupei = I915_READ(GEN6_RP_CUR_UP_EI); |
| 886 | rpcurup = I915_READ(GEN6_RP_CUR_UP); |
| 887 | rpprevup = I915_READ(GEN6_RP_PREV_UP); |
| 888 | rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI); |
| 889 | rpcurdown = I915_READ(GEN6_RP_CUR_DOWN); |
| 890 | rpprevdown = I915_READ(GEN6_RP_PREV_DOWN); |
| 891 | |
Ben Widawsky | d1ebd816 | 2011-04-25 20:11:50 +0100 | [diff] [blame] | 892 | gen6_gt_force_wake_put(dev_priv); |
| 893 | mutex_unlock(&dev->struct_mutex); |
| 894 | |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 895 | seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status); |
Jesse Barnes | ccab5c8 | 2011-01-18 15:49:25 -0800 | [diff] [blame] | 896 | seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat); |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 897 | seq_printf(m, "Render p-state ratio: %d\n", |
| 898 | (gt_perf_status & 0xff00) >> 8); |
| 899 | seq_printf(m, "Render p-state VID: %d\n", |
| 900 | gt_perf_status & 0xff); |
| 901 | seq_printf(m, "Render p-state limit: %d\n", |
| 902 | rp_state_limits & 0xff); |
Jesse Barnes | ccab5c8 | 2011-01-18 15:49:25 -0800 | [diff] [blame] | 903 | seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >> |
Jesse Barnes | e281fca | 2011-03-18 10:32:07 -0700 | [diff] [blame] | 904 | GEN6_CAGF_SHIFT) * 50); |
Jesse Barnes | ccab5c8 | 2011-01-18 15:49:25 -0800 | [diff] [blame] | 905 | seq_printf(m, "RP CUR UP EI: %dus\n", rpupei & |
| 906 | GEN6_CURICONT_MASK); |
| 907 | seq_printf(m, "RP CUR UP: %dus\n", rpcurup & |
| 908 | GEN6_CURBSYTAVG_MASK); |
| 909 | seq_printf(m, "RP PREV UP: %dus\n", rpprevup & |
| 910 | GEN6_CURBSYTAVG_MASK); |
| 911 | seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei & |
| 912 | GEN6_CURIAVG_MASK); |
| 913 | seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown & |
| 914 | GEN6_CURBSYTAVG_MASK); |
| 915 | seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown & |
| 916 | GEN6_CURBSYTAVG_MASK); |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 917 | |
| 918 | max_freq = (rp_state_cap & 0xff0000) >> 16; |
| 919 | seq_printf(m, "Lowest (RPN) frequency: %dMHz\n", |
Jesse Barnes | e281fca | 2011-03-18 10:32:07 -0700 | [diff] [blame] | 920 | max_freq * 50); |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 921 | |
| 922 | max_freq = (rp_state_cap & 0xff00) >> 8; |
| 923 | seq_printf(m, "Nominal (RP1) frequency: %dMHz\n", |
Jesse Barnes | e281fca | 2011-03-18 10:32:07 -0700 | [diff] [blame] | 924 | max_freq * 50); |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 925 | |
| 926 | max_freq = rp_state_cap & 0xff; |
| 927 | seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n", |
Jesse Barnes | e281fca | 2011-03-18 10:32:07 -0700 | [diff] [blame] | 928 | max_freq * 50); |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 929 | } else { |
| 930 | seq_printf(m, "no P-state info available\n"); |
| 931 | } |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 932 | |
| 933 | return 0; |
| 934 | } |
| 935 | |
| 936 | static int i915_delayfreq_table(struct seq_file *m, void *unused) |
| 937 | { |
| 938 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 939 | struct drm_device *dev = node->minor->dev; |
| 940 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 941 | u32 delayfreq; |
| 942 | int i; |
| 943 | |
| 944 | for (i = 0; i < 16; i++) { |
| 945 | delayfreq = I915_READ(PXVFREQ_BASE + i * 4); |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 946 | seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq, |
| 947 | (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT); |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 948 | } |
| 949 | |
| 950 | return 0; |
| 951 | } |
| 952 | |
| 953 | static inline int MAP_TO_MV(int map) |
| 954 | { |
| 955 | return 1250 - (map * 25); |
| 956 | } |
| 957 | |
| 958 | static int i915_inttoext_table(struct seq_file *m, void *unused) |
| 959 | { |
| 960 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 961 | struct drm_device *dev = node->minor->dev; |
| 962 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 963 | u32 inttoext; |
| 964 | int i; |
| 965 | |
| 966 | for (i = 1; i <= 32; i++) { |
| 967 | inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4); |
| 968 | seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext); |
| 969 | } |
| 970 | |
| 971 | return 0; |
| 972 | } |
| 973 | |
| 974 | static int i915_drpc_info(struct seq_file *m, void *unused) |
| 975 | { |
| 976 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 977 | struct drm_device *dev = node->minor->dev; |
| 978 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 979 | u32 rgvmodectl = I915_READ(MEMMODECTL); |
Jesse Barnes | 88271da | 2011-01-05 12:01:24 -0800 | [diff] [blame] | 980 | u32 rstdbyctl = I915_READ(RSTDBYCTL); |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 981 | u16 crstandvid = I915_READ16(CRSTANDVID); |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 982 | |
| 983 | seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ? |
| 984 | "yes" : "no"); |
| 985 | seq_printf(m, "Boost freq: %d\n", |
| 986 | (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >> |
| 987 | MEMMODE_BOOST_FREQ_SHIFT); |
| 988 | seq_printf(m, "HW control enabled: %s\n", |
| 989 | rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no"); |
| 990 | seq_printf(m, "SW control enabled: %s\n", |
| 991 | rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no"); |
| 992 | seq_printf(m, "Gated voltage change: %s\n", |
| 993 | rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no"); |
| 994 | seq_printf(m, "Starting frequency: P%d\n", |
| 995 | (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT); |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 996 | seq_printf(m, "Max P-state: P%d\n", |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 997 | (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT); |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 998 | seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK)); |
| 999 | seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f)); |
| 1000 | seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f)); |
| 1001 | seq_printf(m, "Render standby enabled: %s\n", |
| 1002 | (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes"); |
Jesse Barnes | 88271da | 2011-01-05 12:01:24 -0800 | [diff] [blame] | 1003 | seq_printf(m, "Current RS state: "); |
| 1004 | switch (rstdbyctl & RSX_STATUS_MASK) { |
| 1005 | case RSX_STATUS_ON: |
| 1006 | seq_printf(m, "on\n"); |
| 1007 | break; |
| 1008 | case RSX_STATUS_RC1: |
| 1009 | seq_printf(m, "RC1\n"); |
| 1010 | break; |
| 1011 | case RSX_STATUS_RC1E: |
| 1012 | seq_printf(m, "RC1E\n"); |
| 1013 | break; |
| 1014 | case RSX_STATUS_RS1: |
| 1015 | seq_printf(m, "RS1\n"); |
| 1016 | break; |
| 1017 | case RSX_STATUS_RS2: |
| 1018 | seq_printf(m, "RS2 (RC6)\n"); |
| 1019 | break; |
| 1020 | case RSX_STATUS_RS3: |
| 1021 | seq_printf(m, "RC3 (RC6+)\n"); |
| 1022 | break; |
| 1023 | default: |
| 1024 | seq_printf(m, "unknown\n"); |
| 1025 | break; |
| 1026 | } |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 1027 | |
| 1028 | return 0; |
| 1029 | } |
| 1030 | |
Jesse Barnes | b5e50c3 | 2010-02-05 12:42:41 -0800 | [diff] [blame] | 1031 | static int i915_fbc_status(struct seq_file *m, void *unused) |
| 1032 | { |
| 1033 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1034 | struct drm_device *dev = node->minor->dev; |
Jesse Barnes | b5e50c3 | 2010-02-05 12:42:41 -0800 | [diff] [blame] | 1035 | drm_i915_private_t *dev_priv = dev->dev_private; |
Jesse Barnes | b5e50c3 | 2010-02-05 12:42:41 -0800 | [diff] [blame] | 1036 | |
Adam Jackson | ee5382a | 2010-04-23 11:17:39 -0400 | [diff] [blame] | 1037 | if (!I915_HAS_FBC(dev)) { |
Jesse Barnes | b5e50c3 | 2010-02-05 12:42:41 -0800 | [diff] [blame] | 1038 | seq_printf(m, "FBC unsupported on this chipset\n"); |
| 1039 | return 0; |
| 1040 | } |
| 1041 | |
Adam Jackson | ee5382a | 2010-04-23 11:17:39 -0400 | [diff] [blame] | 1042 | if (intel_fbc_enabled(dev)) { |
Jesse Barnes | b5e50c3 | 2010-02-05 12:42:41 -0800 | [diff] [blame] | 1043 | seq_printf(m, "FBC enabled\n"); |
| 1044 | } else { |
| 1045 | seq_printf(m, "FBC disabled: "); |
| 1046 | switch (dev_priv->no_fbc_reason) { |
Chris Wilson | bed4a67 | 2010-09-11 10:47:47 +0100 | [diff] [blame] | 1047 | case FBC_NO_OUTPUT: |
| 1048 | seq_printf(m, "no outputs"); |
| 1049 | break; |
Jesse Barnes | b5e50c3 | 2010-02-05 12:42:41 -0800 | [diff] [blame] | 1050 | case FBC_STOLEN_TOO_SMALL: |
| 1051 | seq_printf(m, "not enough stolen memory"); |
| 1052 | break; |
| 1053 | case FBC_UNSUPPORTED_MODE: |
| 1054 | seq_printf(m, "mode not supported"); |
| 1055 | break; |
| 1056 | case FBC_MODE_TOO_LARGE: |
| 1057 | seq_printf(m, "mode too large"); |
| 1058 | break; |
| 1059 | case FBC_BAD_PLANE: |
| 1060 | seq_printf(m, "FBC unsupported on plane"); |
| 1061 | break; |
| 1062 | case FBC_NOT_TILED: |
| 1063 | seq_printf(m, "scanout buffer not tiled"); |
| 1064 | break; |
Jesse Barnes | 9c928d1 | 2010-07-23 15:20:00 -0700 | [diff] [blame] | 1065 | case FBC_MULTIPLE_PIPES: |
| 1066 | seq_printf(m, "multiple pipes are enabled"); |
| 1067 | break; |
Jesse Barnes | c1a9f04 | 2011-05-05 15:24:21 -0700 | [diff] [blame] | 1068 | case FBC_MODULE_PARAM: |
| 1069 | seq_printf(m, "disabled per module param (default off)"); |
| 1070 | break; |
Jesse Barnes | b5e50c3 | 2010-02-05 12:42:41 -0800 | [diff] [blame] | 1071 | default: |
| 1072 | seq_printf(m, "unknown reason"); |
| 1073 | } |
| 1074 | seq_printf(m, "\n"); |
| 1075 | } |
| 1076 | return 0; |
| 1077 | } |
| 1078 | |
Jesse Barnes | 4a9bef3 | 2010-02-05 12:47:35 -0800 | [diff] [blame] | 1079 | static int i915_sr_status(struct seq_file *m, void *unused) |
| 1080 | { |
| 1081 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1082 | struct drm_device *dev = node->minor->dev; |
| 1083 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1084 | bool sr_enabled = false; |
| 1085 | |
Yuanhan Liu | 1398261 | 2010-12-15 15:42:31 +0800 | [diff] [blame] | 1086 | if (HAS_PCH_SPLIT(dev)) |
Chris Wilson | 5ba2aaa | 2010-08-19 18:04:08 +0100 | [diff] [blame] | 1087 | sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN; |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 1088 | else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev)) |
Jesse Barnes | 4a9bef3 | 2010-02-05 12:47:35 -0800 | [diff] [blame] | 1089 | sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN; |
| 1090 | else if (IS_I915GM(dev)) |
| 1091 | sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN; |
| 1092 | else if (IS_PINEVIEW(dev)) |
| 1093 | sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN; |
| 1094 | |
Chris Wilson | 5ba2aaa | 2010-08-19 18:04:08 +0100 | [diff] [blame] | 1095 | seq_printf(m, "self-refresh: %s\n", |
| 1096 | sr_enabled ? "enabled" : "disabled"); |
Jesse Barnes | 4a9bef3 | 2010-02-05 12:47:35 -0800 | [diff] [blame] | 1097 | |
| 1098 | return 0; |
| 1099 | } |
| 1100 | |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 1101 | static int i915_emon_status(struct seq_file *m, void *unused) |
| 1102 | { |
| 1103 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1104 | struct drm_device *dev = node->minor->dev; |
| 1105 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1106 | unsigned long temp, chipset, gfx; |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 1107 | int ret; |
| 1108 | |
| 1109 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 1110 | if (ret) |
| 1111 | return ret; |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 1112 | |
| 1113 | temp = i915_mch_val(dev_priv); |
| 1114 | chipset = i915_chipset_val(dev_priv); |
| 1115 | gfx = i915_gfx_val(dev_priv); |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 1116 | mutex_unlock(&dev->struct_mutex); |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 1117 | |
| 1118 | seq_printf(m, "GMCH temp: %ld\n", temp); |
| 1119 | seq_printf(m, "Chipset power: %ld\n", chipset); |
| 1120 | seq_printf(m, "GFX power: %ld\n", gfx); |
| 1121 | seq_printf(m, "Total power: %ld\n", chipset + gfx); |
| 1122 | |
| 1123 | return 0; |
| 1124 | } |
| 1125 | |
Jesse Barnes | 23b2f8b | 2011-06-28 13:04:16 -0700 | [diff] [blame] | 1126 | static int i915_ring_freq_table(struct seq_file *m, void *unused) |
| 1127 | { |
| 1128 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1129 | struct drm_device *dev = node->minor->dev; |
| 1130 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1131 | int ret; |
| 1132 | int gpu_freq, ia_freq; |
| 1133 | |
Jesse Barnes | 1c70c0c | 2011-06-29 13:34:36 -0700 | [diff] [blame^] | 1134 | if (!(IS_GEN6(dev) || IS_GEN7(dev))) { |
Jesse Barnes | 23b2f8b | 2011-06-28 13:04:16 -0700 | [diff] [blame] | 1135 | seq_printf(m, "unsupported on this chipset\n"); |
| 1136 | return 0; |
| 1137 | } |
| 1138 | |
| 1139 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 1140 | if (ret) |
| 1141 | return ret; |
| 1142 | |
| 1143 | seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n"); |
| 1144 | |
| 1145 | for (gpu_freq = dev_priv->min_delay; gpu_freq <= dev_priv->max_delay; |
| 1146 | gpu_freq++) { |
| 1147 | I915_WRITE(GEN6_PCODE_DATA, gpu_freq); |
| 1148 | I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY | |
| 1149 | GEN6_PCODE_READ_MIN_FREQ_TABLE); |
| 1150 | if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) & |
| 1151 | GEN6_PCODE_READY) == 0, 10)) { |
| 1152 | DRM_ERROR("pcode read of freq table timed out\n"); |
| 1153 | continue; |
| 1154 | } |
| 1155 | ia_freq = I915_READ(GEN6_PCODE_DATA); |
| 1156 | seq_printf(m, "%d\t\t%d\n", gpu_freq * 50, ia_freq * 100); |
| 1157 | } |
| 1158 | |
| 1159 | mutex_unlock(&dev->struct_mutex); |
| 1160 | |
| 1161 | return 0; |
| 1162 | } |
| 1163 | |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 1164 | static int i915_gfxec(struct seq_file *m, void *unused) |
| 1165 | { |
| 1166 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1167 | struct drm_device *dev = node->minor->dev; |
| 1168 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1169 | |
| 1170 | seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4)); |
| 1171 | |
| 1172 | return 0; |
| 1173 | } |
| 1174 | |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1175 | static int i915_opregion(struct seq_file *m, void *unused) |
| 1176 | { |
| 1177 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1178 | struct drm_device *dev = node->minor->dev; |
| 1179 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1180 | struct intel_opregion *opregion = &dev_priv->opregion; |
| 1181 | int ret; |
| 1182 | |
| 1183 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 1184 | if (ret) |
| 1185 | return ret; |
| 1186 | |
| 1187 | if (opregion->header) |
| 1188 | seq_write(m, opregion->header, OPREGION_SIZE); |
| 1189 | |
| 1190 | mutex_unlock(&dev->struct_mutex); |
| 1191 | |
| 1192 | return 0; |
| 1193 | } |
| 1194 | |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 1195 | static int i915_gem_framebuffer_info(struct seq_file *m, void *data) |
| 1196 | { |
| 1197 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1198 | struct drm_device *dev = node->minor->dev; |
| 1199 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1200 | struct intel_fbdev *ifbdev; |
| 1201 | struct intel_framebuffer *fb; |
| 1202 | int ret; |
| 1203 | |
| 1204 | ret = mutex_lock_interruptible(&dev->mode_config.mutex); |
| 1205 | if (ret) |
| 1206 | return ret; |
| 1207 | |
| 1208 | ifbdev = dev_priv->fbdev; |
| 1209 | fb = to_intel_framebuffer(ifbdev->helper.fb); |
| 1210 | |
| 1211 | seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ", |
| 1212 | fb->base.width, |
| 1213 | fb->base.height, |
| 1214 | fb->base.depth, |
| 1215 | fb->base.bits_per_pixel); |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 1216 | describe_obj(m, fb->obj); |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 1217 | seq_printf(m, "\n"); |
| 1218 | |
| 1219 | list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) { |
| 1220 | if (&fb->base == ifbdev->helper.fb) |
| 1221 | continue; |
| 1222 | |
| 1223 | seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ", |
| 1224 | fb->base.width, |
| 1225 | fb->base.height, |
| 1226 | fb->base.depth, |
| 1227 | fb->base.bits_per_pixel); |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 1228 | describe_obj(m, fb->obj); |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 1229 | seq_printf(m, "\n"); |
| 1230 | } |
| 1231 | |
| 1232 | mutex_unlock(&dev->mode_config.mutex); |
| 1233 | |
| 1234 | return 0; |
| 1235 | } |
| 1236 | |
Ben Widawsky | e76d363 | 2011-03-19 18:14:29 -0700 | [diff] [blame] | 1237 | static int i915_context_status(struct seq_file *m, void *unused) |
| 1238 | { |
| 1239 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1240 | struct drm_device *dev = node->minor->dev; |
| 1241 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1242 | int ret; |
| 1243 | |
| 1244 | ret = mutex_lock_interruptible(&dev->mode_config.mutex); |
| 1245 | if (ret) |
| 1246 | return ret; |
| 1247 | |
| 1248 | seq_printf(m, "power context "); |
| 1249 | describe_obj(m, dev_priv->pwrctx); |
| 1250 | seq_printf(m, "\n"); |
| 1251 | |
| 1252 | seq_printf(m, "render context "); |
| 1253 | describe_obj(m, dev_priv->renderctx); |
| 1254 | seq_printf(m, "\n"); |
| 1255 | |
| 1256 | mutex_unlock(&dev->mode_config.mutex); |
| 1257 | |
| 1258 | return 0; |
| 1259 | } |
| 1260 | |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1261 | static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data) |
| 1262 | { |
| 1263 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1264 | struct drm_device *dev = node->minor->dev; |
| 1265 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1266 | |
| 1267 | seq_printf(m, "forcewake count = %d\n", |
| 1268 | atomic_read(&dev_priv->forcewake_count)); |
| 1269 | |
| 1270 | return 0; |
| 1271 | } |
| 1272 | |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1273 | static int |
| 1274 | i915_wedged_open(struct inode *inode, |
| 1275 | struct file *filp) |
| 1276 | { |
| 1277 | filp->private_data = inode->i_private; |
| 1278 | return 0; |
| 1279 | } |
| 1280 | |
| 1281 | static ssize_t |
| 1282 | i915_wedged_read(struct file *filp, |
| 1283 | char __user *ubuf, |
| 1284 | size_t max, |
| 1285 | loff_t *ppos) |
| 1286 | { |
| 1287 | struct drm_device *dev = filp->private_data; |
| 1288 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1289 | char buf[80]; |
| 1290 | int len; |
| 1291 | |
| 1292 | len = snprintf(buf, sizeof (buf), |
| 1293 | "wedged : %d\n", |
| 1294 | atomic_read(&dev_priv->mm.wedged)); |
| 1295 | |
Dan Carpenter | f4433a8 | 2010-09-08 21:44:47 +0200 | [diff] [blame] | 1296 | if (len > sizeof (buf)) |
| 1297 | len = sizeof (buf); |
| 1298 | |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1299 | return simple_read_from_buffer(ubuf, max, ppos, buf, len); |
| 1300 | } |
| 1301 | |
| 1302 | static ssize_t |
| 1303 | i915_wedged_write(struct file *filp, |
| 1304 | const char __user *ubuf, |
| 1305 | size_t cnt, |
| 1306 | loff_t *ppos) |
| 1307 | { |
| 1308 | struct drm_device *dev = filp->private_data; |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1309 | char buf[20]; |
| 1310 | int val = 1; |
| 1311 | |
| 1312 | if (cnt > 0) { |
| 1313 | if (cnt > sizeof (buf) - 1) |
| 1314 | return -EINVAL; |
| 1315 | |
| 1316 | if (copy_from_user(buf, ubuf, cnt)) |
| 1317 | return -EFAULT; |
| 1318 | buf[cnt] = 0; |
| 1319 | |
| 1320 | val = simple_strtoul(buf, NULL, 0); |
| 1321 | } |
| 1322 | |
| 1323 | DRM_INFO("Manually setting wedged to %d\n", val); |
Chris Wilson | 527f9e9 | 2010-11-11 01:16:58 +0000 | [diff] [blame] | 1324 | i915_handle_error(dev, val); |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1325 | |
| 1326 | return cnt; |
| 1327 | } |
| 1328 | |
| 1329 | static const struct file_operations i915_wedged_fops = { |
| 1330 | .owner = THIS_MODULE, |
| 1331 | .open = i915_wedged_open, |
| 1332 | .read = i915_wedged_read, |
| 1333 | .write = i915_wedged_write, |
Arnd Bergmann | 6038f37 | 2010-08-15 18:52:59 +0200 | [diff] [blame] | 1334 | .llseek = default_llseek, |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1335 | }; |
| 1336 | |
| 1337 | /* As the drm_debugfs_init() routines are called before dev->dev_private is |
| 1338 | * allocated we need to hook into the minor for release. */ |
| 1339 | static int |
| 1340 | drm_add_fake_info_node(struct drm_minor *minor, |
| 1341 | struct dentry *ent, |
| 1342 | const void *key) |
| 1343 | { |
| 1344 | struct drm_info_node *node; |
| 1345 | |
| 1346 | node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL); |
| 1347 | if (node == NULL) { |
| 1348 | debugfs_remove(ent); |
| 1349 | return -ENOMEM; |
| 1350 | } |
| 1351 | |
| 1352 | node->minor = minor; |
| 1353 | node->dent = ent; |
| 1354 | node->info_ent = (void *) key; |
| 1355 | list_add(&node->list, &minor->debugfs_nodes.list); |
| 1356 | |
| 1357 | return 0; |
| 1358 | } |
| 1359 | |
| 1360 | static int i915_wedged_create(struct dentry *root, struct drm_minor *minor) |
| 1361 | { |
| 1362 | struct drm_device *dev = minor->dev; |
| 1363 | struct dentry *ent; |
| 1364 | |
| 1365 | ent = debugfs_create_file("i915_wedged", |
| 1366 | S_IRUGO | S_IWUSR, |
| 1367 | root, dev, |
| 1368 | &i915_wedged_fops); |
| 1369 | if (IS_ERR(ent)) |
| 1370 | return PTR_ERR(ent); |
| 1371 | |
| 1372 | return drm_add_fake_info_node(minor, ent, &i915_wedged_fops); |
| 1373 | } |
Ben Gamari | 9e3a6d1 | 2009-07-01 22:26:53 -0400 | [diff] [blame] | 1374 | |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1375 | static int i915_forcewake_open(struct inode *inode, struct file *file) |
| 1376 | { |
| 1377 | struct drm_device *dev = inode->i_private; |
| 1378 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1379 | int ret; |
| 1380 | |
| 1381 | if (!IS_GEN6(dev)) |
| 1382 | return 0; |
| 1383 | |
| 1384 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 1385 | if (ret) |
| 1386 | return ret; |
| 1387 | gen6_gt_force_wake_get(dev_priv); |
| 1388 | mutex_unlock(&dev->struct_mutex); |
| 1389 | |
| 1390 | return 0; |
| 1391 | } |
| 1392 | |
| 1393 | int i915_forcewake_release(struct inode *inode, struct file *file) |
| 1394 | { |
| 1395 | struct drm_device *dev = inode->i_private; |
| 1396 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1397 | |
| 1398 | if (!IS_GEN6(dev)) |
| 1399 | return 0; |
| 1400 | |
| 1401 | /* |
| 1402 | * It's bad that we can potentially hang userspace if struct_mutex gets |
| 1403 | * forever stuck. However, if we cannot acquire this lock it means that |
| 1404 | * almost certainly the driver has hung, is not unload-able. Therefore |
| 1405 | * hanging here is probably a minor inconvenience not to be seen my |
| 1406 | * almost every user. |
| 1407 | */ |
| 1408 | mutex_lock(&dev->struct_mutex); |
| 1409 | gen6_gt_force_wake_put(dev_priv); |
| 1410 | mutex_unlock(&dev->struct_mutex); |
| 1411 | |
| 1412 | return 0; |
| 1413 | } |
| 1414 | |
| 1415 | static const struct file_operations i915_forcewake_fops = { |
| 1416 | .owner = THIS_MODULE, |
| 1417 | .open = i915_forcewake_open, |
| 1418 | .release = i915_forcewake_release, |
| 1419 | }; |
| 1420 | |
| 1421 | static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor) |
| 1422 | { |
| 1423 | struct drm_device *dev = minor->dev; |
| 1424 | struct dentry *ent; |
| 1425 | |
| 1426 | ent = debugfs_create_file("i915_forcewake_user", |
Ben Widawsky | 8eb5729 | 2011-05-11 15:10:58 -0700 | [diff] [blame] | 1427 | S_IRUSR, |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1428 | root, dev, |
| 1429 | &i915_forcewake_fops); |
| 1430 | if (IS_ERR(ent)) |
| 1431 | return PTR_ERR(ent); |
| 1432 | |
Ben Widawsky | 8eb5729 | 2011-05-11 15:10:58 -0700 | [diff] [blame] | 1433 | return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops); |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1434 | } |
| 1435 | |
Ben Gamari | 27c202a | 2009-07-01 22:26:52 -0400 | [diff] [blame] | 1436 | static struct drm_info_list i915_debugfs_list[] = { |
Chris Wilson | 311bd68 | 2011-01-13 19:06:50 +0000 | [diff] [blame] | 1437 | {"i915_capabilities", i915_capabilities, 0}, |
Chris Wilson | 73aa808 | 2010-09-30 11:46:12 +0100 | [diff] [blame] | 1438 | {"i915_gem_objects", i915_gem_object_info, 0}, |
Chris Wilson | 08c1832 | 2011-01-10 00:00:24 +0000 | [diff] [blame] | 1439 | {"i915_gem_gtt", i915_gem_gtt_info, 0}, |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 1440 | {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST}, |
| 1441 | {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST}, |
| 1442 | {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST}, |
Chris Wilson | f13d3f7 | 2010-09-20 17:36:15 +0100 | [diff] [blame] | 1443 | {"i915_gem_pinned", i915_gem_object_list_info, 0, (void *) PINNED_LIST}, |
Chris Wilson | d21d597 | 2010-09-26 11:19:33 +0100 | [diff] [blame] | 1444 | {"i915_gem_deferred_free", i915_gem_object_list_info, 0, (void *) DEFERRED_FREE_LIST}, |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 1445 | {"i915_gem_pageflip", i915_gem_pageflip_info, 0}, |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 1446 | {"i915_gem_request", i915_gem_request_info, 0}, |
| 1447 | {"i915_gem_seqno", i915_gem_seqno_info, 0}, |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 1448 | {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0}, |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 1449 | {"i915_gem_interrupt", i915_interrupt_info, 0}, |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 1450 | {"i915_gem_hws", i915_hws_info, 0, (void *)RCS}, |
| 1451 | {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS}, |
| 1452 | {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS}, |
| 1453 | {"i915_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RCS}, |
| 1454 | {"i915_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RCS}, |
| 1455 | {"i915_bsd_ringbuffer_data", i915_ringbuffer_data, 0, (void *)VCS}, |
| 1456 | {"i915_bsd_ringbuffer_info", i915_ringbuffer_info, 0, (void *)VCS}, |
| 1457 | {"i915_blt_ringbuffer_data", i915_ringbuffer_data, 0, (void *)BCS}, |
| 1458 | {"i915_blt_ringbuffer_info", i915_ringbuffer_info, 0, (void *)BCS}, |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 1459 | {"i915_batchbuffers", i915_batchbuffer_info, 0}, |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 1460 | {"i915_error_state", i915_error_state, 0}, |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 1461 | {"i915_rstdby_delays", i915_rstdby_delays, 0}, |
| 1462 | {"i915_cur_delayinfo", i915_cur_delayinfo, 0}, |
| 1463 | {"i915_delayfreq_table", i915_delayfreq_table, 0}, |
| 1464 | {"i915_inttoext_table", i915_inttoext_table, 0}, |
| 1465 | {"i915_drpc_info", i915_drpc_info, 0}, |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 1466 | {"i915_emon_status", i915_emon_status, 0}, |
Jesse Barnes | 23b2f8b | 2011-06-28 13:04:16 -0700 | [diff] [blame] | 1467 | {"i915_ring_freq_table", i915_ring_freq_table, 0}, |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 1468 | {"i915_gfxec", i915_gfxec, 0}, |
Jesse Barnes | b5e50c3 | 2010-02-05 12:42:41 -0800 | [diff] [blame] | 1469 | {"i915_fbc_status", i915_fbc_status, 0}, |
Jesse Barnes | 4a9bef3 | 2010-02-05 12:47:35 -0800 | [diff] [blame] | 1470 | {"i915_sr_status", i915_sr_status, 0}, |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1471 | {"i915_opregion", i915_opregion, 0}, |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 1472 | {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, |
Ben Widawsky | e76d363 | 2011-03-19 18:14:29 -0700 | [diff] [blame] | 1473 | {"i915_context_status", i915_context_status, 0}, |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1474 | {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0}, |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 1475 | }; |
Ben Gamari | 27c202a | 2009-07-01 22:26:52 -0400 | [diff] [blame] | 1476 | #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list) |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 1477 | |
Ben Gamari | 27c202a | 2009-07-01 22:26:52 -0400 | [diff] [blame] | 1478 | int i915_debugfs_init(struct drm_minor *minor) |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 1479 | { |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1480 | int ret; |
| 1481 | |
| 1482 | ret = i915_wedged_create(minor->debugfs_root, minor); |
| 1483 | if (ret) |
| 1484 | return ret; |
| 1485 | |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1486 | ret = i915_forcewake_create(minor->debugfs_root, minor); |
| 1487 | if (ret) |
| 1488 | return ret; |
| 1489 | |
Ben Gamari | 27c202a | 2009-07-01 22:26:52 -0400 | [diff] [blame] | 1490 | return drm_debugfs_create_files(i915_debugfs_list, |
| 1491 | I915_DEBUGFS_ENTRIES, |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 1492 | minor->debugfs_root, minor); |
| 1493 | } |
| 1494 | |
Ben Gamari | 27c202a | 2009-07-01 22:26:52 -0400 | [diff] [blame] | 1495 | void i915_debugfs_cleanup(struct drm_minor *minor) |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 1496 | { |
Ben Gamari | 27c202a | 2009-07-01 22:26:52 -0400 | [diff] [blame] | 1497 | drm_debugfs_remove_files(i915_debugfs_list, |
| 1498 | I915_DEBUGFS_ENTRIES, minor); |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1499 | drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops, |
| 1500 | 1, minor); |
Kristian Høgsberg | 33db679 | 2009-11-11 12:19:16 -0500 | [diff] [blame] | 1501 | drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops, |
| 1502 | 1, minor); |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 1503 | } |
| 1504 | |
| 1505 | #endif /* CONFIG_DEBUG_FS */ |