Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Freescale MPC85xx, MPC83xx DMA Engine support |
| 3 | * |
Li Yang | e2c8e425 | 2010-11-11 20:16:29 +0800 | [diff] [blame] | 4 | * Copyright (C) 2007-2010 Freescale Semiconductor, Inc. All rights reserved. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 5 | * |
| 6 | * Author: |
| 7 | * Zhang Wei <wei.zhang@freescale.com>, Jul 2007 |
| 8 | * Ebony Zhu <ebony.zhu@freescale.com>, May 2007 |
| 9 | * |
| 10 | * Description: |
| 11 | * DMA engine driver for Freescale MPC8540 DMA controller, which is |
| 12 | * also fit for MPC8560, MPC8555, MPC8548, MPC8641, and etc. |
Stefan Weil | c2e07b3 | 2010-08-03 19:44:52 +0200 | [diff] [blame] | 13 | * The support for MPC8349 DMA controller is also added. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 14 | * |
Ira W. Snyder | a7aea37 | 2009-04-23 16:17:54 -0700 | [diff] [blame] | 15 | * This driver instructs the DMA controller to issue the PCI Read Multiple |
| 16 | * command for PCI read operations, instead of using the default PCI Read Line |
| 17 | * command. Please be aware that this setting may result in read pre-fetching |
| 18 | * on some platforms. |
| 19 | * |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 20 | * This is free software; you can redistribute it and/or modify |
| 21 | * it under the terms of the GNU General Public License as published by |
| 22 | * the Free Software Foundation; either version 2 of the License, or |
| 23 | * (at your option) any later version. |
| 24 | * |
| 25 | */ |
| 26 | |
| 27 | #include <linux/init.h> |
| 28 | #include <linux/module.h> |
| 29 | #include <linux/pci.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 30 | #include <linux/slab.h> |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 31 | #include <linux/interrupt.h> |
| 32 | #include <linux/dmaengine.h> |
| 33 | #include <linux/delay.h> |
| 34 | #include <linux/dma-mapping.h> |
| 35 | #include <linux/dmapool.h> |
Rob Herring | 5af5073 | 2013-09-17 14:28:33 -0500 | [diff] [blame] | 36 | #include <linux/of_address.h> |
| 37 | #include <linux/of_irq.h> |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 38 | #include <linux/of_platform.h> |
| 39 | |
Russell King - ARM Linux | d2ebfb3 | 2012-03-06 22:34:26 +0000 | [diff] [blame] | 40 | #include "dmaengine.h" |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 41 | #include "fsldma.h" |
| 42 | |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 43 | #define chan_dbg(chan, fmt, arg...) \ |
| 44 | dev_dbg(chan->dev, "%s: " fmt, chan->name, ##arg) |
| 45 | #define chan_err(chan, fmt, arg...) \ |
| 46 | dev_err(chan->dev, "%s: " fmt, chan->name, ##arg) |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 47 | |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 48 | static const char msg_ld_oom[] = "No free memory for link descriptor"; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 49 | |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 50 | /* |
| 51 | * Register Helpers |
| 52 | */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 53 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 54 | static void set_sr(struct fsldma_chan *chan, u32 val) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 55 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 56 | DMA_OUT(chan, &chan->regs->sr, val, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 57 | } |
| 58 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 59 | static u32 get_sr(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 60 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 61 | return DMA_IN(chan, &chan->regs->sr, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 62 | } |
| 63 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 64 | static void set_cdar(struct fsldma_chan *chan, dma_addr_t addr) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 65 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 66 | DMA_OUT(chan, &chan->regs->cdar, addr | FSL_DMA_SNEN, 64); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 67 | } |
| 68 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 69 | static dma_addr_t get_cdar(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 70 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 71 | return DMA_IN(chan, &chan->regs->cdar, 64) & ~FSL_DMA_SNEN; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 72 | } |
| 73 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 74 | static u32 get_bcr(struct fsldma_chan *chan) |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 75 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 76 | return DMA_IN(chan, &chan->regs->bcr, 32); |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 77 | } |
| 78 | |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 79 | /* |
| 80 | * Descriptor Helpers |
| 81 | */ |
| 82 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 83 | static void set_desc_cnt(struct fsldma_chan *chan, |
| 84 | struct fsl_dma_ld_hw *hw, u32 count) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 85 | { |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 86 | hw->count = CPU_TO_DMA(chan, count, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 87 | } |
| 88 | |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 89 | static u32 get_desc_cnt(struct fsldma_chan *chan, struct fsl_desc_sw *desc) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 90 | { |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 91 | return DMA_TO_CPU(chan, desc->hw.count, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 92 | } |
| 93 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 94 | static void set_desc_src(struct fsldma_chan *chan, |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 95 | struct fsl_dma_ld_hw *hw, dma_addr_t src) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 96 | { |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 97 | u64 snoop_bits; |
Dan Williams | 900325a | 2009-03-02 15:33:46 -0700 | [diff] [blame] | 98 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 99 | snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) |
| 100 | ? ((u64)FSL_DMA_SATR_SREADTYPE_SNOOP_READ << 32) : 0; |
| 101 | hw->src_addr = CPU_TO_DMA(chan, snoop_bits | src, 64); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 102 | } |
| 103 | |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 104 | static dma_addr_t get_desc_src(struct fsldma_chan *chan, |
| 105 | struct fsl_desc_sw *desc) |
| 106 | { |
| 107 | u64 snoop_bits; |
| 108 | |
| 109 | snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) |
| 110 | ? ((u64)FSL_DMA_SATR_SREADTYPE_SNOOP_READ << 32) : 0; |
| 111 | return DMA_TO_CPU(chan, desc->hw.src_addr, 64) & ~snoop_bits; |
| 112 | } |
| 113 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 114 | static void set_desc_dst(struct fsldma_chan *chan, |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 115 | struct fsl_dma_ld_hw *hw, dma_addr_t dst) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 116 | { |
| 117 | u64 snoop_bits; |
| 118 | |
| 119 | snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) |
| 120 | ? ((u64)FSL_DMA_DATR_DWRITETYPE_SNOOP_WRITE << 32) : 0; |
| 121 | hw->dst_addr = CPU_TO_DMA(chan, snoop_bits | dst, 64); |
| 122 | } |
| 123 | |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 124 | static dma_addr_t get_desc_dst(struct fsldma_chan *chan, |
| 125 | struct fsl_desc_sw *desc) |
| 126 | { |
| 127 | u64 snoop_bits; |
| 128 | |
| 129 | snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) |
| 130 | ? ((u64)FSL_DMA_DATR_DWRITETYPE_SNOOP_WRITE << 32) : 0; |
| 131 | return DMA_TO_CPU(chan, desc->hw.dst_addr, 64) & ~snoop_bits; |
| 132 | } |
| 133 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 134 | static void set_desc_next(struct fsldma_chan *chan, |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 135 | struct fsl_dma_ld_hw *hw, dma_addr_t next) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 136 | { |
| 137 | u64 snoop_bits; |
| 138 | |
| 139 | snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_83XX) |
| 140 | ? FSL_DMA_SNEN : 0; |
| 141 | hw->next_ln_addr = CPU_TO_DMA(chan, snoop_bits | next, 64); |
| 142 | } |
| 143 | |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 144 | static void set_ld_eol(struct fsldma_chan *chan, struct fsl_desc_sw *desc) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 145 | { |
Ira Snyder | 776c894 | 2009-05-15 11:33:20 -0700 | [diff] [blame] | 146 | u64 snoop_bits; |
| 147 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 148 | snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_83XX) |
Ira Snyder | 776c894 | 2009-05-15 11:33:20 -0700 | [diff] [blame] | 149 | ? FSL_DMA_SNEN : 0; |
| 150 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 151 | desc->hw.next_ln_addr = CPU_TO_DMA(chan, |
| 152 | DMA_TO_CPU(chan, desc->hw.next_ln_addr, 64) | FSL_DMA_EOL |
Ira Snyder | 776c894 | 2009-05-15 11:33:20 -0700 | [diff] [blame] | 153 | | snoop_bits, 64); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 154 | } |
| 155 | |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 156 | /* |
| 157 | * DMA Engine Hardware Control Helpers |
| 158 | */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 159 | |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 160 | static void dma_init(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 161 | { |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 162 | /* Reset the channel */ |
| 163 | DMA_OUT(chan, &chan->regs->mr, 0, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 164 | |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 165 | switch (chan->feature & FSL_DMA_IP_MASK) { |
| 166 | case FSL_DMA_IP_85XX: |
| 167 | /* Set the channel to below modes: |
| 168 | * EIE - Error interrupt enable |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 169 | * EOLNIE - End of links interrupt enable |
| 170 | * BWC - Bandwidth sharing among channels |
| 171 | */ |
| 172 | DMA_OUT(chan, &chan->regs->mr, FSL_DMA_MR_BWC |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 173 | | FSL_DMA_MR_EIE | FSL_DMA_MR_EOLNIE, 32); |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 174 | break; |
| 175 | case FSL_DMA_IP_83XX: |
| 176 | /* Set the channel to below modes: |
| 177 | * EOTIE - End-of-transfer interrupt enable |
| 178 | * PRC_RM - PCI read multiple |
| 179 | */ |
| 180 | DMA_OUT(chan, &chan->regs->mr, FSL_DMA_MR_EOTIE |
| 181 | | FSL_DMA_MR_PRC_RM, 32); |
| 182 | break; |
| 183 | } |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 184 | } |
| 185 | |
| 186 | static int dma_is_idle(struct fsldma_chan *chan) |
| 187 | { |
| 188 | u32 sr = get_sr(chan); |
| 189 | return (!(sr & FSL_DMA_SR_CB)) || (sr & FSL_DMA_SR_CH); |
| 190 | } |
| 191 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 192 | /* |
| 193 | * Start the DMA controller |
| 194 | * |
| 195 | * Preconditions: |
| 196 | * - the CDAR register must point to the start descriptor |
| 197 | * - the MRn[CS] bit must be cleared |
| 198 | */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 199 | static void dma_start(struct fsldma_chan *chan) |
| 200 | { |
| 201 | u32 mode; |
| 202 | |
| 203 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
| 204 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 205 | if (chan->feature & FSL_DMA_CHAN_PAUSE_EXT) { |
| 206 | DMA_OUT(chan, &chan->regs->bcr, 0, 32); |
| 207 | mode |= FSL_DMA_MR_EMP_EN; |
| 208 | } else { |
| 209 | mode &= ~FSL_DMA_MR_EMP_EN; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 210 | } |
| 211 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 212 | if (chan->feature & FSL_DMA_CHAN_START_EXT) { |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 213 | mode |= FSL_DMA_MR_EMS_EN; |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 214 | } else { |
| 215 | mode &= ~FSL_DMA_MR_EMS_EN; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 216 | mode |= FSL_DMA_MR_CS; |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 217 | } |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 218 | |
| 219 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
| 220 | } |
| 221 | |
| 222 | static void dma_halt(struct fsldma_chan *chan) |
| 223 | { |
| 224 | u32 mode; |
| 225 | int i; |
| 226 | |
Ira Snyder | a00ae34 | 2011-03-03 07:55:01 +0000 | [diff] [blame] | 227 | /* read the mode register */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 228 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
Ira Snyder | a00ae34 | 2011-03-03 07:55:01 +0000 | [diff] [blame] | 229 | |
| 230 | /* |
| 231 | * The 85xx controller supports channel abort, which will stop |
| 232 | * the current transfer. On 83xx, this bit is the transfer error |
| 233 | * mask bit, which should not be changed. |
| 234 | */ |
| 235 | if ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) { |
| 236 | mode |= FSL_DMA_MR_CA; |
| 237 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
| 238 | |
| 239 | mode &= ~FSL_DMA_MR_CA; |
| 240 | } |
| 241 | |
| 242 | /* stop the DMA controller */ |
| 243 | mode &= ~(FSL_DMA_MR_CS | FSL_DMA_MR_EMS_EN); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 244 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
| 245 | |
Ira Snyder | a00ae34 | 2011-03-03 07:55:01 +0000 | [diff] [blame] | 246 | /* wait for the DMA controller to become idle */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 247 | for (i = 0; i < 100; i++) { |
| 248 | if (dma_is_idle(chan)) |
| 249 | return; |
| 250 | |
| 251 | udelay(10); |
| 252 | } |
| 253 | |
| 254 | if (!dma_is_idle(chan)) |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 255 | chan_err(chan, "DMA halt timeout!\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 256 | } |
| 257 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 258 | /** |
| 259 | * fsl_chan_set_src_loop_size - Set source address hold transfer size |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 260 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 261 | * @size : Address loop size, 0 for disable loop |
| 262 | * |
| 263 | * The set source address hold transfer size. The source |
| 264 | * address hold or loop transfer size is when the DMA transfer |
| 265 | * data from source address (SA), if the loop size is 4, the DMA will |
| 266 | * read data from SA, SA + 1, SA + 2, SA + 3, then loop back to SA, |
| 267 | * SA + 1 ... and so on. |
| 268 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 269 | static void fsl_chan_set_src_loop_size(struct fsldma_chan *chan, int size) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 270 | { |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 271 | u32 mode; |
| 272 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 273 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 274 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 275 | switch (size) { |
| 276 | case 0: |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 277 | mode &= ~FSL_DMA_MR_SAHE; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 278 | break; |
| 279 | case 1: |
| 280 | case 2: |
| 281 | case 4: |
| 282 | case 8: |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 283 | mode |= FSL_DMA_MR_SAHE | (__ilog2(size) << 14); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 284 | break; |
| 285 | } |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 286 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 287 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 288 | } |
| 289 | |
| 290 | /** |
Ira Snyder | 738f5f7 | 2010-01-06 13:34:02 +0000 | [diff] [blame] | 291 | * fsl_chan_set_dst_loop_size - Set destination address hold transfer size |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 292 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 293 | * @size : Address loop size, 0 for disable loop |
| 294 | * |
| 295 | * The set destination address hold transfer size. The destination |
| 296 | * address hold or loop transfer size is when the DMA transfer |
| 297 | * data to destination address (TA), if the loop size is 4, the DMA will |
| 298 | * write data to TA, TA + 1, TA + 2, TA + 3, then loop back to TA, |
| 299 | * TA + 1 ... and so on. |
| 300 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 301 | static void fsl_chan_set_dst_loop_size(struct fsldma_chan *chan, int size) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 302 | { |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 303 | u32 mode; |
| 304 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 305 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 306 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 307 | switch (size) { |
| 308 | case 0: |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 309 | mode &= ~FSL_DMA_MR_DAHE; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 310 | break; |
| 311 | case 1: |
| 312 | case 2: |
| 313 | case 4: |
| 314 | case 8: |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 315 | mode |= FSL_DMA_MR_DAHE | (__ilog2(size) << 16); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 316 | break; |
| 317 | } |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 318 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 319 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 320 | } |
| 321 | |
| 322 | /** |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 323 | * fsl_chan_set_request_count - Set DMA Request Count for external control |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 324 | * @chan : Freescale DMA channel |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 325 | * @size : Number of bytes to transfer in a single request |
| 326 | * |
| 327 | * The Freescale DMA channel can be controlled by the external signal DREQ#. |
| 328 | * The DMA request count is how many bytes are allowed to transfer before |
| 329 | * pausing the channel, after which a new assertion of DREQ# resumes channel |
| 330 | * operation. |
| 331 | * |
| 332 | * A size of 0 disables external pause control. The maximum size is 1024. |
| 333 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 334 | static void fsl_chan_set_request_count(struct fsldma_chan *chan, int size) |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 335 | { |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 336 | u32 mode; |
| 337 | |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 338 | BUG_ON(size > 1024); |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 339 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 340 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 341 | mode |= (__ilog2(size) << 24) & 0x0f000000; |
| 342 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 343 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 344 | } |
| 345 | |
| 346 | /** |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 347 | * fsl_chan_toggle_ext_pause - Toggle channel external pause status |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 348 | * @chan : Freescale DMA channel |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 349 | * @enable : 0 is disabled, 1 is enabled. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 350 | * |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 351 | * The Freescale DMA channel can be controlled by the external signal DREQ#. |
| 352 | * The DMA Request Count feature should be used in addition to this feature |
| 353 | * to set the number of bytes to transfer before pausing the channel. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 354 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 355 | static void fsl_chan_toggle_ext_pause(struct fsldma_chan *chan, int enable) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 356 | { |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 357 | if (enable) |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 358 | chan->feature |= FSL_DMA_CHAN_PAUSE_EXT; |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 359 | else |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 360 | chan->feature &= ~FSL_DMA_CHAN_PAUSE_EXT; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 361 | } |
| 362 | |
| 363 | /** |
| 364 | * fsl_chan_toggle_ext_start - Toggle channel external start status |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 365 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 366 | * @enable : 0 is disabled, 1 is enabled. |
| 367 | * |
| 368 | * If enable the external start, the channel can be started by an |
| 369 | * external DMA start pin. So the dma_start() does not start the |
| 370 | * transfer immediately. The DMA channel will wait for the |
| 371 | * control pin asserted. |
| 372 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 373 | static void fsl_chan_toggle_ext_start(struct fsldma_chan *chan, int enable) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 374 | { |
| 375 | if (enable) |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 376 | chan->feature |= FSL_DMA_CHAN_START_EXT; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 377 | else |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 378 | chan->feature &= ~FSL_DMA_CHAN_START_EXT; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 379 | } |
| 380 | |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 381 | static void append_ld_queue(struct fsldma_chan *chan, struct fsl_desc_sw *desc) |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 382 | { |
| 383 | struct fsl_desc_sw *tail = to_fsl_desc(chan->ld_pending.prev); |
| 384 | |
| 385 | if (list_empty(&chan->ld_pending)) |
| 386 | goto out_splice; |
| 387 | |
| 388 | /* |
| 389 | * Add the hardware descriptor to the chain of hardware descriptors |
| 390 | * that already exists in memory. |
| 391 | * |
| 392 | * This will un-set the EOL bit of the existing transaction, and the |
| 393 | * last link in this transaction will become the EOL descriptor. |
| 394 | */ |
| 395 | set_desc_next(chan, &tail->hw, desc->async_tx.phys); |
| 396 | |
| 397 | /* |
| 398 | * Add the software descriptor and all children to the list |
| 399 | * of pending transactions |
| 400 | */ |
| 401 | out_splice: |
| 402 | list_splice_tail_init(&desc->tx_list, &chan->ld_pending); |
| 403 | } |
| 404 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 405 | static dma_cookie_t fsl_dma_tx_submit(struct dma_async_tx_descriptor *tx) |
| 406 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 407 | struct fsldma_chan *chan = to_fsl_chan(tx->chan); |
Dan Williams | eda3423 | 2009-09-08 17:53:02 -0700 | [diff] [blame] | 408 | struct fsl_desc_sw *desc = tx_to_fsl_desc(tx); |
| 409 | struct fsl_desc_sw *child; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 410 | unsigned long flags; |
| 411 | dma_cookie_t cookie; |
| 412 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 413 | spin_lock_irqsave(&chan->desc_lock, flags); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 414 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 415 | /* |
| 416 | * assign cookies to all of the software descriptors |
| 417 | * that make up this transaction |
| 418 | */ |
Dan Williams | eda3423 | 2009-09-08 17:53:02 -0700 | [diff] [blame] | 419 | list_for_each_entry(child, &desc->tx_list, node) { |
Russell King - ARM Linux | 884485e | 2012-03-06 22:34:46 +0000 | [diff] [blame] | 420 | cookie = dma_cookie_assign(&child->async_tx); |
Ira Snyder | bcfb746 | 2009-05-15 14:27:16 -0700 | [diff] [blame] | 421 | } |
| 422 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 423 | /* put this transaction onto the tail of the pending queue */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 424 | append_ld_queue(chan, desc); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 425 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 426 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 427 | |
| 428 | return cookie; |
| 429 | } |
| 430 | |
| 431 | /** |
| 432 | * fsl_dma_alloc_descriptor - Allocate descriptor from channel's DMA pool. |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 433 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 434 | * |
| 435 | * Return - The descriptor allocated. NULL for failed. |
| 436 | */ |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 437 | static struct fsl_desc_sw *fsl_dma_alloc_descriptor(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 438 | { |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 439 | struct fsl_desc_sw *desc; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 440 | dma_addr_t pdesc; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 441 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 442 | desc = dma_pool_alloc(chan->desc_pool, GFP_ATOMIC, &pdesc); |
| 443 | if (!desc) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 444 | chan_dbg(chan, "out of memory for link descriptor\n"); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 445 | return NULL; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 446 | } |
| 447 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 448 | memset(desc, 0, sizeof(*desc)); |
| 449 | INIT_LIST_HEAD(&desc->tx_list); |
| 450 | dma_async_tx_descriptor_init(&desc->async_tx, &chan->common); |
| 451 | desc->async_tx.tx_submit = fsl_dma_tx_submit; |
| 452 | desc->async_tx.phys = pdesc; |
| 453 | |
Ira Snyder | 0ab09c3 | 2011-03-03 07:54:56 +0000 | [diff] [blame] | 454 | #ifdef FSL_DMA_LD_DEBUG |
| 455 | chan_dbg(chan, "LD %p allocated\n", desc); |
| 456 | #endif |
| 457 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 458 | return desc; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 459 | } |
| 460 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 461 | /** |
| 462 | * fsl_dma_alloc_chan_resources - Allocate resources for DMA channel. |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 463 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 464 | * |
| 465 | * This function will create a dma pool for descriptor allocation. |
| 466 | * |
| 467 | * Return - The number of descriptors allocated. |
| 468 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 469 | static int fsl_dma_alloc_chan_resources(struct dma_chan *dchan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 470 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 471 | struct fsldma_chan *chan = to_fsl_chan(dchan); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 472 | |
| 473 | /* Has this channel already been allocated? */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 474 | if (chan->desc_pool) |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 475 | return 1; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 476 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 477 | /* |
| 478 | * We need the descriptor to be aligned to 32bytes |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 479 | * for meeting FSL DMA specification requirement. |
| 480 | */ |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 481 | chan->desc_pool = dma_pool_create(chan->name, chan->dev, |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 482 | sizeof(struct fsl_desc_sw), |
| 483 | __alignof__(struct fsl_desc_sw), 0); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 484 | if (!chan->desc_pool) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 485 | chan_err(chan, "unable to allocate descriptor pool\n"); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 486 | return -ENOMEM; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 487 | } |
| 488 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 489 | /* there is at least one descriptor free to be allocated */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 490 | return 1; |
| 491 | } |
| 492 | |
| 493 | /** |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 494 | * fsldma_free_desc_list - Free all descriptors in a queue |
| 495 | * @chan: Freescae DMA channel |
| 496 | * @list: the list to free |
| 497 | * |
| 498 | * LOCKING: must hold chan->desc_lock |
| 499 | */ |
| 500 | static void fsldma_free_desc_list(struct fsldma_chan *chan, |
| 501 | struct list_head *list) |
| 502 | { |
| 503 | struct fsl_desc_sw *desc, *_desc; |
| 504 | |
| 505 | list_for_each_entry_safe(desc, _desc, list, node) { |
| 506 | list_del(&desc->node); |
Ira Snyder | 0ab09c3 | 2011-03-03 07:54:56 +0000 | [diff] [blame] | 507 | #ifdef FSL_DMA_LD_DEBUG |
| 508 | chan_dbg(chan, "LD %p free\n", desc); |
| 509 | #endif |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 510 | dma_pool_free(chan->desc_pool, desc, desc->async_tx.phys); |
| 511 | } |
| 512 | } |
| 513 | |
| 514 | static void fsldma_free_desc_list_reverse(struct fsldma_chan *chan, |
| 515 | struct list_head *list) |
| 516 | { |
| 517 | struct fsl_desc_sw *desc, *_desc; |
| 518 | |
| 519 | list_for_each_entry_safe_reverse(desc, _desc, list, node) { |
| 520 | list_del(&desc->node); |
Ira Snyder | 0ab09c3 | 2011-03-03 07:54:56 +0000 | [diff] [blame] | 521 | #ifdef FSL_DMA_LD_DEBUG |
| 522 | chan_dbg(chan, "LD %p free\n", desc); |
| 523 | #endif |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 524 | dma_pool_free(chan->desc_pool, desc, desc->async_tx.phys); |
| 525 | } |
| 526 | } |
| 527 | |
| 528 | /** |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 529 | * fsl_dma_free_chan_resources - Free all resources of the channel. |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 530 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 531 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 532 | static void fsl_dma_free_chan_resources(struct dma_chan *dchan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 533 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 534 | struct fsldma_chan *chan = to_fsl_chan(dchan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 535 | unsigned long flags; |
| 536 | |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 537 | chan_dbg(chan, "free all channel resources\n"); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 538 | spin_lock_irqsave(&chan->desc_lock, flags); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 539 | fsldma_free_desc_list(chan, &chan->ld_pending); |
| 540 | fsldma_free_desc_list(chan, &chan->ld_running); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 541 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 542 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 543 | dma_pool_destroy(chan->desc_pool); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 544 | chan->desc_pool = NULL; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 545 | } |
| 546 | |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 547 | static struct dma_async_tx_descriptor * |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 548 | fsl_dma_prep_interrupt(struct dma_chan *dchan, unsigned long flags) |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 549 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 550 | struct fsldma_chan *chan; |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 551 | struct fsl_desc_sw *new; |
| 552 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 553 | if (!dchan) |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 554 | return NULL; |
| 555 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 556 | chan = to_fsl_chan(dchan); |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 557 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 558 | new = fsl_dma_alloc_descriptor(chan); |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 559 | if (!new) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 560 | chan_err(chan, "%s\n", msg_ld_oom); |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 561 | return NULL; |
| 562 | } |
| 563 | |
| 564 | new->async_tx.cookie = -EBUSY; |
Dan Williams | 636bdea | 2008-04-17 20:17:26 -0700 | [diff] [blame] | 565 | new->async_tx.flags = flags; |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 566 | |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 567 | /* Insert the link descriptor to the LD ring */ |
Dan Williams | eda3423 | 2009-09-08 17:53:02 -0700 | [diff] [blame] | 568 | list_add_tail(&new->node, &new->tx_list); |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 569 | |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 570 | /* Set End-of-link to the last link descriptor of new list */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 571 | set_ld_eol(chan, new); |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 572 | |
| 573 | return &new->async_tx; |
| 574 | } |
| 575 | |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 576 | static struct dma_async_tx_descriptor * |
| 577 | fsl_dma_prep_memcpy(struct dma_chan *dchan, |
| 578 | dma_addr_t dma_dst, dma_addr_t dma_src, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 579 | size_t len, unsigned long flags) |
| 580 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 581 | struct fsldma_chan *chan; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 582 | struct fsl_desc_sw *first = NULL, *prev = NULL, *new; |
| 583 | size_t copy; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 584 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 585 | if (!dchan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 586 | return NULL; |
| 587 | |
| 588 | if (!len) |
| 589 | return NULL; |
| 590 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 591 | chan = to_fsl_chan(dchan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 592 | |
| 593 | do { |
| 594 | |
| 595 | /* Allocate the link descriptor from DMA pool */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 596 | new = fsl_dma_alloc_descriptor(chan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 597 | if (!new) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 598 | chan_err(chan, "%s\n", msg_ld_oom); |
Ira Snyder | 2e077f8 | 2009-05-15 09:59:46 -0700 | [diff] [blame] | 599 | goto fail; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 600 | } |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 601 | |
Zhang Wei | 5682284 | 2008-03-13 10:45:27 -0700 | [diff] [blame] | 602 | copy = min(len, (size_t)FSL_DMA_BCR_MAX_CNT); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 603 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 604 | set_desc_cnt(chan, &new->hw, copy); |
| 605 | set_desc_src(chan, &new->hw, dma_src); |
| 606 | set_desc_dst(chan, &new->hw, dma_dst); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 607 | |
| 608 | if (!first) |
| 609 | first = new; |
| 610 | else |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 611 | set_desc_next(chan, &prev->hw, new->async_tx.phys); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 612 | |
| 613 | new->async_tx.cookie = 0; |
Dan Williams | 636bdea | 2008-04-17 20:17:26 -0700 | [diff] [blame] | 614 | async_tx_ack(&new->async_tx); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 615 | |
| 616 | prev = new; |
| 617 | len -= copy; |
| 618 | dma_src += copy; |
Ira Snyder | 738f5f7 | 2010-01-06 13:34:02 +0000 | [diff] [blame] | 619 | dma_dst += copy; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 620 | |
| 621 | /* Insert the link descriptor to the LD ring */ |
Dan Williams | eda3423 | 2009-09-08 17:53:02 -0700 | [diff] [blame] | 622 | list_add_tail(&new->node, &first->tx_list); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 623 | } while (len); |
| 624 | |
Dan Williams | 636bdea | 2008-04-17 20:17:26 -0700 | [diff] [blame] | 625 | new->async_tx.flags = flags; /* client is in control of this ack */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 626 | new->async_tx.cookie = -EBUSY; |
| 627 | |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 628 | /* Set End-of-link to the last link descriptor of new list */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 629 | set_ld_eol(chan, new); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 630 | |
Ira Snyder | 2e077f8 | 2009-05-15 09:59:46 -0700 | [diff] [blame] | 631 | return &first->async_tx; |
| 632 | |
| 633 | fail: |
| 634 | if (!first) |
| 635 | return NULL; |
| 636 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 637 | fsldma_free_desc_list_reverse(chan, &first->tx_list); |
Ira Snyder | 2e077f8 | 2009-05-15 09:59:46 -0700 | [diff] [blame] | 638 | return NULL; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 639 | } |
| 640 | |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 641 | static struct dma_async_tx_descriptor *fsl_dma_prep_sg(struct dma_chan *dchan, |
| 642 | struct scatterlist *dst_sg, unsigned int dst_nents, |
| 643 | struct scatterlist *src_sg, unsigned int src_nents, |
| 644 | unsigned long flags) |
| 645 | { |
| 646 | struct fsl_desc_sw *first = NULL, *prev = NULL, *new = NULL; |
| 647 | struct fsldma_chan *chan = to_fsl_chan(dchan); |
| 648 | size_t dst_avail, src_avail; |
| 649 | dma_addr_t dst, src; |
| 650 | size_t len; |
| 651 | |
| 652 | /* basic sanity checks */ |
| 653 | if (dst_nents == 0 || src_nents == 0) |
| 654 | return NULL; |
| 655 | |
| 656 | if (dst_sg == NULL || src_sg == NULL) |
| 657 | return NULL; |
| 658 | |
| 659 | /* |
| 660 | * TODO: should we check that both scatterlists have the same |
| 661 | * TODO: number of bytes in total? Is that really an error? |
| 662 | */ |
| 663 | |
| 664 | /* get prepared for the loop */ |
| 665 | dst_avail = sg_dma_len(dst_sg); |
| 666 | src_avail = sg_dma_len(src_sg); |
| 667 | |
| 668 | /* run until we are out of scatterlist entries */ |
| 669 | while (true) { |
| 670 | |
| 671 | /* create the largest transaction possible */ |
| 672 | len = min_t(size_t, src_avail, dst_avail); |
| 673 | len = min_t(size_t, len, FSL_DMA_BCR_MAX_CNT); |
| 674 | if (len == 0) |
| 675 | goto fetch; |
| 676 | |
| 677 | dst = sg_dma_address(dst_sg) + sg_dma_len(dst_sg) - dst_avail; |
| 678 | src = sg_dma_address(src_sg) + sg_dma_len(src_sg) - src_avail; |
| 679 | |
| 680 | /* allocate and populate the descriptor */ |
| 681 | new = fsl_dma_alloc_descriptor(chan); |
| 682 | if (!new) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 683 | chan_err(chan, "%s\n", msg_ld_oom); |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 684 | goto fail; |
| 685 | } |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 686 | |
| 687 | set_desc_cnt(chan, &new->hw, len); |
| 688 | set_desc_src(chan, &new->hw, src); |
| 689 | set_desc_dst(chan, &new->hw, dst); |
| 690 | |
| 691 | if (!first) |
| 692 | first = new; |
| 693 | else |
| 694 | set_desc_next(chan, &prev->hw, new->async_tx.phys); |
| 695 | |
| 696 | new->async_tx.cookie = 0; |
| 697 | async_tx_ack(&new->async_tx); |
| 698 | prev = new; |
| 699 | |
| 700 | /* Insert the link descriptor to the LD ring */ |
| 701 | list_add_tail(&new->node, &first->tx_list); |
| 702 | |
| 703 | /* update metadata */ |
| 704 | dst_avail -= len; |
| 705 | src_avail -= len; |
| 706 | |
| 707 | fetch: |
| 708 | /* fetch the next dst scatterlist entry */ |
| 709 | if (dst_avail == 0) { |
| 710 | |
| 711 | /* no more entries: we're done */ |
| 712 | if (dst_nents == 0) |
| 713 | break; |
| 714 | |
| 715 | /* fetch the next entry: if there are no more: done */ |
| 716 | dst_sg = sg_next(dst_sg); |
| 717 | if (dst_sg == NULL) |
| 718 | break; |
| 719 | |
| 720 | dst_nents--; |
| 721 | dst_avail = sg_dma_len(dst_sg); |
| 722 | } |
| 723 | |
| 724 | /* fetch the next src scatterlist entry */ |
| 725 | if (src_avail == 0) { |
| 726 | |
| 727 | /* no more entries: we're done */ |
| 728 | if (src_nents == 0) |
| 729 | break; |
| 730 | |
| 731 | /* fetch the next entry: if there are no more: done */ |
| 732 | src_sg = sg_next(src_sg); |
| 733 | if (src_sg == NULL) |
| 734 | break; |
| 735 | |
| 736 | src_nents--; |
| 737 | src_avail = sg_dma_len(src_sg); |
| 738 | } |
| 739 | } |
| 740 | |
| 741 | new->async_tx.flags = flags; /* client is in control of this ack */ |
| 742 | new->async_tx.cookie = -EBUSY; |
| 743 | |
| 744 | /* Set End-of-link to the last link descriptor of new list */ |
| 745 | set_ld_eol(chan, new); |
| 746 | |
| 747 | return &first->async_tx; |
| 748 | |
| 749 | fail: |
| 750 | if (!first) |
| 751 | return NULL; |
| 752 | |
| 753 | fsldma_free_desc_list_reverse(chan, &first->tx_list); |
| 754 | return NULL; |
| 755 | } |
| 756 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 757 | /** |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 758 | * fsl_dma_prep_slave_sg - prepare descriptors for a DMA_SLAVE transaction |
| 759 | * @chan: DMA channel |
| 760 | * @sgl: scatterlist to transfer to/from |
| 761 | * @sg_len: number of entries in @scatterlist |
| 762 | * @direction: DMA direction |
| 763 | * @flags: DMAEngine flags |
Alexandre Bounine | 185ecb5 | 2012-03-08 15:35:13 -0500 | [diff] [blame] | 764 | * @context: transaction context (ignored) |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 765 | * |
| 766 | * Prepare a set of descriptors for a DMA_SLAVE transaction. Following the |
| 767 | * DMA_SLAVE API, this gets the device-specific information from the |
| 768 | * chan->private variable. |
| 769 | */ |
| 770 | static struct dma_async_tx_descriptor *fsl_dma_prep_slave_sg( |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 771 | struct dma_chan *dchan, struct scatterlist *sgl, unsigned int sg_len, |
Alexandre Bounine | 185ecb5 | 2012-03-08 15:35:13 -0500 | [diff] [blame] | 772 | enum dma_transfer_direction direction, unsigned long flags, |
| 773 | void *context) |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 774 | { |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 775 | /* |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 776 | * This operation is not supported on the Freescale DMA controller |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 777 | * |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 778 | * However, we need to provide the function pointer to allow the |
| 779 | * device_control() method to work. |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 780 | */ |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 781 | return NULL; |
| 782 | } |
| 783 | |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 784 | static int fsl_dma_device_control(struct dma_chan *dchan, |
Linus Walleij | 0582763 | 2010-05-17 16:30:42 -0700 | [diff] [blame] | 785 | enum dma_ctrl_cmd cmd, unsigned long arg) |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 786 | { |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 787 | struct dma_slave_config *config; |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 788 | struct fsldma_chan *chan; |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 789 | unsigned long flags; |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 790 | int size; |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 791 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 792 | if (!dchan) |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 793 | return -EINVAL; |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 794 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 795 | chan = to_fsl_chan(dchan); |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 796 | |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 797 | switch (cmd) { |
| 798 | case DMA_TERMINATE_ALL: |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 799 | spin_lock_irqsave(&chan->desc_lock, flags); |
| 800 | |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 801 | /* Halt the DMA engine */ |
| 802 | dma_halt(chan); |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 803 | |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 804 | /* Remove and free all of the descriptors in the LD queue */ |
| 805 | fsldma_free_desc_list(chan, &chan->ld_pending); |
| 806 | fsldma_free_desc_list(chan, &chan->ld_running); |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 807 | chan->idle = true; |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 808 | |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 809 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
| 810 | return 0; |
| 811 | |
| 812 | case DMA_SLAVE_CONFIG: |
| 813 | config = (struct dma_slave_config *)arg; |
| 814 | |
| 815 | /* make sure the channel supports setting burst size */ |
| 816 | if (!chan->set_request_count) |
| 817 | return -ENXIO; |
| 818 | |
| 819 | /* we set the controller burst size depending on direction */ |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 820 | if (config->direction == DMA_MEM_TO_DEV) |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 821 | size = config->dst_addr_width * config->dst_maxburst; |
| 822 | else |
| 823 | size = config->src_addr_width * config->src_maxburst; |
| 824 | |
| 825 | chan->set_request_count(chan, size); |
| 826 | return 0; |
| 827 | |
| 828 | case FSLDMA_EXTERNAL_START: |
| 829 | |
| 830 | /* make sure the channel supports external start */ |
| 831 | if (!chan->toggle_ext_start) |
| 832 | return -ENXIO; |
| 833 | |
| 834 | chan->toggle_ext_start(chan, arg); |
| 835 | return 0; |
| 836 | |
| 837 | default: |
| 838 | return -ENXIO; |
| 839 | } |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 840 | |
| 841 | return 0; |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 842 | } |
| 843 | |
| 844 | /** |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 845 | * fsldma_cleanup_descriptor - cleanup and free a single link descriptor |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 846 | * @chan: Freescale DMA channel |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 847 | * @desc: descriptor to cleanup and free |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 848 | * |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 849 | * This function is used on a descriptor which has been executed by the DMA |
| 850 | * controller. It will run any callbacks, submit any dependencies, and then |
| 851 | * free the descriptor. |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 852 | */ |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 853 | static void fsldma_cleanup_descriptor(struct fsldma_chan *chan, |
| 854 | struct fsl_desc_sw *desc) |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 855 | { |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 856 | struct dma_async_tx_descriptor *txd = &desc->async_tx; |
| 857 | struct device *dev = chan->common.device->dev; |
| 858 | dma_addr_t src = get_desc_src(chan, desc); |
| 859 | dma_addr_t dst = get_desc_dst(chan, desc); |
| 860 | u32 len = get_desc_cnt(chan, desc); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 861 | |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 862 | /* Run the link descriptor callback function */ |
| 863 | if (txd->callback) { |
| 864 | #ifdef FSL_DMA_LD_DEBUG |
| 865 | chan_dbg(chan, "LD %p callback\n", desc); |
| 866 | #endif |
| 867 | txd->callback(txd->callback_param); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 868 | } |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 869 | |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 870 | /* Run any dependencies */ |
| 871 | dma_run_dependencies(txd); |
| 872 | |
Dan Williams | d38a8c6 | 2013-10-18 19:35:23 +0200 | [diff] [blame] | 873 | dma_descriptor_unmap(txd); |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 874 | #ifdef FSL_DMA_LD_DEBUG |
| 875 | chan_dbg(chan, "LD %p free\n", desc); |
| 876 | #endif |
| 877 | dma_pool_free(chan->desc_pool, desc, txd->phys); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 878 | } |
| 879 | |
| 880 | /** |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 881 | * fsl_chan_xfer_ld_queue - transfer any pending transactions |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 882 | * @chan : Freescale DMA channel |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 883 | * |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 884 | * HARDWARE STATE: idle |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 885 | * LOCKING: must hold chan->desc_lock |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 886 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 887 | static void fsl_chan_xfer_ld_queue(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 888 | { |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 889 | struct fsl_desc_sw *desc; |
Ira Snyder | 138ef01 | 2009-05-19 15:42:13 -0700 | [diff] [blame] | 890 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 891 | /* |
| 892 | * If the list of pending descriptors is empty, then we |
| 893 | * don't need to do any work at all |
| 894 | */ |
| 895 | if (list_empty(&chan->ld_pending)) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 896 | chan_dbg(chan, "no pending LDs\n"); |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 897 | return; |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 898 | } |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 899 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 900 | /* |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 901 | * The DMA controller is not idle, which means that the interrupt |
| 902 | * handler will start any queued transactions when it runs after |
| 903 | * this transaction finishes |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 904 | */ |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 905 | if (!chan->idle) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 906 | chan_dbg(chan, "DMA controller still busy\n"); |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 907 | return; |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 908 | } |
| 909 | |
| 910 | /* |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 911 | * If there are some link descriptors which have not been |
| 912 | * transferred, we need to start the controller |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 913 | */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 914 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 915 | /* |
| 916 | * Move all elements from the queue of pending transactions |
| 917 | * onto the list of running transactions |
| 918 | */ |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 919 | chan_dbg(chan, "idle, starting controller\n"); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 920 | desc = list_first_entry(&chan->ld_pending, struct fsl_desc_sw, node); |
| 921 | list_splice_tail_init(&chan->ld_pending, &chan->ld_running); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 922 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 923 | /* |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 924 | * The 85xx DMA controller doesn't clear the channel start bit |
| 925 | * automatically at the end of a transfer. Therefore we must clear |
| 926 | * it in software before starting the transfer. |
| 927 | */ |
| 928 | if ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) { |
| 929 | u32 mode; |
| 930 | |
| 931 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
| 932 | mode &= ~FSL_DMA_MR_CS; |
| 933 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
| 934 | } |
| 935 | |
| 936 | /* |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 937 | * Program the descriptor's address into the DMA controller, |
| 938 | * then start the DMA transaction |
| 939 | */ |
| 940 | set_cdar(chan, desc->async_tx.phys); |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 941 | get_cdar(chan); |
Ira Snyder | 138ef01 | 2009-05-19 15:42:13 -0700 | [diff] [blame] | 942 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 943 | dma_start(chan); |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 944 | chan->idle = false; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 945 | } |
| 946 | |
| 947 | /** |
| 948 | * fsl_dma_memcpy_issue_pending - Issue the DMA start command |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 949 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 950 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 951 | static void fsl_dma_memcpy_issue_pending(struct dma_chan *dchan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 952 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 953 | struct fsldma_chan *chan = to_fsl_chan(dchan); |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 954 | unsigned long flags; |
| 955 | |
| 956 | spin_lock_irqsave(&chan->desc_lock, flags); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 957 | fsl_chan_xfer_ld_queue(chan); |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 958 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 959 | } |
| 960 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 961 | /** |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 962 | * fsl_tx_status - Determine the DMA status |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 963 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 964 | */ |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 965 | static enum dma_status fsl_tx_status(struct dma_chan *dchan, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 966 | dma_cookie_t cookie, |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 967 | struct dma_tx_state *txstate) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 968 | { |
Andy Shevchenko | 9b0b0bd | 2013-05-27 15:14:35 +0300 | [diff] [blame] | 969 | return dma_cookie_status(dchan, cookie, txstate); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 970 | } |
| 971 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 972 | /*----------------------------------------------------------------------------*/ |
| 973 | /* Interrupt Handling */ |
| 974 | /*----------------------------------------------------------------------------*/ |
| 975 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 976 | static irqreturn_t fsldma_chan_irq(int irq, void *data) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 977 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 978 | struct fsldma_chan *chan = data; |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 979 | u32 stat; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 980 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 981 | /* save and clear the status register */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 982 | stat = get_sr(chan); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 983 | set_sr(chan, stat); |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 984 | chan_dbg(chan, "irq: stat = 0x%x\n", stat); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 985 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 986 | /* check that this was really our device */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 987 | stat &= ~(FSL_DMA_SR_CB | FSL_DMA_SR_CH); |
| 988 | if (!stat) |
| 989 | return IRQ_NONE; |
| 990 | |
| 991 | if (stat & FSL_DMA_SR_TE) |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 992 | chan_err(chan, "Transfer Error!\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 993 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 994 | /* |
| 995 | * Programming Error |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 996 | * The DMA_INTERRUPT async_tx is a NULL transfer, which will |
Masanari Iida | d73111c | 2012-08-04 23:37:53 +0900 | [diff] [blame] | 997 | * trigger a PE interrupt. |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 998 | */ |
| 999 | if (stat & FSL_DMA_SR_PE) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1000 | chan_dbg(chan, "irq: Programming Error INT\n"); |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 1001 | stat &= ~FSL_DMA_SR_PE; |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1002 | if (get_bcr(chan) != 0) |
| 1003 | chan_err(chan, "Programming Error!\n"); |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1004 | } |
| 1005 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 1006 | /* |
| 1007 | * For MPC8349, EOCDI event need to update cookie |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1008 | * and start the next transfer if it exist. |
| 1009 | */ |
| 1010 | if (stat & FSL_DMA_SR_EOCDI) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1011 | chan_dbg(chan, "irq: End-of-Chain link INT\n"); |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1012 | stat &= ~FSL_DMA_SR_EOCDI; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1013 | } |
| 1014 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 1015 | /* |
| 1016 | * If it current transfer is the end-of-transfer, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1017 | * we should clear the Channel Start bit for |
| 1018 | * prepare next transfer. |
| 1019 | */ |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1020 | if (stat & FSL_DMA_SR_EOLNI) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1021 | chan_dbg(chan, "irq: End-of-link INT\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1022 | stat &= ~FSL_DMA_SR_EOLNI; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1023 | } |
| 1024 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1025 | /* check that the DMA controller is really idle */ |
| 1026 | if (!dma_is_idle(chan)) |
| 1027 | chan_err(chan, "irq: controller not idle!\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1028 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1029 | /* check that we handled all of the bits */ |
| 1030 | if (stat) |
| 1031 | chan_err(chan, "irq: unhandled sr 0x%08x\n", stat); |
| 1032 | |
| 1033 | /* |
| 1034 | * Schedule the tasklet to handle all cleanup of the current |
| 1035 | * transaction. It will start a new transaction if there is |
| 1036 | * one pending. |
| 1037 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1038 | tasklet_schedule(&chan->tasklet); |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1039 | chan_dbg(chan, "irq: Exit\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1040 | return IRQ_HANDLED; |
| 1041 | } |
| 1042 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1043 | static void dma_do_tasklet(unsigned long data) |
| 1044 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1045 | struct fsldma_chan *chan = (struct fsldma_chan *)data; |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 1046 | struct fsl_desc_sw *desc, *_desc; |
| 1047 | LIST_HEAD(ld_cleanup); |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1048 | unsigned long flags; |
| 1049 | |
| 1050 | chan_dbg(chan, "tasklet entry\n"); |
| 1051 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1052 | spin_lock_irqsave(&chan->desc_lock, flags); |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 1053 | |
| 1054 | /* update the cookie if we have some descriptors to cleanup */ |
| 1055 | if (!list_empty(&chan->ld_running)) { |
| 1056 | dma_cookie_t cookie; |
| 1057 | |
| 1058 | desc = to_fsl_desc(chan->ld_running.prev); |
| 1059 | cookie = desc->async_tx.cookie; |
Russell King - ARM Linux | f7fbce0 | 2012-03-06 22:35:07 +0000 | [diff] [blame] | 1060 | dma_cookie_complete(&desc->async_tx); |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 1061 | |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 1062 | chan_dbg(chan, "completed_cookie=%d\n", cookie); |
| 1063 | } |
| 1064 | |
| 1065 | /* |
| 1066 | * move the descriptors to a temporary list so we can drop the lock |
| 1067 | * during the entire cleanup operation |
| 1068 | */ |
| 1069 | list_splice_tail_init(&chan->ld_running, &ld_cleanup); |
| 1070 | |
| 1071 | /* the hardware is now idle and ready for more */ |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1072 | chan->idle = true; |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 1073 | |
| 1074 | /* |
| 1075 | * Start any pending transactions automatically |
| 1076 | * |
| 1077 | * In the ideal case, we keep the DMA controller busy while we go |
| 1078 | * ahead and free the descriptors below. |
| 1079 | */ |
| 1080 | fsl_chan_xfer_ld_queue(chan); |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1081 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
| 1082 | |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 1083 | /* Run the callback for each descriptor, in order */ |
| 1084 | list_for_each_entry_safe(desc, _desc, &ld_cleanup, node) { |
| 1085 | |
| 1086 | /* Remove from the list of transactions */ |
| 1087 | list_del(&desc->node); |
| 1088 | |
| 1089 | /* Run all cleanup for this descriptor */ |
| 1090 | fsldma_cleanup_descriptor(chan, desc); |
| 1091 | } |
| 1092 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1093 | chan_dbg(chan, "tasklet exit\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1094 | } |
| 1095 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1096 | static irqreturn_t fsldma_ctrl_irq(int irq, void *data) |
| 1097 | { |
| 1098 | struct fsldma_device *fdev = data; |
| 1099 | struct fsldma_chan *chan; |
| 1100 | unsigned int handled = 0; |
| 1101 | u32 gsr, mask; |
| 1102 | int i; |
| 1103 | |
| 1104 | gsr = (fdev->feature & FSL_DMA_BIG_ENDIAN) ? in_be32(fdev->regs) |
| 1105 | : in_le32(fdev->regs); |
| 1106 | mask = 0xff000000; |
| 1107 | dev_dbg(fdev->dev, "IRQ: gsr 0x%.8x\n", gsr); |
| 1108 | |
| 1109 | for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { |
| 1110 | chan = fdev->chan[i]; |
| 1111 | if (!chan) |
| 1112 | continue; |
| 1113 | |
| 1114 | if (gsr & mask) { |
| 1115 | dev_dbg(fdev->dev, "IRQ: chan %d\n", chan->id); |
| 1116 | fsldma_chan_irq(irq, chan); |
| 1117 | handled++; |
| 1118 | } |
| 1119 | |
| 1120 | gsr &= ~mask; |
| 1121 | mask >>= 8; |
| 1122 | } |
| 1123 | |
| 1124 | return IRQ_RETVAL(handled); |
| 1125 | } |
| 1126 | |
| 1127 | static void fsldma_free_irqs(struct fsldma_device *fdev) |
| 1128 | { |
| 1129 | struct fsldma_chan *chan; |
| 1130 | int i; |
| 1131 | |
| 1132 | if (fdev->irq != NO_IRQ) { |
| 1133 | dev_dbg(fdev->dev, "free per-controller IRQ\n"); |
| 1134 | free_irq(fdev->irq, fdev); |
| 1135 | return; |
| 1136 | } |
| 1137 | |
| 1138 | for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { |
| 1139 | chan = fdev->chan[i]; |
| 1140 | if (chan && chan->irq != NO_IRQ) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1141 | chan_dbg(chan, "free per-channel IRQ\n"); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1142 | free_irq(chan->irq, chan); |
| 1143 | } |
| 1144 | } |
| 1145 | } |
| 1146 | |
| 1147 | static int fsldma_request_irqs(struct fsldma_device *fdev) |
| 1148 | { |
| 1149 | struct fsldma_chan *chan; |
| 1150 | int ret; |
| 1151 | int i; |
| 1152 | |
| 1153 | /* if we have a per-controller IRQ, use that */ |
| 1154 | if (fdev->irq != NO_IRQ) { |
| 1155 | dev_dbg(fdev->dev, "request per-controller IRQ\n"); |
| 1156 | ret = request_irq(fdev->irq, fsldma_ctrl_irq, IRQF_SHARED, |
| 1157 | "fsldma-controller", fdev); |
| 1158 | return ret; |
| 1159 | } |
| 1160 | |
| 1161 | /* no per-controller IRQ, use the per-channel IRQs */ |
| 1162 | for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { |
| 1163 | chan = fdev->chan[i]; |
| 1164 | if (!chan) |
| 1165 | continue; |
| 1166 | |
| 1167 | if (chan->irq == NO_IRQ) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1168 | chan_err(chan, "interrupts property missing in device tree\n"); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1169 | ret = -ENODEV; |
| 1170 | goto out_unwind; |
| 1171 | } |
| 1172 | |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1173 | chan_dbg(chan, "request per-channel IRQ\n"); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1174 | ret = request_irq(chan->irq, fsldma_chan_irq, IRQF_SHARED, |
| 1175 | "fsldma-chan", chan); |
| 1176 | if (ret) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1177 | chan_err(chan, "unable to request per-channel IRQ\n"); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1178 | goto out_unwind; |
| 1179 | } |
| 1180 | } |
| 1181 | |
| 1182 | return 0; |
| 1183 | |
| 1184 | out_unwind: |
| 1185 | for (/* none */; i >= 0; i--) { |
| 1186 | chan = fdev->chan[i]; |
| 1187 | if (!chan) |
| 1188 | continue; |
| 1189 | |
| 1190 | if (chan->irq == NO_IRQ) |
| 1191 | continue; |
| 1192 | |
| 1193 | free_irq(chan->irq, chan); |
| 1194 | } |
| 1195 | |
| 1196 | return ret; |
| 1197 | } |
| 1198 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1199 | /*----------------------------------------------------------------------------*/ |
| 1200 | /* OpenFirmware Subsystem */ |
| 1201 | /*----------------------------------------------------------------------------*/ |
| 1202 | |
Bill Pemberton | 463a1f8 | 2012-11-19 13:22:55 -0500 | [diff] [blame] | 1203 | static int fsl_dma_chan_probe(struct fsldma_device *fdev, |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1204 | struct device_node *node, u32 feature, const char *compatible) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1205 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1206 | struct fsldma_chan *chan; |
Ira Snyder | 4ce0e95 | 2010-01-06 13:34:00 +0000 | [diff] [blame] | 1207 | struct resource res; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1208 | int err; |
| 1209 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1210 | /* alloc channel */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1211 | chan = kzalloc(sizeof(*chan), GFP_KERNEL); |
| 1212 | if (!chan) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1213 | dev_err(fdev->dev, "no free memory for DMA channels!\n"); |
| 1214 | err = -ENOMEM; |
| 1215 | goto out_return; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1216 | } |
| 1217 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1218 | /* ioremap registers for use */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1219 | chan->regs = of_iomap(node, 0); |
| 1220 | if (!chan->regs) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1221 | dev_err(fdev->dev, "unable to ioremap registers\n"); |
| 1222 | err = -ENOMEM; |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1223 | goto out_free_chan; |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1224 | } |
| 1225 | |
Ira Snyder | 4ce0e95 | 2010-01-06 13:34:00 +0000 | [diff] [blame] | 1226 | err = of_address_to_resource(node, 0, &res); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1227 | if (err) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1228 | dev_err(fdev->dev, "unable to find 'reg' property\n"); |
| 1229 | goto out_iounmap_regs; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1230 | } |
| 1231 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1232 | chan->feature = feature; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1233 | if (!fdev->feature) |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1234 | fdev->feature = chan->feature; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1235 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1236 | /* |
| 1237 | * If the DMA device's feature is different than the feature |
| 1238 | * of its channels, report the bug |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1239 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1240 | WARN_ON(fdev->feature != chan->feature); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1241 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1242 | chan->dev = fdev->dev; |
Hongbo Zhang | 8de7a7d | 2013-09-26 17:33:43 +0800 | [diff] [blame] | 1243 | chan->id = (res.start & 0xfff) < 0x300 ? |
| 1244 | ((res.start - 0x100) & 0xfff) >> 7 : |
| 1245 | ((res.start - 0x200) & 0xfff) >> 7; |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1246 | if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1247 | dev_err(fdev->dev, "too many channels for device\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1248 | err = -EINVAL; |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1249 | goto out_iounmap_regs; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1250 | } |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1251 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1252 | fdev->chan[chan->id] = chan; |
| 1253 | tasklet_init(&chan->tasklet, dma_do_tasklet, (unsigned long)chan); |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1254 | snprintf(chan->name, sizeof(chan->name), "chan%d", chan->id); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1255 | |
| 1256 | /* Initialize the channel */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1257 | dma_init(chan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1258 | |
| 1259 | /* Clear cdar registers */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1260 | set_cdar(chan, 0); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1261 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1262 | switch (chan->feature & FSL_DMA_IP_MASK) { |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1263 | case FSL_DMA_IP_85XX: |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1264 | chan->toggle_ext_pause = fsl_chan_toggle_ext_pause; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1265 | case FSL_DMA_IP_83XX: |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1266 | chan->toggle_ext_start = fsl_chan_toggle_ext_start; |
| 1267 | chan->set_src_loop_size = fsl_chan_set_src_loop_size; |
| 1268 | chan->set_dst_loop_size = fsl_chan_set_dst_loop_size; |
| 1269 | chan->set_request_count = fsl_chan_set_request_count; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1270 | } |
| 1271 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1272 | spin_lock_init(&chan->desc_lock); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 1273 | INIT_LIST_HEAD(&chan->ld_pending); |
| 1274 | INIT_LIST_HEAD(&chan->ld_running); |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1275 | chan->idle = true; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1276 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1277 | chan->common.device = &fdev->common; |
Russell King - ARM Linux | 8ac6954 | 2012-03-06 22:36:27 +0000 | [diff] [blame] | 1278 | dma_cookie_init(&chan->common); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1279 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1280 | /* find the IRQ line, if it exists in the device tree */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1281 | chan->irq = irq_of_parse_and_map(node, 0); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1282 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1283 | /* Add the channel to DMA device channel list */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1284 | list_add_tail(&chan->common.device_node, &fdev->common.channels); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1285 | fdev->common.chancnt++; |
| 1286 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1287 | dev_info(fdev->dev, "#%d (%s), irq %d\n", chan->id, compatible, |
| 1288 | chan->irq != NO_IRQ ? chan->irq : fdev->irq); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1289 | |
| 1290 | return 0; |
Li Yang | 51ee87f | 2008-05-29 23:25:45 -0700 | [diff] [blame] | 1291 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1292 | out_iounmap_regs: |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1293 | iounmap(chan->regs); |
| 1294 | out_free_chan: |
| 1295 | kfree(chan); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1296 | out_return: |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1297 | return err; |
| 1298 | } |
| 1299 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1300 | static void fsl_dma_chan_remove(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1301 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1302 | irq_dispose_mapping(chan->irq); |
| 1303 | list_del(&chan->common.device_node); |
| 1304 | iounmap(chan->regs); |
| 1305 | kfree(chan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1306 | } |
| 1307 | |
Bill Pemberton | 463a1f8 | 2012-11-19 13:22:55 -0500 | [diff] [blame] | 1308 | static int fsldma_of_probe(struct platform_device *op) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1309 | { |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1310 | struct fsldma_device *fdev; |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1311 | struct device_node *child; |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1312 | int err; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1313 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1314 | fdev = kzalloc(sizeof(*fdev), GFP_KERNEL); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1315 | if (!fdev) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1316 | dev_err(&op->dev, "No enough memory for 'priv'\n"); |
| 1317 | err = -ENOMEM; |
| 1318 | goto out_return; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1319 | } |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1320 | |
| 1321 | fdev->dev = &op->dev; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1322 | INIT_LIST_HEAD(&fdev->common.channels); |
| 1323 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1324 | /* ioremap the registers for use */ |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1325 | fdev->regs = of_iomap(op->dev.of_node, 0); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1326 | if (!fdev->regs) { |
| 1327 | dev_err(&op->dev, "unable to ioremap registers\n"); |
| 1328 | err = -ENOMEM; |
| 1329 | goto out_free_fdev; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1330 | } |
| 1331 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1332 | /* map the channel IRQ if it exists, but don't hookup the handler yet */ |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1333 | fdev->irq = irq_of_parse_and_map(op->dev.of_node, 0); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1334 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1335 | dma_cap_set(DMA_MEMCPY, fdev->common.cap_mask); |
| 1336 | dma_cap_set(DMA_INTERRUPT, fdev->common.cap_mask); |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 1337 | dma_cap_set(DMA_SG, fdev->common.cap_mask); |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 1338 | dma_cap_set(DMA_SLAVE, fdev->common.cap_mask); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1339 | fdev->common.device_alloc_chan_resources = fsl_dma_alloc_chan_resources; |
| 1340 | fdev->common.device_free_chan_resources = fsl_dma_free_chan_resources; |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 1341 | fdev->common.device_prep_dma_interrupt = fsl_dma_prep_interrupt; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1342 | fdev->common.device_prep_dma_memcpy = fsl_dma_prep_memcpy; |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 1343 | fdev->common.device_prep_dma_sg = fsl_dma_prep_sg; |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 1344 | fdev->common.device_tx_status = fsl_tx_status; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1345 | fdev->common.device_issue_pending = fsl_dma_memcpy_issue_pending; |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 1346 | fdev->common.device_prep_slave_sg = fsl_dma_prep_slave_sg; |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 1347 | fdev->common.device_control = fsl_dma_device_control; |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1348 | fdev->common.dev = &op->dev; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1349 | |
Li Yang | e2c8e425 | 2010-11-11 20:16:29 +0800 | [diff] [blame] | 1350 | dma_set_mask(&(op->dev), DMA_BIT_MASK(36)); |
| 1351 | |
Jingoo Han | dd3daca | 2013-05-24 10:10:13 +0900 | [diff] [blame] | 1352 | platform_set_drvdata(op, fdev); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1353 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1354 | /* |
| 1355 | * We cannot use of_platform_bus_probe() because there is no |
| 1356 | * of_platform_bus_remove(). Instead, we manually instantiate every DMA |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1357 | * channel object. |
| 1358 | */ |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1359 | for_each_child_of_node(op->dev.of_node, child) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1360 | if (of_device_is_compatible(child, "fsl,eloplus-dma-channel")) { |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1361 | fsl_dma_chan_probe(fdev, child, |
| 1362 | FSL_DMA_IP_85XX | FSL_DMA_BIG_ENDIAN, |
| 1363 | "fsl,eloplus-dma-channel"); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1364 | } |
| 1365 | |
| 1366 | if (of_device_is_compatible(child, "fsl,elo-dma-channel")) { |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1367 | fsl_dma_chan_probe(fdev, child, |
| 1368 | FSL_DMA_IP_83XX | FSL_DMA_LITTLE_ENDIAN, |
| 1369 | "fsl,elo-dma-channel"); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1370 | } |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1371 | } |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1372 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1373 | /* |
| 1374 | * Hookup the IRQ handler(s) |
| 1375 | * |
| 1376 | * If we have a per-controller interrupt, we prefer that to the |
| 1377 | * per-channel interrupts to reduce the number of shared interrupt |
| 1378 | * handlers on the same IRQ line |
| 1379 | */ |
| 1380 | err = fsldma_request_irqs(fdev); |
| 1381 | if (err) { |
| 1382 | dev_err(fdev->dev, "unable to request IRQs\n"); |
| 1383 | goto out_free_fdev; |
| 1384 | } |
| 1385 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1386 | dma_async_device_register(&fdev->common); |
| 1387 | return 0; |
| 1388 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1389 | out_free_fdev: |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1390 | irq_dispose_mapping(fdev->irq); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1391 | kfree(fdev); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1392 | out_return: |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1393 | return err; |
| 1394 | } |
| 1395 | |
Grant Likely | 2dc1158 | 2010-08-06 09:25:50 -0600 | [diff] [blame] | 1396 | static int fsldma_of_remove(struct platform_device *op) |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1397 | { |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1398 | struct fsldma_device *fdev; |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1399 | unsigned int i; |
| 1400 | |
Jingoo Han | dd3daca | 2013-05-24 10:10:13 +0900 | [diff] [blame] | 1401 | fdev = platform_get_drvdata(op); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1402 | dma_async_device_unregister(&fdev->common); |
| 1403 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1404 | fsldma_free_irqs(fdev); |
| 1405 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1406 | for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1407 | if (fdev->chan[i]) |
| 1408 | fsl_dma_chan_remove(fdev->chan[i]); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1409 | } |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1410 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1411 | iounmap(fdev->regs); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1412 | kfree(fdev); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1413 | |
| 1414 | return 0; |
| 1415 | } |
| 1416 | |
Márton Németh | 4b1cf1f | 2010-02-02 23:41:06 -0700 | [diff] [blame] | 1417 | static const struct of_device_id fsldma_of_ids[] = { |
Hongbo Zhang | 8de7a7d | 2013-09-26 17:33:43 +0800 | [diff] [blame] | 1418 | { .compatible = "fsl,elo3-dma", }, |
Kumar Gala | 049c9d4 | 2008-03-31 11:13:21 -0500 | [diff] [blame] | 1419 | { .compatible = "fsl,eloplus-dma", }, |
| 1420 | { .compatible = "fsl,elo-dma", }, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1421 | {} |
| 1422 | }; |
| 1423 | |
Ira W. Snyder | 8faa7cf | 2011-04-07 10:33:03 -0700 | [diff] [blame] | 1424 | static struct platform_driver fsldma_of_driver = { |
Grant Likely | 4018294 | 2010-04-13 16:13:02 -0700 | [diff] [blame] | 1425 | .driver = { |
| 1426 | .name = "fsl-elo-dma", |
| 1427 | .owner = THIS_MODULE, |
| 1428 | .of_match_table = fsldma_of_ids, |
| 1429 | }, |
| 1430 | .probe = fsldma_of_probe, |
| 1431 | .remove = fsldma_of_remove, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1432 | }; |
| 1433 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1434 | /*----------------------------------------------------------------------------*/ |
| 1435 | /* Module Init / Exit */ |
| 1436 | /*----------------------------------------------------------------------------*/ |
| 1437 | |
| 1438 | static __init int fsldma_init(void) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1439 | { |
Hongbo Zhang | 8de7a7d | 2013-09-26 17:33:43 +0800 | [diff] [blame] | 1440 | pr_info("Freescale Elo series DMA driver\n"); |
Grant Likely | 0000612 | 2011-02-22 19:59:54 -0700 | [diff] [blame] | 1441 | return platform_driver_register(&fsldma_of_driver); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1442 | } |
| 1443 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1444 | static void __exit fsldma_exit(void) |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1445 | { |
Grant Likely | 0000612 | 2011-02-22 19:59:54 -0700 | [diff] [blame] | 1446 | platform_driver_unregister(&fsldma_of_driver); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1447 | } |
| 1448 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1449 | subsys_initcall(fsldma_init); |
| 1450 | module_exit(fsldma_exit); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1451 | |
Hongbo Zhang | 8de7a7d | 2013-09-26 17:33:43 +0800 | [diff] [blame] | 1452 | MODULE_DESCRIPTION("Freescale Elo series DMA driver"); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1453 | MODULE_LICENSE("GPL"); |