Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Intel IO-APIC support for multi-Pentium hosts. |
| 3 | * |
Ingo Molnar | 8f47e16 | 2009-01-31 02:03:42 +0100 | [diff] [blame] | 4 | * Copyright (C) 1997, 1998, 1999, 2000, 2009 Ingo Molnar, Hajnalka Szabo |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * |
| 6 | * Many thanks to Stig Venaas for trying out countless experimental |
| 7 | * patches and reporting/debugging problems patiently! |
| 8 | * |
| 9 | * (c) 1999, Multiple IO-APIC support, developed by |
| 10 | * Ken-ichi Yaku <yaku@css1.kbnes.nec.co.jp> and |
| 11 | * Hidemi Kishimoto <kisimoto@css1.kbnes.nec.co.jp>, |
| 12 | * further tested and cleaned up by Zach Brown <zab@redhat.com> |
| 13 | * and Ingo Molnar <mingo@redhat.com> |
| 14 | * |
| 15 | * Fixes |
| 16 | * Maciej W. Rozycki : Bits for genuine 82489DX APICs; |
| 17 | * thanks to Eric Gilmore |
| 18 | * and Rolf G. Tews |
| 19 | * for testing these extensively |
| 20 | * Paul Diefenbaugh : Added full ACPI support |
| 21 | */ |
| 22 | |
| 23 | #include <linux/mm.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/init.h> |
| 26 | #include <linux/delay.h> |
| 27 | #include <linux/sched.h> |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 28 | #include <linux/pci.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | #include <linux/mc146818rtc.h> |
| 30 | #include <linux/compiler.h> |
| 31 | #include <linux/acpi.h> |
Alexey Dobriyan | 129f694 | 2005-06-23 00:08:33 -0700 | [diff] [blame] | 32 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | #include <linux/sysdev.h> |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 34 | #include <linux/msi.h> |
Eric W. Biederman | 95d7788 | 2006-10-04 02:17:01 -0700 | [diff] [blame] | 35 | #include <linux/htirq.h> |
Nigel Cunningham | 7dfb710 | 2006-12-06 20:34:23 -0800 | [diff] [blame] | 36 | #include <linux/freezer.h> |
Eric W. Biederman | f26d6a2 | 2007-05-02 19:27:19 +0200 | [diff] [blame] | 37 | #include <linux/kthread.h> |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 38 | #include <linux/jiffies.h> /* time_after() */ |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 39 | #ifdef CONFIG_ACPI |
| 40 | #include <acpi/acpi_bus.h> |
| 41 | #endif |
| 42 | #include <linux/bootmem.h> |
| 43 | #include <linux/dmar.h> |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 44 | #include <linux/hpet.h> |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 45 | |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 46 | #include <asm/idle.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | #include <asm/io.h> |
| 48 | #include <asm/smp.h> |
Jaswinder Singh Rajput | 6d652ea | 2009-01-07 21:38:59 +0530 | [diff] [blame] | 49 | #include <asm/cpu.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | #include <asm/desc.h> |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 51 | #include <asm/proto.h> |
| 52 | #include <asm/acpi.h> |
| 53 | #include <asm/dma.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | #include <asm/timer.h> |
Ingo Molnar | 306e440 | 2005-06-30 02:58:55 -0700 | [diff] [blame] | 55 | #include <asm/i8259.h> |
Don Zickus | 3e4ff11 | 2006-06-26 13:57:01 +0200 | [diff] [blame] | 56 | #include <asm/nmi.h> |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 57 | #include <asm/msidef.h> |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 58 | #include <asm/hypertransport.h> |
Yinghai Lu | a4dbc34 | 2008-07-25 02:14:28 -0700 | [diff] [blame] | 59 | #include <asm/setup.h> |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 60 | #include <asm/irq_remapping.h> |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 61 | #include <asm/hpet.h> |
Jaswinder Singh Rajput | 2c1b284 | 2009-04-11 00:03:10 +0530 | [diff] [blame^] | 62 | #include <asm/hw_irq.h> |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 63 | #include <asm/uv/uv_hub.h> |
| 64 | #include <asm/uv/uv_irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 65 | |
Ingo Molnar | 7b6aa33 | 2009-02-17 13:58:15 +0100 | [diff] [blame] | 66 | #include <asm/apic.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 68 | #define __apicdebuginit(type) static type __init |
| 69 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 71 | * Is the SiS APIC rmw bug present ? |
| 72 | * -1 = don't know, 0 = no, 1 = yes |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | */ |
| 74 | int sis_apic_bug = -1; |
| 75 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 76 | static DEFINE_SPINLOCK(ioapic_lock); |
| 77 | static DEFINE_SPINLOCK(vector_lock); |
| 78 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 79 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | * # of IRQ routing registers |
| 81 | */ |
| 82 | int nr_ioapic_registers[MAX_IO_APICS]; |
| 83 | |
Alexey Starikovskiy | 9f640cc | 2008-04-04 23:41:13 +0400 | [diff] [blame] | 84 | /* I/O APIC entries */ |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 85 | struct mpc_ioapic mp_ioapics[MAX_IO_APICS]; |
Alexey Starikovskiy | 9f640cc | 2008-04-04 23:41:13 +0400 | [diff] [blame] | 86 | int nr_ioapics; |
| 87 | |
Alexey Starikovskiy | 584f734 | 2008-04-04 23:41:32 +0400 | [diff] [blame] | 88 | /* MP IRQ source entries */ |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 89 | struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES]; |
Alexey Starikovskiy | 584f734 | 2008-04-04 23:41:32 +0400 | [diff] [blame] | 90 | |
| 91 | /* # of MP IRQ source entries */ |
| 92 | int mp_irq_entries; |
| 93 | |
Alexey Starikovskiy | 8732fc4 | 2008-05-19 19:47:16 +0400 | [diff] [blame] | 94 | #if defined (CONFIG_MCA) || defined (CONFIG_EISA) |
| 95 | int mp_bus_id_to_type[MAX_MP_BUSSES]; |
| 96 | #endif |
| 97 | |
| 98 | DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); |
| 99 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 100 | int skip_ioapic_setup; |
| 101 | |
Ingo Molnar | 65a4e57 | 2009-01-31 03:36:17 +0100 | [diff] [blame] | 102 | void arch_disable_smp_support(void) |
| 103 | { |
| 104 | #ifdef CONFIG_PCI |
| 105 | noioapicquirk = 1; |
| 106 | noioapicreroute = -1; |
| 107 | #endif |
| 108 | skip_ioapic_setup = 1; |
| 109 | } |
| 110 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 111 | static int __init parse_noapic(char *str) |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 112 | { |
| 113 | /* disable IO-APIC */ |
Ingo Molnar | 65a4e57 | 2009-01-31 03:36:17 +0100 | [diff] [blame] | 114 | arch_disable_smp_support(); |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 115 | return 0; |
| 116 | } |
| 117 | early_param("noapic", parse_noapic); |
Chuck Ebbert | 66759a0 | 2005-09-12 18:49:25 +0200 | [diff] [blame] | 118 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 119 | struct irq_pin_list; |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 120 | |
| 121 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 122 | * This is performance-critical, we want to do it O(1) |
| 123 | * |
| 124 | * the indexing order of this array favors 1:1 mappings |
| 125 | * between pins and IRQs. |
| 126 | */ |
| 127 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 128 | struct irq_pin_list { |
| 129 | int apic, pin; |
| 130 | struct irq_pin_list *next; |
| 131 | }; |
Yinghai Lu | 301e619 | 2008-08-19 20:50:02 -0700 | [diff] [blame] | 132 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 133 | static struct irq_pin_list *get_one_free_irq_2_pin(int cpu) |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 134 | { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 135 | struct irq_pin_list *pin; |
| 136 | int node; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 137 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 138 | node = cpu_to_node(cpu); |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 139 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 140 | pin = kzalloc_node(sizeof(*pin), GFP_ATOMIC, node); |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 141 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 142 | return pin; |
| 143 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 145 | struct irq_cfg { |
| 146 | struct irq_pin_list *irq_2_pin; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 147 | cpumask_var_t domain; |
| 148 | cpumask_var_t old_domain; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 149 | unsigned move_cleanup_count; |
| 150 | u8 vector; |
| 151 | u8 move_in_progress : 1; |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 152 | #ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC |
| 153 | u8 move_desc_pending : 1; |
| 154 | #endif |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 155 | }; |
| 156 | |
| 157 | /* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ |
| 158 | #ifdef CONFIG_SPARSE_IRQ |
| 159 | static struct irq_cfg irq_cfgx[] = { |
| 160 | #else |
| 161 | static struct irq_cfg irq_cfgx[NR_IRQS] = { |
| 162 | #endif |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 163 | [0] = { .vector = IRQ0_VECTOR, }, |
| 164 | [1] = { .vector = IRQ1_VECTOR, }, |
| 165 | [2] = { .vector = IRQ2_VECTOR, }, |
| 166 | [3] = { .vector = IRQ3_VECTOR, }, |
| 167 | [4] = { .vector = IRQ4_VECTOR, }, |
| 168 | [5] = { .vector = IRQ5_VECTOR, }, |
| 169 | [6] = { .vector = IRQ6_VECTOR, }, |
| 170 | [7] = { .vector = IRQ7_VECTOR, }, |
| 171 | [8] = { .vector = IRQ8_VECTOR, }, |
| 172 | [9] = { .vector = IRQ9_VECTOR, }, |
| 173 | [10] = { .vector = IRQ10_VECTOR, }, |
| 174 | [11] = { .vector = IRQ11_VECTOR, }, |
| 175 | [12] = { .vector = IRQ12_VECTOR, }, |
| 176 | [13] = { .vector = IRQ13_VECTOR, }, |
| 177 | [14] = { .vector = IRQ14_VECTOR, }, |
| 178 | [15] = { .vector = IRQ15_VECTOR, }, |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 179 | }; |
| 180 | |
Yinghai Lu | 13a0c3c | 2008-12-26 02:05:47 -0800 | [diff] [blame] | 181 | int __init arch_early_irq_init(void) |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 182 | { |
| 183 | struct irq_cfg *cfg; |
| 184 | struct irq_desc *desc; |
| 185 | int count; |
| 186 | int i; |
| 187 | |
| 188 | cfg = irq_cfgx; |
| 189 | count = ARRAY_SIZE(irq_cfgx); |
| 190 | |
| 191 | for (i = 0; i < count; i++) { |
| 192 | desc = irq_to_desc(i); |
| 193 | desc->chip_data = &cfg[i]; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 194 | alloc_bootmem_cpumask_var(&cfg[i].domain); |
| 195 | alloc_bootmem_cpumask_var(&cfg[i].old_domain); |
| 196 | if (i < NR_IRQS_LEGACY) |
| 197 | cpumask_setall(cfg[i].domain); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 198 | } |
Yinghai Lu | 13a0c3c | 2008-12-26 02:05:47 -0800 | [diff] [blame] | 199 | |
| 200 | return 0; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 201 | } |
| 202 | |
| 203 | #ifdef CONFIG_SPARSE_IRQ |
| 204 | static struct irq_cfg *irq_cfg(unsigned int irq) |
| 205 | { |
| 206 | struct irq_cfg *cfg = NULL; |
| 207 | struct irq_desc *desc; |
| 208 | |
| 209 | desc = irq_to_desc(irq); |
| 210 | if (desc) |
| 211 | cfg = desc->chip_data; |
| 212 | |
| 213 | return cfg; |
| 214 | } |
| 215 | |
| 216 | static struct irq_cfg *get_one_free_irq_cfg(int cpu) |
| 217 | { |
| 218 | struct irq_cfg *cfg; |
| 219 | int node; |
| 220 | |
| 221 | node = cpu_to_node(cpu); |
| 222 | |
| 223 | cfg = kzalloc_node(sizeof(*cfg), GFP_ATOMIC, node); |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 224 | if (cfg) { |
Mike Travis | 80855f7 | 2008-12-31 18:08:47 -0800 | [diff] [blame] | 225 | if (!alloc_cpumask_var_node(&cfg->domain, GFP_ATOMIC, node)) { |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 226 | kfree(cfg); |
| 227 | cfg = NULL; |
Mike Travis | 80855f7 | 2008-12-31 18:08:47 -0800 | [diff] [blame] | 228 | } else if (!alloc_cpumask_var_node(&cfg->old_domain, |
| 229 | GFP_ATOMIC, node)) { |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 230 | free_cpumask_var(cfg->domain); |
| 231 | kfree(cfg); |
| 232 | cfg = NULL; |
| 233 | } else { |
| 234 | cpumask_clear(cfg->domain); |
| 235 | cpumask_clear(cfg->old_domain); |
| 236 | } |
| 237 | } |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 238 | |
| 239 | return cfg; |
| 240 | } |
| 241 | |
Yinghai Lu | 13a0c3c | 2008-12-26 02:05:47 -0800 | [diff] [blame] | 242 | int arch_init_chip_data(struct irq_desc *desc, int cpu) |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 243 | { |
| 244 | struct irq_cfg *cfg; |
| 245 | |
| 246 | cfg = desc->chip_data; |
| 247 | if (!cfg) { |
| 248 | desc->chip_data = get_one_free_irq_cfg(cpu); |
| 249 | if (!desc->chip_data) { |
| 250 | printk(KERN_ERR "can not alloc irq_cfg\n"); |
| 251 | BUG_ON(1); |
| 252 | } |
| 253 | } |
Yinghai Lu | 13a0c3c | 2008-12-26 02:05:47 -0800 | [diff] [blame] | 254 | |
| 255 | return 0; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 256 | } |
| 257 | |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 258 | #ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC |
| 259 | |
| 260 | static void |
| 261 | init_copy_irq_2_pin(struct irq_cfg *old_cfg, struct irq_cfg *cfg, int cpu) |
| 262 | { |
| 263 | struct irq_pin_list *old_entry, *head, *tail, *entry; |
| 264 | |
| 265 | cfg->irq_2_pin = NULL; |
| 266 | old_entry = old_cfg->irq_2_pin; |
| 267 | if (!old_entry) |
| 268 | return; |
| 269 | |
| 270 | entry = get_one_free_irq_2_pin(cpu); |
| 271 | if (!entry) |
| 272 | return; |
| 273 | |
| 274 | entry->apic = old_entry->apic; |
| 275 | entry->pin = old_entry->pin; |
| 276 | head = entry; |
| 277 | tail = entry; |
| 278 | old_entry = old_entry->next; |
| 279 | while (old_entry) { |
| 280 | entry = get_one_free_irq_2_pin(cpu); |
| 281 | if (!entry) { |
| 282 | entry = head; |
| 283 | while (entry) { |
| 284 | head = entry->next; |
| 285 | kfree(entry); |
| 286 | entry = head; |
| 287 | } |
| 288 | /* still use the old one */ |
| 289 | return; |
| 290 | } |
| 291 | entry->apic = old_entry->apic; |
| 292 | entry->pin = old_entry->pin; |
| 293 | tail->next = entry; |
| 294 | tail = entry; |
| 295 | old_entry = old_entry->next; |
| 296 | } |
| 297 | |
| 298 | tail->next = NULL; |
| 299 | cfg->irq_2_pin = head; |
| 300 | } |
| 301 | |
| 302 | static void free_irq_2_pin(struct irq_cfg *old_cfg, struct irq_cfg *cfg) |
| 303 | { |
| 304 | struct irq_pin_list *entry, *next; |
| 305 | |
| 306 | if (old_cfg->irq_2_pin == cfg->irq_2_pin) |
| 307 | return; |
| 308 | |
| 309 | entry = old_cfg->irq_2_pin; |
| 310 | |
| 311 | while (entry) { |
| 312 | next = entry->next; |
| 313 | kfree(entry); |
| 314 | entry = next; |
| 315 | } |
| 316 | old_cfg->irq_2_pin = NULL; |
| 317 | } |
| 318 | |
| 319 | void arch_init_copy_chip_data(struct irq_desc *old_desc, |
| 320 | struct irq_desc *desc, int cpu) |
| 321 | { |
| 322 | struct irq_cfg *cfg; |
| 323 | struct irq_cfg *old_cfg; |
| 324 | |
| 325 | cfg = get_one_free_irq_cfg(cpu); |
| 326 | |
| 327 | if (!cfg) |
| 328 | return; |
| 329 | |
| 330 | desc->chip_data = cfg; |
| 331 | |
| 332 | old_cfg = old_desc->chip_data; |
| 333 | |
| 334 | memcpy(cfg, old_cfg, sizeof(struct irq_cfg)); |
| 335 | |
| 336 | init_copy_irq_2_pin(old_cfg, cfg, cpu); |
| 337 | } |
| 338 | |
| 339 | static void free_irq_cfg(struct irq_cfg *old_cfg) |
| 340 | { |
| 341 | kfree(old_cfg); |
| 342 | } |
| 343 | |
| 344 | void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc) |
| 345 | { |
| 346 | struct irq_cfg *old_cfg, *cfg; |
| 347 | |
| 348 | old_cfg = old_desc->chip_data; |
| 349 | cfg = desc->chip_data; |
| 350 | |
| 351 | if (old_cfg == cfg) |
| 352 | return; |
| 353 | |
| 354 | if (old_cfg) { |
| 355 | free_irq_2_pin(old_cfg, cfg); |
| 356 | free_irq_cfg(old_cfg); |
| 357 | old_desc->chip_data = NULL; |
| 358 | } |
| 359 | } |
| 360 | |
Ingo Molnar | d733e00 | 2008-12-17 13:35:51 +0100 | [diff] [blame] | 361 | static void |
| 362 | set_extra_move_desc(struct irq_desc *desc, const struct cpumask *mask) |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 363 | { |
| 364 | struct irq_cfg *cfg = desc->chip_data; |
| 365 | |
| 366 | if (!cfg->move_in_progress) { |
| 367 | /* it means that domain is not changed */ |
Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 368 | if (!cpumask_intersects(desc->affinity, mask)) |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 369 | cfg->move_desc_pending = 1; |
| 370 | } |
| 371 | } |
| 372 | #endif |
| 373 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 374 | #else |
| 375 | static struct irq_cfg *irq_cfg(unsigned int irq) |
| 376 | { |
| 377 | return irq < nr_irqs ? irq_cfgx + irq : NULL; |
| 378 | } |
| 379 | |
| 380 | #endif |
| 381 | |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 382 | #ifndef CONFIG_NUMA_MIGRATE_IRQ_DESC |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 383 | static inline void |
| 384 | set_extra_move_desc(struct irq_desc *desc, const struct cpumask *mask) |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 385 | { |
| 386 | } |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 387 | #endif |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 388 | |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 389 | struct io_apic { |
| 390 | unsigned int index; |
| 391 | unsigned int unused[3]; |
| 392 | unsigned int data; |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 393 | unsigned int unused2[11]; |
| 394 | unsigned int eoi; |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 395 | }; |
| 396 | |
| 397 | static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) |
| 398 | { |
| 399 | return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx) |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 400 | + (mp_ioapics[idx].apicaddr & ~PAGE_MASK); |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 401 | } |
| 402 | |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 403 | static inline void io_apic_eoi(unsigned int apic, unsigned int vector) |
| 404 | { |
| 405 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
| 406 | writel(vector, &io_apic->eoi); |
| 407 | } |
| 408 | |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 409 | static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) |
| 410 | { |
| 411 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
| 412 | writel(reg, &io_apic->index); |
| 413 | return readl(&io_apic->data); |
| 414 | } |
| 415 | |
| 416 | static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value) |
| 417 | { |
| 418 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
| 419 | writel(reg, &io_apic->index); |
| 420 | writel(value, &io_apic->data); |
| 421 | } |
| 422 | |
| 423 | /* |
| 424 | * Re-write a value: to be used for read-modify-write |
| 425 | * cycles where the read already set up the index register. |
| 426 | * |
| 427 | * Older SiS APIC requires we rewrite the index register |
| 428 | */ |
| 429 | static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value) |
| 430 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 431 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 432 | |
| 433 | if (sis_apic_bug) |
| 434 | writel(reg, &io_apic->index); |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 435 | writel(value, &io_apic->data); |
| 436 | } |
| 437 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 438 | static bool io_apic_level_ack_pending(struct irq_cfg *cfg) |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 439 | { |
| 440 | struct irq_pin_list *entry; |
| 441 | unsigned long flags; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 442 | |
| 443 | spin_lock_irqsave(&ioapic_lock, flags); |
| 444 | entry = cfg->irq_2_pin; |
| 445 | for (;;) { |
| 446 | unsigned int reg; |
| 447 | int pin; |
| 448 | |
| 449 | if (!entry) |
| 450 | break; |
| 451 | pin = entry->pin; |
| 452 | reg = io_apic_read(entry->apic, 0x10 + pin*2); |
| 453 | /* Is the remote IRR bit set? */ |
| 454 | if (reg & IO_APIC_REDIR_REMOTE_IRR) { |
| 455 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 456 | return true; |
| 457 | } |
| 458 | if (!entry->next) |
| 459 | break; |
| 460 | entry = entry->next; |
| 461 | } |
| 462 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 463 | |
| 464 | return false; |
| 465 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 466 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 467 | union entry_union { |
| 468 | struct { u32 w1, w2; }; |
| 469 | struct IO_APIC_route_entry entry; |
| 470 | }; |
| 471 | |
| 472 | static struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin) |
| 473 | { |
| 474 | union entry_union eu; |
| 475 | unsigned long flags; |
| 476 | spin_lock_irqsave(&ioapic_lock, flags); |
| 477 | eu.w1 = io_apic_read(apic, 0x10 + 2 * pin); |
| 478 | eu.w2 = io_apic_read(apic, 0x11 + 2 * pin); |
| 479 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 480 | return eu.entry; |
| 481 | } |
| 482 | |
Linus Torvalds | f9dadfa | 2006-11-01 10:05:35 -0800 | [diff] [blame] | 483 | /* |
| 484 | * When we write a new IO APIC routing entry, we need to write the high |
| 485 | * word first! If the mask bit in the low word is clear, we will enable |
| 486 | * the interrupt, and we need to make sure the entry is fully populated |
| 487 | * before that happens. |
| 488 | */ |
Andi Kleen | d15512f | 2006-12-07 02:14:07 +0100 | [diff] [blame] | 489 | static void |
| 490 | __ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) |
| 491 | { |
| 492 | union entry_union eu; |
| 493 | eu.entry = e; |
| 494 | io_apic_write(apic, 0x11 + 2*pin, eu.w2); |
| 495 | io_apic_write(apic, 0x10 + 2*pin, eu.w1); |
| 496 | } |
| 497 | |
Jeremy Fitzhardinge | ca97ab9 | 2009-02-09 12:05:47 -0800 | [diff] [blame] | 498 | void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 499 | { |
| 500 | unsigned long flags; |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 501 | spin_lock_irqsave(&ioapic_lock, flags); |
Andi Kleen | d15512f | 2006-12-07 02:14:07 +0100 | [diff] [blame] | 502 | __ioapic_write_entry(apic, pin, e); |
Linus Torvalds | f9dadfa | 2006-11-01 10:05:35 -0800 | [diff] [blame] | 503 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 504 | } |
| 505 | |
| 506 | /* |
| 507 | * When we mask an IO APIC routing entry, we need to write the low |
| 508 | * word first, in order to set the mask bit before we change the |
| 509 | * high bits! |
| 510 | */ |
| 511 | static void ioapic_mask_entry(int apic, int pin) |
| 512 | { |
| 513 | unsigned long flags; |
| 514 | union entry_union eu = { .entry.mask = 1 }; |
| 515 | |
| 516 | spin_lock_irqsave(&ioapic_lock, flags); |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 517 | io_apic_write(apic, 0x10 + 2*pin, eu.w1); |
| 518 | io_apic_write(apic, 0x11 + 2*pin, eu.w2); |
| 519 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 520 | } |
| 521 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 522 | #ifdef CONFIG_SMP |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 523 | static void send_cleanup_vector(struct irq_cfg *cfg) |
| 524 | { |
| 525 | cpumask_var_t cleanup_mask; |
| 526 | |
| 527 | if (unlikely(!alloc_cpumask_var(&cleanup_mask, GFP_ATOMIC))) { |
| 528 | unsigned int i; |
| 529 | cfg->move_cleanup_count = 0; |
| 530 | for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) |
| 531 | cfg->move_cleanup_count++; |
| 532 | for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 533 | apic->send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR); |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 534 | } else { |
| 535 | cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask); |
| 536 | cfg->move_cleanup_count = cpumask_weight(cleanup_mask); |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 537 | apic->send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 538 | free_cpumask_var(cleanup_mask); |
| 539 | } |
| 540 | cfg->move_in_progress = 0; |
| 541 | } |
| 542 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 543 | static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq_cfg *cfg) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 544 | { |
| 545 | int apic, pin; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 546 | struct irq_pin_list *entry; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 547 | u8 vector = cfg->vector; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 548 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 549 | entry = cfg->irq_2_pin; |
| 550 | for (;;) { |
| 551 | unsigned int reg; |
| 552 | |
| 553 | if (!entry) |
| 554 | break; |
| 555 | |
| 556 | apic = entry->apic; |
| 557 | pin = entry->pin; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 558 | /* |
| 559 | * With interrupt-remapping, destination information comes |
| 560 | * from interrupt-remapping table entry. |
| 561 | */ |
| 562 | if (!irq_remapped(irq)) |
| 563 | io_apic_write(apic, 0x11 + pin*2, dest); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 564 | reg = io_apic_read(apic, 0x10 + pin*2); |
| 565 | reg &= ~IO_APIC_REDIR_VECTOR_MASK; |
| 566 | reg |= vector; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 567 | io_apic_modify(apic, 0x10 + pin*2, reg); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 568 | if (!entry->next) |
| 569 | break; |
| 570 | entry = entry->next; |
| 571 | } |
| 572 | } |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 573 | |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 574 | static int |
| 575 | assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask); |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 576 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 577 | /* |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 578 | * Either sets desc->affinity to a valid value, and returns |
| 579 | * ->cpu_mask_to_apicid of that, or returns BAD_APICID and |
| 580 | * leaves desc->affinity untouched. |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 581 | */ |
| 582 | static unsigned int |
| 583 | set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 584 | { |
| 585 | struct irq_cfg *cfg; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 586 | unsigned int irq; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 587 | |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 588 | if (!cpumask_intersects(mask, cpu_online_mask)) |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 589 | return BAD_APICID; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 590 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 591 | irq = desc->irq; |
| 592 | cfg = desc->chip_data; |
| 593 | if (assign_irq_vector(irq, cfg, mask)) |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 594 | return BAD_APICID; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 595 | |
Yinghai Lu | fa74c90 | 2009-03-24 13:23:16 -0700 | [diff] [blame] | 596 | /* check that before desc->addinity get updated */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 597 | set_extra_move_desc(desc, mask); |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 598 | |
Rusty Russell | e06b1b5 | 2009-03-24 14:17:19 -0700 | [diff] [blame] | 599 | cpumask_copy(desc->affinity, mask); |
| 600 | |
| 601 | return apic->cpu_mask_to_apicid_and(desc->affinity, cfg->domain); |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 602 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 603 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 604 | static void |
| 605 | set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 606 | { |
| 607 | struct irq_cfg *cfg; |
| 608 | unsigned long flags; |
| 609 | unsigned int dest; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 610 | unsigned int irq; |
| 611 | |
| 612 | irq = desc->irq; |
| 613 | cfg = desc->chip_data; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 614 | |
| 615 | spin_lock_irqsave(&ioapic_lock, flags); |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 616 | dest = set_desc_affinity(desc, mask); |
| 617 | if (dest != BAD_APICID) { |
| 618 | /* Only the high 8 bits are valid. */ |
| 619 | dest = SET_APIC_LOGICAL_ID(dest); |
| 620 | __target_IO_APIC_irq(irq, dest, cfg); |
| 621 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 622 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 623 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 624 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 625 | static void |
| 626 | set_ioapic_affinity_irq(unsigned int irq, const struct cpumask *mask) |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 627 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 628 | struct irq_desc *desc; |
| 629 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 630 | desc = irq_to_desc(irq); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 631 | |
| 632 | set_ioapic_affinity_irq_desc(desc, mask); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 633 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 634 | #endif /* CONFIG_SMP */ |
| 635 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 636 | /* |
| 637 | * The common case is 1:1 IRQ<->pin mappings. Sometimes there are |
| 638 | * shared ISA-space IRQs, so we have to support them. We are super |
| 639 | * fast in the common case, and fast for shared ISA-space IRQs. |
| 640 | */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 641 | static void add_pin_to_irq_cpu(struct irq_cfg *cfg, int cpu, int apic, int pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 642 | { |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 643 | struct irq_pin_list *entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 644 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 645 | entry = cfg->irq_2_pin; |
| 646 | if (!entry) { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 647 | entry = get_one_free_irq_2_pin(cpu); |
| 648 | if (!entry) { |
| 649 | printk(KERN_ERR "can not alloc irq_2_pin to add %d - %d\n", |
| 650 | apic, pin); |
| 651 | return; |
| 652 | } |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 653 | cfg->irq_2_pin = entry; |
| 654 | entry->apic = apic; |
| 655 | entry->pin = pin; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 656 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 657 | } |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 658 | |
| 659 | while (entry->next) { |
| 660 | /* not again, please */ |
| 661 | if (entry->apic == apic && entry->pin == pin) |
| 662 | return; |
| 663 | |
| 664 | entry = entry->next; |
| 665 | } |
| 666 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 667 | entry->next = get_one_free_irq_2_pin(cpu); |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 668 | entry = entry->next; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 669 | entry->apic = apic; |
| 670 | entry->pin = pin; |
| 671 | } |
| 672 | |
| 673 | /* |
| 674 | * Reroute an IRQ to a different pin. |
| 675 | */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 676 | static void __init replace_pin_at_irq_cpu(struct irq_cfg *cfg, int cpu, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 677 | int oldapic, int oldpin, |
| 678 | int newapic, int newpin) |
| 679 | { |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 680 | struct irq_pin_list *entry = cfg->irq_2_pin; |
| 681 | int replaced = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 682 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 683 | while (entry) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 684 | if (entry->apic == oldapic && entry->pin == oldpin) { |
| 685 | entry->apic = newapic; |
| 686 | entry->pin = newpin; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 687 | replaced = 1; |
| 688 | /* every one is different, right? */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 689 | break; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 690 | } |
| 691 | entry = entry->next; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 692 | } |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 693 | |
| 694 | /* why? call replace before add? */ |
| 695 | if (!replaced) |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 696 | add_pin_to_irq_cpu(cfg, cpu, newapic, newpin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 697 | } |
| 698 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 699 | static inline void io_apic_modify_irq(struct irq_cfg *cfg, |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 700 | int mask_and, int mask_or, |
| 701 | void (*final)(struct irq_pin_list *entry)) |
| 702 | { |
| 703 | int pin; |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 704 | struct irq_pin_list *entry; |
| 705 | |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 706 | for (entry = cfg->irq_2_pin; entry != NULL; entry = entry->next) { |
| 707 | unsigned int reg; |
| 708 | pin = entry->pin; |
| 709 | reg = io_apic_read(entry->apic, 0x10 + pin * 2); |
| 710 | reg &= mask_and; |
| 711 | reg |= mask_or; |
| 712 | io_apic_modify(entry->apic, 0x10 + pin * 2, reg); |
| 713 | if (final) |
| 714 | final(entry); |
| 715 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 716 | } |
| 717 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 718 | static void __unmask_IO_APIC_irq(struct irq_cfg *cfg) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 719 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 720 | io_apic_modify_irq(cfg, ~IO_APIC_REDIR_MASKED, 0, NULL); |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 721 | } |
Yinghai Lu | 4e738e2 | 2008-08-19 20:50:47 -0700 | [diff] [blame] | 722 | |
| 723 | #ifdef CONFIG_X86_64 |
Jaswinder Singh Rajput | 7f3e632 | 2008-12-29 20:34:35 +0530 | [diff] [blame] | 724 | static void io_apic_sync(struct irq_pin_list *entry) |
Yinghai Lu | 4e738e2 | 2008-08-19 20:50:47 -0700 | [diff] [blame] | 725 | { |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 726 | /* |
| 727 | * Synchronize the IO-APIC and the CPU by doing |
| 728 | * a dummy read from the IO-APIC |
| 729 | */ |
| 730 | struct io_apic __iomem *io_apic; |
| 731 | io_apic = io_apic_base(entry->apic); |
Yinghai Lu | 4e738e2 | 2008-08-19 20:50:47 -0700 | [diff] [blame] | 732 | readl(&io_apic->data); |
| 733 | } |
| 734 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 735 | static void __mask_IO_APIC_irq(struct irq_cfg *cfg) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 736 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 737 | io_apic_modify_irq(cfg, ~0, IO_APIC_REDIR_MASKED, &io_apic_sync); |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 738 | } |
| 739 | #else /* CONFIG_X86_32 */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 740 | static void __mask_IO_APIC_irq(struct irq_cfg *cfg) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 741 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 742 | io_apic_modify_irq(cfg, ~0, IO_APIC_REDIR_MASKED, NULL); |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 743 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 744 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 745 | static void __mask_and_edge_IO_APIC_irq(struct irq_cfg *cfg) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 746 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 747 | io_apic_modify_irq(cfg, ~IO_APIC_REDIR_LEVEL_TRIGGER, |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 748 | IO_APIC_REDIR_MASKED, NULL); |
| 749 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 750 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 751 | static void __unmask_and_level_IO_APIC_irq(struct irq_cfg *cfg) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 752 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 753 | io_apic_modify_irq(cfg, ~IO_APIC_REDIR_MASKED, |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 754 | IO_APIC_REDIR_LEVEL_TRIGGER, NULL); |
| 755 | } |
| 756 | #endif /* CONFIG_X86_32 */ |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 757 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 758 | static void mask_IO_APIC_irq_desc(struct irq_desc *desc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 759 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 760 | struct irq_cfg *cfg = desc->chip_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 761 | unsigned long flags; |
| 762 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 763 | BUG_ON(!cfg); |
| 764 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 765 | spin_lock_irqsave(&ioapic_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 766 | __mask_IO_APIC_irq(cfg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 767 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 768 | } |
| 769 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 770 | static void unmask_IO_APIC_irq_desc(struct irq_desc *desc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 771 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 772 | struct irq_cfg *cfg = desc->chip_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 773 | unsigned long flags; |
| 774 | |
| 775 | spin_lock_irqsave(&ioapic_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 776 | __unmask_IO_APIC_irq(cfg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 777 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 778 | } |
| 779 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 780 | static void mask_IO_APIC_irq(unsigned int irq) |
| 781 | { |
| 782 | struct irq_desc *desc = irq_to_desc(irq); |
| 783 | |
| 784 | mask_IO_APIC_irq_desc(desc); |
| 785 | } |
| 786 | static void unmask_IO_APIC_irq(unsigned int irq) |
| 787 | { |
| 788 | struct irq_desc *desc = irq_to_desc(irq); |
| 789 | |
| 790 | unmask_IO_APIC_irq_desc(desc); |
| 791 | } |
| 792 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 793 | static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin) |
| 794 | { |
| 795 | struct IO_APIC_route_entry entry; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 796 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 797 | /* Check delivery_mode to be sure we're not clearing an SMI pin */ |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 798 | entry = ioapic_read_entry(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 799 | if (entry.delivery_mode == dest_SMI) |
| 800 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 801 | /* |
| 802 | * Disable it in the IO-APIC irq-routing table: |
| 803 | */ |
Linus Torvalds | f9dadfa | 2006-11-01 10:05:35 -0800 | [diff] [blame] | 804 | ioapic_mask_entry(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 805 | } |
| 806 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 807 | static void clear_IO_APIC (void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 808 | { |
| 809 | int apic, pin; |
| 810 | |
| 811 | for (apic = 0; apic < nr_ioapics; apic++) |
| 812 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) |
| 813 | clear_IO_APIC_pin(apic, pin); |
| 814 | } |
| 815 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 816 | #ifdef CONFIG_X86_32 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 817 | /* |
| 818 | * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to |
| 819 | * specific CPU-side IRQs. |
| 820 | */ |
| 821 | |
| 822 | #define MAX_PIRQS 8 |
Yinghai Lu | 3bd25d0 | 2009-02-15 02:54:03 -0800 | [diff] [blame] | 823 | static int pirq_entries[MAX_PIRQS] = { |
| 824 | [0 ... MAX_PIRQS - 1] = -1 |
| 825 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 826 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 827 | static int __init ioapic_pirq_setup(char *str) |
| 828 | { |
| 829 | int i, max; |
| 830 | int ints[MAX_PIRQS+1]; |
| 831 | |
| 832 | get_options(str, ARRAY_SIZE(ints), ints); |
| 833 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 834 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 835 | "PIRQ redirection, working around broken MP-BIOS.\n"); |
| 836 | max = MAX_PIRQS; |
| 837 | if (ints[0] < MAX_PIRQS) |
| 838 | max = ints[0]; |
| 839 | |
| 840 | for (i = 0; i < max; i++) { |
| 841 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 842 | "... PIRQ%d -> IRQ %d\n", i, ints[i+1]); |
| 843 | /* |
| 844 | * PIRQs are mapped upside down, usually. |
| 845 | */ |
| 846 | pirq_entries[MAX_PIRQS-i-1] = ints[i+1]; |
| 847 | } |
| 848 | return 1; |
| 849 | } |
| 850 | |
| 851 | __setup("pirq=", ioapic_pirq_setup); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 852 | #endif /* CONFIG_X86_32 */ |
| 853 | |
| 854 | #ifdef CONFIG_INTR_REMAP |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 855 | struct IO_APIC_route_entry **alloc_ioapic_entries(void) |
| 856 | { |
| 857 | int apic; |
| 858 | struct IO_APIC_route_entry **ioapic_entries; |
| 859 | |
| 860 | ioapic_entries = kzalloc(sizeof(*ioapic_entries) * nr_ioapics, |
| 861 | GFP_ATOMIC); |
| 862 | if (!ioapic_entries) |
| 863 | return 0; |
| 864 | |
| 865 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 866 | ioapic_entries[apic] = |
| 867 | kzalloc(sizeof(struct IO_APIC_route_entry) * |
| 868 | nr_ioapic_registers[apic], GFP_ATOMIC); |
| 869 | if (!ioapic_entries[apic]) |
| 870 | goto nomem; |
| 871 | } |
| 872 | |
| 873 | return ioapic_entries; |
| 874 | |
| 875 | nomem: |
| 876 | while (--apic >= 0) |
| 877 | kfree(ioapic_entries[apic]); |
| 878 | kfree(ioapic_entries); |
| 879 | |
| 880 | return 0; |
| 881 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 882 | |
| 883 | /* |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 884 | * Saves all the IO-APIC RTE's |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 885 | */ |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 886 | int save_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 887 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 888 | int apic, pin; |
| 889 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 890 | if (!ioapic_entries) |
| 891 | return -ENOMEM; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 892 | |
| 893 | for (apic = 0; apic < nr_ioapics; apic++) { |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 894 | if (!ioapic_entries[apic]) |
| 895 | return -ENOMEM; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 896 | |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 897 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 898 | ioapic_entries[apic][pin] = |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 899 | ioapic_read_entry(apic, pin); |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 900 | } |
Cyrill Gorcunov | 5ffa4eb | 2008-09-18 23:37:57 +0400 | [diff] [blame] | 901 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 902 | return 0; |
| 903 | } |
| 904 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 905 | /* |
| 906 | * Mask all IO APIC entries. |
| 907 | */ |
| 908 | void mask_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries) |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 909 | { |
| 910 | int apic, pin; |
| 911 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 912 | if (!ioapic_entries) |
| 913 | return; |
| 914 | |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 915 | for (apic = 0; apic < nr_ioapics; apic++) { |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 916 | if (!ioapic_entries[apic]) |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 917 | break; |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 918 | |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 919 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { |
| 920 | struct IO_APIC_route_entry entry; |
| 921 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 922 | entry = ioapic_entries[apic][pin]; |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 923 | if (!entry.mask) { |
| 924 | entry.mask = 1; |
| 925 | ioapic_write_entry(apic, pin, entry); |
| 926 | } |
| 927 | } |
| 928 | } |
| 929 | } |
| 930 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 931 | /* |
| 932 | * Restore IO APIC entries which was saved in ioapic_entries. |
| 933 | */ |
| 934 | int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 935 | { |
| 936 | int apic, pin; |
| 937 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 938 | if (!ioapic_entries) |
| 939 | return -ENOMEM; |
| 940 | |
Cyrill Gorcunov | 5ffa4eb | 2008-09-18 23:37:57 +0400 | [diff] [blame] | 941 | for (apic = 0; apic < nr_ioapics; apic++) { |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 942 | if (!ioapic_entries[apic]) |
| 943 | return -ENOMEM; |
| 944 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 945 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) |
| 946 | ioapic_write_entry(apic, pin, |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 947 | ioapic_entries[apic][pin]); |
Cyrill Gorcunov | 5ffa4eb | 2008-09-18 23:37:57 +0400 | [diff] [blame] | 948 | } |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 949 | return 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 950 | } |
| 951 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 952 | void reinit_intr_remapped_IO_APIC(int intr_remapping, |
| 953 | struct IO_APIC_route_entry **ioapic_entries) |
| 954 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 955 | { |
| 956 | /* |
| 957 | * for now plain restore of previous settings. |
| 958 | * TBD: In the case of OS enabling interrupt-remapping, |
| 959 | * IO-APIC RTE's need to be setup to point to interrupt-remapping |
| 960 | * table entries. for now, do a plain restore, and wait for |
| 961 | * the setup_IO_APIC_irqs() to do proper initialization. |
| 962 | */ |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 963 | restore_IO_APIC_setup(ioapic_entries); |
| 964 | } |
| 965 | |
| 966 | void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries) |
| 967 | { |
| 968 | int apic; |
| 969 | |
| 970 | for (apic = 0; apic < nr_ioapics; apic++) |
| 971 | kfree(ioapic_entries[apic]); |
| 972 | |
| 973 | kfree(ioapic_entries); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 974 | } |
| 975 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 976 | |
| 977 | /* |
| 978 | * Find the IRQ entry number of a certain pin. |
| 979 | */ |
| 980 | static int find_irq_entry(int apic, int pin, int type) |
| 981 | { |
| 982 | int i; |
| 983 | |
| 984 | for (i = 0; i < mp_irq_entries; i++) |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 985 | if (mp_irqs[i].irqtype == type && |
| 986 | (mp_irqs[i].dstapic == mp_ioapics[apic].apicid || |
| 987 | mp_irqs[i].dstapic == MP_APIC_ALL) && |
| 988 | mp_irqs[i].dstirq == pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 989 | return i; |
| 990 | |
| 991 | return -1; |
| 992 | } |
| 993 | |
| 994 | /* |
| 995 | * Find the pin to which IRQ[irq] (ISA) is connected |
| 996 | */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 997 | static int __init find_isa_irq_pin(int irq, int type) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 998 | { |
| 999 | int i; |
| 1000 | |
| 1001 | for (i = 0; i < mp_irq_entries; i++) { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1002 | int lbus = mp_irqs[i].srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1003 | |
Alexey Starikovskiy | d27e2b8 | 2008-03-20 14:54:18 +0300 | [diff] [blame] | 1004 | if (test_bit(lbus, mp_bus_not_pci) && |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1005 | (mp_irqs[i].irqtype == type) && |
| 1006 | (mp_irqs[i].srcbusirq == irq)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1007 | |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1008 | return mp_irqs[i].dstirq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1009 | } |
| 1010 | return -1; |
| 1011 | } |
| 1012 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1013 | static int __init find_isa_irq_apic(int irq, int type) |
| 1014 | { |
| 1015 | int i; |
| 1016 | |
| 1017 | for (i = 0; i < mp_irq_entries; i++) { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1018 | int lbus = mp_irqs[i].srcbus; |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1019 | |
Alexey Starikovskiy | 73b2961 | 2008-03-20 14:54:24 +0300 | [diff] [blame] | 1020 | if (test_bit(lbus, mp_bus_not_pci) && |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1021 | (mp_irqs[i].irqtype == type) && |
| 1022 | (mp_irqs[i].srcbusirq == irq)) |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1023 | break; |
| 1024 | } |
| 1025 | if (i < mp_irq_entries) { |
| 1026 | int apic; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1027 | for(apic = 0; apic < nr_ioapics; apic++) { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1028 | if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic) |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1029 | return apic; |
| 1030 | } |
| 1031 | } |
| 1032 | |
| 1033 | return -1; |
| 1034 | } |
| 1035 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1036 | /* |
| 1037 | * Find a specific PCI IRQ entry. |
| 1038 | * Not an __init, possibly needed by modules |
| 1039 | */ |
| 1040 | static int pin_2_irq(int idx, int apic, int pin); |
| 1041 | |
| 1042 | int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin) |
| 1043 | { |
| 1044 | int apic, i, best_guess = -1; |
| 1045 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1046 | apic_printk(APIC_DEBUG, "querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n", |
| 1047 | bus, slot, pin); |
Alexey Starikovskiy | ce6444d | 2008-05-19 19:47:09 +0400 | [diff] [blame] | 1048 | if (test_bit(bus, mp_bus_not_pci)) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1049 | apic_printk(APIC_VERBOSE, "PCI BIOS passed nonexistent PCI bus %d!\n", bus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1050 | return -1; |
| 1051 | } |
| 1052 | for (i = 0; i < mp_irq_entries; i++) { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1053 | int lbus = mp_irqs[i].srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1054 | |
| 1055 | for (apic = 0; apic < nr_ioapics; apic++) |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1056 | if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic || |
| 1057 | mp_irqs[i].dstapic == MP_APIC_ALL) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1058 | break; |
| 1059 | |
Alexey Starikovskiy | 47cab82 | 2008-03-20 14:54:30 +0300 | [diff] [blame] | 1060 | if (!test_bit(lbus, mp_bus_not_pci) && |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1061 | !mp_irqs[i].irqtype && |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1062 | (bus == lbus) && |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1063 | (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) { |
| 1064 | int irq = pin_2_irq(i, apic, mp_irqs[i].dstirq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1065 | |
| 1066 | if (!(apic || IO_APIC_IRQ(irq))) |
| 1067 | continue; |
| 1068 | |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1069 | if (pin == (mp_irqs[i].srcbusirq & 3)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1070 | return irq; |
| 1071 | /* |
| 1072 | * Use the first all-but-pin matching entry as a |
| 1073 | * best-guess fuzzy result for broken mptables. |
| 1074 | */ |
| 1075 | if (best_guess < 0) |
| 1076 | best_guess = irq; |
| 1077 | } |
| 1078 | } |
| 1079 | return best_guess; |
| 1080 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1081 | |
Alexey Dobriyan | 129f694 | 2005-06-23 00:08:33 -0700 | [diff] [blame] | 1082 | EXPORT_SYMBOL(IO_APIC_get_PCI_irq_vector); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1083 | |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 1084 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1085 | /* |
| 1086 | * EISA Edge/Level control register, ELCR |
| 1087 | */ |
| 1088 | static int EISA_ELCR(unsigned int irq) |
| 1089 | { |
Yinghai Lu | 99d093d | 2008-12-05 18:58:32 -0800 | [diff] [blame] | 1090 | if (irq < NR_IRQS_LEGACY) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1091 | unsigned int port = 0x4d0 + (irq >> 3); |
| 1092 | return (inb(port) >> (irq & 7)) & 1; |
| 1093 | } |
| 1094 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 1095 | "Broken MPtable reports ISA irq %d\n", irq); |
| 1096 | return 0; |
| 1097 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1098 | |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 1099 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1100 | |
Alexey Starikovskiy | 6728801 | 2008-03-20 14:54:36 +0300 | [diff] [blame] | 1101 | /* ISA interrupts are always polarity zero edge triggered, |
| 1102 | * when listed as conforming in the MP table. */ |
| 1103 | |
| 1104 | #define default_ISA_trigger(idx) (0) |
| 1105 | #define default_ISA_polarity(idx) (0) |
| 1106 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1107 | /* EISA interrupts are always polarity zero and can be edge or level |
| 1108 | * trigger depending on the ELCR value. If an interrupt is listed as |
| 1109 | * EISA conforming in the MP table, that means its trigger type must |
| 1110 | * be read in from the ELCR */ |
| 1111 | |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1112 | #define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].srcbusirq)) |
Alexey Starikovskiy | 6728801 | 2008-03-20 14:54:36 +0300 | [diff] [blame] | 1113 | #define default_EISA_polarity(idx) default_ISA_polarity(idx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1114 | |
| 1115 | /* PCI interrupts are always polarity one level triggered, |
| 1116 | * when listed as conforming in the MP table. */ |
| 1117 | |
| 1118 | #define default_PCI_trigger(idx) (1) |
| 1119 | #define default_PCI_polarity(idx) (1) |
| 1120 | |
| 1121 | /* MCA interrupts are always polarity zero level triggered, |
| 1122 | * when listed as conforming in the MP table. */ |
| 1123 | |
| 1124 | #define default_MCA_trigger(idx) (1) |
Alexey Starikovskiy | 6728801 | 2008-03-20 14:54:36 +0300 | [diff] [blame] | 1125 | #define default_MCA_polarity(idx) default_ISA_polarity(idx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1126 | |
Shaohua Li | 61fd47e | 2007-11-17 01:05:28 -0500 | [diff] [blame] | 1127 | static int MPBIOS_polarity(int idx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1128 | { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1129 | int bus = mp_irqs[idx].srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1130 | int polarity; |
| 1131 | |
| 1132 | /* |
| 1133 | * Determine IRQ line polarity (high active or low active): |
| 1134 | */ |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1135 | switch (mp_irqs[idx].irqflag & 3) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1136 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1137 | case 0: /* conforms, ie. bus-type dependent polarity */ |
| 1138 | if (test_bit(bus, mp_bus_not_pci)) |
| 1139 | polarity = default_ISA_polarity(idx); |
| 1140 | else |
| 1141 | polarity = default_PCI_polarity(idx); |
| 1142 | break; |
| 1143 | case 1: /* high active */ |
| 1144 | { |
| 1145 | polarity = 0; |
| 1146 | break; |
| 1147 | } |
| 1148 | case 2: /* reserved */ |
| 1149 | { |
| 1150 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 1151 | polarity = 1; |
| 1152 | break; |
| 1153 | } |
| 1154 | case 3: /* low active */ |
| 1155 | { |
| 1156 | polarity = 1; |
| 1157 | break; |
| 1158 | } |
| 1159 | default: /* invalid */ |
| 1160 | { |
| 1161 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 1162 | polarity = 1; |
| 1163 | break; |
| 1164 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1165 | } |
| 1166 | return polarity; |
| 1167 | } |
| 1168 | |
| 1169 | static int MPBIOS_trigger(int idx) |
| 1170 | { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1171 | int bus = mp_irqs[idx].srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1172 | int trigger; |
| 1173 | |
| 1174 | /* |
| 1175 | * Determine IRQ trigger mode (edge or level sensitive): |
| 1176 | */ |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1177 | switch ((mp_irqs[idx].irqflag>>2) & 3) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1178 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1179 | case 0: /* conforms, ie. bus-type dependent */ |
| 1180 | if (test_bit(bus, mp_bus_not_pci)) |
| 1181 | trigger = default_ISA_trigger(idx); |
| 1182 | else |
| 1183 | trigger = default_PCI_trigger(idx); |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 1184 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1185 | switch (mp_bus_id_to_type[bus]) { |
| 1186 | case MP_BUS_ISA: /* ISA pin */ |
| 1187 | { |
| 1188 | /* set before the switch */ |
| 1189 | break; |
| 1190 | } |
| 1191 | case MP_BUS_EISA: /* EISA pin */ |
| 1192 | { |
| 1193 | trigger = default_EISA_trigger(idx); |
| 1194 | break; |
| 1195 | } |
| 1196 | case MP_BUS_PCI: /* PCI pin */ |
| 1197 | { |
| 1198 | /* set before the switch */ |
| 1199 | break; |
| 1200 | } |
| 1201 | case MP_BUS_MCA: /* MCA pin */ |
| 1202 | { |
| 1203 | trigger = default_MCA_trigger(idx); |
| 1204 | break; |
| 1205 | } |
| 1206 | default: |
| 1207 | { |
| 1208 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 1209 | trigger = 1; |
| 1210 | break; |
| 1211 | } |
| 1212 | } |
| 1213 | #endif |
| 1214 | break; |
| 1215 | case 1: /* edge */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1216 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1217 | trigger = 0; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1218 | break; |
| 1219 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1220 | case 2: /* reserved */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1221 | { |
| 1222 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 1223 | trigger = 1; |
| 1224 | break; |
| 1225 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1226 | case 3: /* level */ |
| 1227 | { |
| 1228 | trigger = 1; |
| 1229 | break; |
| 1230 | } |
| 1231 | default: /* invalid */ |
| 1232 | { |
| 1233 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 1234 | trigger = 0; |
| 1235 | break; |
| 1236 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1237 | } |
| 1238 | return trigger; |
| 1239 | } |
| 1240 | |
| 1241 | static inline int irq_polarity(int idx) |
| 1242 | { |
| 1243 | return MPBIOS_polarity(idx); |
| 1244 | } |
| 1245 | |
| 1246 | static inline int irq_trigger(int idx) |
| 1247 | { |
| 1248 | return MPBIOS_trigger(idx); |
| 1249 | } |
| 1250 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 1251 | int (*ioapic_renumber_irq)(int ioapic, int irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1252 | static int pin_2_irq(int idx, int apic, int pin) |
| 1253 | { |
| 1254 | int irq, i; |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1255 | int bus = mp_irqs[idx].srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1256 | |
| 1257 | /* |
| 1258 | * Debugging check, we are in big trouble if this message pops up! |
| 1259 | */ |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1260 | if (mp_irqs[idx].dstirq != pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1261 | printk(KERN_ERR "broken BIOS or MPTABLE parser, ayiee!!\n"); |
| 1262 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1263 | if (test_bit(bus, mp_bus_not_pci)) { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1264 | irq = mp_irqs[idx].srcbusirq; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1265 | } else { |
Alexey Starikovskiy | 643befe | 2008-03-20 14:54:49 +0300 | [diff] [blame] | 1266 | /* |
| 1267 | * PCI IRQs are mapped in order |
| 1268 | */ |
| 1269 | i = irq = 0; |
| 1270 | while (i < apic) |
| 1271 | irq += nr_ioapic_registers[i++]; |
| 1272 | irq += pin; |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1273 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1274 | * For MPS mode, so far only needed by ES7000 platform |
| 1275 | */ |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1276 | if (ioapic_renumber_irq) |
| 1277 | irq = ioapic_renumber_irq(apic, irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1278 | } |
| 1279 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1280 | #ifdef CONFIG_X86_32 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1281 | /* |
| 1282 | * PCI IRQ command line redirection. Yes, limits are hardcoded. |
| 1283 | */ |
| 1284 | if ((pin >= 16) && (pin <= 23)) { |
| 1285 | if (pirq_entries[pin-16] != -1) { |
| 1286 | if (!pirq_entries[pin-16]) { |
| 1287 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 1288 | "disabling PIRQ%d\n", pin-16); |
| 1289 | } else { |
| 1290 | irq = pirq_entries[pin-16]; |
| 1291 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 1292 | "using PIRQ%d -> IRQ %d\n", |
| 1293 | pin-16, irq); |
| 1294 | } |
| 1295 | } |
| 1296 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1297 | #endif |
| 1298 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1299 | return irq; |
| 1300 | } |
| 1301 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1302 | void lock_vector_lock(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1303 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1304 | /* Used to the online set of cpus does not change |
| 1305 | * during assign_irq_vector. |
| 1306 | */ |
| 1307 | spin_lock(&vector_lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1308 | } |
| 1309 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1310 | void unlock_vector_lock(void) |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1311 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1312 | spin_unlock(&vector_lock); |
| 1313 | } |
| 1314 | |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 1315 | static int |
| 1316 | __assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1317 | { |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1318 | /* |
| 1319 | * NOTE! The local APIC isn't very good at handling |
| 1320 | * multiple interrupts at the same interrupt level. |
| 1321 | * As the interrupt level is determined by taking the |
| 1322 | * vector number and shifting that right by 4, we |
| 1323 | * want to spread these out a bit so that they don't |
| 1324 | * all fall in the same interrupt level. |
| 1325 | * |
| 1326 | * Also, we've got to be careful not to trash gate |
| 1327 | * 0x80, because int 0x80 is hm, kind of importantish. ;) |
| 1328 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1329 | static int current_vector = FIRST_DEVICE_VECTOR, current_offset = 0; |
| 1330 | unsigned int old_vector; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1331 | int cpu, err; |
| 1332 | cpumask_var_t tmp_mask; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1333 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1334 | if ((cfg->move_in_progress) || cfg->move_cleanup_count) |
| 1335 | return -EBUSY; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1336 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1337 | if (!alloc_cpumask_var(&tmp_mask, GFP_ATOMIC)) |
| 1338 | return -ENOMEM; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1339 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1340 | old_vector = cfg->vector; |
| 1341 | if (old_vector) { |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1342 | cpumask_and(tmp_mask, mask, cpu_online_mask); |
| 1343 | cpumask_and(tmp_mask, cfg->domain, tmp_mask); |
| 1344 | if (!cpumask_empty(tmp_mask)) { |
| 1345 | free_cpumask_var(tmp_mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1346 | return 0; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1347 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1348 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1349 | |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 1350 | /* Only try and allocate irqs on cpus that are present */ |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1351 | err = -ENOSPC; |
| 1352 | for_each_cpu_and(cpu, mask, cpu_online_mask) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1353 | int new_cpu; |
| 1354 | int vector, offset; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1355 | |
Ingo Molnar | e2d40b1 | 2009-01-28 06:50:47 +0100 | [diff] [blame] | 1356 | apic->vector_allocation_domain(cpu, tmp_mask); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1357 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1358 | vector = current_vector; |
| 1359 | offset = current_offset; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1360 | next: |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1361 | vector += 8; |
| 1362 | if (vector >= first_system_vector) { |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 1363 | /* If out of vectors on large boxen, must share them. */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1364 | offset = (offset + 1) % 8; |
| 1365 | vector = FIRST_DEVICE_VECTOR + offset; |
Yinghai Lu | 7a959cf | 2008-08-19 20:50:32 -0700 | [diff] [blame] | 1366 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1367 | if (unlikely(current_vector == vector)) |
| 1368 | continue; |
Yinghai Lu | b77b881 | 2008-12-19 15:23:44 -0800 | [diff] [blame] | 1369 | |
| 1370 | if (test_bit(vector, used_vectors)) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1371 | goto next; |
Yinghai Lu | b77b881 | 2008-12-19 15:23:44 -0800 | [diff] [blame] | 1372 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1373 | for_each_cpu_and(new_cpu, tmp_mask, cpu_online_mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1374 | if (per_cpu(vector_irq, new_cpu)[vector] != -1) |
| 1375 | goto next; |
| 1376 | /* Found one! */ |
| 1377 | current_vector = vector; |
| 1378 | current_offset = offset; |
| 1379 | if (old_vector) { |
| 1380 | cfg->move_in_progress = 1; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1381 | cpumask_copy(cfg->old_domain, cfg->domain); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1382 | } |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1383 | for_each_cpu_and(new_cpu, tmp_mask, cpu_online_mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1384 | per_cpu(vector_irq, new_cpu)[vector] = irq; |
| 1385 | cfg->vector = vector; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1386 | cpumask_copy(cfg->domain, tmp_mask); |
| 1387 | err = 0; |
| 1388 | break; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1389 | } |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1390 | free_cpumask_var(tmp_mask); |
| 1391 | return err; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1392 | } |
| 1393 | |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 1394 | static int |
| 1395 | assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1396 | { |
| 1397 | int err; |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1398 | unsigned long flags; |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1399 | |
| 1400 | spin_lock_irqsave(&vector_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1401 | err = __assign_irq_vector(irq, cfg, mask); |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1402 | spin_unlock_irqrestore(&vector_lock, flags); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1403 | return err; |
| 1404 | } |
| 1405 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1406 | static void __clear_irq_vector(int irq, struct irq_cfg *cfg) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1407 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1408 | int cpu, vector; |
| 1409 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1410 | BUG_ON(!cfg->vector); |
| 1411 | |
| 1412 | vector = cfg->vector; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1413 | for_each_cpu_and(cpu, cfg->domain, cpu_online_mask) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1414 | per_cpu(vector_irq, cpu)[vector] = -1; |
| 1415 | |
| 1416 | cfg->vector = 0; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1417 | cpumask_clear(cfg->domain); |
Matthew Wilcox | 0ca4b6b | 2008-11-20 14:09:33 -0700 | [diff] [blame] | 1418 | |
| 1419 | if (likely(!cfg->move_in_progress)) |
| 1420 | return; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1421 | for_each_cpu_and(cpu, cfg->old_domain, cpu_online_mask) { |
Matthew Wilcox | 0ca4b6b | 2008-11-20 14:09:33 -0700 | [diff] [blame] | 1422 | for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; |
| 1423 | vector++) { |
| 1424 | if (per_cpu(vector_irq, cpu)[vector] != irq) |
| 1425 | continue; |
| 1426 | per_cpu(vector_irq, cpu)[vector] = -1; |
| 1427 | break; |
| 1428 | } |
| 1429 | } |
| 1430 | cfg->move_in_progress = 0; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1431 | } |
| 1432 | |
| 1433 | void __setup_vector_irq(int cpu) |
| 1434 | { |
| 1435 | /* Initialize vector_irq on a new cpu */ |
| 1436 | /* This function must be called with vector_lock held */ |
| 1437 | int irq, vector; |
| 1438 | struct irq_cfg *cfg; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1439 | struct irq_desc *desc; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1440 | |
| 1441 | /* Mark the inuse vectors */ |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1442 | for_each_irq_desc(irq, desc) { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1443 | cfg = desc->chip_data; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1444 | if (!cpumask_test_cpu(cpu, cfg->domain)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1445 | continue; |
| 1446 | vector = cfg->vector; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1447 | per_cpu(vector_irq, cpu)[vector] = irq; |
| 1448 | } |
| 1449 | /* Mark the free vectors */ |
| 1450 | for (vector = 0; vector < NR_VECTORS; ++vector) { |
| 1451 | irq = per_cpu(vector_irq, cpu)[vector]; |
| 1452 | if (irq < 0) |
| 1453 | continue; |
| 1454 | |
| 1455 | cfg = irq_cfg(irq); |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1456 | if (!cpumask_test_cpu(cpu, cfg->domain)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1457 | per_cpu(vector_irq, cpu)[vector] = -1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1458 | } |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1459 | } |
Glauber Costa | 3fde690 | 2008-05-28 20:34:19 -0700 | [diff] [blame] | 1460 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 1461 | static struct irq_chip ioapic_chip; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1462 | static struct irq_chip ir_ioapic_chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1463 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1464 | #define IOAPIC_AUTO -1 |
| 1465 | #define IOAPIC_EDGE 0 |
| 1466 | #define IOAPIC_LEVEL 1 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1467 | |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1468 | #ifdef CONFIG_X86_32 |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 1469 | static inline int IO_APIC_irq_trigger(int irq) |
| 1470 | { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1471 | int apic, idx, pin; |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 1472 | |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1473 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 1474 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { |
| 1475 | idx = find_irq_entry(apic, pin, mp_INT); |
| 1476 | if ((idx != -1) && (irq == pin_2_irq(idx, apic, pin))) |
| 1477 | return irq_trigger(idx); |
| 1478 | } |
| 1479 | } |
| 1480 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1481 | * nonexistent IRQs are edge default |
| 1482 | */ |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1483 | return 0; |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 1484 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1485 | #else |
| 1486 | static inline int IO_APIC_irq_trigger(int irq) |
| 1487 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1488 | return 1; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1489 | } |
| 1490 | #endif |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 1491 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1492 | static void ioapic_register_intr(int irq, struct irq_desc *desc, unsigned long trigger) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1493 | { |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 1494 | |
Jan Beulich | 6ebcc00 | 2006-06-26 13:56:46 +0200 | [diff] [blame] | 1495 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1496 | trigger == IOAPIC_LEVEL) |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 1497 | desc->status |= IRQ_LEVEL; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1498 | else |
| 1499 | desc->status &= ~IRQ_LEVEL; |
| 1500 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1501 | if (irq_remapped(irq)) { |
| 1502 | desc->status |= IRQ_MOVE_PCNTXT; |
| 1503 | if (trigger) |
| 1504 | set_irq_chip_and_handler_name(irq, &ir_ioapic_chip, |
| 1505 | handle_fasteoi_irq, |
| 1506 | "fasteoi"); |
| 1507 | else |
| 1508 | set_irq_chip_and_handler_name(irq, &ir_ioapic_chip, |
| 1509 | handle_edge_irq, "edge"); |
| 1510 | return; |
| 1511 | } |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 1512 | |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1513 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || |
| 1514 | trigger == IOAPIC_LEVEL) |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 1515 | set_irq_chip_and_handler_name(irq, &ioapic_chip, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1516 | handle_fasteoi_irq, |
| 1517 | "fasteoi"); |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1518 | else |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 1519 | set_irq_chip_and_handler_name(irq, &ioapic_chip, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1520 | handle_edge_irq, "edge"); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1521 | } |
| 1522 | |
Jeremy Fitzhardinge | ca97ab9 | 2009-02-09 12:05:47 -0800 | [diff] [blame] | 1523 | int setup_ioapic_entry(int apic_id, int irq, |
| 1524 | struct IO_APIC_route_entry *entry, |
| 1525 | unsigned int destination, int trigger, |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 1526 | int polarity, int vector, int pin) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1527 | { |
| 1528 | /* |
| 1529 | * add it to the IO-APIC irq-routing table: |
| 1530 | */ |
| 1531 | memset(entry,0,sizeof(*entry)); |
| 1532 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1533 | if (intr_remapping_enabled) { |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1534 | struct intel_iommu *iommu = map_ioapic_to_ir(apic_id); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1535 | struct irte irte; |
| 1536 | struct IR_IO_APIC_route_entry *ir_entry = |
| 1537 | (struct IR_IO_APIC_route_entry *) entry; |
| 1538 | int index; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1539 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1540 | if (!iommu) |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1541 | panic("No mapping iommu for ioapic %d\n", apic_id); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1542 | |
| 1543 | index = alloc_irte(iommu, irq, 1); |
| 1544 | if (index < 0) |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1545 | panic("Failed to allocate IRTE for ioapic %d\n", apic_id); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1546 | |
| 1547 | memset(&irte, 0, sizeof(irte)); |
| 1548 | |
| 1549 | irte.present = 1; |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 1550 | irte.dst_mode = apic->irq_dest_mode; |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 1551 | /* |
| 1552 | * Trigger mode in the IRTE will always be edge, and the |
| 1553 | * actual level or edge trigger will be setup in the IO-APIC |
| 1554 | * RTE. This will help simplify level triggered irq migration. |
| 1555 | * For more details, see the comments above explainig IO-APIC |
| 1556 | * irq migration in the presence of interrupt-remapping. |
| 1557 | */ |
| 1558 | irte.trigger_mode = 0; |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 1559 | irte.dlvry_mode = apic->irq_delivery_mode; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1560 | irte.vector = vector; |
| 1561 | irte.dest_id = IRTE_DEST(destination); |
| 1562 | |
| 1563 | modify_irte(irq, &irte); |
| 1564 | |
| 1565 | ir_entry->index2 = (index >> 15) & 0x1; |
| 1566 | ir_entry->zero = 0; |
| 1567 | ir_entry->format = 1; |
| 1568 | ir_entry->index = (index & 0x7fff); |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 1569 | /* |
| 1570 | * IO-APIC RTE will be configured with virtual vector. |
| 1571 | * irq handler will do the explicit EOI to the io-apic. |
| 1572 | */ |
| 1573 | ir_entry->vector = pin; |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 1574 | } else { |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 1575 | entry->delivery_mode = apic->irq_delivery_mode; |
| 1576 | entry->dest_mode = apic->irq_dest_mode; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1577 | entry->dest = destination; |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 1578 | entry->vector = vector; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1579 | } |
| 1580 | |
| 1581 | entry->mask = 0; /* enable IRQ */ |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1582 | entry->trigger = trigger; |
| 1583 | entry->polarity = polarity; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1584 | |
| 1585 | /* Mask level triggered irqs. |
| 1586 | * Use IRQ_DELAYED_DISABLE for edge triggered irqs. |
| 1587 | */ |
| 1588 | if (trigger) |
| 1589 | entry->mask = 1; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1590 | return 0; |
| 1591 | } |
| 1592 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1593 | static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq_desc *desc, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1594 | int trigger, int polarity) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1595 | { |
| 1596 | struct irq_cfg *cfg; |
| 1597 | struct IO_APIC_route_entry entry; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1598 | unsigned int dest; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1599 | |
| 1600 | if (!IO_APIC_IRQ(irq)) |
| 1601 | return; |
| 1602 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1603 | cfg = desc->chip_data; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1604 | |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 1605 | if (assign_irq_vector(irq, cfg, apic->target_cpus())) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1606 | return; |
| 1607 | |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 1608 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus()); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1609 | |
| 1610 | apic_printk(APIC_VERBOSE,KERN_DEBUG |
| 1611 | "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> " |
| 1612 | "IRQ %d Mode:%i Active:%i)\n", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1613 | apic_id, mp_ioapics[apic_id].apicid, pin, cfg->vector, |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1614 | irq, trigger, polarity); |
| 1615 | |
| 1616 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1617 | if (setup_ioapic_entry(mp_ioapics[apic_id].apicid, irq, &entry, |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 1618 | dest, trigger, polarity, cfg->vector, pin)) { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1619 | printk("Failed to setup ioapic entry for ioapic %d, pin %d\n", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1620 | mp_ioapics[apic_id].apicid, pin); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1621 | __clear_irq_vector(irq, cfg); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1622 | return; |
| 1623 | } |
| 1624 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1625 | ioapic_register_intr(irq, desc, trigger); |
Yinghai Lu | 99d093d | 2008-12-05 18:58:32 -0800 | [diff] [blame] | 1626 | if (irq < NR_IRQS_LEGACY) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1627 | disable_8259A_irq(irq); |
| 1628 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1629 | ioapic_write_entry(apic_id, pin, entry); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1630 | } |
| 1631 | |
| 1632 | static void __init setup_IO_APIC_irqs(void) |
| 1633 | { |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1634 | int apic_id, pin, idx, irq; |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1635 | int notcon = 0; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1636 | struct irq_desc *desc; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1637 | struct irq_cfg *cfg; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1638 | int cpu = boot_cpu_id; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1639 | |
| 1640 | apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n"); |
| 1641 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1642 | for (apic_id = 0; apic_id < nr_ioapics; apic_id++) { |
| 1643 | for (pin = 0; pin < nr_ioapic_registers[apic_id]; pin++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1644 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1645 | idx = find_irq_entry(apic_id, pin, mp_INT); |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1646 | if (idx == -1) { |
Cyrill Gorcunov | 2a554fb | 2008-09-08 19:38:06 +0400 | [diff] [blame] | 1647 | if (!notcon) { |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1648 | notcon = 1; |
Cyrill Gorcunov | 2a554fb | 2008-09-08 19:38:06 +0400 | [diff] [blame] | 1649 | apic_printk(APIC_VERBOSE, |
| 1650 | KERN_DEBUG " %d-%d", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1651 | mp_ioapics[apic_id].apicid, pin); |
Cyrill Gorcunov | 2a554fb | 2008-09-08 19:38:06 +0400 | [diff] [blame] | 1652 | } else |
| 1653 | apic_printk(APIC_VERBOSE, " %d-%d", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1654 | mp_ioapics[apic_id].apicid, pin); |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1655 | continue; |
| 1656 | } |
Cyrill Gorcunov | 56ffa1a | 2008-09-13 13:11:16 +0400 | [diff] [blame] | 1657 | if (notcon) { |
| 1658 | apic_printk(APIC_VERBOSE, |
| 1659 | " (apicid-pin) not connected\n"); |
| 1660 | notcon = 0; |
| 1661 | } |
Yinghai Lu | 20d225b | 2007-10-17 18:04:41 +0200 | [diff] [blame] | 1662 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1663 | irq = pin_2_irq(idx, apic_id, pin); |
Ingo Molnar | 33a201f | 2009-01-28 07:17:26 +0100 | [diff] [blame] | 1664 | |
| 1665 | /* |
| 1666 | * Skip the timer IRQ if there's a quirk handler |
| 1667 | * installed and if it returns 1: |
| 1668 | */ |
| 1669 | if (apic->multi_timer_check && |
| 1670 | apic->multi_timer_check(apic_id, irq)) |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1671 | continue; |
Ingo Molnar | 33a201f | 2009-01-28 07:17:26 +0100 | [diff] [blame] | 1672 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1673 | desc = irq_to_desc_alloc_cpu(irq, cpu); |
| 1674 | if (!desc) { |
| 1675 | printk(KERN_INFO "can not get irq_desc for %d\n", irq); |
| 1676 | continue; |
| 1677 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1678 | cfg = desc->chip_data; |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1679 | add_pin_to_irq_cpu(cfg, cpu, apic_id, pin); |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1680 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1681 | setup_IO_APIC_irq(apic_id, pin, irq, desc, |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1682 | irq_trigger(idx), irq_polarity(idx)); |
| 1683 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1684 | } |
| 1685 | |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1686 | if (notcon) |
| 1687 | apic_printk(APIC_VERBOSE, |
Cyrill Gorcunov | 2a554fb | 2008-09-08 19:38:06 +0400 | [diff] [blame] | 1688 | " (apicid-pin) not connected\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1689 | } |
| 1690 | |
| 1691 | /* |
Maciej W. Rozycki | f7633ce | 2008-05-27 21:19:34 +0100 | [diff] [blame] | 1692 | * Set up the timer pin, possibly with the 8259A-master behind. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1693 | */ |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1694 | static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin, |
Maciej W. Rozycki | f7633ce | 2008-05-27 21:19:34 +0100 | [diff] [blame] | 1695 | int vector) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1696 | { |
| 1697 | struct IO_APIC_route_entry entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1698 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1699 | if (intr_remapping_enabled) |
| 1700 | return; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1701 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1702 | memset(&entry, 0, sizeof(entry)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1703 | |
| 1704 | /* |
| 1705 | * We use logical delivery to get the timer IRQ |
| 1706 | * to the first CPU. |
| 1707 | */ |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 1708 | entry.dest_mode = apic->irq_dest_mode; |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 1709 | entry.mask = 0; /* don't mask IRQ for edge */ |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 1710 | entry.dest = apic->cpu_mask_to_apicid(apic->target_cpus()); |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 1711 | entry.delivery_mode = apic->irq_delivery_mode; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1712 | entry.polarity = 0; |
| 1713 | entry.trigger = 0; |
| 1714 | entry.vector = vector; |
| 1715 | |
| 1716 | /* |
| 1717 | * The timer IRQ doesn't have to know that behind the |
Maciej W. Rozycki | f7633ce | 2008-05-27 21:19:34 +0100 | [diff] [blame] | 1718 | * scene we may have a 8259A-master in AEOI mode ... |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1719 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1720 | set_irq_chip_and_handler_name(0, &ioapic_chip, handle_edge_irq, "edge"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1721 | |
| 1722 | /* |
| 1723 | * Add it to the IO-APIC irq-routing table: |
| 1724 | */ |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1725 | ioapic_write_entry(apic_id, pin, entry); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1726 | } |
| 1727 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1728 | |
| 1729 | __apicdebuginit(void) print_IO_APIC(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1730 | { |
| 1731 | int apic, i; |
| 1732 | union IO_APIC_reg_00 reg_00; |
| 1733 | union IO_APIC_reg_01 reg_01; |
| 1734 | union IO_APIC_reg_02 reg_02; |
| 1735 | union IO_APIC_reg_03 reg_03; |
| 1736 | unsigned long flags; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 1737 | struct irq_cfg *cfg; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1738 | struct irq_desc *desc; |
Yinghai Lu | 8f09cd2 | 2008-08-19 20:50:51 -0700 | [diff] [blame] | 1739 | unsigned int irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1740 | |
| 1741 | if (apic_verbosity == APIC_QUIET) |
| 1742 | return; |
| 1743 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1744 | printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1745 | for (i = 0; i < nr_ioapics; i++) |
| 1746 | printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n", |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 1747 | mp_ioapics[i].apicid, nr_ioapic_registers[i]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1748 | |
| 1749 | /* |
| 1750 | * We are a bit conservative about what we expect. We have to |
| 1751 | * know about every hardware change ASAP. |
| 1752 | */ |
| 1753 | printk(KERN_INFO "testing the IO APIC.......................\n"); |
| 1754 | |
| 1755 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 1756 | |
| 1757 | spin_lock_irqsave(&ioapic_lock, flags); |
| 1758 | reg_00.raw = io_apic_read(apic, 0); |
| 1759 | reg_01.raw = io_apic_read(apic, 1); |
| 1760 | if (reg_01.bits.version >= 0x10) |
| 1761 | reg_02.raw = io_apic_read(apic, 2); |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1762 | if (reg_01.bits.version >= 0x20) |
| 1763 | reg_03.raw = io_apic_read(apic, 3); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1764 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 1765 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1766 | printk("\n"); |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 1767 | printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1768 | printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw); |
| 1769 | printk(KERN_DEBUG "....... : physical APIC id: %02X\n", reg_00.bits.ID); |
| 1770 | printk(KERN_DEBUG "....... : Delivery Type: %X\n", reg_00.bits.delivery_type); |
| 1771 | printk(KERN_DEBUG "....... : LTS : %X\n", reg_00.bits.LTS); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1772 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1773 | printk(KERN_DEBUG ".... register #01: %08X\n", *(int *)®_01); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1774 | printk(KERN_DEBUG "....... : max redirection entries: %04X\n", reg_01.bits.entries); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1775 | |
| 1776 | printk(KERN_DEBUG "....... : PRQ implemented: %X\n", reg_01.bits.PRQ); |
| 1777 | printk(KERN_DEBUG "....... : IO APIC version: %04X\n", reg_01.bits.version); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1778 | |
| 1779 | /* |
| 1780 | * Some Intel chipsets with IO APIC VERSION of 0x1? don't have reg_02, |
| 1781 | * but the value of reg_02 is read as the previous read register |
| 1782 | * value, so ignore it if reg_02 == reg_01. |
| 1783 | */ |
| 1784 | if (reg_01.bits.version >= 0x10 && reg_02.raw != reg_01.raw) { |
| 1785 | printk(KERN_DEBUG ".... register #02: %08X\n", reg_02.raw); |
| 1786 | printk(KERN_DEBUG "....... : arbitration: %02X\n", reg_02.bits.arbitration); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1787 | } |
| 1788 | |
| 1789 | /* |
| 1790 | * Some Intel chipsets with IO APIC VERSION of 0x2? don't have reg_02 |
| 1791 | * or reg_03, but the value of reg_0[23] is read as the previous read |
| 1792 | * register value, so ignore it if reg_03 == reg_0[12]. |
| 1793 | */ |
| 1794 | if (reg_01.bits.version >= 0x20 && reg_03.raw != reg_02.raw && |
| 1795 | reg_03.raw != reg_01.raw) { |
| 1796 | printk(KERN_DEBUG ".... register #03: %08X\n", reg_03.raw); |
| 1797 | printk(KERN_DEBUG "....... : Boot DT : %X\n", reg_03.bits.boot_DT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1798 | } |
| 1799 | |
| 1800 | printk(KERN_DEBUG ".... IRQ redirection table:\n"); |
| 1801 | |
Yinghai Lu | d83e94a | 2008-08-19 20:50:33 -0700 | [diff] [blame] | 1802 | printk(KERN_DEBUG " NR Dst Mask Trig IRR Pol" |
| 1803 | " Stat Dmod Deli Vect: \n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1804 | |
| 1805 | for (i = 0; i <= reg_01.bits.entries; i++) { |
| 1806 | struct IO_APIC_route_entry entry; |
| 1807 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1808 | entry = ioapic_read_entry(apic, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1809 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1810 | printk(KERN_DEBUG " %02x %03X ", |
| 1811 | i, |
| 1812 | entry.dest |
| 1813 | ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1814 | |
| 1815 | printk("%1d %1d %1d %1d %1d %1d %1d %02X\n", |
| 1816 | entry.mask, |
| 1817 | entry.trigger, |
| 1818 | entry.irr, |
| 1819 | entry.polarity, |
| 1820 | entry.delivery_status, |
| 1821 | entry.dest_mode, |
| 1822 | entry.delivery_mode, |
| 1823 | entry.vector |
| 1824 | ); |
| 1825 | } |
| 1826 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1827 | printk(KERN_DEBUG "IRQ to pin mappings:\n"); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1828 | for_each_irq_desc(irq, desc) { |
| 1829 | struct irq_pin_list *entry; |
| 1830 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1831 | cfg = desc->chip_data; |
| 1832 | entry = cfg->irq_2_pin; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 1833 | if (!entry) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1834 | continue; |
Yinghai Lu | 8f09cd2 | 2008-08-19 20:50:51 -0700 | [diff] [blame] | 1835 | printk(KERN_DEBUG "IRQ%d ", irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1836 | for (;;) { |
| 1837 | printk("-> %d:%d", entry->apic, entry->pin); |
| 1838 | if (!entry->next) |
| 1839 | break; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 1840 | entry = entry->next; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1841 | } |
| 1842 | printk("\n"); |
| 1843 | } |
| 1844 | |
| 1845 | printk(KERN_INFO ".................................... done.\n"); |
| 1846 | |
| 1847 | return; |
| 1848 | } |
| 1849 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1850 | __apicdebuginit(void) print_APIC_bitfield(int base) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1851 | { |
| 1852 | unsigned int v; |
| 1853 | int i, j; |
| 1854 | |
| 1855 | if (apic_verbosity == APIC_QUIET) |
| 1856 | return; |
| 1857 | |
| 1858 | printk(KERN_DEBUG "0123456789abcdef0123456789abcdef\n" KERN_DEBUG); |
| 1859 | for (i = 0; i < 8; i++) { |
| 1860 | v = apic_read(base + i*0x10); |
| 1861 | for (j = 0; j < 32; j++) { |
| 1862 | if (v & (1<<j)) |
| 1863 | printk("1"); |
| 1864 | else |
| 1865 | printk("0"); |
| 1866 | } |
| 1867 | printk("\n"); |
| 1868 | } |
| 1869 | } |
| 1870 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1871 | __apicdebuginit(void) print_local_APIC(void *dummy) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1872 | { |
| 1873 | unsigned int v, ver, maxlvt; |
Hiroshi Shimamoto | 7ab6af7 | 2008-07-30 17:36:48 -0700 | [diff] [blame] | 1874 | u64 icr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1875 | |
| 1876 | if (apic_verbosity == APIC_QUIET) |
| 1877 | return; |
| 1878 | |
| 1879 | printk("\n" KERN_DEBUG "printing local APIC contents on CPU#%d/%d:\n", |
| 1880 | smp_processor_id(), hard_smp_processor_id()); |
Andreas Herrmann | 6682311 | 2008-06-05 16:35:10 +0200 | [diff] [blame] | 1881 | v = apic_read(APIC_ID); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1882 | printk(KERN_INFO "... APIC ID: %08x (%01x)\n", v, read_apic_id()); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1883 | v = apic_read(APIC_LVR); |
| 1884 | printk(KERN_INFO "... APIC VERSION: %08x\n", v); |
| 1885 | ver = GET_APIC_VERSION(v); |
Thomas Gleixner | e05d723 | 2007-02-16 01:27:58 -0800 | [diff] [blame] | 1886 | maxlvt = lapic_get_maxlvt(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1887 | |
| 1888 | v = apic_read(APIC_TASKPRI); |
| 1889 | printk(KERN_DEBUG "... APIC TASKPRI: %08x (%02x)\n", v, v & APIC_TPRI_MASK); |
| 1890 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1891 | if (APIC_INTEGRATED(ver)) { /* !82489DX */ |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 1892 | if (!APIC_XAPIC(ver)) { |
| 1893 | v = apic_read(APIC_ARBPRI); |
| 1894 | printk(KERN_DEBUG "... APIC ARBPRI: %08x (%02x)\n", v, |
| 1895 | v & APIC_ARBPRI_MASK); |
| 1896 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1897 | v = apic_read(APIC_PROCPRI); |
| 1898 | printk(KERN_DEBUG "... APIC PROCPRI: %08x\n", v); |
| 1899 | } |
| 1900 | |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 1901 | /* |
| 1902 | * Remote read supported only in the 82489DX and local APIC for |
| 1903 | * Pentium processors. |
| 1904 | */ |
| 1905 | if (!APIC_INTEGRATED(ver) || maxlvt == 3) { |
| 1906 | v = apic_read(APIC_RRR); |
| 1907 | printk(KERN_DEBUG "... APIC RRR: %08x\n", v); |
| 1908 | } |
| 1909 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1910 | v = apic_read(APIC_LDR); |
| 1911 | printk(KERN_DEBUG "... APIC LDR: %08x\n", v); |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 1912 | if (!x2apic_enabled()) { |
| 1913 | v = apic_read(APIC_DFR); |
| 1914 | printk(KERN_DEBUG "... APIC DFR: %08x\n", v); |
| 1915 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1916 | v = apic_read(APIC_SPIV); |
| 1917 | printk(KERN_DEBUG "... APIC SPIV: %08x\n", v); |
| 1918 | |
| 1919 | printk(KERN_DEBUG "... APIC ISR field:\n"); |
| 1920 | print_APIC_bitfield(APIC_ISR); |
| 1921 | printk(KERN_DEBUG "... APIC TMR field:\n"); |
| 1922 | print_APIC_bitfield(APIC_TMR); |
| 1923 | printk(KERN_DEBUG "... APIC IRR field:\n"); |
| 1924 | print_APIC_bitfield(APIC_IRR); |
| 1925 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1926 | if (APIC_INTEGRATED(ver)) { /* !82489DX */ |
| 1927 | if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1928 | apic_write(APIC_ESR, 0); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1929 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1930 | v = apic_read(APIC_ESR); |
| 1931 | printk(KERN_DEBUG "... APIC ESR: %08x\n", v); |
| 1932 | } |
| 1933 | |
Hiroshi Shimamoto | 7ab6af7 | 2008-07-30 17:36:48 -0700 | [diff] [blame] | 1934 | icr = apic_icr_read(); |
Ingo Molnar | 0c425ce | 2008-08-18 13:04:26 +0200 | [diff] [blame] | 1935 | printk(KERN_DEBUG "... APIC ICR: %08x\n", (u32)icr); |
| 1936 | printk(KERN_DEBUG "... APIC ICR2: %08x\n", (u32)(icr >> 32)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1937 | |
| 1938 | v = apic_read(APIC_LVTT); |
| 1939 | printk(KERN_DEBUG "... APIC LVTT: %08x\n", v); |
| 1940 | |
| 1941 | if (maxlvt > 3) { /* PC is LVT#4. */ |
| 1942 | v = apic_read(APIC_LVTPC); |
| 1943 | printk(KERN_DEBUG "... APIC LVTPC: %08x\n", v); |
| 1944 | } |
| 1945 | v = apic_read(APIC_LVT0); |
| 1946 | printk(KERN_DEBUG "... APIC LVT0: %08x\n", v); |
| 1947 | v = apic_read(APIC_LVT1); |
| 1948 | printk(KERN_DEBUG "... APIC LVT1: %08x\n", v); |
| 1949 | |
| 1950 | if (maxlvt > 2) { /* ERR is LVT#3. */ |
| 1951 | v = apic_read(APIC_LVTERR); |
| 1952 | printk(KERN_DEBUG "... APIC LVTERR: %08x\n", v); |
| 1953 | } |
| 1954 | |
| 1955 | v = apic_read(APIC_TMICT); |
| 1956 | printk(KERN_DEBUG "... APIC TMICT: %08x\n", v); |
| 1957 | v = apic_read(APIC_TMCCT); |
| 1958 | printk(KERN_DEBUG "... APIC TMCCT: %08x\n", v); |
| 1959 | v = apic_read(APIC_TDCR); |
| 1960 | printk(KERN_DEBUG "... APIC TDCR: %08x\n", v); |
| 1961 | printk("\n"); |
| 1962 | } |
| 1963 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1964 | __apicdebuginit(void) print_all_local_APICs(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1965 | { |
Yinghai Lu | ffd5aae | 2008-08-19 20:50:50 -0700 | [diff] [blame] | 1966 | int cpu; |
| 1967 | |
| 1968 | preempt_disable(); |
| 1969 | for_each_online_cpu(cpu) |
| 1970 | smp_call_function_single(cpu, print_local_APIC, NULL, 1); |
| 1971 | preempt_enable(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1972 | } |
| 1973 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1974 | __apicdebuginit(void) print_PIC(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1975 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1976 | unsigned int v; |
| 1977 | unsigned long flags; |
| 1978 | |
| 1979 | if (apic_verbosity == APIC_QUIET) |
| 1980 | return; |
| 1981 | |
| 1982 | printk(KERN_DEBUG "\nprinting PIC contents\n"); |
| 1983 | |
| 1984 | spin_lock_irqsave(&i8259A_lock, flags); |
| 1985 | |
| 1986 | v = inb(0xa1) << 8 | inb(0x21); |
| 1987 | printk(KERN_DEBUG "... PIC IMR: %04x\n", v); |
| 1988 | |
| 1989 | v = inb(0xa0) << 8 | inb(0x20); |
| 1990 | printk(KERN_DEBUG "... PIC IRR: %04x\n", v); |
| 1991 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1992 | outb(0x0b,0xa0); |
| 1993 | outb(0x0b,0x20); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1994 | v = inb(0xa0) << 8 | inb(0x20); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1995 | outb(0x0a,0xa0); |
| 1996 | outb(0x0a,0x20); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1997 | |
| 1998 | spin_unlock_irqrestore(&i8259A_lock, flags); |
| 1999 | |
| 2000 | printk(KERN_DEBUG "... PIC ISR: %04x\n", v); |
| 2001 | |
| 2002 | v = inb(0x4d1) << 8 | inb(0x4d0); |
| 2003 | printk(KERN_DEBUG "... PIC ELCR: %04x\n", v); |
| 2004 | } |
| 2005 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 2006 | __apicdebuginit(int) print_all_ICs(void) |
| 2007 | { |
| 2008 | print_PIC(); |
| 2009 | print_all_local_APICs(); |
| 2010 | print_IO_APIC(); |
| 2011 | |
| 2012 | return 0; |
| 2013 | } |
| 2014 | |
| 2015 | fs_initcall(print_all_ICs); |
| 2016 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2017 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 2018 | /* Where if anywhere is the i8259 connect in external int mode */ |
| 2019 | static struct { int pin, apic; } ioapic_i8259 = { -1, -1 }; |
| 2020 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2021 | void __init enable_IO_APIC(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2022 | { |
| 2023 | union IO_APIC_reg_01 reg_01; |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2024 | int i8259_apic, i8259_pin; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2025 | int apic; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2026 | unsigned long flags; |
| 2027 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2028 | /* |
| 2029 | * The number of IO-APIC IRQ registers (== #pins): |
| 2030 | */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2031 | for (apic = 0; apic < nr_ioapics; apic++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2032 | spin_lock_irqsave(&ioapic_lock, flags); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2033 | reg_01.raw = io_apic_read(apic, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2034 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2035 | nr_ioapic_registers[apic] = reg_01.bits.entries+1; |
| 2036 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2037 | for(apic = 0; apic < nr_ioapics; apic++) { |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2038 | int pin; |
| 2039 | /* See if any of the pins is in ExtINT mode */ |
Eric W. Biederman | 1008fdd | 2006-01-11 22:46:06 +0100 | [diff] [blame] | 2040 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2041 | struct IO_APIC_route_entry entry; |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2042 | entry = ioapic_read_entry(apic, pin); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2043 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2044 | /* If the interrupt line is enabled and in ExtInt mode |
| 2045 | * I have found the pin where the i8259 is connected. |
| 2046 | */ |
| 2047 | if ((entry.mask == 0) && (entry.delivery_mode == dest_ExtINT)) { |
| 2048 | ioapic_i8259.apic = apic; |
| 2049 | ioapic_i8259.pin = pin; |
| 2050 | goto found_i8259; |
| 2051 | } |
| 2052 | } |
| 2053 | } |
| 2054 | found_i8259: |
| 2055 | /* Look to see what if the MP table has reported the ExtINT */ |
| 2056 | /* If we could not find the appropriate pin by looking at the ioapic |
| 2057 | * the i8259 probably is not connected the ioapic but give the |
| 2058 | * mptable a chance anyway. |
| 2059 | */ |
| 2060 | i8259_pin = find_isa_irq_pin(0, mp_ExtINT); |
| 2061 | i8259_apic = find_isa_irq_apic(0, mp_ExtINT); |
| 2062 | /* Trust the MP table if nothing is setup in the hardware */ |
| 2063 | if ((ioapic_i8259.pin == -1) && (i8259_pin >= 0)) { |
| 2064 | printk(KERN_WARNING "ExtINT not setup in hardware but reported by MP table\n"); |
| 2065 | ioapic_i8259.pin = i8259_pin; |
| 2066 | ioapic_i8259.apic = i8259_apic; |
| 2067 | } |
| 2068 | /* Complain if the MP table and the hardware disagree */ |
| 2069 | if (((ioapic_i8259.apic != i8259_apic) || (ioapic_i8259.pin != i8259_pin)) && |
| 2070 | (i8259_pin >= 0) && (ioapic_i8259.pin >= 0)) |
| 2071 | { |
| 2072 | printk(KERN_WARNING "ExtINT in hardware and MP table differ\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2073 | } |
| 2074 | |
| 2075 | /* |
| 2076 | * Do not trust the IO-APIC being empty at bootup |
| 2077 | */ |
| 2078 | clear_IO_APIC(); |
| 2079 | } |
| 2080 | |
| 2081 | /* |
| 2082 | * Not an __init, needed by the reboot code |
| 2083 | */ |
| 2084 | void disable_IO_APIC(void) |
| 2085 | { |
| 2086 | /* |
| 2087 | * Clear the IO-APIC before rebooting: |
| 2088 | */ |
| 2089 | clear_IO_APIC(); |
| 2090 | |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 2091 | /* |
Karsten Wiese | 0b968d2 | 2005-09-09 12:59:04 +0200 | [diff] [blame] | 2092 | * If the i8259 is routed through an IOAPIC |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 2093 | * Put that IOAPIC in virtual wire mode |
Karsten Wiese | 0b968d2 | 2005-09-09 12:59:04 +0200 | [diff] [blame] | 2094 | * so legacy interrupts can be delivered. |
Suresh Siddha | 7c6d9f9 | 2009-03-16 17:04:59 -0700 | [diff] [blame] | 2095 | * |
| 2096 | * With interrupt-remapping, for now we will use virtual wire A mode, |
| 2097 | * as virtual wire B is little complex (need to configure both |
| 2098 | * IOAPIC RTE aswell as interrupt-remapping table entry). |
| 2099 | * As this gets called during crash dump, keep this simple for now. |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 2100 | */ |
Suresh Siddha | 7c6d9f9 | 2009-03-16 17:04:59 -0700 | [diff] [blame] | 2101 | if (ioapic_i8259.pin != -1 && !intr_remapping_enabled) { |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 2102 | struct IO_APIC_route_entry entry; |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 2103 | |
| 2104 | memset(&entry, 0, sizeof(entry)); |
| 2105 | entry.mask = 0; /* Enabled */ |
| 2106 | entry.trigger = 0; /* Edge */ |
| 2107 | entry.irr = 0; |
| 2108 | entry.polarity = 0; /* High */ |
| 2109 | entry.delivery_status = 0; |
| 2110 | entry.dest_mode = 0; /* Physical */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2111 | entry.delivery_mode = dest_ExtINT; /* ExtInt */ |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 2112 | entry.vector = 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2113 | entry.dest = read_apic_id(); |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 2114 | |
| 2115 | /* |
| 2116 | * Add it to the IO-APIC irq-routing table: |
| 2117 | */ |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2118 | ioapic_write_entry(ioapic_i8259.apic, ioapic_i8259.pin, entry); |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 2119 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2120 | |
Suresh Siddha | 7c6d9f9 | 2009-03-16 17:04:59 -0700 | [diff] [blame] | 2121 | /* |
| 2122 | * Use virtual wire A mode when interrupt remapping is enabled. |
| 2123 | */ |
| 2124 | disconnect_bsp_APIC(!intr_remapping_enabled && ioapic_i8259.pin != -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2125 | } |
| 2126 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2127 | #ifdef CONFIG_X86_32 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2128 | /* |
| 2129 | * function to set the IO-APIC physical IDs based on the |
| 2130 | * values stored in the MPC table. |
| 2131 | * |
| 2132 | * by Matt Domsch <Matt_Domsch@dell.com> Tue Dec 21 12:25:05 CST 1999 |
| 2133 | */ |
| 2134 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2135 | static void __init setup_ioapic_ids_from_mpc(void) |
| 2136 | { |
| 2137 | union IO_APIC_reg_00 reg_00; |
| 2138 | physid_mask_t phys_id_present_map; |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2139 | int apic_id; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2140 | int i; |
| 2141 | unsigned char old_id; |
| 2142 | unsigned long flags; |
| 2143 | |
Yinghai Lu | a4dbc34 | 2008-07-25 02:14:28 -0700 | [diff] [blame] | 2144 | if (x86_quirks->setup_ioapic_ids && x86_quirks->setup_ioapic_ids()) |
Yinghai Lu | d49c428 | 2008-06-08 18:31:54 -0700 | [diff] [blame] | 2145 | return; |
Yinghai Lu | d49c428 | 2008-06-08 18:31:54 -0700 | [diff] [blame] | 2146 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2147 | /* |
Natalie Protasevich | ca05fea | 2005-06-23 00:08:22 -0700 | [diff] [blame] | 2148 | * Don't check I/O APIC IDs for xAPIC systems. They have |
| 2149 | * no meaning without the serial APIC bus. |
| 2150 | */ |
Shaohua Li | 7c5c1e4 | 2006-03-23 02:59:53 -0800 | [diff] [blame] | 2151 | if (!(boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) |
| 2152 | || APIC_XAPIC(apic_version[boot_cpu_physical_apicid])) |
Natalie Protasevich | ca05fea | 2005-06-23 00:08:22 -0700 | [diff] [blame] | 2153 | return; |
| 2154 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2155 | * This is broken; anything with a real cpu count has to |
| 2156 | * circumvent this idiocy regardless. |
| 2157 | */ |
Ingo Molnar | d190cb8 | 2009-01-28 06:50:47 +0100 | [diff] [blame] | 2158 | phys_id_present_map = apic->ioapic_phys_id_map(phys_cpu_present_map); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2159 | |
| 2160 | /* |
| 2161 | * Set the IOAPIC ID to the value stored in the MPC table. |
| 2162 | */ |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2163 | for (apic_id = 0; apic_id < nr_ioapics; apic_id++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2164 | |
| 2165 | /* Read the register 0 value */ |
| 2166 | spin_lock_irqsave(&ioapic_lock, flags); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2167 | reg_00.raw = io_apic_read(apic_id, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2168 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2169 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2170 | old_id = mp_ioapics[apic_id].apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2171 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2172 | if (mp_ioapics[apic_id].apicid >= get_physical_broadcast()) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2173 | printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2174 | apic_id, mp_ioapics[apic_id].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2175 | printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", |
| 2176 | reg_00.bits.ID); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2177 | mp_ioapics[apic_id].apicid = reg_00.bits.ID; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2178 | } |
| 2179 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2180 | /* |
| 2181 | * Sanity check, is the ID really free? Every APIC in a |
| 2182 | * system must have a unique ID or we get lots of nice |
| 2183 | * 'stuck on smp_invalidate_needed IPI wait' messages. |
| 2184 | */ |
Ingo Molnar | d1d7cae | 2009-01-28 05:41:42 +0100 | [diff] [blame] | 2185 | if (apic->check_apicid_used(phys_id_present_map, |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2186 | mp_ioapics[apic_id].apicid)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2187 | printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2188 | apic_id, mp_ioapics[apic_id].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2189 | for (i = 0; i < get_physical_broadcast(); i++) |
| 2190 | if (!physid_isset(i, phys_id_present_map)) |
| 2191 | break; |
| 2192 | if (i >= get_physical_broadcast()) |
| 2193 | panic("Max APIC ID exceeded!\n"); |
| 2194 | printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", |
| 2195 | i); |
| 2196 | physid_set(i, phys_id_present_map); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2197 | mp_ioapics[apic_id].apicid = i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2198 | } else { |
| 2199 | physid_mask_t tmp; |
Ingo Molnar | 8058714 | 2009-01-28 06:50:47 +0100 | [diff] [blame] | 2200 | tmp = apic->apicid_to_cpu_present(mp_ioapics[apic_id].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2201 | apic_printk(APIC_VERBOSE, "Setting %d in the " |
| 2202 | "phys_id_present_map\n", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2203 | mp_ioapics[apic_id].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2204 | physids_or(phys_id_present_map, phys_id_present_map, tmp); |
| 2205 | } |
| 2206 | |
| 2207 | |
| 2208 | /* |
| 2209 | * We need to adjust the IRQ routing table |
| 2210 | * if the ID changed. |
| 2211 | */ |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2212 | if (old_id != mp_ioapics[apic_id].apicid) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2213 | for (i = 0; i < mp_irq_entries; i++) |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 2214 | if (mp_irqs[i].dstapic == old_id) |
| 2215 | mp_irqs[i].dstapic |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2216 | = mp_ioapics[apic_id].apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2217 | |
| 2218 | /* |
| 2219 | * Read the right value from the MPC table and |
| 2220 | * write it into the ID register. |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2221 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2222 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 2223 | "...changing IO-APIC physical APIC ID to %d ...", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2224 | mp_ioapics[apic_id].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2225 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2226 | reg_00.bits.ID = mp_ioapics[apic_id].apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2227 | spin_lock_irqsave(&ioapic_lock, flags); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2228 | io_apic_write(apic_id, 0, reg_00.raw); |
Yinghai Lu | a2d332f | 2008-08-21 12:56:32 -0700 | [diff] [blame] | 2229 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2230 | |
| 2231 | /* |
| 2232 | * Sanity check |
| 2233 | */ |
| 2234 | spin_lock_irqsave(&ioapic_lock, flags); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2235 | reg_00.raw = io_apic_read(apic_id, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2236 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2237 | if (reg_00.bits.ID != mp_ioapics[apic_id].apicid) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2238 | printk("could not set ID!\n"); |
| 2239 | else |
| 2240 | apic_printk(APIC_VERBOSE, " ok.\n"); |
| 2241 | } |
| 2242 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2243 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2244 | |
Zachary Amsden | 7ce0bcf | 2007-02-13 13:26:21 +0100 | [diff] [blame] | 2245 | int no_timer_check __initdata; |
Zachary Amsden | 8542b20 | 2006-12-07 02:14:09 +0100 | [diff] [blame] | 2246 | |
| 2247 | static int __init notimercheck(char *s) |
| 2248 | { |
| 2249 | no_timer_check = 1; |
| 2250 | return 1; |
| 2251 | } |
| 2252 | __setup("no_timer_check", notimercheck); |
| 2253 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2254 | /* |
| 2255 | * There is a nasty bug in some older SMP boards, their mptable lies |
| 2256 | * about the timer IRQ. We do the following to work around the situation: |
| 2257 | * |
| 2258 | * - timer IRQ defaults to IO-APIC IRQ |
| 2259 | * - if this function detects that timer IRQs are defunct, then we fall |
| 2260 | * back to ISA timer IRQs |
| 2261 | */ |
Adrian Bunk | f0a7a5c | 2007-07-21 17:10:29 +0200 | [diff] [blame] | 2262 | static int __init timer_irq_works(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2263 | { |
| 2264 | unsigned long t1 = jiffies; |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2265 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2266 | |
Zachary Amsden | 8542b20 | 2006-12-07 02:14:09 +0100 | [diff] [blame] | 2267 | if (no_timer_check) |
| 2268 | return 1; |
| 2269 | |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2270 | local_save_flags(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2271 | local_irq_enable(); |
| 2272 | /* Let ten ticks pass... */ |
| 2273 | mdelay((10 * 1000) / HZ); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2274 | local_irq_restore(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2275 | |
| 2276 | /* |
| 2277 | * Expect a few ticks at least, to be sure some possible |
| 2278 | * glue logic does not lock up after one or two first |
| 2279 | * ticks in a non-ExtINT mode. Also the local APIC |
| 2280 | * might have cached one ExtINT interrupt. Finally, at |
| 2281 | * least one tick may be lost due to delays. |
| 2282 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2283 | |
| 2284 | /* jiffies wrap? */ |
Julia Lawall | 1d16b53 | 2008-01-30 13:32:19 +0100 | [diff] [blame] | 2285 | if (time_after(jiffies, t1 + 4)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2286 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2287 | return 0; |
| 2288 | } |
| 2289 | |
| 2290 | /* |
| 2291 | * In the SMP+IOAPIC case it might happen that there are an unspecified |
| 2292 | * number of pending IRQ events unhandled. These cases are very rare, |
| 2293 | * so we 'resend' these IRQs via IPIs, to the same CPU. It's much |
| 2294 | * better to do it this way as thus we do not have to be aware of |
| 2295 | * 'pending' interrupts in the IRQ path, except at this point. |
| 2296 | */ |
| 2297 | /* |
| 2298 | * Edge triggered needs to resend any interrupt |
| 2299 | * that was delayed but this is now handled in the device |
| 2300 | * independent code. |
| 2301 | */ |
| 2302 | |
| 2303 | /* |
| 2304 | * Starting up a edge-triggered IO-APIC interrupt is |
| 2305 | * nasty - we need to make sure that we get the edge. |
| 2306 | * If it is already asserted for some reason, we need |
| 2307 | * return 1 to indicate that is was pending. |
| 2308 | * |
| 2309 | * This is not complete - we should be able to fake |
| 2310 | * an edge even if it isn't on the 8259A... |
| 2311 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2312 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2313 | static unsigned int startup_ioapic_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2314 | { |
| 2315 | int was_pending = 0; |
| 2316 | unsigned long flags; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2317 | struct irq_cfg *cfg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2318 | |
| 2319 | spin_lock_irqsave(&ioapic_lock, flags); |
Yinghai Lu | 99d093d | 2008-12-05 18:58:32 -0800 | [diff] [blame] | 2320 | if (irq < NR_IRQS_LEGACY) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2321 | disable_8259A_irq(irq); |
| 2322 | if (i8259A_irq_pending(irq)) |
| 2323 | was_pending = 1; |
| 2324 | } |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2325 | cfg = irq_cfg(irq); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2326 | __unmask_IO_APIC_irq(cfg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2327 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 2328 | |
| 2329 | return was_pending; |
| 2330 | } |
| 2331 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2332 | #ifdef CONFIG_X86_64 |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 2333 | static int ioapic_retrigger_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2334 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2335 | |
| 2336 | struct irq_cfg *cfg = irq_cfg(irq); |
| 2337 | unsigned long flags; |
| 2338 | |
| 2339 | spin_lock_irqsave(&vector_lock, flags); |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 2340 | apic->send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2341 | spin_unlock_irqrestore(&vector_lock, flags); |
Ingo Molnar | c0ad90a | 2006-06-29 02:24:44 -0700 | [diff] [blame] | 2342 | |
| 2343 | return 1; |
| 2344 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2345 | #else |
| 2346 | static int ioapic_retrigger_irq(unsigned int irq) |
| 2347 | { |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 2348 | apic->send_IPI_self(irq_cfg(irq)->vector); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2349 | |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2350 | return 1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2351 | } |
| 2352 | #endif |
| 2353 | |
| 2354 | /* |
| 2355 | * Level and edge triggered IO-APIC interrupts need different handling, |
| 2356 | * so we use two separate IRQ descriptors. Edge triggered IRQs can be |
| 2357 | * handled with the level-triggered descriptor, but that one has slightly |
| 2358 | * more overhead. Level-triggered interrupts cannot be handled with the |
| 2359 | * edge-triggered handler, without risking IRQ storms and other ugly |
| 2360 | * races. |
| 2361 | */ |
Ingo Molnar | c0ad90a | 2006-06-29 02:24:44 -0700 | [diff] [blame] | 2362 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2363 | #ifdef CONFIG_SMP |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2364 | |
| 2365 | #ifdef CONFIG_INTR_REMAP |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2366 | |
| 2367 | /* |
| 2368 | * Migrate the IO-APIC irq in the presence of intr-remapping. |
| 2369 | * |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 2370 | * For both level and edge triggered, irq migration is a simple atomic |
| 2371 | * update(of vector and cpu destination) of IRTE and flush the hardware cache. |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2372 | * |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 2373 | * For level triggered, we eliminate the io-apic RTE modification (with the |
| 2374 | * updated vector information), by using a virtual vector (io-apic pin number). |
| 2375 | * Real vector that is used for interrupting cpu will be coming from |
| 2376 | * the interrupt-remapping table entry. |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2377 | */ |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 2378 | static void |
| 2379 | migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2380 | { |
| 2381 | struct irq_cfg *cfg; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2382 | struct irte irte; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2383 | unsigned int dest; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2384 | unsigned int irq; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2385 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 2386 | if (!cpumask_intersects(mask, cpu_online_mask)) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2387 | return; |
| 2388 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2389 | irq = desc->irq; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2390 | if (get_irte(irq, &irte)) |
| 2391 | return; |
| 2392 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2393 | cfg = desc->chip_data; |
| 2394 | if (assign_irq_vector(irq, cfg, mask)) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2395 | return; |
| 2396 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2397 | set_extra_move_desc(desc, mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2398 | |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 2399 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2400 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2401 | irte.vector = cfg->vector; |
| 2402 | irte.dest_id = IRTE_DEST(dest); |
| 2403 | |
| 2404 | /* |
| 2405 | * Modified the IRTE and flushes the Interrupt entry cache. |
| 2406 | */ |
| 2407 | modify_irte(irq, &irte); |
| 2408 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 2409 | if (cfg->move_in_progress) |
| 2410 | send_cleanup_vector(cfg); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2411 | |
Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 2412 | cpumask_copy(desc->affinity, mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2413 | } |
| 2414 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2415 | /* |
| 2416 | * Migrates the IRQ destination in the process context. |
| 2417 | */ |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame] | 2418 | static void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, |
| 2419 | const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2420 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2421 | migrate_ioapic_irq_desc(desc, mask); |
| 2422 | } |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 2423 | static void set_ir_ioapic_affinity_irq(unsigned int irq, |
| 2424 | const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2425 | { |
| 2426 | struct irq_desc *desc = irq_to_desc(irq); |
| 2427 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2428 | set_ir_ioapic_affinity_irq_desc(desc, mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2429 | } |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 2430 | #else |
| 2431 | static inline void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, |
| 2432 | const struct cpumask *mask) |
| 2433 | { |
| 2434 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2435 | #endif |
| 2436 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2437 | asmlinkage void smp_irq_move_cleanup_interrupt(void) |
| 2438 | { |
| 2439 | unsigned vector, me; |
Hiroshi Shimamoto | 8f2466f | 2008-12-08 19:19:07 -0800 | [diff] [blame] | 2440 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2441 | ack_APIC_irq(); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2442 | exit_idle(); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2443 | irq_enter(); |
| 2444 | |
| 2445 | me = smp_processor_id(); |
| 2446 | for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; vector++) { |
| 2447 | unsigned int irq; |
Suresh Siddha | 68a8ca5 | 2009-03-16 17:05:04 -0700 | [diff] [blame] | 2448 | unsigned int irr; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2449 | struct irq_desc *desc; |
| 2450 | struct irq_cfg *cfg; |
| 2451 | irq = __get_cpu_var(vector_irq)[vector]; |
| 2452 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2453 | if (irq == -1) |
| 2454 | continue; |
| 2455 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2456 | desc = irq_to_desc(irq); |
| 2457 | if (!desc) |
| 2458 | continue; |
| 2459 | |
| 2460 | cfg = irq_cfg(irq); |
| 2461 | spin_lock(&desc->lock); |
| 2462 | if (!cfg->move_cleanup_count) |
| 2463 | goto unlock; |
| 2464 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 2465 | if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2466 | goto unlock; |
| 2467 | |
Suresh Siddha | 68a8ca5 | 2009-03-16 17:05:04 -0700 | [diff] [blame] | 2468 | irr = apic_read(APIC_IRR + (vector / 32 * 0x10)); |
| 2469 | /* |
| 2470 | * Check if the vector that needs to be cleanedup is |
| 2471 | * registered at the cpu's IRR. If so, then this is not |
| 2472 | * the best time to clean it up. Lets clean it up in the |
| 2473 | * next attempt by sending another IRQ_MOVE_CLEANUP_VECTOR |
| 2474 | * to myself. |
| 2475 | */ |
| 2476 | if (irr & (1 << (vector % 32))) { |
| 2477 | apic->send_IPI_self(IRQ_MOVE_CLEANUP_VECTOR); |
| 2478 | goto unlock; |
| 2479 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2480 | __get_cpu_var(vector_irq)[vector] = -1; |
| 2481 | cfg->move_cleanup_count--; |
| 2482 | unlock: |
| 2483 | spin_unlock(&desc->lock); |
| 2484 | } |
| 2485 | |
| 2486 | irq_exit(); |
| 2487 | } |
| 2488 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2489 | static void irq_complete_move(struct irq_desc **descp) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2490 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2491 | struct irq_desc *desc = *descp; |
| 2492 | struct irq_cfg *cfg = desc->chip_data; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2493 | unsigned vector, me; |
| 2494 | |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 2495 | if (likely(!cfg->move_in_progress)) { |
| 2496 | #ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC |
| 2497 | if (likely(!cfg->move_desc_pending)) |
| 2498 | return; |
| 2499 | |
Yinghai Lu | b909895 | 2008-12-19 13:48:34 -0800 | [diff] [blame] | 2500 | /* domain has not changed, but affinity did */ |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 2501 | me = smp_processor_id(); |
Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 2502 | if (cpumask_test_cpu(me, desc->affinity)) { |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 2503 | *descp = desc = move_irq_desc(desc, me); |
| 2504 | /* get the new one */ |
| 2505 | cfg = desc->chip_data; |
| 2506 | cfg->move_desc_pending = 0; |
| 2507 | } |
| 2508 | #endif |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2509 | return; |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 2510 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2511 | |
| 2512 | vector = ~get_irq_regs()->orig_ax; |
| 2513 | me = smp_processor_id(); |
Yinghai Lu | 10b888d | 2009-01-31 14:50:07 -0800 | [diff] [blame] | 2514 | |
| 2515 | if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain)) { |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 2516 | #ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC |
| 2517 | *descp = desc = move_irq_desc(desc, me); |
| 2518 | /* get the new one */ |
| 2519 | cfg = desc->chip_data; |
| 2520 | #endif |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 2521 | send_cleanup_vector(cfg); |
Yinghai Lu | 10b888d | 2009-01-31 14:50:07 -0800 | [diff] [blame] | 2522 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2523 | } |
| 2524 | #else |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2525 | static inline void irq_complete_move(struct irq_desc **descp) {} |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2526 | #endif |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2527 | |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 2528 | #ifdef CONFIG_X86_X2APIC |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 2529 | static void __eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg) |
| 2530 | { |
| 2531 | int apic, pin; |
| 2532 | struct irq_pin_list *entry; |
| 2533 | |
| 2534 | entry = cfg->irq_2_pin; |
| 2535 | for (;;) { |
| 2536 | |
| 2537 | if (!entry) |
| 2538 | break; |
| 2539 | |
| 2540 | apic = entry->apic; |
| 2541 | pin = entry->pin; |
| 2542 | io_apic_eoi(apic, pin); |
| 2543 | entry = entry->next; |
| 2544 | } |
| 2545 | } |
| 2546 | |
| 2547 | static void |
| 2548 | eoi_ioapic_irq(struct irq_desc *desc) |
| 2549 | { |
| 2550 | struct irq_cfg *cfg; |
| 2551 | unsigned long flags; |
| 2552 | unsigned int irq; |
| 2553 | |
| 2554 | irq = desc->irq; |
| 2555 | cfg = desc->chip_data; |
| 2556 | |
| 2557 | spin_lock_irqsave(&ioapic_lock, flags); |
| 2558 | __eoi_ioapic_irq(irq, cfg); |
| 2559 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 2560 | } |
| 2561 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2562 | static void ack_x2apic_level(unsigned int irq) |
| 2563 | { |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 2564 | struct irq_desc *desc = irq_to_desc(irq); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2565 | ack_x2APIC_irq(); |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 2566 | eoi_ioapic_irq(desc); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2567 | } |
| 2568 | |
| 2569 | static void ack_x2apic_edge(unsigned int irq) |
| 2570 | { |
| 2571 | ack_x2APIC_irq(); |
| 2572 | } |
| 2573 | #endif |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2574 | |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2575 | static void ack_apic_edge(unsigned int irq) |
| 2576 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2577 | struct irq_desc *desc = irq_to_desc(irq); |
| 2578 | |
| 2579 | irq_complete_move(&desc); |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2580 | move_native_irq(irq); |
| 2581 | ack_APIC_irq(); |
| 2582 | } |
| 2583 | |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2584 | atomic_t irq_mis_count; |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2585 | |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2586 | static void ack_apic_level(unsigned int irq) |
| 2587 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2588 | struct irq_desc *desc = irq_to_desc(irq); |
| 2589 | |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2590 | #ifdef CONFIG_X86_32 |
| 2591 | unsigned long v; |
| 2592 | int i; |
| 2593 | #endif |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2594 | struct irq_cfg *cfg; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2595 | int do_unmask_irq = 0; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2596 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2597 | irq_complete_move(&desc); |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2598 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2599 | /* If we are moving the irq we need to mask it */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2600 | if (unlikely(desc->status & IRQ_MOVE_PENDING)) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2601 | do_unmask_irq = 1; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2602 | mask_IO_APIC_irq_desc(desc); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2603 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2604 | #endif |
| 2605 | |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2606 | #ifdef CONFIG_X86_32 |
| 2607 | /* |
| 2608 | * It appears there is an erratum which affects at least version 0x11 |
| 2609 | * of I/O APIC (that's the 82093AA and cores integrated into various |
| 2610 | * chipsets). Under certain conditions a level-triggered interrupt is |
| 2611 | * erroneously delivered as edge-triggered one but the respective IRR |
| 2612 | * bit gets set nevertheless. As a result the I/O unit expects an EOI |
| 2613 | * message but it will never arrive and further interrupts are blocked |
| 2614 | * from the source. The exact reason is so far unknown, but the |
| 2615 | * phenomenon was observed when two consecutive interrupt requests |
| 2616 | * from a given source get delivered to the same CPU and the source is |
| 2617 | * temporarily disabled in between. |
| 2618 | * |
| 2619 | * A workaround is to simulate an EOI message manually. We achieve it |
| 2620 | * by setting the trigger mode to edge and then to level when the edge |
| 2621 | * trigger mode gets detected in the TMR of a local APIC for a |
| 2622 | * level-triggered interrupt. We mask the source for the time of the |
| 2623 | * operation to prevent an edge-triggered interrupt escaping meanwhile. |
| 2624 | * The idea is from Manfred Spraul. --macro |
| 2625 | */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2626 | cfg = desc->chip_data; |
| 2627 | i = cfg->vector; |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2628 | |
| 2629 | v = apic_read(APIC_TMR + ((i & ~0x1f) >> 1)); |
| 2630 | #endif |
| 2631 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2632 | /* |
| 2633 | * We must acknowledge the irq before we move it or the acknowledge will |
| 2634 | * not propagate properly. |
| 2635 | */ |
| 2636 | ack_APIC_irq(); |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2637 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2638 | /* Now we can move and renable the irq */ |
| 2639 | if (unlikely(do_unmask_irq)) { |
| 2640 | /* Only migrate the irq if the ack has been received. |
| 2641 | * |
| 2642 | * On rare occasions the broadcast level triggered ack gets |
| 2643 | * delayed going to ioapics, and if we reprogram the |
| 2644 | * vector while Remote IRR is still set the irq will never |
| 2645 | * fire again. |
| 2646 | * |
| 2647 | * To prevent this scenario we read the Remote IRR bit |
| 2648 | * of the ioapic. This has two effects. |
| 2649 | * - On any sane system the read of the ioapic will |
| 2650 | * flush writes (and acks) going to the ioapic from |
| 2651 | * this cpu. |
| 2652 | * - We get to see if the ACK has actually been delivered. |
| 2653 | * |
| 2654 | * Based on failed experiments of reprogramming the |
| 2655 | * ioapic entry from outside of irq context starting |
| 2656 | * with masking the ioapic entry and then polling until |
| 2657 | * Remote IRR was clear before reprogramming the |
| 2658 | * ioapic I don't trust the Remote IRR bit to be |
| 2659 | * completey accurate. |
| 2660 | * |
| 2661 | * However there appears to be no other way to plug |
| 2662 | * this race, so if the Remote IRR bit is not |
| 2663 | * accurate and is causing problems then it is a hardware bug |
| 2664 | * and you can go talk to the chipset vendor about it. |
| 2665 | */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2666 | cfg = desc->chip_data; |
| 2667 | if (!io_apic_level_ack_pending(cfg)) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2668 | move_masked_irq(irq); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2669 | unmask_IO_APIC_irq_desc(desc); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2670 | } |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2671 | |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2672 | #ifdef CONFIG_X86_32 |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2673 | if (!(v & (1 << (i & 0x1f)))) { |
| 2674 | atomic_inc(&irq_mis_count); |
| 2675 | spin_lock(&ioapic_lock); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2676 | __mask_and_edge_IO_APIC_irq(cfg); |
| 2677 | __unmask_and_level_IO_APIC_irq(cfg); |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2678 | spin_unlock(&ioapic_lock); |
| 2679 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2680 | #endif |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2681 | } |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2682 | |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 2683 | #ifdef CONFIG_INTR_REMAP |
| 2684 | static void ir_ack_apic_edge(unsigned int irq) |
| 2685 | { |
| 2686 | #ifdef CONFIG_X86_X2APIC |
| 2687 | if (x2apic_enabled()) |
| 2688 | return ack_x2apic_edge(irq); |
| 2689 | #endif |
| 2690 | return ack_apic_edge(irq); |
| 2691 | } |
| 2692 | |
| 2693 | static void ir_ack_apic_level(unsigned int irq) |
| 2694 | { |
| 2695 | #ifdef CONFIG_X86_X2APIC |
| 2696 | if (x2apic_enabled()) |
| 2697 | return ack_x2apic_level(irq); |
| 2698 | #endif |
| 2699 | return ack_apic_level(irq); |
| 2700 | } |
| 2701 | #endif /* CONFIG_INTR_REMAP */ |
| 2702 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2703 | static struct irq_chip ioapic_chip __read_mostly = { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2704 | .name = "IO-APIC", |
| 2705 | .startup = startup_ioapic_irq, |
| 2706 | .mask = mask_IO_APIC_irq, |
| 2707 | .unmask = unmask_IO_APIC_irq, |
| 2708 | .ack = ack_apic_edge, |
| 2709 | .eoi = ack_apic_level, |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 2710 | #ifdef CONFIG_SMP |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2711 | .set_affinity = set_ioapic_affinity_irq, |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 2712 | #endif |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 2713 | .retrigger = ioapic_retrigger_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2714 | }; |
| 2715 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2716 | static struct irq_chip ir_ioapic_chip __read_mostly = { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2717 | .name = "IR-IO-APIC", |
| 2718 | .startup = startup_ioapic_irq, |
| 2719 | .mask = mask_IO_APIC_irq, |
| 2720 | .unmask = unmask_IO_APIC_irq, |
Jaswinder Singh Rajput | a1e38ca | 2009-03-23 02:11:25 +0530 | [diff] [blame] | 2721 | #ifdef CONFIG_INTR_REMAP |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 2722 | .ack = ir_ack_apic_edge, |
| 2723 | .eoi = ir_ack_apic_level, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2724 | #ifdef CONFIG_SMP |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2725 | .set_affinity = set_ir_ioapic_affinity_irq, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2726 | #endif |
Jaswinder Singh Rajput | a1e38ca | 2009-03-23 02:11:25 +0530 | [diff] [blame] | 2727 | #endif |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2728 | .retrigger = ioapic_retrigger_irq, |
| 2729 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2730 | |
| 2731 | static inline void init_IO_APIC_traps(void) |
| 2732 | { |
| 2733 | int irq; |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 2734 | struct irq_desc *desc; |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame] | 2735 | struct irq_cfg *cfg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2736 | |
| 2737 | /* |
| 2738 | * NOTE! The local APIC isn't very good at handling |
| 2739 | * multiple interrupts at the same interrupt level. |
| 2740 | * As the interrupt level is determined by taking the |
| 2741 | * vector number and shifting that right by 4, we |
| 2742 | * want to spread these out a bit so that they don't |
| 2743 | * all fall in the same interrupt level. |
| 2744 | * |
| 2745 | * Also, we've got to be careful not to trash gate |
| 2746 | * 0x80, because int 0x80 is hm, kind of importantish. ;) |
| 2747 | */ |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2748 | for_each_irq_desc(irq, desc) { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2749 | cfg = desc->chip_data; |
| 2750 | if (IO_APIC_IRQ(irq) && cfg && !cfg->vector) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2751 | /* |
| 2752 | * Hmm.. We don't have an entry for this, |
| 2753 | * so default to an old-fashioned 8259 |
| 2754 | * interrupt if we can.. |
| 2755 | */ |
Yinghai Lu | 99d093d | 2008-12-05 18:58:32 -0800 | [diff] [blame] | 2756 | if (irq < NR_IRQS_LEGACY) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2757 | make_8259A_irq(irq); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2758 | else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2759 | /* Strange. Oh, well.. */ |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 2760 | desc->chip = &no_irq_chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2761 | } |
| 2762 | } |
| 2763 | } |
| 2764 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2765 | /* |
| 2766 | * The local APIC irq-chip implementation: |
| 2767 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2768 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2769 | static void mask_lapic_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2770 | { |
| 2771 | unsigned long v; |
| 2772 | |
| 2773 | v = apic_read(APIC_LVT0); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 2774 | apic_write(APIC_LVT0, v | APIC_LVT_MASKED); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2775 | } |
| 2776 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2777 | static void unmask_lapic_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2778 | { |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2779 | unsigned long v; |
| 2780 | |
| 2781 | v = apic_read(APIC_LVT0); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 2782 | apic_write(APIC_LVT0, v & ~APIC_LVT_MASKED); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2783 | } |
| 2784 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2785 | static void ack_lapic_irq(unsigned int irq) |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2786 | { |
| 2787 | ack_APIC_irq(); |
| 2788 | } |
| 2789 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2790 | static struct irq_chip lapic_chip __read_mostly = { |
Maciej W. Rozycki | 9a1c619 | 2008-05-27 21:19:09 +0100 | [diff] [blame] | 2791 | .name = "local-APIC", |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2792 | .mask = mask_lapic_irq, |
| 2793 | .unmask = unmask_lapic_irq, |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2794 | .ack = ack_lapic_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2795 | }; |
| 2796 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2797 | static void lapic_register_intr(int irq, struct irq_desc *desc) |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2798 | { |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 2799 | desc->status &= ~IRQ_LEVEL; |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2800 | set_irq_chip_and_handler_name(irq, &lapic_chip, handle_edge_irq, |
| 2801 | "edge"); |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2802 | } |
| 2803 | |
Jan Beulich | e942710 | 2008-01-30 13:31:24 +0100 | [diff] [blame] | 2804 | static void __init setup_nmi(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2805 | { |
| 2806 | /* |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2807 | * Dirty trick to enable the NMI watchdog ... |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2808 | * We put the 8259A master into AEOI mode and |
| 2809 | * unmask on all local APICs LVT0 as NMI. |
| 2810 | * |
| 2811 | * The idea to use the 8259A in AEOI mode ('8259A Virtual Wire') |
| 2812 | * is from Maciej W. Rozycki - so we do not have to EOI from |
| 2813 | * the NMI handler or the timer interrupt. |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2814 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2815 | apic_printk(APIC_VERBOSE, KERN_INFO "activating NMI Watchdog ..."); |
| 2816 | |
Jan Beulich | e942710 | 2008-01-30 13:31:24 +0100 | [diff] [blame] | 2817 | enable_NMI_through_LVT0(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2818 | |
| 2819 | apic_printk(APIC_VERBOSE, " done.\n"); |
| 2820 | } |
| 2821 | |
| 2822 | /* |
| 2823 | * This looks a bit hackish but it's about the only one way of sending |
| 2824 | * a few INTA cycles to 8259As and any associated glue logic. ICR does |
| 2825 | * not support the ExtINT mode, unfortunately. We need to send these |
| 2826 | * cycles as some i82489DX-based boards have glue logic that keeps the |
| 2827 | * 8259A interrupt line asserted until INTA. --macro |
| 2828 | */ |
Jacek Luczak | 28acf28 | 2008-04-12 17:41:12 +0200 | [diff] [blame] | 2829 | static inline void __init unlock_ExtINT_logic(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2830 | { |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2831 | int apic, pin, i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2832 | struct IO_APIC_route_entry entry0, entry1; |
| 2833 | unsigned char save_control, save_freq_select; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2834 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2835 | pin = find_isa_irq_pin(8, mp_INT); |
Adrian Bunk | 956fb53 | 2006-12-07 02:14:11 +0100 | [diff] [blame] | 2836 | if (pin == -1) { |
| 2837 | WARN_ON_ONCE(1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2838 | return; |
Adrian Bunk | 956fb53 | 2006-12-07 02:14:11 +0100 | [diff] [blame] | 2839 | } |
| 2840 | apic = find_isa_irq_apic(8, mp_INT); |
| 2841 | if (apic == -1) { |
| 2842 | WARN_ON_ONCE(1); |
| 2843 | return; |
| 2844 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2845 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2846 | entry0 = ioapic_read_entry(apic, pin); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2847 | clear_IO_APIC_pin(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2848 | |
| 2849 | memset(&entry1, 0, sizeof(entry1)); |
| 2850 | |
| 2851 | entry1.dest_mode = 0; /* physical delivery */ |
| 2852 | entry1.mask = 0; /* unmask IRQ now */ |
Yinghai Lu | d83e94a | 2008-08-19 20:50:33 -0700 | [diff] [blame] | 2853 | entry1.dest = hard_smp_processor_id(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2854 | entry1.delivery_mode = dest_ExtINT; |
| 2855 | entry1.polarity = entry0.polarity; |
| 2856 | entry1.trigger = 0; |
| 2857 | entry1.vector = 0; |
| 2858 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2859 | ioapic_write_entry(apic, pin, entry1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2860 | |
| 2861 | save_control = CMOS_READ(RTC_CONTROL); |
| 2862 | save_freq_select = CMOS_READ(RTC_FREQ_SELECT); |
| 2863 | CMOS_WRITE((save_freq_select & ~RTC_RATE_SELECT) | 0x6, |
| 2864 | RTC_FREQ_SELECT); |
| 2865 | CMOS_WRITE(save_control | RTC_PIE, RTC_CONTROL); |
| 2866 | |
| 2867 | i = 100; |
| 2868 | while (i-- > 0) { |
| 2869 | mdelay(10); |
| 2870 | if ((CMOS_READ(RTC_INTR_FLAGS) & RTC_PF) == RTC_PF) |
| 2871 | i -= 10; |
| 2872 | } |
| 2873 | |
| 2874 | CMOS_WRITE(save_control, RTC_CONTROL); |
| 2875 | CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2876 | clear_IO_APIC_pin(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2877 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2878 | ioapic_write_entry(apic, pin, entry0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2879 | } |
| 2880 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 2881 | static int disable_timer_pin_1 __initdata; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2882 | /* Actually the next is obsolete, but keep it for paranoid reasons -AK */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2883 | static int __init disable_timer_pin_setup(char *arg) |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 2884 | { |
| 2885 | disable_timer_pin_1 = 1; |
| 2886 | return 0; |
| 2887 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2888 | early_param("disable_timer_pin_1", disable_timer_pin_setup); |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 2889 | |
| 2890 | int timer_through_8259 __initdata; |
| 2891 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2892 | /* |
| 2893 | * This code may look a bit paranoid, but it's supposed to cooperate with |
| 2894 | * a wide range of boards and BIOS bugs. Fortunately only the timer IRQ |
| 2895 | * is so screwy. Thanks to Brian Perkins for testing/hacking this beast |
| 2896 | * fanatically on his truly buggy board. |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2897 | * |
| 2898 | * FIXME: really need to revamp this for all platforms. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2899 | */ |
Zachary Amsden | 8542b20 | 2006-12-07 02:14:09 +0100 | [diff] [blame] | 2900 | static inline void __init check_timer(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2901 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2902 | struct irq_desc *desc = irq_to_desc(0); |
| 2903 | struct irq_cfg *cfg = desc->chip_data; |
| 2904 | int cpu = boot_cpu_id; |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2905 | int apic1, pin1, apic2, pin2; |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2906 | unsigned long flags; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2907 | int no_pin1 = 0; |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2908 | |
| 2909 | local_irq_save(flags); |
Maciej W. Rozycki | d4d25de | 2007-11-26 20:42:19 +0100 | [diff] [blame] | 2910 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2911 | /* |
| 2912 | * get/set the timer IRQ vector: |
| 2913 | */ |
| 2914 | disable_8259A_irq(0); |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 2915 | assign_irq_vector(0, cfg, apic->target_cpus()); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2916 | |
| 2917 | /* |
Maciej W. Rozycki | d11d579 | 2008-05-21 22:09:11 +0100 | [diff] [blame] | 2918 | * As IRQ0 is to be enabled in the 8259A, the virtual |
| 2919 | * wire has to be disabled in the local APIC. Also |
| 2920 | * timer interrupts need to be acknowledged manually in |
| 2921 | * the 8259A for the i82489DX when using the NMI |
| 2922 | * watchdog as that APIC treats NMIs as level-triggered. |
| 2923 | * The AEOI mode will finish them in the 8259A |
| 2924 | * automatically. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2925 | */ |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 2926 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2927 | init_8259A(1); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2928 | #ifdef CONFIG_X86_32 |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 2929 | { |
| 2930 | unsigned int ver; |
| 2931 | |
| 2932 | ver = apic_read(APIC_LVR); |
| 2933 | ver = GET_APIC_VERSION(ver); |
| 2934 | timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver)); |
| 2935 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2936 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2937 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2938 | pin1 = find_isa_irq_pin(0, mp_INT); |
| 2939 | apic1 = find_isa_irq_apic(0, mp_INT); |
| 2940 | pin2 = ioapic_i8259.pin; |
| 2941 | apic2 = ioapic_i8259.apic; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2942 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2943 | apic_printk(APIC_QUIET, KERN_INFO "..TIMER: vector=0x%02X " |
| 2944 | "apic1=%d pin1=%d apic2=%d pin2=%d\n", |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2945 | cfg->vector, apic1, pin1, apic2, pin2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2946 | |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2947 | /* |
| 2948 | * Some BIOS writers are clueless and report the ExtINTA |
| 2949 | * I/O APIC input from the cascaded 8259A as the timer |
| 2950 | * interrupt input. So just in case, if only one pin |
| 2951 | * was found above, try it both directly and through the |
| 2952 | * 8259A. |
| 2953 | */ |
| 2954 | if (pin1 == -1) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2955 | if (intr_remapping_enabled) |
| 2956 | panic("BIOS bug: timer not connected to IO-APIC"); |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2957 | pin1 = pin2; |
| 2958 | apic1 = apic2; |
| 2959 | no_pin1 = 1; |
| 2960 | } else if (pin2 == -1) { |
| 2961 | pin2 = pin1; |
| 2962 | apic2 = apic1; |
| 2963 | } |
| 2964 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2965 | if (pin1 != -1) { |
| 2966 | /* |
| 2967 | * Ok, does IRQ0 through the IOAPIC work? |
| 2968 | */ |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2969 | if (no_pin1) { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2970 | add_pin_to_irq_cpu(cfg, cpu, apic1, pin1); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2971 | setup_timer_IRQ0_pin(apic1, pin1, cfg->vector); |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 2972 | } else { |
| 2973 | /* for edge trigger, setup_IO_APIC_irq already |
| 2974 | * leave it unmasked. |
| 2975 | * so only need to unmask if it is level-trigger |
| 2976 | * do we really have level trigger timer? |
| 2977 | */ |
| 2978 | int idx; |
| 2979 | idx = find_irq_entry(apic1, pin1, mp_INT); |
| 2980 | if (idx != -1 && irq_trigger(idx)) |
| 2981 | unmask_IO_APIC_irq_desc(desc); |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2982 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2983 | if (timer_irq_works()) { |
| 2984 | if (nmi_watchdog == NMI_IO_APIC) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2985 | setup_nmi(); |
| 2986 | enable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2987 | } |
Chuck Ebbert | 66759a0 | 2005-09-12 18:49:25 +0200 | [diff] [blame] | 2988 | if (disable_timer_pin_1 > 0) |
| 2989 | clear_IO_APIC_pin(0, pin1); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2990 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2991 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2992 | if (intr_remapping_enabled) |
| 2993 | panic("timer doesn't work through Interrupt-remapped IO-APIC"); |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 2994 | local_irq_disable(); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2995 | clear_IO_APIC_pin(apic1, pin1); |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2996 | if (!no_pin1) |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2997 | apic_printk(APIC_QUIET, KERN_ERR "..MP-BIOS bug: " |
| 2998 | "8254 timer not connected to IO-APIC\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2999 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3000 | apic_printk(APIC_QUIET, KERN_INFO "...trying to set up timer " |
| 3001 | "(IRQ0) through the 8259A ...\n"); |
| 3002 | apic_printk(APIC_QUIET, KERN_INFO |
| 3003 | "..... (found apic %d pin %d) ...\n", apic2, pin2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3004 | /* |
| 3005 | * legacy devices should be connected to IO APIC #0 |
| 3006 | */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3007 | replace_pin_at_irq_cpu(cfg, cpu, apic1, pin1, apic2, pin2); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3008 | setup_timer_IRQ0_pin(apic2, pin2, cfg->vector); |
Maciej W. Rozycki | ecd2947 | 2008-05-21 22:09:19 +0100 | [diff] [blame] | 3009 | enable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3010 | if (timer_irq_works()) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3011 | apic_printk(APIC_QUIET, KERN_INFO "....... works.\n"); |
Maciej W. Rozycki | 35542c5 | 2008-05-21 22:10:22 +0100 | [diff] [blame] | 3012 | timer_through_8259 = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3013 | if (nmi_watchdog == NMI_IO_APIC) { |
Maciej W. Rozycki | 60134eb | 2008-05-21 22:09:34 +0100 | [diff] [blame] | 3014 | disable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3015 | setup_nmi(); |
Maciej W. Rozycki | 60134eb | 2008-05-21 22:09:34 +0100 | [diff] [blame] | 3016 | enable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3017 | } |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 3018 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3019 | } |
| 3020 | /* |
| 3021 | * Cleanup, just in case ... |
| 3022 | */ |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3023 | local_irq_disable(); |
Maciej W. Rozycki | ecd2947 | 2008-05-21 22:09:19 +0100 | [diff] [blame] | 3024 | disable_8259A_irq(0); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 3025 | clear_IO_APIC_pin(apic2, pin2); |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3026 | apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3027 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3028 | |
| 3029 | if (nmi_watchdog == NMI_IO_APIC) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3030 | apic_printk(APIC_QUIET, KERN_WARNING "timer doesn't work " |
| 3031 | "through the IO-APIC - disabling NMI Watchdog!\n"); |
Cyrill Gorcunov | 067fa0f | 2008-05-29 22:32:30 +0400 | [diff] [blame] | 3032 | nmi_watchdog = NMI_NONE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3033 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3034 | #ifdef CONFIG_X86_32 |
Maciej W. Rozycki | d11d579 | 2008-05-21 22:09:11 +0100 | [diff] [blame] | 3035 | timer_ack = 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3036 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3037 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3038 | apic_printk(APIC_QUIET, KERN_INFO |
| 3039 | "...trying to set up timer as Virtual Wire IRQ...\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3040 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3041 | lapic_register_intr(0, desc); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3042 | apic_write(APIC_LVT0, APIC_DM_FIXED | cfg->vector); /* Fixed mode */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3043 | enable_8259A_irq(0); |
| 3044 | |
| 3045 | if (timer_irq_works()) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3046 | apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 3047 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3048 | } |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3049 | local_irq_disable(); |
Maciej W. Rozycki | e67465f | 2008-05-21 22:09:26 +0100 | [diff] [blame] | 3050 | disable_8259A_irq(0); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3051 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector); |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3052 | apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3053 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3054 | apic_printk(APIC_QUIET, KERN_INFO |
| 3055 | "...trying to set up timer as ExtINT IRQ...\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3056 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3057 | init_8259A(0); |
| 3058 | make_8259A_irq(0); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 3059 | apic_write(APIC_LVT0, APIC_DM_EXTINT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3060 | |
| 3061 | unlock_ExtINT_logic(); |
| 3062 | |
| 3063 | if (timer_irq_works()) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3064 | apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 3065 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3066 | } |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3067 | local_irq_disable(); |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3068 | apic_printk(APIC_QUIET, KERN_INFO "..... failed :(.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3069 | panic("IO-APIC + timer doesn't work! Boot with apic=debug and send a " |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3070 | "report. Then try booting with the 'noapic' option.\n"); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 3071 | out: |
| 3072 | local_irq_restore(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3073 | } |
| 3074 | |
| 3075 | /* |
Maciej W. Rozycki | af17478 | 2008-07-11 19:35:23 +0100 | [diff] [blame] | 3076 | * Traditionally ISA IRQ2 is the cascade IRQ, and is not available |
| 3077 | * to devices. However there may be an I/O APIC pin available for |
| 3078 | * this interrupt regardless. The pin may be left unconnected, but |
| 3079 | * typically it will be reused as an ExtINT cascade interrupt for |
| 3080 | * the master 8259A. In the MPS case such a pin will normally be |
| 3081 | * reported as an ExtINT interrupt in the MP table. With ACPI |
| 3082 | * there is no provision for ExtINT interrupts, and in the absence |
| 3083 | * of an override it would be treated as an ordinary ISA I/O APIC |
| 3084 | * interrupt, that is edge-triggered and unmasked by default. We |
| 3085 | * used to do this, but it caused problems on some systems because |
| 3086 | * of the NMI watchdog and sometimes IRQ0 of the 8254 timer using |
| 3087 | * the same ExtINT cascade interrupt to drive the local APIC of the |
| 3088 | * bootstrap processor. Therefore we refrain from routing IRQ2 to |
| 3089 | * the I/O APIC in all cases now. No actual device should request |
| 3090 | * it anyway. --macro |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3091 | */ |
| 3092 | #define PIC_IRQS (1 << PIC_CASCADE_IR) |
| 3093 | |
| 3094 | void __init setup_IO_APIC(void) |
| 3095 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3096 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3097 | /* |
| 3098 | * calling enable_IO_APIC() is moved to setup_local_APIC for BP |
| 3099 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3100 | |
Maciej W. Rozycki | af17478 | 2008-07-11 19:35:23 +0100 | [diff] [blame] | 3101 | io_apic_irqs = ~PIC_IRQS; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3102 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3103 | apic_printk(APIC_VERBOSE, "ENABLING IO-APIC IRQs\n"); |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 3104 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3105 | * Set up IO-APIC IRQ routing. |
| 3106 | */ |
| 3107 | #ifdef CONFIG_X86_32 |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 3108 | if (!acpi_ioapic) |
| 3109 | setup_ioapic_ids_from_mpc(); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3110 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3111 | sync_Arb_IDs(); |
| 3112 | setup_IO_APIC_irqs(); |
| 3113 | init_IO_APIC_traps(); |
Linus Torvalds | 1e4c85f | 2005-10-31 19:16:17 -0800 | [diff] [blame] | 3114 | check_timer(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3115 | } |
| 3116 | |
| 3117 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3118 | * Called after all the initialization is done. If we didnt find any |
| 3119 | * APIC bugs then we can allow the modify fast path |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3120 | */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3121 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3122 | static int __init io_apic_bug_finalize(void) |
| 3123 | { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 3124 | if (sis_apic_bug == -1) |
| 3125 | sis_apic_bug = 0; |
| 3126 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3127 | } |
| 3128 | |
| 3129 | late_initcall(io_apic_bug_finalize); |
| 3130 | |
| 3131 | struct sysfs_ioapic_data { |
| 3132 | struct sys_device dev; |
| 3133 | struct IO_APIC_route_entry entry[0]; |
| 3134 | }; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3135 | static struct sysfs_ioapic_data * mp_ioapic_data[MAX_IO_APICS]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3136 | |
Pavel Machek | 438510f | 2005-04-16 15:25:24 -0700 | [diff] [blame] | 3137 | static int ioapic_suspend(struct sys_device *dev, pm_message_t state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3138 | { |
| 3139 | struct IO_APIC_route_entry *entry; |
| 3140 | struct sysfs_ioapic_data *data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3141 | int i; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3142 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3143 | data = container_of(dev, struct sysfs_ioapic_data, dev); |
| 3144 | entry = data->entry; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3145 | for (i = 0; i < nr_ioapic_registers[dev->id]; i ++, entry ++ ) |
| 3146 | *entry = ioapic_read_entry(dev->id, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3147 | |
| 3148 | return 0; |
| 3149 | } |
| 3150 | |
| 3151 | static int ioapic_resume(struct sys_device *dev) |
| 3152 | { |
| 3153 | struct IO_APIC_route_entry *entry; |
| 3154 | struct sysfs_ioapic_data *data; |
| 3155 | unsigned long flags; |
| 3156 | union IO_APIC_reg_00 reg_00; |
| 3157 | int i; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3158 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3159 | data = container_of(dev, struct sysfs_ioapic_data, dev); |
| 3160 | entry = data->entry; |
| 3161 | |
| 3162 | spin_lock_irqsave(&ioapic_lock, flags); |
| 3163 | reg_00.raw = io_apic_read(dev->id, 0); |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 3164 | if (reg_00.bits.ID != mp_ioapics[dev->id].apicid) { |
| 3165 | reg_00.bits.ID = mp_ioapics[dev->id].apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3166 | io_apic_write(dev->id, 0, reg_00.raw); |
| 3167 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3168 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3169 | for (i = 0; i < nr_ioapic_registers[dev->id]; i++) |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 3170 | ioapic_write_entry(dev->id, i, entry[i]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3171 | |
| 3172 | return 0; |
| 3173 | } |
| 3174 | |
| 3175 | static struct sysdev_class ioapic_sysdev_class = { |
Kay Sievers | af5ca3f | 2007-12-20 02:09:39 +0100 | [diff] [blame] | 3176 | .name = "ioapic", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3177 | .suspend = ioapic_suspend, |
| 3178 | .resume = ioapic_resume, |
| 3179 | }; |
| 3180 | |
| 3181 | static int __init ioapic_init_sysfs(void) |
| 3182 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3183 | struct sys_device * dev; |
| 3184 | int i, size, error; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3185 | |
| 3186 | error = sysdev_class_register(&ioapic_sysdev_class); |
| 3187 | if (error) |
| 3188 | return error; |
| 3189 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3190 | for (i = 0; i < nr_ioapics; i++ ) { |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3191 | size = sizeof(struct sys_device) + nr_ioapic_registers[i] |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3192 | * sizeof(struct IO_APIC_route_entry); |
Christophe Jaillet | 25556c1 | 2008-06-22 22:13:48 +0200 | [diff] [blame] | 3193 | mp_ioapic_data[i] = kzalloc(size, GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3194 | if (!mp_ioapic_data[i]) { |
| 3195 | printk(KERN_ERR "Can't suspend/resume IOAPIC %d\n", i); |
| 3196 | continue; |
| 3197 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3198 | dev = &mp_ioapic_data[i]->dev; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3199 | dev->id = i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3200 | dev->cls = &ioapic_sysdev_class; |
| 3201 | error = sysdev_register(dev); |
| 3202 | if (error) { |
| 3203 | kfree(mp_ioapic_data[i]); |
| 3204 | mp_ioapic_data[i] = NULL; |
| 3205 | printk(KERN_ERR "Can't suspend/resume IOAPIC %d\n", i); |
| 3206 | continue; |
| 3207 | } |
| 3208 | } |
| 3209 | |
| 3210 | return 0; |
| 3211 | } |
| 3212 | |
| 3213 | device_initcall(ioapic_init_sysfs); |
| 3214 | |
Yinghai Lu | abcaa2b | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3215 | static int nr_irqs_gsi = NR_IRQS_LEGACY; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3216 | /* |
Eric W. Biederman | 95d7788 | 2006-10-04 02:17:01 -0700 | [diff] [blame] | 3217 | * Dynamic irq allocate and deallocation |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3218 | */ |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3219 | unsigned int create_irq_nr(unsigned int irq_want) |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3220 | { |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 3221 | /* Allocate an unused irq */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3222 | unsigned int irq; |
| 3223 | unsigned int new; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3224 | unsigned long flags; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3225 | struct irq_cfg *cfg_new = NULL; |
| 3226 | int cpu = boot_cpu_id; |
| 3227 | struct irq_desc *desc_new = NULL; |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3228 | |
| 3229 | irq = 0; |
Yinghai Lu | abcaa2b | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3230 | if (irq_want < nr_irqs_gsi) |
| 3231 | irq_want = nr_irqs_gsi; |
| 3232 | |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 3233 | spin_lock_irqsave(&vector_lock, flags); |
Mike Travis | 9594949 | 2009-01-10 22:24:06 -0800 | [diff] [blame] | 3234 | for (new = irq_want; new < nr_irqs; new++) { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3235 | desc_new = irq_to_desc_alloc_cpu(new, cpu); |
| 3236 | if (!desc_new) { |
| 3237 | printk(KERN_INFO "can not get irq_desc for %d\n", new); |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 3238 | continue; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3239 | } |
| 3240 | cfg_new = desc_new->chip_data; |
| 3241 | |
| 3242 | if (cfg_new->vector != 0) |
| 3243 | continue; |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 3244 | if (__assign_irq_vector(new, cfg_new, apic->target_cpus()) == 0) |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 3245 | irq = new; |
| 3246 | break; |
| 3247 | } |
| 3248 | spin_unlock_irqrestore(&vector_lock, flags); |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3249 | |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3250 | if (irq > 0) { |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3251 | dynamic_irq_init(irq); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3252 | /* restore it, in case dynamic_irq_init clear it */ |
| 3253 | if (desc_new) |
| 3254 | desc_new->chip_data = cfg_new; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3255 | } |
| 3256 | return irq; |
| 3257 | } |
| 3258 | |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3259 | int create_irq(void) |
| 3260 | { |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3261 | unsigned int irq_want; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3262 | int irq; |
| 3263 | |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3264 | irq_want = nr_irqs_gsi; |
| 3265 | irq = create_irq_nr(irq_want); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3266 | |
| 3267 | if (irq == 0) |
| 3268 | irq = -1; |
| 3269 | |
| 3270 | return irq; |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3271 | } |
| 3272 | |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3273 | void destroy_irq(unsigned int irq) |
| 3274 | { |
| 3275 | unsigned long flags; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3276 | struct irq_cfg *cfg; |
| 3277 | struct irq_desc *desc; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3278 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3279 | /* store it, in case dynamic_irq_cleanup clear it */ |
| 3280 | desc = irq_to_desc(irq); |
| 3281 | cfg = desc->chip_data; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3282 | dynamic_irq_cleanup(irq); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3283 | /* connect back irq_cfg */ |
| 3284 | if (desc) |
| 3285 | desc->chip_data = cfg; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3286 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3287 | free_irte(irq); |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3288 | spin_lock_irqsave(&vector_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3289 | __clear_irq_vector(irq, cfg); |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3290 | spin_unlock_irqrestore(&vector_lock, flags); |
| 3291 | } |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3292 | |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3293 | /* |
Simon Arlott | 27b46d7 | 2007-10-20 01:13:56 +0200 | [diff] [blame] | 3294 | * MSI message composition |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3295 | */ |
| 3296 | #ifdef CONFIG_PCI_MSI |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3297 | static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg) |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3298 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3299 | struct irq_cfg *cfg; |
| 3300 | int err; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3301 | unsigned dest; |
| 3302 | |
Jan Beulich | f118263 | 2009-01-14 12:27:35 +0000 | [diff] [blame] | 3303 | if (disable_apic) |
| 3304 | return -ENXIO; |
| 3305 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3306 | cfg = irq_cfg(irq); |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 3307 | err = assign_irq_vector(irq, cfg, apic->target_cpus()); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3308 | if (err) |
| 3309 | return err; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3310 | |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 3311 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus()); |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3312 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3313 | if (irq_remapped(irq)) { |
| 3314 | struct irte irte; |
| 3315 | int ir_index; |
| 3316 | u16 sub_handle; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3317 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3318 | ir_index = map_irq_to_irte_handle(irq, &sub_handle); |
| 3319 | BUG_ON(ir_index == -1); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3320 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3321 | memset (&irte, 0, sizeof(irte)); |
| 3322 | |
| 3323 | irte.present = 1; |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3324 | irte.dst_mode = apic->irq_dest_mode; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3325 | irte.trigger_mode = 0; /* edge */ |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3326 | irte.dlvry_mode = apic->irq_delivery_mode; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3327 | irte.vector = cfg->vector; |
| 3328 | irte.dest_id = IRTE_DEST(dest); |
| 3329 | |
| 3330 | modify_irte(irq, &irte); |
| 3331 | |
| 3332 | msg->address_hi = MSI_ADDR_BASE_HI; |
| 3333 | msg->data = sub_handle; |
| 3334 | msg->address_lo = MSI_ADDR_BASE_LO | MSI_ADDR_IR_EXT_INT | |
| 3335 | MSI_ADDR_IR_SHV | |
| 3336 | MSI_ADDR_IR_INDEX1(ir_index) | |
| 3337 | MSI_ADDR_IR_INDEX2(ir_index); |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 3338 | } else { |
Suresh Siddha | 9d783ba | 2009-03-16 17:04:55 -0700 | [diff] [blame] | 3339 | if (x2apic_enabled()) |
| 3340 | msg->address_hi = MSI_ADDR_BASE_HI | |
| 3341 | MSI_ADDR_EXT_DEST_ID(dest); |
| 3342 | else |
| 3343 | msg->address_hi = MSI_ADDR_BASE_HI; |
| 3344 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3345 | msg->address_lo = |
| 3346 | MSI_ADDR_BASE_LO | |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3347 | ((apic->irq_dest_mode == 0) ? |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3348 | MSI_ADDR_DEST_MODE_PHYSICAL: |
| 3349 | MSI_ADDR_DEST_MODE_LOGICAL) | |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3350 | ((apic->irq_delivery_mode != dest_LowestPrio) ? |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3351 | MSI_ADDR_REDIRECTION_CPU: |
| 3352 | MSI_ADDR_REDIRECTION_LOWPRI) | |
| 3353 | MSI_ADDR_DEST_ID(dest); |
| 3354 | |
| 3355 | msg->data = |
| 3356 | MSI_DATA_TRIGGER_EDGE | |
| 3357 | MSI_DATA_LEVEL_ASSERT | |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3358 | ((apic->irq_delivery_mode != dest_LowestPrio) ? |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3359 | MSI_DATA_DELIVERY_FIXED: |
| 3360 | MSI_DATA_DELIVERY_LOWPRI) | |
| 3361 | MSI_DATA_VECTOR(cfg->vector); |
| 3362 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3363 | return err; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3364 | } |
| 3365 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3366 | #ifdef CONFIG_SMP |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3367 | static void set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3368 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3369 | struct irq_desc *desc = irq_to_desc(irq); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3370 | struct irq_cfg *cfg; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3371 | struct msi_msg msg; |
| 3372 | unsigned int dest; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3373 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3374 | dest = set_desc_affinity(desc, mask); |
| 3375 | if (dest == BAD_APICID) |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3376 | return; |
| 3377 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3378 | cfg = desc->chip_data; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3379 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3380 | read_msi_msg_desc(desc, &msg); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3381 | |
| 3382 | msg.data &= ~MSI_DATA_VECTOR_MASK; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3383 | msg.data |= MSI_DATA_VECTOR(cfg->vector); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3384 | msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; |
| 3385 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
| 3386 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3387 | write_msi_msg_desc(desc, &msg); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3388 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3389 | #ifdef CONFIG_INTR_REMAP |
| 3390 | /* |
| 3391 | * Migrate the MSI irq to another cpumask. This migration is |
| 3392 | * done in the process context using interrupt-remapping hardware. |
| 3393 | */ |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 3394 | static void |
| 3395 | ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3396 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3397 | struct irq_desc *desc = irq_to_desc(irq); |
Ingo Molnar | a7883de | 2008-12-19 00:59:09 +0100 | [diff] [blame] | 3398 | struct irq_cfg *cfg = desc->chip_data; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3399 | unsigned int dest; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3400 | struct irte irte; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3401 | |
| 3402 | if (get_irte(irq, &irte)) |
| 3403 | return; |
| 3404 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3405 | dest = set_desc_affinity(desc, mask); |
| 3406 | if (dest == BAD_APICID) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3407 | return; |
| 3408 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3409 | irte.vector = cfg->vector; |
| 3410 | irte.dest_id = IRTE_DEST(dest); |
| 3411 | |
| 3412 | /* |
| 3413 | * atomically update the IRTE with the new destination and vector. |
| 3414 | */ |
| 3415 | modify_irte(irq, &irte); |
| 3416 | |
| 3417 | /* |
| 3418 | * After this point, all the interrupts will start arriving |
| 3419 | * at the new destination. So, time to cleanup the previous |
| 3420 | * vector allocation. |
| 3421 | */ |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3422 | if (cfg->move_in_progress) |
| 3423 | send_cleanup_vector(cfg); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3424 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3425 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3426 | #endif |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3427 | #endif /* CONFIG_SMP */ |
| 3428 | |
| 3429 | /* |
| 3430 | * IRQ Chip for MSI PCI/PCI-X/PCI-Express Devices, |
| 3431 | * which implement the MSI or MSI-X Capability Structure. |
| 3432 | */ |
| 3433 | static struct irq_chip msi_chip = { |
| 3434 | .name = "PCI-MSI", |
| 3435 | .unmask = unmask_msi_irq, |
| 3436 | .mask = mask_msi_irq, |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3437 | .ack = ack_apic_edge, |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3438 | #ifdef CONFIG_SMP |
| 3439 | .set_affinity = set_msi_irq_affinity, |
| 3440 | #endif |
| 3441 | .retrigger = ioapic_retrigger_irq, |
| 3442 | }; |
| 3443 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3444 | static struct irq_chip msi_ir_chip = { |
| 3445 | .name = "IR-PCI-MSI", |
| 3446 | .unmask = unmask_msi_irq, |
| 3447 | .mask = mask_msi_irq, |
Jaswinder Singh Rajput | a1e38ca | 2009-03-23 02:11:25 +0530 | [diff] [blame] | 3448 | #ifdef CONFIG_INTR_REMAP |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 3449 | .ack = ir_ack_apic_edge, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3450 | #ifdef CONFIG_SMP |
| 3451 | .set_affinity = ir_set_msi_irq_affinity, |
| 3452 | #endif |
Jaswinder Singh Rajput | a1e38ca | 2009-03-23 02:11:25 +0530 | [diff] [blame] | 3453 | #endif |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3454 | .retrigger = ioapic_retrigger_irq, |
| 3455 | }; |
| 3456 | |
| 3457 | /* |
| 3458 | * Map the PCI dev to the corresponding remapping hardware unit |
| 3459 | * and allocate 'nvec' consecutive interrupt-remapping table entries |
| 3460 | * in it. |
| 3461 | */ |
| 3462 | static int msi_alloc_irte(struct pci_dev *dev, int irq, int nvec) |
| 3463 | { |
| 3464 | struct intel_iommu *iommu; |
| 3465 | int index; |
| 3466 | |
| 3467 | iommu = map_dev_to_ir(dev); |
| 3468 | if (!iommu) { |
| 3469 | printk(KERN_ERR |
| 3470 | "Unable to map PCI %s to iommu\n", pci_name(dev)); |
| 3471 | return -ENOENT; |
| 3472 | } |
| 3473 | |
| 3474 | index = alloc_irte(iommu, irq, nvec); |
| 3475 | if (index < 0) { |
| 3476 | printk(KERN_ERR |
| 3477 | "Unable to allocate %d IRTE for PCI %s\n", nvec, |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 3478 | pci_name(dev)); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3479 | return -ENOSPC; |
| 3480 | } |
| 3481 | return index; |
| 3482 | } |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3483 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3484 | static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq) |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3485 | { |
| 3486 | int ret; |
| 3487 | struct msi_msg msg; |
| 3488 | |
| 3489 | ret = msi_compose_msg(dev, irq, &msg); |
| 3490 | if (ret < 0) |
| 3491 | return ret; |
| 3492 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3493 | set_irq_msi(irq, msidesc); |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3494 | write_msi_msg(irq, &msg); |
| 3495 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3496 | if (irq_remapped(irq)) { |
| 3497 | struct irq_desc *desc = irq_to_desc(irq); |
| 3498 | /* |
| 3499 | * irq migration in process context |
| 3500 | */ |
| 3501 | desc->status |= IRQ_MOVE_PCNTXT; |
| 3502 | set_irq_chip_and_handler_name(irq, &msi_ir_chip, handle_edge_irq, "edge"); |
| 3503 | } else |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3504 | set_irq_chip_and_handler_name(irq, &msi_chip, handle_edge_irq, "edge"); |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3505 | |
Yinghai Lu | c81bba4 | 2008-09-25 11:53:11 -0700 | [diff] [blame] | 3506 | dev_printk(KERN_DEBUG, &dev->dev, "irq %d for MSI/MSI-X\n", irq); |
| 3507 | |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3508 | return 0; |
| 3509 | } |
| 3510 | |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 3511 | int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) |
| 3512 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3513 | unsigned int irq; |
| 3514 | int ret, sub_handle; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3515 | struct msi_desc *msidesc; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3516 | unsigned int irq_want; |
Dmitri Vorobiev | 1cc1852 | 2009-03-22 19:11:09 +0200 | [diff] [blame] | 3517 | struct intel_iommu *iommu = NULL; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3518 | int index = 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3519 | |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 3520 | /* x86 doesn't support multiple MSI yet */ |
| 3521 | if (type == PCI_CAP_ID_MSI && nvec > 1) |
| 3522 | return 1; |
| 3523 | |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3524 | irq_want = nr_irqs_gsi; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3525 | sub_handle = 0; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3526 | list_for_each_entry(msidesc, &dev->msi_list, list) { |
| 3527 | irq = create_irq_nr(irq_want); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3528 | if (irq == 0) |
| 3529 | return -1; |
Yinghai Lu | f1ee554 | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3530 | irq_want = irq + 1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3531 | if (!intr_remapping_enabled) |
| 3532 | goto no_ir; |
| 3533 | |
| 3534 | if (!sub_handle) { |
| 3535 | /* |
| 3536 | * allocate the consecutive block of IRTE's |
| 3537 | * for 'nvec' |
| 3538 | */ |
| 3539 | index = msi_alloc_irte(dev, irq, nvec); |
| 3540 | if (index < 0) { |
| 3541 | ret = index; |
| 3542 | goto error; |
| 3543 | } |
| 3544 | } else { |
| 3545 | iommu = map_dev_to_ir(dev); |
| 3546 | if (!iommu) { |
| 3547 | ret = -ENOENT; |
| 3548 | goto error; |
| 3549 | } |
| 3550 | /* |
| 3551 | * setup the mapping between the irq and the IRTE |
| 3552 | * base index, the sub_handle pointing to the |
| 3553 | * appropriate interrupt remap table entry. |
| 3554 | */ |
| 3555 | set_irte_irq(irq, iommu, index, sub_handle); |
| 3556 | } |
| 3557 | no_ir: |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3558 | ret = setup_msi_irq(dev, msidesc, irq); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3559 | if (ret < 0) |
| 3560 | goto error; |
| 3561 | sub_handle++; |
| 3562 | } |
| 3563 | return 0; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 3564 | |
| 3565 | error: |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3566 | destroy_irq(irq); |
| 3567 | return ret; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 3568 | } |
| 3569 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3570 | void arch_teardown_msi_irq(unsigned int irq) |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3571 | { |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 3572 | destroy_irq(irq); |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3573 | } |
| 3574 | |
Suresh Siddha | 9d783ba | 2009-03-16 17:04:55 -0700 | [diff] [blame] | 3575 | #if defined (CONFIG_DMAR) || defined (CONFIG_INTR_REMAP) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3576 | #ifdef CONFIG_SMP |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3577 | static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3578 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3579 | struct irq_desc *desc = irq_to_desc(irq); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3580 | struct irq_cfg *cfg; |
| 3581 | struct msi_msg msg; |
| 3582 | unsigned int dest; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3583 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3584 | dest = set_desc_affinity(desc, mask); |
| 3585 | if (dest == BAD_APICID) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3586 | return; |
| 3587 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3588 | cfg = desc->chip_data; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3589 | |
| 3590 | dmar_msi_read(irq, &msg); |
| 3591 | |
| 3592 | msg.data &= ~MSI_DATA_VECTOR_MASK; |
| 3593 | msg.data |= MSI_DATA_VECTOR(cfg->vector); |
| 3594 | msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; |
| 3595 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
| 3596 | |
| 3597 | dmar_msi_write(irq, &msg); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3598 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3599 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3600 | #endif /* CONFIG_SMP */ |
| 3601 | |
| 3602 | struct irq_chip dmar_msi_type = { |
| 3603 | .name = "DMAR_MSI", |
| 3604 | .unmask = dmar_msi_unmask, |
| 3605 | .mask = dmar_msi_mask, |
| 3606 | .ack = ack_apic_edge, |
| 3607 | #ifdef CONFIG_SMP |
| 3608 | .set_affinity = dmar_msi_set_affinity, |
| 3609 | #endif |
| 3610 | .retrigger = ioapic_retrigger_irq, |
| 3611 | }; |
| 3612 | |
| 3613 | int arch_setup_dmar_msi(unsigned int irq) |
| 3614 | { |
| 3615 | int ret; |
| 3616 | struct msi_msg msg; |
| 3617 | |
| 3618 | ret = msi_compose_msg(NULL, irq, &msg); |
| 3619 | if (ret < 0) |
| 3620 | return ret; |
| 3621 | dmar_msi_write(irq, &msg); |
| 3622 | set_irq_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq, |
| 3623 | "edge"); |
| 3624 | return 0; |
| 3625 | } |
| 3626 | #endif |
| 3627 | |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3628 | #ifdef CONFIG_HPET_TIMER |
| 3629 | |
| 3630 | #ifdef CONFIG_SMP |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3631 | static void hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask) |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3632 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3633 | struct irq_desc *desc = irq_to_desc(irq); |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3634 | struct irq_cfg *cfg; |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3635 | struct msi_msg msg; |
| 3636 | unsigned int dest; |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3637 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3638 | dest = set_desc_affinity(desc, mask); |
| 3639 | if (dest == BAD_APICID) |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3640 | return; |
| 3641 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3642 | cfg = desc->chip_data; |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3643 | |
| 3644 | hpet_msi_read(irq, &msg); |
| 3645 | |
| 3646 | msg.data &= ~MSI_DATA_VECTOR_MASK; |
| 3647 | msg.data |= MSI_DATA_VECTOR(cfg->vector); |
| 3648 | msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; |
| 3649 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
| 3650 | |
| 3651 | hpet_msi_write(irq, &msg); |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3652 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3653 | |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3654 | #endif /* CONFIG_SMP */ |
| 3655 | |
Dmitri Vorobiev | 1cc1852 | 2009-03-22 19:11:09 +0200 | [diff] [blame] | 3656 | static struct irq_chip hpet_msi_type = { |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3657 | .name = "HPET_MSI", |
| 3658 | .unmask = hpet_msi_unmask, |
| 3659 | .mask = hpet_msi_mask, |
| 3660 | .ack = ack_apic_edge, |
| 3661 | #ifdef CONFIG_SMP |
| 3662 | .set_affinity = hpet_msi_set_affinity, |
| 3663 | #endif |
| 3664 | .retrigger = ioapic_retrigger_irq, |
| 3665 | }; |
| 3666 | |
| 3667 | int arch_setup_hpet_msi(unsigned int irq) |
| 3668 | { |
| 3669 | int ret; |
| 3670 | struct msi_msg msg; |
| 3671 | |
| 3672 | ret = msi_compose_msg(NULL, irq, &msg); |
| 3673 | if (ret < 0) |
| 3674 | return ret; |
| 3675 | |
| 3676 | hpet_msi_write(irq, &msg); |
| 3677 | set_irq_chip_and_handler_name(irq, &hpet_msi_type, handle_edge_irq, |
| 3678 | "edge"); |
Yinghai Lu | c81bba4 | 2008-09-25 11:53:11 -0700 | [diff] [blame] | 3679 | |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3680 | return 0; |
| 3681 | } |
| 3682 | #endif |
| 3683 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3684 | #endif /* CONFIG_PCI_MSI */ |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3685 | /* |
| 3686 | * Hypertransport interrupt support |
| 3687 | */ |
| 3688 | #ifdef CONFIG_HT_IRQ |
| 3689 | |
| 3690 | #ifdef CONFIG_SMP |
| 3691 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3692 | static void target_ht_irq(unsigned int irq, unsigned int dest, u8 vector) |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3693 | { |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3694 | struct ht_irq_msg msg; |
| 3695 | fetch_ht_irq_msg(irq, &msg); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3696 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3697 | msg.address_lo &= ~(HT_IRQ_LOW_VECTOR_MASK | HT_IRQ_LOW_DEST_ID_MASK); |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3698 | msg.address_hi &= ~(HT_IRQ_HIGH_DEST_ID_MASK); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3699 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3700 | msg.address_lo |= HT_IRQ_LOW_VECTOR(vector) | HT_IRQ_LOW_DEST_ID(dest); |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3701 | msg.address_hi |= HT_IRQ_HIGH_DEST_ID(dest); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3702 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3703 | write_ht_irq_msg(irq, &msg); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3704 | } |
| 3705 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3706 | static void set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask) |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3707 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3708 | struct irq_desc *desc = irq_to_desc(irq); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3709 | struct irq_cfg *cfg; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3710 | unsigned int dest; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3711 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3712 | dest = set_desc_affinity(desc, mask); |
| 3713 | if (dest == BAD_APICID) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3714 | return; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3715 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3716 | cfg = desc->chip_data; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3717 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3718 | target_ht_irq(irq, dest, cfg->vector); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3719 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3720 | |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3721 | #endif |
| 3722 | |
Aneesh Kumar K.V | c37e108 | 2006-10-11 01:20:43 -0700 | [diff] [blame] | 3723 | static struct irq_chip ht_irq_chip = { |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3724 | .name = "PCI-HT", |
| 3725 | .mask = mask_ht_irq, |
| 3726 | .unmask = unmask_ht_irq, |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3727 | .ack = ack_apic_edge, |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3728 | #ifdef CONFIG_SMP |
| 3729 | .set_affinity = set_ht_irq_affinity, |
| 3730 | #endif |
| 3731 | .retrigger = ioapic_retrigger_irq, |
| 3732 | }; |
| 3733 | |
| 3734 | int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev) |
| 3735 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3736 | struct irq_cfg *cfg; |
| 3737 | int err; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3738 | |
Jan Beulich | f118263 | 2009-01-14 12:27:35 +0000 | [diff] [blame] | 3739 | if (disable_apic) |
| 3740 | return -ENXIO; |
| 3741 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3742 | cfg = irq_cfg(irq); |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 3743 | err = assign_irq_vector(irq, cfg, apic->target_cpus()); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3744 | if (!err) { |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3745 | struct ht_irq_msg msg; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3746 | unsigned dest; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3747 | |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 3748 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, |
| 3749 | apic->target_cpus()); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3750 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3751 | msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3752 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3753 | msg.address_lo = |
| 3754 | HT_IRQ_LOW_BASE | |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3755 | HT_IRQ_LOW_DEST_ID(dest) | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3756 | HT_IRQ_LOW_VECTOR(cfg->vector) | |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3757 | ((apic->irq_dest_mode == 0) ? |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3758 | HT_IRQ_LOW_DM_PHYSICAL : |
| 3759 | HT_IRQ_LOW_DM_LOGICAL) | |
| 3760 | HT_IRQ_LOW_RQEOI_EDGE | |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3761 | ((apic->irq_delivery_mode != dest_LowestPrio) ? |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3762 | HT_IRQ_LOW_MT_FIXED : |
| 3763 | HT_IRQ_LOW_MT_ARBITRATED) | |
| 3764 | HT_IRQ_LOW_IRQ_MASKED; |
| 3765 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3766 | write_ht_irq_msg(irq, &msg); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3767 | |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 3768 | set_irq_chip_and_handler_name(irq, &ht_irq_chip, |
| 3769 | handle_edge_irq, "edge"); |
Yinghai Lu | c81bba4 | 2008-09-25 11:53:11 -0700 | [diff] [blame] | 3770 | |
| 3771 | dev_printk(KERN_DEBUG, &dev->dev, "irq %d for HT\n", irq); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3772 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3773 | return err; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3774 | } |
| 3775 | #endif /* CONFIG_HT_IRQ */ |
| 3776 | |
Nick Piggin | 03b4863 | 2009-01-20 04:36:04 +0100 | [diff] [blame] | 3777 | #ifdef CONFIG_X86_UV |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 3778 | /* |
| 3779 | * Re-target the irq to the specified CPU and enable the specified MMR located |
| 3780 | * on the specified blade to allow the sending of MSIs to the specified CPU. |
| 3781 | */ |
| 3782 | int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade, |
| 3783 | unsigned long mmr_offset) |
| 3784 | { |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3785 | const struct cpumask *eligible_cpu = cpumask_of(cpu); |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 3786 | struct irq_cfg *cfg; |
| 3787 | int mmr_pnode; |
| 3788 | unsigned long mmr_value; |
| 3789 | struct uv_IO_APIC_route_entry *entry; |
| 3790 | unsigned long flags; |
| 3791 | int err; |
| 3792 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3793 | cfg = irq_cfg(irq); |
| 3794 | |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 3795 | err = assign_irq_vector(irq, cfg, eligible_cpu); |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 3796 | if (err != 0) |
| 3797 | return err; |
| 3798 | |
| 3799 | spin_lock_irqsave(&vector_lock, flags); |
| 3800 | set_irq_chip_and_handler_name(irq, &uv_irq_chip, handle_percpu_irq, |
| 3801 | irq_name); |
| 3802 | spin_unlock_irqrestore(&vector_lock, flags); |
| 3803 | |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 3804 | mmr_value = 0; |
| 3805 | entry = (struct uv_IO_APIC_route_entry *)&mmr_value; |
| 3806 | BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long)); |
| 3807 | |
| 3808 | entry->vector = cfg->vector; |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3809 | entry->delivery_mode = apic->irq_delivery_mode; |
| 3810 | entry->dest_mode = apic->irq_dest_mode; |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 3811 | entry->polarity = 0; |
| 3812 | entry->trigger = 0; |
| 3813 | entry->mask = 0; |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 3814 | entry->dest = apic->cpu_mask_to_apicid(eligible_cpu); |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 3815 | |
| 3816 | mmr_pnode = uv_blade_to_pnode(mmr_blade); |
| 3817 | uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value); |
| 3818 | |
| 3819 | return irq; |
| 3820 | } |
| 3821 | |
| 3822 | /* |
| 3823 | * Disable the specified MMR located on the specified blade so that MSIs are |
| 3824 | * longer allowed to be sent. |
| 3825 | */ |
| 3826 | void arch_disable_uv_irq(int mmr_blade, unsigned long mmr_offset) |
| 3827 | { |
| 3828 | unsigned long mmr_value; |
| 3829 | struct uv_IO_APIC_route_entry *entry; |
| 3830 | int mmr_pnode; |
| 3831 | |
| 3832 | mmr_value = 0; |
| 3833 | entry = (struct uv_IO_APIC_route_entry *)&mmr_value; |
| 3834 | BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long)); |
| 3835 | |
| 3836 | entry->mask = 1; |
| 3837 | |
| 3838 | mmr_pnode = uv_blade_to_pnode(mmr_blade); |
| 3839 | uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value); |
| 3840 | } |
| 3841 | #endif /* CONFIG_X86_64 */ |
| 3842 | |
Yinghai Lu | 9d6a4d0 | 2008-08-19 20:50:52 -0700 | [diff] [blame] | 3843 | int __init io_apic_get_redir_entries (int ioapic) |
| 3844 | { |
| 3845 | union IO_APIC_reg_01 reg_01; |
| 3846 | unsigned long flags; |
| 3847 | |
| 3848 | spin_lock_irqsave(&ioapic_lock, flags); |
| 3849 | reg_01.raw = io_apic_read(ioapic, 1); |
| 3850 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 3851 | |
| 3852 | return reg_01.bits.entries; |
| 3853 | } |
| 3854 | |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3855 | void __init probe_nr_irqs_gsi(void) |
Yinghai Lu | 9d6a4d0 | 2008-08-19 20:50:52 -0700 | [diff] [blame] | 3856 | { |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3857 | int nr = 0; |
| 3858 | |
Yinghai Lu | cc6c500 | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3859 | nr = acpi_probe_gsi(); |
| 3860 | if (nr > nr_irqs_gsi) { |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3861 | nr_irqs_gsi = nr; |
Yinghai Lu | cc6c500 | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3862 | } else { |
| 3863 | /* for acpi=off or acpi is not compiled in */ |
| 3864 | int idx; |
| 3865 | |
| 3866 | nr = 0; |
| 3867 | for (idx = 0; idx < nr_ioapics; idx++) |
| 3868 | nr += io_apic_get_redir_entries(idx) + 1; |
| 3869 | |
| 3870 | if (nr > nr_irqs_gsi) |
| 3871 | nr_irqs_gsi = nr; |
| 3872 | } |
| 3873 | |
| 3874 | printk(KERN_DEBUG "nr_irqs_gsi: %d\n", nr_irqs_gsi); |
Yinghai Lu | 9d6a4d0 | 2008-08-19 20:50:52 -0700 | [diff] [blame] | 3875 | } |
| 3876 | |
Yinghai Lu | 4a046d1 | 2009-01-12 17:39:24 -0800 | [diff] [blame] | 3877 | #ifdef CONFIG_SPARSE_IRQ |
| 3878 | int __init arch_probe_nr_irqs(void) |
| 3879 | { |
| 3880 | int nr; |
| 3881 | |
Yinghai Lu | f1ee554 | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3882 | if (nr_irqs > (NR_VECTORS * nr_cpu_ids)) |
| 3883 | nr_irqs = NR_VECTORS * nr_cpu_ids; |
Yinghai Lu | 4a046d1 | 2009-01-12 17:39:24 -0800 | [diff] [blame] | 3884 | |
Yinghai Lu | f1ee554 | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3885 | nr = nr_irqs_gsi + 8 * nr_cpu_ids; |
| 3886 | #if defined(CONFIG_PCI_MSI) || defined(CONFIG_HT_IRQ) |
| 3887 | /* |
| 3888 | * for MSI and HT dyn irq |
| 3889 | */ |
| 3890 | nr += nr_irqs_gsi * 16; |
| 3891 | #endif |
| 3892 | if (nr < nr_irqs) |
Yinghai Lu | 4a046d1 | 2009-01-12 17:39:24 -0800 | [diff] [blame] | 3893 | nr_irqs = nr; |
| 3894 | |
| 3895 | return 0; |
| 3896 | } |
| 3897 | #endif |
| 3898 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3899 | /* -------------------------------------------------------------------------- |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3900 | ACPI-based IOAPIC Configuration |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3901 | -------------------------------------------------------------------------- */ |
| 3902 | |
Len Brown | 888ba6c | 2005-08-24 12:07:20 -0400 | [diff] [blame] | 3903 | #ifdef CONFIG_ACPI |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3904 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3905 | #ifdef CONFIG_X86_32 |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3906 | int __init io_apic_get_unique_id(int ioapic, int apic_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3907 | { |
| 3908 | union IO_APIC_reg_00 reg_00; |
| 3909 | static physid_mask_t apic_id_map = PHYSID_MASK_NONE; |
| 3910 | physid_mask_t tmp; |
| 3911 | unsigned long flags; |
| 3912 | int i = 0; |
| 3913 | |
| 3914 | /* |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3915 | * The P4 platform supports up to 256 APIC IDs on two separate APIC |
| 3916 | * buses (one for LAPICs, one for IOAPICs), where predecessors only |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3917 | * supports up to 16 on one shared APIC bus. |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3918 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3919 | * TBD: Expand LAPIC/IOAPIC support on P4-class systems to take full |
| 3920 | * advantage of new APIC bus architecture. |
| 3921 | */ |
| 3922 | |
| 3923 | if (physids_empty(apic_id_map)) |
Ingo Molnar | d190cb8 | 2009-01-28 06:50:47 +0100 | [diff] [blame] | 3924 | apic_id_map = apic->ioapic_phys_id_map(phys_cpu_present_map); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3925 | |
| 3926 | spin_lock_irqsave(&ioapic_lock, flags); |
| 3927 | reg_00.raw = io_apic_read(ioapic, 0); |
| 3928 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 3929 | |
| 3930 | if (apic_id >= get_physical_broadcast()) { |
| 3931 | printk(KERN_WARNING "IOAPIC[%d]: Invalid apic_id %d, trying " |
| 3932 | "%d\n", ioapic, apic_id, reg_00.bits.ID); |
| 3933 | apic_id = reg_00.bits.ID; |
| 3934 | } |
| 3935 | |
| 3936 | /* |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3937 | * Every APIC in a system must have a unique ID or we get lots of nice |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3938 | * 'stuck on smp_invalidate_needed IPI wait' messages. |
| 3939 | */ |
Ingo Molnar | d1d7cae | 2009-01-28 05:41:42 +0100 | [diff] [blame] | 3940 | if (apic->check_apicid_used(apic_id_map, apic_id)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3941 | |
| 3942 | for (i = 0; i < get_physical_broadcast(); i++) { |
Ingo Molnar | d1d7cae | 2009-01-28 05:41:42 +0100 | [diff] [blame] | 3943 | if (!apic->check_apicid_used(apic_id_map, i)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3944 | break; |
| 3945 | } |
| 3946 | |
| 3947 | if (i == get_physical_broadcast()) |
| 3948 | panic("Max apic_id exceeded!\n"); |
| 3949 | |
| 3950 | printk(KERN_WARNING "IOAPIC[%d]: apic_id %d already used, " |
| 3951 | "trying %d\n", ioapic, apic_id, i); |
| 3952 | |
| 3953 | apic_id = i; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3954 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3955 | |
Ingo Molnar | 8058714 | 2009-01-28 06:50:47 +0100 | [diff] [blame] | 3956 | tmp = apic->apicid_to_cpu_present(apic_id); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3957 | physids_or(apic_id_map, apic_id_map, tmp); |
| 3958 | |
| 3959 | if (reg_00.bits.ID != apic_id) { |
| 3960 | reg_00.bits.ID = apic_id; |
| 3961 | |
| 3962 | spin_lock_irqsave(&ioapic_lock, flags); |
| 3963 | io_apic_write(ioapic, 0, reg_00.raw); |
| 3964 | reg_00.raw = io_apic_read(ioapic, 0); |
| 3965 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 3966 | |
| 3967 | /* Sanity check */ |
Andreas Deresch | 6070f9e | 2006-02-26 04:18:34 +0100 | [diff] [blame] | 3968 | if (reg_00.bits.ID != apic_id) { |
| 3969 | printk("IOAPIC[%d]: Unable to change apic_id!\n", ioapic); |
| 3970 | return -1; |
| 3971 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3972 | } |
| 3973 | |
| 3974 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 3975 | "IOAPIC[%d]: Assigned apic_id %d\n", ioapic, apic_id); |
| 3976 | |
| 3977 | return apic_id; |
| 3978 | } |
| 3979 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3980 | int __init io_apic_get_version(int ioapic) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3981 | { |
| 3982 | union IO_APIC_reg_01 reg_01; |
| 3983 | unsigned long flags; |
| 3984 | |
| 3985 | spin_lock_irqsave(&ioapic_lock, flags); |
| 3986 | reg_01.raw = io_apic_read(ioapic, 1); |
| 3987 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 3988 | |
| 3989 | return reg_01.bits.version; |
| 3990 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3991 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3992 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3993 | int io_apic_set_pci_routing (int ioapic, int pin, int irq, int triggering, int polarity) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3994 | { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3995 | struct irq_desc *desc; |
| 3996 | struct irq_cfg *cfg; |
| 3997 | int cpu = boot_cpu_id; |
| 3998 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3999 | if (!IO_APIC_IRQ(irq)) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4000 | apic_printk(APIC_QUIET,KERN_ERR "IOAPIC[%d]: Invalid reference to IRQ 0\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4001 | ioapic); |
| 4002 | return -EINVAL; |
| 4003 | } |
| 4004 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 4005 | desc = irq_to_desc_alloc_cpu(irq, cpu); |
| 4006 | if (!desc) { |
| 4007 | printk(KERN_INFO "can not get irq_desc %d\n", irq); |
| 4008 | return 0; |
| 4009 | } |
| 4010 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4011 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4012 | * IRQs < 16 are already in the irq_2_pin[] map |
| 4013 | */ |
Yinghai Lu | 99d093d | 2008-12-05 18:58:32 -0800 | [diff] [blame] | 4014 | if (irq >= NR_IRQS_LEGACY) { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 4015 | cfg = desc->chip_data; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 4016 | add_pin_to_irq_cpu(cfg, cpu, ioapic, pin); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 4017 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4018 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 4019 | setup_IO_APIC_irq(ioapic, pin, irq, desc, triggering, polarity); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4020 | |
| 4021 | return 0; |
| 4022 | } |
| 4023 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4024 | |
Shaohua Li | 61fd47e | 2007-11-17 01:05:28 -0500 | [diff] [blame] | 4025 | int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) |
| 4026 | { |
| 4027 | int i; |
| 4028 | |
| 4029 | if (skip_ioapic_setup) |
| 4030 | return -1; |
| 4031 | |
| 4032 | for (i = 0; i < mp_irq_entries; i++) |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 4033 | if (mp_irqs[i].irqtype == mp_INT && |
| 4034 | mp_irqs[i].srcbusirq == bus_irq) |
Shaohua Li | 61fd47e | 2007-11-17 01:05:28 -0500 | [diff] [blame] | 4035 | break; |
| 4036 | if (i >= mp_irq_entries) |
| 4037 | return -1; |
| 4038 | |
| 4039 | *trigger = irq_trigger(i); |
| 4040 | *polarity = irq_polarity(i); |
| 4041 | return 0; |
| 4042 | } |
| 4043 | |
Len Brown | 888ba6c | 2005-08-24 12:07:20 -0400 | [diff] [blame] | 4044 | #endif /* CONFIG_ACPI */ |
Rusty Russell | 1a3f239 | 2006-09-26 10:52:32 +0200 | [diff] [blame] | 4045 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 4046 | /* |
| 4047 | * This function currently is only a helper for the i386 smp boot process where |
| 4048 | * we need to reprogram the ioredtbls to cater for the cpus which have come online |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 4049 | * so mask in all cases should simply be apic->target_cpus() |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 4050 | */ |
| 4051 | #ifdef CONFIG_SMP |
| 4052 | void __init setup_ioapic_dest(void) |
| 4053 | { |
| 4054 | int pin, ioapic, irq, irq_entry; |
Thomas Gleixner | 6c2e940 | 2008-11-07 12:33:49 +0100 | [diff] [blame] | 4055 | struct irq_desc *desc; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 4056 | struct irq_cfg *cfg; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 4057 | const struct cpumask *mask; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 4058 | |
| 4059 | if (skip_ioapic_setup == 1) |
| 4060 | return; |
| 4061 | |
| 4062 | for (ioapic = 0; ioapic < nr_ioapics; ioapic++) { |
| 4063 | for (pin = 0; pin < nr_ioapic_registers[ioapic]; pin++) { |
| 4064 | irq_entry = find_irq_entry(ioapic, pin, mp_INT); |
| 4065 | if (irq_entry == -1) |
| 4066 | continue; |
| 4067 | irq = pin_2_irq(irq_entry, ioapic, pin); |
| 4068 | |
| 4069 | /* setup_IO_APIC_irqs could fail to get vector for some device |
| 4070 | * when you have too many devices, because at that time only boot |
| 4071 | * cpu is online. |
| 4072 | */ |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 4073 | desc = irq_to_desc(irq); |
| 4074 | cfg = desc->chip_data; |
Thomas Gleixner | 6c2e940 | 2008-11-07 12:33:49 +0100 | [diff] [blame] | 4075 | if (!cfg->vector) { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 4076 | setup_IO_APIC_irq(ioapic, pin, irq, desc, |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 4077 | irq_trigger(irq_entry), |
| 4078 | irq_polarity(irq_entry)); |
Thomas Gleixner | 6c2e940 | 2008-11-07 12:33:49 +0100 | [diff] [blame] | 4079 | continue; |
| 4080 | |
| 4081 | } |
| 4082 | |
| 4083 | /* |
| 4084 | * Honour affinities which have been set in early boot |
| 4085 | */ |
Thomas Gleixner | 6c2e940 | 2008-11-07 12:33:49 +0100 | [diff] [blame] | 4086 | if (desc->status & |
| 4087 | (IRQ_NO_BALANCING | IRQ_AFFINITY_SET)) |
Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 4088 | mask = desc->affinity; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4089 | else |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 4090 | mask = apic->target_cpus(); |
Thomas Gleixner | 6c2e940 | 2008-11-07 12:33:49 +0100 | [diff] [blame] | 4091 | |
Thomas Gleixner | 6c2e940 | 2008-11-07 12:33:49 +0100 | [diff] [blame] | 4092 | if (intr_remapping_enabled) |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 4093 | set_ir_ioapic_affinity_irq_desc(desc, mask); |
Thomas Gleixner | 6c2e940 | 2008-11-07 12:33:49 +0100 | [diff] [blame] | 4094 | else |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 4095 | set_ioapic_affinity_irq_desc(desc, mask); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 4096 | } |
| 4097 | |
| 4098 | } |
| 4099 | } |
| 4100 | #endif |
| 4101 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4102 | #define IOAPIC_RESOURCE_NAME_SIZE 11 |
| 4103 | |
| 4104 | static struct resource *ioapic_resources; |
| 4105 | |
| 4106 | static struct resource * __init ioapic_setup_resources(void) |
| 4107 | { |
| 4108 | unsigned long n; |
| 4109 | struct resource *res; |
| 4110 | char *mem; |
| 4111 | int i; |
| 4112 | |
| 4113 | if (nr_ioapics <= 0) |
| 4114 | return NULL; |
| 4115 | |
| 4116 | n = IOAPIC_RESOURCE_NAME_SIZE + sizeof(struct resource); |
| 4117 | n *= nr_ioapics; |
| 4118 | |
| 4119 | mem = alloc_bootmem(n); |
| 4120 | res = (void *)mem; |
| 4121 | |
| 4122 | if (mem != NULL) { |
| 4123 | mem += sizeof(struct resource) * nr_ioapics; |
| 4124 | |
| 4125 | for (i = 0; i < nr_ioapics; i++) { |
| 4126 | res[i].name = mem; |
| 4127 | res[i].flags = IORESOURCE_MEM | IORESOURCE_BUSY; |
| 4128 | sprintf(mem, "IOAPIC %u", i); |
| 4129 | mem += IOAPIC_RESOURCE_NAME_SIZE; |
| 4130 | } |
| 4131 | } |
| 4132 | |
| 4133 | ioapic_resources = res; |
| 4134 | |
| 4135 | return res; |
| 4136 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4137 | |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4138 | void __init ioapic_init_mappings(void) |
| 4139 | { |
| 4140 | unsigned long ioapic_phys, idx = FIX_IO_APIC_BASE_0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4141 | struct resource *ioapic_res; |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 4142 | int i; |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4143 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4144 | ioapic_res = ioapic_setup_resources(); |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4145 | for (i = 0; i < nr_ioapics; i++) { |
| 4146 | if (smp_found_config) { |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 4147 | ioapic_phys = mp_ioapics[i].apicaddr; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4148 | #ifdef CONFIG_X86_32 |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 4149 | if (!ioapic_phys) { |
| 4150 | printk(KERN_ERR |
| 4151 | "WARNING: bogus zero IO-APIC " |
| 4152 | "address found in MPTABLE, " |
| 4153 | "disabling IO/APIC support!\n"); |
| 4154 | smp_found_config = 0; |
| 4155 | skip_ioapic_setup = 1; |
| 4156 | goto fake_ioapic_page; |
| 4157 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4158 | #endif |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4159 | } else { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4160 | #ifdef CONFIG_X86_32 |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4161 | fake_ioapic_page: |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4162 | #endif |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4163 | ioapic_phys = (unsigned long) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4164 | alloc_bootmem_pages(PAGE_SIZE); |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4165 | ioapic_phys = __pa(ioapic_phys); |
| 4166 | } |
| 4167 | set_fixmap_nocache(idx, ioapic_phys); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4168 | apic_printk(APIC_VERBOSE, |
| 4169 | "mapped IOAPIC to %08lx (%08lx)\n", |
| 4170 | __fix_to_virt(idx), ioapic_phys); |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4171 | idx++; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4172 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4173 | if (ioapic_res != NULL) { |
| 4174 | ioapic_res->start = ioapic_phys; |
| 4175 | ioapic_res->end = ioapic_phys + (4 * 1024) - 1; |
| 4176 | ioapic_res++; |
| 4177 | } |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4178 | } |
| 4179 | } |
| 4180 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4181 | static int __init ioapic_insert_resources(void) |
| 4182 | { |
| 4183 | int i; |
| 4184 | struct resource *r = ioapic_resources; |
| 4185 | |
| 4186 | if (!r) { |
Bartlomiej Zolnierkiewicz | 04c93ce | 2009-03-20 21:02:55 +0100 | [diff] [blame] | 4187 | if (nr_ioapics > 0) { |
| 4188 | printk(KERN_ERR |
| 4189 | "IO APIC resources couldn't be allocated.\n"); |
| 4190 | return -1; |
| 4191 | } |
| 4192 | return 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4193 | } |
| 4194 | |
| 4195 | for (i = 0; i < nr_ioapics; i++) { |
| 4196 | insert_resource(&iomem_resource, r); |
| 4197 | r++; |
| 4198 | } |
| 4199 | |
| 4200 | return 0; |
| 4201 | } |
| 4202 | |
| 4203 | /* Insert the IO APIC resources after PCI initialization has occured to handle |
| 4204 | * IO APICS that are mapped in on a BAR in PCI space. */ |
| 4205 | late_initcall(ioapic_insert_resources); |