Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 1 | /* |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 2 | * |
| 3 | * Copyright (C) 2007 Google, Inc. |
Stephen Boyd | 4312a7e | 2012-09-05 12:28:52 -0700 | [diff] [blame^] | 4 | * Copyright (c) 2009-2012, The Linux Foundation. All rights reserved. |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 5 | * |
| 6 | * This software is licensed under the terms of the GNU General Public |
| 7 | * License version 2, as published by the Free Software Foundation, and |
| 8 | * may be copied, distributed, and modified under those terms. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | */ |
| 16 | |
Stephen Boyd | 4a18407 | 2011-11-08 10:34:04 -0800 | [diff] [blame] | 17 | #include <linux/clocksource.h> |
| 18 | #include <linux/clockchips.h> |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 19 | #include <linux/init.h> |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 20 | #include <linux/interrupt.h> |
| 21 | #include <linux/irq.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 22 | #include <linux/io.h> |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 23 | |
| 24 | #include <asm/mach/time.h> |
Stephen Boyd | ebf30dc | 2011-05-31 16:10:00 -0700 | [diff] [blame] | 25 | #include <asm/hardware/gic.h> |
Stephen Boyd | 4a18407 | 2011-11-08 10:34:04 -0800 | [diff] [blame] | 26 | #include <asm/localtimer.h> |
Stephen Boyd | f8e56c4 | 2012-02-22 01:39:37 +0000 | [diff] [blame] | 27 | #include <asm/sched_clock.h> |
Stephen Boyd | ebf30dc | 2011-05-31 16:10:00 -0700 | [diff] [blame] | 28 | |
Stephen Boyd | 4312a7e | 2012-09-05 12:28:52 -0700 | [diff] [blame^] | 29 | #include "common.h" |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 30 | |
| 31 | #define TIMER_MATCH_VAL 0x0000 |
| 32 | #define TIMER_COUNT_VAL 0x0004 |
| 33 | #define TIMER_ENABLE 0x0008 |
Stephen Boyd | 4a18407 | 2011-11-08 10:34:04 -0800 | [diff] [blame] | 34 | #define TIMER_ENABLE_CLR_ON_MATCH_EN BIT(1) |
| 35 | #define TIMER_ENABLE_EN BIT(0) |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 36 | #define TIMER_CLEAR 0x000C |
Stephen Boyd | 4312a7e | 2012-09-05 12:28:52 -0700 | [diff] [blame^] | 37 | #define DGT_CLK_CTL 0x0030 |
Stephen Boyd | 4a18407 | 2011-11-08 10:34:04 -0800 | [diff] [blame] | 38 | #define DGT_CLK_CTL_DIV_4 0x3 |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 39 | |
| 40 | #define GPT_HZ 32768 |
Jeff Ohlstein | 672039f | 2010-10-05 15:23:57 -0700 | [diff] [blame] | 41 | |
Stephen Boyd | 2081a6b | 2011-11-08 10:34:08 -0800 | [diff] [blame] | 42 | #define MSM_DGT_SHIFT 5 |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 43 | |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 44 | static void __iomem *event_base; |
Stephen Boyd | a850c3f | 2011-11-08 10:34:06 -0800 | [diff] [blame] | 45 | |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 46 | static irqreturn_t msm_timer_interrupt(int irq, void *dev_id) |
| 47 | { |
Marc Zyngier | 28af690 | 2011-07-22 12:52:37 +0100 | [diff] [blame] | 48 | struct clock_event_device *evt = *(struct clock_event_device **)dev_id; |
Stephen Boyd | a850c3f | 2011-11-08 10:34:06 -0800 | [diff] [blame] | 49 | /* Stop the timer tick */ |
| 50 | if (evt->mode == CLOCK_EVT_MODE_ONESHOT) { |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 51 | u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); |
Stephen Boyd | a850c3f | 2011-11-08 10:34:06 -0800 | [diff] [blame] | 52 | ctrl &= ~TIMER_ENABLE_EN; |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 53 | writel_relaxed(ctrl, event_base + TIMER_ENABLE); |
Stephen Boyd | a850c3f | 2011-11-08 10:34:06 -0800 | [diff] [blame] | 54 | } |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 55 | evt->event_handler(evt); |
| 56 | return IRQ_HANDLED; |
| 57 | } |
| 58 | |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 59 | static int msm_timer_set_next_event(unsigned long cycles, |
| 60 | struct clock_event_device *evt) |
| 61 | { |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 62 | u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 63 | |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 64 | writel_relaxed(0, event_base + TIMER_CLEAR); |
| 65 | writel_relaxed(cycles, event_base + TIMER_MATCH_VAL); |
| 66 | writel_relaxed(ctrl | TIMER_ENABLE_EN, event_base + TIMER_ENABLE); |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 67 | return 0; |
| 68 | } |
| 69 | |
| 70 | static void msm_timer_set_mode(enum clock_event_mode mode, |
| 71 | struct clock_event_device *evt) |
| 72 | { |
Stephen Boyd | a850c3f | 2011-11-08 10:34:06 -0800 | [diff] [blame] | 73 | u32 ctrl; |
| 74 | |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 75 | ctrl = readl_relaxed(event_base + TIMER_ENABLE); |
Stephen Boyd | a850c3f | 2011-11-08 10:34:06 -0800 | [diff] [blame] | 76 | ctrl &= ~(TIMER_ENABLE_EN | TIMER_ENABLE_CLR_ON_MATCH_EN); |
Jeff Ohlstein | 94790ec | 2010-12-02 12:05:12 -0800 | [diff] [blame] | 77 | |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 78 | switch (mode) { |
| 79 | case CLOCK_EVT_MODE_RESUME: |
| 80 | case CLOCK_EVT_MODE_PERIODIC: |
| 81 | break; |
| 82 | case CLOCK_EVT_MODE_ONESHOT: |
Stephen Boyd | a850c3f | 2011-11-08 10:34:06 -0800 | [diff] [blame] | 83 | /* Timer is enabled in set_next_event */ |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 84 | break; |
| 85 | case CLOCK_EVT_MODE_UNUSED: |
| 86 | case CLOCK_EVT_MODE_SHUTDOWN: |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 87 | break; |
| 88 | } |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 89 | writel_relaxed(ctrl, event_base + TIMER_ENABLE); |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 90 | } |
| 91 | |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 92 | static struct clock_event_device msm_clockevent = { |
| 93 | .name = "gp_timer", |
| 94 | .features = CLOCK_EVT_FEAT_ONESHOT, |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 95 | .rating = 200, |
| 96 | .set_next_event = msm_timer_set_next_event, |
| 97 | .set_mode = msm_timer_set_mode, |
| 98 | }; |
| 99 | |
| 100 | static union { |
| 101 | struct clock_event_device *evt; |
| 102 | struct clock_event_device __percpu **percpu_evt; |
| 103 | } msm_evt; |
| 104 | |
| 105 | static void __iomem *source_base; |
| 106 | |
Stephen Boyd | f8e56c4 | 2012-02-22 01:39:37 +0000 | [diff] [blame] | 107 | static notrace cycle_t msm_read_timer_count(struct clocksource *cs) |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 108 | { |
Stephen Boyd | 2081a6b | 2011-11-08 10:34:08 -0800 | [diff] [blame] | 109 | return readl_relaxed(source_base + TIMER_COUNT_VAL); |
| 110 | } |
| 111 | |
Stephen Boyd | f8e56c4 | 2012-02-22 01:39:37 +0000 | [diff] [blame] | 112 | static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs) |
Stephen Boyd | 2081a6b | 2011-11-08 10:34:08 -0800 | [diff] [blame] | 113 | { |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 114 | /* |
| 115 | * Shift timer count down by a constant due to unreliable lower bits |
| 116 | * on some targets. |
| 117 | */ |
Stephen Boyd | 2081a6b | 2011-11-08 10:34:08 -0800 | [diff] [blame] | 118 | return msm_read_timer_count(cs) >> MSM_DGT_SHIFT; |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 119 | } |
| 120 | |
| 121 | static struct clocksource msm_clocksource = { |
| 122 | .name = "dg_timer", |
| 123 | .rating = 300, |
| 124 | .read = msm_read_timer_count, |
Stephen Boyd | 2081a6b | 2011-11-08 10:34:08 -0800 | [diff] [blame] | 125 | .mask = CLOCKSOURCE_MASK(32), |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 126 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 127 | }; |
| 128 | |
Marc Zyngier | 5ca709c | 2012-01-10 19:44:19 +0000 | [diff] [blame] | 129 | #ifdef CONFIG_LOCAL_TIMERS |
| 130 | static int __cpuinit msm_local_timer_setup(struct clock_event_device *evt) |
| 131 | { |
| 132 | /* Use existing clock_event for cpu 0 */ |
| 133 | if (!smp_processor_id()) |
| 134 | return 0; |
| 135 | |
| 136 | writel_relaxed(0, event_base + TIMER_ENABLE); |
| 137 | writel_relaxed(0, event_base + TIMER_CLEAR); |
| 138 | writel_relaxed(~0, event_base + TIMER_MATCH_VAL); |
| 139 | evt->irq = msm_clockevent.irq; |
| 140 | evt->name = "local_timer"; |
| 141 | evt->features = msm_clockevent.features; |
| 142 | evt->rating = msm_clockevent.rating; |
| 143 | evt->set_mode = msm_timer_set_mode; |
| 144 | evt->set_next_event = msm_timer_set_next_event; |
| 145 | evt->shift = msm_clockevent.shift; |
| 146 | evt->mult = div_sc(GPT_HZ, NSEC_PER_SEC, evt->shift); |
| 147 | evt->max_delta_ns = clockevent_delta2ns(0xf0000000, evt); |
| 148 | evt->min_delta_ns = clockevent_delta2ns(4, evt); |
| 149 | |
| 150 | *__this_cpu_ptr(msm_evt.percpu_evt) = evt; |
| 151 | clockevents_register_device(evt); |
Stephen Boyd | 66a8950 | 2012-09-05 12:28:51 -0700 | [diff] [blame] | 152 | enable_percpu_irq(evt->irq, IRQ_TYPE_EDGE_RISING); |
Marc Zyngier | 5ca709c | 2012-01-10 19:44:19 +0000 | [diff] [blame] | 153 | return 0; |
| 154 | } |
| 155 | |
| 156 | static void msm_local_timer_stop(struct clock_event_device *evt) |
| 157 | { |
| 158 | evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); |
| 159 | disable_percpu_irq(evt->irq); |
| 160 | } |
| 161 | |
| 162 | static struct local_timer_ops msm_local_timer_ops __cpuinitdata = { |
| 163 | .setup = msm_local_timer_setup, |
| 164 | .stop = msm_local_timer_stop, |
| 165 | }; |
| 166 | #endif /* CONFIG_LOCAL_TIMERS */ |
| 167 | |
Stephen Boyd | f8e56c4 | 2012-02-22 01:39:37 +0000 | [diff] [blame] | 168 | static notrace u32 msm_sched_clock_read(void) |
| 169 | { |
| 170 | return msm_clocksource.read(&msm_clocksource); |
| 171 | } |
| 172 | |
Stephen Boyd | 4312a7e | 2012-09-05 12:28:52 -0700 | [diff] [blame^] | 173 | static void __init msm_timer_init(u32 dgt_hz, int sched_bits, int irq, |
| 174 | bool percpu) |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 175 | { |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 176 | struct clock_event_device *ce = &msm_clockevent; |
| 177 | struct clocksource *cs = &msm_clocksource; |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 178 | int res; |
| 179 | |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 180 | writel_relaxed(0, event_base + TIMER_ENABLE); |
| 181 | writel_relaxed(0, event_base + TIMER_CLEAR); |
| 182 | writel_relaxed(~0, event_base + TIMER_MATCH_VAL); |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 183 | ce->cpumask = cpumask_of(0); |
Stephen Boyd | 4312a7e | 2012-09-05 12:28:52 -0700 | [diff] [blame^] | 184 | ce->irq = irq; |
David Brown | 8c27e6f | 2011-01-07 10:20:49 -0800 | [diff] [blame] | 185 | |
Stephen Boyd | 27fdb57 | 2011-11-08 10:34:10 -0800 | [diff] [blame] | 186 | clockevents_config_and_register(ce, GPT_HZ, 4, 0xffffffff); |
Stephen Boyd | 4312a7e | 2012-09-05 12:28:52 -0700 | [diff] [blame^] | 187 | if (percpu) { |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 188 | msm_evt.percpu_evt = alloc_percpu(struct clock_event_device *); |
| 189 | if (!msm_evt.percpu_evt) { |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 190 | pr_err("memory allocation failed for %s\n", ce->name); |
| 191 | goto err; |
Marc Zyngier | 28af690 | 2011-07-22 12:52:37 +0100 | [diff] [blame] | 192 | } |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 193 | *__this_cpu_ptr(msm_evt.percpu_evt) = ce; |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 194 | res = request_percpu_irq(ce->irq, msm_timer_interrupt, |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 195 | ce->name, msm_evt.percpu_evt); |
Marc Zyngier | 5ca709c | 2012-01-10 19:44:19 +0000 | [diff] [blame] | 196 | if (!res) { |
Stephen Boyd | 66a8950 | 2012-09-05 12:28:51 -0700 | [diff] [blame] | 197 | enable_percpu_irq(ce->irq, IRQ_TYPE_EDGE_RISING); |
Marc Zyngier | 5ca709c | 2012-01-10 19:44:19 +0000 | [diff] [blame] | 198 | #ifdef CONFIG_LOCAL_TIMERS |
| 199 | local_timer_register(&msm_local_timer_ops); |
| 200 | #endif |
| 201 | } |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 202 | } else { |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 203 | msm_evt.evt = ce; |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 204 | res = request_irq(ce->irq, msm_timer_interrupt, |
| 205 | IRQF_TIMER | IRQF_NOBALANCING | |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 206 | IRQF_TRIGGER_RISING, ce->name, &msm_evt.evt); |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 207 | } |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 208 | |
| 209 | if (res) |
| 210 | pr_err("request_irq failed for %s\n", ce->name); |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 211 | err: |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 212 | writel_relaxed(TIMER_ENABLE_EN, source_base + TIMER_ENABLE); |
Stephen Boyd | 2081a6b | 2011-11-08 10:34:08 -0800 | [diff] [blame] | 213 | res = clocksource_register_hz(cs, dgt_hz); |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 214 | if (res) |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 215 | pr_err("clocksource_register failed\n"); |
Stephen Boyd | 4312a7e | 2012-09-05 12:28:52 -0700 | [diff] [blame^] | 216 | setup_sched_clock(msm_sched_clock_read, sched_bits, dgt_hz); |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 217 | } |
| 218 | |
Stephen Boyd | 4312a7e | 2012-09-05 12:28:52 -0700 | [diff] [blame^] | 219 | static int __init msm_timer_map(phys_addr_t event, phys_addr_t source) |
| 220 | { |
| 221 | event_base = ioremap(event, SZ_64); |
| 222 | if (!event_base) { |
| 223 | pr_err("Failed to map event base\n"); |
| 224 | return 1; |
| 225 | } |
| 226 | source_base = ioremap(source, SZ_64); |
| 227 | if (!source_base) { |
| 228 | pr_err("Failed to map source base\n"); |
| 229 | return 1; |
| 230 | } |
| 231 | return 0; |
| 232 | } |
| 233 | |
| 234 | static void __init msm7x01_timer_init(void) |
| 235 | { |
| 236 | struct clocksource *cs = &msm_clocksource; |
| 237 | |
| 238 | if (msm_timer_map(0xc0100000, 0xc0100010)) |
| 239 | return; |
| 240 | cs->read = msm_read_timer_count_shift; |
| 241 | cs->mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT)); |
| 242 | /* 600 KHz */ |
| 243 | msm_timer_init(19200000 >> MSM_DGT_SHIFT, 32 - MSM_DGT_SHIFT, 7, |
| 244 | false); |
| 245 | } |
| 246 | |
| 247 | struct sys_timer msm7x01_timer = { |
| 248 | .init = msm7x01_timer_init |
| 249 | }; |
| 250 | |
| 251 | static void __init msm7x30_timer_init(void) |
| 252 | { |
| 253 | if (msm_timer_map(0xc0100004, 0xc0100024)) |
| 254 | return; |
| 255 | msm_timer_init(24576000 / 4, 32, 1, false); |
| 256 | } |
| 257 | |
| 258 | struct sys_timer msm7x30_timer = { |
| 259 | .init = msm7x30_timer_init |
| 260 | }; |
| 261 | |
| 262 | static void __init msm8x60_timer_init(void) |
| 263 | { |
| 264 | if (msm_timer_map(0x02000004, 0x02040024)) |
| 265 | return; |
| 266 | writel_relaxed(DGT_CLK_CTL_DIV_4, event_base + DGT_CLK_CTL); |
| 267 | msm_timer_init(27000000 / 4, 32, 17, true); |
| 268 | } |
| 269 | |
| 270 | struct sys_timer msm8x60_timer = { |
| 271 | .init = msm8x60_timer_init |
| 272 | }; |
| 273 | |
| 274 | static void __init msm8960_timer_init(void) |
| 275 | { |
| 276 | if (msm_timer_map(0x0200A004, 0x0208A024)) |
| 277 | return; |
| 278 | writel_relaxed(DGT_CLK_CTL_DIV_4, event_base + DGT_CLK_CTL); |
| 279 | msm_timer_init(27000000 / 4, 32, 17, true); |
| 280 | } |
| 281 | |
| 282 | struct sys_timer msm8960_timer = { |
| 283 | .init = msm8960_timer_init |
| 284 | }; |
| 285 | |
| 286 | static void __init qsd8x50_timer_init(void) |
| 287 | { |
| 288 | if (msm_timer_map(0xAC100000, 0xAC100010)) |
| 289 | return; |
| 290 | msm_timer_init(19200000 / 4, 32, 7, false); |
| 291 | } |
| 292 | |
| 293 | struct sys_timer qsd8x50_timer = { |
| 294 | .init = qsd8x50_timer_init |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 295 | }; |