Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Samsung SoC DP (Display Port) interface driver. |
| 3 | * |
| 4 | * Copyright (C) 2012 Samsung Electronics Co., Ltd. |
| 5 | * Author: Jingoo Han <jg1.han@samsung.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License as published by the |
| 9 | * Free Software Foundation; either version 2 of the License, or (at your |
| 10 | * option) any later version. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/platform_device.h> |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 15 | #include <linux/err.h> |
| 16 | #include <linux/clk.h> |
| 17 | #include <linux/io.h> |
| 18 | #include <linux/interrupt.h> |
| 19 | #include <linux/delay.h> |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 20 | #include <linux/of.h> |
Andrew Bresticker | b8b5247 | 2014-04-22 04:09:10 +0530 | [diff] [blame] | 21 | #include <linux/of_gpio.h> |
| 22 | #include <linux/gpio.h> |
Inki Dae | f37cd5e | 2014-05-09 14:25:20 +0900 | [diff] [blame] | 23 | #include <linux/component.h> |
Jingoo Han | 8114fab | 2013-10-16 21:58:16 +0530 | [diff] [blame] | 24 | #include <linux/phy/phy.h> |
Sean Paul | 1417f10 | 2014-01-30 16:19:23 -0500 | [diff] [blame] | 25 | #include <video/of_display_timing.h> |
| 26 | #include <video/of_videomode.h> |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 27 | |
Sean Paul | 1417f10 | 2014-01-30 16:19:23 -0500 | [diff] [blame] | 28 | #include <drm/drmP.h> |
Sean Paul | caa5d1e | 2014-01-30 16:19:30 -0500 | [diff] [blame] | 29 | #include <drm/drm_crtc.h> |
| 30 | #include <drm/drm_crtc_helper.h> |
Sean Paul | 1634ba2 | 2014-02-24 19:20:15 +0900 | [diff] [blame] | 31 | #include <drm/bridge/ptn3460.h> |
Sean Paul | 1417f10 | 2014-01-30 16:19:23 -0500 | [diff] [blame] | 32 | |
| 33 | #include "exynos_drm_drv.h" |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 34 | #include "exynos_dp_core.h" |
| 35 | |
Sean Paul | caa5d1e | 2014-01-30 16:19:30 -0500 | [diff] [blame] | 36 | #define ctx_from_connector(c) container_of(c, struct exynos_dp_device, \ |
| 37 | connector) |
| 38 | |
Sean Paul | 1634ba2 | 2014-02-24 19:20:15 +0900 | [diff] [blame] | 39 | struct bridge_init { |
| 40 | struct i2c_client *client; |
| 41 | struct device_node *node; |
| 42 | }; |
| 43 | |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 44 | static int exynos_dp_init_dp(struct exynos_dp_device *dp) |
| 45 | { |
| 46 | exynos_dp_reset(dp); |
| 47 | |
Jingoo Han | 24db03a | 2012-05-25 16:21:08 +0900 | [diff] [blame] | 48 | exynos_dp_swreset(dp); |
| 49 | |
Jingoo Han | 75435c7 | 2012-08-23 19:55:13 +0900 | [diff] [blame] | 50 | exynos_dp_init_analog_param(dp); |
| 51 | exynos_dp_init_interrupt(dp); |
| 52 | |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 53 | /* SW defined function Normal operation */ |
| 54 | exynos_dp_enable_sw_function(dp); |
| 55 | |
| 56 | exynos_dp_config_interrupt(dp); |
| 57 | exynos_dp_init_analog_func(dp); |
| 58 | |
| 59 | exynos_dp_init_hpd(dp); |
| 60 | exynos_dp_init_aux(dp); |
| 61 | |
| 62 | return 0; |
| 63 | } |
| 64 | |
| 65 | static int exynos_dp_detect_hpd(struct exynos_dp_device *dp) |
| 66 | { |
| 67 | int timeout_loop = 0; |
| 68 | |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 69 | while (exynos_dp_get_plug_in_status(dp) != 0) { |
| 70 | timeout_loop++; |
| 71 | if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) { |
| 72 | dev_err(dp->dev, "failed to get hpd plug status\n"); |
| 73 | return -ETIMEDOUT; |
| 74 | } |
Jingoo Han | a2c81bc | 2012-07-18 18:50:59 +0900 | [diff] [blame] | 75 | usleep_range(10, 11); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 76 | } |
| 77 | |
| 78 | return 0; |
| 79 | } |
| 80 | |
| 81 | static unsigned char exynos_dp_calc_edid_check_sum(unsigned char *edid_data) |
| 82 | { |
| 83 | int i; |
| 84 | unsigned char sum = 0; |
| 85 | |
| 86 | for (i = 0; i < EDID_BLOCK_LENGTH; i++) |
| 87 | sum = sum + edid_data[i]; |
| 88 | |
| 89 | return sum; |
| 90 | } |
| 91 | |
| 92 | static int exynos_dp_read_edid(struct exynos_dp_device *dp) |
| 93 | { |
| 94 | unsigned char edid[EDID_BLOCK_LENGTH * 2]; |
| 95 | unsigned int extend_block = 0; |
| 96 | unsigned char sum; |
| 97 | unsigned char test_vector; |
| 98 | int retval; |
| 99 | |
| 100 | /* |
| 101 | * EDID device address is 0x50. |
| 102 | * However, if necessary, you must have set upper address |
| 103 | * into E-EDID in I2C device, 0x30. |
| 104 | */ |
| 105 | |
| 106 | /* Read Extension Flag, Number of 128-byte EDID extension blocks */ |
Sean Paul | 99f5415 | 2012-11-01 02:13:00 +0000 | [diff] [blame] | 107 | retval = exynos_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR, |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 108 | EDID_EXTENSION_FLAG, |
| 109 | &extend_block); |
Sean Paul | 99f5415 | 2012-11-01 02:13:00 +0000 | [diff] [blame] | 110 | if (retval) |
| 111 | return retval; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 112 | |
| 113 | if (extend_block > 0) { |
| 114 | dev_dbg(dp->dev, "EDID data includes a single extension!\n"); |
| 115 | |
| 116 | /* Read EDID data */ |
| 117 | retval = exynos_dp_read_bytes_from_i2c(dp, I2C_EDID_DEVICE_ADDR, |
| 118 | EDID_HEADER_PATTERN, |
| 119 | EDID_BLOCK_LENGTH, |
| 120 | &edid[EDID_HEADER_PATTERN]); |
| 121 | if (retval != 0) { |
| 122 | dev_err(dp->dev, "EDID Read failed!\n"); |
| 123 | return -EIO; |
| 124 | } |
| 125 | sum = exynos_dp_calc_edid_check_sum(edid); |
| 126 | if (sum != 0) { |
| 127 | dev_err(dp->dev, "EDID bad checksum!\n"); |
| 128 | return -EIO; |
| 129 | } |
| 130 | |
| 131 | /* Read additional EDID data */ |
| 132 | retval = exynos_dp_read_bytes_from_i2c(dp, |
| 133 | I2C_EDID_DEVICE_ADDR, |
| 134 | EDID_BLOCK_LENGTH, |
| 135 | EDID_BLOCK_LENGTH, |
| 136 | &edid[EDID_BLOCK_LENGTH]); |
| 137 | if (retval != 0) { |
| 138 | dev_err(dp->dev, "EDID Read failed!\n"); |
| 139 | return -EIO; |
| 140 | } |
| 141 | sum = exynos_dp_calc_edid_check_sum(&edid[EDID_BLOCK_LENGTH]); |
| 142 | if (sum != 0) { |
| 143 | dev_err(dp->dev, "EDID bad checksum!\n"); |
| 144 | return -EIO; |
| 145 | } |
| 146 | |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 147 | exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST, |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 148 | &test_vector); |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 149 | if (test_vector & DP_TEST_LINK_EDID_READ) { |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 150 | exynos_dp_write_byte_to_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 151 | DP_TEST_EDID_CHECKSUM, |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 152 | edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]); |
| 153 | exynos_dp_write_byte_to_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 154 | DP_TEST_RESPONSE, |
| 155 | DP_TEST_EDID_CHECKSUM_WRITE); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 156 | } |
| 157 | } else { |
| 158 | dev_info(dp->dev, "EDID data does not include any extensions.\n"); |
| 159 | |
| 160 | /* Read EDID data */ |
| 161 | retval = exynos_dp_read_bytes_from_i2c(dp, |
| 162 | I2C_EDID_DEVICE_ADDR, |
| 163 | EDID_HEADER_PATTERN, |
| 164 | EDID_BLOCK_LENGTH, |
| 165 | &edid[EDID_HEADER_PATTERN]); |
| 166 | if (retval != 0) { |
| 167 | dev_err(dp->dev, "EDID Read failed!\n"); |
| 168 | return -EIO; |
| 169 | } |
| 170 | sum = exynos_dp_calc_edid_check_sum(edid); |
| 171 | if (sum != 0) { |
| 172 | dev_err(dp->dev, "EDID bad checksum!\n"); |
| 173 | return -EIO; |
| 174 | } |
| 175 | |
| 176 | exynos_dp_read_byte_from_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 177 | DP_TEST_REQUEST, |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 178 | &test_vector); |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 179 | if (test_vector & DP_TEST_LINK_EDID_READ) { |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 180 | exynos_dp_write_byte_to_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 181 | DP_TEST_EDID_CHECKSUM, |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 182 | edid[EDID_CHECKSUM]); |
| 183 | exynos_dp_write_byte_to_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 184 | DP_TEST_RESPONSE, |
| 185 | DP_TEST_EDID_CHECKSUM_WRITE); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 186 | } |
| 187 | } |
| 188 | |
| 189 | dev_err(dp->dev, "EDID Read success!\n"); |
| 190 | return 0; |
| 191 | } |
| 192 | |
| 193 | static int exynos_dp_handle_edid(struct exynos_dp_device *dp) |
| 194 | { |
| 195 | u8 buf[12]; |
| 196 | int i; |
| 197 | int retval; |
| 198 | |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 199 | /* Read DPCD DP_DPCD_REV~RECEIVE_PORT1_CAP_1 */ |
| 200 | retval = exynos_dp_read_bytes_from_dpcd(dp, DP_DPCD_REV, |
Sean Paul | 99f5415 | 2012-11-01 02:13:00 +0000 | [diff] [blame] | 201 | 12, buf); |
| 202 | if (retval) |
| 203 | return retval; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 204 | |
| 205 | /* Read EDID */ |
| 206 | for (i = 0; i < 3; i++) { |
| 207 | retval = exynos_dp_read_edid(dp); |
Sean Paul | 99f5415 | 2012-11-01 02:13:00 +0000 | [diff] [blame] | 208 | if (!retval) |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 209 | break; |
| 210 | } |
| 211 | |
| 212 | return retval; |
| 213 | } |
| 214 | |
| 215 | static void exynos_dp_enable_rx_to_enhanced_mode(struct exynos_dp_device *dp, |
| 216 | bool enable) |
| 217 | { |
| 218 | u8 data; |
| 219 | |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 220 | exynos_dp_read_byte_from_dpcd(dp, DP_LANE_COUNT_SET, &data); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 221 | |
| 222 | if (enable) |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 223 | exynos_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET, |
| 224 | DP_LANE_COUNT_ENHANCED_FRAME_EN | |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 225 | DPCD_LANE_COUNT_SET(data)); |
| 226 | else |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 227 | exynos_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET, |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 228 | DPCD_LANE_COUNT_SET(data)); |
| 229 | } |
| 230 | |
| 231 | static int exynos_dp_is_enhanced_mode_available(struct exynos_dp_device *dp) |
| 232 | { |
| 233 | u8 data; |
| 234 | int retval; |
| 235 | |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 236 | exynos_dp_read_byte_from_dpcd(dp, DP_MAX_LANE_COUNT, &data); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 237 | retval = DPCD_ENHANCED_FRAME_CAP(data); |
| 238 | |
| 239 | return retval; |
| 240 | } |
| 241 | |
| 242 | static void exynos_dp_set_enhanced_mode(struct exynos_dp_device *dp) |
| 243 | { |
| 244 | u8 data; |
| 245 | |
| 246 | data = exynos_dp_is_enhanced_mode_available(dp); |
| 247 | exynos_dp_enable_rx_to_enhanced_mode(dp, data); |
| 248 | exynos_dp_enable_enhanced_mode(dp, data); |
| 249 | } |
| 250 | |
| 251 | static void exynos_dp_training_pattern_dis(struct exynos_dp_device *dp) |
| 252 | { |
| 253 | exynos_dp_set_training_pattern(dp, DP_NONE); |
| 254 | |
| 255 | exynos_dp_write_byte_to_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 256 | DP_TRAINING_PATTERN_SET, |
| 257 | DP_TRAINING_PATTERN_DISABLE); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 258 | } |
| 259 | |
| 260 | static void exynos_dp_set_lane_lane_pre_emphasis(struct exynos_dp_device *dp, |
| 261 | int pre_emphasis, int lane) |
| 262 | { |
| 263 | switch (lane) { |
| 264 | case 0: |
| 265 | exynos_dp_set_lane0_pre_emphasis(dp, pre_emphasis); |
| 266 | break; |
| 267 | case 1: |
| 268 | exynos_dp_set_lane1_pre_emphasis(dp, pre_emphasis); |
| 269 | break; |
| 270 | |
| 271 | case 2: |
| 272 | exynos_dp_set_lane2_pre_emphasis(dp, pre_emphasis); |
| 273 | break; |
| 274 | |
| 275 | case 3: |
| 276 | exynos_dp_set_lane3_pre_emphasis(dp, pre_emphasis); |
| 277 | break; |
| 278 | } |
| 279 | } |
| 280 | |
Sean Paul | ace2d7f | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 281 | static int exynos_dp_link_start(struct exynos_dp_device *dp) |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 282 | { |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 283 | u8 buf[4]; |
Sean Paul | 49ce41f | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 284 | int lane, lane_count, pll_tries, retval; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 285 | |
| 286 | lane_count = dp->link_train.lane_count; |
| 287 | |
| 288 | dp->link_train.lt_state = CLOCK_RECOVERY; |
| 289 | dp->link_train.eq_loop = 0; |
| 290 | |
| 291 | for (lane = 0; lane < lane_count; lane++) |
| 292 | dp->link_train.cr_loop[lane] = 0; |
| 293 | |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 294 | /* Set link rate and count as you want to establish*/ |
| 295 | exynos_dp_set_link_bandwidth(dp, dp->link_train.link_rate); |
| 296 | exynos_dp_set_lane_count(dp, dp->link_train.lane_count); |
| 297 | |
| 298 | /* Setup RX configuration */ |
| 299 | buf[0] = dp->link_train.link_rate; |
| 300 | buf[1] = dp->link_train.lane_count; |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 301 | retval = exynos_dp_write_bytes_to_dpcd(dp, DP_LINK_BW_SET, |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 302 | 2, buf); |
Sean Paul | ace2d7f | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 303 | if (retval) |
| 304 | return retval; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 305 | |
| 306 | /* Set TX pre-emphasis to minimum */ |
| 307 | for (lane = 0; lane < lane_count; lane++) |
| 308 | exynos_dp_set_lane_lane_pre_emphasis(dp, |
| 309 | PRE_EMPHASIS_LEVEL_0, lane); |
| 310 | |
Sean Paul | 49ce41f | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 311 | /* Wait for PLL lock */ |
| 312 | pll_tries = 0; |
| 313 | while (exynos_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) { |
| 314 | if (pll_tries == DP_TIMEOUT_LOOP_COUNT) { |
| 315 | dev_err(dp->dev, "Wait for PLL lock timed out\n"); |
| 316 | return -ETIMEDOUT; |
| 317 | } |
| 318 | |
| 319 | pll_tries++; |
| 320 | usleep_range(90, 120); |
| 321 | } |
| 322 | |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 323 | /* Set training pattern 1 */ |
| 324 | exynos_dp_set_training_pattern(dp, TRAINING_PTN1); |
| 325 | |
| 326 | /* Set RX training pattern */ |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 327 | retval = exynos_dp_write_byte_to_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 328 | DP_TRAINING_PATTERN_SET, |
| 329 | DP_LINK_SCRAMBLING_DISABLE | DP_TRAINING_PATTERN_1); |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 330 | if (retval) |
| 331 | return retval; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 332 | |
| 333 | for (lane = 0; lane < lane_count; lane++) |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 334 | buf[lane] = DP_TRAIN_PRE_EMPHASIS_0 | |
| 335 | DP_TRAIN_VOLTAGE_SWING_400; |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 336 | |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 337 | retval = exynos_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET, |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 338 | lane_count, buf); |
Sean Paul | ace2d7f | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 339 | |
| 340 | return retval; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 341 | } |
| 342 | |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 343 | static unsigned char exynos_dp_get_lane_status(u8 link_status[2], int lane) |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 344 | { |
| 345 | int shift = (lane & 1) * 4; |
| 346 | u8 link_value = link_status[lane>>1]; |
| 347 | |
| 348 | return (link_value >> shift) & 0xf; |
| 349 | } |
| 350 | |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 351 | static int exynos_dp_clock_recovery_ok(u8 link_status[2], int lane_count) |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 352 | { |
| 353 | int lane; |
| 354 | u8 lane_status; |
| 355 | |
| 356 | for (lane = 0; lane < lane_count; lane++) { |
| 357 | lane_status = exynos_dp_get_lane_status(link_status, lane); |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 358 | if ((lane_status & DP_LANE_CR_DONE) == 0) |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 359 | return -EINVAL; |
| 360 | } |
| 361 | return 0; |
| 362 | } |
| 363 | |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 364 | static int exynos_dp_channel_eq_ok(u8 link_status[2], u8 link_align, |
| 365 | int lane_count) |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 366 | { |
| 367 | int lane; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 368 | u8 lane_status; |
| 369 | |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 370 | if ((link_align & DP_INTERLANE_ALIGN_DONE) == 0) |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 371 | return -EINVAL; |
| 372 | |
| 373 | for (lane = 0; lane < lane_count; lane++) { |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 374 | lane_status = exynos_dp_get_lane_status(link_status, lane); |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 375 | lane_status &= DP_CHANNEL_EQ_BITS; |
| 376 | if (lane_status != DP_CHANNEL_EQ_BITS) |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 377 | return -EINVAL; |
| 378 | } |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 379 | |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 380 | return 0; |
| 381 | } |
| 382 | |
| 383 | static unsigned char exynos_dp_get_adjust_request_voltage(u8 adjust_request[2], |
| 384 | int lane) |
| 385 | { |
| 386 | int shift = (lane & 1) * 4; |
| 387 | u8 link_value = adjust_request[lane>>1]; |
| 388 | |
| 389 | return (link_value >> shift) & 0x3; |
| 390 | } |
| 391 | |
| 392 | static unsigned char exynos_dp_get_adjust_request_pre_emphasis( |
| 393 | u8 adjust_request[2], |
| 394 | int lane) |
| 395 | { |
| 396 | int shift = (lane & 1) * 4; |
| 397 | u8 link_value = adjust_request[lane>>1]; |
| 398 | |
| 399 | return ((link_value >> shift) & 0xc) >> 2; |
| 400 | } |
| 401 | |
| 402 | static void exynos_dp_set_lane_link_training(struct exynos_dp_device *dp, |
| 403 | u8 training_lane_set, int lane) |
| 404 | { |
| 405 | switch (lane) { |
| 406 | case 0: |
| 407 | exynos_dp_set_lane0_link_training(dp, training_lane_set); |
| 408 | break; |
| 409 | case 1: |
| 410 | exynos_dp_set_lane1_link_training(dp, training_lane_set); |
| 411 | break; |
| 412 | |
| 413 | case 2: |
| 414 | exynos_dp_set_lane2_link_training(dp, training_lane_set); |
| 415 | break; |
| 416 | |
| 417 | case 3: |
| 418 | exynos_dp_set_lane3_link_training(dp, training_lane_set); |
| 419 | break; |
| 420 | } |
| 421 | } |
| 422 | |
| 423 | static unsigned int exynos_dp_get_lane_link_training( |
| 424 | struct exynos_dp_device *dp, |
| 425 | int lane) |
| 426 | { |
| 427 | u32 reg; |
| 428 | |
| 429 | switch (lane) { |
| 430 | case 0: |
| 431 | reg = exynos_dp_get_lane0_link_training(dp); |
| 432 | break; |
| 433 | case 1: |
| 434 | reg = exynos_dp_get_lane1_link_training(dp); |
| 435 | break; |
| 436 | case 2: |
| 437 | reg = exynos_dp_get_lane2_link_training(dp); |
| 438 | break; |
| 439 | case 3: |
| 440 | reg = exynos_dp_get_lane3_link_training(dp); |
| 441 | break; |
Jingoo Han | 64c43df | 2012-06-20 10:25:48 +0900 | [diff] [blame] | 442 | default: |
| 443 | WARN_ON(1); |
| 444 | return 0; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 445 | } |
| 446 | |
| 447 | return reg; |
| 448 | } |
| 449 | |
| 450 | static void exynos_dp_reduce_link_rate(struct exynos_dp_device *dp) |
| 451 | { |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 452 | exynos_dp_training_pattern_dis(dp); |
| 453 | exynos_dp_set_enhanced_mode(dp); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 454 | |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 455 | dp->link_train.lt_state = FAILED; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 456 | } |
| 457 | |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 458 | static void exynos_dp_get_adjust_training_lane(struct exynos_dp_device *dp, |
| 459 | u8 adjust_request[2]) |
| 460 | { |
| 461 | int lane, lane_count; |
| 462 | u8 voltage_swing, pre_emphasis, training_lane; |
| 463 | |
| 464 | lane_count = dp->link_train.lane_count; |
| 465 | for (lane = 0; lane < lane_count; lane++) { |
| 466 | voltage_swing = exynos_dp_get_adjust_request_voltage( |
| 467 | adjust_request, lane); |
| 468 | pre_emphasis = exynos_dp_get_adjust_request_pre_emphasis( |
| 469 | adjust_request, lane); |
| 470 | training_lane = DPCD_VOLTAGE_SWING_SET(voltage_swing) | |
| 471 | DPCD_PRE_EMPHASIS_SET(pre_emphasis); |
| 472 | |
| 473 | if (voltage_swing == VOLTAGE_LEVEL_3) |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 474 | training_lane |= DP_TRAIN_MAX_SWING_REACHED; |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 475 | if (pre_emphasis == PRE_EMPHASIS_LEVEL_3) |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 476 | training_lane |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED; |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 477 | |
| 478 | dp->link_train.training_lane[lane] = training_lane; |
| 479 | } |
| 480 | } |
| 481 | |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 482 | static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp) |
| 483 | { |
Sean Paul | ace2d7f | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 484 | int lane, lane_count, retval; |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 485 | u8 voltage_swing, pre_emphasis, training_lane; |
| 486 | u8 link_status[2], adjust_request[2]; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 487 | |
Jingoo Han | a2c81bc | 2012-07-18 18:50:59 +0900 | [diff] [blame] | 488 | usleep_range(100, 101); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 489 | |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 490 | lane_count = dp->link_train.lane_count; |
| 491 | |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 492 | retval = exynos_dp_read_bytes_from_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 493 | DP_LANE0_1_STATUS, 2, link_status); |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 494 | if (retval) |
| 495 | return retval; |
| 496 | |
| 497 | retval = exynos_dp_read_bytes_from_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 498 | DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request); |
Sean Paul | ace2d7f | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 499 | if (retval) |
| 500 | return retval; |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 501 | |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 502 | if (exynos_dp_clock_recovery_ok(link_status, lane_count) == 0) { |
| 503 | /* set training pattern 2 for EQ */ |
| 504 | exynos_dp_set_training_pattern(dp, TRAINING_PTN2); |
| 505 | |
Sean Paul | ace2d7f | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 506 | retval = exynos_dp_write_byte_to_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 507 | DP_TRAINING_PATTERN_SET, |
| 508 | DP_LINK_SCRAMBLING_DISABLE | |
| 509 | DP_TRAINING_PATTERN_2); |
Sean Paul | ace2d7f | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 510 | if (retval) |
| 511 | return retval; |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 512 | |
| 513 | dev_info(dp->dev, "Link Training Clock Recovery success\n"); |
| 514 | dp->link_train.lt_state = EQUALIZER_TRAINING; |
| 515 | } else { |
| 516 | for (lane = 0; lane < lane_count; lane++) { |
| 517 | training_lane = exynos_dp_get_lane_link_training( |
| 518 | dp, lane); |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 519 | voltage_swing = exynos_dp_get_adjust_request_voltage( |
| 520 | adjust_request, lane); |
| 521 | pre_emphasis = exynos_dp_get_adjust_request_pre_emphasis( |
| 522 | adjust_request, lane); |
| 523 | |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 524 | if (DPCD_VOLTAGE_SWING_GET(training_lane) == |
| 525 | voltage_swing && |
| 526 | DPCD_PRE_EMPHASIS_GET(training_lane) == |
| 527 | pre_emphasis) |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 528 | dp->link_train.cr_loop[lane]++; |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 529 | |
| 530 | if (dp->link_train.cr_loop[lane] == MAX_CR_LOOP || |
| 531 | voltage_swing == VOLTAGE_LEVEL_3 || |
| 532 | pre_emphasis == PRE_EMPHASIS_LEVEL_3) { |
| 533 | dev_err(dp->dev, "CR Max reached (%d,%d,%d)\n", |
| 534 | dp->link_train.cr_loop[lane], |
| 535 | voltage_swing, pre_emphasis); |
| 536 | exynos_dp_reduce_link_rate(dp); |
| 537 | return -EIO; |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 538 | } |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 539 | } |
| 540 | } |
| 541 | |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 542 | exynos_dp_get_adjust_training_lane(dp, adjust_request); |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 543 | |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 544 | for (lane = 0; lane < lane_count; lane++) |
| 545 | exynos_dp_set_lane_link_training(dp, |
| 546 | dp->link_train.training_lane[lane], lane); |
| 547 | |
| 548 | retval = exynos_dp_write_bytes_to_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 549 | DP_TRAINING_LANE0_SET, lane_count, |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 550 | dp->link_train.training_lane); |
| 551 | if (retval) |
| 552 | return retval; |
| 553 | |
| 554 | return retval; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 555 | } |
| 556 | |
| 557 | static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp) |
| 558 | { |
Sean Paul | ace2d7f | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 559 | int lane, lane_count, retval; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 560 | u32 reg; |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 561 | u8 link_align, link_status[2], adjust_request[2]; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 562 | |
Jingoo Han | a2c81bc | 2012-07-18 18:50:59 +0900 | [diff] [blame] | 563 | usleep_range(400, 401); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 564 | |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 565 | lane_count = dp->link_train.lane_count; |
| 566 | |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 567 | retval = exynos_dp_read_bytes_from_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 568 | DP_LANE0_1_STATUS, 2, link_status); |
Sean Paul | ace2d7f | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 569 | if (retval) |
| 570 | return retval; |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 571 | |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 572 | if (exynos_dp_clock_recovery_ok(link_status, lane_count)) { |
| 573 | exynos_dp_reduce_link_rate(dp); |
| 574 | return -EIO; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 575 | } |
| 576 | |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 577 | retval = exynos_dp_read_bytes_from_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 578 | DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request); |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 579 | if (retval) |
| 580 | return retval; |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 581 | |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 582 | retval = exynos_dp_read_byte_from_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 583 | DP_LANE_ALIGN_STATUS_UPDATED, &link_align); |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 584 | if (retval) |
| 585 | return retval; |
| 586 | |
| 587 | exynos_dp_get_adjust_training_lane(dp, adjust_request); |
| 588 | |
| 589 | if (!exynos_dp_channel_eq_ok(link_status, link_align, lane_count)) { |
| 590 | /* traing pattern Set to Normal */ |
| 591 | exynos_dp_training_pattern_dis(dp); |
| 592 | |
| 593 | dev_info(dp->dev, "Link Training success!\n"); |
| 594 | |
| 595 | exynos_dp_get_link_bandwidth(dp, ®); |
| 596 | dp->link_train.link_rate = reg; |
| 597 | dev_dbg(dp->dev, "final bandwidth = %.2x\n", |
| 598 | dp->link_train.link_rate); |
| 599 | |
| 600 | exynos_dp_get_lane_count(dp, ®); |
| 601 | dp->link_train.lane_count = reg; |
| 602 | dev_dbg(dp->dev, "final lane count = %.2x\n", |
| 603 | dp->link_train.lane_count); |
| 604 | |
| 605 | /* set enhanced mode if available */ |
| 606 | exynos_dp_set_enhanced_mode(dp); |
| 607 | dp->link_train.lt_state = FINISHED; |
| 608 | |
| 609 | return 0; |
| 610 | } |
| 611 | |
| 612 | /* not all locked */ |
| 613 | dp->link_train.eq_loop++; |
| 614 | |
| 615 | if (dp->link_train.eq_loop > MAX_EQ_LOOP) { |
| 616 | dev_err(dp->dev, "EQ Max loop\n"); |
| 617 | exynos_dp_reduce_link_rate(dp); |
| 618 | return -EIO; |
| 619 | } |
| 620 | |
| 621 | for (lane = 0; lane < lane_count; lane++) |
| 622 | exynos_dp_set_lane_link_training(dp, |
| 623 | dp->link_train.training_lane[lane], lane); |
| 624 | |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 625 | retval = exynos_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET, |
Sean Paul | fadec4b | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 626 | lane_count, dp->link_train.training_lane); |
| 627 | |
| 628 | return retval; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 629 | } |
| 630 | |
| 631 | static void exynos_dp_get_max_rx_bandwidth(struct exynos_dp_device *dp, |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 632 | u8 *bandwidth) |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 633 | { |
| 634 | u8 data; |
| 635 | |
| 636 | /* |
| 637 | * For DP rev.1.1, Maximum link rate of Main Link lanes |
| 638 | * 0x06 = 1.62 Gbps, 0x0a = 2.7 Gbps |
| 639 | */ |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 640 | exynos_dp_read_byte_from_dpcd(dp, DP_MAX_LINK_RATE, &data); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 641 | *bandwidth = data; |
| 642 | } |
| 643 | |
| 644 | static void exynos_dp_get_max_rx_lane_count(struct exynos_dp_device *dp, |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 645 | u8 *lane_count) |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 646 | { |
| 647 | u8 data; |
| 648 | |
| 649 | /* |
| 650 | * For DP rev.1.1, Maximum number of Main Link lanes |
| 651 | * 0x01 = 1 lane, 0x02 = 2 lanes, 0x04 = 4 lanes |
| 652 | */ |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 653 | exynos_dp_read_byte_from_dpcd(dp, DP_MAX_LANE_COUNT, &data); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 654 | *lane_count = DPCD_MAX_LANE_COUNT(data); |
| 655 | } |
| 656 | |
| 657 | static void exynos_dp_init_training(struct exynos_dp_device *dp, |
| 658 | enum link_lane_count_type max_lane, |
| 659 | enum link_rate_type max_rate) |
| 660 | { |
| 661 | /* |
| 662 | * MACRO_RST must be applied after the PLL_LOCK to avoid |
| 663 | * the DP inter pair skew issue for at least 10 us |
| 664 | */ |
| 665 | exynos_dp_reset_macro(dp); |
| 666 | |
| 667 | /* Initialize by reading RX's DPCD */ |
| 668 | exynos_dp_get_max_rx_bandwidth(dp, &dp->link_train.link_rate); |
| 669 | exynos_dp_get_max_rx_lane_count(dp, &dp->link_train.lane_count); |
| 670 | |
| 671 | if ((dp->link_train.link_rate != LINK_RATE_1_62GBPS) && |
| 672 | (dp->link_train.link_rate != LINK_RATE_2_70GBPS)) { |
| 673 | dev_err(dp->dev, "Rx Max Link Rate is abnormal :%x !\n", |
| 674 | dp->link_train.link_rate); |
| 675 | dp->link_train.link_rate = LINK_RATE_1_62GBPS; |
| 676 | } |
| 677 | |
| 678 | if (dp->link_train.lane_count == 0) { |
| 679 | dev_err(dp->dev, "Rx Max Lane count is abnormal :%x !\n", |
| 680 | dp->link_train.lane_count); |
| 681 | dp->link_train.lane_count = (u8)LANE_COUNT1; |
| 682 | } |
| 683 | |
| 684 | /* Setup TX lane count & rate */ |
| 685 | if (dp->link_train.lane_count > max_lane) |
| 686 | dp->link_train.lane_count = max_lane; |
| 687 | if (dp->link_train.link_rate > max_rate) |
| 688 | dp->link_train.link_rate = max_rate; |
| 689 | |
| 690 | /* All DP analog module power up */ |
| 691 | exynos_dp_set_analog_power_down(dp, POWER_ALL, 0); |
| 692 | } |
| 693 | |
| 694 | static int exynos_dp_sw_link_training(struct exynos_dp_device *dp) |
| 695 | { |
Sean Paul | ace2d7f | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 696 | int retval = 0, training_finished = 0; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 697 | |
| 698 | dp->link_train.lt_state = START; |
| 699 | |
| 700 | /* Process here */ |
Sean Paul | ace2d7f | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 701 | while (!retval && !training_finished) { |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 702 | switch (dp->link_train.lt_state) { |
| 703 | case START: |
Sean Paul | ace2d7f | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 704 | retval = exynos_dp_link_start(dp); |
| 705 | if (retval) |
| 706 | dev_err(dp->dev, "LT link start failed!\n"); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 707 | break; |
| 708 | case CLOCK_RECOVERY: |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 709 | retval = exynos_dp_process_clock_recovery(dp); |
| 710 | if (retval) |
| 711 | dev_err(dp->dev, "LT CR failed!\n"); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 712 | break; |
| 713 | case EQUALIZER_TRAINING: |
Jingoo Han | d5c0eed | 2012-07-19 13:52:59 +0900 | [diff] [blame] | 714 | retval = exynos_dp_process_equalizer_training(dp); |
| 715 | if (retval) |
| 716 | dev_err(dp->dev, "LT EQ failed!\n"); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 717 | break; |
| 718 | case FINISHED: |
| 719 | training_finished = 1; |
| 720 | break; |
| 721 | case FAILED: |
| 722 | return -EREMOTEIO; |
| 723 | } |
| 724 | } |
Sean Paul | ace2d7f | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 725 | if (retval) |
| 726 | dev_err(dp->dev, "eDP link training failed (%d)\n", retval); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 727 | |
| 728 | return retval; |
| 729 | } |
| 730 | |
| 731 | static int exynos_dp_set_link_train(struct exynos_dp_device *dp, |
| 732 | u32 count, |
| 733 | u32 bwtype) |
| 734 | { |
| 735 | int i; |
| 736 | int retval; |
| 737 | |
| 738 | for (i = 0; i < DP_TIMEOUT_LOOP_COUNT; i++) { |
| 739 | exynos_dp_init_training(dp, count, bwtype); |
| 740 | retval = exynos_dp_sw_link_training(dp); |
| 741 | if (retval == 0) |
| 742 | break; |
| 743 | |
Jingoo Han | a2c81bc | 2012-07-18 18:50:59 +0900 | [diff] [blame] | 744 | usleep_range(100, 110); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 745 | } |
| 746 | |
| 747 | return retval; |
| 748 | } |
| 749 | |
Ajay Kumar | 3fcb6eb | 2012-11-09 14:05:06 +0900 | [diff] [blame] | 750 | static int exynos_dp_config_video(struct exynos_dp_device *dp) |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 751 | { |
| 752 | int retval = 0; |
| 753 | int timeout_loop = 0; |
| 754 | int done_count = 0; |
| 755 | |
Ajay Kumar | 3fcb6eb | 2012-11-09 14:05:06 +0900 | [diff] [blame] | 756 | exynos_dp_config_video_slave_mode(dp); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 757 | |
Ajay Kumar | 3fcb6eb | 2012-11-09 14:05:06 +0900 | [diff] [blame] | 758 | exynos_dp_set_video_color_format(dp); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 759 | |
| 760 | if (exynos_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) { |
| 761 | dev_err(dp->dev, "PLL is not locked yet.\n"); |
| 762 | return -EINVAL; |
| 763 | } |
| 764 | |
| 765 | for (;;) { |
| 766 | timeout_loop++; |
| 767 | if (exynos_dp_is_slave_video_stream_clock_on(dp) == 0) |
| 768 | break; |
| 769 | if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) { |
| 770 | dev_err(dp->dev, "Timeout of video streamclk ok\n"); |
| 771 | return -ETIMEDOUT; |
| 772 | } |
| 773 | |
Jingoo Han | a2c81bc | 2012-07-18 18:50:59 +0900 | [diff] [blame] | 774 | usleep_range(1, 2); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 775 | } |
| 776 | |
| 777 | /* Set to use the register calculated M/N video */ |
| 778 | exynos_dp_set_video_cr_mn(dp, CALCULATED_M, 0, 0); |
| 779 | |
| 780 | /* For video bist, Video timing must be generated by register */ |
| 781 | exynos_dp_set_video_timing_mode(dp, VIDEO_TIMING_FROM_CAPTURE); |
| 782 | |
| 783 | /* Disable video mute */ |
| 784 | exynos_dp_enable_video_mute(dp, 0); |
| 785 | |
| 786 | /* Configure video slave mode */ |
| 787 | exynos_dp_enable_video_master(dp, 0); |
| 788 | |
| 789 | /* Enable video */ |
| 790 | exynos_dp_start_video(dp); |
| 791 | |
| 792 | timeout_loop = 0; |
| 793 | |
| 794 | for (;;) { |
| 795 | timeout_loop++; |
| 796 | if (exynos_dp_is_video_stream_on(dp) == 0) { |
| 797 | done_count++; |
| 798 | if (done_count > 10) |
| 799 | break; |
| 800 | } else if (done_count) { |
| 801 | done_count = 0; |
| 802 | } |
| 803 | if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) { |
| 804 | dev_err(dp->dev, "Timeout of video streamclk ok\n"); |
| 805 | return -ETIMEDOUT; |
| 806 | } |
| 807 | |
Jingoo Han | a2c81bc | 2012-07-18 18:50:59 +0900 | [diff] [blame] | 808 | usleep_range(1000, 1001); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 809 | } |
| 810 | |
| 811 | if (retval != 0) |
| 812 | dev_err(dp->dev, "Video stream is not detected!\n"); |
| 813 | |
| 814 | return retval; |
| 815 | } |
| 816 | |
| 817 | static void exynos_dp_enable_scramble(struct exynos_dp_device *dp, bool enable) |
| 818 | { |
| 819 | u8 data; |
| 820 | |
| 821 | if (enable) { |
| 822 | exynos_dp_enable_scrambling(dp); |
| 823 | |
| 824 | exynos_dp_read_byte_from_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 825 | DP_TRAINING_PATTERN_SET, |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 826 | &data); |
| 827 | exynos_dp_write_byte_to_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 828 | DP_TRAINING_PATTERN_SET, |
| 829 | (u8)(data & ~DP_LINK_SCRAMBLING_DISABLE)); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 830 | } else { |
| 831 | exynos_dp_disable_scrambling(dp); |
| 832 | |
| 833 | exynos_dp_read_byte_from_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 834 | DP_TRAINING_PATTERN_SET, |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 835 | &data); |
| 836 | exynos_dp_write_byte_to_dpcd(dp, |
Jingoo Han | 073ea2a | 2014-05-07 20:44:51 +0900 | [diff] [blame] | 837 | DP_TRAINING_PATTERN_SET, |
| 838 | (u8)(data | DP_LINK_SCRAMBLING_DISABLE)); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 839 | } |
| 840 | } |
| 841 | |
| 842 | static irqreturn_t exynos_dp_irq_handler(int irq, void *arg) |
| 843 | { |
| 844 | struct exynos_dp_device *dp = arg; |
| 845 | |
Sean Paul | c30ffb9 | 2012-11-01 19:13:46 +0900 | [diff] [blame] | 846 | enum dp_irq_type irq_type; |
| 847 | |
| 848 | irq_type = exynos_dp_get_irq_type(dp); |
| 849 | switch (irq_type) { |
| 850 | case DP_IRQ_TYPE_HP_CABLE_IN: |
| 851 | dev_dbg(dp->dev, "Received irq - cable in\n"); |
| 852 | schedule_work(&dp->hotplug_work); |
| 853 | exynos_dp_clear_hotplug_interrupts(dp); |
| 854 | break; |
| 855 | case DP_IRQ_TYPE_HP_CABLE_OUT: |
| 856 | dev_dbg(dp->dev, "Received irq - cable out\n"); |
| 857 | exynos_dp_clear_hotplug_interrupts(dp); |
| 858 | break; |
| 859 | case DP_IRQ_TYPE_HP_CHANGE: |
| 860 | /* |
| 861 | * We get these change notifications once in a while, but there |
| 862 | * is nothing we can do with them. Just ignore it for now and |
| 863 | * only handle cable changes. |
| 864 | */ |
| 865 | dev_dbg(dp->dev, "Received irq - hotplug change; ignoring.\n"); |
| 866 | exynos_dp_clear_hotplug_interrupts(dp); |
| 867 | break; |
| 868 | default: |
| 869 | dev_err(dp->dev, "Received irq - unknown type!\n"); |
| 870 | break; |
| 871 | } |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 872 | return IRQ_HANDLED; |
| 873 | } |
| 874 | |
Sean Paul | 784fa9a | 2012-11-09 13:55:08 +0900 | [diff] [blame] | 875 | static void exynos_dp_hotplug(struct work_struct *work) |
| 876 | { |
| 877 | struct exynos_dp_device *dp; |
Sean Paul | 784fa9a | 2012-11-09 13:55:08 +0900 | [diff] [blame] | 878 | |
| 879 | dp = container_of(work, struct exynos_dp_device, hotplug_work); |
| 880 | |
Ajay Kumar | 4deabfa | 2014-07-31 23:12:13 +0530 | [diff] [blame^] | 881 | if (dp->drm_dev) |
| 882 | drm_helper_hpd_irq_event(dp->drm_dev); |
| 883 | } |
| 884 | |
| 885 | static void exynos_dp_commit(struct exynos_drm_display *display) |
| 886 | { |
| 887 | struct exynos_dp_device *dp = display->ctx; |
| 888 | int ret; |
| 889 | |
Sean Paul | 784fa9a | 2012-11-09 13:55:08 +0900 | [diff] [blame] | 890 | ret = exynos_dp_detect_hpd(dp); |
| 891 | if (ret) { |
Sean Paul | c30ffb9 | 2012-11-01 19:13:46 +0900 | [diff] [blame] | 892 | /* Cable has been disconnected, we're done */ |
Sean Paul | 784fa9a | 2012-11-09 13:55:08 +0900 | [diff] [blame] | 893 | return; |
| 894 | } |
| 895 | |
| 896 | ret = exynos_dp_handle_edid(dp); |
| 897 | if (ret) { |
| 898 | dev_err(dp->dev, "unable to handle edid\n"); |
| 899 | return; |
| 900 | } |
| 901 | |
| 902 | ret = exynos_dp_set_link_train(dp, dp->video_info->lane_count, |
| 903 | dp->video_info->link_rate); |
| 904 | if (ret) { |
| 905 | dev_err(dp->dev, "unable to do link train\n"); |
| 906 | return; |
| 907 | } |
| 908 | |
| 909 | exynos_dp_enable_scramble(dp, 1); |
| 910 | exynos_dp_enable_rx_to_enhanced_mode(dp, 1); |
| 911 | exynos_dp_enable_enhanced_mode(dp, 1); |
| 912 | |
| 913 | exynos_dp_set_lane_count(dp, dp->video_info->lane_count); |
| 914 | exynos_dp_set_link_bandwidth(dp, dp->video_info->link_rate); |
| 915 | |
| 916 | exynos_dp_init_video(dp); |
Ajay Kumar | 3fcb6eb | 2012-11-09 14:05:06 +0900 | [diff] [blame] | 917 | ret = exynos_dp_config_video(dp); |
Sean Paul | 784fa9a | 2012-11-09 13:55:08 +0900 | [diff] [blame] | 918 | if (ret) |
| 919 | dev_err(dp->dev, "unable to config video\n"); |
| 920 | } |
| 921 | |
Sean Paul | caa5d1e | 2014-01-30 16:19:30 -0500 | [diff] [blame] | 922 | static enum drm_connector_status exynos_dp_detect( |
| 923 | struct drm_connector *connector, bool force) |
Sean Paul | 1417f10 | 2014-01-30 16:19:23 -0500 | [diff] [blame] | 924 | { |
Sean Paul | caa5d1e | 2014-01-30 16:19:30 -0500 | [diff] [blame] | 925 | return connector_status_connected; |
Sean Paul | 1417f10 | 2014-01-30 16:19:23 -0500 | [diff] [blame] | 926 | } |
| 927 | |
Sean Paul | caa5d1e | 2014-01-30 16:19:30 -0500 | [diff] [blame] | 928 | static void exynos_dp_connector_destroy(struct drm_connector *connector) |
| 929 | { |
| 930 | } |
| 931 | |
| 932 | static struct drm_connector_funcs exynos_dp_connector_funcs = { |
| 933 | .dpms = drm_helper_connector_dpms, |
| 934 | .fill_modes = drm_helper_probe_single_connector_modes, |
| 935 | .detect = exynos_dp_detect, |
| 936 | .destroy = exynos_dp_connector_destroy, |
| 937 | }; |
| 938 | |
| 939 | static int exynos_dp_get_modes(struct drm_connector *connector) |
| 940 | { |
| 941 | struct exynos_dp_device *dp = ctx_from_connector(connector); |
| 942 | struct drm_display_mode *mode; |
| 943 | |
| 944 | mode = drm_mode_create(connector->dev); |
| 945 | if (!mode) { |
| 946 | DRM_ERROR("failed to create a new display mode.\n"); |
| 947 | return 0; |
| 948 | } |
| 949 | |
| 950 | drm_display_mode_from_videomode(&dp->panel.vm, mode); |
| 951 | mode->width_mm = dp->panel.width_mm; |
| 952 | mode->height_mm = dp->panel.height_mm; |
| 953 | connector->display_info.width_mm = mode->width_mm; |
| 954 | connector->display_info.height_mm = mode->height_mm; |
| 955 | |
| 956 | mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; |
| 957 | drm_mode_set_name(mode); |
| 958 | drm_mode_probed_add(connector, mode); |
| 959 | |
| 960 | return 1; |
| 961 | } |
| 962 | |
Sean Paul | caa5d1e | 2014-01-30 16:19:30 -0500 | [diff] [blame] | 963 | static struct drm_encoder *exynos_dp_best_encoder( |
| 964 | struct drm_connector *connector) |
| 965 | { |
| 966 | struct exynos_dp_device *dp = ctx_from_connector(connector); |
| 967 | |
| 968 | return dp->encoder; |
| 969 | } |
| 970 | |
| 971 | static struct drm_connector_helper_funcs exynos_dp_connector_helper_funcs = { |
| 972 | .get_modes = exynos_dp_get_modes, |
Sean Paul | caa5d1e | 2014-01-30 16:19:30 -0500 | [diff] [blame] | 973 | .best_encoder = exynos_dp_best_encoder, |
| 974 | }; |
| 975 | |
Sean Paul | 1634ba2 | 2014-02-24 19:20:15 +0900 | [diff] [blame] | 976 | static bool find_bridge(const char *compat, struct bridge_init *bridge) |
| 977 | { |
| 978 | bridge->client = NULL; |
| 979 | bridge->node = of_find_compatible_node(NULL, NULL, compat); |
| 980 | if (!bridge->node) |
| 981 | return false; |
| 982 | |
| 983 | bridge->client = of_find_i2c_device_by_node(bridge->node); |
| 984 | if (!bridge->client) |
| 985 | return false; |
| 986 | |
| 987 | return true; |
| 988 | } |
| 989 | |
| 990 | /* returns the number of bridges attached */ |
| 991 | static int exynos_drm_attach_lcd_bridge(struct drm_device *dev, |
| 992 | struct drm_encoder *encoder) |
| 993 | { |
| 994 | struct bridge_init bridge; |
| 995 | int ret; |
| 996 | |
| 997 | if (find_bridge("nxp,ptn3460", &bridge)) { |
| 998 | ret = ptn3460_init(dev, encoder, bridge.client, bridge.node); |
| 999 | if (!ret) |
| 1000 | return 1; |
| 1001 | } |
| 1002 | return 0; |
| 1003 | } |
| 1004 | |
Sean Paul | caa5d1e | 2014-01-30 16:19:30 -0500 | [diff] [blame] | 1005 | static int exynos_dp_create_connector(struct exynos_drm_display *display, |
| 1006 | struct drm_encoder *encoder) |
Sean Paul | 1417f10 | 2014-01-30 16:19:23 -0500 | [diff] [blame] | 1007 | { |
Sean Paul | caa5d1e | 2014-01-30 16:19:30 -0500 | [diff] [blame] | 1008 | struct exynos_dp_device *dp = display->ctx; |
| 1009 | struct drm_connector *connector = &dp->connector; |
| 1010 | int ret; |
| 1011 | |
| 1012 | dp->encoder = encoder; |
Sean Paul | 1634ba2 | 2014-02-24 19:20:15 +0900 | [diff] [blame] | 1013 | |
| 1014 | /* Pre-empt DP connector creation if there's a bridge */ |
| 1015 | ret = exynos_drm_attach_lcd_bridge(dp->drm_dev, encoder); |
| 1016 | if (ret) |
| 1017 | return 0; |
| 1018 | |
Sean Paul | caa5d1e | 2014-01-30 16:19:30 -0500 | [diff] [blame] | 1019 | connector->polled = DRM_CONNECTOR_POLL_HPD; |
| 1020 | |
| 1021 | ret = drm_connector_init(dp->drm_dev, connector, |
| 1022 | &exynos_dp_connector_funcs, DRM_MODE_CONNECTOR_eDP); |
| 1023 | if (ret) { |
| 1024 | DRM_ERROR("Failed to initialize connector with drm\n"); |
| 1025 | return ret; |
| 1026 | } |
| 1027 | |
| 1028 | drm_connector_helper_add(connector, &exynos_dp_connector_helper_funcs); |
| 1029 | drm_sysfs_connector_add(connector); |
| 1030 | drm_mode_connector_attach_encoder(connector, encoder); |
| 1031 | |
Sean Paul | 1417f10 | 2014-01-30 16:19:23 -0500 | [diff] [blame] | 1032 | return 0; |
| 1033 | } |
| 1034 | |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1035 | static void exynos_dp_phy_init(struct exynos_dp_device *dp) |
| 1036 | { |
| 1037 | if (dp->phy) { |
| 1038 | phy_power_on(dp->phy); |
| 1039 | } else if (dp->phy_addr) { |
| 1040 | u32 reg; |
| 1041 | |
| 1042 | reg = __raw_readl(dp->phy_addr); |
| 1043 | reg |= dp->enable_mask; |
| 1044 | __raw_writel(reg, dp->phy_addr); |
| 1045 | } |
| 1046 | } |
| 1047 | |
| 1048 | static void exynos_dp_phy_exit(struct exynos_dp_device *dp) |
| 1049 | { |
| 1050 | if (dp->phy) { |
| 1051 | phy_power_off(dp->phy); |
| 1052 | } else if (dp->phy_addr) { |
| 1053 | u32 reg; |
| 1054 | |
| 1055 | reg = __raw_readl(dp->phy_addr); |
| 1056 | reg &= ~(dp->enable_mask); |
| 1057 | __raw_writel(reg, dp->phy_addr); |
| 1058 | } |
| 1059 | } |
| 1060 | |
Ajay Kumar | 4deabfa | 2014-07-31 23:12:13 +0530 | [diff] [blame^] | 1061 | static void exynos_dp_poweron(struct exynos_drm_display *display) |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1062 | { |
Ajay Kumar | 4deabfa | 2014-07-31 23:12:13 +0530 | [diff] [blame^] | 1063 | struct exynos_dp_device *dp = display->ctx; |
| 1064 | |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1065 | if (dp->dpms_mode == DRM_MODE_DPMS_ON) |
| 1066 | return; |
| 1067 | |
| 1068 | clk_prepare_enable(dp->clock); |
| 1069 | exynos_dp_phy_init(dp); |
| 1070 | exynos_dp_init_dp(dp); |
| 1071 | enable_irq(dp->irq); |
Ajay Kumar | 4deabfa | 2014-07-31 23:12:13 +0530 | [diff] [blame^] | 1072 | exynos_dp_commit(display); |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1073 | } |
| 1074 | |
Ajay Kumar | 4deabfa | 2014-07-31 23:12:13 +0530 | [diff] [blame^] | 1075 | static void exynos_dp_poweroff(struct exynos_drm_display *display) |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1076 | { |
Ajay Kumar | 4deabfa | 2014-07-31 23:12:13 +0530 | [diff] [blame^] | 1077 | struct exynos_dp_device *dp = display->ctx; |
| 1078 | |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1079 | if (dp->dpms_mode != DRM_MODE_DPMS_ON) |
| 1080 | return; |
| 1081 | |
| 1082 | disable_irq(dp->irq); |
| 1083 | flush_work(&dp->hotplug_work); |
| 1084 | exynos_dp_phy_exit(dp); |
| 1085 | clk_disable_unprepare(dp->clock); |
| 1086 | } |
| 1087 | |
| 1088 | static void exynos_dp_dpms(struct exynos_drm_display *display, int mode) |
| 1089 | { |
| 1090 | struct exynos_dp_device *dp = display->ctx; |
| 1091 | |
| 1092 | switch (mode) { |
| 1093 | case DRM_MODE_DPMS_ON: |
Ajay Kumar | 4deabfa | 2014-07-31 23:12:13 +0530 | [diff] [blame^] | 1094 | exynos_dp_poweron(display); |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1095 | break; |
| 1096 | case DRM_MODE_DPMS_STANDBY: |
| 1097 | case DRM_MODE_DPMS_SUSPEND: |
| 1098 | case DRM_MODE_DPMS_OFF: |
Ajay Kumar | 4deabfa | 2014-07-31 23:12:13 +0530 | [diff] [blame^] | 1099 | exynos_dp_poweroff(display); |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1100 | break; |
| 1101 | default: |
| 1102 | break; |
Damien Lespiau | 10d9b4e | 2014-06-09 14:21:08 +0100 | [diff] [blame] | 1103 | } |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1104 | dp->dpms_mode = mode; |
| 1105 | } |
| 1106 | |
Sean Paul | 1417f10 | 2014-01-30 16:19:23 -0500 | [diff] [blame] | 1107 | static struct exynos_drm_display_ops exynos_dp_display_ops = { |
Sean Paul | caa5d1e | 2014-01-30 16:19:30 -0500 | [diff] [blame] | 1108 | .create_connector = exynos_dp_create_connector, |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1109 | .dpms = exynos_dp_dpms, |
Ajay Kumar | 4deabfa | 2014-07-31 23:12:13 +0530 | [diff] [blame^] | 1110 | .commit = exynos_dp_commit, |
Sean Paul | 1417f10 | 2014-01-30 16:19:23 -0500 | [diff] [blame] | 1111 | }; |
| 1112 | |
| 1113 | static struct exynos_drm_display exynos_dp_display = { |
| 1114 | .type = EXYNOS_DISPLAY_TYPE_LCD, |
| 1115 | .ops = &exynos_dp_display_ops, |
| 1116 | }; |
| 1117 | |
Jingoo Han | f9b1e01 | 2013-10-16 21:58:15 +0530 | [diff] [blame] | 1118 | static struct video_info *exynos_dp_dt_parse_pdata(struct device *dev) |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1119 | { |
| 1120 | struct device_node *dp_node = dev->of_node; |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1121 | struct video_info *dp_video_config; |
| 1122 | |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1123 | dp_video_config = devm_kzalloc(dev, |
| 1124 | sizeof(*dp_video_config), GFP_KERNEL); |
Jingoo Han | 7a5b6827 | 2014-04-17 19:08:14 +0900 | [diff] [blame] | 1125 | if (!dp_video_config) |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1126 | return ERR_PTR(-ENOMEM); |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1127 | |
| 1128 | dp_video_config->h_sync_polarity = |
| 1129 | of_property_read_bool(dp_node, "hsync-active-high"); |
| 1130 | |
| 1131 | dp_video_config->v_sync_polarity = |
| 1132 | of_property_read_bool(dp_node, "vsync-active-high"); |
| 1133 | |
| 1134 | dp_video_config->interlaced = |
| 1135 | of_property_read_bool(dp_node, "interlaced"); |
| 1136 | |
| 1137 | if (of_property_read_u32(dp_node, "samsung,color-space", |
| 1138 | &dp_video_config->color_space)) { |
| 1139 | dev_err(dev, "failed to get color-space\n"); |
| 1140 | return ERR_PTR(-EINVAL); |
| 1141 | } |
| 1142 | |
| 1143 | if (of_property_read_u32(dp_node, "samsung,dynamic-range", |
| 1144 | &dp_video_config->dynamic_range)) { |
| 1145 | dev_err(dev, "failed to get dynamic-range\n"); |
| 1146 | return ERR_PTR(-EINVAL); |
| 1147 | } |
| 1148 | |
| 1149 | if (of_property_read_u32(dp_node, "samsung,ycbcr-coeff", |
| 1150 | &dp_video_config->ycbcr_coeff)) { |
| 1151 | dev_err(dev, "failed to get ycbcr-coeff\n"); |
| 1152 | return ERR_PTR(-EINVAL); |
| 1153 | } |
| 1154 | |
| 1155 | if (of_property_read_u32(dp_node, "samsung,color-depth", |
| 1156 | &dp_video_config->color_depth)) { |
| 1157 | dev_err(dev, "failed to get color-depth\n"); |
| 1158 | return ERR_PTR(-EINVAL); |
| 1159 | } |
| 1160 | |
| 1161 | if (of_property_read_u32(dp_node, "samsung,link-rate", |
| 1162 | &dp_video_config->link_rate)) { |
| 1163 | dev_err(dev, "failed to get link-rate\n"); |
| 1164 | return ERR_PTR(-EINVAL); |
| 1165 | } |
| 1166 | |
| 1167 | if (of_property_read_u32(dp_node, "samsung,lane-count", |
| 1168 | &dp_video_config->lane_count)) { |
| 1169 | dev_err(dev, "failed to get lane-count\n"); |
| 1170 | return ERR_PTR(-EINVAL); |
| 1171 | } |
| 1172 | |
Jingoo Han | f9b1e01 | 2013-10-16 21:58:15 +0530 | [diff] [blame] | 1173 | return dp_video_config; |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1174 | } |
| 1175 | |
| 1176 | static int exynos_dp_dt_parse_phydata(struct exynos_dp_device *dp) |
| 1177 | { |
Jingoo Han | d3ed970 | 2013-02-21 16:42:37 -0800 | [diff] [blame] | 1178 | struct device_node *dp_phy_node = of_node_get(dp->dev->of_node); |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1179 | u32 phy_base; |
Jingoo Han | d3ed970 | 2013-02-21 16:42:37 -0800 | [diff] [blame] | 1180 | int ret = 0; |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1181 | |
Jingoo Han | d3ed970 | 2013-02-21 16:42:37 -0800 | [diff] [blame] | 1182 | dp_phy_node = of_find_node_by_name(dp_phy_node, "dptx-phy"); |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1183 | if (!dp_phy_node) { |
Jingoo Han | 8114fab | 2013-10-16 21:58:16 +0530 | [diff] [blame] | 1184 | dp->phy = devm_phy_get(dp->dev, "dp"); |
Sachin Kamat | 97f98a3 | 2014-05-29 11:26:24 +0530 | [diff] [blame] | 1185 | return PTR_ERR_OR_ZERO(dp->phy); |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1186 | } |
| 1187 | |
| 1188 | if (of_property_read_u32(dp_phy_node, "reg", &phy_base)) { |
Masanari Iida | 1051e9b | 2013-03-31 01:23:50 +0900 | [diff] [blame] | 1189 | dev_err(dp->dev, "failed to get reg for dptx-phy\n"); |
Jingoo Han | d3ed970 | 2013-02-21 16:42:37 -0800 | [diff] [blame] | 1190 | ret = -EINVAL; |
| 1191 | goto err; |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1192 | } |
| 1193 | |
| 1194 | if (of_property_read_u32(dp_phy_node, "samsung,enable-mask", |
| 1195 | &dp->enable_mask)) { |
Masanari Iida | 1051e9b | 2013-03-31 01:23:50 +0900 | [diff] [blame] | 1196 | dev_err(dp->dev, "failed to get enable-mask for dptx-phy\n"); |
Jingoo Han | d3ed970 | 2013-02-21 16:42:37 -0800 | [diff] [blame] | 1197 | ret = -EINVAL; |
| 1198 | goto err; |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1199 | } |
| 1200 | |
| 1201 | dp->phy_addr = ioremap(phy_base, SZ_4); |
| 1202 | if (!dp->phy_addr) { |
| 1203 | dev_err(dp->dev, "failed to ioremap dp-phy\n"); |
Jingoo Han | d3ed970 | 2013-02-21 16:42:37 -0800 | [diff] [blame] | 1204 | ret = -ENOMEM; |
| 1205 | goto err; |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1206 | } |
| 1207 | |
Jingoo Han | d3ed970 | 2013-02-21 16:42:37 -0800 | [diff] [blame] | 1208 | err: |
| 1209 | of_node_put(dp_phy_node); |
| 1210 | |
| 1211 | return ret; |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1212 | } |
| 1213 | |
Sean Paul | 1417f10 | 2014-01-30 16:19:23 -0500 | [diff] [blame] | 1214 | static int exynos_dp_dt_parse_panel(struct exynos_dp_device *dp) |
| 1215 | { |
| 1216 | int ret; |
| 1217 | |
| 1218 | ret = of_get_videomode(dp->dev->of_node, &dp->panel.vm, |
| 1219 | OF_USE_NATIVE_MODE); |
| 1220 | if (ret) { |
| 1221 | DRM_ERROR("failed: of_get_videomode() : %d\n", ret); |
| 1222 | return ret; |
| 1223 | } |
| 1224 | return 0; |
| 1225 | } |
| 1226 | |
Inki Dae | f37cd5e | 2014-05-09 14:25:20 +0900 | [diff] [blame] | 1227 | static int exynos_dp_bind(struct device *dev, struct device *master, void *data) |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1228 | { |
Inki Dae | f37cd5e | 2014-05-09 14:25:20 +0900 | [diff] [blame] | 1229 | struct platform_device *pdev = to_platform_device(dev); |
| 1230 | struct drm_device *drm_dev = data; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1231 | struct resource *res; |
| 1232 | struct exynos_dp_device *dp; |
Andrew Bresticker | b8b5247 | 2014-04-22 04:09:10 +0530 | [diff] [blame] | 1233 | unsigned int irq_flags; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1234 | |
| 1235 | int ret = 0; |
| 1236 | |
Jingoo Han | 4d10ecf8 | 2012-05-25 16:20:45 +0900 | [diff] [blame] | 1237 | dp = devm_kzalloc(&pdev->dev, sizeof(struct exynos_dp_device), |
| 1238 | GFP_KERNEL); |
Jingoo Han | 7a5b6827 | 2014-04-17 19:08:14 +0900 | [diff] [blame] | 1239 | if (!dp) |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1240 | return -ENOMEM; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1241 | |
| 1242 | dp->dev = &pdev->dev; |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1243 | dp->dpms_mode = DRM_MODE_DPMS_OFF; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1244 | |
Jingoo Han | f9b1e01 | 2013-10-16 21:58:15 +0530 | [diff] [blame] | 1245 | dp->video_info = exynos_dp_dt_parse_pdata(&pdev->dev); |
| 1246 | if (IS_ERR(dp->video_info)) |
| 1247 | return PTR_ERR(dp->video_info); |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1248 | |
Jingoo Han | f9b1e01 | 2013-10-16 21:58:15 +0530 | [diff] [blame] | 1249 | ret = exynos_dp_dt_parse_phydata(dp); |
| 1250 | if (ret) |
| 1251 | return ret; |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1252 | |
Sean Paul | 1417f10 | 2014-01-30 16:19:23 -0500 | [diff] [blame] | 1253 | ret = exynos_dp_dt_parse_panel(dp); |
| 1254 | if (ret) |
| 1255 | return ret; |
| 1256 | |
Damien Cassou | d913f36 | 2012-08-01 18:20:39 +0200 | [diff] [blame] | 1257 | dp->clock = devm_clk_get(&pdev->dev, "dp"); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1258 | if (IS_ERR(dp->clock)) { |
| 1259 | dev_err(&pdev->dev, "failed to get clock\n"); |
Jingoo Han | 4d10ecf8 | 2012-05-25 16:20:45 +0900 | [diff] [blame] | 1260 | return PTR_ERR(dp->clock); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1261 | } |
| 1262 | |
Jingoo Han | 37414fb | 2012-10-04 15:45:14 +0900 | [diff] [blame] | 1263 | clk_prepare_enable(dp->clock); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1264 | |
| 1265 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1266 | |
Thierry Reding | bc3bad1 | 2013-01-21 11:09:23 +0100 | [diff] [blame] | 1267 | dp->reg_base = devm_ioremap_resource(&pdev->dev, res); |
| 1268 | if (IS_ERR(dp->reg_base)) |
| 1269 | return PTR_ERR(dp->reg_base); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1270 | |
Andrew Bresticker | b8b5247 | 2014-04-22 04:09:10 +0530 | [diff] [blame] | 1271 | dp->hpd_gpio = of_get_named_gpio(dev->of_node, "samsung,hpd-gpio", 0); |
| 1272 | |
| 1273 | if (gpio_is_valid(dp->hpd_gpio)) { |
| 1274 | /* |
| 1275 | * Set up the hotplug GPIO from the device tree as an interrupt. |
| 1276 | * Simply specifying a different interrupt in the device tree |
| 1277 | * doesn't work since we handle hotplug rather differently when |
| 1278 | * using a GPIO. We also need the actual GPIO specifier so |
| 1279 | * that we can get the current state of the GPIO. |
| 1280 | */ |
| 1281 | ret = devm_gpio_request_one(&pdev->dev, dp->hpd_gpio, GPIOF_IN, |
| 1282 | "hpd_gpio"); |
| 1283 | if (ret) { |
| 1284 | dev_err(&pdev->dev, "failed to get hpd gpio\n"); |
| 1285 | return ret; |
| 1286 | } |
| 1287 | dp->irq = gpio_to_irq(dp->hpd_gpio); |
| 1288 | irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING; |
| 1289 | } else { |
| 1290 | dp->hpd_gpio = -ENODEV; |
| 1291 | dp->irq = platform_get_irq(pdev, 0); |
| 1292 | irq_flags = 0; |
| 1293 | } |
| 1294 | |
Sean Paul | 1cefc1d | 2012-10-31 23:21:00 +0000 | [diff] [blame] | 1295 | if (dp->irq == -ENXIO) { |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1296 | dev_err(&pdev->dev, "failed to get irq\n"); |
Damien Cassou | d913f36 | 2012-08-01 18:20:39 +0200 | [diff] [blame] | 1297 | return -ENODEV; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1298 | } |
| 1299 | |
Sean Paul | 784fa9a | 2012-11-09 13:55:08 +0900 | [diff] [blame] | 1300 | INIT_WORK(&dp->hotplug_work, exynos_dp_hotplug); |
| 1301 | |
Jingoo Han | f9b1e01 | 2013-10-16 21:58:15 +0530 | [diff] [blame] | 1302 | exynos_dp_phy_init(dp); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1303 | |
| 1304 | exynos_dp_init_dp(dp); |
| 1305 | |
Andrew Bresticker | b8b5247 | 2014-04-22 04:09:10 +0530 | [diff] [blame] | 1306 | ret = devm_request_irq(&pdev->dev, dp->irq, exynos_dp_irq_handler, |
| 1307 | irq_flags, "exynos-dp", dp); |
Ajay Kumar | 22ce19c | 2012-11-09 13:59:09 +0900 | [diff] [blame] | 1308 | if (ret) { |
| 1309 | dev_err(&pdev->dev, "failed to request irq\n"); |
| 1310 | return ret; |
| 1311 | } |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1312 | disable_irq(dp->irq); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1313 | |
Inki Dae | f37cd5e | 2014-05-09 14:25:20 +0900 | [diff] [blame] | 1314 | dp->drm_dev = drm_dev; |
Sean Paul | 1417f10 | 2014-01-30 16:19:23 -0500 | [diff] [blame] | 1315 | exynos_dp_display.ctx = dp; |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1316 | |
| 1317 | platform_set_drvdata(pdev, &exynos_dp_display); |
Sean Paul | 1417f10 | 2014-01-30 16:19:23 -0500 | [diff] [blame] | 1318 | |
Inki Dae | f37cd5e | 2014-05-09 14:25:20 +0900 | [diff] [blame] | 1319 | return exynos_drm_create_enc_conn(drm_dev, &exynos_dp_display); |
| 1320 | } |
| 1321 | |
| 1322 | static void exynos_dp_unbind(struct device *dev, struct device *master, |
| 1323 | void *data) |
| 1324 | { |
| 1325 | struct exynos_drm_display *display = dev_get_drvdata(dev); |
| 1326 | struct exynos_dp_device *dp = display->ctx; |
| 1327 | struct drm_encoder *encoder = dp->encoder; |
| 1328 | |
| 1329 | exynos_dp_dpms(display, DRM_MODE_DPMS_OFF); |
| 1330 | |
| 1331 | encoder->funcs->destroy(encoder); |
| 1332 | drm_connector_cleanup(&dp->connector); |
| 1333 | } |
| 1334 | |
| 1335 | static const struct component_ops exynos_dp_ops = { |
| 1336 | .bind = exynos_dp_bind, |
| 1337 | .unbind = exynos_dp_unbind, |
| 1338 | }; |
| 1339 | |
| 1340 | static int exynos_dp_probe(struct platform_device *pdev) |
| 1341 | { |
Inki Dae | df5225b | 2014-05-29 18:28:02 +0900 | [diff] [blame] | 1342 | int ret; |
| 1343 | |
| 1344 | ret = exynos_drm_component_add(&pdev->dev, EXYNOS_DEVICE_TYPE_CONNECTOR, |
| 1345 | exynos_dp_display.type); |
| 1346 | if (ret) |
| 1347 | return ret; |
| 1348 | |
| 1349 | ret = component_add(&pdev->dev, &exynos_dp_ops); |
| 1350 | if (ret) |
| 1351 | exynos_drm_component_del(&pdev->dev, |
| 1352 | EXYNOS_DEVICE_TYPE_CONNECTOR); |
| 1353 | |
| 1354 | return ret; |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1355 | } |
| 1356 | |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 1357 | static int exynos_dp_remove(struct platform_device *pdev) |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1358 | { |
Inki Dae | df5225b | 2014-05-29 18:28:02 +0900 | [diff] [blame] | 1359 | component_del(&pdev->dev, &exynos_dp_ops); |
| 1360 | exynos_drm_component_del(&pdev->dev, EXYNOS_DEVICE_TYPE_CONNECTOR); |
| 1361 | |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1362 | return 0; |
| 1363 | } |
| 1364 | |
| 1365 | #ifdef CONFIG_PM_SLEEP |
| 1366 | static int exynos_dp_suspend(struct device *dev) |
| 1367 | { |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1368 | struct platform_device *pdev = to_platform_device(dev); |
| 1369 | struct exynos_drm_display *display = platform_get_drvdata(pdev); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1370 | |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1371 | exynos_dp_dpms(display, DRM_MODE_DPMS_OFF); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1372 | return 0; |
| 1373 | } |
| 1374 | |
| 1375 | static int exynos_dp_resume(struct device *dev) |
| 1376 | { |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1377 | struct platform_device *pdev = to_platform_device(dev); |
| 1378 | struct exynos_drm_display *display = platform_get_drvdata(pdev); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1379 | |
Sean Paul | 12f5ad6 | 2014-01-30 16:19:25 -0500 | [diff] [blame] | 1380 | exynos_dp_dpms(display, DRM_MODE_DPMS_ON); |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1381 | return 0; |
| 1382 | } |
| 1383 | #endif |
| 1384 | |
| 1385 | static const struct dev_pm_ops exynos_dp_pm_ops = { |
| 1386 | SET_SYSTEM_SLEEP_PM_OPS(exynos_dp_suspend, exynos_dp_resume) |
| 1387 | }; |
| 1388 | |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1389 | static const struct of_device_id exynos_dp_match[] = { |
| 1390 | { .compatible = "samsung,exynos5-dp" }, |
| 1391 | {}, |
| 1392 | }; |
Ajay Kumar | c4e235c | 2012-10-13 05:48:00 +0900 | [diff] [blame] | 1393 | |
Sean Paul | 1417f10 | 2014-01-30 16:19:23 -0500 | [diff] [blame] | 1394 | struct platform_driver dp_driver = { |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1395 | .probe = exynos_dp_probe, |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 1396 | .remove = exynos_dp_remove, |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1397 | .driver = { |
| 1398 | .name = "exynos-dp", |
| 1399 | .owner = THIS_MODULE, |
| 1400 | .pm = &exynos_dp_pm_ops, |
Jingoo Han | f9b1e01 | 2013-10-16 21:58:15 +0530 | [diff] [blame] | 1401 | .of_match_table = exynos_dp_match, |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1402 | }, |
| 1403 | }; |
| 1404 | |
Jingoo Han | e9474be | 2012-02-03 18:01:55 +0900 | [diff] [blame] | 1405 | MODULE_AUTHOR("Jingoo Han <jg1.han@samsung.com>"); |
| 1406 | MODULE_DESCRIPTION("Samsung SoC DP Driver"); |
| 1407 | MODULE_LICENSE("GPL"); |