blob: bce2a8ca4678ace5375b6a0f90699481b8ff9659 [file] [log] [blame]
Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata-legacy.c - Legacy port PATA/SATA controller driver.
Alan Coxab771632008-10-27 15:09:10 +00003 * Copyright 2005/2006 Red Hat, all rights reserved.
Jeff Garzik669a5db2006-08-29 18:12:40 -04004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2, or (at your option)
8 * any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; see the file COPYING. If not, write to
17 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
18 *
19 * An ATA driver for the legacy ATA ports.
20 *
21 * Data Sources:
22 * Opti 82C465/82C611 support: Data sheets at opti-inc.com
23 * HT6560 series:
24 * Promise 20230/20620:
25 * http://www.ryston.cz/petr/vlb/pdc20230b.html
26 * http://www.ryston.cz/petr/vlb/pdc20230c.html
27 * http://www.ryston.cz/petr/vlb/pdc20630.html
Bartlomiej Zolnierkiewicz9c7e0d22009-12-03 20:32:11 +010028 * QDI65x0:
29 * http://www.ryston.cz/petr/vlb/qd6500.html
30 * http://www.ryston.cz/petr/vlb/qd6580.html
31 *
32 * QDI65x0 probe code based on drivers/ide/legacy/qd65xx.c
33 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
34 * Samuel Thibault <samuel.thibault@ens-lyon.org>
Jeff Garzik669a5db2006-08-29 18:12:40 -040035 *
36 * Unsupported but docs exist:
37 * Appian/Adaptec AIC25VL01/Cirrus Logic PD7220
Jeff Garzik669a5db2006-08-29 18:12:40 -040038 *
39 * This driver handles legacy (that is "ISA/VLB side") IDE ports found
40 * on PC class systems. There are three hybrid devices that are exceptions
41 * The Cyrix 5510/5520 where a pre SFF ATA device is on the bridge and
42 * the MPIIX where the tuning is PCI side but the IDE is "ISA side".
43 *
44 * Specific support is included for the ht6560a/ht6560b/opti82c611a/
Bartlomiej Zolnierkiewicz9c7e0d22009-12-03 20:32:11 +010045 * opti82c465mv/promise 20230c/20630/qdi65x0/winbond83759A
Jeff Garzik669a5db2006-08-29 18:12:40 -040046 *
Bartlomiej Zolnierkiewicz6d981b92009-11-25 07:08:33 +000047 * Support for the Winbond 83759A when operating in advanced mode.
48 * Multichip mode is not currently supported.
49 *
Jeff Garzik669a5db2006-08-29 18:12:40 -040050 * Use the autospeed and pio_mask options with:
51 * Appian ADI/2 aka CLPD7220 or AIC25VL01.
52 * Use the jumpers, autospeed and set pio_mask to the mode on the jumpers with
53 * Goldstar GM82C711, PIC-1288A-125, UMC 82C871F, Winbond W83759,
54 * Winbond W83759A, Promise PDC20230-B
55 *
56 * For now use autospeed and pio_mask as above with the W83759A. This may
57 * change.
58 *
Jeff Garzik669a5db2006-08-29 18:12:40 -040059 */
60
James Bottomley45bc955b2009-06-05 10:41:39 -040061#include <linux/async.h>
Jeff Garzik669a5db2006-08-29 18:12:40 -040062#include <linux/kernel.h>
63#include <linux/module.h>
64#include <linux/pci.h>
65#include <linux/init.h>
66#include <linux/blkdev.h>
67#include <linux/delay.h>
68#include <scsi/scsi_host.h>
69#include <linux/ata.h>
70#include <linux/libata.h>
71#include <linux/platform_device.h>
72
73#define DRV_NAME "pata_legacy"
Alan Coxb8325482008-01-19 15:47:23 +000074#define DRV_VERSION "0.6.5"
Jeff Garzik669a5db2006-08-29 18:12:40 -040075
76#define NR_HOST 6
77
Alan Coxdefc9cd2008-01-10 14:33:10 -080078static int all;
79module_param(all, int, 0444);
80MODULE_PARM_DESC(all, "Grab all legacy port devices, even if PCI(0=off, 1=on)");
Jeff Garzik669a5db2006-08-29 18:12:40 -040081
Alan Coxdefc9cd2008-01-10 14:33:10 -080082enum controller {
83 BIOS = 0,
84 SNOOP = 1,
85 PDC20230 = 2,
86 HT6560A = 3,
87 HT6560B = 4,
88 OPTI611A = 5,
89 OPTI46X = 6,
90 QDI6500 = 7,
91 QDI6580 = 8,
92 QDI6580DP = 9, /* Dual channel mode is different */
Alan Coxb8325482008-01-19 15:47:23 +000093 W83759A = 10,
Alan Coxdefc9cd2008-01-10 14:33:10 -080094
95 UNKNOWN = -1
96};
97
Bartlomiej Zolnierkiewicz8c7e8f92011-10-13 15:06:56 +020098struct legacy_data {
99 unsigned long timing;
100 u8 clock[2];
101 u8 last;
102 int fast;
103 enum controller type;
104 struct platform_device *platform_dev;
105};
Alan Coxdefc9cd2008-01-10 14:33:10 -0800106
107struct legacy_probe {
108 unsigned char *name;
109 unsigned long port;
110 unsigned int irq;
111 unsigned int slot;
112 enum controller type;
113 unsigned long private;
114};
115
116struct legacy_controller {
117 const char *name;
118 struct ata_port_operations *ops;
119 unsigned int pio_mask;
120 unsigned int flags;
Alan Coxe3cf95d2009-04-09 17:31:17 +0100121 unsigned int pflags;
Alan Coxb8325482008-01-19 15:47:23 +0000122 int (*setup)(struct platform_device *, struct legacy_probe *probe,
123 struct legacy_data *data);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800124};
125
126static int legacy_port[NR_HOST] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };
127
128static struct legacy_probe probe_list[NR_HOST];
Jeff Garzik669a5db2006-08-29 18:12:40 -0400129static struct legacy_data legacy_data[NR_HOST];
130static struct ata_host *legacy_host[NR_HOST];
131static int nr_legacy_host;
132
133
Alan Coxdefc9cd2008-01-10 14:33:10 -0800134static int probe_all; /* Set to check all ISA port ranges */
135static int ht6560a; /* HT 6560A on primary 1, second 2, both 3 */
136static int ht6560b; /* HT 6560A on primary 1, second 2, both 3 */
137static int opti82c611a; /* Opti82c611A on primary 1, sec 2, both 3 */
138static int opti82c46x; /* Opti 82c465MV present(pri/sec autodetect) */
Alan Coxdefc9cd2008-01-10 14:33:10 -0800139static int autospeed; /* Chip present which snoops speed changes */
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100140static int pio_mask = ATA_PIO4; /* PIO range for autospeed devices */
Alan Coxf834e492007-02-07 13:46:00 -0800141static int iordy_mask = 0xFFFFFFFF; /* Use iordy if available */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400142
Bartlomiej Zolnierkiewicz0dcd0a72011-10-13 15:11:39 +0200143/* Set to probe QDI controllers */
144#ifdef CONFIG_PATA_QDI_MODULE
145static int qdi = 1;
146#else
147static int qdi;
148#endif
149
Tejun Heof60215a2010-11-12 12:01:41 +0100150#ifdef CONFIG_PATA_WINBOND_VLB_MODULE
Bartlomiej Zolnierkiewicz6d981b92009-11-25 07:08:33 +0000151static int winbond = 1; /* Set to probe Winbond controllers,
152 give I/O port if non standard */
153#else
154static int winbond; /* Set to probe Winbond controllers,
155 give I/O port if non standard */
156#endif
157
Jeff Garzik669a5db2006-08-29 18:12:40 -0400158/**
Alan Coxdefc9cd2008-01-10 14:33:10 -0800159 * legacy_probe_add - Add interface to probe list
160 * @port: Controller port
161 * @irq: IRQ number
162 * @type: Controller type
163 * @private: Controller specific info
164 *
165 * Add an entry into the probe list for ATA controllers. This is used
166 * to add the default ISA slots and then to build up the table
167 * further according to other ISA/VLB/Weird device scans
168 *
169 * An I/O port list is used to keep ordering stable and sane, as we
170 * don't have any good way to talk about ordering otherwise
171 */
172
173static int legacy_probe_add(unsigned long port, unsigned int irq,
174 enum controller type, unsigned long private)
175{
176 struct legacy_probe *lp = &probe_list[0];
177 int i;
178 struct legacy_probe *free = NULL;
179
180 for (i = 0; i < NR_HOST; i++) {
181 if (lp->port == 0 && free == NULL)
182 free = lp;
183 /* Matching port, or the correct slot for ordering */
184 if (lp->port == port || legacy_port[i] == port) {
185 free = lp;
186 break;
187 }
188 lp++;
189 }
190 if (free == NULL) {
191 printk(KERN_ERR "pata_legacy: Too many interfaces.\n");
192 return -1;
193 }
194 /* Fill in the entry for later probing */
195 free->port = port;
196 free->irq = irq;
197 free->type = type;
198 free->private = private;
199 return 0;
200}
201
202
203/**
Jeff Garzik669a5db2006-08-29 18:12:40 -0400204 * legacy_set_mode - mode setting
Tejun Heo02607312007-08-06 18:36:23 +0900205 * @link: IDE link
Alanb229a7b2007-01-24 11:47:07 +0000206 * @unused: Device that failed when error is returned
Jeff Garzik669a5db2006-08-29 18:12:40 -0400207 *
208 * Use a non standard set_mode function. We don't want to be tuned.
209 *
210 * The BIOS configured everything. Our job is not to fiddle. Just use
211 * whatever PIO the hardware is using and leave it at that. When we
212 * get some kind of nice user driven API for control then we can
213 * expand on this as per hdparm in the base kernel.
214 */
215
Tejun Heo02607312007-08-06 18:36:23 +0900216static int legacy_set_mode(struct ata_link *link, struct ata_device **unused)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400217{
Tejun Heof58229f2007-08-06 18:36:23 +0900218 struct ata_device *dev;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400219
Tejun Heo1eca4362008-11-03 20:03:17 +0900220 ata_for_each_dev(dev, link, ENABLED) {
Joe Perchesa9a79df2011-04-15 15:51:59 -0700221 ata_dev_info(dev, "configured for PIO\n");
Tejun Heo1eca4362008-11-03 20:03:17 +0900222 dev->pio_mode = XFER_PIO_0;
223 dev->xfer_mode = XFER_PIO_0;
224 dev->xfer_shift = ATA_SHIFT_PIO;
225 dev->flags |= ATA_DFLAG_PIO;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400226 }
Alanb229a7b2007-01-24 11:47:07 +0000227 return 0;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400228}
229
230static struct scsi_host_template legacy_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900231 ATA_PIO_SHT(DRV_NAME),
Jeff Garzik669a5db2006-08-29 18:12:40 -0400232};
233
Tejun Heo029cfd62008-03-25 12:22:49 +0900234static const struct ata_port_operations legacy_base_port_ops = {
235 .inherits = &ata_sff_port_ops,
236 .cable_detect = ata_cable_40wire,
237};
238
Jeff Garzik669a5db2006-08-29 18:12:40 -0400239/*
240 * These ops are used if the user indicates the hardware
241 * snoops the commands to decide on the mode and handles the
242 * mode selection "magically" itself. Several legacy controllers
243 * do this. The mode range can be set if it is not 0x1F by setting
244 * pio_mask as well.
245 */
246
247static struct ata_port_operations simple_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900248 .inherits = &legacy_base_port_ops,
Tejun Heo5682ed32008-04-07 22:47:16 +0900249 .sff_data_xfer = ata_sff_data_xfer_noirq,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400250};
251
252static struct ata_port_operations legacy_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900253 .inherits = &legacy_base_port_ops,
Tejun Heo5682ed32008-04-07 22:47:16 +0900254 .sff_data_xfer = ata_sff_data_xfer_noirq,
Tejun Heo029cfd62008-03-25 12:22:49 +0900255 .set_mode = legacy_set_mode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400256};
257
258/*
259 * Promise 20230C and 20620 support
260 *
Alan Coxdefc9cd2008-01-10 14:33:10 -0800261 * This controller supports PIO0 to PIO2. We set PIO timings
262 * conservatively to allow for 50MHz Vesa Local Bus. The 20620 DMA
263 * support is weird being DMA to controller and PIO'd to the host
264 * and not supported.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400265 */
266
267static void pdc20230_set_piomode(struct ata_port *ap, struct ata_device *adev)
268{
269 int tries = 5;
270 int pio = adev->pio_mode - XFER_PIO_0;
271 u8 rt;
272 unsigned long flags;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400273
Jeff Garzik669a5db2006-08-29 18:12:40 -0400274 /* Safe as UP only. Force I/Os to occur together */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400275
Jeff Garzik669a5db2006-08-29 18:12:40 -0400276 local_irq_save(flags);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400277
Jeff Garzik669a5db2006-08-29 18:12:40 -0400278 /* Unlock the control interface */
Alan Coxdefc9cd2008-01-10 14:33:10 -0800279 do {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400280 inb(0x1F5);
281 outb(inb(0x1F2) | 0x80, 0x1F2);
282 inb(0x1F2);
283 inb(0x3F6);
284 inb(0x3F6);
285 inb(0x1F2);
286 inb(0x1F2);
287 }
Alan Coxdefc9cd2008-01-10 14:33:10 -0800288 while ((inb(0x1F2) & 0x80) && --tries);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400289
290 local_irq_restore(flags);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400291
Jeff Garzik669a5db2006-08-29 18:12:40 -0400292 outb(inb(0x1F4) & 0x07, 0x1F4);
293
294 rt = inb(0x1F3);
295 rt &= 0x07 << (3 * adev->devno);
296 if (pio)
297 rt |= (1 + 3 * pio) << (3 * adev->devno);
298
299 udelay(100);
300 outb(inb(0x1F2) | 0x01, 0x1F2);
301 udelay(100);
302 inb(0x1F5);
303
304}
305
Tejun Heo55dba312007-12-05 16:43:07 +0900306static unsigned int pdc_data_xfer_vlb(struct ata_device *dev,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800307 unsigned char *buf, unsigned int buflen, int rw)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400308{
Alan Coxc55af1f2009-02-11 13:08:42 -0800309 int slop = buflen & 3;
Zhenwen Xu16e6aec2009-04-17 15:32:59 +0800310 struct ata_port *ap = dev->link->ap;
311
Alan Coxc55af1f2009-02-11 13:08:42 -0800312 /* 32bit I/O capable *and* we need to write a whole number of dwords */
Alan Coxe3cf95d2009-04-09 17:31:17 +0100313 if (ata_id_has_dword_io(dev->id) && (slop == 0 || slop == 3)
314 && (ap->pflags & ATA_PFLAG_PIO32)) {
Tejun Heo55dba312007-12-05 16:43:07 +0900315 unsigned long flags;
316
Jeff Garzik669a5db2006-08-29 18:12:40 -0400317 local_irq_save(flags);
318
319 /* Perform the 32bit I/O synchronization sequence */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900320 ioread8(ap->ioaddr.nsect_addr);
321 ioread8(ap->ioaddr.nsect_addr);
322 ioread8(ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400323
324 /* Now the data */
Tejun Heo55dba312007-12-05 16:43:07 +0900325 if (rw == READ)
Tejun Heo0d5ff562007-02-01 15:06:36 +0900326 ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
Tejun Heo55dba312007-12-05 16:43:07 +0900327 else
328 iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400329
330 if (unlikely(slop)) {
Harvey Harrison6ad67402008-06-18 17:16:43 -0700331 __le32 pad;
Tejun Heo55dba312007-12-05 16:43:07 +0900332 if (rw == READ) {
Al Virob50e56d2008-01-12 14:16:14 +0000333 pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
Jeff Garzik669a5db2006-08-29 18:12:40 -0400334 memcpy(buf + buflen - slop, &pad, slop);
Tejun Heo55dba312007-12-05 16:43:07 +0900335 } else {
336 memcpy(&pad, buf + buflen - slop, slop);
337 iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400338 }
Tejun Heo55dba312007-12-05 16:43:07 +0900339 buflen += 4 - slop;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400340 }
341 local_irq_restore(flags);
Tejun Heo55dba312007-12-05 16:43:07 +0900342 } else
Tejun Heo9363c382008-04-07 22:47:16 +0900343 buflen = ata_sff_data_xfer_noirq(dev, buf, buflen, rw);
Tejun Heo55dba312007-12-05 16:43:07 +0900344
345 return buflen;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400346}
347
348static struct ata_port_operations pdc20230_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900349 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400350 .set_piomode = pdc20230_set_piomode,
Tejun Heo5682ed32008-04-07 22:47:16 +0900351 .sff_data_xfer = pdc_data_xfer_vlb,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400352};
353
354/*
355 * Holtek 6560A support
356 *
Alan Coxdefc9cd2008-01-10 14:33:10 -0800357 * This controller supports PIO0 to PIO2 (no IORDY even though higher
358 * timings can be loaded).
Jeff Garzik669a5db2006-08-29 18:12:40 -0400359 */
360
361static void ht6560a_set_piomode(struct ata_port *ap, struct ata_device *adev)
362{
363 u8 active, recover;
364 struct ata_timing t;
365
366 /* Get the timing data in cycles. For now play safe at 50Mhz */
367 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
368
Harvey Harrison07633b52008-05-14 16:17:00 -0700369 active = clamp_val(t.active, 2, 15);
370 recover = clamp_val(t.recover, 4, 15);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400371
372 inb(0x3E6);
373 inb(0x3E6);
374 inb(0x3E6);
375 inb(0x3E6);
376
Tejun Heo0d5ff562007-02-01 15:06:36 +0900377 iowrite8(recover << 4 | active, ap->ioaddr.device_addr);
378 ioread8(ap->ioaddr.status_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400379}
380
381static struct ata_port_operations ht6560a_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900382 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400383 .set_piomode = ht6560a_set_piomode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400384};
385
386/*
387 * Holtek 6560B support
388 *
Alan Coxdefc9cd2008-01-10 14:33:10 -0800389 * This controller supports PIO0 to PIO4. We honour the BIOS/jumper FIFO
390 * setting unless we see an ATAPI device in which case we force it off.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400391 *
392 * FIXME: need to implement 2nd channel support.
393 */
394
395static void ht6560b_set_piomode(struct ata_port *ap, struct ata_device *adev)
396{
397 u8 active, recover;
398 struct ata_timing t;
399
400 /* Get the timing data in cycles. For now play safe at 50Mhz */
401 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
402
Harvey Harrison07633b52008-05-14 16:17:00 -0700403 active = clamp_val(t.active, 2, 15);
Sergei Shtylyov97163872012-01-19 19:09:56 +0300404 recover = clamp_val(t.recover, 2, 16) & 0x0F;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400405
406 inb(0x3E6);
407 inb(0x3E6);
408 inb(0x3E6);
409 inb(0x3E6);
410
Tejun Heo0d5ff562007-02-01 15:06:36 +0900411 iowrite8(recover << 4 | active, ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400412
413 if (adev->class != ATA_DEV_ATA) {
414 u8 rconf = inb(0x3E6);
415 if (rconf & 0x24) {
Alan Coxdefc9cd2008-01-10 14:33:10 -0800416 rconf &= ~0x24;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400417 outb(rconf, 0x3E6);
418 }
419 }
Tejun Heo0d5ff562007-02-01 15:06:36 +0900420 ioread8(ap->ioaddr.status_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400421}
422
423static struct ata_port_operations ht6560b_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900424 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400425 .set_piomode = ht6560b_set_piomode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400426};
427
428/*
429 * Opti core chipset helpers
430 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400431
Jeff Garzik669a5db2006-08-29 18:12:40 -0400432/**
433 * opti_syscfg - read OPTI chipset configuration
434 * @reg: Configuration register to read
435 *
436 * Returns the value of an OPTI system board configuration register.
437 */
438
439static u8 opti_syscfg(u8 reg)
440{
441 unsigned long flags;
442 u8 r;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400443
Jeff Garzik669a5db2006-08-29 18:12:40 -0400444 /* Uniprocessor chipset and must force cycles adjancent */
445 local_irq_save(flags);
446 outb(reg, 0x22);
447 r = inb(0x24);
448 local_irq_restore(flags);
449 return r;
450}
451
452/*
453 * Opti 82C611A
454 *
455 * This controller supports PIO0 to PIO3.
456 */
457
Alan Coxdefc9cd2008-01-10 14:33:10 -0800458static void opti82c611a_set_piomode(struct ata_port *ap,
459 struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400460{
461 u8 active, recover, setup;
462 struct ata_timing t;
463 struct ata_device *pair = ata_dev_pair(adev);
464 int clock;
465 int khz[4] = { 50000, 40000, 33000, 25000 };
466 u8 rc;
467
468 /* Enter configuration mode */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900469 ioread16(ap->ioaddr.error_addr);
470 ioread16(ap->ioaddr.error_addr);
471 iowrite8(3, ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400472
473 /* Read VLB clock strapping */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900474 clock = 1000000000 / khz[ioread8(ap->ioaddr.lbah_addr) & 0x03];
Jeff Garzik669a5db2006-08-29 18:12:40 -0400475
476 /* Get the timing data in cycles */
477 ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000);
478
479 /* Setup timing is shared */
480 if (pair) {
481 struct ata_timing tp;
482 ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000);
483
484 ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
485 }
486
Harvey Harrison07633b52008-05-14 16:17:00 -0700487 active = clamp_val(t.active, 2, 17) - 2;
488 recover = clamp_val(t.recover, 1, 16) - 1;
489 setup = clamp_val(t.setup, 1, 4) - 1;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400490
491 /* Select the right timing bank for write timing */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900492 rc = ioread8(ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400493 rc &= 0x7F;
494 rc |= (adev->devno << 7);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900495 iowrite8(rc, ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400496
497 /* Write the timings */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900498 iowrite8(active << 4 | recover, ap->ioaddr.error_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400499
500 /* Select the right bank for read timings, also
501 load the shared timings for address */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900502 rc = ioread8(ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400503 rc &= 0xC0;
504 rc |= adev->devno; /* Index select */
505 rc |= (setup << 4) | 0x04;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900506 iowrite8(rc, ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400507
508 /* Load the read timings */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900509 iowrite8(active << 4 | recover, ap->ioaddr.data_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400510
511 /* Ensure the timing register mode is right */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900512 rc = ioread8(ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400513 rc &= 0x73;
514 rc |= 0x84;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900515 iowrite8(rc, ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400516
517 /* Exit command mode */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900518 iowrite8(0x83, ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400519}
520
521
522static struct ata_port_operations opti82c611a_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900523 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400524 .set_piomode = opti82c611a_set_piomode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400525};
526
527/*
528 * Opti 82C465MV
529 *
530 * This controller supports PIO0 to PIO3. Unlike the 611A the MVB
531 * version is dual channel but doesn't have a lot of unique registers.
532 */
533
534static void opti82c46x_set_piomode(struct ata_port *ap, struct ata_device *adev)
535{
536 u8 active, recover, setup;
537 struct ata_timing t;
538 struct ata_device *pair = ata_dev_pair(adev);
539 int clock;
540 int khz[4] = { 50000, 40000, 33000, 25000 };
541 u8 rc;
542 u8 sysclk;
543
544 /* Get the clock */
Dan Carpentere0044c92013-03-11 14:41:51 +0300545 sysclk = (opti_syscfg(0xAC) & 0xC0) >> 6; /* BIOS set */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400546
547 /* Enter configuration mode */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900548 ioread16(ap->ioaddr.error_addr);
549 ioread16(ap->ioaddr.error_addr);
550 iowrite8(3, ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400551
552 /* Read VLB clock strapping */
553 clock = 1000000000 / khz[sysclk];
554
555 /* Get the timing data in cycles */
556 ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000);
557
558 /* Setup timing is shared */
559 if (pair) {
560 struct ata_timing tp;
561 ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000);
562
563 ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
564 }
565
Harvey Harrison07633b52008-05-14 16:17:00 -0700566 active = clamp_val(t.active, 2, 17) - 2;
567 recover = clamp_val(t.recover, 1, 16) - 1;
568 setup = clamp_val(t.setup, 1, 4) - 1;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400569
570 /* Select the right timing bank for write timing */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900571 rc = ioread8(ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400572 rc &= 0x7F;
573 rc |= (adev->devno << 7);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900574 iowrite8(rc, ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400575
576 /* Write the timings */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900577 iowrite8(active << 4 | recover, ap->ioaddr.error_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400578
579 /* Select the right bank for read timings, also
580 load the shared timings for address */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900581 rc = ioread8(ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400582 rc &= 0xC0;
583 rc |= adev->devno; /* Index select */
584 rc |= (setup << 4) | 0x04;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900585 iowrite8(rc, ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400586
587 /* Load the read timings */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900588 iowrite8(active << 4 | recover, ap->ioaddr.data_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400589
590 /* Ensure the timing register mode is right */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900591 rc = ioread8(ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400592 rc &= 0x73;
593 rc |= 0x84;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900594 iowrite8(rc, ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400595
596 /* Exit command mode */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900597 iowrite8(0x83, ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400598
599 /* We need to know this for quad device on the MVB */
600 ap->host->private_data = ap;
601}
602
603/**
Tejun Heo9363c382008-04-07 22:47:16 +0900604 * opt82c465mv_qc_issue - command issue
Jeff Garzik669a5db2006-08-29 18:12:40 -0400605 * @qc: command pending
606 *
607 * Called when the libata layer is about to issue a command. We wrap
608 * this interface so that we can load the correct ATA timings. The
609 * MVB has a single set of timing registers and these are shared
610 * across channels. As there are two registers we really ought to
611 * track the last two used values as a sort of register window. For
612 * now we just reload on a channel switch. On the single channel
613 * setup this condition never fires so we do nothing extra.
614 *
615 * FIXME: dual channel needs ->serialize support
616 */
617
Tejun Heo9363c382008-04-07 22:47:16 +0900618static unsigned int opti82c46x_qc_issue(struct ata_queued_cmd *qc)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400619{
620 struct ata_port *ap = qc->ap;
621 struct ata_device *adev = qc->dev;
622
623 /* If timings are set and for the wrong channel (2nd test is
624 due to a libata shortcoming and will eventually go I hope) */
625 if (ap->host->private_data != ap->host
626 && ap->host->private_data != NULL)
627 opti82c46x_set_piomode(ap, adev);
628
Tejun Heo9363c382008-04-07 22:47:16 +0900629 return ata_sff_qc_issue(qc);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400630}
631
632static struct ata_port_operations opti82c46x_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900633 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400634 .set_piomode = opti82c46x_set_piomode,
Tejun Heo9363c382008-04-07 22:47:16 +0900635 .qc_issue = opti82c46x_qc_issue,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400636};
637
Jeff Garzik669a5db2006-08-29 18:12:40 -0400638/**
Bartlomiej Zolnierkiewicz8c7e8f92011-10-13 15:06:56 +0200639 * qdi65x0_set_piomode - PIO setup for QDI65x0
Alan Coxdefc9cd2008-01-10 14:33:10 -0800640 * @ap: Port
641 * @adev: Device
642 *
643 * In single channel mode the 6580 has one clock per device and we can
644 * avoid the requirement to clock switch. We also have to load the timing
645 * into the right clock according to whether we are master or slave.
Bartlomiej Zolnierkiewicz8c7e8f92011-10-13 15:06:56 +0200646 *
647 * In dual channel mode the 6580 has one clock per channel and we have
648 * to software clockswitch in qc_issue.
Alan Coxdefc9cd2008-01-10 14:33:10 -0800649 */
650
Bartlomiej Zolnierkiewicz8c7e8f92011-10-13 15:06:56 +0200651static void qdi65x0_set_piomode(struct ata_port *ap, struct ata_device *adev)
Alan Coxdefc9cd2008-01-10 14:33:10 -0800652{
653 struct ata_timing t;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800654 struct legacy_data *ld_qdi = ap->host->private_data;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800655 int active, recovery;
656 u8 timing;
657
658 /* Get the timing data in cycles */
659 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
660
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800661 if (ld_qdi->fast) {
Harvey Harrison07633b52008-05-14 16:17:00 -0700662 active = 8 - clamp_val(t.active, 1, 8);
663 recovery = 18 - clamp_val(t.recover, 3, 18);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800664 } else {
Harvey Harrison07633b52008-05-14 16:17:00 -0700665 active = 9 - clamp_val(t.active, 2, 9);
666 recovery = 15 - clamp_val(t.recover, 0, 15);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800667 }
668 timing = (recovery << 4) | active | 0x08;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800669 ld_qdi->clock[adev->devno] = timing;
Bartlomiej Zolnierkiewicz8c7e8f92011-10-13 15:06:56 +0200670
671 if (ld_qdi->type == QDI6580)
672 outb(timing, ld_qdi->timing + 2 * adev->devno);
673 else
674 outb(timing, ld_qdi->timing + 2 * ap->port_no);
675
Alan Coxdefc9cd2008-01-10 14:33:10 -0800676 /* Clear the FIFO */
Bartlomiej Zolnierkiewicz8c7e8f92011-10-13 15:06:56 +0200677 if (ld_qdi->type != QDI6500 && adev->class != ATA_DEV_ATA)
Bartlomiej Zolnierkiewicz6809e732009-12-03 20:32:11 +0100678 outb(0x5F, (ld_qdi->timing & 0xFFF0) + 3);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800679}
680
681/**
Tejun Heo9363c382008-04-07 22:47:16 +0900682 * qdi_qc_issue - command issue
Alan Coxdefc9cd2008-01-10 14:33:10 -0800683 * @qc: command pending
684 *
685 * Called when the libata layer is about to issue a command. We wrap
686 * this interface so that we can load the correct ATA timings.
687 */
688
Tejun Heo9363c382008-04-07 22:47:16 +0900689static unsigned int qdi_qc_issue(struct ata_queued_cmd *qc)
Alan Coxdefc9cd2008-01-10 14:33:10 -0800690{
691 struct ata_port *ap = qc->ap;
692 struct ata_device *adev = qc->dev;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800693 struct legacy_data *ld_qdi = ap->host->private_data;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800694
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800695 if (ld_qdi->clock[adev->devno] != ld_qdi->last) {
Alan Coxdefc9cd2008-01-10 14:33:10 -0800696 if (adev->pio_mode) {
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800697 ld_qdi->last = ld_qdi->clock[adev->devno];
698 outb(ld_qdi->clock[adev->devno], ld_qdi->timing +
Alan Coxdefc9cd2008-01-10 14:33:10 -0800699 2 * ap->port_no);
700 }
701 }
Tejun Heo9363c382008-04-07 22:47:16 +0900702 return ata_sff_qc_issue(qc);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800703}
704
Alan Coxb8325482008-01-19 15:47:23 +0000705static unsigned int vlb32_data_xfer(struct ata_device *adev, unsigned char *buf,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800706 unsigned int buflen, int rw)
707{
708 struct ata_port *ap = adev->link->ap;
709 int slop = buflen & 3;
710
Alan Coxe3cf95d2009-04-09 17:31:17 +0100711 if (ata_id_has_dword_io(adev->id) && (slop == 0 || slop == 3)
712 && (ap->pflags & ATA_PFLAG_PIO32)) {
Alan Coxdefc9cd2008-01-10 14:33:10 -0800713 if (rw == WRITE)
714 iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
715 else
716 ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
717
718 if (unlikely(slop)) {
Harvey Harrison6ad67402008-06-18 17:16:43 -0700719 __le32 pad;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800720 if (rw == WRITE) {
721 memcpy(&pad, buf + buflen - slop, slop);
Harvey Harrison6ad67402008-06-18 17:16:43 -0700722 iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800723 } else {
Harvey Harrison6ad67402008-06-18 17:16:43 -0700724 pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
Alan Coxdefc9cd2008-01-10 14:33:10 -0800725 memcpy(buf + buflen - slop, &pad, slop);
726 }
727 }
728 return (buflen + 3) & ~3;
729 } else
Tejun Heo9363c382008-04-07 22:47:16 +0900730 return ata_sff_data_xfer(adev, buf, buflen, rw);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800731}
732
Alan Coxb8325482008-01-19 15:47:23 +0000733static int qdi_port(struct platform_device *dev,
734 struct legacy_probe *lp, struct legacy_data *ld)
735{
736 if (devm_request_region(&dev->dev, lp->private, 4, "qdi") == NULL)
737 return -EBUSY;
738 ld->timing = lp->private;
739 return 0;
740}
741
Alan Coxdefc9cd2008-01-10 14:33:10 -0800742static struct ata_port_operations qdi6500_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900743 .inherits = &legacy_base_port_ops,
Bartlomiej Zolnierkiewicz8c7e8f92011-10-13 15:06:56 +0200744 .set_piomode = qdi65x0_set_piomode,
Tejun Heo9363c382008-04-07 22:47:16 +0900745 .qc_issue = qdi_qc_issue,
Tejun Heo5682ed32008-04-07 22:47:16 +0900746 .sff_data_xfer = vlb32_data_xfer,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800747};
748
749static struct ata_port_operations qdi6580_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900750 .inherits = &legacy_base_port_ops,
Bartlomiej Zolnierkiewicz8c7e8f92011-10-13 15:06:56 +0200751 .set_piomode = qdi65x0_set_piomode,
Tejun Heo5682ed32008-04-07 22:47:16 +0900752 .sff_data_xfer = vlb32_data_xfer,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800753};
754
755static struct ata_port_operations qdi6580dp_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900756 .inherits = &legacy_base_port_ops,
Bartlomiej Zolnierkiewicz8c7e8f92011-10-13 15:06:56 +0200757 .set_piomode = qdi65x0_set_piomode,
Bartlomiej Zolnierkiewicz43c7d172009-12-03 20:32:11 +0100758 .qc_issue = qdi_qc_issue,
Tejun Heo5682ed32008-04-07 22:47:16 +0900759 .sff_data_xfer = vlb32_data_xfer,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800760};
761
Alan Coxb8325482008-01-19 15:47:23 +0000762static DEFINE_SPINLOCK(winbond_lock);
763
764static void winbond_writecfg(unsigned long port, u8 reg, u8 val)
765{
766 unsigned long flags;
767 spin_lock_irqsave(&winbond_lock, flags);
768 outb(reg, port + 0x01);
769 outb(val, port + 0x02);
770 spin_unlock_irqrestore(&winbond_lock, flags);
771}
772
773static u8 winbond_readcfg(unsigned long port, u8 reg)
774{
775 u8 val;
776
777 unsigned long flags;
778 spin_lock_irqsave(&winbond_lock, flags);
779 outb(reg, port + 0x01);
780 val = inb(port + 0x02);
781 spin_unlock_irqrestore(&winbond_lock, flags);
782
783 return val;
784}
785
786static void winbond_set_piomode(struct ata_port *ap, struct ata_device *adev)
787{
788 struct ata_timing t;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800789 struct legacy_data *ld_winbond = ap->host->private_data;
Alan Coxb8325482008-01-19 15:47:23 +0000790 int active, recovery;
791 u8 reg;
792 int timing = 0x88 + (ap->port_no * 4) + (adev->devno * 2);
793
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800794 reg = winbond_readcfg(ld_winbond->timing, 0x81);
Alan Coxb8325482008-01-19 15:47:23 +0000795
796 /* Get the timing data in cycles */
797 if (reg & 0x40) /* Fast VLB bus, assume 50MHz */
798 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
799 else
800 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
801
Harvey Harrison07633b52008-05-14 16:17:00 -0700802 active = (clamp_val(t.active, 3, 17) - 1) & 0x0F;
803 recovery = (clamp_val(t.recover, 1, 15) + 1) & 0x0F;
Alan Coxb8325482008-01-19 15:47:23 +0000804 timing = (active << 4) | recovery;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800805 winbond_writecfg(ld_winbond->timing, timing, reg);
Alan Coxb8325482008-01-19 15:47:23 +0000806
807 /* Load the setup timing */
808
809 reg = 0x35;
810 if (adev->class != ATA_DEV_ATA)
811 reg |= 0x08; /* FIFO off */
812 if (!ata_pio_need_iordy(adev))
813 reg |= 0x02; /* IORDY off */
Harvey Harrison07633b52008-05-14 16:17:00 -0700814 reg |= (clamp_val(t.setup, 0, 3) << 6);
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800815 winbond_writecfg(ld_winbond->timing, timing + 1, reg);
Alan Coxb8325482008-01-19 15:47:23 +0000816}
817
818static int winbond_port(struct platform_device *dev,
819 struct legacy_probe *lp, struct legacy_data *ld)
820{
821 if (devm_request_region(&dev->dev, lp->private, 4, "winbond") == NULL)
822 return -EBUSY;
823 ld->timing = lp->private;
824 return 0;
825}
826
827static struct ata_port_operations winbond_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900828 .inherits = &legacy_base_port_ops,
Alan Coxb8325482008-01-19 15:47:23 +0000829 .set_piomode = winbond_set_piomode,
Tejun Heo5682ed32008-04-07 22:47:16 +0900830 .sff_data_xfer = vlb32_data_xfer,
Alan Coxb8325482008-01-19 15:47:23 +0000831};
832
Alan Coxdefc9cd2008-01-10 14:33:10 -0800833static struct legacy_controller controllers[] = {
Bartlomiej Zolnierkiewiczb2f104b2011-10-13 15:08:40 +0200834 {"BIOS", &legacy_port_ops, ATA_PIO4,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100835 ATA_FLAG_NO_IORDY, 0, NULL },
Bartlomiej Zolnierkiewiczb2f104b2011-10-13 15:08:40 +0200836 {"Snooping", &simple_port_ops, ATA_PIO4,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100837 0, 0, NULL },
Bartlomiej Zolnierkiewiczb2f104b2011-10-13 15:08:40 +0200838 {"PDC20230", &pdc20230_port_ops, ATA_PIO2,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100839 ATA_FLAG_NO_IORDY,
Zhenwen Xu16e6aec2009-04-17 15:32:59 +0800840 ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, NULL },
Bartlomiej Zolnierkiewiczb2f104b2011-10-13 15:08:40 +0200841 {"HT6560A", &ht6560a_port_ops, ATA_PIO2,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100842 ATA_FLAG_NO_IORDY, 0, NULL },
Bartlomiej Zolnierkiewiczb2f104b2011-10-13 15:08:40 +0200843 {"HT6560B", &ht6560b_port_ops, ATA_PIO4,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100844 ATA_FLAG_NO_IORDY, 0, NULL },
Bartlomiej Zolnierkiewiczb2f104b2011-10-13 15:08:40 +0200845 {"OPTI82C611A", &opti82c611a_port_ops, ATA_PIO3,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100846 0, 0, NULL },
Bartlomiej Zolnierkiewiczb2f104b2011-10-13 15:08:40 +0200847 {"OPTI82C46X", &opti82c46x_port_ops, ATA_PIO3,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100848 0, 0, NULL },
Bartlomiej Zolnierkiewiczb2f104b2011-10-13 15:08:40 +0200849 {"QDI6500", &qdi6500_port_ops, ATA_PIO2,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100850 ATA_FLAG_NO_IORDY,
Zhenwen Xu16e6aec2009-04-17 15:32:59 +0800851 ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port },
Bartlomiej Zolnierkiewiczb2f104b2011-10-13 15:08:40 +0200852 {"QDI6580", &qdi6580_port_ops, ATA_PIO4,
Zhenwen Xu16e6aec2009-04-17 15:32:59 +0800853 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port },
Bartlomiej Zolnierkiewiczb2f104b2011-10-13 15:08:40 +0200854 {"QDI6580DP", &qdi6580dp_port_ops, ATA_PIO4,
Zhenwen Xu16e6aec2009-04-17 15:32:59 +0800855 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port },
Bartlomiej Zolnierkiewiczb2f104b2011-10-13 15:08:40 +0200856 {"W83759A", &winbond_port_ops, ATA_PIO4,
Zhenwen Xu16e6aec2009-04-17 15:32:59 +0800857 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100858 winbond_port }
Alan Coxdefc9cd2008-01-10 14:33:10 -0800859};
860
861/**
862 * probe_chip_type - Discover controller
863 * @probe: Probe entry to check
864 *
865 * Probe an ATA port and identify the type of controller. We don't
866 * check if the controller appears to be driveless at this point.
867 */
868
Alan Coxb8325482008-01-19 15:47:23 +0000869static __init int probe_chip_type(struct legacy_probe *probe)
Alan Coxdefc9cd2008-01-10 14:33:10 -0800870{
871 int mask = 1 << probe->slot;
872
Alan Coxb8325482008-01-19 15:47:23 +0000873 if (winbond && (probe->port == 0x1F0 || probe->port == 0x170)) {
874 u8 reg = winbond_readcfg(winbond, 0x81);
875 reg |= 0x80; /* jumpered mode off */
876 winbond_writecfg(winbond, 0x81, reg);
877 reg = winbond_readcfg(winbond, 0x83);
878 reg |= 0xF0; /* local control */
879 winbond_writecfg(winbond, 0x83, reg);
880 reg = winbond_readcfg(winbond, 0x85);
881 reg |= 0xF0; /* programmable timing */
882 winbond_writecfg(winbond, 0x85, reg);
883
884 reg = winbond_readcfg(winbond, 0x81);
885
886 if (reg & mask)
887 return W83759A;
888 }
Alan Coxdefc9cd2008-01-10 14:33:10 -0800889 if (probe->port == 0x1F0) {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400890 unsigned long flags;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400891 local_irq_save(flags);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400892 /* Probes */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400893 outb(inb(0x1F2) | 0x80, 0x1F2);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800894 inb(0x1F5);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400895 inb(0x1F2);
896 inb(0x3F6);
897 inb(0x3F6);
898 inb(0x1F2);
899 inb(0x1F2);
900
901 if ((inb(0x1F2) & 0x80) == 0) {
902 /* PDC20230c or 20630 ? */
Alan Coxdefc9cd2008-01-10 14:33:10 -0800903 printk(KERN_INFO "PDC20230-C/20630 VLB ATA controller"
904 " detected.\n");
Jeff Garzik669a5db2006-08-29 18:12:40 -0400905 udelay(100);
906 inb(0x1F5);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800907 local_irq_restore(flags);
908 return PDC20230;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400909 } else {
910 outb(0x55, 0x1F2);
911 inb(0x1F2);
912 inb(0x1F2);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800913 if (inb(0x1F2) == 0x00)
914 printk(KERN_INFO "PDC20230-B VLB ATA "
915 "controller detected.\n");
916 local_irq_restore(flags);
917 return BIOS;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400918 }
Jeff Garzik669a5db2006-08-29 18:12:40 -0400919 }
920
Alan Coxdefc9cd2008-01-10 14:33:10 -0800921 if (ht6560a & mask)
922 return HT6560A;
923 if (ht6560b & mask)
924 return HT6560B;
925 if (opti82c611a & mask)
926 return OPTI611A;
927 if (opti82c46x & mask)
928 return OPTI46X;
929 if (autospeed & mask)
930 return SNOOP;
931 return BIOS;
932}
Jeff Garzik669a5db2006-08-29 18:12:40 -0400933
Alan Coxdefc9cd2008-01-10 14:33:10 -0800934
935/**
936 * legacy_init_one - attach a legacy interface
937 * @pl: probe record
938 *
939 * Register an ISA bus IDE interface. Such interfaces are PIO and we
940 * assume do not support IRQ sharing.
941 */
942
943static __init int legacy_init_one(struct legacy_probe *probe)
944{
945 struct legacy_controller *controller = &controllers[probe->type];
946 int pio_modes = controller->pio_mask;
947 unsigned long io = probe->port;
948 u32 mask = (1 << probe->slot);
949 struct ata_port_operations *ops = controller->ops;
950 struct legacy_data *ld = &legacy_data[probe->slot];
951 struct ata_host *host = NULL;
952 struct ata_port *ap;
953 struct platform_device *pdev;
954 struct ata_device *dev;
955 void __iomem *io_addr, *ctrl_addr;
956 u32 iordy = (iordy_mask & mask) ? 0: ATA_FLAG_NO_IORDY;
957 int ret;
958
959 iordy |= controller->flags;
960
961 pdev = platform_device_register_simple(DRV_NAME, probe->slot, NULL, 0);
962 if (IS_ERR(pdev))
963 return PTR_ERR(pdev);
964
965 ret = -EBUSY;
966 if (devm_request_region(&pdev->dev, io, 8, "pata_legacy") == NULL ||
967 devm_request_region(&pdev->dev, io + 0x0206, 1,
968 "pata_legacy") == NULL)
969 goto fail;
Alan Coxf834e492007-02-07 13:46:00 -0800970
Tejun Heo5d728822007-04-17 23:44:08 +0900971 ret = -ENOMEM;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800972 io_addr = devm_ioport_map(&pdev->dev, io, 8);
973 ctrl_addr = devm_ioport_map(&pdev->dev, io + 0x0206, 1);
974 if (!io_addr || !ctrl_addr)
975 goto fail;
Bartlomiej Zolnierkiewicz8c7e8f92011-10-13 15:06:56 +0200976 ld->type = probe->type;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800977 if (controller->setup)
Alan Coxb8325482008-01-19 15:47:23 +0000978 if (controller->setup(pdev, probe, ld) < 0)
Alan Coxdefc9cd2008-01-10 14:33:10 -0800979 goto fail;
Tejun Heo5d728822007-04-17 23:44:08 +0900980 host = ata_host_alloc(&pdev->dev, 1);
981 if (!host)
982 goto fail;
983 ap = host->ports[0];
Jeff Garzik669a5db2006-08-29 18:12:40 -0400984
Tejun Heo5d728822007-04-17 23:44:08 +0900985 ap->ops = ops;
986 ap->pio_mask = pio_modes;
987 ap->flags |= ATA_FLAG_SLAVE_POSS | iordy;
Alan Coxe3cf95d2009-04-09 17:31:17 +0100988 ap->pflags |= controller->pflags;
Tejun Heo5d728822007-04-17 23:44:08 +0900989 ap->ioaddr.cmd_addr = io_addr;
990 ap->ioaddr.altstatus_addr = ctrl_addr;
991 ap->ioaddr.ctl_addr = ctrl_addr;
Tejun Heo9363c382008-04-07 22:47:16 +0900992 ata_sff_std_ports(&ap->ioaddr);
Alan Coxb8325482008-01-19 15:47:23 +0000993 ap->host->private_data = ld;
Tejun Heo5d728822007-04-17 23:44:08 +0900994
Alan Coxdefc9cd2008-01-10 14:33:10 -0800995 ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", io, io + 0x0206);
Tejun Heocbcdd872007-08-18 13:14:55 +0900996
Tejun Heo9363c382008-04-07 22:47:16 +0900997 ret = ata_host_activate(host, probe->irq, ata_sff_interrupt, 0,
998 &legacy_sht);
Tejun Heo5d728822007-04-17 23:44:08 +0900999 if (ret)
Jeff Garzik669a5db2006-08-29 18:12:40 -04001000 goto fail;
James Bottomley45bc955b2009-06-05 10:41:39 -04001001 async_synchronize_full();
Jeff Garzik669a5db2006-08-29 18:12:40 -04001002 ld->platform_dev = pdev;
Jeff Garzik669a5db2006-08-29 18:12:40 -04001003
Alan Coxdefc9cd2008-01-10 14:33:10 -08001004 /* Nothing found means we drop the port as its probably not there */
1005
1006 ret = -ENODEV;
Tejun Heo1eca4362008-11-03 20:03:17 +09001007 ata_for_each_dev(dev, &ap->link, ALL) {
Alan Coxdefc9cd2008-01-10 14:33:10 -08001008 if (!ata_dev_absent(dev)) {
1009 legacy_host[probe->slot] = host;
1010 ld->platform_dev = pdev;
1011 return 0;
1012 }
1013 }
Tejun Heo20cbf5f2009-04-14 12:59:03 +09001014 ata_host_detach(host);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001015fail:
1016 platform_device_unregister(pdev);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001017 return ret;
1018}
1019
1020/**
1021 * legacy_check_special_cases - ATA special cases
1022 * @p: PCI device to check
1023 * @master: set this if we find an ATA master
1024 * @master: set this if we find an ATA secondary
1025 *
Alan Coxdefc9cd2008-01-10 14:33:10 -08001026 * A small number of vendors implemented early PCI ATA interfaces
1027 * on bridge logic without the ATA interface being PCI visible.
1028 * Where we have a matching PCI driver we must skip the relevant
1029 * device here. If we don't know about it then the legacy driver
1030 * is the right driver anyway.
Jeff Garzik669a5db2006-08-29 18:12:40 -04001031 */
1032
Alan Coxb8325482008-01-19 15:47:23 +00001033static void __init legacy_check_special_cases(struct pci_dev *p, int *primary,
Alan Coxdefc9cd2008-01-10 14:33:10 -08001034 int *secondary)
Jeff Garzik669a5db2006-08-29 18:12:40 -04001035{
1036 /* Cyrix CS5510 pre SFF MWDMA ATA on the bridge */
1037 if (p->vendor == 0x1078 && p->device == 0x0000) {
1038 *primary = *secondary = 1;
1039 return;
1040 }
1041 /* Cyrix CS5520 pre SFF MWDMA ATA on the bridge */
1042 if (p->vendor == 0x1078 && p->device == 0x0002) {
1043 *primary = *secondary = 1;
1044 return;
1045 }
1046 /* Intel MPIIX - PIO ATA on non PCI side of bridge */
1047 if (p->vendor == 0x8086 && p->device == 0x1234) {
1048 u16 r;
1049 pci_read_config_word(p, 0x6C, &r);
Alan Coxdefc9cd2008-01-10 14:33:10 -08001050 if (r & 0x8000) {
1051 /* ATA port enabled */
Jeff Garzik669a5db2006-08-29 18:12:40 -04001052 if (r & 0x4000)
1053 *secondary = 1;
1054 else
1055 *primary = 1;
1056 }
1057 return;
1058 }
1059}
1060
Alan Coxdefc9cd2008-01-10 14:33:10 -08001061static __init void probe_opti_vlb(void)
1062{
1063 /* If an OPTI 82C46X is present find out where the channels are */
1064 static const char *optis[4] = {
1065 "3/463MV", "5MV",
1066 "5MVA", "5MVB"
1067 };
1068 u8 chans = 1;
1069 u8 ctrl = (opti_syscfg(0x30) & 0xC0) >> 6;
1070
1071 opti82c46x = 3; /* Assume master and slave first */
1072 printk(KERN_INFO DRV_NAME ": Opti 82C46%s chipset support.\n",
1073 optis[ctrl]);
1074 if (ctrl == 3)
1075 chans = (opti_syscfg(0x3F) & 0x20) ? 2 : 1;
1076 ctrl = opti_syscfg(0xAC);
1077 /* Check enabled and this port is the 465MV port. On the
1078 MVB we may have two channels */
1079 if (ctrl & 8) {
1080 if (chans == 2) {
1081 legacy_probe_add(0x1F0, 14, OPTI46X, 0);
1082 legacy_probe_add(0x170, 15, OPTI46X, 0);
1083 }
1084 if (ctrl & 4)
1085 legacy_probe_add(0x170, 15, OPTI46X, 0);
1086 else
1087 legacy_probe_add(0x1F0, 14, OPTI46X, 0);
1088 } else
1089 legacy_probe_add(0x1F0, 14, OPTI46X, 0);
1090}
1091
1092static __init void qdi65_identify_port(u8 r, u8 res, unsigned long port)
1093{
1094 static const unsigned long ide_port[2] = { 0x170, 0x1F0 };
1095 /* Check card type */
1096 if ((r & 0xF0) == 0xC0) {
1097 /* QD6500: single channel */
Alan Coxb8325482008-01-19 15:47:23 +00001098 if (r & 8)
Alan Coxdefc9cd2008-01-10 14:33:10 -08001099 /* Disabled ? */
Alan Coxdefc9cd2008-01-10 14:33:10 -08001100 return;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001101 legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01),
1102 QDI6500, port);
1103 }
1104 if (((r & 0xF0) == 0xA0) || (r & 0xF0) == 0x50) {
1105 /* QD6580: dual channel */
1106 if (!request_region(port + 2 , 2, "pata_qdi")) {
1107 release_region(port, 2);
1108 return;
1109 }
1110 res = inb(port + 3);
1111 /* Single channel mode ? */
1112 if (res & 1)
1113 legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01),
1114 QDI6580, port);
1115 else { /* Dual channel mode */
1116 legacy_probe_add(0x1F0, 14, QDI6580DP, port);
1117 /* port + 0x02, r & 0x04 */
1118 legacy_probe_add(0x170, 15, QDI6580DP, port + 2);
1119 }
Alan Coxb8325482008-01-19 15:47:23 +00001120 release_region(port + 2, 2);
Alan Coxdefc9cd2008-01-10 14:33:10 -08001121 }
1122}
1123
1124static __init void probe_qdi_vlb(void)
1125{
1126 unsigned long flags;
1127 static const unsigned long qd_port[2] = { 0x30, 0xB0 };
1128 int i;
1129
1130 /*
1131 * Check each possible QD65xx base address
1132 */
1133
1134 for (i = 0; i < 2; i++) {
1135 unsigned long port = qd_port[i];
1136 u8 r, res;
1137
1138
1139 if (request_region(port, 2, "pata_qdi")) {
1140 /* Check for a card */
1141 local_irq_save(flags);
1142 /* I have no h/w that needs this delay but it
1143 is present in the historic code */
1144 r = inb(port);
1145 udelay(1);
1146 outb(0x19, port);
1147 udelay(1);
1148 res = inb(port);
1149 udelay(1);
1150 outb(r, port);
1151 udelay(1);
1152 local_irq_restore(flags);
1153
1154 /* Fail */
1155 if (res == 0x19) {
1156 release_region(port, 2);
1157 continue;
1158 }
1159 /* Passes the presence test */
1160 r = inb(port + 1);
1161 udelay(1);
1162 /* Check port agrees with port set */
Alan Coxb8325482008-01-19 15:47:23 +00001163 if ((r & 2) >> 1 == i)
1164 qdi65_identify_port(r, res, port);
1165 release_region(port, 2);
Alan Coxdefc9cd2008-01-10 14:33:10 -08001166 }
1167 }
1168}
Jeff Garzik669a5db2006-08-29 18:12:40 -04001169
1170/**
1171 * legacy_init - attach legacy interfaces
1172 *
1173 * Attach legacy IDE interfaces by scanning the usual IRQ/port suspects.
1174 * Right now we do not scan the ide0 and ide1 address but should do so
1175 * for non PCI systems or systems with no PCI IDE legacy mode devices.
1176 * If you fix that note there are special cases to consider like VLB
1177 * drivers and CS5510/20.
1178 */
1179
1180static __init int legacy_init(void)
1181{
1182 int i;
1183 int ct = 0;
1184 int primary = 0;
1185 int secondary = 0;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001186 int pci_present = 0;
1187 struct legacy_probe *pl = &probe_list[0];
1188 int slot = 0;
Jeff Garzik669a5db2006-08-29 18:12:40 -04001189
1190 struct pci_dev *p = NULL;
1191
1192 for_each_pci_dev(p) {
1193 int r;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001194 /* Check for any overlap of the system ATA mappings. Native
1195 mode controllers stuck on these addresses or some devices
1196 in 'raid' mode won't be found by the storage class test */
Jeff Garzik669a5db2006-08-29 18:12:40 -04001197 for (r = 0; r < 6; r++) {
1198 if (pci_resource_start(p, r) == 0x1f0)
1199 primary = 1;
1200 if (pci_resource_start(p, r) == 0x170)
1201 secondary = 1;
1202 }
1203 /* Check for special cases */
1204 legacy_check_special_cases(p, &primary, &secondary);
1205
Alan Coxdefc9cd2008-01-10 14:33:10 -08001206 /* If PCI bus is present then don't probe for tertiary
1207 legacy ports */
1208 pci_present = 1;
Jeff Garzik669a5db2006-08-29 18:12:40 -04001209 }
1210
Alan Coxb8325482008-01-19 15:47:23 +00001211 if (winbond == 1)
1212 winbond = 0x130; /* Default port, alt is 1B0 */
1213
Alan Coxdefc9cd2008-01-10 14:33:10 -08001214 if (primary == 0 || all)
1215 legacy_probe_add(0x1F0, 14, UNKNOWN, 0);
1216 if (secondary == 0 || all)
1217 legacy_probe_add(0x170, 15, UNKNOWN, 0);
Jeff Garzik85cd7252006-08-31 00:03:49 -04001218
Alan Coxdefc9cd2008-01-10 14:33:10 -08001219 if (probe_all || !pci_present) {
1220 /* ISA/VLB extra ports */
1221 legacy_probe_add(0x1E8, 11, UNKNOWN, 0);
1222 legacy_probe_add(0x168, 10, UNKNOWN, 0);
1223 legacy_probe_add(0x1E0, 8, UNKNOWN, 0);
1224 legacy_probe_add(0x160, 12, UNKNOWN, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001225 }
1226
Alan Coxdefc9cd2008-01-10 14:33:10 -08001227 if (opti82c46x)
1228 probe_opti_vlb();
1229 if (qdi)
1230 probe_qdi_vlb();
1231
Alan Coxdefc9cd2008-01-10 14:33:10 -08001232 for (i = 0; i < NR_HOST; i++, pl++) {
1233 if (pl->port == 0)
Jeff Garzik669a5db2006-08-29 18:12:40 -04001234 continue;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001235 if (pl->type == UNKNOWN)
1236 pl->type = probe_chip_type(pl);
1237 pl->slot = slot++;
1238 if (legacy_init_one(pl) == 0)
Jeff Garzik669a5db2006-08-29 18:12:40 -04001239 ct++;
1240 }
1241 if (ct != 0)
1242 return 0;
1243 return -ENODEV;
1244}
1245
1246static __exit void legacy_exit(void)
1247{
1248 int i;
1249
1250 for (i = 0; i < nr_legacy_host; i++) {
1251 struct legacy_data *ld = &legacy_data[i];
Tejun Heo24dc5f32007-01-20 16:00:28 +09001252 ata_host_detach(legacy_host[i]);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001253 platform_device_unregister(ld->platform_dev);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001254 }
1255}
1256
1257MODULE_AUTHOR("Alan Cox");
1258MODULE_DESCRIPTION("low-level driver for legacy ATA");
1259MODULE_LICENSE("GPL");
1260MODULE_VERSION(DRV_VERSION);
Bartlomiej Zolnierkiewicz0dcd0a72011-10-13 15:11:39 +02001261MODULE_ALIAS("pata_qdi");
Bartlomiej Zolnierkiewicz6d981b92009-11-25 07:08:33 +00001262MODULE_ALIAS("pata_winbond");
Jeff Garzik669a5db2006-08-29 18:12:40 -04001263
1264module_param(probe_all, int, 0);
1265module_param(autospeed, int, 0);
1266module_param(ht6560a, int, 0);
1267module_param(ht6560b, int, 0);
1268module_param(opti82c611a, int, 0);
1269module_param(opti82c46x, int, 0);
Alan Coxdefc9cd2008-01-10 14:33:10 -08001270module_param(qdi, int, 0);
Bartlomiej Zolnierkiewicz6d981b92009-11-25 07:08:33 +00001271module_param(winbond, int, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001272module_param(pio_mask, int, 0);
Alan Coxf834e492007-02-07 13:46:00 -08001273module_param(iordy_mask, int, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001274
1275module_init(legacy_init);
1276module_exit(legacy_exit);