Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 1 | /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*- |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | */ |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 3 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
| 5 | * All Rights Reserved. |
Dave Airlie | bc54fd1 | 2005-06-23 22:46:46 +1000 | [diff] [blame] | 6 | * |
| 7 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 8 | * copy of this software and associated documentation files (the |
| 9 | * "Software"), to deal in the Software without restriction, including |
| 10 | * without limitation the rights to use, copy, modify, merge, publish, |
| 11 | * distribute, sub license, and/or sell copies of the Software, and to |
| 12 | * permit persons to whom the Software is furnished to do so, subject to |
| 13 | * the following conditions: |
| 14 | * |
| 15 | * The above copyright notice and this permission notice (including the |
| 16 | * next paragraph) shall be included in all copies or substantial portions |
| 17 | * of the Software. |
| 18 | * |
| 19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| 20 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 21 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
| 22 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR |
| 23 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 24 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 25 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 26 | * |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 27 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | |
| 29 | #include "drmP.h" |
| 30 | #include "drm.h" |
| 31 | #include "i915_drm.h" |
| 32 | #include "i915_drv.h" |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 33 | #include "intel_drv.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #define MAX_NOPID ((u32)~0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 37 | /** |
| 38 | * Interrupts that are always left unmasked. |
| 39 | * |
| 40 | * Since pipe events are edge-triggered from the PIPESTAT register to IIR, |
| 41 | * we leave them always unmasked in IMR and then control enabling them through |
| 42 | * PIPESTAT alone. |
| 43 | */ |
| 44 | #define I915_INTERRUPT_ENABLE_FIX (I915_ASLE_INTERRUPT | \ |
| 45 | I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | \ |
| 46 | I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) |
| 47 | |
| 48 | /** Interrupts that we mask and unmask at runtime. */ |
| 49 | #define I915_INTERRUPT_ENABLE_VAR (I915_USER_INTERRUPT) |
| 50 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 51 | #define I915_PIPE_VBLANK_STATUS (PIPE_START_VBLANK_INTERRUPT_STATUS |\ |
| 52 | PIPE_VBLANK_INTERRUPT_STATUS) |
| 53 | |
| 54 | #define I915_PIPE_VBLANK_ENABLE (PIPE_START_VBLANK_INTERRUPT_ENABLE |\ |
| 55 | PIPE_VBLANK_INTERRUPT_ENABLE) |
| 56 | |
| 57 | #define DRM_I915_VBLANK_PIPE_ALL (DRM_I915_VBLANK_PIPE_A | \ |
| 58 | DRM_I915_VBLANK_PIPE_B) |
| 59 | |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 60 | void |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 61 | i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask) |
| 62 | { |
| 63 | if ((dev_priv->irq_mask_reg & mask) != 0) { |
| 64 | dev_priv->irq_mask_reg &= ~mask; |
| 65 | I915_WRITE(IMR, dev_priv->irq_mask_reg); |
| 66 | (void) I915_READ(IMR); |
| 67 | } |
| 68 | } |
| 69 | |
| 70 | static inline void |
| 71 | i915_disable_irq(drm_i915_private_t *dev_priv, u32 mask) |
| 72 | { |
| 73 | if ((dev_priv->irq_mask_reg & mask) != mask) { |
| 74 | dev_priv->irq_mask_reg |= mask; |
| 75 | I915_WRITE(IMR, dev_priv->irq_mask_reg); |
| 76 | (void) I915_READ(IMR); |
| 77 | } |
| 78 | } |
| 79 | |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 80 | static inline u32 |
| 81 | i915_pipestat(int pipe) |
| 82 | { |
| 83 | if (pipe == 0) |
| 84 | return PIPEASTAT; |
| 85 | if (pipe == 1) |
| 86 | return PIPEBSTAT; |
Andrew Morton | 9c84ba4 | 2008-12-01 13:14:08 -0800 | [diff] [blame] | 87 | BUG(); |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 88 | } |
| 89 | |
| 90 | void |
| 91 | i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask) |
| 92 | { |
| 93 | if ((dev_priv->pipestat[pipe] & mask) != mask) { |
| 94 | u32 reg = i915_pipestat(pipe); |
| 95 | |
| 96 | dev_priv->pipestat[pipe] |= mask; |
| 97 | /* Enable the interrupt, clear any pending status */ |
| 98 | I915_WRITE(reg, dev_priv->pipestat[pipe] | (mask >> 16)); |
| 99 | (void) I915_READ(reg); |
| 100 | } |
| 101 | } |
| 102 | |
| 103 | void |
| 104 | i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask) |
| 105 | { |
| 106 | if ((dev_priv->pipestat[pipe] & mask) != 0) { |
| 107 | u32 reg = i915_pipestat(pipe); |
| 108 | |
| 109 | dev_priv->pipestat[pipe] &= ~mask; |
| 110 | I915_WRITE(reg, dev_priv->pipestat[pipe]); |
| 111 | (void) I915_READ(reg); |
| 112 | } |
| 113 | } |
| 114 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 115 | /** |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 116 | * i915_pipe_enabled - check if a pipe is enabled |
| 117 | * @dev: DRM device |
| 118 | * @pipe: pipe to check |
| 119 | * |
| 120 | * Reading certain registers when the pipe is disabled can hang the chip. |
| 121 | * Use this routine to make sure the PLL is running and the pipe is active |
| 122 | * before reading such registers if unsure. |
| 123 | */ |
| 124 | static int |
| 125 | i915_pipe_enabled(struct drm_device *dev, int pipe) |
| 126 | { |
| 127 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 128 | unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF; |
| 129 | |
| 130 | if (I915_READ(pipeconf) & PIPEACONF_ENABLE) |
| 131 | return 1; |
| 132 | |
| 133 | return 0; |
| 134 | } |
| 135 | |
Keith Packard | 42f52ef | 2008-10-18 19:39:29 -0700 | [diff] [blame] | 136 | /* Called from drm generic code, passed a 'crtc', which |
| 137 | * we use as a pipe index |
| 138 | */ |
| 139 | u32 i915_get_vblank_counter(struct drm_device *dev, int pipe) |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 140 | { |
| 141 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 142 | unsigned long high_frame; |
| 143 | unsigned long low_frame; |
| 144 | u32 high1, high2, low, count; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 145 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 146 | high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH; |
| 147 | low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL; |
| 148 | |
| 149 | if (!i915_pipe_enabled(dev, pipe)) { |
| 150 | DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe); |
| 151 | return 0; |
| 152 | } |
| 153 | |
| 154 | /* |
| 155 | * High & low register fields aren't synchronized, so make sure |
| 156 | * we get a low value that's stable across two reads of the high |
| 157 | * register. |
| 158 | */ |
| 159 | do { |
| 160 | high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >> |
| 161 | PIPE_FRAME_HIGH_SHIFT); |
| 162 | low = ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >> |
| 163 | PIPE_FRAME_LOW_SHIFT); |
| 164 | high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >> |
| 165 | PIPE_FRAME_HIGH_SHIFT); |
| 166 | } while (high1 != high2); |
| 167 | |
| 168 | count = (high1 << 8) | low; |
| 169 | |
| 170 | return count; |
| 171 | } |
| 172 | |
Jesse Barnes | 9880b7a | 2009-02-06 10:22:41 -0800 | [diff] [blame] | 173 | u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe) |
| 174 | { |
| 175 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 176 | int reg = pipe ? PIPEB_FRMCOUNT_GM45 : PIPEA_FRMCOUNT_GM45; |
| 177 | |
| 178 | if (!i915_pipe_enabled(dev, pipe)) { |
| 179 | DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe); |
| 180 | return 0; |
| 181 | } |
| 182 | |
| 183 | return I915_READ(reg); |
| 184 | } |
| 185 | |
Jesse Barnes | 5ca5828 | 2009-03-31 14:11:15 -0700 | [diff] [blame^] | 186 | /* |
| 187 | * Handle hotplug events outside the interrupt handler proper. |
| 188 | */ |
| 189 | static void i915_hotplug_work_func(struct work_struct *work) |
| 190 | { |
| 191 | drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t, |
| 192 | hotplug_work); |
| 193 | struct drm_device *dev = dev_priv->dev; |
| 194 | |
| 195 | /* Just fire off a uevent and let userspace tell us what to do */ |
| 196 | drm_sysfs_hotplug_event(dev); |
| 197 | } |
| 198 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 199 | irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) |
| 200 | { |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 201 | struct drm_device *dev = (struct drm_device *) arg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 203 | struct drm_i915_master_private *master_priv; |
Eric Anholt | cdfbc41 | 2008-11-04 15:50:30 -0800 | [diff] [blame] | 204 | u32 iir, new_iir; |
| 205 | u32 pipea_stats, pipeb_stats; |
Keith Packard | 05eff84 | 2008-11-19 14:03:05 -0800 | [diff] [blame] | 206 | u32 vblank_status; |
| 207 | u32 vblank_enable; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 208 | int vblank = 0; |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 209 | unsigned long irqflags; |
Keith Packard | 05eff84 | 2008-11-19 14:03:05 -0800 | [diff] [blame] | 210 | int irq_received; |
| 211 | int ret = IRQ_NONE; |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 212 | |
Eric Anholt | 630681d | 2008-10-06 15:14:12 -0700 | [diff] [blame] | 213 | atomic_inc(&dev_priv->irq_received); |
| 214 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 215 | iir = I915_READ(IIR); |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 216 | |
Keith Packard | 05eff84 | 2008-11-19 14:03:05 -0800 | [diff] [blame] | 217 | if (IS_I965G(dev)) { |
| 218 | vblank_status = I915_START_VBLANK_INTERRUPT_STATUS; |
| 219 | vblank_enable = PIPE_START_VBLANK_INTERRUPT_ENABLE; |
| 220 | } else { |
| 221 | vblank_status = I915_VBLANK_INTERRUPT_STATUS; |
| 222 | vblank_enable = I915_VBLANK_INTERRUPT_ENABLE; |
| 223 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 224 | |
Keith Packard | 05eff84 | 2008-11-19 14:03:05 -0800 | [diff] [blame] | 225 | for (;;) { |
| 226 | irq_received = iir != 0; |
| 227 | |
| 228 | /* Can't rely on pipestat interrupt bit in iir as it might |
| 229 | * have been cleared after the pipestat interrupt was received. |
| 230 | * It doesn't set the bit in iir again, but it still produces |
| 231 | * interrupts (for non-MSI). |
| 232 | */ |
| 233 | spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); |
| 234 | pipea_stats = I915_READ(PIPEASTAT); |
| 235 | pipeb_stats = I915_READ(PIPEBSTAT); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 236 | |
Eric Anholt | cdfbc41 | 2008-11-04 15:50:30 -0800 | [diff] [blame] | 237 | /* |
| 238 | * Clear the PIPE(A|B)STAT regs before the IIR |
| 239 | */ |
Keith Packard | 05eff84 | 2008-11-19 14:03:05 -0800 | [diff] [blame] | 240 | if (pipea_stats & 0x8000ffff) { |
Eric Anholt | cdfbc41 | 2008-11-04 15:50:30 -0800 | [diff] [blame] | 241 | I915_WRITE(PIPEASTAT, pipea_stats); |
Keith Packard | 05eff84 | 2008-11-19 14:03:05 -0800 | [diff] [blame] | 242 | irq_received = 1; |
Eric Anholt | cdfbc41 | 2008-11-04 15:50:30 -0800 | [diff] [blame] | 243 | } |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 244 | |
Keith Packard | 05eff84 | 2008-11-19 14:03:05 -0800 | [diff] [blame] | 245 | if (pipeb_stats & 0x8000ffff) { |
Eric Anholt | cdfbc41 | 2008-11-04 15:50:30 -0800 | [diff] [blame] | 246 | I915_WRITE(PIPEBSTAT, pipeb_stats); |
Keith Packard | 05eff84 | 2008-11-19 14:03:05 -0800 | [diff] [blame] | 247 | irq_received = 1; |
Eric Anholt | cdfbc41 | 2008-11-04 15:50:30 -0800 | [diff] [blame] | 248 | } |
Keith Packard | 05eff84 | 2008-11-19 14:03:05 -0800 | [diff] [blame] | 249 | spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags); |
| 250 | |
| 251 | if (!irq_received) |
| 252 | break; |
| 253 | |
| 254 | ret = IRQ_HANDLED; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 255 | |
Jesse Barnes | 5ca5828 | 2009-03-31 14:11:15 -0700 | [diff] [blame^] | 256 | /* Consume port. Then clear IIR or we'll miss events */ |
| 257 | if ((I915_HAS_HOTPLUG(dev)) && |
| 258 | (iir & I915_DISPLAY_PORT_INTERRUPT)) { |
| 259 | u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT); |
| 260 | |
| 261 | DRM_DEBUG("hotplug event received, stat 0x%08x\n", |
| 262 | hotplug_status); |
| 263 | if (hotplug_status & dev_priv->hotplug_supported_mask) |
| 264 | schedule_work(&dev_priv->hotplug_work); |
| 265 | |
| 266 | I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status); |
| 267 | I915_READ(PORT_HOTPLUG_STAT); |
| 268 | } |
| 269 | |
Eric Anholt | cdfbc41 | 2008-11-04 15:50:30 -0800 | [diff] [blame] | 270 | I915_WRITE(IIR, iir); |
| 271 | new_iir = I915_READ(IIR); /* Flush posted writes */ |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 272 | |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 273 | if (dev->primary->master) { |
| 274 | master_priv = dev->primary->master->driver_priv; |
| 275 | if (master_priv->sarea_priv) |
| 276 | master_priv->sarea_priv->last_dispatch = |
| 277 | READ_BREADCRUMB(dev_priv); |
| 278 | } |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 279 | |
Eric Anholt | cdfbc41 | 2008-11-04 15:50:30 -0800 | [diff] [blame] | 280 | if (iir & I915_USER_INTERRUPT) { |
| 281 | dev_priv->mm.irq_gem_seqno = i915_get_gem_seqno(dev); |
| 282 | DRM_WAKEUP(&dev_priv->irq_queue); |
| 283 | } |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 284 | |
Keith Packard | 05eff84 | 2008-11-19 14:03:05 -0800 | [diff] [blame] | 285 | if (pipea_stats & vblank_status) { |
Eric Anholt | cdfbc41 | 2008-11-04 15:50:30 -0800 | [diff] [blame] | 286 | vblank++; |
| 287 | drm_handle_vblank(dev, 0); |
| 288 | } |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 289 | |
Keith Packard | 05eff84 | 2008-11-19 14:03:05 -0800 | [diff] [blame] | 290 | if (pipeb_stats & vblank_status) { |
Eric Anholt | cdfbc41 | 2008-11-04 15:50:30 -0800 | [diff] [blame] | 291 | vblank++; |
| 292 | drm_handle_vblank(dev, 1); |
| 293 | } |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 294 | |
Eric Anholt | cdfbc41 | 2008-11-04 15:50:30 -0800 | [diff] [blame] | 295 | if ((pipeb_stats & I915_LEGACY_BLC_EVENT_STATUS) || |
| 296 | (iir & I915_ASLE_INTERRUPT)) |
| 297 | opregion_asle_intr(dev); |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 298 | |
Eric Anholt | cdfbc41 | 2008-11-04 15:50:30 -0800 | [diff] [blame] | 299 | /* With MSI, interrupts are only generated when iir |
| 300 | * transitions from zero to nonzero. If another bit got |
| 301 | * set while we were handling the existing iir bits, then |
| 302 | * we would never get another interrupt. |
| 303 | * |
| 304 | * This is fine on non-MSI as well, as if we hit this path |
| 305 | * we avoid exiting the interrupt handler only to generate |
| 306 | * another one. |
| 307 | * |
| 308 | * Note that for MSI this could cause a stray interrupt report |
| 309 | * if an interrupt landed in the time between writing IIR and |
| 310 | * the posting read. This should be rare enough to never |
| 311 | * trigger the 99% of 100,000 interrupts test for disabling |
| 312 | * stray interrupts. |
| 313 | */ |
| 314 | iir = new_iir; |
Keith Packard | 05eff84 | 2008-11-19 14:03:05 -0800 | [diff] [blame] | 315 | } |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 316 | |
Keith Packard | 05eff84 | 2008-11-19 14:03:05 -0800 | [diff] [blame] | 317 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 318 | } |
| 319 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 320 | static int i915_emit_irq(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 321 | { |
| 322 | drm_i915_private_t *dev_priv = dev->dev_private; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 323 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 324 | RING_LOCALS; |
| 325 | |
| 326 | i915_kernel_lost_context(dev); |
| 327 | |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 328 | DRM_DEBUG("\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 329 | |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 330 | dev_priv->counter++; |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 331 | if (dev_priv->counter > 0x7FFFFFFFUL) |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 332 | dev_priv->counter = 1; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 333 | if (master_priv->sarea_priv) |
| 334 | master_priv->sarea_priv->last_enqueue = dev_priv->counter; |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 335 | |
Keith Packard | 0baf823 | 2008-11-08 11:44:14 +1000 | [diff] [blame] | 336 | BEGIN_LP_RING(4); |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 337 | OUT_RING(MI_STORE_DWORD_INDEX); |
Keith Packard | 0baf823 | 2008-11-08 11:44:14 +1000 | [diff] [blame] | 338 | OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT); |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 339 | OUT_RING(dev_priv->counter); |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 340 | OUT_RING(MI_USER_INTERRUPT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 341 | ADVANCE_LP_RING(); |
Dave Airlie | bc5f452 | 2007-11-05 12:50:58 +1000 | [diff] [blame] | 342 | |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 343 | return dev_priv->counter; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 344 | } |
| 345 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 346 | void i915_user_irq_get(struct drm_device *dev) |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 347 | { |
| 348 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 349 | unsigned long irqflags; |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 350 | |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 351 | spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 352 | if (dev->irq_enabled && (++dev_priv->user_irq_refcount == 1)) |
| 353 | i915_enable_irq(dev_priv, I915_USER_INTERRUPT); |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 354 | spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 355 | } |
| 356 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 357 | void i915_user_irq_put(struct drm_device *dev) |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 358 | { |
| 359 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 360 | unsigned long irqflags; |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 361 | |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 362 | spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 363 | BUG_ON(dev->irq_enabled && dev_priv->user_irq_refcount <= 0); |
| 364 | if (dev->irq_enabled && (--dev_priv->user_irq_refcount == 0)) |
| 365 | i915_disable_irq(dev_priv, I915_USER_INTERRUPT); |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 366 | spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 367 | } |
| 368 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 369 | static int i915_wait_irq(struct drm_device * dev, int irq_nr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | { |
| 371 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 372 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 373 | int ret = 0; |
| 374 | |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 375 | DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 376 | READ_BREADCRUMB(dev_priv)); |
| 377 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 378 | if (READ_BREADCRUMB(dev_priv) >= irq_nr) { |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 379 | if (master_priv->sarea_priv) |
| 380 | master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 381 | return 0; |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 382 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 383 | |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 384 | if (master_priv->sarea_priv) |
| 385 | master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 386 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 387 | i915_user_irq_get(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 388 | DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ, |
| 389 | READ_BREADCRUMB(dev_priv) >= irq_nr); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 390 | i915_user_irq_put(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 391 | |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 392 | if (ret == -EBUSY) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 393 | DRM_ERROR("EBUSY -- rec: %d emitted: %d\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 394 | READ_BREADCRUMB(dev_priv), (int)dev_priv->counter); |
| 395 | } |
| 396 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 397 | return ret; |
| 398 | } |
| 399 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 400 | /* Needs the lock as it touches the ring. |
| 401 | */ |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 402 | int i915_irq_emit(struct drm_device *dev, void *data, |
| 403 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 404 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 405 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 406 | drm_i915_irq_emit_t *emit = data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 407 | int result; |
| 408 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 409 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 410 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 411 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 412 | } |
Eric Anholt | 299eb93 | 2009-02-24 22:14:12 -0800 | [diff] [blame] | 413 | |
| 414 | RING_LOCK_TEST_WITH_RETURN(dev, file_priv); |
| 415 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 416 | mutex_lock(&dev->struct_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 417 | result = i915_emit_irq(dev); |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 418 | mutex_unlock(&dev->struct_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 419 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 420 | if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 421 | DRM_ERROR("copy_to_user\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 422 | return -EFAULT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 423 | } |
| 424 | |
| 425 | return 0; |
| 426 | } |
| 427 | |
| 428 | /* Doesn't need the hardware lock. |
| 429 | */ |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 430 | int i915_irq_wait(struct drm_device *dev, void *data, |
| 431 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 432 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 433 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 434 | drm_i915_irq_wait_t *irqwait = data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 435 | |
| 436 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 437 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 438 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 439 | } |
| 440 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 441 | return i915_wait_irq(dev, irqwait->irq_seq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 442 | } |
| 443 | |
Keith Packard | 42f52ef | 2008-10-18 19:39:29 -0700 | [diff] [blame] | 444 | /* Called from drm generic code, passed 'crtc' which |
| 445 | * we use as a pipe index |
| 446 | */ |
| 447 | int i915_enable_vblank(struct drm_device *dev, int pipe) |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 448 | { |
| 449 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 450 | unsigned long irqflags; |
Jesse Barnes | 71e0ffa | 2009-01-08 10:42:15 -0800 | [diff] [blame] | 451 | int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF; |
| 452 | u32 pipeconf; |
| 453 | |
| 454 | pipeconf = I915_READ(pipeconf_reg); |
| 455 | if (!(pipeconf & PIPEACONF_ENABLE)) |
| 456 | return -EINVAL; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 457 | |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 458 | spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 459 | if (IS_I965G(dev)) |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 460 | i915_enable_pipestat(dev_priv, pipe, |
| 461 | PIPE_START_VBLANK_INTERRUPT_ENABLE); |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 462 | else |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 463 | i915_enable_pipestat(dev_priv, pipe, |
| 464 | PIPE_VBLANK_INTERRUPT_ENABLE); |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 465 | spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 466 | return 0; |
| 467 | } |
| 468 | |
Keith Packard | 42f52ef | 2008-10-18 19:39:29 -0700 | [diff] [blame] | 469 | /* Called from drm generic code, passed 'crtc' which |
| 470 | * we use as a pipe index |
| 471 | */ |
| 472 | void i915_disable_vblank(struct drm_device *dev, int pipe) |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 473 | { |
| 474 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 475 | unsigned long irqflags; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 476 | |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 477 | spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 478 | i915_disable_pipestat(dev_priv, pipe, |
| 479 | PIPE_VBLANK_INTERRUPT_ENABLE | |
| 480 | PIPE_START_VBLANK_INTERRUPT_ENABLE); |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame] | 481 | spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 482 | } |
| 483 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 484 | void i915_enable_interrupt (struct drm_device *dev) |
| 485 | { |
| 486 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 487 | opregion_enable_asle(dev); |
| 488 | dev_priv->irq_enabled = 1; |
| 489 | } |
| 490 | |
| 491 | |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 492 | /* Set the vblank monitor pipe |
| 493 | */ |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 494 | int i915_vblank_pipe_set(struct drm_device *dev, void *data, |
| 495 | struct drm_file *file_priv) |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 496 | { |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 497 | drm_i915_private_t *dev_priv = dev->dev_private; |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 498 | |
| 499 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 500 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 501 | return -EINVAL; |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 502 | } |
| 503 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | 5b51694 | 2006-10-25 00:08:23 +1000 | [diff] [blame] | 504 | return 0; |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 505 | } |
| 506 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 507 | int i915_vblank_pipe_get(struct drm_device *dev, void *data, |
| 508 | struct drm_file *file_priv) |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 509 | { |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 510 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 511 | drm_i915_vblank_pipe_t *pipe = data; |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 512 | |
| 513 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 514 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 515 | return -EINVAL; |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 516 | } |
| 517 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 518 | pipe->pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 519 | |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 520 | return 0; |
| 521 | } |
| 522 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 523 | /** |
| 524 | * Schedule buffer swap at given vertical blank. |
| 525 | */ |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 526 | int i915_vblank_swap(struct drm_device *dev, void *data, |
| 527 | struct drm_file *file_priv) |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 528 | { |
Eric Anholt | bd95e0a | 2008-11-04 12:01:24 -0800 | [diff] [blame] | 529 | /* The delayed swap mechanism was fundamentally racy, and has been |
| 530 | * removed. The model was that the client requested a delayed flip/swap |
| 531 | * from the kernel, then waited for vblank before continuing to perform |
| 532 | * rendering. The problem was that the kernel might wake the client |
| 533 | * up before it dispatched the vblank swap (since the lock has to be |
| 534 | * held while touching the ringbuffer), in which case the client would |
| 535 | * clear and start the next frame before the swap occurred, and |
| 536 | * flicker would occur in addition to likely missing the vblank. |
| 537 | * |
| 538 | * In the absence of this ioctl, userland falls back to a correct path |
| 539 | * of waiting for a vblank, then dispatching the swap on its own. |
| 540 | * Context switching to userland and back is plenty fast enough for |
| 541 | * meeting the requirements of vblank swapping. |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 542 | */ |
Eric Anholt | bd95e0a | 2008-11-04 12:01:24 -0800 | [diff] [blame] | 543 | return -EINVAL; |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 544 | } |
| 545 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 546 | /* drm_dma.h hooks |
| 547 | */ |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 548 | void i915_driver_irq_preinstall(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 549 | { |
| 550 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 551 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 552 | atomic_set(&dev_priv->irq_received, 0); |
| 553 | |
Jesse Barnes | 5ca5828 | 2009-03-31 14:11:15 -0700 | [diff] [blame^] | 554 | if (I915_HAS_HOTPLUG(dev)) { |
| 555 | I915_WRITE(PORT_HOTPLUG_EN, 0); |
| 556 | I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT)); |
| 557 | } |
| 558 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 559 | I915_WRITE(HWSTAM, 0xeffe); |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 560 | I915_WRITE(PIPEASTAT, 0); |
| 561 | I915_WRITE(PIPEBSTAT, 0); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 562 | I915_WRITE(IMR, 0xffffffff); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 563 | I915_WRITE(IER, 0x0); |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 564 | (void) I915_READ(IER); |
Jesse Barnes | 5ca5828 | 2009-03-31 14:11:15 -0700 | [diff] [blame^] | 565 | INIT_WORK(&dev_priv->hotplug_work, i915_hotplug_work_func); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 566 | } |
| 567 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 568 | int i915_driver_irq_postinstall(struct drm_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 569 | { |
| 570 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Jesse Barnes | 5ca5828 | 2009-03-31 14:11:15 -0700 | [diff] [blame^] | 571 | u32 enable_mask = I915_INTERRUPT_ENABLE_FIX | I915_INTERRUPT_ENABLE_VAR; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 572 | |
| 573 | dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 574 | |
| 575 | dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */ |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 576 | |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 577 | /* Unmask the interrupts that we always want on. */ |
| 578 | dev_priv->irq_mask_reg = ~I915_INTERRUPT_ENABLE_FIX; |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 579 | |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 580 | dev_priv->pipestat[0] = 0; |
| 581 | dev_priv->pipestat[1] = 0; |
| 582 | |
Jesse Barnes | 5ca5828 | 2009-03-31 14:11:15 -0700 | [diff] [blame^] | 583 | if (I915_HAS_HOTPLUG(dev)) { |
| 584 | u32 hotplug_en = I915_READ(PORT_HOTPLUG_EN); |
| 585 | |
| 586 | /* Leave other bits alone */ |
| 587 | hotplug_en |= HOTPLUG_EN_MASK; |
| 588 | I915_WRITE(PORT_HOTPLUG_EN, hotplug_en); |
| 589 | |
| 590 | dev_priv->hotplug_supported_mask = CRT_HOTPLUG_INT_STATUS | |
| 591 | TV_HOTPLUG_INT_STATUS | SDVOC_HOTPLUG_INT_STATUS | |
| 592 | SDVOB_HOTPLUG_INT_STATUS; |
| 593 | if (IS_G4X(dev)) { |
| 594 | dev_priv->hotplug_supported_mask |= |
| 595 | HDMIB_HOTPLUG_INT_STATUS | |
| 596 | HDMIC_HOTPLUG_INT_STATUS | |
| 597 | HDMID_HOTPLUG_INT_STATUS; |
| 598 | } |
| 599 | /* Enable in IER... */ |
| 600 | enable_mask |= I915_DISPLAY_PORT_INTERRUPT; |
| 601 | /* and unmask in IMR */ |
| 602 | i915_enable_irq(dev_priv, I915_DISPLAY_PORT_INTERRUPT); |
| 603 | } |
| 604 | |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 605 | /* Disable pipe interrupt enables, clear pending pipe status */ |
| 606 | I915_WRITE(PIPEASTAT, I915_READ(PIPEASTAT) & 0x8000ffff); |
| 607 | I915_WRITE(PIPEBSTAT, I915_READ(PIPEBSTAT) & 0x8000ffff); |
| 608 | /* Clear pending interrupt status */ |
| 609 | I915_WRITE(IIR, I915_READ(IIR)); |
| 610 | |
Jesse Barnes | 5ca5828 | 2009-03-31 14:11:15 -0700 | [diff] [blame^] | 611 | I915_WRITE(IER, enable_mask); |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 612 | I915_WRITE(IMR, dev_priv->irq_mask_reg); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 613 | (void) I915_READ(IER); |
| 614 | |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 615 | opregion_enable_asle(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 616 | DRM_INIT_WAITQUEUE(&dev_priv->irq_queue); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 617 | |
| 618 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 619 | } |
| 620 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 621 | void i915_driver_irq_uninstall(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 622 | { |
| 623 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Dave Airlie | 91e3738 | 2006-02-18 15:17:04 +1100 | [diff] [blame] | 624 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 625 | if (!dev_priv) |
| 626 | return; |
| 627 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 628 | dev_priv->vblank_pipe = 0; |
| 629 | |
Jesse Barnes | 5ca5828 | 2009-03-31 14:11:15 -0700 | [diff] [blame^] | 630 | if (I915_HAS_HOTPLUG(dev)) { |
| 631 | I915_WRITE(PORT_HOTPLUG_EN, 0); |
| 632 | I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT)); |
| 633 | } |
| 634 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 635 | I915_WRITE(HWSTAM, 0xffffffff); |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 636 | I915_WRITE(PIPEASTAT, 0); |
| 637 | I915_WRITE(PIPEBSTAT, 0); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 638 | I915_WRITE(IMR, 0xffffffff); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 639 | I915_WRITE(IER, 0x0); |
Dave Airlie | 91e3738 | 2006-02-18 15:17:04 +1100 | [diff] [blame] | 640 | |
Keith Packard | 7c46358 | 2008-11-04 02:03:27 -0800 | [diff] [blame] | 641 | I915_WRITE(PIPEASTAT, I915_READ(PIPEASTAT) & 0x8000ffff); |
| 642 | I915_WRITE(PIPEBSTAT, I915_READ(PIPEBSTAT) & 0x8000ffff); |
| 643 | I915_WRITE(IIR, I915_READ(IIR)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 644 | } |