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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * File: msi.c
3 * Purpose: PCI Message Signaled Interrupt (MSI)
4 *
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
7 */
8
Eric W. Biederman1ce03372006-10-04 02:16:41 -07009#include <linux/err.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070010#include <linux/mm.h>
11#include <linux/irq.h>
12#include <linux/interrupt.h>
Paul Gortmaker363c75d2011-05-27 09:37:25 -040013#include <linux/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <linux/ioport.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <linux/pci.h>
16#include <linux/proc_fs.h>
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070017#include <linux/msi.h>
Dan Williams4fdadeb2007-04-26 18:21:38 -070018#include <linux/smp.h>
Hidetoshi Seto500559a2009-08-10 10:14:15 +090019#include <linux/errno.h>
20#include <linux/io.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090021#include <linux/slab.h>
Jiang Liu3878eae2014-11-11 21:02:18 +080022#include <linux/irqdomain.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070023
24#include "pci.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070025
Linus Torvalds1da177e2005-04-16 15:20:36 -070026static int pci_msi_enable = 1;
Yijing Wang38737d82014-10-27 10:44:36 +080027int pci_msi_ignore_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -070028
Bjorn Helgaas527eee22013-04-17 17:44:48 -060029#define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
30
Jiang Liu8e047ad2014-11-15 22:24:07 +080031#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
32static struct irq_domain *pci_msi_default_domain;
33static DEFINE_MUTEX(pci_msi_domain_lock);
34
35struct irq_domain * __weak arch_get_pci_msi_domain(struct pci_dev *dev)
36{
37 return pci_msi_default_domain;
38}
39
Marc Zyngier020c3122014-11-15 10:49:12 +000040static struct irq_domain *pci_msi_get_domain(struct pci_dev *dev)
41{
42 struct irq_domain *domain = NULL;
43
44 if (dev->bus->msi)
45 domain = dev->bus->msi->domain;
46 if (!domain)
47 domain = arch_get_pci_msi_domain(dev);
48
49 return domain;
50}
51
Jiang Liu8e047ad2014-11-15 22:24:07 +080052static int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
53{
54 struct irq_domain *domain;
55
Marc Zyngier020c3122014-11-15 10:49:12 +000056 domain = pci_msi_get_domain(dev);
Jiang Liu8e047ad2014-11-15 22:24:07 +080057 if (domain)
58 return pci_msi_domain_alloc_irqs(domain, dev, nvec, type);
59
60 return arch_setup_msi_irqs(dev, nvec, type);
61}
62
63static void pci_msi_teardown_msi_irqs(struct pci_dev *dev)
64{
65 struct irq_domain *domain;
66
Marc Zyngier020c3122014-11-15 10:49:12 +000067 domain = pci_msi_get_domain(dev);
Jiang Liu8e047ad2014-11-15 22:24:07 +080068 if (domain)
69 pci_msi_domain_free_irqs(domain, dev);
70 else
71 arch_teardown_msi_irqs(dev);
72}
73#else
74#define pci_msi_setup_msi_irqs arch_setup_msi_irqs
75#define pci_msi_teardown_msi_irqs arch_teardown_msi_irqs
76#endif
Bjorn Helgaas527eee22013-04-17 17:44:48 -060077
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010078/* Arch hooks */
79
Yijing Wang262a2ba2014-11-11 15:22:45 -070080struct msi_controller * __weak pcibios_msi_controller(struct pci_dev *dev)
81{
82 return NULL;
83}
84
85static struct msi_controller *pci_msi_controller(struct pci_dev *dev)
86{
87 struct msi_controller *msi_ctrl = dev->bus->msi;
88
89 if (msi_ctrl)
90 return msi_ctrl;
91
92 return pcibios_msi_controller(dev);
93}
94
Thomas Petazzoni4287d822013-08-09 22:27:06 +020095int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
96{
Yijing Wang262a2ba2014-11-11 15:22:45 -070097 struct msi_controller *chip = pci_msi_controller(dev);
Thierry Reding0cbdcfc2013-08-09 22:27:08 +020098 int err;
99
100 if (!chip || !chip->setup_irq)
101 return -EINVAL;
102
103 err = chip->setup_irq(chip, dev, desc);
104 if (err < 0)
105 return err;
106
107 irq_set_chip_data(desc->irq, chip);
108
109 return 0;
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200110}
111
112void __weak arch_teardown_msi_irq(unsigned int irq)
113{
Yijing Wangc2791b82014-11-11 17:45:45 -0700114 struct msi_controller *chip = irq_get_chip_data(irq);
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200115
116 if (!chip || !chip->teardown_irq)
117 return;
118
119 chip->teardown_irq(chip, irq);
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200120}
121
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200122int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100123{
124 struct msi_desc *entry;
125 int ret;
126
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400127 /*
128 * If an architecture wants to support multiple MSI, it needs to
129 * override arch_setup_msi_irqs()
130 */
131 if (type == PCI_CAP_ID_MSI && nvec > 1)
132 return 1;
133
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100134 list_for_each_entry(entry, &dev->msi_list, list) {
135 ret = arch_setup_msi_irq(dev, entry);
Michael Ellermanb5fbf532009-02-11 22:27:02 +1100136 if (ret < 0)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100137 return ret;
Michael Ellermanb5fbf532009-02-11 22:27:02 +1100138 if (ret > 0)
139 return -ENOSPC;
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100140 }
141
142 return 0;
143}
144
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200145/*
146 * We have a default implementation available as a separate non-weak
147 * function, as it is used by the Xen x86 PCI code
148 */
Thomas Gleixner1525bf02010-10-06 16:05:35 -0400149void default_teardown_msi_irqs(struct pci_dev *dev)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100150{
Jiang Liu63a7b172014-11-06 22:20:32 +0800151 int i;
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100152 struct msi_desc *entry;
153
Jiang Liu63a7b172014-11-06 22:20:32 +0800154 list_for_each_entry(entry, &dev->msi_list, list)
155 if (entry->irq)
156 for (i = 0; i < entry->nvec_used; i++)
157 arch_teardown_msi_irq(entry->irq + i);
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100158}
159
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200160void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
161{
162 return default_teardown_msi_irqs(dev);
163}
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500164
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800165static void default_restore_msi_irq(struct pci_dev *dev, int irq)
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500166{
167 struct msi_desc *entry;
168
169 entry = NULL;
170 if (dev->msix_enabled) {
171 list_for_each_entry(entry, &dev->msi_list, list) {
172 if (irq == entry->irq)
173 break;
174 }
175 } else if (dev->msi_enabled) {
176 entry = irq_get_msi_desc(irq);
177 }
178
179 if (entry)
Jiang Liu83a18912014-11-09 23:10:34 +0800180 __pci_write_msi_msg(entry, &entry->msg);
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500181}
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200182
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800183void __weak arch_restore_msi_irqs(struct pci_dev *dev)
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200184{
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800185 return default_restore_msi_irqs(dev);
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200186}
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500187
Gavin Shane375b562013-04-04 16:54:30 +0000188static void msi_set_enable(struct pci_dev *dev, int enable)
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800189{
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800190 u16 control;
191
Gavin Shane375b562013-04-04 16:54:30 +0000192 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
Matthew Wilcox110828c2009-06-16 06:31:45 -0600193 control &= ~PCI_MSI_FLAGS_ENABLE;
194 if (enable)
195 control |= PCI_MSI_FLAGS_ENABLE;
Gavin Shane375b562013-04-04 16:54:30 +0000196 pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
Hidetoshi Seto5ca5c022008-05-19 13:48:17 +0900197}
198
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800199static void msix_clear_and_set_ctrl(struct pci_dev *dev, u16 clear, u16 set)
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800200{
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800201 u16 ctrl;
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800202
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800203 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &ctrl);
204 ctrl &= ~clear;
205 ctrl |= set;
206 pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, ctrl);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800207}
208
Matthew Wilcoxbffac3c2009-01-21 19:19:19 -0500209static inline __attribute_const__ u32 msi_mask(unsigned x)
210{
Matthew Wilcox0b49ec32009-02-08 20:27:47 -0700211 /* Don't shift by >= width of type */
212 if (x >= 5)
213 return 0xffffffff;
214 return (1 << (1 << x)) - 1;
Matthew Wilcoxbffac3c2009-01-21 19:19:19 -0500215}
216
Matthew Wilcoxce6fce42008-07-25 15:42:58 -0600217/*
218 * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
219 * mask all MSI interrupts by clearing the MSI enable bit does not work
220 * reliably as devices without an INTx disable bit will then generate a
221 * level IRQ which will never be cleared.
Matthew Wilcoxce6fce42008-07-25 15:42:58 -0600222 */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100223u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700224{
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400225 u32 mask_bits = desc->masked;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226
Yijing Wang38737d82014-10-27 10:44:36 +0800227 if (pci_msi_ignore_mask || !desc->msi_attrib.maskbit)
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900228 return 0;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400229
230 mask_bits &= ~mask;
231 mask_bits |= flag;
232 pci_write_config_dword(desc->dev, desc->mask_pos, mask_bits);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900233
234 return mask_bits;
235}
236
237static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
238{
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100239 desc->masked = __pci_msi_desc_mask_irq(desc, mask, flag);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400240}
241
242/*
243 * This internal function does not flush PCI writes to the device.
244 * All users must ensure that they read from the device before either
245 * assuming that the device state is up to date, or returning out of this
246 * file. This saves a few milliseconds when initialising devices with lots
247 * of MSI-X interrupts.
248 */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100249u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400250{
251 u32 mask_bits = desc->masked;
252 unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
Hidetoshi Seto2c21fd42009-06-23 17:40:04 +0900253 PCI_MSIX_ENTRY_VECTOR_CTRL;
Yijing Wang38737d82014-10-27 10:44:36 +0800254
255 if (pci_msi_ignore_mask)
256 return 0;
257
Sheng Yang8d805282010-11-11 15:46:55 +0800258 mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
259 if (flag)
260 mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400261 writel(mask_bits, desc->mask_base + offset);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900262
263 return mask_bits;
264}
265
266static void msix_mask_irq(struct msi_desc *desc, u32 flag)
267{
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100268 desc->masked = __pci_msix_desc_mask_irq(desc, flag);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400269}
270
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200271static void msi_set_mask_bit(struct irq_data *data, u32 flag)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400272{
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200273 struct msi_desc *desc = irq_data_get_msi(data);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400274
275 if (desc->msi_attrib.is_msix) {
276 msix_mask_irq(desc, flag);
277 readl(desc->mask_base); /* Flush write to device */
Matthew Wilcox24d27552009-03-17 08:54:06 -0400278 } else {
Yijing Wanga281b782014-07-08 10:08:55 +0800279 unsigned offset = data->irq - desc->irq;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400280 msi_mask_irq(desc, 1 << offset, flag << offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700281 }
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400282}
283
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100284/**
285 * pci_msi_mask_irq - Generic irq chip callback to mask PCI/MSI interrupts
286 * @data: pointer to irqdata associated to that interrupt
287 */
288void pci_msi_mask_irq(struct irq_data *data)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400289{
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200290 msi_set_mask_bit(data, 1);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400291}
292
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100293/**
294 * pci_msi_unmask_irq - Generic irq chip callback to unmask PCI/MSI interrupts
295 * @data: pointer to irqdata associated to that interrupt
296 */
297void pci_msi_unmask_irq(struct irq_data *data)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400298{
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200299 msi_set_mask_bit(data, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700300}
301
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800302void default_restore_msi_irqs(struct pci_dev *dev)
303{
304 struct msi_desc *entry;
305
Jiang Liu3f3ceca2014-11-06 22:20:31 +0800306 list_for_each_entry(entry, &dev->msi_list, list)
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800307 default_restore_msi_irq(dev, entry->irq);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800308}
309
Jiang Liu891d4a42014-11-09 23:10:33 +0800310void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700311{
Ben Hutchings30da5522010-07-23 14:56:28 +0100312 BUG_ON(entry->dev->current_state != PCI_D0);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700313
Ben Hutchings30da5522010-07-23 14:56:28 +0100314 if (entry->msi_attrib.is_msix) {
315 void __iomem *base = entry->mask_base +
316 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
317
318 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR);
319 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
320 msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
321 } else {
322 struct pci_dev *dev = entry->dev;
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600323 int pos = dev->msi_cap;
Ben Hutchings30da5522010-07-23 14:56:28 +0100324 u16 data;
325
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600326 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO,
327 &msg->address_lo);
Ben Hutchings30da5522010-07-23 14:56:28 +0100328 if (entry->msi_attrib.is_64) {
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600329 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI,
330 &msg->address_hi);
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600331 pci_read_config_word(dev, pos + PCI_MSI_DATA_64, &data);
Ben Hutchings30da5522010-07-23 14:56:28 +0100332 } else {
333 msg->address_hi = 0;
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600334 pci_read_config_word(dev, pos + PCI_MSI_DATA_32, &data);
Ben Hutchings30da5522010-07-23 14:56:28 +0100335 }
336 msg->data = data;
337 }
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700338}
339
Jiang Liu83a18912014-11-09 23:10:34 +0800340void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
Yinghai Lu3145e942008-12-05 18:58:34 -0800341{
Ben Hutchingsfcd097f2010-06-17 20:16:36 +0100342 if (entry->dev->current_state != PCI_D0) {
343 /* Don't touch the hardware now */
344 } else if (entry->msi_attrib.is_msix) {
Matthew Wilcox24d27552009-03-17 08:54:06 -0400345 void __iomem *base;
346 base = entry->mask_base +
347 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
348
Hidetoshi Seto2c21fd42009-06-23 17:40:04 +0900349 writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
350 writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
351 writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
Matthew Wilcox24d27552009-03-17 08:54:06 -0400352 } else {
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700353 struct pci_dev *dev = entry->dev;
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600354 int pos = dev->msi_cap;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400355 u16 msgctl;
356
Bjorn Helgaasf84ecd22013-04-17 17:38:32 -0600357 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl);
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400358 msgctl &= ~PCI_MSI_FLAGS_QSIZE;
359 msgctl |= entry->msi_attrib.multiple << 4;
Bjorn Helgaasf84ecd22013-04-17 17:38:32 -0600360 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, msgctl);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700361
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600362 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO,
363 msg->address_lo);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700364 if (entry->msi_attrib.is_64) {
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600365 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI,
366 msg->address_hi);
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600367 pci_write_config_word(dev, pos + PCI_MSI_DATA_64,
368 msg->data);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700369 } else {
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600370 pci_write_config_word(dev, pos + PCI_MSI_DATA_32,
371 msg->data);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700372 }
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700373 }
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700374 entry->msg = *msg;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700375}
376
Jiang Liu83a18912014-11-09 23:10:34 +0800377void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
Yinghai Lu3145e942008-12-05 18:58:34 -0800378{
Thomas Gleixnerdced35a2011-03-28 17:49:12 +0200379 struct msi_desc *entry = irq_get_msi_desc(irq);
Yinghai Lu3145e942008-12-05 18:58:34 -0800380
Jiang Liu83a18912014-11-09 23:10:34 +0800381 __pci_write_msi_msg(entry, msg);
Yinghai Lu3145e942008-12-05 18:58:34 -0800382}
Jiang Liu83a18912014-11-09 23:10:34 +0800383EXPORT_SYMBOL_GPL(pci_write_msi_msg);
Yinghai Lu3145e942008-12-05 18:58:34 -0800384
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900385static void free_msi_irqs(struct pci_dev *dev)
386{
387 struct msi_desc *entry, *tmp;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800388 struct attribute **msi_attrs;
389 struct device_attribute *dev_attr;
Jiang Liu63a7b172014-11-06 22:20:32 +0800390 int i, count = 0;
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900391
Jiang Liu63a7b172014-11-06 22:20:32 +0800392 list_for_each_entry(entry, &dev->msi_list, list)
393 if (entry->irq)
394 for (i = 0; i < entry->nvec_used; i++)
395 BUG_ON(irq_has_action(entry->irq + i));
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900396
Jiang Liu8e047ad2014-11-15 22:24:07 +0800397 pci_msi_teardown_msi_irqs(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900398
399 list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) {
400 if (entry->msi_attrib.is_msix) {
401 if (list_is_last(&entry->list, &dev->msi_list))
402 iounmap(entry->mask_base);
403 }
Neil Horman424eb392012-01-03 10:29:54 -0500404
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900405 list_del(&entry->list);
406 kfree(entry);
407 }
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800408
409 if (dev->msi_irq_groups) {
410 sysfs_remove_groups(&dev->dev.kobj, dev->msi_irq_groups);
411 msi_attrs = dev->msi_irq_groups[0]->attrs;
Alexei Starovoitovb701c0b2014-06-04 15:49:50 -0700412 while (msi_attrs[count]) {
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800413 dev_attr = container_of(msi_attrs[count],
414 struct device_attribute, attr);
415 kfree(dev_attr->attr.name);
416 kfree(dev_attr);
417 ++count;
418 }
419 kfree(msi_attrs);
420 kfree(dev->msi_irq_groups[0]);
421 kfree(dev->msi_irq_groups);
422 dev->msi_irq_groups = NULL;
423 }
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900424}
Satoru Takeuchic54c1872007-01-18 13:50:05 +0900425
Matthew Wilcox379f5322009-03-17 08:54:07 -0400426static struct msi_desc *alloc_msi_entry(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427{
Matthew Wilcox379f5322009-03-17 08:54:07 -0400428 struct msi_desc *desc = kzalloc(sizeof(*desc), GFP_KERNEL);
429 if (!desc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430 return NULL;
431
Matthew Wilcox379f5322009-03-17 08:54:07 -0400432 INIT_LIST_HEAD(&desc->list);
433 desc->dev = dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700434
Matthew Wilcox379f5322009-03-17 08:54:07 -0400435 return desc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700436}
437
David Millerba698ad2007-10-25 01:16:30 -0700438static void pci_intx_for_msi(struct pci_dev *dev, int enable)
439{
440 if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG))
441 pci_intx(dev, enable);
442}
443
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100444static void __pci_restore_msi_state(struct pci_dev *dev)
Shaohua Li41017f02006-02-08 17:11:38 +0800445{
Shaohua Li41017f02006-02-08 17:11:38 +0800446 u16 control;
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700447 struct msi_desc *entry;
Shaohua Li41017f02006-02-08 17:11:38 +0800448
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800449 if (!dev->msi_enabled)
450 return;
451
Thomas Gleixnerdced35a2011-03-28 17:49:12 +0200452 entry = irq_get_msi_desc(dev->irq);
Shaohua Li41017f02006-02-08 17:11:38 +0800453
David Millerba698ad2007-10-25 01:16:30 -0700454 pci_intx_for_msi(dev, 0);
Gavin Shane375b562013-04-04 16:54:30 +0000455 msi_set_enable(dev, 0);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800456 arch_restore_msi_irqs(dev);
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700457
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600458 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
Yijing Wang31ea5d42014-06-19 16:30:30 +0800459 msi_mask_irq(entry, msi_mask(entry->msi_attrib.multi_cap),
460 entry->masked);
Jesse Barnesabad2ec2008-08-07 08:52:37 -0700461 control &= ~PCI_MSI_FLAGS_QSIZE;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400462 control |= (entry->msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE;
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600463 pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100464}
465
466static void __pci_restore_msix_state(struct pci_dev *dev)
Shaohua Li41017f02006-02-08 17:11:38 +0800467{
Shaohua Li41017f02006-02-08 17:11:38 +0800468 struct msi_desc *entry;
Shaohua Li41017f02006-02-08 17:11:38 +0800469
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700470 if (!dev->msix_enabled)
471 return;
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700472 BUG_ON(list_empty(&dev->msi_list));
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700473
Shaohua Li41017f02006-02-08 17:11:38 +0800474 /* route the table */
David Millerba698ad2007-10-25 01:16:30 -0700475 pci_intx_for_msi(dev, 0);
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800476 msix_clear_and_set_ctrl(dev, 0,
477 PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL);
Shaohua Li41017f02006-02-08 17:11:38 +0800478
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800479 arch_restore_msi_irqs(dev);
Jiang Liu3f3ceca2014-11-06 22:20:31 +0800480 list_for_each_entry(entry, &dev->msi_list, list)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400481 msix_mask_irq(entry, entry->masked);
Shaohua Li41017f02006-02-08 17:11:38 +0800482
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800483 msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
Shaohua Li41017f02006-02-08 17:11:38 +0800484}
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100485
486void pci_restore_msi_state(struct pci_dev *dev)
487{
488 __pci_restore_msi_state(dev);
489 __pci_restore_msix_state(dev);
490}
Linas Vepstas94688cf2007-11-07 15:43:59 -0600491EXPORT_SYMBOL_GPL(pci_restore_msi_state);
Shaohua Li41017f02006-02-08 17:11:38 +0800492
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800493static ssize_t msi_mode_show(struct device *dev, struct device_attribute *attr,
Neil Hormanda8d1c82011-10-06 14:08:18 -0400494 char *buf)
495{
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800496 struct msi_desc *entry;
497 unsigned long irq;
498 int retval;
499
500 retval = kstrtoul(attr->attr.name, 10, &irq);
501 if (retval)
502 return retval;
503
Yijing Wange11ece52014-07-08 10:09:19 +0800504 entry = irq_get_msi_desc(irq);
505 if (entry)
506 return sprintf(buf, "%s\n",
507 entry->msi_attrib.is_msix ? "msix" : "msi");
508
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800509 return -ENODEV;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400510}
511
Neil Hormanda8d1c82011-10-06 14:08:18 -0400512static int populate_msi_sysfs(struct pci_dev *pdev)
513{
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800514 struct attribute **msi_attrs;
515 struct attribute *msi_attr;
516 struct device_attribute *msi_dev_attr;
517 struct attribute_group *msi_irq_group;
518 const struct attribute_group **msi_irq_groups;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400519 struct msi_desc *entry;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800520 int ret = -ENOMEM;
521 int num_msi = 0;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400522 int count = 0;
523
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800524 /* Determine how many msi entries we have */
Jiang Liu3f3ceca2014-11-06 22:20:31 +0800525 list_for_each_entry(entry, &pdev->msi_list, list)
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800526 ++num_msi;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800527 if (!num_msi)
528 return 0;
529
530 /* Dynamically create the MSI attributes for the PCI device */
531 msi_attrs = kzalloc(sizeof(void *) * (num_msi + 1), GFP_KERNEL);
532 if (!msi_attrs)
533 return -ENOMEM;
534 list_for_each_entry(entry, &pdev->msi_list, list) {
Greg Kroah-Hartman86bb4f62014-02-13 10:47:20 -0700535 msi_dev_attr = kzalloc(sizeof(*msi_dev_attr), GFP_KERNEL);
Jan Beulich14062762014-04-14 14:59:50 -0600536 if (!msi_dev_attr)
Greg Kroah-Hartman86bb4f62014-02-13 10:47:20 -0700537 goto error_attrs;
Jan Beulich14062762014-04-14 14:59:50 -0600538 msi_attrs[count] = &msi_dev_attr->attr;
Greg Kroah-Hartman86bb4f62014-02-13 10:47:20 -0700539
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800540 sysfs_attr_init(&msi_dev_attr->attr);
Jan Beulich14062762014-04-14 14:59:50 -0600541 msi_dev_attr->attr.name = kasprintf(GFP_KERNEL, "%d",
542 entry->irq);
543 if (!msi_dev_attr->attr.name)
544 goto error_attrs;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800545 msi_dev_attr->attr.mode = S_IRUGO;
546 msi_dev_attr->show = msi_mode_show;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800547 ++count;
548 }
549
550 msi_irq_group = kzalloc(sizeof(*msi_irq_group), GFP_KERNEL);
551 if (!msi_irq_group)
552 goto error_attrs;
553 msi_irq_group->name = "msi_irqs";
554 msi_irq_group->attrs = msi_attrs;
555
556 msi_irq_groups = kzalloc(sizeof(void *) * 2, GFP_KERNEL);
557 if (!msi_irq_groups)
558 goto error_irq_group;
559 msi_irq_groups[0] = msi_irq_group;
560
561 ret = sysfs_create_groups(&pdev->dev.kobj, msi_irq_groups);
562 if (ret)
563 goto error_irq_groups;
564 pdev->msi_irq_groups = msi_irq_groups;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400565
566 return 0;
567
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800568error_irq_groups:
569 kfree(msi_irq_groups);
570error_irq_group:
571 kfree(msi_irq_group);
572error_attrs:
573 count = 0;
574 msi_attr = msi_attrs[count];
575 while (msi_attr) {
576 msi_dev_attr = container_of(msi_attr, struct device_attribute, attr);
577 kfree(msi_attr->name);
578 kfree(msi_dev_attr);
579 ++count;
580 msi_attr = msi_attrs[count];
Neil Hormanda8d1c82011-10-06 14:08:18 -0400581 }
Greg Kroah-Hartman29237752014-02-13 10:47:35 -0700582 kfree(msi_attrs);
Neil Hormanda8d1c82011-10-06 14:08:18 -0400583 return ret;
584}
585
Jiang Liu63a7b172014-11-06 22:20:32 +0800586static struct msi_desc *msi_setup_entry(struct pci_dev *dev, int nvec)
Yijing Wangd873b4d2014-07-08 10:07:23 +0800587{
588 u16 control;
589 struct msi_desc *entry;
590
591 /* MSI Entry Initialization */
592 entry = alloc_msi_entry(dev);
593 if (!entry)
594 return NULL;
595
596 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
597
598 entry->msi_attrib.is_msix = 0;
599 entry->msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
600 entry->msi_attrib.entry_nr = 0;
601 entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
602 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
Yijing Wangd873b4d2014-07-08 10:07:23 +0800603 entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
Jiang Liu63a7b172014-11-06 22:20:32 +0800604 entry->msi_attrib.multiple = ilog2(__roundup_pow_of_two(nvec));
605 entry->nvec_used = nvec;
Yijing Wangd873b4d2014-07-08 10:07:23 +0800606
607 if (control & PCI_MSI_FLAGS_64BIT)
608 entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
609 else
610 entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
611
612 /* Save the initial mask status */
613 if (entry->msi_attrib.maskbit)
614 pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
615
616 return entry;
617}
618
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000619static int msi_verify_entries(struct pci_dev *dev)
620{
621 struct msi_desc *entry;
622
623 list_for_each_entry(entry, &dev->msi_list, list) {
624 if (!dev->no_64bit_msi || !entry->msg.address_hi)
625 continue;
626 dev_err(&dev->dev, "Device has broken 64-bit MSI but arch"
627 " tried to assign one above 4G\n");
628 return -EIO;
629 }
630 return 0;
631}
632
Linus Torvalds1da177e2005-04-16 15:20:36 -0700633/**
634 * msi_capability_init - configure device's MSI capability structure
635 * @dev: pointer to the pci_dev data structure of MSI device function
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400636 * @nvec: number of interrupts to allocate
Linus Torvalds1da177e2005-04-16 15:20:36 -0700637 *
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400638 * Setup the MSI capability structure of the device with the requested
639 * number of interrupts. A return value of zero indicates the successful
640 * setup of an entry with the new MSI irq. A negative return value indicates
641 * an error, and a positive return value indicates the number of interrupts
642 * which could have been allocated.
643 */
644static int msi_capability_init(struct pci_dev *dev, int nvec)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700645{
646 struct msi_desc *entry;
Gavin Shanf4651362013-04-04 16:54:32 +0000647 int ret;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400648 unsigned mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700649
Gavin Shane375b562013-04-04 16:54:30 +0000650 msi_set_enable(dev, 0); /* Disable MSI during set up */
Matthew Wilcox110828c2009-06-16 06:31:45 -0600651
Jiang Liu63a7b172014-11-06 22:20:32 +0800652 entry = msi_setup_entry(dev, nvec);
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700653 if (!entry)
654 return -ENOMEM;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700655
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400656 /* All MSIs are unmasked by default, Mask them all */
Yijing Wang31ea5d42014-06-19 16:30:30 +0800657 mask = msi_mask(entry->msi_attrib.multi_cap);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400658 msi_mask_irq(entry, mask, mask);
659
Eric W. Biederman0dd11f92007-06-01 00:46:32 -0700660 list_add_tail(&entry->list, &dev->msi_list);
Michael Ellerman9c831332007-04-18 19:39:21 +1000661
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662 /* Configure MSI capability structure */
Jiang Liu8e047ad2014-11-15 22:24:07 +0800663 ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000664 if (ret) {
Hidetoshi Seto7ba19302009-06-23 17:39:27 +0900665 msi_mask_irq(entry, mask, ~mask);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900666 free_msi_irqs(dev);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000667 return ret;
Mark Maulefd58e552006-04-10 21:17:48 -0500668 }
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700669
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000670 ret = msi_verify_entries(dev);
671 if (ret) {
672 msi_mask_irq(entry, mask, ~mask);
673 free_msi_irqs(dev);
674 return ret;
675 }
676
Neil Hormanda8d1c82011-10-06 14:08:18 -0400677 ret = populate_msi_sysfs(dev);
678 if (ret) {
679 msi_mask_irq(entry, mask, ~mask);
680 free_msi_irqs(dev);
681 return ret;
682 }
683
Linus Torvalds1da177e2005-04-16 15:20:36 -0700684 /* Set MSI enabled bits */
David Millerba698ad2007-10-25 01:16:30 -0700685 pci_intx_for_msi(dev, 0);
Gavin Shane375b562013-04-04 16:54:30 +0000686 msi_set_enable(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800687 dev->msi_enabled = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700688
Michael Ellerman7fe37302007-04-18 19:39:21 +1000689 dev->irq = entry->irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700690 return 0;
691}
692
Gavin Shan520fe9d2013-04-04 16:54:33 +0000693static void __iomem *msix_map_region(struct pci_dev *dev, unsigned nr_entries)
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900694{
Kenji Kaneshige4302e0f2010-06-17 10:42:44 +0900695 resource_size_t phys_addr;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900696 u32 table_offset;
Yijing Wang6a878e52015-01-28 09:52:17 +0800697 unsigned long flags;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900698 u8 bir;
699
Bjorn Helgaas909094c2013-04-17 17:43:40 -0600700 pci_read_config_dword(dev, dev->msix_cap + PCI_MSIX_TABLE,
701 &table_offset);
Bjorn Helgaas4d187602013-04-17 18:10:07 -0600702 bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
Yijing Wang6a878e52015-01-28 09:52:17 +0800703 flags = pci_resource_flags(dev, bir);
704 if (!flags || (flags & IORESOURCE_UNSET))
705 return NULL;
706
Bjorn Helgaas4d187602013-04-17 18:10:07 -0600707 table_offset &= PCI_MSIX_TABLE_OFFSET;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900708 phys_addr = pci_resource_start(dev, bir) + table_offset;
709
710 return ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
711}
712
Gavin Shan520fe9d2013-04-04 16:54:33 +0000713static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
714 struct msix_entry *entries, int nvec)
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900715{
716 struct msi_desc *entry;
717 int i;
718
719 for (i = 0; i < nvec; i++) {
720 entry = alloc_msi_entry(dev);
721 if (!entry) {
722 if (!i)
723 iounmap(base);
724 else
725 free_msi_irqs(dev);
726 /* No enough memory. Don't try again */
727 return -ENOMEM;
728 }
729
730 entry->msi_attrib.is_msix = 1;
731 entry->msi_attrib.is_64 = 1;
732 entry->msi_attrib.entry_nr = entries[i].entry;
733 entry->msi_attrib.default_irq = dev->irq;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900734 entry->mask_base = base;
Jiang Liu63a7b172014-11-06 22:20:32 +0800735 entry->nvec_used = 1;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900736
737 list_add_tail(&entry->list, &dev->msi_list);
738 }
739
740 return 0;
741}
742
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900743static void msix_program_entries(struct pci_dev *dev,
Gavin Shan520fe9d2013-04-04 16:54:33 +0000744 struct msix_entry *entries)
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900745{
746 struct msi_desc *entry;
747 int i = 0;
748
749 list_for_each_entry(entry, &dev->msi_list, list) {
750 int offset = entries[i].entry * PCI_MSIX_ENTRY_SIZE +
751 PCI_MSIX_ENTRY_VECTOR_CTRL;
752
753 entries[i].vector = entry->irq;
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900754 entry->masked = readl(entry->mask_base + offset);
755 msix_mask_irq(entry, 1);
756 i++;
757 }
758}
759
Linus Torvalds1da177e2005-04-16 15:20:36 -0700760/**
761 * msix_capability_init - configure device's MSI-X capability
762 * @dev: pointer to the pci_dev data structure of MSI-X device function
Randy Dunlap8f7020d2005-10-23 11:57:38 -0700763 * @entries: pointer to an array of struct msix_entry entries
764 * @nvec: number of @entries
Linus Torvalds1da177e2005-04-16 15:20:36 -0700765 *
Steven Coleeaae4b32005-05-03 18:38:30 -0600766 * Setup the MSI-X capability structure of device function with a
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700767 * single MSI-X irq. A return of zero indicates the successful setup of
768 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700769 **/
770static int msix_capability_init(struct pci_dev *dev,
771 struct msix_entry *entries, int nvec)
772{
Gavin Shan520fe9d2013-04-04 16:54:33 +0000773 int ret;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900774 u16 control;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700775 void __iomem *base;
776
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700777 /* Ensure MSI-X is disabled while it is set up */
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800778 msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700779
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800780 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700781 /* Request & Map MSI-X table region */
Bjorn Helgaas527eee22013-04-17 17:44:48 -0600782 base = msix_map_region(dev, msix_table_size(control));
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900783 if (!base)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700784 return -ENOMEM;
785
Gavin Shan520fe9d2013-04-04 16:54:33 +0000786 ret = msix_setup_entries(dev, base, entries, nvec);
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900787 if (ret)
788 return ret;
Michael Ellerman9c831332007-04-18 19:39:21 +1000789
Jiang Liu8e047ad2014-11-15 22:24:07 +0800790 ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900791 if (ret)
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100792 goto out_avail;
Michael Ellerman9c831332007-04-18 19:39:21 +1000793
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000794 /* Check if all MSI entries honor device restrictions */
795 ret = msi_verify_entries(dev);
796 if (ret)
797 goto out_free;
798
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700799 /*
800 * Some devices require MSI-X to be enabled before we can touch the
801 * MSI-X registers. We need to mask all the vectors to prevent
802 * interrupts coming in before they're fully set up.
803 */
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800804 msix_clear_and_set_ctrl(dev, 0,
805 PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700806
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900807 msix_program_entries(dev, entries);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700808
Neil Hormanda8d1c82011-10-06 14:08:18 -0400809 ret = populate_msi_sysfs(dev);
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100810 if (ret)
811 goto out_free;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400812
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700813 /* Set MSI-X enabled bits and unmask the function */
David Millerba698ad2007-10-25 01:16:30 -0700814 pci_intx_for_msi(dev, 0);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800815 dev->msix_enabled = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700816
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800817 msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
Matthew Wilcox8d181012009-05-08 07:13:33 -0600818
Linus Torvalds1da177e2005-04-16 15:20:36 -0700819 return 0;
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900820
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100821out_avail:
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900822 if (ret < 0) {
823 /*
824 * If we had some success, report the number of irqs
825 * we succeeded in setting up.
826 */
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900827 struct msi_desc *entry;
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900828 int avail = 0;
829
830 list_for_each_entry(entry, &dev->msi_list, list) {
831 if (entry->irq != 0)
832 avail++;
833 }
834 if (avail != 0)
835 ret = avail;
836 }
837
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100838out_free:
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900839 free_msi_irqs(dev);
840
841 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700842}
843
844/**
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600845 * pci_msi_supported - check whether MSI may be enabled on a device
Brice Goglin24334a12006-08-31 01:55:07 -0400846 * @dev: pointer to the pci_dev data structure of MSI device function
Michael Ellermanc9953a72007-04-05 17:19:08 +1000847 * @nvec: how many MSIs have been requested ?
Brice Goglin24334a12006-08-31 01:55:07 -0400848 *
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700849 * Look at global flags, the device itself, and its parent buses
Michael Ellerman17bbc122007-04-05 17:19:07 +1000850 * to determine if MSI/-X are supported for the device. If MSI/-X is
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600851 * supported return 1, else return 0.
Brice Goglin24334a12006-08-31 01:55:07 -0400852 **/
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600853static int pci_msi_supported(struct pci_dev *dev, int nvec)
Brice Goglin24334a12006-08-31 01:55:07 -0400854{
855 struct pci_bus *bus;
856
Brice Goglin0306ebf2006-10-05 10:24:31 +0200857 /* MSI must be globally enabled and supported by the device */
Alexander Gordeev27e20602014-09-23 14:25:11 -0600858 if (!pci_msi_enable)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600859 return 0;
Alexander Gordeev27e20602014-09-23 14:25:11 -0600860
861 if (!dev || dev->no_msi || dev->current_state != PCI_D0)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600862 return 0;
Brice Goglin24334a12006-08-31 01:55:07 -0400863
Michael Ellerman314e77b2007-04-05 17:19:12 +1000864 /*
865 * You can't ask to have 0 or less MSIs configured.
866 * a) it's stupid ..
867 * b) the list manipulation code assumes nvec >= 1.
868 */
869 if (nvec < 1)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600870 return 0;
Michael Ellerman314e77b2007-04-05 17:19:12 +1000871
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900872 /*
873 * Any bridge which does NOT route MSI transactions from its
874 * secondary bus to its primary bus must set NO_MSI flag on
Brice Goglin0306ebf2006-10-05 10:24:31 +0200875 * the secondary pci_bus.
876 * We expect only arch-specific PCI host bus controller driver
877 * or quirks for specific PCI bridges to be setting NO_MSI.
878 */
Brice Goglin24334a12006-08-31 01:55:07 -0400879 for (bus = dev->bus; bus; bus = bus->parent)
880 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600881 return 0;
Brice Goglin24334a12006-08-31 01:55:07 -0400882
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600883 return 1;
Brice Goglin24334a12006-08-31 01:55:07 -0400884}
885
886/**
Alexander Gordeevd1ac1d22013-12-30 08:28:13 +0100887 * pci_msi_vec_count - Return the number of MSI vectors a device can send
888 * @dev: device to report about
889 *
890 * This function returns the number of MSI vectors a device requested via
891 * Multiple Message Capable register. It returns a negative errno if the
892 * device is not capable sending MSI interrupts. Otherwise, the call succeeds
893 * and returns a power of two, up to a maximum of 2^5 (32), according to the
894 * MSI specification.
895 **/
896int pci_msi_vec_count(struct pci_dev *dev)
897{
898 int ret;
899 u16 msgctl;
900
901 if (!dev->msi_cap)
902 return -EINVAL;
903
904 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl);
905 ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1);
906
907 return ret;
908}
909EXPORT_SYMBOL(pci_msi_vec_count);
910
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400911void pci_msi_shutdown(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700912{
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400913 struct msi_desc *desc;
914 u32 mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700915
Michael Ellerman128bc5f2007-03-22 21:51:39 +1100916 if (!pci_msi_enable || !dev || !dev->msi_enabled)
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700917 return;
918
Matthew Wilcox110828c2009-06-16 06:31:45 -0600919 BUG_ON(list_empty(&dev->msi_list));
920 desc = list_first_entry(&dev->msi_list, struct msi_desc, list);
Matthew Wilcox110828c2009-06-16 06:31:45 -0600921
Gavin Shane375b562013-04-04 16:54:30 +0000922 msi_set_enable(dev, 0);
David Millerba698ad2007-10-25 01:16:30 -0700923 pci_intx_for_msi(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800924 dev->msi_enabled = 0;
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700925
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900926 /* Return the device with MSI unmasked as initial states */
Yijing Wang31ea5d42014-06-19 16:30:30 +0800927 mask = msi_mask(desc->msi_attrib.multi_cap);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900928 /* Keep cached state to be restored */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100929 __pci_msi_desc_mask_irq(desc, mask, ~mask);
Michael Ellermane387b9e2007-03-22 21:51:27 +1100930
931 /* Restore dev->irq to its default pin-assertion irq */
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400932 dev->irq = desc->msi_attrib.default_irq;
Yinghai Lud52877c2008-04-23 14:58:09 -0700933}
Matthew Wilcox24d27552009-03-17 08:54:06 -0400934
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900935void pci_disable_msi(struct pci_dev *dev)
Yinghai Lud52877c2008-04-23 14:58:09 -0700936{
Yinghai Lud52877c2008-04-23 14:58:09 -0700937 if (!pci_msi_enable || !dev || !dev->msi_enabled)
938 return;
939
940 pci_msi_shutdown(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900941 free_msi_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700942}
Michael Ellerman4cc086f2007-03-22 21:51:34 +1100943EXPORT_SYMBOL(pci_disable_msi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700944
Linus Torvalds1da177e2005-04-16 15:20:36 -0700945/**
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100946 * pci_msix_vec_count - return the number of device's MSI-X table entries
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100947 * @dev: pointer to the pci_dev data structure of MSI-X device function
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100948 * This function returns the number of device's MSI-X table entries and
949 * therefore the number of MSI-X vectors device is capable of sending.
950 * It returns a negative errno if the device is not capable of sending MSI-X
951 * interrupts.
952 **/
953int pci_msix_vec_count(struct pci_dev *dev)
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100954{
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100955 u16 control;
956
Gavin Shan520fe9d2013-04-04 16:54:33 +0000957 if (!dev->msix_cap)
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100958 return -EINVAL;
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100959
Bjorn Helgaasf84ecd22013-04-17 17:38:32 -0600960 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
Bjorn Helgaas527eee22013-04-17 17:44:48 -0600961 return msix_table_size(control);
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100962}
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100963EXPORT_SYMBOL(pci_msix_vec_count);
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100964
965/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700966 * pci_enable_msix - configure device's MSI-X capability structure
967 * @dev: pointer to the pci_dev data structure of MSI-X device function
Greg Kroah-Hartman70549ad2005-06-06 23:07:46 -0700968 * @entries: pointer to an array of MSI-X entries
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700969 * @nvec: number of MSI-X irqs requested for allocation by device driver
Linus Torvalds1da177e2005-04-16 15:20:36 -0700970 *
971 * Setup the MSI-X capability structure of device function with the number
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700972 * of requested irqs upon its software driver call to request for
Linus Torvalds1da177e2005-04-16 15:20:36 -0700973 * MSI-X mode enabled on its hardware device function. A return of zero
974 * indicates the successful configuration of MSI-X capability structure
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700975 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700976 * Or a return of > 0 indicates that driver request is exceeding the number
Michael S. Tsirkin57fbf522009-05-07 11:28:41 +0300977 * of irqs or MSI-X vectors available. Driver should use the returned value to
978 * re-send its request.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700979 **/
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900980int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700981{
Bjorn Helgaas5ec09402014-09-23 14:38:28 -0600982 int nr_entries;
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700983 int i, j;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700984
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600985 if (!pci_msi_supported(dev, nvec))
986 return -EINVAL;
Michael Ellermanc9953a72007-04-05 17:19:08 +1000987
Alexander Gordeev27e20602014-09-23 14:25:11 -0600988 if (!entries)
989 return -EINVAL;
990
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100991 nr_entries = pci_msix_vec_count(dev);
992 if (nr_entries < 0)
993 return nr_entries;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700994 if (nvec > nr_entries)
Michael S. Tsirkin57fbf522009-05-07 11:28:41 +0300995 return nr_entries;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700996
997 /* Check for any invalid entries */
998 for (i = 0; i < nvec; i++) {
999 if (entries[i].entry >= nr_entries)
1000 return -EINVAL; /* invalid entry */
1001 for (j = i + 1; j < nvec; j++) {
1002 if (entries[i].entry == entries[j].entry)
1003 return -EINVAL; /* duplicate entry */
1004 }
1005 }
Eric W. Biedermanded86d82007-01-28 12:42:52 -07001006 WARN_ON(!!dev->msix_enabled);
Eric W. Biederman7bd007e2006-10-04 02:16:31 -07001007
Eric W. Biederman1ce03372006-10-04 02:16:41 -07001008 /* Check whether driver already requested for MSI irq */
Hidetoshi Seto500559a2009-08-10 10:14:15 +09001009 if (dev->msi_enabled) {
Ryan Desfosses227f0642014-04-18 20:13:50 -04001010 dev_info(&dev->dev, "can't enable MSI-X (MSI IRQ already assigned)\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001011 return -EINVAL;
1012 }
Bjorn Helgaas5ec09402014-09-23 14:38:28 -06001013 return msix_capability_init(dev, entries, nvec);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001014}
Michael Ellerman4cc086f2007-03-22 21:51:34 +11001015EXPORT_SYMBOL(pci_enable_msix);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001016
Hidetoshi Seto500559a2009-08-10 10:14:15 +09001017void pci_msix_shutdown(struct pci_dev *dev)
Michael Ellermanfc4afc72007-03-22 21:51:33 +11001018{
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +09001019 struct msi_desc *entry;
1020
Michael Ellerman128bc5f2007-03-22 21:51:39 +11001021 if (!pci_msi_enable || !dev || !dev->msix_enabled)
Eric W. Biedermanded86d82007-01-28 12:42:52 -07001022 return;
1023
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +09001024 /* Return the device with MSI-X masked as initial states */
1025 list_for_each_entry(entry, &dev->msi_list, list) {
1026 /* Keep cached states to be restored */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +01001027 __pci_msix_desc_mask_irq(entry, 1);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +09001028 }
1029
Yijing Wang66f0d0c2014-06-19 16:29:53 +08001030 msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
David Millerba698ad2007-10-25 01:16:30 -07001031 pci_intx_for_msi(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -08001032 dev->msix_enabled = 0;
Yinghai Lud52877c2008-04-23 14:58:09 -07001033}
Hidetoshi Setoc9018512009-08-06 11:31:27 +09001034
Hidetoshi Seto500559a2009-08-10 10:14:15 +09001035void pci_disable_msix(struct pci_dev *dev)
Yinghai Lud52877c2008-04-23 14:58:09 -07001036{
1037 if (!pci_msi_enable || !dev || !dev->msix_enabled)
1038 return;
1039
1040 pci_msix_shutdown(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +09001041 free_msi_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001042}
Michael Ellerman4cc086f2007-03-22 21:51:34 +11001043EXPORT_SYMBOL(pci_disable_msix);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001044
Matthew Wilcox309e57d2006-03-05 22:33:34 -07001045void pci_no_msi(void)
1046{
1047 pci_msi_enable = 0;
1048}
Michael Ellermanc9953a72007-04-05 17:19:08 +10001049
Andrew Patterson07ae95f2008-11-10 15:31:05 -07001050/**
1051 * pci_msi_enabled - is MSI enabled?
1052 *
1053 * Returns true if MSI has not been disabled by the command-line option
1054 * pci=nomsi.
1055 **/
1056int pci_msi_enabled(void)
1057{
1058 return pci_msi_enable;
1059}
1060EXPORT_SYMBOL(pci_msi_enabled);
1061
Michael Ellerman4aa9bc92007-04-05 17:19:10 +10001062void pci_msi_init_pci_dev(struct pci_dev *dev)
1063{
1064 INIT_LIST_HEAD(&dev->msi_list);
Eric W. Biedermand5dea7d2011-10-17 11:46:06 -07001065
1066 /* Disable the msi hardware to avoid screaming interrupts
1067 * during boot. This is the power on reset default so
1068 * usually this should be a noop.
1069 */
Gavin Shane375b562013-04-04 16:54:30 +00001070 dev->msi_cap = pci_find_capability(dev, PCI_CAP_ID_MSI);
1071 if (dev->msi_cap)
1072 msi_set_enable(dev, 0);
1073
1074 dev->msix_cap = pci_find_capability(dev, PCI_CAP_ID_MSIX);
1075 if (dev->msix_cap)
Yijing Wang66f0d0c2014-06-19 16:29:53 +08001076 msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
Michael Ellerman4aa9bc92007-04-05 17:19:10 +10001077}
Alexander Gordeev302a2522013-12-30 08:28:16 +01001078
1079/**
1080 * pci_enable_msi_range - configure device's MSI capability structure
1081 * @dev: device to configure
1082 * @minvec: minimal number of interrupts to configure
1083 * @maxvec: maximum number of interrupts to configure
1084 *
1085 * This function tries to allocate a maximum possible number of interrupts in a
1086 * range between @minvec and @maxvec. It returns a negative errno if an error
1087 * occurs. If it succeeds, it returns the actual number of interrupts allocated
1088 * and updates the @dev's irq member to the lowest new interrupt number;
1089 * the other interrupt numbers allocated to this device are consecutive.
1090 **/
1091int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec)
1092{
Alexander Gordeev034cd972014-04-14 15:28:35 +02001093 int nvec;
Alexander Gordeev302a2522013-12-30 08:28:16 +01001094 int rc;
1095
Alexander Gordeeva06cd742014-09-23 12:45:58 -06001096 if (!pci_msi_supported(dev, minvec))
1097 return -EINVAL;
Alexander Gordeev034cd972014-04-14 15:28:35 +02001098
1099 WARN_ON(!!dev->msi_enabled);
1100
1101 /* Check whether driver already requested MSI-X irqs */
1102 if (dev->msix_enabled) {
1103 dev_info(&dev->dev,
1104 "can't enable MSI (MSI-X already enabled)\n");
1105 return -EINVAL;
1106 }
1107
Alexander Gordeev302a2522013-12-30 08:28:16 +01001108 if (maxvec < minvec)
1109 return -ERANGE;
1110
Alexander Gordeev034cd972014-04-14 15:28:35 +02001111 nvec = pci_msi_vec_count(dev);
1112 if (nvec < 0)
1113 return nvec;
1114 else if (nvec < minvec)
1115 return -EINVAL;
1116 else if (nvec > maxvec)
1117 nvec = maxvec;
1118
Alexander Gordeev302a2522013-12-30 08:28:16 +01001119 do {
Alexander Gordeev034cd972014-04-14 15:28:35 +02001120 rc = msi_capability_init(dev, nvec);
Alexander Gordeev302a2522013-12-30 08:28:16 +01001121 if (rc < 0) {
1122 return rc;
1123 } else if (rc > 0) {
1124 if (rc < minvec)
1125 return -ENOSPC;
1126 nvec = rc;
1127 }
1128 } while (rc);
1129
1130 return nvec;
1131}
1132EXPORT_SYMBOL(pci_enable_msi_range);
1133
1134/**
1135 * pci_enable_msix_range - configure device's MSI-X capability structure
1136 * @dev: pointer to the pci_dev data structure of MSI-X device function
1137 * @entries: pointer to an array of MSI-X entries
1138 * @minvec: minimum number of MSI-X irqs requested
1139 * @maxvec: maximum number of MSI-X irqs requested
1140 *
1141 * Setup the MSI-X capability structure of device function with a maximum
1142 * possible number of interrupts in the range between @minvec and @maxvec
1143 * upon its software driver call to request for MSI-X mode enabled on its
1144 * hardware device function. It returns a negative errno if an error occurs.
1145 * If it succeeds, it returns the actual number of interrupts allocated and
1146 * indicates the successful configuration of MSI-X capability structure
1147 * with new allocated MSI-X interrupts.
1148 **/
1149int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
1150 int minvec, int maxvec)
1151{
1152 int nvec = maxvec;
1153 int rc;
1154
1155 if (maxvec < minvec)
1156 return -ERANGE;
1157
1158 do {
1159 rc = pci_enable_msix(dev, entries, nvec);
1160 if (rc < 0) {
1161 return rc;
1162 } else if (rc > 0) {
1163 if (rc < minvec)
1164 return -ENOSPC;
1165 nvec = rc;
1166 }
1167 } while (rc);
1168
1169 return nvec;
1170}
1171EXPORT_SYMBOL(pci_enable_msix_range);
Jiang Liu3878eae2014-11-11 21:02:18 +08001172
1173#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
1174/**
1175 * pci_msi_domain_write_msg - Helper to write MSI message to PCI config space
1176 * @irq_data: Pointer to interrupt data of the MSI interrupt
1177 * @msg: Pointer to the message
1178 */
1179void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg)
1180{
1181 struct msi_desc *desc = irq_data->msi_desc;
1182
1183 /*
1184 * For MSI-X desc->irq is always equal to irq_data->irq. For
1185 * MSI only the first interrupt of MULTI MSI passes the test.
1186 */
1187 if (desc->irq == irq_data->irq)
1188 __pci_write_msi_msg(desc, msg);
1189}
1190
1191/**
1192 * pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source
1193 * @dev: Pointer to the PCI device
1194 * @desc: Pointer to the msi descriptor
1195 *
1196 * The ID number is only used within the irqdomain.
1197 */
1198irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
1199 struct msi_desc *desc)
1200{
1201 return (irq_hw_number_t)desc->msi_attrib.entry_nr |
1202 PCI_DEVID(dev->bus->number, dev->devfn) << 11 |
1203 (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27;
1204}
1205
1206static inline bool pci_msi_desc_is_multi_msi(struct msi_desc *desc)
1207{
1208 return !desc->msi_attrib.is_msix && desc->nvec_used > 1;
1209}
1210
1211/**
1212 * pci_msi_domain_check_cap - Verify that @domain supports the capabilities for @dev
1213 * @domain: The interrupt domain to check
1214 * @info: The domain info for verification
1215 * @dev: The device to check
1216 *
1217 * Returns:
1218 * 0 if the functionality is supported
1219 * 1 if Multi MSI is requested, but the domain does not support it
1220 * -ENOTSUPP otherwise
1221 */
1222int pci_msi_domain_check_cap(struct irq_domain *domain,
1223 struct msi_domain_info *info, struct device *dev)
1224{
1225 struct msi_desc *desc = first_pci_msi_entry(to_pci_dev(dev));
1226
1227 /* Special handling to support pci_enable_msi_range() */
1228 if (pci_msi_desc_is_multi_msi(desc) &&
1229 !(info->flags & MSI_FLAG_MULTI_PCI_MSI))
1230 return 1;
1231 else if (desc->msi_attrib.is_msix && !(info->flags & MSI_FLAG_PCI_MSIX))
1232 return -ENOTSUPP;
1233
1234 return 0;
1235}
1236
1237static int pci_msi_domain_handle_error(struct irq_domain *domain,
1238 struct msi_desc *desc, int error)
1239{
1240 /* Special handling to support pci_enable_msi_range() */
1241 if (pci_msi_desc_is_multi_msi(desc) && error == -ENOSPC)
1242 return 1;
1243
1244 return error;
1245}
1246
1247#ifdef GENERIC_MSI_DOMAIN_OPS
1248static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
1249 struct msi_desc *desc)
1250{
1251 arg->desc = desc;
1252 arg->hwirq = pci_msi_domain_calc_hwirq(msi_desc_to_pci_dev(desc),
1253 desc);
1254}
1255#else
1256#define pci_msi_domain_set_desc NULL
1257#endif
1258
1259static struct msi_domain_ops pci_msi_domain_ops_default = {
1260 .set_desc = pci_msi_domain_set_desc,
1261 .msi_check = pci_msi_domain_check_cap,
1262 .handle_error = pci_msi_domain_handle_error,
1263};
1264
1265static void pci_msi_domain_update_dom_ops(struct msi_domain_info *info)
1266{
1267 struct msi_domain_ops *ops = info->ops;
1268
1269 if (ops == NULL) {
1270 info->ops = &pci_msi_domain_ops_default;
1271 } else {
1272 if (ops->set_desc == NULL)
1273 ops->set_desc = pci_msi_domain_set_desc;
1274 if (ops->msi_check == NULL)
1275 ops->msi_check = pci_msi_domain_check_cap;
1276 if (ops->handle_error == NULL)
1277 ops->handle_error = pci_msi_domain_handle_error;
1278 }
1279}
1280
1281static void pci_msi_domain_update_chip_ops(struct msi_domain_info *info)
1282{
1283 struct irq_chip *chip = info->chip;
1284
1285 BUG_ON(!chip);
1286 if (!chip->irq_write_msi_msg)
1287 chip->irq_write_msi_msg = pci_msi_domain_write_msg;
1288}
1289
1290/**
1291 * pci_msi_create_irq_domain - Creat a MSI interrupt domain
1292 * @node: Optional device-tree node of the interrupt controller
1293 * @info: MSI domain info
1294 * @parent: Parent irq domain
1295 *
1296 * Updates the domain and chip ops and creates a MSI interrupt domain.
1297 *
1298 * Returns:
1299 * A domain pointer or NULL in case of failure.
1300 */
1301struct irq_domain *pci_msi_create_irq_domain(struct device_node *node,
1302 struct msi_domain_info *info,
1303 struct irq_domain *parent)
1304{
1305 if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
1306 pci_msi_domain_update_dom_ops(info);
1307 if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
1308 pci_msi_domain_update_chip_ops(info);
1309
1310 return msi_create_irq_domain(node, info, parent);
1311}
1312
1313/**
1314 * pci_msi_domain_alloc_irqs - Allocate interrupts for @dev in @domain
1315 * @domain: The interrupt domain to allocate from
1316 * @dev: The device for which to allocate
1317 * @nvec: The number of interrupts to allocate
1318 * @type: Unused to allow simpler migration from the arch_XXX interfaces
1319 *
1320 * Returns:
1321 * A virtual interrupt number or an error code in case of failure
1322 */
1323int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev,
1324 int nvec, int type)
1325{
1326 return msi_domain_alloc_irqs(domain, &dev->dev, nvec);
1327}
1328
1329/**
1330 * pci_msi_domain_free_irqs - Free interrupts for @dev in @domain
1331 * @domain: The interrupt domain
1332 * @dev: The device for which to free interrupts
1333 */
1334void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev)
1335{
1336 msi_domain_free_irqs(domain, &dev->dev);
1337}
Jiang Liu8e047ad2014-11-15 22:24:07 +08001338
1339/**
1340 * pci_msi_create_default_irq_domain - Create a default MSI interrupt domain
1341 * @node: Optional device-tree node of the interrupt controller
1342 * @info: MSI domain info
1343 * @parent: Parent irq domain
1344 *
1345 * Returns: A domain pointer or NULL in case of failure. If successful
1346 * the default PCI/MSI irqdomain pointer is updated.
1347 */
1348struct irq_domain *pci_msi_create_default_irq_domain(struct device_node *node,
1349 struct msi_domain_info *info, struct irq_domain *parent)
1350{
1351 struct irq_domain *domain;
1352
1353 mutex_lock(&pci_msi_domain_lock);
1354 if (pci_msi_default_domain) {
1355 pr_err("PCI: default irq domain for PCI MSI has already been created.\n");
1356 domain = NULL;
1357 } else {
1358 domain = pci_msi_create_irq_domain(node, info, parent);
1359 pci_msi_default_domain = domain;
1360 }
1361 mutex_unlock(&pci_msi_domain_lock);
1362
1363 return domain;
1364}
Jiang Liu3878eae2014-11-11 21:02:18 +08001365#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */