blob: 6f2c459160f0a03d212c65bd3e80a1c2aa8d8b52 [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/module.h>
19#include <linux/firmware.h>
20
21#include "core.h"
22#include "mac.h"
23#include "htc.h"
24#include "hif.h"
25#include "wmi.h"
26#include "bmi.h"
27#include "debug.h"
28#include "htt.h"
Kalle Valo43d2a302014-09-10 18:23:30 +030029#include "testmode.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030030
31unsigned int ath10k_debug_mask;
32static bool uart_print;
33static unsigned int ath10k_p2p;
34module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
35module_param(uart_print, bool, 0644);
36module_param_named(p2p, ath10k_p2p, uint, 0644);
37MODULE_PARM_DESC(debug_mask, "Debugging mask");
38MODULE_PARM_DESC(uart_print, "Uart target debugging");
39MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
40
41static const struct ath10k_hw_params ath10k_hw_params_list[] = {
42 {
Kalle Valo5e3dd152013-06-12 20:52:10 +030043 .id = QCA988X_HW_2_0_VERSION,
44 .name = "qca988x hw2.0",
45 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
46 .fw = {
47 .dir = QCA988X_HW_2_0_FW_DIR,
48 .fw = QCA988X_HW_2_0_FW_FILE,
49 .otp = QCA988X_HW_2_0_OTP_FILE,
50 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
51 },
52 },
53};
54
55static void ath10k_send_suspend_complete(struct ath10k *ar)
56{
Michal Kazior7aa7a722014-08-25 12:09:38 +020057 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030058
Marek Puzyniak9042e172014-02-10 17:14:23 +010059 complete(&ar->target_suspend);
Kalle Valo5e3dd152013-06-12 20:52:10 +030060}
61
Kalle Valo5e3dd152013-06-12 20:52:10 +030062static int ath10k_init_configure_target(struct ath10k *ar)
63{
64 u32 param_host;
65 int ret;
66
67 /* tell target which HTC version it is used*/
68 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
69 HTC_PROTOCOL_VERSION);
70 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +020071 ath10k_err(ar, "settings HTC version failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030072 return ret;
73 }
74
75 /* set the firmware mode to STA/IBSS/AP */
76 ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
77 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +020078 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030079 return ret;
80 }
81
82 /* TODO following parameters need to be re-visited. */
83 /* num_device */
84 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
85 /* Firmware mode */
86 /* FIXME: Why FW_MODE_AP ??.*/
87 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
88 /* mac_addr_method */
89 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
90 /* firmware_bridge */
91 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
92 /* fwsubmode */
93 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
94
95 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
96 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +020097 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030098 return ret;
99 }
100
101 /* We do all byte-swapping on the host */
102 ret = ath10k_bmi_write32(ar, hi_be, 0);
103 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200104 ath10k_err(ar, "setting host CPU BE mode failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300105 return ret;
106 }
107
108 /* FW descriptor/Data swap flags */
109 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
110
111 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200112 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300113 return ret;
114 }
115
116 return 0;
117}
118
119static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
120 const char *dir,
121 const char *file)
122{
123 char filename[100];
124 const struct firmware *fw;
125 int ret;
126
127 if (file == NULL)
128 return ERR_PTR(-ENOENT);
129
130 if (dir == NULL)
131 dir = ".";
132
133 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
134 ret = request_firmware(&fw, filename, ar->dev);
135 if (ret)
136 return ERR_PTR(ret);
137
138 return fw;
139}
140
Kalle Valoa58227e2014-10-13 09:40:59 +0300141static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
142 size_t data_len)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300143{
144 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
145 u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
146 u32 board_ext_data_addr;
147 int ret;
148
149 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
150 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200151 ath10k_err(ar, "could not read board ext data addr (%d)\n",
152 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300153 return ret;
154 }
155
Michal Kazior7aa7a722014-08-25 12:09:38 +0200156 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valoeffea962013-09-08 17:55:44 +0300157 "boot push board extended data addr 0x%x\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300158 board_ext_data_addr);
159
160 if (board_ext_data_addr == 0)
161 return 0;
162
Kalle Valoa58227e2014-10-13 09:40:59 +0300163 if (data_len != (board_data_size + board_ext_data_size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200164 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
Kalle Valoa58227e2014-10-13 09:40:59 +0300165 data_len, board_data_size, board_ext_data_size);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300166 return -EINVAL;
167 }
168
169 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
Kalle Valoa58227e2014-10-13 09:40:59 +0300170 data + board_data_size,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300171 board_ext_data_size);
172 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200173 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300174 return ret;
175 }
176
177 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
178 (board_ext_data_size << 16) | 1);
179 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200180 ath10k_err(ar, "could not write board ext data bit (%d)\n",
181 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300182 return ret;
183 }
184
185 return 0;
186}
187
Kalle Valoa58227e2014-10-13 09:40:59 +0300188static int ath10k_download_board_data(struct ath10k *ar, const void *data,
189 size_t data_len)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300190{
191 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
192 u32 address;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300193 int ret;
194
Kalle Valoa58227e2014-10-13 09:40:59 +0300195 ret = ath10k_push_board_ext_data(ar, data, data_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300196 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200197 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300198 goto exit;
199 }
200
201 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
202 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200203 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300204 goto exit;
205 }
206
Kalle Valoa58227e2014-10-13 09:40:59 +0300207 ret = ath10k_bmi_write_memory(ar, address, data,
Kalle Valo958df3a2013-09-27 19:55:01 +0300208 min_t(u32, board_data_size,
Kalle Valoa58227e2014-10-13 09:40:59 +0300209 data_len));
Kalle Valo5e3dd152013-06-12 20:52:10 +0300210 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200211 ath10k_err(ar, "could not write board data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300212 goto exit;
213 }
214
215 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
216 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200217 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300218 goto exit;
219 }
220
221exit:
Kalle Valo5e3dd152013-06-12 20:52:10 +0300222 return ret;
223}
224
Kalle Valoa58227e2014-10-13 09:40:59 +0300225static int ath10k_download_cal_file(struct ath10k *ar)
226{
227 int ret;
228
229 if (!ar->cal_file)
230 return -ENOENT;
231
232 if (IS_ERR(ar->cal_file))
233 return PTR_ERR(ar->cal_file);
234
235 ret = ath10k_download_board_data(ar, ar->cal_file->data,
236 ar->cal_file->size);
237 if (ret) {
238 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
239 return ret;
240 }
241
242 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
243
244 return 0;
245}
246
Kalle Valo5e3dd152013-06-12 20:52:10 +0300247static int ath10k_download_and_run_otp(struct ath10k *ar)
248{
Kalle Valod6d4a582014-03-11 17:33:19 +0200249 u32 result, address = ar->hw_params.patch_load_addr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300250 int ret;
251
Kalle Valoa58227e2014-10-13 09:40:59 +0300252 ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len);
Kalle Valo83091552014-10-13 09:40:53 +0300253 if (ret) {
254 ath10k_err(ar, "failed to download board data: %d\n", ret);
255 return ret;
256 }
257
Kalle Valo5e3dd152013-06-12 20:52:10 +0300258 /* OTP is optional */
259
Kalle Valo7f06ea12014-03-11 17:33:28 +0200260 if (!ar->otp_data || !ar->otp_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200261 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
Ben Greear36a8f412014-03-24 12:20:42 -0700262 ar->otp_data, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300263 return 0;
Kalle Valo7f06ea12014-03-11 17:33:28 +0200264 }
265
Michal Kazior7aa7a722014-08-25 12:09:38 +0200266 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
Kalle Valo7f06ea12014-03-11 17:33:28 +0200267 address, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300268
Kalle Valo958df3a2013-09-27 19:55:01 +0300269 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300270 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200271 ath10k_err(ar, "could not write otp (%d)\n", ret);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200272 return ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300273 }
274
Kalle Valod6d4a582014-03-11 17:33:19 +0200275 ret = ath10k_bmi_execute(ar, address, 0, &result);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300276 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200277 ath10k_err(ar, "could not execute otp (%d)\n", ret);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200278 return ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300279 }
280
Michal Kazior7aa7a722014-08-25 12:09:38 +0200281 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200282
283 if (result != 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200284 ath10k_err(ar, "otp calibration failed: %d", result);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200285 return -EINVAL;
286 }
287
288 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300289}
290
Kalle Valo43d2a302014-09-10 18:23:30 +0300291static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300292{
Kalle Valo43d2a302014-09-10 18:23:30 +0300293 u32 address, data_len;
294 const char *mode_name;
295 const void *data;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300296 int ret;
297
Kalle Valo5e3dd152013-06-12 20:52:10 +0300298 address = ar->hw_params.patch_load_addr;
299
Kalle Valo43d2a302014-09-10 18:23:30 +0300300 switch (mode) {
301 case ATH10K_FIRMWARE_MODE_NORMAL:
302 data = ar->firmware_data;
303 data_len = ar->firmware_len;
304 mode_name = "normal";
305 break;
306 case ATH10K_FIRMWARE_MODE_UTF:
307 data = ar->testmode.utf->data;
308 data_len = ar->testmode.utf->size;
309 mode_name = "utf";
310 break;
311 default:
312 ath10k_err(ar, "unknown firmware mode: %d\n", mode);
313 return -EINVAL;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300314 }
315
Kalle Valo43d2a302014-09-10 18:23:30 +0300316 ath10k_dbg(ar, ATH10K_DBG_BOOT,
317 "boot uploading firmware image %p len %d mode %s\n",
318 data, data_len, mode_name);
319
320 ret = ath10k_bmi_fast_download(ar, address, data, data_len);
321 if (ret) {
322 ath10k_err(ar, "failed to download %s firmware: %d\n",
323 mode_name, ret);
324 return ret;
325 }
326
Michal Kazior29385052013-07-16 09:38:58 +0200327 return ret;
328}
329
330static void ath10k_core_free_firmware_files(struct ath10k *ar)
331{
Kalle Valo36527912013-09-27 19:54:55 +0300332 if (ar->board && !IS_ERR(ar->board))
333 release_firmware(ar->board);
Michal Kazior29385052013-07-16 09:38:58 +0200334
335 if (ar->otp && !IS_ERR(ar->otp))
336 release_firmware(ar->otp);
337
338 if (ar->firmware && !IS_ERR(ar->firmware))
339 release_firmware(ar->firmware);
340
Kalle Valoa58227e2014-10-13 09:40:59 +0300341 if (ar->cal_file && !IS_ERR(ar->cal_file))
342 release_firmware(ar->cal_file);
343
Kalle Valo36527912013-09-27 19:54:55 +0300344 ar->board = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300345 ar->board_data = NULL;
346 ar->board_len = 0;
347
Michal Kazior29385052013-07-16 09:38:58 +0200348 ar->otp = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300349 ar->otp_data = NULL;
350 ar->otp_len = 0;
351
Michal Kazior29385052013-07-16 09:38:58 +0200352 ar->firmware = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300353 ar->firmware_data = NULL;
354 ar->firmware_len = 0;
Kalle Valoa58227e2014-10-13 09:40:59 +0300355
356 ar->cal_file = NULL;
357}
358
359static int ath10k_fetch_cal_file(struct ath10k *ar)
360{
361 char filename[100];
362
363 /* cal-<bus>-<id>.bin */
364 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
365 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
366
367 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
368 if (IS_ERR(ar->cal_file))
369 /* calibration file is optional, don't print any warnings */
370 return PTR_ERR(ar->cal_file);
371
372 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
373 ATH10K_FW_DIR, filename);
374
375 return 0;
Michal Kazior29385052013-07-16 09:38:58 +0200376}
377
Kalle Valo1a222432013-09-27 19:55:07 +0300378static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
Michal Kazior29385052013-07-16 09:38:58 +0200379{
380 int ret = 0;
381
382 if (ar->hw_params.fw.fw == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200383 ath10k_err(ar, "firmware file not defined\n");
Michal Kazior29385052013-07-16 09:38:58 +0200384 return -EINVAL;
385 }
386
387 if (ar->hw_params.fw.board == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200388 ath10k_err(ar, "board data file not defined");
Michal Kazior29385052013-07-16 09:38:58 +0200389 return -EINVAL;
390 }
391
Kalle Valo36527912013-09-27 19:54:55 +0300392 ar->board = ath10k_fetch_fw_file(ar,
393 ar->hw_params.fw.dir,
394 ar->hw_params.fw.board);
395 if (IS_ERR(ar->board)) {
396 ret = PTR_ERR(ar->board);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200397 ath10k_err(ar, "could not fetch board data (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200398 goto err;
399 }
400
Kalle Valo958df3a2013-09-27 19:55:01 +0300401 ar->board_data = ar->board->data;
402 ar->board_len = ar->board->size;
403
Michal Kazior29385052013-07-16 09:38:58 +0200404 ar->firmware = ath10k_fetch_fw_file(ar,
405 ar->hw_params.fw.dir,
406 ar->hw_params.fw.fw);
407 if (IS_ERR(ar->firmware)) {
408 ret = PTR_ERR(ar->firmware);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200409 ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200410 goto err;
411 }
412
Kalle Valo958df3a2013-09-27 19:55:01 +0300413 ar->firmware_data = ar->firmware->data;
414 ar->firmware_len = ar->firmware->size;
415
Michal Kazior29385052013-07-16 09:38:58 +0200416 /* OTP may be undefined. If so, don't fetch it at all */
417 if (ar->hw_params.fw.otp == NULL)
418 return 0;
419
420 ar->otp = ath10k_fetch_fw_file(ar,
421 ar->hw_params.fw.dir,
422 ar->hw_params.fw.otp);
423 if (IS_ERR(ar->otp)) {
424 ret = PTR_ERR(ar->otp);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200425 ath10k_err(ar, "could not fetch otp (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200426 goto err;
427 }
428
Kalle Valo958df3a2013-09-27 19:55:01 +0300429 ar->otp_data = ar->otp->data;
430 ar->otp_len = ar->otp->size;
431
Michal Kazior29385052013-07-16 09:38:58 +0200432 return 0;
433
434err:
435 ath10k_core_free_firmware_files(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300436 return ret;
437}
438
Kalle Valo1a222432013-09-27 19:55:07 +0300439static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
440{
441 size_t magic_len, len, ie_len;
442 int ie_id, i, index, bit, ret;
443 struct ath10k_fw_ie *hdr;
444 const u8 *data;
445 __le32 *timestamp;
446
447 /* first fetch the firmware file (firmware-*.bin) */
448 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
449 if (IS_ERR(ar->firmware)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200450 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
Ben Greear53c02282014-03-24 12:20:41 -0700451 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
Kalle Valo1a222432013-09-27 19:55:07 +0300452 return PTR_ERR(ar->firmware);
453 }
454
455 data = ar->firmware->data;
456 len = ar->firmware->size;
457
458 /* magic also includes the null byte, check that as well */
459 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
460
461 if (len < magic_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200462 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
Ben Greear53c02282014-03-24 12:20:41 -0700463 ar->hw_params.fw.dir, name, len);
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200464 ret = -EINVAL;
465 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300466 }
467
468 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200469 ath10k_err(ar, "invalid firmware magic\n");
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200470 ret = -EINVAL;
471 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300472 }
473
474 /* jump over the padding */
475 magic_len = ALIGN(magic_len, 4);
476
477 len -= magic_len;
478 data += magic_len;
479
480 /* loop elements */
481 while (len > sizeof(struct ath10k_fw_ie)) {
482 hdr = (struct ath10k_fw_ie *)data;
483
484 ie_id = le32_to_cpu(hdr->id);
485 ie_len = le32_to_cpu(hdr->len);
486
487 len -= sizeof(*hdr);
488 data += sizeof(*hdr);
489
490 if (len < ie_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200491 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300492 ie_id, len, ie_len);
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200493 ret = -EINVAL;
494 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300495 }
496
497 switch (ie_id) {
498 case ATH10K_FW_IE_FW_VERSION:
499 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
500 break;
501
502 memcpy(ar->hw->wiphy->fw_version, data, ie_len);
503 ar->hw->wiphy->fw_version[ie_len] = '\0';
504
Michal Kazior7aa7a722014-08-25 12:09:38 +0200505 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300506 "found fw version %s\n",
507 ar->hw->wiphy->fw_version);
508 break;
509 case ATH10K_FW_IE_TIMESTAMP:
510 if (ie_len != sizeof(u32))
511 break;
512
513 timestamp = (__le32 *)data;
514
Michal Kazior7aa7a722014-08-25 12:09:38 +0200515 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300516 le32_to_cpup(timestamp));
517 break;
518 case ATH10K_FW_IE_FEATURES:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200519 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300520 "found firmware features ie (%zd B)\n",
521 ie_len);
522
523 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
524 index = i / 8;
525 bit = i % 8;
526
527 if (index == ie_len)
528 break;
529
Ben Greearf591a1a2014-02-04 19:51:38 +0200530 if (data[index] & (1 << bit)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200531 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Ben Greearf591a1a2014-02-04 19:51:38 +0200532 "Enabling feature bit: %i\n",
533 i);
Kalle Valo1a222432013-09-27 19:55:07 +0300534 __set_bit(i, ar->fw_features);
Ben Greearf591a1a2014-02-04 19:51:38 +0200535 }
Kalle Valo1a222432013-09-27 19:55:07 +0300536 }
537
Michal Kazior7aa7a722014-08-25 12:09:38 +0200538 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
Kalle Valo1a222432013-09-27 19:55:07 +0300539 ar->fw_features,
540 sizeof(ar->fw_features));
541 break;
542 case ATH10K_FW_IE_FW_IMAGE:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200543 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300544 "found fw image ie (%zd B)\n",
545 ie_len);
546
547 ar->firmware_data = data;
548 ar->firmware_len = ie_len;
549
550 break;
551 case ATH10K_FW_IE_OTP_IMAGE:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200552 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300553 "found otp image ie (%zd B)\n",
554 ie_len);
555
556 ar->otp_data = data;
557 ar->otp_len = ie_len;
558
559 break;
560 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200561 ath10k_warn(ar, "Unknown FW IE: %u\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300562 le32_to_cpu(hdr->id));
563 break;
564 }
565
566 /* jump over the padding */
567 ie_len = ALIGN(ie_len, 4);
568
569 len -= ie_len;
570 data += ie_len;
Fengguang Wue05634e2013-10-08 21:48:15 +0300571 }
Kalle Valo1a222432013-09-27 19:55:07 +0300572
573 if (!ar->firmware_data || !ar->firmware_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200574 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
Ben Greear53c02282014-03-24 12:20:41 -0700575 ar->hw_params.fw.dir, name);
Kalle Valo1a222432013-09-27 19:55:07 +0300576 ret = -ENOMEDIUM;
577 goto err;
578 }
579
Michal Kazior24c88f72014-07-25 13:32:17 +0200580 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
581 !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200582 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
Michal Kazior24c88f72014-07-25 13:32:17 +0200583 ret = -EINVAL;
584 goto err;
585 }
586
Kalle Valo1a222432013-09-27 19:55:07 +0300587 /* now fetch the board file */
588 if (ar->hw_params.fw.board == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200589 ath10k_err(ar, "board data file not defined");
Kalle Valo1a222432013-09-27 19:55:07 +0300590 ret = -EINVAL;
591 goto err;
592 }
593
594 ar->board = ath10k_fetch_fw_file(ar,
595 ar->hw_params.fw.dir,
596 ar->hw_params.fw.board);
597 if (IS_ERR(ar->board)) {
598 ret = PTR_ERR(ar->board);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200599 ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n",
Ben Greear53c02282014-03-24 12:20:41 -0700600 ar->hw_params.fw.dir, ar->hw_params.fw.board,
601 ret);
Kalle Valo1a222432013-09-27 19:55:07 +0300602 goto err;
603 }
604
605 ar->board_data = ar->board->data;
606 ar->board_len = ar->board->size;
607
608 return 0;
609
610err:
611 ath10k_core_free_firmware_files(ar);
612 return ret;
613}
614
615static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
616{
617 int ret;
618
Kalle Valoa58227e2014-10-13 09:40:59 +0300619 /* calibration file is optional, don't check for any errors */
620 ath10k_fetch_cal_file(ar);
621
Michal Kazior24c88f72014-07-25 13:32:17 +0200622 ar->fw_api = 3;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200623 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Michal Kazior24c88f72014-07-25 13:32:17 +0200624
625 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
626 if (ret == 0)
627 goto success;
628
Ben Greear53c02282014-03-24 12:20:41 -0700629 ar->fw_api = 2;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200630 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Ben Greear53c02282014-03-24 12:20:41 -0700631
Kalle Valo1a222432013-09-27 19:55:07 +0300632 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
Ben Greear53c02282014-03-24 12:20:41 -0700633 if (ret == 0)
634 goto success;
635
636 ar->fw_api = 1;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200637 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Kalle Valo1a222432013-09-27 19:55:07 +0300638
639 ret = ath10k_core_fetch_firmware_api_1(ar);
640 if (ret)
641 return ret;
642
Ben Greear53c02282014-03-24 12:20:41 -0700643success:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200644 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
Kalle Valo1a222432013-09-27 19:55:07 +0300645
646 return 0;
647}
648
Kalle Valo83091552014-10-13 09:40:53 +0300649static int ath10k_download_cal_data(struct ath10k *ar)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300650{
651 int ret;
652
Kalle Valoa58227e2014-10-13 09:40:59 +0300653 ret = ath10k_download_cal_file(ar);
654 if (ret == 0) {
655 ar->cal_mode = ATH10K_CAL_MODE_FILE;
656 goto done;
657 }
658
659 ath10k_dbg(ar, ATH10K_DBG_BOOT,
660 "boot did not find a calibration file, try OTP next: %d\n",
661 ret);
662
Kalle Valo5e3dd152013-06-12 20:52:10 +0300663 ret = ath10k_download_and_run_otp(ar);
Ben Greear36a8f412014-03-24 12:20:42 -0700664 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200665 ath10k_err(ar, "failed to run otp: %d\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300666 return ret;
Ben Greear36a8f412014-03-24 12:20:42 -0700667 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300668
Kalle Valoa58227e2014-10-13 09:40:59 +0300669 ar->cal_mode = ATH10K_CAL_MODE_OTP;
670
671done:
672 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
673 ath10k_cal_mode_str(ar->cal_mode));
674 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300675}
676
677static int ath10k_init_uart(struct ath10k *ar)
678{
679 int ret;
680
681 /*
682 * Explicitly setting UART prints to zero as target turns it on
683 * based on scratch registers.
684 */
685 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
686 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200687 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300688 return ret;
689 }
690
Kalle Valoc8c39af2013-11-20 10:00:41 +0200691 if (!uart_print)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300692 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300693
694 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
695 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200696 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300697 return ret;
698 }
699
700 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
701 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200702 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300703 return ret;
704 }
705
Bartosz Markowski03fc1372013-09-03 14:24:02 +0200706 /* Set the UART baud rate to 19200. */
707 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
708 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200709 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
Bartosz Markowski03fc1372013-09-03 14:24:02 +0200710 return ret;
711 }
712
Michal Kazior7aa7a722014-08-25 12:09:38 +0200713 ath10k_info(ar, "UART prints enabled\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300714 return 0;
715}
716
717static int ath10k_init_hw_params(struct ath10k *ar)
718{
719 const struct ath10k_hw_params *uninitialized_var(hw_params);
720 int i;
721
722 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
723 hw_params = &ath10k_hw_params_list[i];
724
725 if (hw_params->id == ar->target_version)
726 break;
727 }
728
729 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200730 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300731 ar->target_version);
732 return -EINVAL;
733 }
734
735 ar->hw_params = *hw_params;
736
Michal Kazior7aa7a722014-08-25 12:09:38 +0200737 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
Kalle Valoc8c39af2013-11-20 10:00:41 +0200738 ar->hw_params.name, ar->target_version);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300739
740 return 0;
741}
742
Michal Kazioraffd3212013-07-16 09:54:35 +0200743static void ath10k_core_restart(struct work_struct *work)
744{
745 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
746
Michal Kazior7962b0d2014-10-28 10:34:38 +0100747 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
748
749 /* Place a barrier to make sure the compiler doesn't reorder
750 * CRASH_FLUSH and calling other functions.
751 */
752 barrier();
753
754 ieee80211_stop_queues(ar->hw);
755 ath10k_drain_tx(ar);
756 complete_all(&ar->scan.started);
757 complete_all(&ar->scan.completed);
758 complete_all(&ar->scan.on_channel);
759 complete_all(&ar->offchan_tx_completed);
760 complete_all(&ar->install_key_done);
761 complete_all(&ar->vdev_setup_done);
762 wake_up(&ar->htt.empty_tx_wq);
763 wake_up(&ar->wmi.tx_credits_wq);
764 wake_up(&ar->peer_mapping_wq);
765
Michal Kazioraffd3212013-07-16 09:54:35 +0200766 mutex_lock(&ar->conf_mutex);
767
768 switch (ar->state) {
769 case ATH10K_STATE_ON:
Michal Kazioraffd3212013-07-16 09:54:35 +0200770 ar->state = ATH10K_STATE_RESTARTING;
Michal Kazior61e9aab2014-08-22 14:33:18 +0200771 ath10k_hif_stop(ar);
Michal Kazior5c81c7f2014-08-05 14:54:44 +0200772 ath10k_scan_finish(ar);
Michal Kazioraffd3212013-07-16 09:54:35 +0200773 ieee80211_restart_hw(ar->hw);
774 break;
775 case ATH10K_STATE_OFF:
Michal Kazior5e90de82013-10-16 16:46:05 +0300776 /* this can happen if driver is being unloaded
777 * or if the crash happens during FW probing */
Michal Kazior7aa7a722014-08-25 12:09:38 +0200778 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
Michal Kazioraffd3212013-07-16 09:54:35 +0200779 break;
780 case ATH10K_STATE_RESTARTING:
Michal Kaziorc5058f52014-05-26 12:46:03 +0300781 /* hw restart might be requested from multiple places */
782 break;
Michal Kazioraffd3212013-07-16 09:54:35 +0200783 case ATH10K_STATE_RESTARTED:
784 ar->state = ATH10K_STATE_WEDGED;
785 /* fall through */
786 case ATH10K_STATE_WEDGED:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200787 ath10k_warn(ar, "device is wedged, will not restart\n");
Michal Kazioraffd3212013-07-16 09:54:35 +0200788 break;
Kalle Valo43d2a302014-09-10 18:23:30 +0300789 case ATH10K_STATE_UTF:
790 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
791 break;
Michal Kazioraffd3212013-07-16 09:54:35 +0200792 }
793
794 mutex_unlock(&ar->conf_mutex);
795}
796
Kalle Valo43d2a302014-09-10 18:23:30 +0300797int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300798{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300799 int status;
800
Kalle Valo60631c52013-10-08 21:45:25 +0300801 lockdep_assert_held(&ar->conf_mutex);
802
Michal Kazior7962b0d2014-10-28 10:34:38 +0100803 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
804
Michal Kazior64d151d2013-07-16 09:38:53 +0200805 ath10k_bmi_start(ar);
806
Kalle Valo5e3dd152013-06-12 20:52:10 +0300807 if (ath10k_init_configure_target(ar)) {
808 status = -EINVAL;
809 goto err;
810 }
811
Kalle Valo83091552014-10-13 09:40:53 +0300812 status = ath10k_download_cal_data(ar);
813 if (status)
814 goto err;
815
816 status = ath10k_download_fw(ar, mode);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300817 if (status)
818 goto err;
819
820 status = ath10k_init_uart(ar);
821 if (status)
822 goto err;
823
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300824 ar->htc.htc_ops.target_send_suspend_complete =
825 ath10k_send_suspend_complete;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300826
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300827 status = ath10k_htc_init(ar);
828 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200829 ath10k_err(ar, "could not init HTC (%d)\n", status);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300830 goto err;
831 }
832
833 status = ath10k_bmi_done(ar);
834 if (status)
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300835 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300836
837 status = ath10k_wmi_attach(ar);
838 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200839 ath10k_err(ar, "WMI attach failed: %d\n", status);
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300840 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300841 }
842
Michal Kazior95bf21f2014-05-16 17:15:39 +0300843 status = ath10k_htt_init(ar);
844 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200845 ath10k_err(ar, "failed to init htt: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300846 goto err_wmi_detach;
847 }
848
849 status = ath10k_htt_tx_alloc(&ar->htt);
850 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200851 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300852 goto err_wmi_detach;
853 }
854
855 status = ath10k_htt_rx_alloc(&ar->htt);
856 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200857 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300858 goto err_htt_tx_detach;
859 }
860
Michal Kazior67e3c632013-11-08 08:05:18 +0100861 status = ath10k_hif_start(ar);
862 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200863 ath10k_err(ar, "could not start HIF: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300864 goto err_htt_rx_detach;
Michal Kazior67e3c632013-11-08 08:05:18 +0100865 }
866
867 status = ath10k_htc_wait_target(&ar->htc);
868 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200869 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
Michal Kazior67e3c632013-11-08 08:05:18 +0100870 goto err_hif_stop;
871 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300872
Kalle Valo43d2a302014-09-10 18:23:30 +0300873 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
874 status = ath10k_htt_connect(&ar->htt);
875 if (status) {
876 ath10k_err(ar, "failed to connect htt (%d)\n", status);
877 goto err_hif_stop;
878 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300879 }
880
Michal Kazior95bf21f2014-05-16 17:15:39 +0300881 status = ath10k_wmi_connect(ar);
882 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200883 ath10k_err(ar, "could not connect wmi: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300884 goto err_hif_stop;
885 }
886
887 status = ath10k_htc_start(&ar->htc);
888 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200889 ath10k_err(ar, "failed to start htc: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300890 goto err_hif_stop;
891 }
892
Kalle Valo43d2a302014-09-10 18:23:30 +0300893 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
894 status = ath10k_wmi_wait_for_service_ready(ar);
895 if (status <= 0) {
896 ath10k_warn(ar, "wmi service ready event not received");
897 status = -ETIMEDOUT;
898 goto err_hif_stop;
899 }
Michal Kazior95bf21f2014-05-16 17:15:39 +0300900 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300901
Michal Kazior7aa7a722014-08-25 12:09:38 +0200902 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
Kalle Valoc8c39af2013-11-20 10:00:41 +0200903 ar->hw->wiphy->fw_version);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300904
Kalle Valo5e3dd152013-06-12 20:52:10 +0300905 status = ath10k_wmi_cmd_init(ar);
906 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200907 ath10k_err(ar, "could not send WMI init command (%d)\n",
908 status);
Michal Kaziorb7967dc2014-08-07 11:03:31 +0200909 goto err_hif_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300910 }
911
912 status = ath10k_wmi_wait_for_unified_ready(ar);
913 if (status <= 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200914 ath10k_err(ar, "wmi unified ready event not received\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300915 status = -ETIMEDOUT;
Michal Kaziorb7967dc2014-08-07 11:03:31 +0200916 goto err_hif_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300917 }
918
Kalle Valo43d2a302014-09-10 18:23:30 +0300919 /* we don't care about HTT in UTF mode */
920 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
921 status = ath10k_htt_setup(&ar->htt);
922 if (status) {
923 ath10k_err(ar, "failed to setup htt: %d\n", status);
924 goto err_hif_stop;
925 }
Michal Kazior95bf21f2014-05-16 17:15:39 +0300926 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300927
Kalle Valodb66ea02013-09-03 11:44:03 +0300928 status = ath10k_debug_start(ar);
929 if (status)
Michal Kaziorb7967dc2014-08-07 11:03:31 +0200930 goto err_hif_stop;
Kalle Valodb66ea02013-09-03 11:44:03 +0300931
Bartosz Markowskidfa413d2014-06-02 21:19:45 +0300932 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
Ben Greear16c11172014-09-23 14:17:16 -0700933 ar->free_vdev_map = (1LL << TARGET_10X_NUM_VDEVS) - 1;
Bartosz Markowskidfa413d2014-06-02 21:19:45 +0300934 else
Ben Greear16c11172014-09-23 14:17:16 -0700935 ar->free_vdev_map = (1LL << TARGET_NUM_VDEVS) - 1;
Bartosz Markowskidfa413d2014-06-02 21:19:45 +0300936
Michal Kazior05791192013-10-16 15:44:45 +0300937 INIT_LIST_HEAD(&ar->arvifs);
Michal Kazior1a1b8a82013-07-16 09:38:55 +0200938
Michal Kaziordd30a362013-07-16 09:38:51 +0200939 return 0;
940
Michal Kazior67e3c632013-11-08 08:05:18 +0100941err_hif_stop:
942 ath10k_hif_stop(ar);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300943err_htt_rx_detach:
944 ath10k_htt_rx_free(&ar->htt);
945err_htt_tx_detach:
946 ath10k_htt_tx_free(&ar->htt);
Michal Kaziordd30a362013-07-16 09:38:51 +0200947err_wmi_detach:
948 ath10k_wmi_detach(ar);
949err:
950 return status;
951}
Michal Kazior818bdd12013-07-16 09:38:57 +0200952EXPORT_SYMBOL(ath10k_core_start);
Michal Kaziordd30a362013-07-16 09:38:51 +0200953
Marek Puzyniak00f54822014-02-10 17:14:24 +0100954int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
955{
956 int ret;
957
958 reinit_completion(&ar->target_suspend);
959
960 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
961 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200962 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
Marek Puzyniak00f54822014-02-10 17:14:24 +0100963 return ret;
964 }
965
966 ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
967
968 if (ret == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200969 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
Marek Puzyniak00f54822014-02-10 17:14:24 +0100970 return -ETIMEDOUT;
971 }
972
973 return 0;
974}
975
Michal Kaziordd30a362013-07-16 09:38:51 +0200976void ath10k_core_stop(struct ath10k *ar)
977{
Kalle Valo60631c52013-10-08 21:45:25 +0300978 lockdep_assert_held(&ar->conf_mutex);
979
Marek Puzyniak00f54822014-02-10 17:14:24 +0100980 /* try to suspend target */
Kalle Valo43d2a302014-09-10 18:23:30 +0300981 if (ar->state != ATH10K_STATE_RESTARTING &&
982 ar->state != ATH10K_STATE_UTF)
Michal Kazior216a1832014-04-23 19:30:04 +0300983 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
984
Kalle Valodb66ea02013-09-03 11:44:03 +0300985 ath10k_debug_stop(ar);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300986 ath10k_hif_stop(ar);
987 ath10k_htt_tx_free(&ar->htt);
988 ath10k_htt_rx_free(&ar->htt);
Michal Kaziordd30a362013-07-16 09:38:51 +0200989 ath10k_wmi_detach(ar);
990}
Michal Kazior818bdd12013-07-16 09:38:57 +0200991EXPORT_SYMBOL(ath10k_core_stop);
992
993/* mac80211 manages fw/hw initialization through start/stop hooks. However in
994 * order to know what hw capabilities should be advertised to mac80211 it is
995 * necessary to load the firmware (and tear it down immediately since start
996 * hook will try to init it again) before registering */
997static int ath10k_core_probe_fw(struct ath10k *ar)
998{
Michal Kazior29385052013-07-16 09:38:58 +0200999 struct bmi_target_info target_info;
1000 int ret = 0;
Michal Kazior818bdd12013-07-16 09:38:57 +02001001
1002 ret = ath10k_hif_power_up(ar);
1003 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001004 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
Michal Kazior818bdd12013-07-16 09:38:57 +02001005 return ret;
1006 }
1007
Michal Kazior29385052013-07-16 09:38:58 +02001008 memset(&target_info, 0, sizeof(target_info));
1009 ret = ath10k_bmi_get_target_info(ar, &target_info);
1010 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001011 ath10k_err(ar, "could not get target info (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +02001012 ath10k_hif_power_down(ar);
1013 return ret;
1014 }
1015
1016 ar->target_version = target_info.version;
1017 ar->hw->wiphy->hw_version = target_info.version;
1018
1019 ret = ath10k_init_hw_params(ar);
1020 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001021 ath10k_err(ar, "could not get hw params (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +02001022 ath10k_hif_power_down(ar);
1023 return ret;
1024 }
1025
1026 ret = ath10k_core_fetch_firmware_files(ar);
1027 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001028 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +02001029 ath10k_hif_power_down(ar);
1030 return ret;
1031 }
1032
Kalle Valo60631c52013-10-08 21:45:25 +03001033 mutex_lock(&ar->conf_mutex);
1034
Kalle Valo43d2a302014-09-10 18:23:30 +03001035 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL);
Michal Kazior818bdd12013-07-16 09:38:57 +02001036 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001037 ath10k_err(ar, "could not init core (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +02001038 ath10k_core_free_firmware_files(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +02001039 ath10k_hif_power_down(ar);
Kalle Valo60631c52013-10-08 21:45:25 +03001040 mutex_unlock(&ar->conf_mutex);
Michal Kazior818bdd12013-07-16 09:38:57 +02001041 return ret;
1042 }
1043
Michal Kazior8079de02014-08-22 14:23:29 +02001044 ath10k_print_driver_info(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +02001045 ath10k_core_stop(ar);
Kalle Valo60631c52013-10-08 21:45:25 +03001046
1047 mutex_unlock(&ar->conf_mutex);
1048
Michal Kazior818bdd12013-07-16 09:38:57 +02001049 ath10k_hif_power_down(ar);
1050 return 0;
1051}
Michal Kaziordd30a362013-07-16 09:38:51 +02001052
Kalle Valoe01ae682013-09-01 11:22:14 +03001053static int ath10k_core_check_chip_id(struct ath10k *ar)
1054{
1055 u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
1056
Michal Kazior7aa7a722014-08-25 12:09:38 +02001057 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
Kalle Valoeffea962013-09-08 17:55:44 +03001058 ar->chip_id, hw_revision);
1059
Kalle Valoe01ae682013-09-01 11:22:14 +03001060 /* Check that we are not using hw1.0 (some of them have same pci id
1061 * as hw2.0) before doing anything else as ath10k crashes horribly
1062 * due to missing hw1.0 workarounds. */
1063 switch (hw_revision) {
1064 case QCA988X_HW_1_0_CHIP_ID_REV:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001065 ath10k_err(ar, "ERROR: qca988x hw1.0 is not supported\n");
Kalle Valoe01ae682013-09-01 11:22:14 +03001066 return -EOPNOTSUPP;
1067
1068 case QCA988X_HW_2_0_CHIP_ID_REV:
1069 /* known hardware revision, continue normally */
1070 return 0;
1071
1072 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001073 ath10k_warn(ar, "Warning: hardware revision unknown (0x%x), expect problems\n",
Kalle Valoe01ae682013-09-01 11:22:14 +03001074 ar->chip_id);
1075 return 0;
1076 }
1077
1078 return 0;
1079}
1080
Michal Kazior6782cb62014-05-23 12:28:47 +02001081static void ath10k_core_register_work(struct work_struct *work)
Michal Kaziordd30a362013-07-16 09:38:51 +02001082{
Michal Kazior6782cb62014-05-23 12:28:47 +02001083 struct ath10k *ar = container_of(work, struct ath10k, register_work);
Michal Kaziordd30a362013-07-16 09:38:51 +02001084 int status;
1085
Michal Kazior818bdd12013-07-16 09:38:57 +02001086 status = ath10k_core_probe_fw(ar);
1087 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001088 ath10k_err(ar, "could not probe fw (%d)\n", status);
Michal Kazior6782cb62014-05-23 12:28:47 +02001089 goto err;
Michal Kazior818bdd12013-07-16 09:38:57 +02001090 }
Michal Kaziordd30a362013-07-16 09:38:51 +02001091
Kalle Valo5e3dd152013-06-12 20:52:10 +03001092 status = ath10k_mac_register(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +02001093 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001094 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
Michal Kazior29385052013-07-16 09:38:58 +02001095 goto err_release_fw;
Michal Kazior818bdd12013-07-16 09:38:57 +02001096 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001097
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001098 status = ath10k_debug_register(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001099 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001100 ath10k_err(ar, "unable to initialize debugfs\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001101 goto err_unregister_mac;
1102 }
1103
Simon Wunderlich855aed12014-08-02 09:12:54 +03001104 status = ath10k_spectral_create(ar);
1105 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001106 ath10k_err(ar, "failed to initialize spectral\n");
Simon Wunderlich855aed12014-08-02 09:12:54 +03001107 goto err_debug_destroy;
1108 }
1109
Michal Kazior6782cb62014-05-23 12:28:47 +02001110 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
1111 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001112
Simon Wunderlich855aed12014-08-02 09:12:54 +03001113err_debug_destroy:
1114 ath10k_debug_destroy(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001115err_unregister_mac:
1116 ath10k_mac_unregister(ar);
Michal Kazior29385052013-07-16 09:38:58 +02001117err_release_fw:
1118 ath10k_core_free_firmware_files(ar);
Michal Kazior6782cb62014-05-23 12:28:47 +02001119err:
Michal Kaziora491a922014-07-14 16:07:29 +03001120 /* TODO: It's probably a good idea to release device from the driver
1121 * but calling device_release_driver() here will cause a deadlock.
1122 */
Michal Kazior6782cb62014-05-23 12:28:47 +02001123 return;
1124}
1125
1126int ath10k_core_register(struct ath10k *ar, u32 chip_id)
1127{
1128 int status;
1129
1130 ar->chip_id = chip_id;
1131
1132 status = ath10k_core_check_chip_id(ar);
1133 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001134 ath10k_err(ar, "Unsupported chip id 0x%08x\n", ar->chip_id);
Michal Kazior6782cb62014-05-23 12:28:47 +02001135 return status;
1136 }
1137
1138 queue_work(ar->workqueue, &ar->register_work);
1139
1140 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001141}
1142EXPORT_SYMBOL(ath10k_core_register);
1143
1144void ath10k_core_unregister(struct ath10k *ar)
1145{
Michal Kazior6782cb62014-05-23 12:28:47 +02001146 cancel_work_sync(&ar->register_work);
1147
1148 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
1149 return;
1150
Simon Wunderlich804eef1472014-08-12 17:12:17 +02001151 /* Stop spectral before unregistering from mac80211 to remove the
1152 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
1153 * would be already be free'd recursively, leading to a double free.
1154 */
1155 ath10k_spectral_destroy(ar);
1156
Kalle Valo5e3dd152013-06-12 20:52:10 +03001157 /* We must unregister from mac80211 before we stop HTC and HIF.
1158 * Otherwise we will fail to submit commands to FW and mac80211 will be
1159 * unhappy about callback failures. */
1160 ath10k_mac_unregister(ar);
Kalle Valodb66ea02013-09-03 11:44:03 +03001161
Kalle Valo43d2a302014-09-10 18:23:30 +03001162 ath10k_testmode_destroy(ar);
1163
Michal Kazior29385052013-07-16 09:38:58 +02001164 ath10k_core_free_firmware_files(ar);
Ben Greear6f1f56e2013-11-04 09:18:16 -08001165
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001166 ath10k_debug_unregister(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001167}
1168EXPORT_SYMBOL(ath10k_core_unregister);
1169
Michal Kaziore7b54192014-08-07 11:03:27 +02001170struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
Kalle Valoe07db352014-10-13 09:40:47 +03001171 enum ath10k_bus bus,
Michal Kazior0d0a6932014-05-23 12:28:45 +02001172 const struct ath10k_hif_ops *hif_ops)
1173{
1174 struct ath10k *ar;
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001175 int ret;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001176
Michal Kaziore7b54192014-08-07 11:03:27 +02001177 ar = ath10k_mac_create(priv_size);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001178 if (!ar)
1179 return NULL;
1180
1181 ar->ath_common.priv = ar;
1182 ar->ath_common.hw = ar->hw;
1183
1184 ar->p2p = !!ath10k_p2p;
1185 ar->dev = dev;
1186
Michal Kazior0d0a6932014-05-23 12:28:45 +02001187 ar->hif.ops = hif_ops;
Kalle Valoe07db352014-10-13 09:40:47 +03001188 ar->hif.bus = bus;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001189
1190 init_completion(&ar->scan.started);
1191 init_completion(&ar->scan.completed);
1192 init_completion(&ar->scan.on_channel);
1193 init_completion(&ar->target_suspend);
1194
1195 init_completion(&ar->install_key_done);
1196 init_completion(&ar->vdev_setup_done);
1197
Michal Kazior5c81c7f2014-08-05 14:54:44 +02001198 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001199
1200 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
1201 if (!ar->workqueue)
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001202 goto err_free_mac;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001203
1204 mutex_init(&ar->conf_mutex);
1205 spin_lock_init(&ar->data_lock);
1206
1207 INIT_LIST_HEAD(&ar->peers);
1208 init_waitqueue_head(&ar->peer_mapping_wq);
Michal Kazior7962b0d2014-10-28 10:34:38 +01001209 init_waitqueue_head(&ar->htt.empty_tx_wq);
1210 init_waitqueue_head(&ar->wmi.tx_credits_wq);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001211
1212 init_completion(&ar->offchan_tx_completed);
1213 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
1214 skb_queue_head_init(&ar->offchan_tx_queue);
1215
1216 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
1217 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
1218
Michal Kazior6782cb62014-05-23 12:28:47 +02001219 INIT_WORK(&ar->register_work, ath10k_core_register_work);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001220 INIT_WORK(&ar->restart_work, ath10k_core_restart);
1221
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001222 ret = ath10k_debug_create(ar);
1223 if (ret)
1224 goto err_free_wq;
1225
Michal Kazior0d0a6932014-05-23 12:28:45 +02001226 return ar;
1227
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001228err_free_wq:
1229 destroy_workqueue(ar->workqueue);
1230
1231err_free_mac:
Michal Kazior0d0a6932014-05-23 12:28:45 +02001232 ath10k_mac_destroy(ar);
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001233
Michal Kazior0d0a6932014-05-23 12:28:45 +02001234 return NULL;
1235}
1236EXPORT_SYMBOL(ath10k_core_create);
1237
1238void ath10k_core_destroy(struct ath10k *ar)
1239{
1240 flush_workqueue(ar->workqueue);
1241 destroy_workqueue(ar->workqueue);
1242
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001243 ath10k_debug_destroy(ar);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001244 ath10k_mac_destroy(ar);
1245}
1246EXPORT_SYMBOL(ath10k_core_destroy);
1247
Kalle Valo5e3dd152013-06-12 20:52:10 +03001248MODULE_AUTHOR("Qualcomm Atheros");
1249MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
1250MODULE_LICENSE("Dual BSD/GPL");