blob: 7796af4b1d6f65f6352ed40cd6dfcaf580cfd63d [file] [log] [blame]
Catalin Marinas8c2c3df2012-04-20 14:45:54 +01001config ARM64
2 def_bool y
Lorenzo Pieralisid8f4f162015-03-24 17:58:51 +00003 select ACPI_GENERIC_GSI if ACPI
Al Stone6933de02015-03-24 14:02:51 +00004 select ACPI_REDUCED_HARDWARE_ONLY if ACPI
Catalin Marinas8c2c3df2012-04-20 14:45:54 +01005 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
Kees Cook2b68f6c2015-04-14 15:48:00 -07006 select ARCH_HAS_ELF_RANDOMIZE
Riku Voipio957e3fa2014-12-12 16:57:44 -08007 select ARCH_HAS_GCOV_PROFILE_ALL
Laura Abbott308c09f2014-08-08 14:23:25 -07008 select ARCH_HAS_SG_CHAIN
Lorenzo Pieralisi1f850082013-09-04 10:55:17 +01009 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
Sudeep Hollac63c8702014-05-09 10:33:01 +010010 select ARCH_USE_CMPXCHG_LOCKREF
Peter Zijlstra4badad32014-06-06 19:53:16 +020011 select ARCH_SUPPORTS_ATOMIC_RMW
Arnd Bergmann91701002013-02-21 11:42:57 +010012 select ARCH_WANT_OPTIONAL_GPIOLIB
Will Deacon6212a512012-11-07 14:16:28 +000013 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
Catalin Marinasb6f35982013-01-29 18:25:41 +000014 select ARCH_WANT_FRAME_POINTERS
Catalin Marinas25c92a32012-12-18 15:26:13 +000015 select ARM_AMBA
Mark Rutland1aee5d72012-11-20 10:06:00 +000016 select ARM_ARCH_TIMER
Catalin Marinasc4188ed2013-01-14 12:39:31 +000017 select ARM_GIC
AKASHI Takahiro875cbf32014-07-04 08:28:30 +010018 select AUDIT_ARCH_COMPAT_GENERIC
Suravee Suthikulpanit853a33c2014-11-25 18:47:22 +000019 select ARM_GIC_V2M if PCI_MSI
Marc Zyngier021f6532014-06-30 16:01:31 +010020 select ARM_GIC_V3
Marc Zyngier19812722014-11-24 14:35:19 +000021 select ARM_GIC_V3_ITS if PCI_MSI
Will Deaconadace892013-05-08 17:29:24 +010022 select BUILDTIME_EXTABLE_SORT
Catalin Marinasdb2789b2012-12-18 15:27:25 +000023 select CLONE_BACKWARDS
Deepak Saxena7ca2ef32012-09-22 10:33:36 -070024 select COMMON_CLK
Lorenzo Pieralisi166936b2013-11-07 18:37:14 +000025 select CPU_PM if (SUSPEND || CPU_IDLE)
Will Deacon7bc13fd2013-11-06 19:32:13 +000026 select DCACHE_WORD_ACCESS
Laura Abbottd4932f92014-10-09 15:26:44 -070027 select GENERIC_ALLOCATOR
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010028 select GENERIC_CLOCKEVENTS
Lorenzo Pieralisi1f850082013-09-04 10:55:17 +010029 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
Ard Biesheuvel3be1a5c2014-03-04 01:10:04 +000030 select GENERIC_CPU_AUTOPROBE
Mark Salterbf4b5582014-04-07 15:39:52 -070031 select GENERIC_EARLY_IOREMAP
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010032 select GENERIC_IRQ_PROBE
33 select GENERIC_IRQ_SHOW
Sudeep Holla6544e672015-04-22 18:16:33 +010034 select GENERIC_IRQ_SHOW_LEVEL
Arnd Bergmanncb61f672014-11-19 14:09:07 +010035 select GENERIC_PCI_IOMAP
Stephen Boyd65cd4f62013-07-18 16:21:18 -070036 select GENERIC_SCHED_CLOCK
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010037 select GENERIC_SMP_IDLE_THREAD
Will Deacon12a0ef72013-11-06 17:20:22 +000038 select GENERIC_STRNCPY_FROM_USER
39 select GENERIC_STRNLEN_USER
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010040 select GENERIC_TIME_VSYSCALL
Marc Zyngiera1ddc742014-08-26 11:03:17 +010041 select HANDLE_DOMAIN_IRQ
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010042 select HARDIRQS_SW_RESEND
Steve Capper5284e1b2014-10-24 13:22:20 +010043 select HAVE_ALIGNED_STRUCT_PAGE if SLUB
AKASHI Takahiro875cbf32014-07-04 08:28:30 +010044 select HAVE_ARCH_AUDITSYSCALL
Yalin Wang8e7a4ce2014-11-03 03:02:23 +010045 select HAVE_ARCH_BITREVERSE
Jiang Liu9732caf2014-01-07 22:17:13 +080046 select HAVE_ARCH_JUMP_LABEL
Vijaya Kumar K95292472014-01-28 11:20:22 +000047 select HAVE_ARCH_KGDB
AKASHI Takahiroa1ae65b2014-11-28 05:26:39 +000048 select HAVE_ARCH_SECCOMP_FILTER
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010049 select HAVE_ARCH_TRACEHOOK
Zi Shen Lime54bcde2014-08-26 21:15:30 -070050 select HAVE_BPF_JIT
AKASHI Takahiroaf64d2a2014-04-30 10:54:32 +010051 select HAVE_C_RECORDMCOUNT
Laura Abbottc0c264a2014-06-25 23:55:03 +010052 select HAVE_CC_STACKPROTECTOR
Steve Capper5284e1b2014-10-24 13:22:20 +010053 select HAVE_CMPXCHG_DOUBLE
Catalin Marinas9b2a60c2012-10-08 16:28:13 -070054 select HAVE_DEBUG_BUGVERBOSE
Catalin Marinasb69ec422012-10-08 16:28:11 -070055 select HAVE_DEBUG_KMEMLEAK
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010056 select HAVE_DMA_API_DEBUG
57 select HAVE_DMA_ATTRS
Laura Abbott6ac21042013-12-12 19:28:33 +000058 select HAVE_DMA_CONTIGUOUS
AKASHI Takahirobd7d38d2014-04-30 10:54:34 +010059 select HAVE_DYNAMIC_FTRACE
Will Deacon50afc332013-12-16 17:50:08 +000060 select HAVE_EFFICIENT_UNALIGNED_ACCESS
AKASHI Takahiroaf64d2a2014-04-30 10:54:32 +010061 select HAVE_FTRACE_MCOUNT_RECORD
AKASHI Takahiro819e50e2014-04-30 18:54:33 +090062 select HAVE_FUNCTION_TRACER
63 select HAVE_FUNCTION_GRAPH_TRACER
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010064 select HAVE_GENERIC_DMA_COHERENT
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010065 select HAVE_HW_BREAKPOINT if PERF_EVENTS
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010066 select HAVE_MEMBLOCK
Mark Rutland55834a72014-02-07 17:12:45 +000067 select HAVE_PATA_PLATFORM
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010068 select HAVE_PERF_EVENTS
Jean Pihet2ee0d7f2014-02-03 19:18:27 +010069 select HAVE_PERF_REGS
70 select HAVE_PERF_USER_STACK_DUMP
Steve Capper5e5f6dc2014-10-09 15:29:23 -070071 select HAVE_RCU_TABLE_FREE
AKASHI Takahiro055b1212014-04-30 10:54:36 +010072 select HAVE_SYSCALL_TRACEPOINTS
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010073 select IRQ_DOMAIN
Catalin Marinasfea2aca2012-10-16 11:26:57 +010074 select MODULES_USE_ELF_RELA
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010075 select NO_BOOTMEM
76 select OF
77 select OF_EARLY_FLATTREE
Marek Szyprowski9bf14b72014-02-28 14:42:55 +010078 select OF_RESERVED_MEM
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010079 select PERF_USE_VMALLOC
Catalin Marinasaa1e8ec2013-02-28 18:14:37 +000080 select POWER_RESET
81 select POWER_SUPPLY
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010082 select RTC_LIB
83 select SPARSE_IRQ
Catalin Marinas7ac57a82012-10-08 16:28:16 -070084 select SYSCTL_EXCEPTION_TRACE
Larry Bassel6c81fe72014-05-30 12:34:15 -070085 select HAVE_CONTEXT_TRACKING
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010086 help
87 ARM 64-bit (AArch64) Linux support.
88
89config 64BIT
90 def_bool y
91
92config ARCH_PHYS_ADDR_T_64BIT
93 def_bool y
94
95config MMU
96 def_bool y
97
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -070098config NO_IOPORT_MAP
Liviu Dudaud1e6dc92014-09-29 15:29:31 +010099 def_bool y if !PCI
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100100
101config STACKTRACE_SUPPORT
102 def_bool y
103
104config LOCKDEP_SUPPORT
105 def_bool y
106
107config TRACE_IRQFLAGS_SUPPORT
108 def_bool y
109
Will Deaconc209f792014-03-14 17:47:05 +0000110config RWSEM_XCHGADD_ALGORITHM
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100111 def_bool y
112
113config GENERIC_HWEIGHT
114 def_bool y
115
116config GENERIC_CSUM
117 def_bool y
118
119config GENERIC_CALIBRATE_DELAY
120 def_bool y
121
Catalin Marinas19e76402014-02-27 12:09:22 +0000122config ZONE_DMA
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100123 def_bool y
124
Steve Capper29e56942014-10-09 15:29:25 -0700125config HAVE_GENERIC_RCU_GUP
126 def_bool y
127
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100128config ARCH_DMA_ADDR_T_64BIT
129 def_bool y
130
131config NEED_DMA_MAP_STATE
132 def_bool y
133
134config NEED_SG_DMA_LENGTH
135 def_bool y
136
137config SWIOTLB
138 def_bool y
139
140config IOMMU_HELPER
141 def_bool SWIOTLB
142
Ard Biesheuvel4cfb3612013-07-09 14:18:12 +0100143config KERNEL_MODE_NEON
144 def_bool y
145
Rob Herring92cc15f2014-04-18 17:19:59 -0500146config FIX_EARLYCON_MEM
147 def_bool y
148
Kirill A. Shutemov9f25e6a2015-04-14 15:45:39 -0700149config PGTABLE_LEVELS
150 int
151 default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
152 default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
153 default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
154 default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
155
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100156source "init/Kconfig"
157
158source "kernel/Kconfig.freezer"
159
Catalin Marinas1ae90e72012-09-05 17:47:44 +0100160menu "Platform selection"
161
Alim Akhtar6f56eef2014-11-22 22:41:52 +0900162config ARCH_EXYNOS
163 bool
164 help
165 This enables support for Samsung Exynos SoC family
166
167config ARCH_EXYNOS7
168 bool "ARMv8 based Samsung Exynos7"
169 select ARCH_EXYNOS
170 select COMMON_CLK_SAMSUNG
171 select HAVE_S3C2410_WATCHDOG if WATCHDOG
172 select HAVE_S3C_RTC if RTC_CLASS
173 select PINCTRL
174 select PINCTRL_EXYNOS
175
176 help
177 This enables support for Samsung Exynos7 SoC family
178
Olof Johansson5118a6a2015-01-27 16:19:11 -0800179config ARCH_FSL_LS2085A
180 bool "Freescale LS2085A SOC"
181 help
182 This enables support for Freescale LS2085A SOC.
183
Eddie Huang4727a6f2015-12-01 10:14:00 +0100184config ARCH_MEDIATEK
185 bool "Mediatek MT65xx & MT81xx ARMv8 SoC"
186 select ARM_GIC
Yingjoe Chen0a233cd2015-03-06 14:24:50 +0800187 select PINCTRL
Eddie Huang4727a6f2015-12-01 10:14:00 +0100188 help
189 Support for Mediatek MT65xx & MT81xx ARMv8 SoCs
190
Abhimanyu Kapurd7f64a42013-10-15 21:11:09 -0700191config ARCH_QCOM
192 bool "Qualcomm Platforms"
193 select PINCTRL
194 help
195 This enables support for the ARMv8 based Qualcomm chipsets.
196
Suravee Suthikulpanit41904362014-11-26 11:51:09 +0700197config ARCH_SEATTLE
198 bool "AMD Seattle SoC Family"
199 help
200 This enables support for AMD Seattle SOC Family
201
Paul Walmsleyd035fdf2015-01-07 01:17:33 -0700202config ARCH_TEGRA
203 bool "NVIDIA Tegra SoC Family"
204 select ARCH_HAS_RESET_CONTROLLER
205 select ARCH_REQUIRE_GPIOLIB
206 select CLKDEV_LOOKUP
207 select CLKSRC_MMIO
208 select CLKSRC_OF
209 select GENERIC_CLOCKEVENTS
210 select HAVE_CLK
Paul Walmsleyd035fdf2015-01-07 01:17:33 -0700211 select PINCTRL
212 select RESET_CONTROLLER
213 help
214 This enables support for the NVIDIA Tegra SoC family.
215
216config ARCH_TEGRA_132_SOC
217 bool "NVIDIA Tegra132 SoC"
218 depends on ARCH_TEGRA
219 select PINCTRL_TEGRA124
Paul Walmsleyd035fdf2015-01-07 01:17:33 -0700220 select USB_ULPI if USB_PHY
221 select USB_ULPI_VIEWPORT if USB_PHY
222 help
223 Enable support for NVIDIA Tegra132 SoC, based on the Denver
224 ARMv8 CPU. The Tegra132 SoC is similar to the Tegra124 SoC,
225 but contains an NVIDIA Denver CPU complex in place of
226 Tegra124's "4+1" Cortex-A15 CPU complex.
227
Zhizhou Zhangc4bb7992015-03-11 02:27:08 +0000228config ARCH_SPRD
229 bool "Spreadtrum SoC platform"
230 help
231 Support for Spreadtrum ARM based SoCs
232
Radha Mohan Chintakuntla28f74202014-04-08 18:47:51 +0530233config ARCH_THUNDER
234 bool "Cavium Inc. Thunder SoC Family"
235 help
236 This enables support for Cavium's Thunder Family of SoCs.
237
Catalin Marinas1ae90e72012-09-05 17:47:44 +0100238config ARCH_VEXPRESS
239 bool "ARMv8 software model (Versatile Express)"
240 select ARCH_REQUIRE_GPIOLIB
241 select COMMON_CLK_VERSATILE
Catalin Marinasaa1e8ec2013-02-28 18:14:37 +0000242 select POWER_RESET_VEXPRESS
Catalin Marinas1ae90e72012-09-05 17:47:44 +0100243 select VEXPRESS_CONFIG
244 help
245 This enables support for the ARMv8 software model (Versatile
246 Express).
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100247
Vinayak Kale15942852013-04-24 10:06:57 +0100248config ARCH_XGENE
249 bool "AppliedMicro X-Gene SOC Family"
250 help
251 This enables support for AppliedMicro X-Gene SOC Family
252
Michal Simek5d1b79d2015-03-09 09:41:04 +0100253config ARCH_ZYNQMP
254 bool "Xilinx ZynqMP Family"
255 help
256 This enables support for Xilinx ZynqMP Family
257
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100258endmenu
259
260menu "Bus support"
261
Liviu Dudaud1e6dc92014-09-29 15:29:31 +0100262config PCI
263 bool "PCI support"
264 help
265 This feature enables support for PCI bus system. If you say Y
266 here, the kernel will include drivers and infrastructure code
267 to support PCI bus devices.
268
269config PCI_DOMAINS
270 def_bool PCI
271
272config PCI_DOMAINS_GENERIC
273 def_bool PCI
274
275config PCI_SYSCALL
276 def_bool PCI
277
278source "drivers/pci/Kconfig"
279source "drivers/pci/pcie/Kconfig"
280source "drivers/pci/hotplug/Kconfig"
281
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100282endmenu
283
284menu "Kernel Features"
285
Andre Przywarac0a01b82014-11-14 15:54:12 +0000286menu "ARM errata workarounds via the alternatives framework"
287
288config ARM64_ERRATUM_826319
289 bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
290 default y
291 help
292 This option adds an alternative code sequence to work around ARM
293 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
294 AXI master interface and an L2 cache.
295
296 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
297 and is unable to accept a certain write via this interface, it will
298 not progress on read data presented on the read data channel and the
299 system can deadlock.
300
301 The workaround promotes data cache clean instructions to
302 data cache clean-and-invalidate.
303 Please note that this does not necessarily enable the workaround,
304 as it depends on the alternative framework, which will only patch
305 the kernel if an affected CPU is detected.
306
307 If unsure, say Y.
308
309config ARM64_ERRATUM_827319
310 bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
311 default y
312 help
313 This option adds an alternative code sequence to work around ARM
314 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
315 master interface and an L2 cache.
316
317 Under certain conditions this erratum can cause a clean line eviction
318 to occur at the same time as another transaction to the same address
319 on the AMBA 5 CHI interface, which can cause data corruption if the
320 interconnect reorders the two transactions.
321
322 The workaround promotes data cache clean instructions to
323 data cache clean-and-invalidate.
324 Please note that this does not necessarily enable the workaround,
325 as it depends on the alternative framework, which will only patch
326 the kernel if an affected CPU is detected.
327
328 If unsure, say Y.
329
330config ARM64_ERRATUM_824069
331 bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
332 default y
333 help
334 This option adds an alternative code sequence to work around ARM
335 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
336 to a coherent interconnect.
337
338 If a Cortex-A53 processor is executing a store or prefetch for
339 write instruction at the same time as a processor in another
340 cluster is executing a cache maintenance operation to the same
341 address, then this erratum might cause a clean cache line to be
342 incorrectly marked as dirty.
343
344 The workaround promotes data cache clean instructions to
345 data cache clean-and-invalidate.
346 Please note that this option does not necessarily enable the
347 workaround, as it depends on the alternative framework, which will
348 only patch the kernel if an affected CPU is detected.
349
350 If unsure, say Y.
351
352config ARM64_ERRATUM_819472
353 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
354 default y
355 help
356 This option adds an alternative code sequence to work around ARM
357 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
358 present when it is connected to a coherent interconnect.
359
360 If the processor is executing a load and store exclusive sequence at
361 the same time as a processor in another cluster is executing a cache
362 maintenance operation to the same address, then this erratum might
363 cause data corruption.
364
365 The workaround promotes data cache clean instructions to
366 data cache clean-and-invalidate.
367 Please note that this does not necessarily enable the workaround,
368 as it depends on the alternative framework, which will only patch
369 the kernel if an affected CPU is detected.
370
371 If unsure, say Y.
372
373config ARM64_ERRATUM_832075
374 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
375 default y
376 help
377 This option adds an alternative code sequence to work around ARM
378 erratum 832075 on Cortex-A57 parts up to r1p2.
379
380 Affected Cortex-A57 parts might deadlock when exclusive load/store
381 instructions to Write-Back memory are mixed with Device loads.
382
383 The workaround is to promote device loads to use Load-Acquire
384 semantics.
385 Please note that this does not necessarily enable the workaround,
386 as it depends on the alternative framework, which will only patch
387 the kernel if an affected CPU is detected.
388
389 If unsure, say Y.
390
Will Deacon905e8c52015-03-23 19:07:02 +0000391config ARM64_ERRATUM_845719
392 bool "Cortex-A53: 845719: a load might read incorrect data"
393 depends on COMPAT
394 default y
395 help
396 This option adds an alternative code sequence to work around ARM
397 erratum 845719 on Cortex-A53 parts up to r0p4.
398
399 When running a compat (AArch32) userspace on an affected Cortex-A53
400 part, a load at EL0 from a virtual address that matches the bottom 32
401 bits of the virtual address used by a recent load at (AArch64) EL1
402 might return incorrect data.
403
404 The workaround is to write the contextidr_el1 register on exception
405 return to a 32-bit task.
406 Please note that this does not necessarily enable the workaround,
407 as it depends on the alternative framework, which will only patch
408 the kernel if an affected CPU is detected.
409
410 If unsure, say Y.
411
Andre Przywarac0a01b82014-11-14 15:54:12 +0000412endmenu
413
414
Jungseok Leee41ceed2014-05-12 10:40:38 +0100415choice
416 prompt "Page size"
417 default ARM64_4K_PAGES
418 help
419 Page size (translation granule) configuration.
420
421config ARM64_4K_PAGES
422 bool "4KB"
423 help
424 This feature enables 4KB pages support.
425
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100426config ARM64_64K_PAGES
Jungseok Leee41ceed2014-05-12 10:40:38 +0100427 bool "64KB"
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100428 help
429 This feature enables 64KB pages support (4KB by default)
430 allowing only two levels of page tables and faster TLB
431 look-up. AArch32 emulation is not available when this feature
432 is enabled.
433
Jungseok Leee41ceed2014-05-12 10:40:38 +0100434endchoice
435
436choice
437 prompt "Virtual address space size"
438 default ARM64_VA_BITS_39 if ARM64_4K_PAGES
439 default ARM64_VA_BITS_42 if ARM64_64K_PAGES
440 help
441 Allows choosing one of multiple possible virtual address
442 space sizes. The level of translation table is determined by
443 a combination of page size and virtual address space size.
444
445config ARM64_VA_BITS_39
446 bool "39-bit"
447 depends on ARM64_4K_PAGES
448
449config ARM64_VA_BITS_42
450 bool "42-bit"
451 depends on ARM64_64K_PAGES
452
Jungseok Leec79b9542014-05-12 18:40:51 +0900453config ARM64_VA_BITS_48
454 bool "48-bit"
Jungseok Leec79b9542014-05-12 18:40:51 +0900455
Jungseok Leee41ceed2014-05-12 10:40:38 +0100456endchoice
457
458config ARM64_VA_BITS
459 int
460 default 39 if ARM64_VA_BITS_39
461 default 42 if ARM64_VA_BITS_42
Jungseok Leec79b9542014-05-12 18:40:51 +0900462 default 48 if ARM64_VA_BITS_48
Jungseok Leee41ceed2014-05-12 10:40:38 +0100463
Will Deacona8720132013-10-11 14:52:19 +0100464config CPU_BIG_ENDIAN
465 bool "Build big-endian kernel"
466 help
467 Say Y if you plan on running a kernel in big-endian mode.
468
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100469config SMP
470 bool "Symmetric Multi-Processing"
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100471 help
472 This enables support for systems with more than one CPU. If
473 you say N here, the kernel will run on single and
474 multiprocessor machines, but will use only one CPU of a
475 multiprocessor machine. If you say Y here, the kernel will run
476 on many, but not all, single processor machines. On a single
477 processor machine, the kernel will run faster if you say N
478 here.
479
480 If you don't know what to do here, say N.
481
Mark Brownf6e763b2014-03-04 07:51:17 +0000482config SCHED_MC
483 bool "Multi-core scheduler support"
484 depends on SMP
485 help
486 Multi-core scheduler support improves the CPU scheduler's decision
487 making when dealing with multi-core CPU chips at a cost of slightly
488 increased overhead in some places. If unsure say N here.
489
490config SCHED_SMT
491 bool "SMT scheduler support"
492 depends on SMP
493 help
494 Improves the CPU scheduler's decision making when dealing with
495 MultiThreading at a cost of slightly increased overhead in some
496 places. If unsure say N here.
497
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100498config NR_CPUS
Ganapatrao Kulkarni62aa9652015-03-18 11:01:18 +0000499 int "Maximum number of CPUs (2-4096)"
500 range 2 4096
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100501 depends on SMP
Vinayak Kale15942852013-04-24 10:06:57 +0100502 # These have to remain sorted largest to smallest
Robert Richtere3672642014-09-08 12:44:48 +0100503 default "64"
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100504
Mark Rutland9327e2c2013-10-24 20:30:18 +0100505config HOTPLUG_CPU
506 bool "Support for hot-pluggable CPUs"
507 depends on SMP
508 help
509 Say Y here to experiment with turning CPUs off and on. CPUs
510 can be controlled through /sys/devices/system/cpu.
511
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100512source kernel/Kconfig.preempt
513
Mark Rutland137650aa2015-03-13 16:14:34 +0000514config UP_LATE_INIT
515 def_bool y
516 depends on !SMP
517
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100518config HZ
519 int
520 default 100
521
522config ARCH_HAS_HOLES_MEMORYMODEL
523 def_bool y if SPARSEMEM
524
525config ARCH_SPARSEMEM_ENABLE
526 def_bool y
527 select SPARSEMEM_VMEMMAP_ENABLE
528
529config ARCH_SPARSEMEM_DEFAULT
530 def_bool ARCH_SPARSEMEM_ENABLE
531
532config ARCH_SELECT_MEMORY_MODEL
533 def_bool ARCH_SPARSEMEM_ENABLE
534
535config HAVE_ARCH_PFN_VALID
536 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
537
538config HW_PERF_EVENTS
539 bool "Enable hardware performance counter support for perf events"
540 depends on PERF_EVENTS
541 default y
542 help
543 Enable hardware performance counter support for perf events. If
544 disabled, perf events will use software events only.
545
Steve Capper084bd292013-04-10 13:48:00 +0100546config SYS_SUPPORTS_HUGETLBFS
547 def_bool y
548
549config ARCH_WANT_GENERAL_HUGETLB
550 def_bool y
551
552config ARCH_WANT_HUGE_PMD_SHARE
553 def_bool y if !ARM64_64K_PAGES
554
Steve Capperaf074842013-04-19 16:23:57 +0100555config HAVE_ARCH_TRANSPARENT_HUGEPAGE
556 def_bool y
557
Catalin Marinasa41dc0e2014-04-03 17:48:54 +0100558config ARCH_HAS_CACHE_LINE_SIZE
559 def_bool y
560
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100561source "mm/Kconfig"
562
AKASHI Takahiroa1ae65b2014-11-28 05:26:39 +0000563config SECCOMP
564 bool "Enable seccomp to safely compute untrusted bytecode"
565 ---help---
566 This kernel feature is useful for number crunching applications
567 that may need to compute untrusted bytecode during their
568 execution. By using pipes or other transports made available to
569 the process as file descriptors supporting the read/write
570 syscalls, it's possible to isolate those applications in
571 their own address space using seccomp. Once seccomp is
572 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
573 and the task is only allowed to execute a few safe syscalls
574 defined by each seccomp mode.
575
Stefano Stabelliniaa42aa12013-06-03 17:05:43 +0000576config XEN_DOM0
577 def_bool y
578 depends on XEN
579
580config XEN
Julien Grallc2ba1f72014-09-17 14:07:06 -0700581 bool "Xen guest support on ARM64"
Stefano Stabelliniaa42aa12013-06-03 17:05:43 +0000582 depends on ARM64 && OF
Stefano Stabellini83862cc2013-10-10 13:40:44 +0000583 select SWIOTLB_XEN
Stefano Stabelliniaa42aa12013-06-03 17:05:43 +0000584 help
585 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
586
Steve Capperd03bb142013-04-25 15:19:21 +0100587config FORCE_MAX_ZONEORDER
588 int
589 default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
590 default "11"
591
Will Deacon1b907f42014-11-20 16:51:10 +0000592menuconfig ARMV8_DEPRECATED
593 bool "Emulate deprecated/obsolete ARMv8 instructions"
594 depends on COMPAT
595 help
596 Legacy software support may require certain instructions
597 that have been deprecated or obsoleted in the architecture.
598
599 Enable this config to enable selective emulation of these
600 features.
601
602 If unsure, say Y
603
604if ARMV8_DEPRECATED
605
606config SWP_EMULATION
607 bool "Emulate SWP/SWPB instructions"
608 help
609 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
610 they are always undefined. Say Y here to enable software
611 emulation of these instructions for userspace using LDXR/STXR.
612
613 In some older versions of glibc [<=2.8] SWP is used during futex
614 trylock() operations with the assumption that the code will not
615 be preempted. This invalid assumption may be more likely to fail
616 with SWP emulation enabled, leading to deadlock of the user
617 application.
618
619 NOTE: when accessing uncached shared regions, LDXR/STXR rely
620 on an external transaction monitoring block called a global
621 monitor to maintain update atomicity. If your system does not
622 implement a global monitor, this option can cause programs that
623 perform SWP operations to uncached memory to deadlock.
624
625 If unsure, say Y
626
627config CP15_BARRIER_EMULATION
628 bool "Emulate CP15 Barrier instructions"
629 help
630 The CP15 barrier instructions - CP15ISB, CP15DSB, and
631 CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
632 strongly recommended to use the ISB, DSB, and DMB
633 instructions instead.
634
635 Say Y here to enable software emulation of these
636 instructions for AArch32 userspace code. When this option is
637 enabled, CP15 barrier usage is traced which can help
638 identify software that needs updating.
639
640 If unsure, say Y
641
Suzuki K. Poulose2d888f42015-01-21 12:43:11 +0000642config SETEND_EMULATION
643 bool "Emulate SETEND instruction"
644 help
645 The SETEND instruction alters the data-endianness of the
646 AArch32 EL0, and is deprecated in ARMv8.
647
648 Say Y here to enable software emulation of the instruction
649 for AArch32 userspace code.
650
651 Note: All the cpus on the system must have mixed endian support at EL0
652 for this feature to be enabled. If a new CPU - which doesn't support mixed
653 endian - is hotplugged in after this feature has been enabled, there could
654 be unexpected results in the applications.
655
656 If unsure, say Y
Will Deacon1b907f42014-11-20 16:51:10 +0000657endif
658
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100659endmenu
660
661menu "Boot options"
662
663config CMDLINE
664 string "Default kernel command string"
665 default ""
666 help
667 Provide a set of default command-line options at build time by
668 entering them here. As a minimum, you should specify the the
669 root device (e.g. root=/dev/nfs).
670
671config CMDLINE_FORCE
672 bool "Always use the default kernel command string"
673 help
674 Always use the default kernel command string, even if the boot
675 loader passes other arguments to the kernel.
676 This is useful if you cannot or don't want to change the
677 command-line options your boot loader passes to the kernel.
678
Ard Biesheuvelf4f75ad52014-07-02 14:54:43 +0200679config EFI_STUB
680 bool
681
Mark Salterf84d0272014-04-15 21:59:30 -0400682config EFI
683 bool "UEFI runtime support"
684 depends on OF && !CPU_BIG_ENDIAN
685 select LIBFDT
686 select UCS2_STRING
687 select EFI_PARAMS_FROM_FDT
Ard Biesheuvele15dd492014-07-04 19:41:53 +0200688 select EFI_RUNTIME_WRAPPERS
Ard Biesheuvelf4f75ad52014-07-02 14:54:43 +0200689 select EFI_STUB
690 select EFI_ARMSTUB
Mark Salterf84d0272014-04-15 21:59:30 -0400691 default y
692 help
693 This option provides support for runtime services provided
694 by UEFI firmware (such as non-volatile variables, realtime
Mark Salter3c7f2552014-04-15 22:47:52 -0400695 clock, and platform reset). A UEFI stub is also provided to
696 allow the kernel to be booted as an EFI application. This
697 is only useful on systems that have UEFI firmware.
Mark Salterf84d0272014-04-15 21:59:30 -0400698
Yi Lid1ae8c02014-10-04 23:46:43 +0800699config DMI
700 bool "Enable support for SMBIOS (DMI) tables"
701 depends on EFI
702 default y
703 help
704 This enables SMBIOS/DMI feature for systems.
705
706 This option is only useful on systems that have UEFI firmware.
707 However, even with this option, the resultant kernel should
708 continue to boot on existing non-UEFI platforms.
709
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100710endmenu
711
712menu "Userspace binary formats"
713
714source "fs/Kconfig.binfmt"
715
716config COMPAT
717 bool "Kernel support for 32-bit EL0"
Alexander Grafa8fcd8b2015-03-16 16:32:23 +0000718 depends on !ARM64_64K_PAGES || EXPERT
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100719 select COMPAT_BINFMT_ELF
Catalin Marinasaf1839e2012-10-08 16:28:08 -0700720 select HAVE_UID16
Al Viro84b9e9b2012-12-25 16:29:11 -0500721 select OLD_SIGSUSPEND3
Al Viro51682032012-12-25 19:31:29 -0500722 select COMPAT_OLD_SIGACTION
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100723 help
724 This option enables support for a 32-bit EL0 running under a 64-bit
725 kernel at EL1. AArch32-specific components such as system calls,
726 the user helper functions, VFP support and the ptrace interface are
727 handled appropriately by the kernel.
728
Alexander Grafa8fcd8b2015-03-16 16:32:23 +0000729 If you also enabled CONFIG_ARM64_64K_PAGES, please be aware that you
730 will only be able to execute AArch32 binaries that were compiled with
731 64k aligned segments.
732
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100733 If you want to execute 32-bit userspace applications, say Y.
734
735config SYSVIPC_COMPAT
736 def_bool y
737 depends on COMPAT && SYSVIPC
738
739endmenu
740
Lorenzo Pieralisi166936b2013-11-07 18:37:14 +0000741menu "Power management options"
742
743source "kernel/power/Kconfig"
744
745config ARCH_SUSPEND_POSSIBLE
746 def_bool y
747
Lorenzo Pieralisi166936b2013-11-07 18:37:14 +0000748endmenu
749
Lorenzo Pieralisi13072202013-07-17 14:54:21 +0100750menu "CPU Power Management"
751
752source "drivers/cpuidle/Kconfig"
753
Rob Herring52e7e812014-02-24 11:27:57 +0900754source "drivers/cpufreq/Kconfig"
755
756endmenu
757
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100758source "net/Kconfig"
759
760source "drivers/Kconfig"
761
Mark Salterf84d0272014-04-15 21:59:30 -0400762source "drivers/firmware/Kconfig"
763
Graeme Gregoryb6a02172015-03-24 14:02:53 +0000764source "drivers/acpi/Kconfig"
765
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100766source "fs/Kconfig"
767
Marc Zyngierc3eb5b12013-07-04 13:34:32 +0100768source "arch/arm64/kvm/Kconfig"
769
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100770source "arch/arm64/Kconfig.debug"
771
772source "security/Kconfig"
773
774source "crypto/Kconfig"
Ard Biesheuvel2c988332014-03-06 16:23:33 +0800775if CRYPTO
776source "arch/arm64/crypto/Kconfig"
777endif
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100778
779source "lib/Kconfig"