blob: e36149d578fa2734bf31d505d2b543ec19fe798a [file] [log] [blame]
Chris Wilson1d8e1c72010-08-07 11:01:28 +01001/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
Joe Perchesa70491c2012-03-18 13:00:11 -070031#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
Carsten Emde7bd90902012-03-15 15:56:25 +010033#include <linux/moduleparam.h>
Chris Wilson1d8e1c72010-08-07 11:01:28 +010034#include "intel_drv.h"
35
Takashi Iwaiba3820a2011-03-10 14:02:12 +010036#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
37
Chris Wilson1d8e1c72010-08-07 11:01:28 +010038void
Ville Syrjälä4c6df4b2013-09-02 21:13:39 +030039intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
Chris Wilson1d8e1c72010-08-07 11:01:28 +010040 struct drm_display_mode *adjusted_mode)
41{
Ville Syrjälä4c6df4b2013-09-02 21:13:39 +030042 drm_mode_copy(adjusted_mode, fixed_mode);
Imre Deaka52690e2013-08-27 12:24:09 +030043
44 drm_mode_set_crtcinfo(adjusted_mode, 0);
Chris Wilson1d8e1c72010-08-07 11:01:28 +010045}
46
47/* adjusted_mode has been preset to be the panel's fixed mode */
48void
Jesse Barnesb074cec2013-04-25 12:55:02 -070049intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
50 struct intel_crtc_config *pipe_config,
51 int fitting_mode)
Chris Wilson1d8e1c72010-08-07 11:01:28 +010052{
Ville Syrjälä37327ab2013-09-04 18:25:28 +030053 struct drm_display_mode *adjusted_mode;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010054 int x, y, width, height;
55
Jesse Barnesb074cec2013-04-25 12:55:02 -070056 adjusted_mode = &pipe_config->adjusted_mode;
57
Chris Wilson1d8e1c72010-08-07 11:01:28 +010058 x = y = width = height = 0;
59
60 /* Native modes don't need fitting */
Ville Syrjälä37327ab2013-09-04 18:25:28 +030061 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
62 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
Chris Wilson1d8e1c72010-08-07 11:01:28 +010063 goto done;
64
65 switch (fitting_mode) {
66 case DRM_MODE_SCALE_CENTER:
Ville Syrjälä37327ab2013-09-04 18:25:28 +030067 width = pipe_config->pipe_src_w;
68 height = pipe_config->pipe_src_h;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010069 x = (adjusted_mode->hdisplay - width + 1)/2;
70 y = (adjusted_mode->vdisplay - height + 1)/2;
71 break;
72
73 case DRM_MODE_SCALE_ASPECT:
74 /* Scale but preserve the aspect ratio */
75 {
Daniel Vetter9084e7d2013-09-16 23:43:45 +020076 u32 scaled_width = adjusted_mode->hdisplay
77 * pipe_config->pipe_src_h;
78 u32 scaled_height = pipe_config->pipe_src_w
79 * adjusted_mode->vdisplay;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010080 if (scaled_width > scaled_height) { /* pillar */
Ville Syrjälä37327ab2013-09-04 18:25:28 +030081 width = scaled_height / pipe_config->pipe_src_h;
Adam Jackson302983e2011-07-13 16:32:32 -040082 if (width & 1)
Akshay Joshi0206e352011-08-16 15:34:10 -040083 width++;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010084 x = (adjusted_mode->hdisplay - width + 1) / 2;
85 y = 0;
86 height = adjusted_mode->vdisplay;
87 } else if (scaled_width < scaled_height) { /* letter */
Ville Syrjälä37327ab2013-09-04 18:25:28 +030088 height = scaled_width / pipe_config->pipe_src_w;
Adam Jackson302983e2011-07-13 16:32:32 -040089 if (height & 1)
90 height++;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010091 y = (adjusted_mode->vdisplay - height + 1) / 2;
92 x = 0;
93 width = adjusted_mode->hdisplay;
94 } else {
95 x = y = 0;
96 width = adjusted_mode->hdisplay;
97 height = adjusted_mode->vdisplay;
98 }
99 }
100 break;
101
Chris Wilson1d8e1c72010-08-07 11:01:28 +0100102 case DRM_MODE_SCALE_FULLSCREEN:
103 x = y = 0;
104 width = adjusted_mode->hdisplay;
105 height = adjusted_mode->vdisplay;
106 break;
Jesse Barnesab3e67f2013-04-25 12:55:03 -0700107
108 default:
109 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
110 return;
Chris Wilson1d8e1c72010-08-07 11:01:28 +0100111 }
112
113done:
Jesse Barnesb074cec2013-04-25 12:55:02 -0700114 pipe_config->pch_pfit.pos = (x << 16) | y;
115 pipe_config->pch_pfit.size = (width << 16) | height;
Chris Wilson1d8e1c72010-08-07 11:01:28 +0100116}
Chris Wilsona9573552010-08-22 13:18:16 +0100117
Jesse Barnes2dd24552013-04-25 12:55:01 -0700118static void
119centre_horizontally(struct drm_display_mode *mode,
120 int width)
121{
122 u32 border, sync_pos, blank_width, sync_width;
123
124 /* keep the hsync and hblank widths constant */
125 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
126 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
127 sync_pos = (blank_width - sync_width + 1) / 2;
128
129 border = (mode->hdisplay - width + 1) / 2;
130 border += border & 1; /* make the border even */
131
132 mode->crtc_hdisplay = width;
133 mode->crtc_hblank_start = width + border;
134 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
135
136 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
137 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
138}
139
140static void
141centre_vertically(struct drm_display_mode *mode,
142 int height)
143{
144 u32 border, sync_pos, blank_width, sync_width;
145
146 /* keep the vsync and vblank widths constant */
147 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
148 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
149 sync_pos = (blank_width - sync_width + 1) / 2;
150
151 border = (mode->vdisplay - height + 1) / 2;
152
153 mode->crtc_vdisplay = height;
154 mode->crtc_vblank_start = height + border;
155 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
156
157 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
158 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
159}
160
161static inline u32 panel_fitter_scaling(u32 source, u32 target)
162{
163 /*
164 * Floating point operation is not supported. So the FACTOR
165 * is defined, which can avoid the floating point computation
166 * when calculating the panel ratio.
167 */
168#define ACCURACY 12
169#define FACTOR (1 << ACCURACY)
170 u32 ratio = source * FACTOR / target;
171 return (FACTOR * ratio + FACTOR/2) / FACTOR;
172}
173
Daniel Vetter9084e7d2013-09-16 23:43:45 +0200174static void i965_scale_aspect(struct intel_crtc_config *pipe_config,
175 u32 *pfit_control)
176{
177 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
178 u32 scaled_width = adjusted_mode->hdisplay *
179 pipe_config->pipe_src_h;
180 u32 scaled_height = pipe_config->pipe_src_w *
181 adjusted_mode->vdisplay;
182
183 /* 965+ is easy, it does everything in hw */
184 if (scaled_width > scaled_height)
185 *pfit_control |= PFIT_ENABLE |
186 PFIT_SCALING_PILLAR;
187 else if (scaled_width < scaled_height)
188 *pfit_control |= PFIT_ENABLE |
189 PFIT_SCALING_LETTER;
190 else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
191 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
192}
193
194static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config,
195 u32 *pfit_control, u32 *pfit_pgm_ratios,
196 u32 *border)
197{
198 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
199 u32 scaled_width = adjusted_mode->hdisplay *
200 pipe_config->pipe_src_h;
201 u32 scaled_height = pipe_config->pipe_src_w *
202 adjusted_mode->vdisplay;
203 u32 bits;
204
205 /*
206 * For earlier chips we have to calculate the scaling
207 * ratio by hand and program it into the
208 * PFIT_PGM_RATIO register
209 */
210 if (scaled_width > scaled_height) { /* pillar */
211 centre_horizontally(adjusted_mode,
212 scaled_height /
213 pipe_config->pipe_src_h);
214
215 *border = LVDS_BORDER_ENABLE;
216 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
217 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
218 adjusted_mode->vdisplay);
219
220 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
221 bits << PFIT_VERT_SCALE_SHIFT);
222 *pfit_control |= (PFIT_ENABLE |
223 VERT_INTERP_BILINEAR |
224 HORIZ_INTERP_BILINEAR);
225 }
226 } else if (scaled_width < scaled_height) { /* letter */
227 centre_vertically(adjusted_mode,
228 scaled_width /
229 pipe_config->pipe_src_w);
230
231 *border = LVDS_BORDER_ENABLE;
232 if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
233 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
234 adjusted_mode->hdisplay);
235
236 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
237 bits << PFIT_VERT_SCALE_SHIFT);
238 *pfit_control |= (PFIT_ENABLE |
239 VERT_INTERP_BILINEAR |
240 HORIZ_INTERP_BILINEAR);
241 }
242 } else {
243 /* Aspects match, Let hw scale both directions */
244 *pfit_control |= (PFIT_ENABLE |
245 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
246 VERT_INTERP_BILINEAR |
247 HORIZ_INTERP_BILINEAR);
248 }
249}
250
Jesse Barnes2dd24552013-04-25 12:55:01 -0700251void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
252 struct intel_crtc_config *pipe_config,
253 int fitting_mode)
254{
255 struct drm_device *dev = intel_crtc->base.dev;
Jesse Barnes2dd24552013-04-25 12:55:01 -0700256 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300257 struct drm_display_mode *adjusted_mode;
Jesse Barnes2dd24552013-04-25 12:55:01 -0700258
Jesse Barnes2dd24552013-04-25 12:55:01 -0700259 adjusted_mode = &pipe_config->adjusted_mode;
260
261 /* Native modes don't need fitting */
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300262 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
263 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
Jesse Barnes2dd24552013-04-25 12:55:01 -0700264 goto out;
265
266 switch (fitting_mode) {
267 case DRM_MODE_SCALE_CENTER:
268 /*
269 * For centered modes, we have to calculate border widths &
270 * heights and modify the values programmed into the CRTC.
271 */
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300272 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
273 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
Jesse Barnes2dd24552013-04-25 12:55:01 -0700274 border = LVDS_BORDER_ENABLE;
275 break;
276 case DRM_MODE_SCALE_ASPECT:
277 /* Scale but preserve the aspect ratio */
Daniel Vetter9084e7d2013-09-16 23:43:45 +0200278 if (INTEL_INFO(dev)->gen >= 4)
279 i965_scale_aspect(pipe_config, &pfit_control);
280 else
281 i9xx_scale_aspect(pipe_config, &pfit_control,
282 &pfit_pgm_ratios, &border);
Jesse Barnes2dd24552013-04-25 12:55:01 -0700283 break;
Jesse Barnes2dd24552013-04-25 12:55:01 -0700284 case DRM_MODE_SCALE_FULLSCREEN:
285 /*
286 * Full scaling, even if it changes the aspect ratio.
287 * Fortunately this is all done for us in hw.
288 */
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300289 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay ||
290 pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
Jesse Barnes2dd24552013-04-25 12:55:01 -0700291 pfit_control |= PFIT_ENABLE;
292 if (INTEL_INFO(dev)->gen >= 4)
293 pfit_control |= PFIT_SCALING_AUTO;
294 else
295 pfit_control |= (VERT_AUTO_SCALE |
296 VERT_INTERP_BILINEAR |
297 HORIZ_AUTO_SCALE |
298 HORIZ_INTERP_BILINEAR);
299 }
300 break;
Jesse Barnesab3e67f2013-04-25 12:55:03 -0700301 default:
302 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
303 return;
Jesse Barnes2dd24552013-04-25 12:55:01 -0700304 }
305
306 /* 965+ wants fuzzy fitting */
307 /* FIXME: handle multiple panels by failing gracefully */
308 if (INTEL_INFO(dev)->gen >= 4)
309 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
310 PFIT_FILTER_FUZZY);
311
312out:
313 if ((pfit_control & PFIT_ENABLE) == 0) {
314 pfit_control = 0;
315 pfit_pgm_ratios = 0;
316 }
317
318 /* Make sure pre-965 set dither correctly for 18bpp panels. */
319 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
320 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
321
Daniel Vetter2deefda2013-04-25 22:52:17 +0200322 pipe_config->gmch_pfit.control = pfit_control;
323 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
Daniel Vetter68fc8742013-04-25 22:52:16 +0200324 pipe_config->gmch_pfit.lvds_border_bits = border;
Jesse Barnes2dd24552013-04-25 12:55:01 -0700325}
326
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100327static int is_backlight_combination_mode(struct drm_device *dev)
328{
329 struct drm_i915_private *dev_priv = dev->dev_private;
330
331 if (INTEL_INFO(dev)->gen >= 4)
332 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
333
334 if (IS_GEN2(dev))
335 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
336
337 return 0;
338}
339
Jani Nikulad6540632013-04-12 15:18:36 +0300340/* XXX: query mode clock or hardware clock and program max PWM appropriately
341 * when it's 0.
342 */
Jani Nikulabfd75902012-12-04 16:36:28 +0200343static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
Chris Wilson0b0b0532010-11-23 09:45:50 +0000344{
Jani Nikulabfd75902012-12-04 16:36:28 +0200345 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson0b0b0532010-11-23 09:45:50 +0000346 u32 val;
347
Ville Syrjälädf0a6792013-05-22 11:36:40 +0300348 WARN_ON_SMP(!spin_is_locked(&dev_priv->backlight.lock));
Jani Nikula8ba2d182013-04-12 15:18:37 +0300349
Chris Wilson0b0b0532010-11-23 09:45:50 +0000350 /* Restore the CTL value if it lost, e.g. GPU reset */
351
352 if (HAS_PCH_SPLIT(dev_priv->dev)) {
353 val = I915_READ(BLC_PWM_PCH_CTL2);
Daniel Vetterf4c956a2012-11-02 19:55:02 +0100354 if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
355 dev_priv->regfile.saveBLC_PWM_CTL2 = val;
Chris Wilson0b0b0532010-11-23 09:45:50 +0000356 } else if (val == 0) {
Daniel Vetterf4c956a2012-11-02 19:55:02 +0100357 val = dev_priv->regfile.saveBLC_PWM_CTL2;
Jani Nikulabfd75902012-12-04 16:36:28 +0200358 I915_WRITE(BLC_PWM_PCH_CTL2, val);
Chris Wilson0b0b0532010-11-23 09:45:50 +0000359 }
360 } else {
361 val = I915_READ(BLC_PWM_CTL);
Daniel Vetterf4c956a2012-11-02 19:55:02 +0100362 if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
363 dev_priv->regfile.saveBLC_PWM_CTL = val;
Jani Nikulabfd75902012-12-04 16:36:28 +0200364 if (INTEL_INFO(dev)->gen >= 4)
365 dev_priv->regfile.saveBLC_PWM_CTL2 =
366 I915_READ(BLC_PWM_CTL2);
Chris Wilson0b0b0532010-11-23 09:45:50 +0000367 } else if (val == 0) {
Daniel Vetterf4c956a2012-11-02 19:55:02 +0100368 val = dev_priv->regfile.saveBLC_PWM_CTL;
Jani Nikulabfd75902012-12-04 16:36:28 +0200369 I915_WRITE(BLC_PWM_CTL, val);
370 if (INTEL_INFO(dev)->gen >= 4)
371 I915_WRITE(BLC_PWM_CTL2,
372 dev_priv->regfile.saveBLC_PWM_CTL2);
Chris Wilson0b0b0532010-11-23 09:45:50 +0000373 }
374 }
375
376 return val;
377}
378
Jani Nikulad6540632013-04-12 15:18:36 +0300379static u32 intel_panel_get_max_backlight(struct drm_device *dev)
Chris Wilsona9573552010-08-22 13:18:16 +0100380{
Chris Wilsona9573552010-08-22 13:18:16 +0100381 u32 max;
382
Jani Nikulabfd75902012-12-04 16:36:28 +0200383 max = i915_read_blc_pwm_ctl(dev);
Chris Wilson0b0b0532010-11-23 09:45:50 +0000384
Chris Wilsona9573552010-08-22 13:18:16 +0100385 if (HAS_PCH_SPLIT(dev)) {
Chris Wilson0b0b0532010-11-23 09:45:50 +0000386 max >>= 16;
Chris Wilsona9573552010-08-22 13:18:16 +0100387 } else {
Keith Packardca884792011-11-18 11:09:24 -0800388 if (INTEL_INFO(dev)->gen < 4)
Chris Wilsona9573552010-08-22 13:18:16 +0100389 max >>= 17;
Keith Packardca884792011-11-18 11:09:24 -0800390 else
Chris Wilsona9573552010-08-22 13:18:16 +0100391 max >>= 16;
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100392
393 if (is_backlight_combination_mode(dev))
394 max *= 0xff;
Chris Wilsona9573552010-08-22 13:18:16 +0100395 }
396
Chris Wilsona9573552010-08-22 13:18:16 +0100397 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
Jani Nikulad6540632013-04-12 15:18:36 +0300398
Chris Wilsona9573552010-08-22 13:18:16 +0100399 return max;
400}
401
Carsten Emde4dca20e2012-03-15 15:56:26 +0100402static int i915_panel_invert_brightness;
403MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
404 "(-1 force normal, 0 machine defaults, 1 force inversion), please "
Carsten Emde7bd90902012-03-15 15:56:25 +0100405 "report PCI device ID, subsystem vendor and subsystem device ID "
406 "to dri-devel@lists.freedesktop.org, if your machine needs it. "
407 "It will then be included in an upcoming module version.");
Carsten Emde4dca20e2012-03-15 15:56:26 +0100408module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
Carsten Emde7bd90902012-03-15 15:56:25 +0100409static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
410{
Carsten Emde4dca20e2012-03-15 15:56:26 +0100411 struct drm_i915_private *dev_priv = dev->dev_private;
412
413 if (i915_panel_invert_brightness < 0)
414 return val;
415
416 if (i915_panel_invert_brightness > 0 ||
Jani Nikulad6540632013-04-12 15:18:36 +0300417 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
418 u32 max = intel_panel_get_max_backlight(dev);
419 if (max)
420 return max - val;
421 }
Carsten Emde7bd90902012-03-15 15:56:25 +0100422
423 return val;
424}
425
Stéphane Marchesinfaea35d2012-07-30 13:51:38 -0700426static u32 intel_panel_get_backlight(struct drm_device *dev)
Chris Wilsona9573552010-08-22 13:18:16 +0100427{
428 struct drm_i915_private *dev_priv = dev->dev_private;
429 u32 val;
Jani Nikula8ba2d182013-04-12 15:18:37 +0300430 unsigned long flags;
431
432 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
Chris Wilsona9573552010-08-22 13:18:16 +0100433
434 if (HAS_PCH_SPLIT(dev)) {
435 val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
436 } else {
437 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
Keith Packardca884792011-11-18 11:09:24 -0800438 if (INTEL_INFO(dev)->gen < 4)
Chris Wilsona9573552010-08-22 13:18:16 +0100439 val >>= 1;
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100440
Akshay Joshi0206e352011-08-16 15:34:10 -0400441 if (is_backlight_combination_mode(dev)) {
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100442 u8 lbpc;
443
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100444 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
445 val *= lbpc;
446 }
Chris Wilsona9573552010-08-22 13:18:16 +0100447 }
448
Carsten Emde7bd90902012-03-15 15:56:25 +0100449 val = intel_panel_compute_brightness(dev, val);
Jani Nikula8ba2d182013-04-12 15:18:37 +0300450
451 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
452
Chris Wilsona9573552010-08-22 13:18:16 +0100453 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
454 return val;
455}
456
457static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
458{
459 struct drm_i915_private *dev_priv = dev->dev_private;
460 u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
461 I915_WRITE(BLC_PWM_CPU_CTL, val | level);
462}
463
Daniel Vetter9084e7d2013-09-16 23:43:45 +0200464static void intel_panel_actually_set_backlight(struct drm_device *dev,
465 u32 level)
Chris Wilsona9573552010-08-22 13:18:16 +0100466{
467 struct drm_i915_private *dev_priv = dev->dev_private;
468 u32 tmp;
469
470 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
Carsten Emde7bd90902012-03-15 15:56:25 +0100471 level = intel_panel_compute_brightness(dev, level);
Chris Wilsona9573552010-08-22 13:18:16 +0100472
473 if (HAS_PCH_SPLIT(dev))
474 return intel_pch_panel_set_backlight(dev, level);
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100475
Akshay Joshi0206e352011-08-16 15:34:10 -0400476 if (is_backlight_combination_mode(dev)) {
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100477 u32 max = intel_panel_get_max_backlight(dev);
478 u8 lbpc;
479
Jani Nikulad6540632013-04-12 15:18:36 +0300480 /* we're screwed, but keep behaviour backwards compatible */
481 if (!max)
482 max = 1;
483
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100484 lbpc = level * 0xfe / max + 1;
485 level /= lbpc;
486 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
487 }
488
Chris Wilsona9573552010-08-22 13:18:16 +0100489 tmp = I915_READ(BLC_PWM_CTL);
Daniel Vettera7269152012-11-20 14:50:08 +0100490 if (INTEL_INFO(dev)->gen < 4)
Chris Wilsona9573552010-08-22 13:18:16 +0100491 level <<= 1;
Keith Packardca884792011-11-18 11:09:24 -0800492 tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
Chris Wilsona9573552010-08-22 13:18:16 +0100493 I915_WRITE(BLC_PWM_CTL, tmp | level);
494}
Chris Wilson47356eb2011-01-11 17:06:04 +0000495
Jani Nikulad6540632013-04-12 15:18:36 +0300496/* set backlight brightness to level in range [0..max] */
497void intel_panel_set_backlight(struct drm_device *dev, u32 level, u32 max)
Takashi Iwaif52c6192011-10-14 11:45:40 +0200498{
499 struct drm_i915_private *dev_priv = dev->dev_private;
Jani Nikulad6540632013-04-12 15:18:36 +0300500 u32 freq;
Jani Nikula8ba2d182013-04-12 15:18:37 +0300501 unsigned long flags;
502
503 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
Jani Nikulad6540632013-04-12 15:18:36 +0300504
505 freq = intel_panel_get_max_backlight(dev);
506 if (!freq) {
507 /* we are screwed, bail out */
Jani Nikula8ba2d182013-04-12 15:18:37 +0300508 goto out;
Jani Nikulad6540632013-04-12 15:18:36 +0300509 }
510
Aaron Lu22505b82013-08-02 09:16:03 +0800511 /* scale to hardware, but be careful to not overflow */
512 if (freq < max)
513 level = level * freq / max;
514 else
515 level = freq / max * level;
Takashi Iwaif52c6192011-10-14 11:45:40 +0200516
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300517 dev_priv->backlight.level = level;
518 if (dev_priv->backlight.device)
519 dev_priv->backlight.device->props.brightness = level;
Jani Nikulab6b3ba52013-03-12 11:44:15 +0200520
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300521 if (dev_priv->backlight.enabled)
Takashi Iwaif52c6192011-10-14 11:45:40 +0200522 intel_panel_actually_set_backlight(dev, level);
Jani Nikula8ba2d182013-04-12 15:18:37 +0300523out:
524 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
Takashi Iwaif52c6192011-10-14 11:45:40 +0200525}
526
Chris Wilson47356eb2011-01-11 17:06:04 +0000527void intel_panel_disable_backlight(struct drm_device *dev)
528{
529 struct drm_i915_private *dev_priv = dev->dev_private;
Jani Nikula8ba2d182013-04-12 15:18:37 +0300530 unsigned long flags;
531
Jani Nikula3f577572013-07-25 14:31:30 +0300532 /*
533 * Do not disable backlight on the vgaswitcheroo path. When switching
534 * away from i915, the other client may depend on i915 to handle the
535 * backlight. This will leave the backlight on unnecessarily when
536 * another client is not activated.
537 */
538 if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
539 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
540 return;
541 }
542
Jani Nikula8ba2d182013-04-12 15:18:37 +0300543 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
Chris Wilson47356eb2011-01-11 17:06:04 +0000544
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300545 dev_priv->backlight.enabled = false;
Takashi Iwaif52c6192011-10-14 11:45:40 +0200546 intel_panel_actually_set_backlight(dev, 0);
Daniel Vetter24ded202012-06-05 12:14:54 +0200547
548 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300549 uint32_t reg, tmp;
Daniel Vetter24ded202012-06-05 12:14:54 +0200550
551 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
552
553 I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300554
555 if (HAS_PCH_SPLIT(dev)) {
556 tmp = I915_READ(BLC_PWM_PCH_CTL1);
557 tmp &= ~BLM_PCH_PWM_ENABLE;
558 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
559 }
Daniel Vetter24ded202012-06-05 12:14:54 +0200560 }
Jani Nikula8ba2d182013-04-12 15:18:37 +0300561
562 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
Chris Wilson47356eb2011-01-11 17:06:04 +0000563}
564
Daniel Vetter24ded202012-06-05 12:14:54 +0200565void intel_panel_enable_backlight(struct drm_device *dev,
566 enum pipe pipe)
Chris Wilson47356eb2011-01-11 17:06:04 +0000567{
568 struct drm_i915_private *dev_priv = dev->dev_private;
Jani Nikula35ffda42013-04-25 16:49:25 +0300569 enum transcoder cpu_transcoder =
570 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
Jani Nikula8ba2d182013-04-12 15:18:37 +0300571 unsigned long flags;
572
573 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
Chris Wilson47356eb2011-01-11 17:06:04 +0000574
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300575 if (dev_priv->backlight.level == 0) {
576 dev_priv->backlight.level = intel_panel_get_max_backlight(dev);
577 if (dev_priv->backlight.device)
578 dev_priv->backlight.device->props.brightness =
579 dev_priv->backlight.level;
Jani Nikulab6b3ba52013-03-12 11:44:15 +0200580 }
Chris Wilson47356eb2011-01-11 17:06:04 +0000581
Daniel Vetter24ded202012-06-05 12:14:54 +0200582 if (INTEL_INFO(dev)->gen >= 4) {
583 uint32_t reg, tmp;
584
585 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
586
587
588 tmp = I915_READ(reg);
589
590 /* Note that this can also get called through dpms changes. And
591 * we don't track the backlight dpms state, hence check whether
592 * we have to do anything first. */
593 if (tmp & BLM_PWM_ENABLE)
Takashi Iwai770c1232012-08-11 08:56:42 +0200594 goto set_level;
Daniel Vetter24ded202012-06-05 12:14:54 +0200595
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700596 if (INTEL_INFO(dev)->num_pipes == 3)
Daniel Vetter24ded202012-06-05 12:14:54 +0200597 tmp &= ~BLM_PIPE_SELECT_IVB;
598 else
599 tmp &= ~BLM_PIPE_SELECT;
600
Jani Nikula35ffda42013-04-25 16:49:25 +0300601 if (cpu_transcoder == TRANSCODER_EDP)
602 tmp |= BLM_TRANSCODER_EDP;
603 else
604 tmp |= BLM_PIPE(cpu_transcoder);
Daniel Vetter24ded202012-06-05 12:14:54 +0200605 tmp &= ~BLM_PWM_ENABLE;
606
607 I915_WRITE(reg, tmp);
608 POSTING_READ(reg);
609 I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300610
Kamal Mostafae85843b2013-07-19 15:02:01 -0700611 if (HAS_PCH_SPLIT(dev) &&
612 !(dev_priv->quirks & QUIRK_NO_PCH_PWM_ENABLE)) {
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300613 tmp = I915_READ(BLC_PWM_PCH_CTL1);
614 tmp |= BLM_PCH_PWM_ENABLE;
615 tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
616 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
617 }
Daniel Vetter24ded202012-06-05 12:14:54 +0200618 }
Takashi Iwai770c1232012-08-11 08:56:42 +0200619
620set_level:
Daniel Vetterb1289372013-03-22 15:44:46 +0100621 /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
622 * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
623 * registers are set.
Takashi Iwai770c1232012-08-11 08:56:42 +0200624 */
Daniel Vetterecb135a2013-04-03 11:25:32 +0200625 dev_priv->backlight.enabled = true;
626 intel_panel_actually_set_backlight(dev, dev_priv->backlight.level);
Jani Nikula8ba2d182013-04-12 15:18:37 +0300627
628 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
Chris Wilson47356eb2011-01-11 17:06:04 +0000629}
630
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200631static void intel_panel_init_backlight(struct drm_device *dev)
Chris Wilson47356eb2011-01-11 17:06:04 +0000632{
633 struct drm_i915_private *dev_priv = dev->dev_private;
634
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300635 dev_priv->backlight.level = intel_panel_get_backlight(dev);
636 dev_priv->backlight.enabled = dev_priv->backlight.level != 0;
Chris Wilson47356eb2011-01-11 17:06:04 +0000637}
Chris Wilsonfe16d942011-02-12 10:29:38 +0000638
639enum drm_connector_status
640intel_panel_detect(struct drm_device *dev)
641{
642 struct drm_i915_private *dev_priv = dev->dev_private;
643
644 /* Assume that the BIOS does not lie through the OpRegion... */
Daniel Vettera7269152012-11-20 14:50:08 +0100645 if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
Chris Wilsonfe16d942011-02-12 10:29:38 +0000646 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
647 connector_status_connected :
648 connector_status_disconnected;
Daniel Vettera7269152012-11-20 14:50:08 +0100649 }
Chris Wilsonfe16d942011-02-12 10:29:38 +0000650
Daniel Vettera7269152012-11-20 14:50:08 +0100651 switch (i915_panel_ignore_lid) {
652 case -2:
653 return connector_status_connected;
654 case -1:
655 return connector_status_disconnected;
656 default:
657 return connector_status_unknown;
658 }
Chris Wilsonfe16d942011-02-12 10:29:38 +0000659}
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200660
661#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
662static int intel_panel_update_status(struct backlight_device *bd)
663{
664 struct drm_device *dev = bl_get_data(bd);
Jani Nikulad6540632013-04-12 15:18:36 +0300665 intel_panel_set_backlight(dev, bd->props.brightness,
666 bd->props.max_brightness);
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200667 return 0;
668}
669
670static int intel_panel_get_brightness(struct backlight_device *bd)
671{
672 struct drm_device *dev = bl_get_data(bd);
Jani Nikula7c233962013-03-12 11:44:16 +0200673 return intel_panel_get_backlight(dev);
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200674}
675
676static const struct backlight_ops intel_panel_bl_ops = {
677 .update_status = intel_panel_update_status,
678 .get_brightness = intel_panel_get_brightness,
679};
680
Jani Nikula0657b6b2012-10-19 14:51:46 +0300681int intel_panel_setup_backlight(struct drm_connector *connector)
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200682{
Jani Nikula0657b6b2012-10-19 14:51:46 +0300683 struct drm_device *dev = connector->dev;
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200684 struct drm_i915_private *dev_priv = dev->dev_private;
685 struct backlight_properties props;
Jani Nikula8ba2d182013-04-12 15:18:37 +0300686 unsigned long flags;
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200687
688 intel_panel_init_backlight(dev);
689
Jani Nikuladc652f92013-04-12 15:18:38 +0300690 if (WARN_ON(dev_priv->backlight.device))
691 return -ENODEV;
692
Corentin Charyaf437cf2012-05-22 10:29:46 +0100693 memset(&props, 0, sizeof(props));
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200694 props.type = BACKLIGHT_RAW;
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300695 props.brightness = dev_priv->backlight.level;
Jani Nikula8ba2d182013-04-12 15:18:37 +0300696
697 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
Jani Nikulad6540632013-04-12 15:18:36 +0300698 props.max_brightness = intel_panel_get_max_backlight(dev);
Jani Nikula8ba2d182013-04-12 15:18:37 +0300699 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
700
Jani Nikula28dcc2d2012-09-03 16:25:12 +0300701 if (props.max_brightness == 0) {
Jani Nikulae86b6182012-10-25 10:57:38 +0300702 DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
Jani Nikula28dcc2d2012-09-03 16:25:12 +0300703 return -ENODEV;
704 }
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300705 dev_priv->backlight.device =
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200706 backlight_device_register("intel_backlight",
707 &connector->kdev, dev,
708 &intel_panel_bl_ops, &props);
709
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300710 if (IS_ERR(dev_priv->backlight.device)) {
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200711 DRM_ERROR("Failed to register backlight: %ld\n",
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300712 PTR_ERR(dev_priv->backlight.device));
713 dev_priv->backlight.device = NULL;
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200714 return -ENODEV;
715 }
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200716 return 0;
717}
718
719void intel_panel_destroy_backlight(struct drm_device *dev)
720{
721 struct drm_i915_private *dev_priv = dev->dev_private;
Jani Nikuladc652f92013-04-12 15:18:38 +0300722 if (dev_priv->backlight.device) {
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300723 backlight_device_unregister(dev_priv->backlight.device);
Jani Nikuladc652f92013-04-12 15:18:38 +0300724 dev_priv->backlight.device = NULL;
725 }
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200726}
727#else
Jani Nikula0657b6b2012-10-19 14:51:46 +0300728int intel_panel_setup_backlight(struct drm_connector *connector)
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200729{
Jani Nikula0657b6b2012-10-19 14:51:46 +0300730 intel_panel_init_backlight(connector->dev);
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200731 return 0;
732}
733
734void intel_panel_destroy_backlight(struct drm_device *dev)
735{
736 return;
737}
738#endif
Jani Nikula1d508702012-10-19 14:51:49 +0300739
Jani Nikuladd06f902012-10-19 14:51:50 +0300740int intel_panel_init(struct intel_panel *panel,
741 struct drm_display_mode *fixed_mode)
Jani Nikula1d508702012-10-19 14:51:49 +0300742{
Jani Nikuladd06f902012-10-19 14:51:50 +0300743 panel->fixed_mode = fixed_mode;
744
Jani Nikula1d508702012-10-19 14:51:49 +0300745 return 0;
746}
747
748void intel_panel_fini(struct intel_panel *panel)
749{
Jani Nikuladd06f902012-10-19 14:51:50 +0300750 struct intel_connector *intel_connector =
751 container_of(panel, struct intel_connector, panel);
752
753 if (panel->fixed_mode)
754 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
Jani Nikula1d508702012-10-19 14:51:49 +0300755}