Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 1 | /* |
| 2 | * xHCI host controller driver |
| 3 | * |
| 4 | * Copyright (C) 2008 Intel Corp. |
| 5 | * |
| 6 | * Author: Sarah Sharp |
| 7 | * Some code borrowed from the Linux EHCI driver. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, but |
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 15 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 16 | * for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software Foundation, |
| 20 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 21 | */ |
| 22 | |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 23 | #include <linux/pci.h> |
Andrey Smirnov | 307031c | 2019-05-22 14:34:01 +0300 | [diff] [blame] | 24 | #include <linux/iopoll.h> |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 25 | #include <linux/irq.h> |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 26 | #include <linux/log2.h> |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 27 | #include <linux/module.h> |
Sarah Sharp | b0567b3 | 2009-08-07 14:04:36 -0700 | [diff] [blame] | 28 | #include <linux/moduleparam.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 29 | #include <linux/slab.h> |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 30 | #include <linux/dmi.h> |
James Hogan | 008eb95 | 2013-07-26 13:34:43 +0100 | [diff] [blame] | 31 | #include <linux/dma-mapping.h> |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 32 | |
| 33 | #include "xhci.h" |
Xenia Ragiadakou | 84a99f6 | 2013-08-06 00:22:15 +0300 | [diff] [blame] | 34 | #include "xhci-trace.h" |
Chunfeng Yun | 0cbd4b3 | 2015-11-24 13:09:55 +0200 | [diff] [blame] | 35 | #include "xhci-mtk.h" |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 36 | |
| 37 | #define DRIVER_AUTHOR "Sarah Sharp" |
| 38 | #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver" |
| 39 | |
Lu Baolu | a1377e5 | 2014-11-18 11:27:14 +0200 | [diff] [blame] | 40 | #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E) |
| 41 | |
Sarah Sharp | b0567b3 | 2009-08-07 14:04:36 -0700 | [diff] [blame] | 42 | /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */ |
| 43 | static int link_quirk; |
| 44 | module_param(link_quirk, int, S_IRUGO | S_IWUSR); |
| 45 | MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB"); |
| 46 | |
Takashi Iwai | 4e6a1ee | 2013-12-09 12:42:48 +0100 | [diff] [blame] | 47 | static unsigned int quirks; |
| 48 | module_param(quirks, uint, S_IRUGO); |
| 49 | MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default"); |
| 50 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 51 | /* |
Sarah Sharp | 2611bd18 | 2012-10-25 13:27:51 -0700 | [diff] [blame] | 52 | * xhci_handshake - spin reading hc until handshake completes or fails |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 53 | * @ptr: address of hc register to be read |
| 54 | * @mask: bits to look at in result of read |
| 55 | * @done: value of those bits when handshake succeeds |
| 56 | * @usec: timeout in microseconds |
| 57 | * |
| 58 | * Returns negative errno, or zero on success |
| 59 | * |
| 60 | * Success happens when the "mask" bits have the specified value (hardware |
| 61 | * handshake done). There are two failure modes: "usec" have passed (major |
| 62 | * hardware flakeout), or the register reads as all-ones (hardware removed). |
| 63 | */ |
Lin Wang | dc0b177 | 2015-01-09 16:06:28 +0200 | [diff] [blame] | 64 | int xhci_handshake(void __iomem *ptr, u32 mask, u32 done, int usec) |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 65 | { |
| 66 | u32 result; |
Andrey Smirnov | 307031c | 2019-05-22 14:34:01 +0300 | [diff] [blame] | 67 | int ret; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 68 | |
Andrey Smirnov | 307031c | 2019-05-22 14:34:01 +0300 | [diff] [blame] | 69 | ret = readl_poll_timeout_atomic(ptr, result, |
| 70 | (result & mask) == done || |
| 71 | result == U32_MAX, |
| 72 | 1, usec); |
| 73 | if (result == U32_MAX) /* card removed */ |
| 74 | return -ENODEV; |
| 75 | |
| 76 | return ret; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 77 | } |
| 78 | |
Hemant Kumar | 93f5ce4 | 2018-03-05 18:43:38 -0800 | [diff] [blame] | 79 | int xhci_handshake_check_state(struct xhci_hcd *xhci, |
| 80 | void __iomem *ptr, u32 mask, u32 done, int usec) |
| 81 | { |
| 82 | u32 result; |
| 83 | |
| 84 | do { |
| 85 | result = readl_relaxed(ptr); |
| 86 | if (result == ~(u32)0 || |
| 87 | xhci->xhc_state == XHCI_STATE_REMOVING) /* card removed */ |
| 88 | return -ENODEV; |
| 89 | result &= mask; |
| 90 | if (result == done) |
| 91 | return 0; |
| 92 | udelay(1); |
| 93 | usec--; |
| 94 | } while (usec > 0); |
| 95 | return -ETIMEDOUT; |
| 96 | } |
| 97 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 98 | /* |
Sarah Sharp | 4f0f0ba | 2009-10-27 10:56:33 -0700 | [diff] [blame] | 99 | * Disable interrupts and begin the xHCI halting process. |
| 100 | */ |
| 101 | void xhci_quiesce(struct xhci_hcd *xhci) |
| 102 | { |
| 103 | u32 halted; |
| 104 | u32 cmd; |
| 105 | u32 mask; |
| 106 | |
| 107 | mask = ~(XHCI_IRQS); |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 108 | halted = readl(&xhci->op_regs->status) & STS_HALT; |
Sarah Sharp | 4f0f0ba | 2009-10-27 10:56:33 -0700 | [diff] [blame] | 109 | if (!halted) |
| 110 | mask &= ~CMD_RUN; |
| 111 | |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 112 | cmd = readl(&xhci->op_regs->command); |
Sarah Sharp | 4f0f0ba | 2009-10-27 10:56:33 -0700 | [diff] [blame] | 113 | cmd &= mask; |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 114 | writel(cmd, &xhci->op_regs->command); |
Sarah Sharp | 4f0f0ba | 2009-10-27 10:56:33 -0700 | [diff] [blame] | 115 | } |
| 116 | |
| 117 | /* |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 118 | * Force HC into halt state. |
| 119 | * |
| 120 | * Disable any IRQs and clear the run/stop bit. |
| 121 | * HC will complete any current and actively pipelined transactions, and |
Andiry Xu | bdfca50 | 2011-01-06 15:43:39 +0800 | [diff] [blame] | 122 | * should halt within 16 ms of the run/stop bit being cleared. |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 123 | * Read HC Halted bit in the status register to see when the HC is finished. |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 124 | */ |
| 125 | int xhci_halt(struct xhci_hcd *xhci) |
| 126 | { |
Sarah Sharp | c6cc27c | 2011-03-11 10:20:58 -0800 | [diff] [blame] | 127 | int ret; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 128 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC"); |
Sarah Sharp | 4f0f0ba | 2009-10-27 10:56:33 -0700 | [diff] [blame] | 129 | xhci_quiesce(xhci); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 130 | |
Lin Wang | dc0b177 | 2015-01-09 16:06:28 +0200 | [diff] [blame] | 131 | ret = xhci_handshake(&xhci->op_regs->status, |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 132 | STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC); |
Manu Gautam | a7806bc | 2016-09-23 16:12:07 +0530 | [diff] [blame] | 133 | if (!ret) |
Sarah Sharp | c6cc27c | 2011-03-11 10:20:58 -0800 | [diff] [blame] | 134 | xhci->xhc_state |= XHCI_STATE_HALTED; |
Manu Gautam | a7806bc | 2016-09-23 16:12:07 +0530 | [diff] [blame] | 135 | else |
Sarah Sharp | 5af98bb | 2012-03-16 12:58:20 -0700 | [diff] [blame] | 136 | xhci_warn(xhci, "Host not halted after %u microseconds.\n", |
| 137 | XHCI_MAX_HALT_USEC); |
Manu Gautam | a7806bc | 2016-09-23 16:12:07 +0530 | [diff] [blame] | 138 | |
| 139 | xhci->cmd_ring_state = CMD_RING_STATE_STOPPED; |
| 140 | |
| 141 | if (delayed_work_pending(&xhci->cmd_timer)) { |
| 142 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 143 | "Cleanup command queue"); |
| 144 | cancel_delayed_work(&xhci->cmd_timer); |
| 145 | xhci_cleanup_command_queue(xhci); |
| 146 | } |
| 147 | |
Sarah Sharp | c6cc27c | 2011-03-11 10:20:58 -0800 | [diff] [blame] | 148 | return ret; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 149 | } |
| 150 | |
| 151 | /* |
Sarah Sharp | ed07453 | 2010-05-24 13:25:21 -0700 | [diff] [blame] | 152 | * Set the run bit and wait for the host to be running. |
| 153 | */ |
Dmitry Torokhov | 8212a49 | 2011-02-08 13:55:59 -0800 | [diff] [blame] | 154 | static int xhci_start(struct xhci_hcd *xhci) |
Sarah Sharp | ed07453 | 2010-05-24 13:25:21 -0700 | [diff] [blame] | 155 | { |
| 156 | u32 temp; |
| 157 | int ret; |
Hemant Kumar | 8e2be71 | 2017-03-17 14:02:00 -0700 | [diff] [blame] | 158 | struct usb_hcd *hcd = xhci_to_hcd(xhci); |
Sarah Sharp | ed07453 | 2010-05-24 13:25:21 -0700 | [diff] [blame] | 159 | |
Hemant Kumar | 8e2be71 | 2017-03-17 14:02:00 -0700 | [diff] [blame] | 160 | /* |
| 161 | * disable irq to avoid xhci_irq flooding due to unhandeled port |
| 162 | * change event in halt state, as soon as xhci_start clears halt bit |
| 163 | */ |
| 164 | disable_irq(hcd->irq); |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 165 | temp = readl(&xhci->op_regs->command); |
Sarah Sharp | ed07453 | 2010-05-24 13:25:21 -0700 | [diff] [blame] | 166 | temp |= (CMD_RUN); |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 167 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.", |
Sarah Sharp | ed07453 | 2010-05-24 13:25:21 -0700 | [diff] [blame] | 168 | temp); |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 169 | writel(temp, &xhci->op_regs->command); |
Sarah Sharp | ed07453 | 2010-05-24 13:25:21 -0700 | [diff] [blame] | 170 | |
| 171 | /* |
| 172 | * Wait for the HCHalted Status bit to be 0 to indicate the host is |
| 173 | * running. |
| 174 | */ |
Lin Wang | dc0b177 | 2015-01-09 16:06:28 +0200 | [diff] [blame] | 175 | ret = xhci_handshake(&xhci->op_regs->status, |
Sarah Sharp | ed07453 | 2010-05-24 13:25:21 -0700 | [diff] [blame] | 176 | STS_HALT, 0, XHCI_MAX_HALT_USEC); |
| 177 | if (ret == -ETIMEDOUT) |
| 178 | xhci_err(xhci, "Host took too long to start, " |
| 179 | "waited %u microseconds.\n", |
| 180 | XHCI_MAX_HALT_USEC); |
Sarah Sharp | c6cc27c | 2011-03-11 10:20:58 -0800 | [diff] [blame] | 181 | if (!ret) |
Mathias Nyman | 98d74f9 | 2016-04-08 16:25:10 +0300 | [diff] [blame] | 182 | /* clear state flags. Including dying, halted or removing */ |
| 183 | xhci->xhc_state = 0; |
Roger Quadros | e5bfeab | 2015-09-21 17:46:13 +0300 | [diff] [blame] | 184 | |
Hemant Kumar | 8e2be71 | 2017-03-17 14:02:00 -0700 | [diff] [blame] | 185 | enable_irq(hcd->irq); |
| 186 | |
Sarah Sharp | ed07453 | 2010-05-24 13:25:21 -0700 | [diff] [blame] | 187 | return ret; |
| 188 | } |
| 189 | |
| 190 | /* |
Sarah Sharp | ac04e6f | 2011-03-11 08:47:33 -0800 | [diff] [blame] | 191 | * Reset a halted HC. |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 192 | * |
| 193 | * This resets pipelines, timers, counters, state machines, etc. |
| 194 | * Transactions will be terminated immediately, and operational registers |
| 195 | * will be set to their defaults. |
| 196 | */ |
| 197 | int xhci_reset(struct xhci_hcd *xhci) |
| 198 | { |
| 199 | u32 command; |
| 200 | u32 state; |
Andiry Xu | f370b99 | 2012-04-14 02:54:30 +0800 | [diff] [blame] | 201 | int ret, i; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 202 | |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 203 | state = readl(&xhci->op_regs->status); |
Sarah Sharp | d3512f6 | 2009-07-27 12:03:50 -0700 | [diff] [blame] | 204 | if ((state & STS_HALT) == 0) { |
| 205 | xhci_warn(xhci, "Host controller not halted, aborting reset.\n"); |
| 206 | return 0; |
| 207 | } |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 208 | |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 209 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC"); |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 210 | command = readl(&xhci->op_regs->command); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 211 | command |= CMD_RESET; |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 212 | writel(command, &xhci->op_regs->command); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 213 | |
Rajmohan Mani | a596439 | 2015-11-18 10:48:20 +0200 | [diff] [blame] | 214 | /* Existing Intel xHCI controllers require a delay of 1 mS, |
| 215 | * after setting the CMD_RESET bit, and before accessing any |
| 216 | * HC registers. This allows the HC to complete the |
| 217 | * reset operation and be ready for HC register access. |
| 218 | * Without this delay, the subsequent HC register access, |
| 219 | * may result in a system hang very rarely. |
| 220 | */ |
| 221 | if (xhci->quirks & XHCI_INTEL_HOST) |
| 222 | udelay(1000); |
| 223 | |
Lin Wang | dc0b177 | 2015-01-09 16:06:28 +0200 | [diff] [blame] | 224 | ret = xhci_handshake(&xhci->op_regs->command, |
Sarah Sharp | 22ceac1 | 2012-07-23 16:06:08 -0700 | [diff] [blame] | 225 | CMD_RESET, 0, 10 * 1000 * 1000); |
Sarah Sharp | 2d62f3e | 2010-05-24 13:25:15 -0700 | [diff] [blame] | 226 | if (ret) |
| 227 | return ret; |
| 228 | |
Jiahau Chang | 24a950e | 2017-07-20 14:48:27 +0300 | [diff] [blame] | 229 | if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL) |
| 230 | usb_asmedia_modifyflowcontrol(to_pci_dev(xhci_to_hcd(xhci)->self.controller)); |
| 231 | |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 232 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 233 | "Wait for controller to be ready for doorbell rings"); |
Sarah Sharp | 2d62f3e | 2010-05-24 13:25:15 -0700 | [diff] [blame] | 234 | /* |
| 235 | * xHCI cannot write to any doorbells or operational registers other |
| 236 | * than status until the "Controller Not Ready" flag is cleared. |
| 237 | */ |
Lin Wang | dc0b177 | 2015-01-09 16:06:28 +0200 | [diff] [blame] | 238 | ret = xhci_handshake(&xhci->op_regs->status, |
Sarah Sharp | 22ceac1 | 2012-07-23 16:06:08 -0700 | [diff] [blame] | 239 | STS_CNR, 0, 10 * 1000 * 1000); |
Andiry Xu | f370b99 | 2012-04-14 02:54:30 +0800 | [diff] [blame] | 240 | |
| 241 | for (i = 0; i < 2; ++i) { |
| 242 | xhci->bus_state[i].port_c_suspend = 0; |
| 243 | xhci->bus_state[i].suspended_ports = 0; |
| 244 | xhci->bus_state[i].resuming_ports = 0; |
| 245 | } |
| 246 | |
| 247 | return ret; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 248 | } |
| 249 | |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 250 | #ifdef CONFIG_PCI |
| 251 | static int xhci_free_msi(struct xhci_hcd *xhci) |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 252 | { |
| 253 | int i; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 254 | |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 255 | if (!xhci->msix_entries) |
| 256 | return -EINVAL; |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 257 | |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 258 | for (i = 0; i < xhci->msix_count; i++) |
| 259 | if (xhci->msix_entries[i].vector) |
| 260 | free_irq(xhci->msix_entries[i].vector, |
| 261 | xhci_to_hcd(xhci)); |
| 262 | return 0; |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 263 | } |
| 264 | |
| 265 | /* |
| 266 | * Set up MSI |
| 267 | */ |
| 268 | static int xhci_setup_msi(struct xhci_hcd *xhci) |
| 269 | { |
| 270 | int ret; |
Arnd Bergmann | a9ff911 | 2017-03-13 10:18:44 +0800 | [diff] [blame] | 271 | /* |
| 272 | * TODO:Check with MSI Soc for sysdev |
| 273 | */ |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 274 | struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); |
| 275 | |
| 276 | ret = pci_enable_msi(pdev); |
| 277 | if (ret) { |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 278 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 279 | "failed to allocate MSI entry"); |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 280 | return ret; |
| 281 | } |
| 282 | |
Alex Shi | 851ec16 | 2013-05-24 10:54:19 +0800 | [diff] [blame] | 283 | ret = request_irq(pdev->irq, xhci_msi_irq, |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 284 | 0, "xhci_hcd", xhci_to_hcd(xhci)); |
| 285 | if (ret) { |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 286 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 287 | "disable MSI interrupt"); |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 288 | pci_disable_msi(pdev); |
| 289 | } |
| 290 | |
| 291 | return ret; |
| 292 | } |
| 293 | |
| 294 | /* |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 295 | * Free IRQs |
| 296 | * free all IRQs request |
| 297 | */ |
| 298 | static void xhci_free_irq(struct xhci_hcd *xhci) |
| 299 | { |
Arnd Bergmann | a9ff911 | 2017-03-13 10:18:44 +0800 | [diff] [blame] | 300 | struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.sysdev); |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 301 | int ret; |
| 302 | |
| 303 | /* return if using legacy interrupt */ |
Felipe Balbi | cd70469 | 2012-02-29 16:46:23 +0200 | [diff] [blame] | 304 | if (xhci_to_hcd(xhci)->irq > 0) |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 305 | return; |
| 306 | |
| 307 | ret = xhci_free_msi(xhci); |
| 308 | if (!ret) |
| 309 | return; |
Felipe Balbi | cd70469 | 2012-02-29 16:46:23 +0200 | [diff] [blame] | 310 | if (pdev->irq > 0) |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 311 | free_irq(pdev->irq, xhci_to_hcd(xhci)); |
| 312 | |
| 313 | return; |
| 314 | } |
| 315 | |
| 316 | /* |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 317 | * Set up MSI-X |
| 318 | */ |
| 319 | static int xhci_setup_msix(struct xhci_hcd *xhci) |
| 320 | { |
| 321 | int i, ret = 0; |
Andiry Xu | 0029227 | 2010-12-27 17:39:02 +0800 | [diff] [blame] | 322 | struct usb_hcd *hcd = xhci_to_hcd(xhci); |
| 323 | struct pci_dev *pdev = to_pci_dev(hcd->self.controller); |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 324 | |
| 325 | /* |
| 326 | * calculate number of msi-x vectors supported. |
| 327 | * - HCS_MAX_INTRS: the max number of interrupts the host can handle, |
| 328 | * with max number of interrupters based on the xhci HCSPARAMS1. |
| 329 | * - num_online_cpus: maximum msi-x vectors per CPUs core. |
| 330 | * Add additional 1 vector to ensure always available interrupt. |
| 331 | */ |
| 332 | xhci->msix_count = min(num_online_cpus() + 1, |
| 333 | HCS_MAX_INTRS(xhci->hcs_params1)); |
| 334 | |
| 335 | xhci->msix_entries = |
| 336 | kmalloc((sizeof(struct msix_entry))*xhci->msix_count, |
Greg Kroah-Hartman | 8687197 | 2010-11-11 09:41:02 -0800 | [diff] [blame] | 337 | GFP_KERNEL); |
Wolfram Sang | f4c46f1 | 2016-08-25 19:39:10 +0200 | [diff] [blame] | 338 | if (!xhci->msix_entries) |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 339 | return -ENOMEM; |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 340 | |
| 341 | for (i = 0; i < xhci->msix_count; i++) { |
| 342 | xhci->msix_entries[i].entry = i; |
| 343 | xhci->msix_entries[i].vector = 0; |
| 344 | } |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 345 | |
Alexander Gordeev | a62445a | 2014-05-08 19:25:58 +0300 | [diff] [blame] | 346 | ret = pci_enable_msix_exact(pdev, xhci->msix_entries, xhci->msix_count); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 347 | if (ret) { |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 348 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 349 | "Failed to enable MSI-X"); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 350 | goto free_entries; |
| 351 | } |
| 352 | |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 353 | for (i = 0; i < xhci->msix_count; i++) { |
| 354 | ret = request_irq(xhci->msix_entries[i].vector, |
Alex Shi | 851ec16 | 2013-05-24 10:54:19 +0800 | [diff] [blame] | 355 | xhci_msi_irq, |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 356 | 0, "xhci_hcd", xhci_to_hcd(xhci)); |
| 357 | if (ret) |
| 358 | goto disable_msix; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 359 | } |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 360 | |
Andiry Xu | 0029227 | 2010-12-27 17:39:02 +0800 | [diff] [blame] | 361 | hcd->msix_enabled = 1; |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 362 | return ret; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 363 | |
| 364 | disable_msix: |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 365 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt"); |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 366 | xhci_free_irq(xhci); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 367 | pci_disable_msix(pdev); |
| 368 | free_entries: |
| 369 | kfree(xhci->msix_entries); |
| 370 | xhci->msix_entries = NULL; |
| 371 | return ret; |
| 372 | } |
| 373 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 374 | /* Free any IRQs and disable MSI-X */ |
| 375 | static void xhci_cleanup_msix(struct xhci_hcd *xhci) |
| 376 | { |
Andiry Xu | 0029227 | 2010-12-27 17:39:02 +0800 | [diff] [blame] | 377 | struct usb_hcd *hcd = xhci_to_hcd(xhci); |
| 378 | struct pci_dev *pdev = to_pci_dev(hcd->self.controller); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 379 | |
Jack Pham | 9005355 | 2013-11-15 14:53:14 -0800 | [diff] [blame] | 380 | if (xhci->quirks & XHCI_PLAT) |
| 381 | return; |
| 382 | |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 383 | xhci_free_irq(xhci); |
| 384 | |
| 385 | if (xhci->msix_entries) { |
| 386 | pci_disable_msix(pdev); |
| 387 | kfree(xhci->msix_entries); |
| 388 | xhci->msix_entries = NULL; |
| 389 | } else { |
| 390 | pci_disable_msi(pdev); |
| 391 | } |
| 392 | |
Andiry Xu | 0029227 | 2010-12-27 17:39:02 +0800 | [diff] [blame] | 393 | hcd->msix_enabled = 0; |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 394 | return; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 395 | } |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 396 | |
Olof Johansson | d5c82fe | 2013-07-23 11:58:20 -0700 | [diff] [blame] | 397 | static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci) |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 398 | { |
| 399 | int i; |
| 400 | |
| 401 | if (xhci->msix_entries) { |
| 402 | for (i = 0; i < xhci->msix_count; i++) |
| 403 | synchronize_irq(xhci->msix_entries[i].vector); |
| 404 | } |
| 405 | } |
| 406 | |
| 407 | static int xhci_try_enable_msi(struct usb_hcd *hcd) |
| 408 | { |
| 409 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
Sarah Sharp | 52fb612 | 2013-08-08 10:08:34 -0700 | [diff] [blame] | 410 | struct pci_dev *pdev; |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 411 | int ret; |
| 412 | |
Sarah Sharp | 52fb612 | 2013-08-08 10:08:34 -0700 | [diff] [blame] | 413 | /* The xhci platform device has set up IRQs through usb_add_hcd. */ |
| 414 | if (xhci->quirks & XHCI_PLAT) |
| 415 | return 0; |
| 416 | |
| 417 | pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 418 | /* |
| 419 | * Some Fresco Logic host controllers advertise MSI, but fail to |
| 420 | * generate interrupts. Don't even try to enable MSI. |
| 421 | */ |
| 422 | if (xhci->quirks & XHCI_BROKEN_MSI) |
Hannes Reinecke | 00eed9c | 2013-03-04 17:14:43 +0100 | [diff] [blame] | 423 | goto legacy_irq; |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 424 | |
| 425 | /* unregister the legacy interrupt */ |
| 426 | if (hcd->irq) |
| 427 | free_irq(hcd->irq, hcd); |
Felipe Balbi | cd70469 | 2012-02-29 16:46:23 +0200 | [diff] [blame] | 428 | hcd->irq = 0; |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 429 | |
| 430 | ret = xhci_setup_msix(xhci); |
| 431 | if (ret) |
| 432 | /* fall back to msi*/ |
| 433 | ret = xhci_setup_msi(xhci); |
| 434 | |
| 435 | if (!ret) |
Felipe Balbi | cd70469 | 2012-02-29 16:46:23 +0200 | [diff] [blame] | 436 | /* hcd->irq is 0, we have MSI */ |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 437 | return 0; |
| 438 | |
Sarah Sharp | 68d07f6 | 2012-02-13 16:25:57 -0800 | [diff] [blame] | 439 | if (!pdev->irq) { |
| 440 | xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n"); |
| 441 | return -EINVAL; |
| 442 | } |
| 443 | |
Hannes Reinecke | 00eed9c | 2013-03-04 17:14:43 +0100 | [diff] [blame] | 444 | legacy_irq: |
Adrian Huang | 7969943 | 2014-02-27 11:26:03 +0000 | [diff] [blame] | 445 | if (!strlen(hcd->irq_descr)) |
| 446 | snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d", |
| 447 | hcd->driver->description, hcd->self.busnum); |
| 448 | |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 449 | /* fall back to legacy interrupt*/ |
| 450 | ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED, |
| 451 | hcd->irq_descr, hcd); |
| 452 | if (ret) { |
| 453 | xhci_err(xhci, "request interrupt %d failed\n", |
| 454 | pdev->irq); |
| 455 | return ret; |
| 456 | } |
| 457 | hcd->irq = pdev->irq; |
| 458 | return 0; |
| 459 | } |
| 460 | |
| 461 | #else |
| 462 | |
David Cohen | 01bb59e | 2014-04-25 19:20:16 +0300 | [diff] [blame] | 463 | static inline int xhci_try_enable_msi(struct usb_hcd *hcd) |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 464 | { |
| 465 | return 0; |
| 466 | } |
| 467 | |
David Cohen | 01bb59e | 2014-04-25 19:20:16 +0300 | [diff] [blame] | 468 | static inline void xhci_cleanup_msix(struct xhci_hcd *xhci) |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 469 | { |
| 470 | } |
| 471 | |
David Cohen | 01bb59e | 2014-04-25 19:20:16 +0300 | [diff] [blame] | 472 | static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci) |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 473 | { |
| 474 | } |
| 475 | |
| 476 | #endif |
| 477 | |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 478 | static void compliance_mode_recovery(unsigned long arg) |
| 479 | { |
| 480 | struct xhci_hcd *xhci; |
| 481 | struct usb_hcd *hcd; |
| 482 | u32 temp; |
| 483 | int i; |
| 484 | |
| 485 | xhci = (struct xhci_hcd *)arg; |
| 486 | |
| 487 | for (i = 0; i < xhci->num_usb3_ports; i++) { |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 488 | temp = readl(xhci->usb3_ports[i]); |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 489 | if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) { |
| 490 | /* |
| 491 | * Compliance Mode Detected. Letting USB Core |
| 492 | * handle the Warm Reset |
| 493 | */ |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 494 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 495 | "Compliance mode detected->port %d", |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 496 | i + 1); |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 497 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 498 | "Attempting compliance mode recovery"); |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 499 | hcd = xhci->shared_hcd; |
| 500 | |
| 501 | if (hcd->state == HC_STATE_SUSPENDED) |
| 502 | usb_hcd_resume_root_hub(hcd); |
| 503 | |
| 504 | usb_hcd_poll_rh_status(hcd); |
| 505 | } |
| 506 | } |
| 507 | |
| 508 | if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1)) |
| 509 | mod_timer(&xhci->comp_mode_recovery_timer, |
| 510 | jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS)); |
| 511 | } |
| 512 | |
| 513 | /* |
| 514 | * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver |
| 515 | * that causes ports behind that hardware to enter compliance mode sometimes. |
| 516 | * The quirk creates a timer that polls every 2 seconds the link state of |
| 517 | * each host controller's port and recovers it by issuing a Warm reset |
| 518 | * if Compliance mode is detected, otherwise the port will become "dead" (no |
| 519 | * device connections or disconnections will be detected anymore). Becasue no |
| 520 | * status event is generated when entering compliance mode (per xhci spec), |
| 521 | * this quirk is needed on systems that have the failing hardware installed. |
| 522 | */ |
| 523 | static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci) |
| 524 | { |
| 525 | xhci->port_status_u0 = 0; |
Julia Lawall | fc8abe0 | 2015-01-09 16:06:29 +0200 | [diff] [blame] | 526 | setup_timer(&xhci->comp_mode_recovery_timer, |
| 527 | compliance_mode_recovery, (unsigned long)xhci); |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 528 | xhci->comp_mode_recovery_timer.expires = jiffies + |
| 529 | msecs_to_jiffies(COMP_MODE_RCVRY_MSECS); |
| 530 | |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 531 | add_timer(&xhci->comp_mode_recovery_timer); |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 532 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 533 | "Compliance mode recovery timer initialized"); |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 534 | } |
| 535 | |
| 536 | /* |
| 537 | * This function identifies the systems that have installed the SN65LVPE502CP |
| 538 | * USB3.0 re-driver and that need the Compliance Mode Quirk. |
| 539 | * Systems: |
| 540 | * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820 |
| 541 | */ |
Andrew Bresticker | e1cd972 | 2014-10-03 11:35:27 +0300 | [diff] [blame] | 542 | static bool xhci_compliance_mode_recovery_timer_quirk_check(void) |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 543 | { |
| 544 | const char *dmi_product_name, *dmi_sys_vendor; |
| 545 | |
| 546 | dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME); |
| 547 | dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR); |
Vivek Gautam | 457a73d | 2012-09-22 18:11:19 +0530 | [diff] [blame] | 548 | if (!dmi_product_name || !dmi_sys_vendor) |
| 549 | return false; |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 550 | |
| 551 | if (!(strstr(dmi_sys_vendor, "Hewlett-Packard"))) |
| 552 | return false; |
| 553 | |
| 554 | if (strstr(dmi_product_name, "Z420") || |
| 555 | strstr(dmi_product_name, "Z620") || |
Alexis R. Cortes | 4708097 | 2012-10-17 14:09:12 -0500 | [diff] [blame] | 556 | strstr(dmi_product_name, "Z820") || |
Alexis R. Cortes | b0e4e60 | 2012-11-08 16:59:27 -0600 | [diff] [blame] | 557 | strstr(dmi_product_name, "Z1 Workstation")) |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 558 | return true; |
| 559 | |
| 560 | return false; |
| 561 | } |
| 562 | |
| 563 | static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci) |
| 564 | { |
| 565 | return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1)); |
| 566 | } |
| 567 | |
| 568 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 569 | /* |
| 570 | * Initialize memory for HCD and xHC (one-time init). |
| 571 | * |
| 572 | * Program the PAGESIZE register, initialize the device context array, create |
| 573 | * device contexts (?), set up a command ring segment (or two?), create event |
| 574 | * ring (one for now). |
| 575 | */ |
| 576 | int xhci_init(struct usb_hcd *hcd) |
| 577 | { |
| 578 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 579 | int retval = 0; |
| 580 | |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 581 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init"); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 582 | spin_lock_init(&xhci->lock); |
Sebastian Andrzej Siewior | d782659 | 2011-09-13 16:41:10 -0700 | [diff] [blame] | 583 | if (xhci->hci_version == 0x95 && link_quirk) { |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 584 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 585 | "QUIRK: Not clearing Link TRB chain bits."); |
Sarah Sharp | b0567b3 | 2009-08-07 14:04:36 -0700 | [diff] [blame] | 586 | xhci->quirks |= XHCI_LINK_TRB_QUIRK; |
| 587 | } else { |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 588 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 589 | "xHCI doesn't need link TRB QUIRK"); |
Sarah Sharp | b0567b3 | 2009-08-07 14:04:36 -0700 | [diff] [blame] | 590 | } |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 591 | retval = xhci_mem_init(xhci, GFP_KERNEL); |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 592 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init"); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 593 | |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 594 | /* Initializing Compliance Mode Recovery Data If Needed */ |
Sarah Sharp | c3897aa | 2013-04-18 10:02:03 -0700 | [diff] [blame] | 595 | if (xhci_compliance_mode_recovery_timer_quirk_check()) { |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 596 | xhci->quirks |= XHCI_COMP_MODE_QUIRK; |
| 597 | compliance_mode_recovery_timer_init(xhci); |
| 598 | } |
| 599 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 600 | return retval; |
| 601 | } |
| 602 | |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 603 | /*-------------------------------------------------------------------------*/ |
| 604 | |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 605 | |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 606 | static int xhci_run_finished(struct xhci_hcd *xhci) |
| 607 | { |
| 608 | if (xhci_start(xhci)) { |
| 609 | xhci_halt(xhci); |
| 610 | return -ENODEV; |
| 611 | } |
| 612 | xhci->shared_hcd->state = HC_STATE_RUNNING; |
Elric Fu | c181bc5 | 2012-06-27 16:30:57 +0800 | [diff] [blame] | 613 | xhci->cmd_ring_state = CMD_RING_STATE_RUNNING; |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 614 | |
| 615 | if (xhci->quirks & XHCI_NEC_HOST) |
| 616 | xhci_ring_cmd_db(xhci); |
| 617 | |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 618 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 619 | "Finished xhci_run for USB3 roothub"); |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 620 | return 0; |
| 621 | } |
| 622 | |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 623 | /* |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 624 | * Start the HC after it was halted. |
| 625 | * |
| 626 | * This function is called by the USB core when the HC driver is added. |
| 627 | * Its opposite is xhci_stop(). |
| 628 | * |
| 629 | * xhci_init() must be called once before this function can be called. |
| 630 | * Reset the HC, enable device slot contexts, program DCBAAP, and |
| 631 | * set command ring pointer and event ring pointer. |
| 632 | * |
| 633 | * Setup MSI-X vectors and enable interrupts. |
| 634 | */ |
| 635 | int xhci_run(struct usb_hcd *hcd) |
| 636 | { |
| 637 | u32 temp; |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 638 | u64 temp_64; |
Sebastian Andrzej Siewior | 3fd1ec5 | 2011-09-23 14:19:57 -0700 | [diff] [blame] | 639 | int ret; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 640 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 641 | |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 642 | /* Start the xHCI host controller running only after the USB 2.0 roothub |
| 643 | * is setup. |
| 644 | */ |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 645 | |
Sarah Sharp | 0f2a793 | 2009-04-27 19:57:12 -0700 | [diff] [blame] | 646 | hcd->uses_new_polling = 1; |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 647 | if (!usb_hcd_is_primary_hcd(hcd)) |
| 648 | return xhci_run_finished(xhci); |
Sarah Sharp | 0f2a793 | 2009-04-27 19:57:12 -0700 | [diff] [blame] | 649 | |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 650 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run"); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 651 | |
Sebastian Andrzej Siewior | 3fd1ec5 | 2011-09-23 14:19:57 -0700 | [diff] [blame] | 652 | ret = xhci_try_enable_msi(hcd); |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 653 | if (ret) |
Sebastian Andrzej Siewior | 3fd1ec5 | 2011-09-23 14:19:57 -0700 | [diff] [blame] | 654 | return ret; |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 655 | |
Sarah Sharp | 66e49d8 | 2009-07-27 12:03:46 -0700 | [diff] [blame] | 656 | xhci_dbg(xhci, "Command ring memory map follows:\n"); |
| 657 | xhci_debug_ring(xhci, xhci->cmd_ring); |
| 658 | xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring); |
| 659 | xhci_dbg_cmd_ptrs(xhci); |
| 660 | |
| 661 | xhci_dbg(xhci, "ERST memory map follows:\n"); |
| 662 | xhci_dbg_erst(xhci, &xhci->erst); |
| 663 | xhci_dbg(xhci, "Event ring:\n"); |
| 664 | xhci_debug_ring(xhci, xhci->event_ring); |
| 665 | xhci_dbg_ring_ptrs(xhci, xhci->event_ring); |
Sarah Sharp | f7b2e40 | 2014-01-30 13:27:49 -0800 | [diff] [blame] | 666 | temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); |
Sarah Sharp | 66e49d8 | 2009-07-27 12:03:46 -0700 | [diff] [blame] | 667 | temp_64 &= ~ERST_PTR_MASK; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 668 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 669 | "ERST deq = 64'h%0lx", (long unsigned int) temp_64); |
Sarah Sharp | 66e49d8 | 2009-07-27 12:03:46 -0700 | [diff] [blame] | 670 | |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 671 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 672 | "// Set the interrupt modulation register"); |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 673 | temp = readl(&xhci->ir_set->irq_control); |
Sarah Sharp | a4d8830 | 2009-05-14 11:44:26 -0700 | [diff] [blame] | 674 | temp &= ~ER_IRQ_INTERVAL_MASK; |
Chunfeng Yun | 0cbd4b3 | 2015-11-24 13:09:55 +0200 | [diff] [blame] | 675 | /* |
| 676 | * the increment interval is 8 times as much as that defined |
| 677 | * in xHCI spec on MTK's controller |
| 678 | */ |
| 679 | temp |= (u32) ((xhci->quirks & XHCI_MTK_HOST) ? 20 : 160); |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 680 | writel(temp, &xhci->ir_set->irq_control); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 681 | |
| 682 | /* Set the HCD state before we enable the irqs */ |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 683 | temp = readl(&xhci->op_regs->command); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 684 | temp |= (CMD_EIE); |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 685 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 686 | "// Enable interrupts, cmd = 0x%x.", temp); |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 687 | writel(temp, &xhci->op_regs->command); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 688 | |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 689 | temp = readl(&xhci->ir_set->irq_pending); |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 690 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
Vamsi Krishna Samavedam | f826f83 | 2016-11-03 17:06:34 -0700 | [diff] [blame] | 691 | "// Enabling event ring interrupter %pK by writing 0x%x to irq_pending", |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 692 | xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp)); |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 693 | writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending); |
Dmitry Torokhov | 09ece30 | 2011-02-08 16:29:33 -0800 | [diff] [blame] | 694 | xhci_print_ir_set(xhci, 0); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 695 | |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 696 | if (xhci->quirks & XHCI_NEC_HOST) { |
| 697 | struct xhci_command *command; |
| 698 | command = xhci_alloc_command(xhci, false, false, GFP_KERNEL); |
| 699 | if (!command) |
| 700 | return -ENOMEM; |
| 701 | xhci_queue_vendor_command(xhci, command, 0, 0, 0, |
Sarah Sharp | 0238634 | 2010-05-24 13:25:28 -0700 | [diff] [blame] | 702 | TRB_TYPE(TRB_NEC_GET_FW)); |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 703 | } |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 704 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 705 | "Finished xhci_run for USB2 roothub"); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 706 | return 0; |
| 707 | } |
Andrew Bresticker | 436e8c7 | 2014-10-03 11:35:28 +0300 | [diff] [blame] | 708 | EXPORT_SYMBOL_GPL(xhci_run); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 709 | |
| 710 | /* |
| 711 | * Stop xHCI driver. |
| 712 | * |
| 713 | * This function is called by the USB core when the HC driver is removed. |
| 714 | * Its opposite is xhci_run(). |
| 715 | * |
| 716 | * Disable device contexts, disable IRQs, and quiesce the HC. |
| 717 | * Reset the HC, finish any completed transactions, and cleanup memory. |
| 718 | */ |
| 719 | void xhci_stop(struct usb_hcd *hcd) |
| 720 | { |
| 721 | u32 temp; |
| 722 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 723 | |
Roger Quadros | 8c24d6d | 2015-09-21 17:46:14 +0300 | [diff] [blame] | 724 | mutex_lock(&xhci->mutex); |
Roger Quadros | 8c24d6d | 2015-09-21 17:46:14 +0300 | [diff] [blame] | 725 | |
Gabriel Krisman Bertazi | 27a41a8 | 2016-06-01 18:09:07 +0300 | [diff] [blame] | 726 | if (!(xhci->xhc_state & XHCI_STATE_HALTED)) { |
| 727 | spin_lock_irq(&xhci->lock); |
| 728 | |
| 729 | xhci->xhc_state |= XHCI_STATE_HALTED; |
| 730 | xhci->cmd_ring_state = CMD_RING_STATE_STOPPED; |
| 731 | xhci_halt(xhci); |
| 732 | xhci_reset(xhci); |
| 733 | |
| 734 | spin_unlock_irq(&xhci->lock); |
| 735 | } |
| 736 | |
| 737 | if (!usb_hcd_is_primary_hcd(hcd)) { |
| 738 | mutex_unlock(&xhci->mutex); |
| 739 | return; |
| 740 | } |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 741 | |
Zhang Rui | 40a9fb1 | 2010-12-17 13:17:04 -0800 | [diff] [blame] | 742 | xhci_cleanup_msix(xhci); |
| 743 | |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 744 | /* Deleting Compliance Mode Recovery Timer */ |
| 745 | if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && |
Tony Camuso | 58b1d79 | 2013-04-05 14:27:07 -0400 | [diff] [blame] | 746 | (!(xhci_all_ports_seen_u0(xhci)))) { |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 747 | del_timer_sync(&xhci->comp_mode_recovery_timer); |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 748 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 749 | "%s: compliance mode recovery timer deleted", |
Tony Camuso | 58b1d79 | 2013-04-05 14:27:07 -0400 | [diff] [blame] | 750 | __func__); |
| 751 | } |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 752 | |
Andiry Xu | c41136b | 2011-03-22 17:08:14 +0800 | [diff] [blame] | 753 | if (xhci->quirks & XHCI_AMD_PLL_FIX) |
| 754 | usb_amd_dev_put(); |
| 755 | |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 756 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 757 | "// Disabling event ring interrupts"); |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 758 | temp = readl(&xhci->op_regs->status); |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 759 | writel(temp & ~STS_EINT, &xhci->op_regs->status); |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 760 | temp = readl(&xhci->ir_set->irq_pending); |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 761 | writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending); |
Dmitry Torokhov | 09ece30 | 2011-02-08 16:29:33 -0800 | [diff] [blame] | 762 | xhci_print_ir_set(xhci, 0); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 763 | |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 764 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory"); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 765 | xhci_mem_cleanup(xhci); |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 766 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 767 | "xhci_stop completed - status = %x", |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 768 | readl(&xhci->op_regs->status)); |
Roger Quadros | 85ac90f | 2015-09-21 17:46:12 +0300 | [diff] [blame] | 769 | mutex_unlock(&xhci->mutex); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 770 | } |
| 771 | |
| 772 | /* |
| 773 | * Shutdown HC (not bus-specific) |
| 774 | * |
| 775 | * This is called when the machine is rebooting or halting. We assume that the |
| 776 | * machine will be powered off, and the HC's internal state will be reset. |
| 777 | * Don't bother to free memory. |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 778 | * |
| 779 | * This will only ever be called with the main usb_hcd (the USB3 roothub). |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 780 | */ |
| 781 | void xhci_shutdown(struct usb_hcd *hcd) |
| 782 | { |
| 783 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 784 | |
Dan Carpenter | 052c7f9 | 2012-08-13 19:57:03 +0300 | [diff] [blame] | 785 | if (xhci->quirks & XHCI_SPURIOUS_REBOOT) |
Arnd Bergmann | a9ff911 | 2017-03-13 10:18:44 +0800 | [diff] [blame] | 786 | usb_disable_xhci_ports(to_pci_dev(hcd->self.sysdev)); |
Sarah Sharp | e95829f | 2012-07-23 18:59:30 +0300 | [diff] [blame] | 787 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 788 | spin_lock_irq(&xhci->lock); |
Lei wang | 00e4751 | 2018-02-02 11:22:38 +0800 | [diff] [blame] | 789 | if (!HCD_HW_ACCESSIBLE(hcd)) { |
| 790 | spin_unlock_irq(&xhci->lock); |
| 791 | return; |
| 792 | } |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 793 | xhci_halt(xhci); |
Takashi Iwai | 638298d | 2013-09-12 08:11:06 +0200 | [diff] [blame] | 794 | /* Workaround for spurious wakeups at shutdown with HSW */ |
| 795 | if (xhci->quirks & XHCI_SPURIOUS_WAKEUP) |
| 796 | xhci_reset(xhci); |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 797 | spin_unlock_irq(&xhci->lock); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 798 | |
Zhang Rui | 40a9fb1 | 2010-12-17 13:17:04 -0800 | [diff] [blame] | 799 | xhci_cleanup_msix(xhci); |
| 800 | |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 801 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 802 | "xhci_shutdown completed - status = %x", |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 803 | readl(&xhci->op_regs->status)); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 804 | } |
Henry Lin | 0b7da9a | 2019-12-11 16:20:04 +0200 | [diff] [blame] | 805 | EXPORT_SYMBOL_GPL(xhci_shutdown); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 806 | |
Sarah Sharp | b5b5c3a | 2010-10-15 11:24:14 -0700 | [diff] [blame] | 807 | #ifdef CONFIG_PM |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 808 | static void xhci_save_registers(struct xhci_hcd *xhci) |
| 809 | { |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 810 | xhci->s3.command = readl(&xhci->op_regs->command); |
| 811 | xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification); |
Sarah Sharp | f7b2e40 | 2014-01-30 13:27:49 -0800 | [diff] [blame] | 812 | xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 813 | xhci->s3.config_reg = readl(&xhci->op_regs->config_reg); |
| 814 | xhci->s3.erst_size = readl(&xhci->ir_set->erst_size); |
Sarah Sharp | f7b2e40 | 2014-01-30 13:27:49 -0800 | [diff] [blame] | 815 | xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base); |
| 816 | xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 817 | xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending); |
| 818 | xhci->s3.irq_control = readl(&xhci->ir_set->irq_control); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 819 | } |
| 820 | |
| 821 | static void xhci_restore_registers(struct xhci_hcd *xhci) |
| 822 | { |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 823 | writel(xhci->s3.command, &xhci->op_regs->command); |
| 824 | writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification); |
Sarah Sharp | 477632d | 2014-01-29 14:02:00 -0800 | [diff] [blame] | 825 | xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr); |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 826 | writel(xhci->s3.config_reg, &xhci->op_regs->config_reg); |
| 827 | writel(xhci->s3.erst_size, &xhci->ir_set->erst_size); |
Sarah Sharp | 477632d | 2014-01-29 14:02:00 -0800 | [diff] [blame] | 828 | xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base); |
| 829 | xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue); |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 830 | writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending); |
| 831 | writel(xhci->s3.irq_control, &xhci->ir_set->irq_control); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 832 | } |
| 833 | |
Sarah Sharp | 8982132 | 2010-11-12 11:59:31 -0800 | [diff] [blame] | 834 | static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci) |
| 835 | { |
| 836 | u64 val_64; |
| 837 | |
| 838 | /* step 2: initialize command ring buffer */ |
Sarah Sharp | f7b2e40 | 2014-01-30 13:27:49 -0800 | [diff] [blame] | 839 | val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); |
Sarah Sharp | 8982132 | 2010-11-12 11:59:31 -0800 | [diff] [blame] | 840 | val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) | |
| 841 | (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg, |
| 842 | xhci->cmd_ring->dequeue) & |
| 843 | (u64) ~CMD_RING_RSVD_BITS) | |
| 844 | xhci->cmd_ring->cycle_state; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 845 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 846 | "// Setting command ring address to 0x%llx", |
Sarah Sharp | 8982132 | 2010-11-12 11:59:31 -0800 | [diff] [blame] | 847 | (long unsigned long) val_64); |
Sarah Sharp | 477632d | 2014-01-29 14:02:00 -0800 | [diff] [blame] | 848 | xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring); |
Sarah Sharp | 8982132 | 2010-11-12 11:59:31 -0800 | [diff] [blame] | 849 | } |
| 850 | |
| 851 | /* |
| 852 | * The whole command ring must be cleared to zero when we suspend the host. |
| 853 | * |
| 854 | * The host doesn't save the command ring pointer in the suspend well, so we |
| 855 | * need to re-program it on resume. Unfortunately, the pointer must be 64-byte |
| 856 | * aligned, because of the reserved bits in the command ring dequeue pointer |
| 857 | * register. Therefore, we can't just set the dequeue pointer back in the |
| 858 | * middle of the ring (TRBs are 16-byte aligned). |
| 859 | */ |
| 860 | static void xhci_clear_command_ring(struct xhci_hcd *xhci) |
| 861 | { |
| 862 | struct xhci_ring *ring; |
| 863 | struct xhci_segment *seg; |
| 864 | |
| 865 | ring = xhci->cmd_ring; |
| 866 | seg = ring->deq_seg; |
| 867 | do { |
Andiry Xu | 158886c | 2011-11-30 16:37:41 +0800 | [diff] [blame] | 868 | memset(seg->trbs, 0, |
| 869 | sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1)); |
| 870 | seg->trbs[TRBS_PER_SEGMENT - 1].link.control &= |
| 871 | cpu_to_le32(~TRB_CYCLE); |
Sarah Sharp | 8982132 | 2010-11-12 11:59:31 -0800 | [diff] [blame] | 872 | seg = seg->next; |
| 873 | } while (seg != ring->deq_seg); |
| 874 | |
| 875 | /* Reset the software enqueue and dequeue pointers */ |
| 876 | ring->deq_seg = ring->first_seg; |
| 877 | ring->dequeue = ring->first_seg->trbs; |
| 878 | ring->enq_seg = ring->deq_seg; |
| 879 | ring->enqueue = ring->dequeue; |
| 880 | |
Andiry Xu | b008df6 | 2012-03-05 17:49:34 +0800 | [diff] [blame] | 881 | ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1; |
Sarah Sharp | 8982132 | 2010-11-12 11:59:31 -0800 | [diff] [blame] | 882 | /* |
| 883 | * Ring is now zeroed, so the HW should look for change of ownership |
| 884 | * when the cycle bit is set to 1. |
| 885 | */ |
| 886 | ring->cycle_state = 1; |
| 887 | |
| 888 | /* |
| 889 | * Reset the hardware dequeue pointer. |
| 890 | * Yes, this will need to be re-written after resume, but we're paranoid |
| 891 | * and want to make sure the hardware doesn't access bogus memory |
| 892 | * because, say, the BIOS or an SMI started the host without changing |
| 893 | * the command ring pointers. |
| 894 | */ |
| 895 | xhci_set_cmd_ring_deq(xhci); |
| 896 | } |
| 897 | |
Lu Baolu | a1377e5 | 2014-11-18 11:27:14 +0200 | [diff] [blame] | 898 | static void xhci_disable_port_wake_on_bits(struct xhci_hcd *xhci) |
| 899 | { |
| 900 | int port_index; |
| 901 | __le32 __iomem **port_array; |
| 902 | unsigned long flags; |
| 903 | u32 t1, t2; |
| 904 | |
| 905 | spin_lock_irqsave(&xhci->lock, flags); |
| 906 | |
| 907 | /* disble usb3 ports Wake bits*/ |
| 908 | port_index = xhci->num_usb3_ports; |
| 909 | port_array = xhci->usb3_ports; |
| 910 | while (port_index--) { |
| 911 | t1 = readl(port_array[port_index]); |
| 912 | t1 = xhci_port_state_to_neutral(t1); |
| 913 | t2 = t1 & ~PORT_WAKE_BITS; |
| 914 | if (t1 != t2) |
| 915 | writel(t2, port_array[port_index]); |
| 916 | } |
| 917 | |
| 918 | /* disble usb2 ports Wake bits*/ |
| 919 | port_index = xhci->num_usb2_ports; |
| 920 | port_array = xhci->usb2_ports; |
| 921 | while (port_index--) { |
| 922 | t1 = readl(port_array[port_index]); |
| 923 | t1 = xhci_port_state_to_neutral(t1); |
| 924 | t2 = t1 & ~PORT_WAKE_BITS; |
| 925 | if (t1 != t2) |
| 926 | writel(t2, port_array[port_index]); |
| 927 | } |
| 928 | |
| 929 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 930 | } |
| 931 | |
Mathias Nyman | 33b2110 | 2018-06-21 16:19:41 +0300 | [diff] [blame] | 932 | static bool xhci_pending_portevent(struct xhci_hcd *xhci) |
| 933 | { |
| 934 | __le32 __iomem **port_array; |
| 935 | int port_index; |
| 936 | u32 status; |
| 937 | u32 portsc; |
| 938 | |
| 939 | status = readl(&xhci->op_regs->status); |
| 940 | if (status & STS_EINT) |
| 941 | return true; |
| 942 | /* |
| 943 | * Checking STS_EINT is not enough as there is a lag between a change |
| 944 | * bit being set and the Port Status Change Event that it generated |
| 945 | * being written to the Event Ring. See note in xhci 1.1 section 4.19.2. |
| 946 | */ |
| 947 | |
| 948 | port_index = xhci->num_usb2_ports; |
| 949 | port_array = xhci->usb2_ports; |
| 950 | while (port_index--) { |
| 951 | portsc = readl(port_array[port_index]); |
| 952 | if (portsc & PORT_CHANGE_MASK || |
| 953 | (portsc & PORT_PLS_MASK) == XDEV_RESUME) |
| 954 | return true; |
| 955 | } |
| 956 | port_index = xhci->num_usb3_ports; |
| 957 | port_array = xhci->usb3_ports; |
| 958 | while (port_index--) { |
| 959 | portsc = readl(port_array[port_index]); |
| 960 | if (portsc & PORT_CHANGE_MASK || |
| 961 | (portsc & PORT_PLS_MASK) == XDEV_RESUME) |
| 962 | return true; |
| 963 | } |
| 964 | return false; |
| 965 | } |
| 966 | |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 967 | /* |
| 968 | * Stop HC (not bus-specific) |
| 969 | * |
| 970 | * This is called when the machine transition into S3/S4 mode. |
| 971 | * |
| 972 | */ |
Lu Baolu | a1377e5 | 2014-11-18 11:27:14 +0200 | [diff] [blame] | 973 | int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup) |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 974 | { |
| 975 | int rc = 0; |
Kai-Heng Feng | e3b1128 | 2019-12-11 16:20:05 +0200 | [diff] [blame] | 976 | unsigned int delay = XHCI_MAX_HALT_USEC * 2; |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 977 | struct usb_hcd *hcd = xhci_to_hcd(xhci); |
| 978 | u32 command; |
| 979 | |
Sriharsha Allenki | c79ef74 | 2018-05-17 11:34:11 +0530 | [diff] [blame] | 980 | if (!hcd->state || xhci->suspended) |
Roger Quadros | 9fa733f | 2015-05-29 17:01:50 +0300 | [diff] [blame] | 981 | return 0; |
| 982 | |
Felipe Balbi | 77b8476 | 2012-10-19 10:55:16 +0300 | [diff] [blame] | 983 | if (hcd->state != HC_STATE_SUSPENDED || |
| 984 | xhci->shared_hcd->state != HC_STATE_SUSPENDED) |
| 985 | return -EINVAL; |
| 986 | |
Lu Baolu | a1377e5 | 2014-11-18 11:27:14 +0200 | [diff] [blame] | 987 | /* Clear root port wake on bits if wakeup not allowed. */ |
| 988 | if (!do_wakeup) |
| 989 | xhci_disable_port_wake_on_bits(xhci); |
| 990 | |
Sarah Sharp | c52804a | 2012-11-27 12:30:23 -0800 | [diff] [blame] | 991 | /* Don't poll the roothubs on bus suspend. */ |
| 992 | xhci_dbg(xhci, "%s: stopping port polling.\n", __func__); |
| 993 | clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); |
| 994 | del_timer_sync(&hcd->rh_timer); |
Al Cooper | 14e61a1 | 2014-08-20 16:41:57 +0300 | [diff] [blame] | 995 | clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); |
| 996 | del_timer_sync(&xhci->shared_hcd->rh_timer); |
Sarah Sharp | c52804a | 2012-11-27 12:30:23 -0800 | [diff] [blame] | 997 | |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 998 | spin_lock_irq(&xhci->lock); |
| 999 | clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); |
Sarah Sharp | b320937 | 2011-03-07 11:24:07 -0800 | [diff] [blame] | 1000 | clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1001 | /* step 1: stop endpoint */ |
| 1002 | /* skipped assuming that port suspend has done */ |
| 1003 | |
| 1004 | /* step 2: clear Run/Stop bit */ |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 1005 | command = readl(&xhci->op_regs->command); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1006 | command &= ~CMD_RUN; |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 1007 | writel(command, &xhci->op_regs->command); |
Oliver Neukum | 455f589 | 2013-09-30 15:50:54 +0200 | [diff] [blame] | 1008 | |
| 1009 | /* Some chips from Fresco Logic need an extraordinary delay */ |
| 1010 | delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1; |
| 1011 | |
Lin Wang | dc0b177 | 2015-01-09 16:06:28 +0200 | [diff] [blame] | 1012 | if (xhci_handshake(&xhci->op_regs->status, |
Oliver Neukum | 455f589 | 2013-09-30 15:50:54 +0200 | [diff] [blame] | 1013 | STS_HALT, STS_HALT, delay)) { |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1014 | xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n"); |
| 1015 | spin_unlock_irq(&xhci->lock); |
| 1016 | return -ETIMEDOUT; |
| 1017 | } |
Sarah Sharp | 8982132 | 2010-11-12 11:59:31 -0800 | [diff] [blame] | 1018 | xhci_clear_command_ring(xhci); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1019 | |
| 1020 | /* step 3: save registers */ |
| 1021 | xhci_save_registers(xhci); |
| 1022 | |
| 1023 | /* step 4: set CSS flag */ |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 1024 | command = readl(&xhci->op_regs->command); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1025 | command |= CMD_CSS; |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 1026 | writel(command, &xhci->op_regs->command); |
Lin Wang | dc0b177 | 2015-01-09 16:06:28 +0200 | [diff] [blame] | 1027 | if (xhci_handshake(&xhci->op_regs->status, |
Kai-Heng Feng | a656cab | 2019-10-04 14:59:32 +0300 | [diff] [blame] | 1028 | STS_SAVE, 0, 20 * 1000)) { |
Andiry Xu | 622eb78 | 2012-06-13 10:51:57 +0800 | [diff] [blame] | 1029 | xhci_warn(xhci, "WARN: xHC save state timeout\n"); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1030 | spin_unlock_irq(&xhci->lock); |
| 1031 | return -ETIMEDOUT; |
| 1032 | } |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1033 | spin_unlock_irq(&xhci->lock); |
| 1034 | |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 1035 | /* |
| 1036 | * Deleting Compliance Mode Recovery Timer because the xHCI Host |
| 1037 | * is about to be suspended. |
| 1038 | */ |
| 1039 | if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && |
| 1040 | (!(xhci_all_ports_seen_u0(xhci)))) { |
| 1041 | del_timer_sync(&xhci->comp_mode_recovery_timer); |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 1042 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 1043 | "%s: compliance mode recovery timer deleted", |
Tony Camuso | 58b1d79 | 2013-04-05 14:27:07 -0400 | [diff] [blame] | 1044 | __func__); |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 1045 | } |
| 1046 | |
Andiry Xu | 0029227 | 2010-12-27 17:39:02 +0800 | [diff] [blame] | 1047 | /* step 5: remove core well power */ |
| 1048 | /* synchronize irq when using MSI-X */ |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 1049 | xhci_msix_sync_irqs(xhci); |
Sriharsha Allenki | c79ef74 | 2018-05-17 11:34:11 +0530 | [diff] [blame] | 1050 | xhci->suspended = true; |
Andiry Xu | 0029227 | 2010-12-27 17:39:02 +0800 | [diff] [blame] | 1051 | |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1052 | return rc; |
| 1053 | } |
Andrew Bresticker | 436e8c7 | 2014-10-03 11:35:28 +0300 | [diff] [blame] | 1054 | EXPORT_SYMBOL_GPL(xhci_suspend); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1055 | |
| 1056 | /* |
| 1057 | * start xHC (not bus-specific) |
| 1058 | * |
| 1059 | * This is called when the machine transition from S3/S4 mode. |
| 1060 | * |
| 1061 | */ |
| 1062 | int xhci_resume(struct xhci_hcd *xhci, bool hibernated) |
| 1063 | { |
Mathias Nyman | 33b2110 | 2018-06-21 16:19:41 +0300 | [diff] [blame] | 1064 | u32 command, temp = 0; |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1065 | struct usb_hcd *hcd = xhci_to_hcd(xhci); |
Sarah Sharp | 65b22f9 | 2010-12-17 12:35:05 -0800 | [diff] [blame] | 1066 | struct usb_hcd *secondary_hcd; |
Alan Stern | f69e3120 | 2011-11-03 11:37:10 -0400 | [diff] [blame] | 1067 | int retval = 0; |
Tony Camuso | 77df9e0 | 2013-02-21 16:11:27 -0500 | [diff] [blame] | 1068 | bool comp_timer_running = false; |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1069 | |
Sriharsha Allenki | c79ef74 | 2018-05-17 11:34:11 +0530 | [diff] [blame] | 1070 | if (!hcd->state || !xhci->suspended) |
Roger Quadros | 9fa733f | 2015-05-29 17:01:50 +0300 | [diff] [blame] | 1071 | return 0; |
| 1072 | |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 1073 | /* Wait a bit if either of the roothubs need to settle from the |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 1074 | * transition into bus suspend. |
Sarah Sharp | 20b67cf | 2010-12-15 12:47:14 -0800 | [diff] [blame] | 1075 | */ |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 1076 | if (time_before(jiffies, xhci->bus_state[0].next_statechange) || |
| 1077 | time_before(jiffies, |
| 1078 | xhci->bus_state[1].next_statechange)) |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1079 | msleep(100); |
| 1080 | |
Alan Stern | f69e3120 | 2011-11-03 11:37:10 -0400 | [diff] [blame] | 1081 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); |
| 1082 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags); |
| 1083 | |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1084 | spin_lock_irq(&xhci->lock); |
Maarten Lankhorst | c877b3b | 2011-06-15 23:47:21 +0200 | [diff] [blame] | 1085 | if (xhci->quirks & XHCI_RESET_ON_RESUME) |
| 1086 | hibernated = true; |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1087 | |
| 1088 | if (!hibernated) { |
Rick Tseng | 4b0f198 | 2019-10-04 14:59:30 +0300 | [diff] [blame] | 1089 | /* |
| 1090 | * Some controllers might lose power during suspend, so wait |
| 1091 | * for controller not ready bit to clear, just as in xHC init. |
| 1092 | */ |
| 1093 | retval = xhci_handshake(&xhci->op_regs->status, |
| 1094 | STS_CNR, 0, 10 * 1000 * 1000); |
| 1095 | if (retval) { |
| 1096 | xhci_warn(xhci, "Controller not ready at resume %d\n", |
| 1097 | retval); |
| 1098 | spin_unlock_irq(&xhci->lock); |
| 1099 | return retval; |
| 1100 | } |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1101 | /* step 1: restore register */ |
| 1102 | xhci_restore_registers(xhci); |
| 1103 | /* step 2: initialize command ring buffer */ |
Sarah Sharp | 8982132 | 2010-11-12 11:59:31 -0800 | [diff] [blame] | 1104 | xhci_set_cmd_ring_deq(xhci); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1105 | /* step 3: restore state and start state*/ |
| 1106 | /* step 3: set CRS flag */ |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 1107 | command = readl(&xhci->op_regs->command); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1108 | command |= CMD_CRS; |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 1109 | writel(command, &xhci->op_regs->command); |
Ajay Gupta | d5ff711 | 2018-06-21 16:19:45 +0300 | [diff] [blame] | 1110 | /* |
| 1111 | * Some controllers take up to 55+ ms to complete the controller |
| 1112 | * restore so setting the timeout to 100ms. Xhci specification |
| 1113 | * doesn't mention any timeout value. |
| 1114 | */ |
Lin Wang | dc0b177 | 2015-01-09 16:06:28 +0200 | [diff] [blame] | 1115 | if (xhci_handshake(&xhci->op_regs->status, |
Ajay Gupta | d5ff711 | 2018-06-21 16:19:45 +0300 | [diff] [blame] | 1116 | STS_RESTORE, 0, 100 * 1000)) { |
Andiry Xu | 622eb78 | 2012-06-13 10:51:57 +0800 | [diff] [blame] | 1117 | xhci_warn(xhci, "WARN: xHC restore state timeout\n"); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1118 | spin_unlock_irq(&xhci->lock); |
| 1119 | return -ETIMEDOUT; |
| 1120 | } |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 1121 | temp = readl(&xhci->op_regs->status); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1122 | } |
| 1123 | |
| 1124 | /* If restore operation fails, re-initialize the HC during resume */ |
| 1125 | if ((temp & STS_SRE) || hibernated) { |
Tony Camuso | 77df9e0 | 2013-02-21 16:11:27 -0500 | [diff] [blame] | 1126 | |
| 1127 | if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && |
| 1128 | !(xhci_all_ports_seen_u0(xhci))) { |
| 1129 | del_timer_sync(&xhci->comp_mode_recovery_timer); |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 1130 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 1131 | "Compliance Mode Recovery Timer deleted!"); |
Tony Camuso | 77df9e0 | 2013-02-21 16:11:27 -0500 | [diff] [blame] | 1132 | } |
| 1133 | |
Sarah Sharp | fedd383 | 2011-04-12 17:43:19 -0700 | [diff] [blame] | 1134 | /* Let the USB core know _both_ roothubs lost power. */ |
| 1135 | usb_root_hub_lost_power(xhci->main_hcd->self.root_hub); |
| 1136 | usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1137 | |
| 1138 | xhci_dbg(xhci, "Stop HCD\n"); |
| 1139 | xhci_halt(xhci); |
| 1140 | xhci_reset(xhci); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1141 | spin_unlock_irq(&xhci->lock); |
Andiry Xu | 0029227 | 2010-12-27 17:39:02 +0800 | [diff] [blame] | 1142 | xhci_cleanup_msix(xhci); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1143 | |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1144 | xhci_dbg(xhci, "// Disabling event ring interrupts\n"); |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 1145 | temp = readl(&xhci->op_regs->status); |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 1146 | writel(temp & ~STS_EINT, &xhci->op_regs->status); |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 1147 | temp = readl(&xhci->ir_set->irq_pending); |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 1148 | writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending); |
Dmitry Torokhov | 09ece30 | 2011-02-08 16:29:33 -0800 | [diff] [blame] | 1149 | xhci_print_ir_set(xhci, 0); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1150 | |
| 1151 | xhci_dbg(xhci, "cleaning up memory\n"); |
| 1152 | xhci_mem_cleanup(xhci); |
| 1153 | xhci_dbg(xhci, "xhci_stop completed - status = %x\n", |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 1154 | readl(&xhci->op_regs->status)); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1155 | |
Sarah Sharp | 65b22f9 | 2010-12-17 12:35:05 -0800 | [diff] [blame] | 1156 | /* USB core calls the PCI reinit and start functions twice: |
| 1157 | * first with the primary HCD, and then with the secondary HCD. |
| 1158 | * If we don't do the same, the host will never be started. |
| 1159 | */ |
| 1160 | if (!usb_hcd_is_primary_hcd(hcd)) |
| 1161 | secondary_hcd = hcd; |
| 1162 | else |
| 1163 | secondary_hcd = xhci->shared_hcd; |
| 1164 | |
| 1165 | xhci_dbg(xhci, "Initialize the xhci_hcd\n"); |
| 1166 | retval = xhci_init(hcd->primary_hcd); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1167 | if (retval) |
| 1168 | return retval; |
Tony Camuso | 77df9e0 | 2013-02-21 16:11:27 -0500 | [diff] [blame] | 1169 | comp_timer_running = true; |
| 1170 | |
Sarah Sharp | 65b22f9 | 2010-12-17 12:35:05 -0800 | [diff] [blame] | 1171 | xhci_dbg(xhci, "Start the primary HCD\n"); |
| 1172 | retval = xhci_run(hcd->primary_hcd); |
Sarah Sharp | b320937 | 2011-03-07 11:24:07 -0800 | [diff] [blame] | 1173 | if (!retval) { |
Alan Stern | f69e3120 | 2011-11-03 11:37:10 -0400 | [diff] [blame] | 1174 | xhci_dbg(xhci, "Start the secondary HCD\n"); |
| 1175 | retval = xhci_run(secondary_hcd); |
Sarah Sharp | b320937 | 2011-03-07 11:24:07 -0800 | [diff] [blame] | 1176 | } |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1177 | hcd->state = HC_STATE_SUSPENDED; |
Sarah Sharp | b320937 | 2011-03-07 11:24:07 -0800 | [diff] [blame] | 1178 | xhci->shared_hcd->state = HC_STATE_SUSPENDED; |
Alan Stern | f69e3120 | 2011-11-03 11:37:10 -0400 | [diff] [blame] | 1179 | goto done; |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1180 | } |
| 1181 | |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1182 | /* step 4: set Run/Stop bit */ |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 1183 | command = readl(&xhci->op_regs->command); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1184 | command |= CMD_RUN; |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 1185 | writel(command, &xhci->op_regs->command); |
Lin Wang | dc0b177 | 2015-01-09 16:06:28 +0200 | [diff] [blame] | 1186 | xhci_handshake(&xhci->op_regs->status, STS_HALT, |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1187 | 0, 250 * 1000); |
| 1188 | |
| 1189 | /* step 5: walk topology and initialize portsc, |
| 1190 | * portpmsc and portli |
| 1191 | */ |
| 1192 | /* this is done in bus_resume */ |
| 1193 | |
| 1194 | /* step 6: restart each of the previously |
| 1195 | * Running endpoints by ringing their doorbells |
| 1196 | */ |
| 1197 | |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1198 | spin_unlock_irq(&xhci->lock); |
Alan Stern | f69e3120 | 2011-11-03 11:37:10 -0400 | [diff] [blame] | 1199 | |
| 1200 | done: |
| 1201 | if (retval == 0) { |
Wang, Yu | d6236f6 | 2014-06-24 17:14:44 +0300 | [diff] [blame] | 1202 | /* Resume root hubs only when have pending events. */ |
Mathias Nyman | 33b2110 | 2018-06-21 16:19:41 +0300 | [diff] [blame] | 1203 | if (xhci_pending_portevent(xhci)) { |
Wang, Yu | d6236f6 | 2014-06-24 17:14:44 +0300 | [diff] [blame] | 1204 | usb_hcd_resume_root_hub(xhci->shared_hcd); |
Mathias Nyman | 671ffdf | 2016-04-08 16:25:06 +0300 | [diff] [blame] | 1205 | usb_hcd_resume_root_hub(hcd); |
Wang, Yu | d6236f6 | 2014-06-24 17:14:44 +0300 | [diff] [blame] | 1206 | } |
Alan Stern | f69e3120 | 2011-11-03 11:37:10 -0400 | [diff] [blame] | 1207 | } |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 1208 | |
| 1209 | /* |
| 1210 | * If system is subject to the Quirk, Compliance Mode Timer needs to |
| 1211 | * be re-initialized Always after a system resume. Ports are subject |
| 1212 | * to suffer the Compliance Mode issue again. It doesn't matter if |
| 1213 | * ports have entered previously to U0 before system's suspension. |
| 1214 | */ |
Tony Camuso | 77df9e0 | 2013-02-21 16:11:27 -0500 | [diff] [blame] | 1215 | if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running) |
Alexis R. Cortes | 71c731a | 2012-08-03 14:00:27 -0500 | [diff] [blame] | 1216 | compliance_mode_recovery_timer_init(xhci); |
| 1217 | |
Jiahau Chang | 24a950e | 2017-07-20 14:48:27 +0300 | [diff] [blame] | 1218 | if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL) |
| 1219 | usb_asmedia_modifyflowcontrol(to_pci_dev(hcd->self.controller)); |
| 1220 | |
Sarah Sharp | c52804a | 2012-11-27 12:30:23 -0800 | [diff] [blame] | 1221 | /* Re-enable port polling. */ |
| 1222 | xhci_dbg(xhci, "%s: starting port polling.\n", __func__); |
Sriharsha Allenki | c79ef74 | 2018-05-17 11:34:11 +0530 | [diff] [blame] | 1223 | xhci->suspended = false; |
Al Cooper | 14e61a1 | 2014-08-20 16:41:57 +0300 | [diff] [blame] | 1224 | set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); |
| 1225 | usb_hcd_poll_rh_status(xhci->shared_hcd); |
Mathias Nyman | 671ffdf | 2016-04-08 16:25:06 +0300 | [diff] [blame] | 1226 | set_bit(HCD_FLAG_POLL_RH, &hcd->flags); |
| 1227 | usb_hcd_poll_rh_status(hcd); |
Sarah Sharp | c52804a | 2012-11-27 12:30:23 -0800 | [diff] [blame] | 1228 | |
Alan Stern | f69e3120 | 2011-11-03 11:37:10 -0400 | [diff] [blame] | 1229 | return retval; |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 1230 | } |
Andrew Bresticker | 436e8c7 | 2014-10-03 11:35:28 +0300 | [diff] [blame] | 1231 | EXPORT_SYMBOL_GPL(xhci_resume); |
Sarah Sharp | b5b5c3a | 2010-10-15 11:24:14 -0700 | [diff] [blame] | 1232 | #endif /* CONFIG_PM */ |
| 1233 | |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 1234 | /*-------------------------------------------------------------------------*/ |
| 1235 | |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1236 | /** |
| 1237 | * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and |
| 1238 | * HCDs. Find the index for an endpoint given its descriptor. Use the return |
| 1239 | * value to right shift 1 for the bitmask. |
| 1240 | * |
| 1241 | * Index = (epnum * 2) + direction - 1, |
| 1242 | * where direction = 0 for OUT, 1 for IN. |
| 1243 | * For control endpoints, the IN index is used (OUT index is unused), so |
| 1244 | * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2) |
| 1245 | */ |
| 1246 | unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc) |
| 1247 | { |
| 1248 | unsigned int index; |
| 1249 | if (usb_endpoint_xfer_control(desc)) |
| 1250 | index = (unsigned int) (usb_endpoint_num(desc)*2); |
| 1251 | else |
| 1252 | index = (unsigned int) (usb_endpoint_num(desc)*2) + |
| 1253 | (usb_endpoint_dir_in(desc) ? 1 : 0) - 1; |
| 1254 | return index; |
| 1255 | } |
| 1256 | |
Julius Werner | 01c5f44 | 2013-04-15 15:55:04 -0700 | [diff] [blame] | 1257 | /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint |
| 1258 | * address from the XHCI endpoint index. |
| 1259 | */ |
| 1260 | unsigned int xhci_get_endpoint_address(unsigned int ep_index) |
| 1261 | { |
| 1262 | unsigned int number = DIV_ROUND_UP(ep_index, 2); |
| 1263 | unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN; |
| 1264 | return direction | number; |
| 1265 | } |
| 1266 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1267 | /* Find the flag for this endpoint (for use in the control context). Use the |
| 1268 | * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is |
| 1269 | * bit 1, etc. |
| 1270 | */ |
| 1271 | unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc) |
| 1272 | { |
| 1273 | return 1 << (xhci_get_endpoint_index(desc) + 1); |
| 1274 | } |
| 1275 | |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 1276 | /* Find the flag for this endpoint (for use in the control context). Use the |
| 1277 | * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is |
| 1278 | * bit 1, etc. |
| 1279 | */ |
| 1280 | unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index) |
| 1281 | { |
| 1282 | return 1 << (ep_index + 1); |
| 1283 | } |
| 1284 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1285 | /* Compute the last valid endpoint context index. Basically, this is the |
| 1286 | * endpoint index plus one. For slot contexts with more than valid endpoint, |
| 1287 | * we find the most significant bit set in the added contexts flags. |
| 1288 | * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000 |
| 1289 | * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one. |
| 1290 | */ |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 1291 | unsigned int xhci_last_valid_endpoint(u32 added_ctxs) |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1292 | { |
| 1293 | return fls(added_ctxs) - 1; |
| 1294 | } |
| 1295 | |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1296 | /* Returns 1 if the arguments are OK; |
| 1297 | * returns 0 this is a root hub; returns -EINVAL for NULL pointers. |
| 1298 | */ |
Dmitry Torokhov | 8212a49 | 2011-02-08 13:55:59 -0800 | [diff] [blame] | 1299 | static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev, |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1300 | struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev, |
| 1301 | const char *func) { |
| 1302 | struct xhci_hcd *xhci; |
| 1303 | struct xhci_virt_device *virt_dev; |
| 1304 | |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1305 | if (!hcd || (check_ep && !ep) || !udev) { |
Xenia Ragiadakou | 5c1127d | 2013-07-02 17:49:26 +0300 | [diff] [blame] | 1306 | pr_debug("xHCI %s called with invalid args\n", func); |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1307 | return -EINVAL; |
| 1308 | } |
| 1309 | if (!udev->parent) { |
Xenia Ragiadakou | 5c1127d | 2013-07-02 17:49:26 +0300 | [diff] [blame] | 1310 | pr_debug("xHCI %s called for root hub\n", func); |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1311 | return 0; |
| 1312 | } |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1313 | |
Sarah Sharp | 7bd89b4 | 2011-07-01 13:35:40 -0700 | [diff] [blame] | 1314 | xhci = hcd_to_xhci(hcd); |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1315 | if (check_virt_dev) { |
sifram.rajas@gmail.com | 73ddc24 | 2011-09-02 11:06:00 -0700 | [diff] [blame] | 1316 | if (!udev->slot_id || !xhci->devs[udev->slot_id]) { |
Xenia Ragiadakou | 5c1127d | 2013-07-02 17:49:26 +0300 | [diff] [blame] | 1317 | xhci_dbg(xhci, "xHCI %s called with unaddressed device\n", |
| 1318 | func); |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1319 | return -EINVAL; |
| 1320 | } |
| 1321 | |
| 1322 | virt_dev = xhci->devs[udev->slot_id]; |
| 1323 | if (virt_dev->udev != udev) { |
Xenia Ragiadakou | 5c1127d | 2013-07-02 17:49:26 +0300 | [diff] [blame] | 1324 | xhci_dbg(xhci, "xHCI %s called with udev and " |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1325 | "virt_dev does not match\n", func); |
| 1326 | return -EINVAL; |
| 1327 | } |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1328 | } |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1329 | |
Sarah Sharp | 203a866 | 2013-07-24 10:27:13 -0700 | [diff] [blame] | 1330 | if (xhci->xhc_state & XHCI_STATE_HALTED) |
| 1331 | return -ENODEV; |
| 1332 | |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1333 | return 1; |
| 1334 | } |
| 1335 | |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1336 | static int xhci_configure_endpoint(struct xhci_hcd *xhci, |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1337 | struct usb_device *udev, struct xhci_command *command, |
| 1338 | bool ctx_change, bool must_succeed); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1339 | |
| 1340 | /* |
| 1341 | * Full speed devices may have a max packet size greater than 8 bytes, but the |
| 1342 | * USB core doesn't know that until it reads the first 8 bytes of the |
| 1343 | * descriptor. If the usb_device's max packet size changes after that point, |
| 1344 | * we need to issue an evaluate context command and wait on it. |
| 1345 | */ |
| 1346 | static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id, |
| 1347 | unsigned int ep_index, struct urb *urb) |
| 1348 | { |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1349 | struct xhci_container_ctx *out_ctx; |
| 1350 | struct xhci_input_control_ctx *ctrl_ctx; |
| 1351 | struct xhci_ep_ctx *ep_ctx; |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 1352 | struct xhci_command *command; |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1353 | int max_packet_size; |
| 1354 | int hw_max_packet_size; |
| 1355 | int ret = 0; |
| 1356 | |
| 1357 | out_ctx = xhci->devs[slot_id]->out_ctx; |
| 1358 | ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1359 | hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2)); |
Kuninori Morimoto | 29cc889 | 2011-08-23 03:12:03 -0700 | [diff] [blame] | 1360 | max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1361 | if (hw_max_packet_size != max_packet_size) { |
Xenia Ragiadakou | 3a7fa5b | 2013-07-31 07:35:27 +0300 | [diff] [blame] | 1362 | xhci_dbg_trace(xhci, trace_xhci_dbg_context_change, |
| 1363 | "Max Packet Size for ep 0 changed."); |
| 1364 | xhci_dbg_trace(xhci, trace_xhci_dbg_context_change, |
| 1365 | "Max packet size in usb_device = %d", |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1366 | max_packet_size); |
Xenia Ragiadakou | 3a7fa5b | 2013-07-31 07:35:27 +0300 | [diff] [blame] | 1367 | xhci_dbg_trace(xhci, trace_xhci_dbg_context_change, |
| 1368 | "Max packet size in xHCI HW = %d", |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1369 | hw_max_packet_size); |
Xenia Ragiadakou | 3a7fa5b | 2013-07-31 07:35:27 +0300 | [diff] [blame] | 1370 | xhci_dbg_trace(xhci, trace_xhci_dbg_context_change, |
| 1371 | "Issuing evaluate context command."); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1372 | |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1373 | /* Set up the input context flags for the command */ |
| 1374 | /* FIXME: This won't work if a non-default control endpoint |
| 1375 | * changes max packet sizes. |
| 1376 | */ |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 1377 | |
| 1378 | command = xhci_alloc_command(xhci, false, true, GFP_KERNEL); |
| 1379 | if (!command) |
| 1380 | return -ENOMEM; |
| 1381 | |
| 1382 | command->in_ctx = xhci->devs[slot_id]->in_ctx; |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 1383 | ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 1384 | if (!ctrl_ctx) { |
| 1385 | xhci_warn(xhci, "%s: Could not get input context, bad type.\n", |
| 1386 | __func__); |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 1387 | ret = -ENOMEM; |
| 1388 | goto command_cleanup; |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 1389 | } |
| 1390 | /* Set up the modified control endpoint 0 */ |
| 1391 | xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx, |
| 1392 | xhci->devs[slot_id]->out_ctx, ep_index); |
| 1393 | |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 1394 | ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index); |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 1395 | ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK); |
| 1396 | ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size)); |
| 1397 | |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1398 | ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1399 | ctrl_ctx->drop_flags = 0; |
| 1400 | |
| 1401 | xhci_dbg(xhci, "Slot %d input context\n", slot_id); |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 1402 | xhci_dbg_ctx(xhci, command->in_ctx, ep_index); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1403 | xhci_dbg(xhci, "Slot %d output context\n", slot_id); |
| 1404 | xhci_dbg_ctx(xhci, out_ctx, ep_index); |
| 1405 | |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 1406 | ret = xhci_configure_endpoint(xhci, urb->dev, command, |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1407 | true, false); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1408 | |
| 1409 | /* Clean up the input context for later use by bandwidth |
| 1410 | * functions. |
| 1411 | */ |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1412 | ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG); |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 1413 | command_cleanup: |
| 1414 | kfree(command->completion); |
| 1415 | kfree(command); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1416 | } |
| 1417 | return ret; |
| 1418 | } |
| 1419 | |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1420 | /* |
| 1421 | * non-error returns are a promise to giveback() the urb later |
| 1422 | * we drop ownership so next owner (or urb unlink) can get it |
| 1423 | */ |
| 1424 | int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags) |
| 1425 | { |
| 1426 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
Andiry Xu | 2ffdea2 | 2011-09-02 11:05:57 -0700 | [diff] [blame] | 1427 | struct xhci_td *buffer; |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1428 | unsigned long flags; |
| 1429 | int ret = 0; |
| 1430 | unsigned int slot_id, ep_index; |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1431 | struct urb_priv *urb_priv; |
| 1432 | int size, i; |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1433 | |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1434 | if (!urb || xhci_check_args(hcd, urb->dev, urb->ep, |
| 1435 | true, true, __func__) <= 0) |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1436 | return -EINVAL; |
| 1437 | |
| 1438 | slot_id = urb->dev->slot_id; |
| 1439 | ep_index = xhci_get_endpoint_index(&urb->ep->desc); |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1440 | |
Alan Stern | 541c7d4 | 2010-06-22 16:39:10 -0400 | [diff] [blame] | 1441 | if (!HCD_HW_ACCESSIBLE(hcd)) { |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1442 | if (!in_interrupt()) |
| 1443 | xhci_dbg(xhci, "urb submitted during PCI suspend\n"); |
| 1444 | ret = -ESHUTDOWN; |
| 1445 | goto exit; |
| 1446 | } |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1447 | |
| 1448 | if (usb_endpoint_xfer_isoc(&urb->ep->desc)) |
| 1449 | size = urb->number_of_packets; |
Reyad Attiyat | 4758dcd | 2015-08-06 19:23:58 +0300 | [diff] [blame] | 1450 | else if (usb_endpoint_is_bulk_out(&urb->ep->desc) && |
| 1451 | urb->transfer_buffer_length > 0 && |
| 1452 | urb->transfer_flags & URB_ZERO_PACKET && |
| 1453 | !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc))) |
| 1454 | size = 2; |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1455 | else |
| 1456 | size = 1; |
| 1457 | |
| 1458 | urb_priv = kzalloc(sizeof(struct urb_priv) + |
| 1459 | size * sizeof(struct xhci_td *), mem_flags); |
| 1460 | if (!urb_priv) |
| 1461 | return -ENOMEM; |
| 1462 | |
Andiry Xu | 2ffdea2 | 2011-09-02 11:05:57 -0700 | [diff] [blame] | 1463 | buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags); |
| 1464 | if (!buffer) { |
| 1465 | kfree(urb_priv); |
| 1466 | return -ENOMEM; |
| 1467 | } |
| 1468 | |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1469 | for (i = 0; i < size; i++) { |
Andiry Xu | 2ffdea2 | 2011-09-02 11:05:57 -0700 | [diff] [blame] | 1470 | urb_priv->td[i] = buffer; |
| 1471 | buffer++; |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1472 | } |
| 1473 | |
| 1474 | urb_priv->length = size; |
| 1475 | urb_priv->td_cnt = 0; |
| 1476 | urb->hcpriv = urb_priv; |
| 1477 | |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1478 | if (usb_endpoint_xfer_control(&urb->ep->desc)) { |
| 1479 | /* Check to see if the max packet size for the default control |
| 1480 | * endpoint changed during FS device enumeration |
| 1481 | */ |
| 1482 | if (urb->dev->speed == USB_SPEED_FULL) { |
| 1483 | ret = xhci_check_maxpacket(xhci, slot_id, |
| 1484 | ep_index, urb); |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1485 | if (ret < 0) { |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 1486 | xhci_urb_free_priv(urb_priv); |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1487 | urb->hcpriv = NULL; |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1488 | return ret; |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1489 | } |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1490 | } |
| 1491 | |
Sarah Sharp | b11069f | 2009-07-27 12:03:23 -0700 | [diff] [blame] | 1492 | /* We have a spinlock and interrupts disabled, so we must pass |
| 1493 | * atomic context to this function, which may allocate memory. |
| 1494 | */ |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1495 | spin_lock_irqsave(&xhci->lock, flags); |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 1496 | if (xhci->xhc_state & XHCI_STATE_DYING) |
| 1497 | goto dying; |
Sarah Sharp | b11069f | 2009-07-27 12:03:23 -0700 | [diff] [blame] | 1498 | ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb, |
Sarah Sharp | 23e3be1 | 2009-04-29 19:05:20 -0700 | [diff] [blame] | 1499 | slot_id, ep_index); |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1500 | if (ret) |
| 1501 | goto free_priv; |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1502 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 1503 | } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) { |
| 1504 | spin_lock_irqsave(&xhci->lock, flags); |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 1505 | if (xhci->xhc_state & XHCI_STATE_DYING) |
| 1506 | goto dying; |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 1507 | if (xhci->devs[slot_id]->eps[ep_index].ep_state & |
| 1508 | EP_GETTING_STREAMS) { |
| 1509 | xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep " |
| 1510 | "is transitioning to using streams.\n"); |
| 1511 | ret = -EINVAL; |
| 1512 | } else if (xhci->devs[slot_id]->eps[ep_index].ep_state & |
| 1513 | EP_GETTING_NO_STREAMS) { |
| 1514 | xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep " |
| 1515 | "is transitioning to " |
| 1516 | "not having streams.\n"); |
| 1517 | ret = -EINVAL; |
| 1518 | } else { |
| 1519 | ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb, |
| 1520 | slot_id, ep_index); |
| 1521 | } |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1522 | if (ret) |
| 1523 | goto free_priv; |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1524 | spin_unlock_irqrestore(&xhci->lock, flags); |
Sarah Sharp | 624defa | 2009-09-02 12:14:28 -0700 | [diff] [blame] | 1525 | } else if (usb_endpoint_xfer_int(&urb->ep->desc)) { |
| 1526 | spin_lock_irqsave(&xhci->lock, flags); |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 1527 | if (xhci->xhc_state & XHCI_STATE_DYING) |
| 1528 | goto dying; |
Sarah Sharp | 624defa | 2009-09-02 12:14:28 -0700 | [diff] [blame] | 1529 | ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb, |
| 1530 | slot_id, ep_index); |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1531 | if (ret) |
| 1532 | goto free_priv; |
Sarah Sharp | 624defa | 2009-09-02 12:14:28 -0700 | [diff] [blame] | 1533 | spin_unlock_irqrestore(&xhci->lock, flags); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1534 | } else { |
Andiry Xu | 787f4e5 | 2010-07-22 15:23:52 -0700 | [diff] [blame] | 1535 | spin_lock_irqsave(&xhci->lock, flags); |
| 1536 | if (xhci->xhc_state & XHCI_STATE_DYING) |
| 1537 | goto dying; |
| 1538 | ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb, |
| 1539 | slot_id, ep_index); |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1540 | if (ret) |
| 1541 | goto free_priv; |
Andiry Xu | 787f4e5 | 2010-07-22 15:23:52 -0700 | [diff] [blame] | 1542 | spin_unlock_irqrestore(&xhci->lock, flags); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1543 | } |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1544 | exit: |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1545 | return ret; |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 1546 | dying: |
Vamsi Krishna Samavedam | f826f83 | 2016-11-03 17:06:34 -0700 | [diff] [blame] | 1547 | xhci_dbg(xhci, "Ep 0x%x: URB %pK submitted for " |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 1548 | "non-responsive xHCI host.\n", |
| 1549 | urb->ep->desc.bEndpointAddress, urb); |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1550 | ret = -ESHUTDOWN; |
| 1551 | free_priv: |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 1552 | xhci_urb_free_priv(urb_priv); |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1553 | urb->hcpriv = NULL; |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 1554 | spin_unlock_irqrestore(&xhci->lock, flags); |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1555 | return ret; |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1556 | } |
| 1557 | |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1558 | /* |
| 1559 | * Remove the URB's TD from the endpoint ring. This may cause the HC to stop |
| 1560 | * USB transfers, potentially stopping in the middle of a TRB buffer. The HC |
| 1561 | * should pick up where it left off in the TD, unless a Set Transfer Ring |
| 1562 | * Dequeue Pointer is issued. |
| 1563 | * |
| 1564 | * The TRBs that make up the buffers for the canceled URB will be "removed" from |
| 1565 | * the ring. Since the ring is a contiguous structure, they can't be physically |
| 1566 | * removed. Instead, there are two options: |
| 1567 | * |
| 1568 | * 1) If the HC is in the middle of processing the URB to be canceled, we |
| 1569 | * simply move the ring's dequeue pointer past those TRBs using the Set |
| 1570 | * Transfer Ring Dequeue Pointer command. This will be the common case, |
| 1571 | * when drivers timeout on the last submitted URB and attempt to cancel. |
| 1572 | * |
| 1573 | * 2) If the HC is in the middle of a different TD, we turn the TRBs into a |
| 1574 | * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The |
| 1575 | * HC will need to invalidate the any TRBs it has cached after the stop |
| 1576 | * endpoint command, as noted in the xHCI 0.95 errata. |
| 1577 | * |
| 1578 | * 3) The TD may have completed by the time the Stop Endpoint Command |
| 1579 | * completes, so software needs to handle that case too. |
| 1580 | * |
| 1581 | * This function should protect against the TD enqueueing code ringing the |
| 1582 | * doorbell while this code is waiting for a Stop Endpoint command to complete. |
| 1583 | * It also needs to account for multiple cancellations on happening at the same |
| 1584 | * time for the same endpoint. |
| 1585 | * |
| 1586 | * Note that this function can be called in any context, or so says |
| 1587 | * usb_hcd_unlink_urb() |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1588 | */ |
| 1589 | int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) |
| 1590 | { |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1591 | unsigned long flags; |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1592 | int ret, i; |
Sarah Sharp | e34b2fb | 2009-09-28 17:21:37 -0700 | [diff] [blame] | 1593 | u32 temp; |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1594 | struct xhci_hcd *xhci; |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1595 | struct urb_priv *urb_priv; |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1596 | struct xhci_td *td; |
| 1597 | unsigned int ep_index; |
| 1598 | struct xhci_ring *ep_ring; |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 1599 | struct xhci_virt_ep *ep; |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 1600 | struct xhci_command *command; |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1601 | |
| 1602 | xhci = hcd_to_xhci(hcd); |
| 1603 | spin_lock_irqsave(&xhci->lock, flags); |
| 1604 | /* Make sure the URB hasn't completed or been unlinked already */ |
| 1605 | ret = usb_hcd_check_unlink_urb(hcd, urb, status); |
| 1606 | if (ret || !urb->hcpriv) |
| 1607 | goto done; |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 1608 | temp = readl(&xhci->op_regs->status); |
Sarah Sharp | c6cc27c | 2011-03-11 10:20:58 -0800 | [diff] [blame] | 1609 | if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) { |
Xenia Ragiadakou | aa50b29 | 2013-08-14 06:33:54 +0300 | [diff] [blame] | 1610 | xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, |
| 1611 | "HW died, freeing TD."); |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1612 | urb_priv = urb->hcpriv; |
Mathias Nyman | 5c82171 | 2016-01-26 17:50:12 +0200 | [diff] [blame] | 1613 | for (i = urb_priv->td_cnt; |
| 1614 | i < urb_priv->length && xhci->devs[urb->dev->slot_id]; |
| 1615 | i++) { |
Sarah Sharp | 585df1d | 2011-08-02 15:43:40 -0700 | [diff] [blame] | 1616 | td = urb_priv->td[i]; |
| 1617 | if (!list_empty(&td->td_list)) |
| 1618 | list_del_init(&td->td_list); |
| 1619 | if (!list_empty(&td->cancelled_td_list)) |
| 1620 | list_del_init(&td->cancelled_td_list); |
| 1621 | } |
Sarah Sharp | e34b2fb | 2009-09-28 17:21:37 -0700 | [diff] [blame] | 1622 | |
| 1623 | usb_hcd_unlink_urb_from_ep(hcd, urb); |
| 1624 | spin_unlock_irqrestore(&xhci->lock, flags); |
Sarah Sharp | 214f76f | 2010-10-26 11:22:02 -0700 | [diff] [blame] | 1625 | usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN); |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 1626 | xhci_urb_free_priv(urb_priv); |
Sarah Sharp | e34b2fb | 2009-09-28 17:21:37 -0700 | [diff] [blame] | 1627 | return ret; |
| 1628 | } |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1629 | |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1630 | ep_index = xhci_get_endpoint_index(&urb->ep->desc); |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 1631 | ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index]; |
Sarah Sharp | e9df17e | 2010-04-02 15:34:43 -0700 | [diff] [blame] | 1632 | ep_ring = xhci_urb_to_transfer_ring(xhci, urb); |
| 1633 | if (!ep_ring) { |
| 1634 | ret = -EINVAL; |
| 1635 | goto done; |
| 1636 | } |
| 1637 | |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1638 | urb_priv = urb->hcpriv; |
Sarah Sharp | 79688ac | 2011-12-19 16:56:04 -0800 | [diff] [blame] | 1639 | i = urb_priv->td_cnt; |
| 1640 | if (i < urb_priv->length) |
Xenia Ragiadakou | aa50b29 | 2013-08-14 06:33:54 +0300 | [diff] [blame] | 1641 | xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, |
Vamsi Krishna Samavedam | f826f83 | 2016-11-03 17:06:34 -0700 | [diff] [blame] | 1642 | "Cancel URB %pK, dev %s, ep 0x%x, " |
Xenia Ragiadakou | aa50b29 | 2013-08-14 06:33:54 +0300 | [diff] [blame] | 1643 | "starting at offset 0x%llx", |
Sarah Sharp | 79688ac | 2011-12-19 16:56:04 -0800 | [diff] [blame] | 1644 | urb, urb->dev->devpath, |
| 1645 | urb->ep->desc.bEndpointAddress, |
| 1646 | (unsigned long long) xhci_trb_virt_to_dma( |
| 1647 | urb_priv->td[i]->start_seg, |
| 1648 | urb_priv->td[i]->first_trb)); |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1649 | |
Sarah Sharp | 79688ac | 2011-12-19 16:56:04 -0800 | [diff] [blame] | 1650 | for (; i < urb_priv->length; i++) { |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1651 | td = urb_priv->td[i]; |
| 1652 | list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list); |
| 1653 | } |
| 1654 | |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1655 | /* Queue a stop endpoint command, but only if this is |
| 1656 | * the first cancellation to be handled. |
| 1657 | */ |
Sarah Sharp | 678539c | 2009-10-27 10:55:52 -0700 | [diff] [blame] | 1658 | if (!(ep->ep_state & EP_HALT_PENDING)) { |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 1659 | command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC); |
Hans de Goede | a0ee619 | 2014-07-25 22:01:21 +0200 | [diff] [blame] | 1660 | if (!command) { |
| 1661 | ret = -ENOMEM; |
| 1662 | goto done; |
| 1663 | } |
Sarah Sharp | 678539c | 2009-10-27 10:55:52 -0700 | [diff] [blame] | 1664 | ep->ep_state |= EP_HALT_PENDING; |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 1665 | ep->stop_cmds_pending++; |
| 1666 | ep->stop_cmd_timer.expires = jiffies + |
| 1667 | XHCI_STOP_EP_CMD_TIMEOUT * HZ; |
| 1668 | add_timer(&ep->stop_cmd_timer); |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 1669 | xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id, |
| 1670 | ep_index, 0); |
Sarah Sharp | 23e3be1 | 2009-04-29 19:05:20 -0700 | [diff] [blame] | 1671 | xhci_ring_cmd_db(xhci); |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1672 | } |
| 1673 | done: |
| 1674 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 1675 | return ret; |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1676 | } |
| 1677 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1678 | /* Drop an endpoint from a new bandwidth configuration for this device. |
| 1679 | * Only one call to this function is allowed per endpoint before |
| 1680 | * check_bandwidth() or reset_bandwidth() must be called. |
| 1681 | * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will |
| 1682 | * add the endpoint to the schedule with possibly new parameters denoted by a |
| 1683 | * different endpoint descriptor in usb_host_endpoint. |
| 1684 | * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is |
| 1685 | * not allowed. |
Sarah Sharp | f88ba78 | 2009-05-14 11:44:22 -0700 | [diff] [blame] | 1686 | * |
| 1687 | * The USB core will not allow URBs to be queued to an endpoint that is being |
| 1688 | * disabled, so there's no need for mutual exclusion to protect |
| 1689 | * the xhci->devs[slot_id] structure. |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1690 | */ |
| 1691 | int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev, |
| 1692 | struct usb_host_endpoint *ep) |
| 1693 | { |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1694 | struct xhci_hcd *xhci; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1695 | struct xhci_container_ctx *in_ctx, *out_ctx; |
| 1696 | struct xhci_input_control_ctx *ctrl_ctx; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1697 | unsigned int ep_index; |
| 1698 | struct xhci_ep_ctx *ep_ctx; |
| 1699 | u32 drop_flag; |
Julius Werner | d675913 | 2014-06-24 17:14:42 +0300 | [diff] [blame] | 1700 | u32 new_add_flags, new_drop_flags; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1701 | int ret; |
| 1702 | |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1703 | ret = xhci_check_args(hcd, udev, ep, 1, true, __func__); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1704 | if (ret <= 0) |
| 1705 | return ret; |
| 1706 | xhci = hcd_to_xhci(hcd); |
Sarah Sharp | fe6c6c1 | 2011-05-23 16:41:17 -0700 | [diff] [blame] | 1707 | if (xhci->xhc_state & XHCI_STATE_DYING) |
| 1708 | return -ENODEV; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1709 | |
Vamsi Krishna Samavedam | f826f83 | 2016-11-03 17:06:34 -0700 | [diff] [blame] | 1710 | xhci_dbg(xhci, "%s called for udev %pK\n", __func__, udev); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1711 | drop_flag = xhci_get_endpoint_flag(&ep->desc); |
| 1712 | if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) { |
| 1713 | xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n", |
| 1714 | __func__, drop_flag); |
| 1715 | return 0; |
| 1716 | } |
| 1717 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1718 | in_ctx = xhci->devs[udev->slot_id]->in_ctx; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1719 | out_ctx = xhci->devs[udev->slot_id]->out_ctx; |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 1720 | ctrl_ctx = xhci_get_input_control_ctx(in_ctx); |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 1721 | if (!ctrl_ctx) { |
| 1722 | xhci_warn(xhci, "%s: Could not get input context, bad type.\n", |
| 1723 | __func__); |
| 1724 | return 0; |
| 1725 | } |
| 1726 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1727 | ep_index = xhci_get_endpoint_index(&ep->desc); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1728 | ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1729 | /* If the HC already knows the endpoint is disabled, |
| 1730 | * or the HCD has noted it is disabled, ignore this request |
| 1731 | */ |
Matt Evans | f5960b6 | 2011-06-01 10:22:55 +1000 | [diff] [blame] | 1732 | if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) == |
| 1733 | cpu_to_le32(EP_STATE_DISABLED)) || |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1734 | le32_to_cpu(ctrl_ctx->drop_flags) & |
| 1735 | xhci_get_endpoint_flag(&ep->desc)) { |
Hans de Goede | a613413 | 2015-01-16 17:54:02 +0200 | [diff] [blame] | 1736 | /* Do not warn when called after a usb_device_reset */ |
| 1737 | if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL) |
Vamsi Krishna Samavedam | f826f83 | 2016-11-03 17:06:34 -0700 | [diff] [blame] | 1738 | xhci_warn(xhci, "xHCI %s called with disabled ep %pK\n", |
Hans de Goede | a613413 | 2015-01-16 17:54:02 +0200 | [diff] [blame] | 1739 | __func__, ep); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1740 | return 0; |
| 1741 | } |
| 1742 | |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1743 | ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag); |
| 1744 | new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1745 | |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1746 | ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag); |
| 1747 | new_add_flags = le32_to_cpu(ctrl_ctx->add_flags); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1748 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1749 | xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep); |
| 1750 | |
Chunfeng Yun | 0cbd4b3 | 2015-11-24 13:09:55 +0200 | [diff] [blame] | 1751 | if (xhci->quirks & XHCI_MTK_HOST) |
| 1752 | xhci_mtk_drop_ep_quirk(hcd, udev, ep); |
| 1753 | |
Julius Werner | d675913 | 2014-06-24 17:14:42 +0300 | [diff] [blame] | 1754 | xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n", |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1755 | (unsigned int) ep->desc.bEndpointAddress, |
| 1756 | udev->slot_id, |
| 1757 | (unsigned int) new_drop_flags, |
Julius Werner | d675913 | 2014-06-24 17:14:42 +0300 | [diff] [blame] | 1758 | (unsigned int) new_add_flags); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1759 | return 0; |
| 1760 | } |
| 1761 | |
| 1762 | /* Add an endpoint to a new possible bandwidth configuration for this device. |
| 1763 | * Only one call to this function is allowed per endpoint before |
| 1764 | * check_bandwidth() or reset_bandwidth() must be called. |
| 1765 | * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will |
| 1766 | * add the endpoint to the schedule with possibly new parameters denoted by a |
| 1767 | * different endpoint descriptor in usb_host_endpoint. |
| 1768 | * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is |
| 1769 | * not allowed. |
Sarah Sharp | f88ba78 | 2009-05-14 11:44:22 -0700 | [diff] [blame] | 1770 | * |
| 1771 | * The USB core will not allow URBs to be queued to an endpoint until the |
| 1772 | * configuration or alt setting is installed in the device, so there's no need |
| 1773 | * for mutual exclusion to protect the xhci->devs[slot_id] structure. |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1774 | */ |
| 1775 | int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev, |
| 1776 | struct usb_host_endpoint *ep) |
| 1777 | { |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1778 | struct xhci_hcd *xhci; |
Lin Wang | 92c9691 | 2015-01-09 16:06:27 +0200 | [diff] [blame] | 1779 | struct xhci_container_ctx *in_ctx; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1780 | unsigned int ep_index; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1781 | struct xhci_input_control_ctx *ctrl_ctx; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1782 | u32 added_ctxs; |
Julius Werner | d675913 | 2014-06-24 17:14:42 +0300 | [diff] [blame] | 1783 | u32 new_add_flags, new_drop_flags; |
Sarah Sharp | fa75ac3 | 2011-06-05 23:10:04 -0700 | [diff] [blame] | 1784 | struct xhci_virt_device *virt_dev; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1785 | int ret = 0; |
| 1786 | |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1787 | ret = xhci_check_args(hcd, udev, ep, 1, true, __func__); |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 1788 | if (ret <= 0) { |
| 1789 | /* So we won't queue a reset ep command for a root hub */ |
| 1790 | ep->hcpriv = NULL; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1791 | return ret; |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 1792 | } |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1793 | xhci = hcd_to_xhci(hcd); |
Sarah Sharp | fe6c6c1 | 2011-05-23 16:41:17 -0700 | [diff] [blame] | 1794 | if (xhci->xhc_state & XHCI_STATE_DYING) |
| 1795 | return -ENODEV; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1796 | |
| 1797 | added_ctxs = xhci_get_endpoint_flag(&ep->desc); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1798 | if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) { |
| 1799 | /* FIXME when we have to issue an evaluate endpoint command to |
| 1800 | * deal with ep0 max packet size changing once we get the |
| 1801 | * descriptors |
| 1802 | */ |
| 1803 | xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n", |
| 1804 | __func__, added_ctxs); |
| 1805 | return 0; |
| 1806 | } |
| 1807 | |
Sarah Sharp | fa75ac3 | 2011-06-05 23:10:04 -0700 | [diff] [blame] | 1808 | virt_dev = xhci->devs[udev->slot_id]; |
| 1809 | in_ctx = virt_dev->in_ctx; |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 1810 | ctrl_ctx = xhci_get_input_control_ctx(in_ctx); |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 1811 | if (!ctrl_ctx) { |
| 1812 | xhci_warn(xhci, "%s: Could not get input context, bad type.\n", |
| 1813 | __func__); |
| 1814 | return 0; |
| 1815 | } |
Sarah Sharp | fa75ac3 | 2011-06-05 23:10:04 -0700 | [diff] [blame] | 1816 | |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 1817 | ep_index = xhci_get_endpoint_index(&ep->desc); |
Sarah Sharp | fa75ac3 | 2011-06-05 23:10:04 -0700 | [diff] [blame] | 1818 | /* If this endpoint is already in use, and the upper layers are trying |
| 1819 | * to add it again without dropping it, reject the addition. |
| 1820 | */ |
| 1821 | if (virt_dev->eps[ep_index].ring && |
Lin Wang | 92c9691 | 2015-01-09 16:06:27 +0200 | [diff] [blame] | 1822 | !(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) { |
Sarah Sharp | fa75ac3 | 2011-06-05 23:10:04 -0700 | [diff] [blame] | 1823 | xhci_warn(xhci, "Trying to add endpoint 0x%x " |
| 1824 | "without dropping it.\n", |
| 1825 | (unsigned int) ep->desc.bEndpointAddress); |
| 1826 | return -EINVAL; |
| 1827 | } |
| 1828 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1829 | /* If the HCD has already noted the endpoint is enabled, |
| 1830 | * ignore this request. |
| 1831 | */ |
Lin Wang | 92c9691 | 2015-01-09 16:06:27 +0200 | [diff] [blame] | 1832 | if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) { |
Vamsi Krishna Samavedam | f826f83 | 2016-11-03 17:06:34 -0700 | [diff] [blame] | 1833 | xhci_warn(xhci, "xHCI %s called with enabled ep %pK\n", |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 1834 | __func__, ep); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1835 | return 0; |
| 1836 | } |
| 1837 | |
Sarah Sharp | f88ba78 | 2009-05-14 11:44:22 -0700 | [diff] [blame] | 1838 | /* |
| 1839 | * Configuration and alternate setting changes must be done in |
| 1840 | * process context, not interrupt context (or so documenation |
| 1841 | * for usb_set_interface() and usb_set_configuration() claim). |
| 1842 | */ |
Sarah Sharp | fa75ac3 | 2011-06-05 23:10:04 -0700 | [diff] [blame] | 1843 | if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) { |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1844 | dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n", |
| 1845 | __func__, ep->desc.bEndpointAddress); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1846 | return -ENOMEM; |
| 1847 | } |
| 1848 | |
Chunfeng Yun | 0cbd4b3 | 2015-11-24 13:09:55 +0200 | [diff] [blame] | 1849 | if (xhci->quirks & XHCI_MTK_HOST) { |
| 1850 | ret = xhci_mtk_add_ep_quirk(hcd, udev, ep); |
| 1851 | if (ret < 0) { |
| 1852 | xhci_free_or_cache_endpoint_ring(xhci, |
| 1853 | virt_dev, ep_index); |
| 1854 | return ret; |
| 1855 | } |
| 1856 | } |
| 1857 | |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1858 | ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs); |
| 1859 | new_add_flags = le32_to_cpu(ctrl_ctx->add_flags); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1860 | |
| 1861 | /* If xhci_endpoint_disable() was called for this endpoint, but the |
| 1862 | * xHC hasn't been notified yet through the check_bandwidth() call, |
| 1863 | * this re-adds a new state for the endpoint from the new endpoint |
| 1864 | * descriptors. We must drop and re-add this endpoint, so we leave the |
| 1865 | * drop flags alone. |
| 1866 | */ |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1867 | new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1868 | |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 1869 | /* Store the usb_device pointer for later use */ |
| 1870 | ep->hcpriv = udev; |
| 1871 | |
Julius Werner | d675913 | 2014-06-24 17:14:42 +0300 | [diff] [blame] | 1872 | xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n", |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1873 | (unsigned int) ep->desc.bEndpointAddress, |
| 1874 | udev->slot_id, |
| 1875 | (unsigned int) new_drop_flags, |
Julius Werner | d675913 | 2014-06-24 17:14:42 +0300 | [diff] [blame] | 1876 | (unsigned int) new_add_flags); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1877 | return 0; |
| 1878 | } |
| 1879 | |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1880 | static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev) |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1881 | { |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1882 | struct xhci_input_control_ctx *ctrl_ctx; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1883 | struct xhci_ep_ctx *ep_ctx; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1884 | struct xhci_slot_ctx *slot_ctx; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1885 | int i; |
| 1886 | |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 1887 | ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx); |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 1888 | if (!ctrl_ctx) { |
| 1889 | xhci_warn(xhci, "%s: Could not get input context, bad type.\n", |
| 1890 | __func__); |
| 1891 | return; |
| 1892 | } |
| 1893 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1894 | /* When a device's add flag and drop flag are zero, any subsequent |
| 1895 | * configure endpoint command will leave that endpoint's state |
| 1896 | * untouched. Make sure we don't leave any old state in the input |
| 1897 | * endpoint contexts. |
| 1898 | */ |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1899 | ctrl_ctx->drop_flags = 0; |
| 1900 | ctrl_ctx->add_flags = 0; |
| 1901 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1902 | slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1903 | /* Endpoint 0 is always valid */ |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1904 | slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1)); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1905 | for (i = 1; i < 31; ++i) { |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1906 | ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1907 | ep_ctx->ep_info = 0; |
| 1908 | ep_ctx->ep_info2 = 0; |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 1909 | ep_ctx->deq = 0; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1910 | ep_ctx->tx_info = 0; |
| 1911 | } |
| 1912 | } |
| 1913 | |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1914 | static int xhci_configure_endpoint_result(struct xhci_hcd *xhci, |
Sarah Sharp | 00161f7 | 2011-04-28 12:23:23 -0700 | [diff] [blame] | 1915 | struct usb_device *udev, u32 *cmd_status) |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1916 | { |
| 1917 | int ret; |
| 1918 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1919 | switch (*cmd_status) { |
Mathias Nyman | c311e39 | 2014-05-08 19:26:03 +0300 | [diff] [blame] | 1920 | case COMP_CMD_ABORT: |
| 1921 | case COMP_CMD_STOP: |
| 1922 | xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n"); |
| 1923 | ret = -ETIME; |
| 1924 | break; |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1925 | case COMP_ENOMEM: |
Oliver Neukum | 288c0f4 | 2014-06-02 15:25:17 +0200 | [diff] [blame] | 1926 | dev_warn(&udev->dev, |
| 1927 | "Not enough host controller resources for new device state.\n"); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1928 | ret = -ENOMEM; |
| 1929 | /* FIXME: can we allocate more resources for the HC? */ |
| 1930 | break; |
| 1931 | case COMP_BW_ERR: |
Hans de Goede | 71d8572 | 2012-01-04 23:29:18 +0100 | [diff] [blame] | 1932 | case COMP_2ND_BW_ERR: |
Oliver Neukum | 288c0f4 | 2014-06-02 15:25:17 +0200 | [diff] [blame] | 1933 | dev_warn(&udev->dev, |
| 1934 | "Not enough bandwidth for new device state.\n"); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1935 | ret = -ENOSPC; |
| 1936 | /* FIXME: can we go back to the old state? */ |
| 1937 | break; |
| 1938 | case COMP_TRB_ERR: |
| 1939 | /* the HCD set up something wrong */ |
| 1940 | dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, " |
| 1941 | "add flag = 1, " |
| 1942 | "and endpoint is not disabled.\n"); |
| 1943 | ret = -EINVAL; |
| 1944 | break; |
Alex He | f6ba6fe | 2011-06-08 18:34:06 +0800 | [diff] [blame] | 1945 | case COMP_DEV_ERR: |
Oliver Neukum | 288c0f4 | 2014-06-02 15:25:17 +0200 | [diff] [blame] | 1946 | dev_warn(&udev->dev, |
| 1947 | "ERROR: Incompatible device for endpoint configure command.\n"); |
Alex He | f6ba6fe | 2011-06-08 18:34:06 +0800 | [diff] [blame] | 1948 | ret = -ENODEV; |
| 1949 | break; |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1950 | case COMP_SUCCESS: |
Xenia Ragiadakou | 3a7fa5b | 2013-07-31 07:35:27 +0300 | [diff] [blame] | 1951 | xhci_dbg_trace(xhci, trace_xhci_dbg_context_change, |
| 1952 | "Successful Endpoint Configure command"); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1953 | ret = 0; |
| 1954 | break; |
| 1955 | default: |
Oliver Neukum | 288c0f4 | 2014-06-02 15:25:17 +0200 | [diff] [blame] | 1956 | xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n", |
| 1957 | *cmd_status); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1958 | ret = -EINVAL; |
| 1959 | break; |
| 1960 | } |
| 1961 | return ret; |
| 1962 | } |
| 1963 | |
| 1964 | static int xhci_evaluate_context_result(struct xhci_hcd *xhci, |
Sarah Sharp | 00161f7 | 2011-04-28 12:23:23 -0700 | [diff] [blame] | 1965 | struct usb_device *udev, u32 *cmd_status) |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1966 | { |
| 1967 | int ret; |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1968 | struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id]; |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1969 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1970 | switch (*cmd_status) { |
Mathias Nyman | c311e39 | 2014-05-08 19:26:03 +0300 | [diff] [blame] | 1971 | case COMP_CMD_ABORT: |
| 1972 | case COMP_CMD_STOP: |
| 1973 | xhci_warn(xhci, "Timeout while waiting for evaluate context command\n"); |
| 1974 | ret = -ETIME; |
| 1975 | break; |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1976 | case COMP_EINVAL: |
Oliver Neukum | 288c0f4 | 2014-06-02 15:25:17 +0200 | [diff] [blame] | 1977 | dev_warn(&udev->dev, |
| 1978 | "WARN: xHCI driver setup invalid evaluate context command.\n"); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1979 | ret = -EINVAL; |
| 1980 | break; |
| 1981 | case COMP_EBADSLT: |
Oliver Neukum | 288c0f4 | 2014-06-02 15:25:17 +0200 | [diff] [blame] | 1982 | dev_warn(&udev->dev, |
| 1983 | "WARN: slot not enabled for evaluate context command.\n"); |
Sarah Sharp | b803134 | 2012-10-16 13:26:22 -0700 | [diff] [blame] | 1984 | ret = -EINVAL; |
| 1985 | break; |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1986 | case COMP_CTX_STATE: |
Oliver Neukum | 288c0f4 | 2014-06-02 15:25:17 +0200 | [diff] [blame] | 1987 | dev_warn(&udev->dev, |
| 1988 | "WARN: invalid context state for evaluate context command.\n"); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1989 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1); |
| 1990 | ret = -EINVAL; |
| 1991 | break; |
Alex He | f6ba6fe | 2011-06-08 18:34:06 +0800 | [diff] [blame] | 1992 | case COMP_DEV_ERR: |
Oliver Neukum | 288c0f4 | 2014-06-02 15:25:17 +0200 | [diff] [blame] | 1993 | dev_warn(&udev->dev, |
| 1994 | "ERROR: Incompatible device for evaluate context command.\n"); |
Alex He | f6ba6fe | 2011-06-08 18:34:06 +0800 | [diff] [blame] | 1995 | ret = -ENODEV; |
| 1996 | break; |
Alex He | 1bb73a8 | 2011-05-05 18:14:12 +0800 | [diff] [blame] | 1997 | case COMP_MEL_ERR: |
| 1998 | /* Max Exit Latency too large error */ |
| 1999 | dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n"); |
| 2000 | ret = -EINVAL; |
| 2001 | break; |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2002 | case COMP_SUCCESS: |
Xenia Ragiadakou | 3a7fa5b | 2013-07-31 07:35:27 +0300 | [diff] [blame] | 2003 | xhci_dbg_trace(xhci, trace_xhci_dbg_context_change, |
| 2004 | "Successful evaluate context command"); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2005 | ret = 0; |
| 2006 | break; |
| 2007 | default: |
Oliver Neukum | 288c0f4 | 2014-06-02 15:25:17 +0200 | [diff] [blame] | 2008 | xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n", |
| 2009 | *cmd_status); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2010 | ret = -EINVAL; |
| 2011 | break; |
| 2012 | } |
| 2013 | return ret; |
| 2014 | } |
| 2015 | |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2016 | static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci, |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2017 | struct xhci_input_control_ctx *ctrl_ctx) |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2018 | { |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2019 | u32 valid_add_flags; |
| 2020 | u32 valid_drop_flags; |
| 2021 | |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2022 | /* Ignore the slot flag (bit 0), and the default control endpoint flag |
| 2023 | * (bit 1). The default control endpoint is added during the Address |
| 2024 | * Device command and is never removed until the slot is disabled. |
| 2025 | */ |
Xenia Ragiadakou | ef73400 | 2013-09-09 21:03:06 +0300 | [diff] [blame] | 2026 | valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2; |
| 2027 | valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2; |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2028 | |
| 2029 | /* Use hweight32 to count the number of ones in the add flags, or |
| 2030 | * number of endpoints added. Don't count endpoints that are changed |
| 2031 | * (both added and dropped). |
| 2032 | */ |
| 2033 | return hweight32(valid_add_flags) - |
| 2034 | hweight32(valid_add_flags & valid_drop_flags); |
| 2035 | } |
| 2036 | |
| 2037 | static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci, |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2038 | struct xhci_input_control_ctx *ctrl_ctx) |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2039 | { |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2040 | u32 valid_add_flags; |
| 2041 | u32 valid_drop_flags; |
| 2042 | |
Xenia Ragiadakou | 78d1ff0 | 2013-09-09 21:03:07 +0300 | [diff] [blame] | 2043 | valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2; |
| 2044 | valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2; |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2045 | |
| 2046 | return hweight32(valid_drop_flags) - |
| 2047 | hweight32(valid_add_flags & valid_drop_flags); |
| 2048 | } |
| 2049 | |
| 2050 | /* |
| 2051 | * We need to reserve the new number of endpoints before the configure endpoint |
| 2052 | * command completes. We can't subtract the dropped endpoints from the number |
| 2053 | * of active endpoints until the command completes because we can oversubscribe |
| 2054 | * the host in this case: |
| 2055 | * |
| 2056 | * - the first configure endpoint command drops more endpoints than it adds |
| 2057 | * - a second configure endpoint command that adds more endpoints is queued |
| 2058 | * - the first configure endpoint command fails, so the config is unchanged |
| 2059 | * - the second command may succeed, even though there isn't enough resources |
| 2060 | * |
| 2061 | * Must be called with xhci->lock held. |
| 2062 | */ |
| 2063 | static int xhci_reserve_host_resources(struct xhci_hcd *xhci, |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2064 | struct xhci_input_control_ctx *ctrl_ctx) |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2065 | { |
| 2066 | u32 added_eps; |
| 2067 | |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2068 | added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx); |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2069 | if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) { |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 2070 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 2071 | "Not enough ep ctxs: " |
| 2072 | "%u active, need to add %u, limit is %u.", |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2073 | xhci->num_active_eps, added_eps, |
| 2074 | xhci->limit_active_eps); |
| 2075 | return -ENOMEM; |
| 2076 | } |
| 2077 | xhci->num_active_eps += added_eps; |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 2078 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 2079 | "Adding %u ep ctxs, %u now active.", added_eps, |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2080 | xhci->num_active_eps); |
| 2081 | return 0; |
| 2082 | } |
| 2083 | |
| 2084 | /* |
| 2085 | * The configure endpoint was failed by the xHC for some other reason, so we |
| 2086 | * need to revert the resources that failed configuration would have used. |
| 2087 | * |
| 2088 | * Must be called with xhci->lock held. |
| 2089 | */ |
| 2090 | static void xhci_free_host_resources(struct xhci_hcd *xhci, |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2091 | struct xhci_input_control_ctx *ctrl_ctx) |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2092 | { |
| 2093 | u32 num_failed_eps; |
| 2094 | |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2095 | num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx); |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2096 | xhci->num_active_eps -= num_failed_eps; |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 2097 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 2098 | "Removing %u failed ep ctxs, %u now active.", |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2099 | num_failed_eps, |
| 2100 | xhci->num_active_eps); |
| 2101 | } |
| 2102 | |
| 2103 | /* |
| 2104 | * Now that the command has completed, clean up the active endpoint count by |
| 2105 | * subtracting out the endpoints that were dropped (but not changed). |
| 2106 | * |
| 2107 | * Must be called with xhci->lock held. |
| 2108 | */ |
| 2109 | static void xhci_finish_resource_reservation(struct xhci_hcd *xhci, |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2110 | struct xhci_input_control_ctx *ctrl_ctx) |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2111 | { |
| 2112 | u32 num_dropped_eps; |
| 2113 | |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2114 | num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx); |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2115 | xhci->num_active_eps -= num_dropped_eps; |
| 2116 | if (num_dropped_eps) |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 2117 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 2118 | "Removing %u dropped ep ctxs, %u now active.", |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2119 | num_dropped_eps, |
| 2120 | xhci->num_active_eps); |
| 2121 | } |
| 2122 | |
Felipe Balbi | ed384bd | 2012-08-07 14:10:03 +0300 | [diff] [blame] | 2123 | static unsigned int xhci_get_block_size(struct usb_device *udev) |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 2124 | { |
| 2125 | switch (udev->speed) { |
| 2126 | case USB_SPEED_LOW: |
| 2127 | case USB_SPEED_FULL: |
| 2128 | return FS_BLOCK; |
| 2129 | case USB_SPEED_HIGH: |
| 2130 | return HS_BLOCK; |
| 2131 | case USB_SPEED_SUPER: |
Mathias Nyman | 0caf6b3 | 2016-01-25 15:30:44 +0200 | [diff] [blame] | 2132 | case USB_SPEED_SUPER_PLUS: |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 2133 | return SS_BLOCK; |
| 2134 | case USB_SPEED_UNKNOWN: |
| 2135 | case USB_SPEED_WIRELESS: |
| 2136 | default: |
| 2137 | /* Should never happen */ |
| 2138 | return 1; |
| 2139 | } |
| 2140 | } |
| 2141 | |
Felipe Balbi | ed384bd | 2012-08-07 14:10:03 +0300 | [diff] [blame] | 2142 | static unsigned int |
| 2143 | xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw) |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 2144 | { |
| 2145 | if (interval_bw->overhead[LS_OVERHEAD_TYPE]) |
| 2146 | return LS_OVERHEAD; |
| 2147 | if (interval_bw->overhead[FS_OVERHEAD_TYPE]) |
| 2148 | return FS_OVERHEAD; |
| 2149 | return HS_OVERHEAD; |
| 2150 | } |
| 2151 | |
| 2152 | /* If we are changing a LS/FS device under a HS hub, |
| 2153 | * make sure (if we are activating a new TT) that the HS bus has enough |
| 2154 | * bandwidth for this new TT. |
| 2155 | */ |
| 2156 | static int xhci_check_tt_bw_table(struct xhci_hcd *xhci, |
| 2157 | struct xhci_virt_device *virt_dev, |
| 2158 | int old_active_eps) |
| 2159 | { |
| 2160 | struct xhci_interval_bw_table *bw_table; |
| 2161 | struct xhci_tt_bw_info *tt_info; |
| 2162 | |
| 2163 | /* Find the bandwidth table for the root port this TT is attached to. */ |
| 2164 | bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table; |
| 2165 | tt_info = virt_dev->tt_info; |
| 2166 | /* If this TT already had active endpoints, the bandwidth for this TT |
| 2167 | * has already been added. Removing all periodic endpoints (and thus |
| 2168 | * making the TT enactive) will only decrease the bandwidth used. |
| 2169 | */ |
| 2170 | if (old_active_eps) |
| 2171 | return 0; |
| 2172 | if (old_active_eps == 0 && tt_info->active_eps != 0) { |
| 2173 | if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT) |
| 2174 | return -ENOMEM; |
| 2175 | return 0; |
| 2176 | } |
| 2177 | /* Not sure why we would have no new active endpoints... |
| 2178 | * |
| 2179 | * Maybe because of an Evaluate Context change for a hub update or a |
| 2180 | * control endpoint 0 max packet size change? |
| 2181 | * FIXME: skip the bandwidth calculation in that case. |
| 2182 | */ |
| 2183 | return 0; |
| 2184 | } |
| 2185 | |
Sarah Sharp | 2b69899 | 2011-09-13 16:41:13 -0700 | [diff] [blame] | 2186 | static int xhci_check_ss_bw(struct xhci_hcd *xhci, |
| 2187 | struct xhci_virt_device *virt_dev) |
| 2188 | { |
| 2189 | unsigned int bw_reserved; |
| 2190 | |
| 2191 | bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100); |
| 2192 | if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved)) |
| 2193 | return -ENOMEM; |
| 2194 | |
| 2195 | bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100); |
| 2196 | if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved)) |
| 2197 | return -ENOMEM; |
| 2198 | |
| 2199 | return 0; |
| 2200 | } |
| 2201 | |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 2202 | /* |
| 2203 | * This algorithm is a very conservative estimate of the worst-case scheduling |
| 2204 | * scenario for any one interval. The hardware dynamically schedules the |
| 2205 | * packets, so we can't tell which microframe could be the limiting factor in |
| 2206 | * the bandwidth scheduling. This only takes into account periodic endpoints. |
| 2207 | * |
| 2208 | * Obviously, we can't solve an NP complete problem to find the minimum worst |
| 2209 | * case scenario. Instead, we come up with an estimate that is no less than |
| 2210 | * the worst case bandwidth used for any one microframe, but may be an |
| 2211 | * over-estimate. |
| 2212 | * |
| 2213 | * We walk the requirements for each endpoint by interval, starting with the |
| 2214 | * smallest interval, and place packets in the schedule where there is only one |
| 2215 | * possible way to schedule packets for that interval. In order to simplify |
| 2216 | * this algorithm, we record the largest max packet size for each interval, and |
| 2217 | * assume all packets will be that size. |
| 2218 | * |
| 2219 | * For interval 0, we obviously must schedule all packets for each interval. |
| 2220 | * The bandwidth for interval 0 is just the amount of data to be transmitted |
| 2221 | * (the sum of all max ESIT payload sizes, plus any overhead per packet times |
| 2222 | * the number of packets). |
| 2223 | * |
| 2224 | * For interval 1, we have two possible microframes to schedule those packets |
| 2225 | * in. For this algorithm, if we can schedule the same number of packets for |
| 2226 | * each possible scheduling opportunity (each microframe), we will do so. The |
| 2227 | * remaining number of packets will be saved to be transmitted in the gaps in |
| 2228 | * the next interval's scheduling sequence. |
| 2229 | * |
| 2230 | * As we move those remaining packets to be scheduled with interval 2 packets, |
| 2231 | * we have to double the number of remaining packets to transmit. This is |
| 2232 | * because the intervals are actually powers of 2, and we would be transmitting |
| 2233 | * the previous interval's packets twice in this interval. We also have to be |
| 2234 | * sure that when we look at the largest max packet size for this interval, we |
| 2235 | * also look at the largest max packet size for the remaining packets and take |
| 2236 | * the greater of the two. |
| 2237 | * |
| 2238 | * The algorithm continues to evenly distribute packets in each scheduling |
| 2239 | * opportunity, and push the remaining packets out, until we get to the last |
| 2240 | * interval. Then those packets and their associated overhead are just added |
| 2241 | * to the bandwidth used. |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2242 | */ |
| 2243 | static int xhci_check_bw_table(struct xhci_hcd *xhci, |
| 2244 | struct xhci_virt_device *virt_dev, |
| 2245 | int old_active_eps) |
| 2246 | { |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 2247 | unsigned int bw_reserved; |
| 2248 | unsigned int max_bandwidth; |
| 2249 | unsigned int bw_used; |
| 2250 | unsigned int block_size; |
| 2251 | struct xhci_interval_bw_table *bw_table; |
| 2252 | unsigned int packet_size = 0; |
| 2253 | unsigned int overhead = 0; |
| 2254 | unsigned int packets_transmitted = 0; |
| 2255 | unsigned int packets_remaining = 0; |
| 2256 | unsigned int i; |
| 2257 | |
Mathias Nyman | 0caf6b3 | 2016-01-25 15:30:44 +0200 | [diff] [blame] | 2258 | if (virt_dev->udev->speed >= USB_SPEED_SUPER) |
Sarah Sharp | 2b69899 | 2011-09-13 16:41:13 -0700 | [diff] [blame] | 2259 | return xhci_check_ss_bw(xhci, virt_dev); |
| 2260 | |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 2261 | if (virt_dev->udev->speed == USB_SPEED_HIGH) { |
| 2262 | max_bandwidth = HS_BW_LIMIT; |
| 2263 | /* Convert percent of bus BW reserved to blocks reserved */ |
| 2264 | bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100); |
| 2265 | } else { |
| 2266 | max_bandwidth = FS_BW_LIMIT; |
| 2267 | bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100); |
| 2268 | } |
| 2269 | |
| 2270 | bw_table = virt_dev->bw_table; |
| 2271 | /* We need to translate the max packet size and max ESIT payloads into |
| 2272 | * the units the hardware uses. |
| 2273 | */ |
| 2274 | block_size = xhci_get_block_size(virt_dev->udev); |
| 2275 | |
| 2276 | /* If we are manipulating a LS/FS device under a HS hub, double check |
| 2277 | * that the HS bus has enough bandwidth if we are activing a new TT. |
| 2278 | */ |
| 2279 | if (virt_dev->tt_info) { |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 2280 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 2281 | "Recalculating BW for rootport %u", |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 2282 | virt_dev->real_port); |
| 2283 | if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) { |
| 2284 | xhci_warn(xhci, "Not enough bandwidth on HS bus for " |
| 2285 | "newly activated TT.\n"); |
| 2286 | return -ENOMEM; |
| 2287 | } |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 2288 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 2289 | "Recalculating BW for TT slot %u port %u", |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 2290 | virt_dev->tt_info->slot_id, |
| 2291 | virt_dev->tt_info->ttport); |
| 2292 | } else { |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 2293 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 2294 | "Recalculating BW for rootport %u", |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 2295 | virt_dev->real_port); |
| 2296 | } |
| 2297 | |
| 2298 | /* Add in how much bandwidth will be used for interval zero, or the |
| 2299 | * rounded max ESIT payload + number of packets * largest overhead. |
| 2300 | */ |
| 2301 | bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) + |
| 2302 | bw_table->interval_bw[0].num_packets * |
| 2303 | xhci_get_largest_overhead(&bw_table->interval_bw[0]); |
| 2304 | |
| 2305 | for (i = 1; i < XHCI_MAX_INTERVAL; i++) { |
| 2306 | unsigned int bw_added; |
| 2307 | unsigned int largest_mps; |
| 2308 | unsigned int interval_overhead; |
| 2309 | |
| 2310 | /* |
| 2311 | * How many packets could we transmit in this interval? |
| 2312 | * If packets didn't fit in the previous interval, we will need |
| 2313 | * to transmit that many packets twice within this interval. |
| 2314 | */ |
| 2315 | packets_remaining = 2 * packets_remaining + |
| 2316 | bw_table->interval_bw[i].num_packets; |
| 2317 | |
| 2318 | /* Find the largest max packet size of this or the previous |
| 2319 | * interval. |
| 2320 | */ |
| 2321 | if (list_empty(&bw_table->interval_bw[i].endpoints)) |
| 2322 | largest_mps = 0; |
| 2323 | else { |
| 2324 | struct xhci_virt_ep *virt_ep; |
| 2325 | struct list_head *ep_entry; |
| 2326 | |
| 2327 | ep_entry = bw_table->interval_bw[i].endpoints.next; |
| 2328 | virt_ep = list_entry(ep_entry, |
| 2329 | struct xhci_virt_ep, bw_endpoint_list); |
| 2330 | /* Convert to blocks, rounding up */ |
| 2331 | largest_mps = DIV_ROUND_UP( |
| 2332 | virt_ep->bw_info.max_packet_size, |
| 2333 | block_size); |
| 2334 | } |
| 2335 | if (largest_mps > packet_size) |
| 2336 | packet_size = largest_mps; |
| 2337 | |
| 2338 | /* Use the larger overhead of this or the previous interval. */ |
| 2339 | interval_overhead = xhci_get_largest_overhead( |
| 2340 | &bw_table->interval_bw[i]); |
| 2341 | if (interval_overhead > overhead) |
| 2342 | overhead = interval_overhead; |
| 2343 | |
| 2344 | /* How many packets can we evenly distribute across |
| 2345 | * (1 << (i + 1)) possible scheduling opportunities? |
| 2346 | */ |
| 2347 | packets_transmitted = packets_remaining >> (i + 1); |
| 2348 | |
| 2349 | /* Add in the bandwidth used for those scheduled packets */ |
| 2350 | bw_added = packets_transmitted * (overhead + packet_size); |
| 2351 | |
| 2352 | /* How many packets do we have remaining to transmit? */ |
| 2353 | packets_remaining = packets_remaining % (1 << (i + 1)); |
| 2354 | |
| 2355 | /* What largest max packet size should those packets have? */ |
| 2356 | /* If we've transmitted all packets, don't carry over the |
| 2357 | * largest packet size. |
| 2358 | */ |
| 2359 | if (packets_remaining == 0) { |
| 2360 | packet_size = 0; |
| 2361 | overhead = 0; |
| 2362 | } else if (packets_transmitted > 0) { |
| 2363 | /* Otherwise if we do have remaining packets, and we've |
| 2364 | * scheduled some packets in this interval, take the |
| 2365 | * largest max packet size from endpoints with this |
| 2366 | * interval. |
| 2367 | */ |
| 2368 | packet_size = largest_mps; |
| 2369 | overhead = interval_overhead; |
| 2370 | } |
| 2371 | /* Otherwise carry over packet_size and overhead from the last |
| 2372 | * time we had a remainder. |
| 2373 | */ |
| 2374 | bw_used += bw_added; |
| 2375 | if (bw_used > max_bandwidth) { |
| 2376 | xhci_warn(xhci, "Not enough bandwidth. " |
| 2377 | "Proposed: %u, Max: %u\n", |
| 2378 | bw_used, max_bandwidth); |
| 2379 | return -ENOMEM; |
| 2380 | } |
| 2381 | } |
| 2382 | /* |
| 2383 | * Ok, we know we have some packets left over after even-handedly |
| 2384 | * scheduling interval 15. We don't know which microframes they will |
| 2385 | * fit into, so we over-schedule and say they will be scheduled every |
| 2386 | * microframe. |
| 2387 | */ |
| 2388 | if (packets_remaining > 0) |
| 2389 | bw_used += overhead + packet_size; |
| 2390 | |
| 2391 | if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) { |
| 2392 | unsigned int port_index = virt_dev->real_port - 1; |
| 2393 | |
| 2394 | /* OK, we're manipulating a HS device attached to a |
| 2395 | * root port bandwidth domain. Include the number of active TTs |
| 2396 | * in the bandwidth used. |
| 2397 | */ |
| 2398 | bw_used += TT_HS_OVERHEAD * |
| 2399 | xhci->rh_bw[port_index].num_active_tts; |
| 2400 | } |
| 2401 | |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 2402 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 2403 | "Final bandwidth: %u, Limit: %u, Reserved: %u, " |
| 2404 | "Available: %u " "percent", |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 2405 | bw_used, max_bandwidth, bw_reserved, |
| 2406 | (max_bandwidth - bw_used - bw_reserved) * 100 / |
| 2407 | max_bandwidth); |
| 2408 | |
| 2409 | bw_used += bw_reserved; |
| 2410 | if (bw_used > max_bandwidth) { |
| 2411 | xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n", |
| 2412 | bw_used, max_bandwidth); |
| 2413 | return -ENOMEM; |
| 2414 | } |
| 2415 | |
| 2416 | bw_table->bw_used = bw_used; |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2417 | return 0; |
| 2418 | } |
| 2419 | |
| 2420 | static bool xhci_is_async_ep(unsigned int ep_type) |
| 2421 | { |
| 2422 | return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP && |
| 2423 | ep_type != ISOC_IN_EP && |
| 2424 | ep_type != INT_IN_EP); |
| 2425 | } |
| 2426 | |
Sarah Sharp | 2b69899 | 2011-09-13 16:41:13 -0700 | [diff] [blame] | 2427 | static bool xhci_is_sync_in_ep(unsigned int ep_type) |
| 2428 | { |
Sarah Sharp | 392a07a | 2012-10-25 13:44:12 -0700 | [diff] [blame] | 2429 | return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP); |
Sarah Sharp | 2b69899 | 2011-09-13 16:41:13 -0700 | [diff] [blame] | 2430 | } |
| 2431 | |
| 2432 | static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw) |
| 2433 | { |
| 2434 | unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK); |
| 2435 | |
| 2436 | if (ep_bw->ep_interval == 0) |
| 2437 | return SS_OVERHEAD_BURST + |
| 2438 | (ep_bw->mult * ep_bw->num_packets * |
| 2439 | (SS_OVERHEAD + mps)); |
| 2440 | return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets * |
| 2441 | (SS_OVERHEAD + mps + SS_OVERHEAD_BURST), |
| 2442 | 1 << ep_bw->ep_interval); |
| 2443 | |
| 2444 | } |
| 2445 | |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2446 | void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci, |
| 2447 | struct xhci_bw_info *ep_bw, |
| 2448 | struct xhci_interval_bw_table *bw_table, |
| 2449 | struct usb_device *udev, |
| 2450 | struct xhci_virt_ep *virt_ep, |
| 2451 | struct xhci_tt_bw_info *tt_info) |
| 2452 | { |
| 2453 | struct xhci_interval_bw *interval_bw; |
| 2454 | int normalized_interval; |
| 2455 | |
Sarah Sharp | 2b69899 | 2011-09-13 16:41:13 -0700 | [diff] [blame] | 2456 | if (xhci_is_async_ep(ep_bw->type)) |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2457 | return; |
| 2458 | |
Mathias Nyman | 0caf6b3 | 2016-01-25 15:30:44 +0200 | [diff] [blame] | 2459 | if (udev->speed >= USB_SPEED_SUPER) { |
Sarah Sharp | 2b69899 | 2011-09-13 16:41:13 -0700 | [diff] [blame] | 2460 | if (xhci_is_sync_in_ep(ep_bw->type)) |
| 2461 | xhci->devs[udev->slot_id]->bw_table->ss_bw_in -= |
| 2462 | xhci_get_ss_bw_consumed(ep_bw); |
| 2463 | else |
| 2464 | xhci->devs[udev->slot_id]->bw_table->ss_bw_out -= |
| 2465 | xhci_get_ss_bw_consumed(ep_bw); |
| 2466 | return; |
| 2467 | } |
| 2468 | |
| 2469 | /* SuperSpeed endpoints never get added to intervals in the table, so |
| 2470 | * this check is only valid for HS/FS/LS devices. |
| 2471 | */ |
| 2472 | if (list_empty(&virt_ep->bw_endpoint_list)) |
| 2473 | return; |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2474 | /* For LS/FS devices, we need to translate the interval expressed in |
| 2475 | * microframes to frames. |
| 2476 | */ |
| 2477 | if (udev->speed == USB_SPEED_HIGH) |
| 2478 | normalized_interval = ep_bw->ep_interval; |
| 2479 | else |
| 2480 | normalized_interval = ep_bw->ep_interval - 3; |
| 2481 | |
| 2482 | if (normalized_interval == 0) |
| 2483 | bw_table->interval0_esit_payload -= ep_bw->max_esit_payload; |
| 2484 | interval_bw = &bw_table->interval_bw[normalized_interval]; |
| 2485 | interval_bw->num_packets -= ep_bw->num_packets; |
| 2486 | switch (udev->speed) { |
| 2487 | case USB_SPEED_LOW: |
| 2488 | interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1; |
| 2489 | break; |
| 2490 | case USB_SPEED_FULL: |
| 2491 | interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1; |
| 2492 | break; |
| 2493 | case USB_SPEED_HIGH: |
| 2494 | interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1; |
| 2495 | break; |
| 2496 | case USB_SPEED_SUPER: |
Mathias Nyman | 0caf6b3 | 2016-01-25 15:30:44 +0200 | [diff] [blame] | 2497 | case USB_SPEED_SUPER_PLUS: |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2498 | case USB_SPEED_UNKNOWN: |
| 2499 | case USB_SPEED_WIRELESS: |
| 2500 | /* Should never happen because only LS/FS/HS endpoints will get |
| 2501 | * added to the endpoint list. |
| 2502 | */ |
| 2503 | return; |
| 2504 | } |
| 2505 | if (tt_info) |
| 2506 | tt_info->active_eps -= 1; |
| 2507 | list_del_init(&virt_ep->bw_endpoint_list); |
| 2508 | } |
| 2509 | |
| 2510 | static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci, |
| 2511 | struct xhci_bw_info *ep_bw, |
| 2512 | struct xhci_interval_bw_table *bw_table, |
| 2513 | struct usb_device *udev, |
| 2514 | struct xhci_virt_ep *virt_ep, |
| 2515 | struct xhci_tt_bw_info *tt_info) |
| 2516 | { |
| 2517 | struct xhci_interval_bw *interval_bw; |
| 2518 | struct xhci_virt_ep *smaller_ep; |
| 2519 | int normalized_interval; |
| 2520 | |
| 2521 | if (xhci_is_async_ep(ep_bw->type)) |
| 2522 | return; |
| 2523 | |
Sarah Sharp | 2b69899 | 2011-09-13 16:41:13 -0700 | [diff] [blame] | 2524 | if (udev->speed == USB_SPEED_SUPER) { |
| 2525 | if (xhci_is_sync_in_ep(ep_bw->type)) |
| 2526 | xhci->devs[udev->slot_id]->bw_table->ss_bw_in += |
| 2527 | xhci_get_ss_bw_consumed(ep_bw); |
| 2528 | else |
| 2529 | xhci->devs[udev->slot_id]->bw_table->ss_bw_out += |
| 2530 | xhci_get_ss_bw_consumed(ep_bw); |
| 2531 | return; |
| 2532 | } |
| 2533 | |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2534 | /* For LS/FS devices, we need to translate the interval expressed in |
| 2535 | * microframes to frames. |
| 2536 | */ |
| 2537 | if (udev->speed == USB_SPEED_HIGH) |
| 2538 | normalized_interval = ep_bw->ep_interval; |
| 2539 | else |
| 2540 | normalized_interval = ep_bw->ep_interval - 3; |
| 2541 | |
| 2542 | if (normalized_interval == 0) |
| 2543 | bw_table->interval0_esit_payload += ep_bw->max_esit_payload; |
| 2544 | interval_bw = &bw_table->interval_bw[normalized_interval]; |
| 2545 | interval_bw->num_packets += ep_bw->num_packets; |
| 2546 | switch (udev->speed) { |
| 2547 | case USB_SPEED_LOW: |
| 2548 | interval_bw->overhead[LS_OVERHEAD_TYPE] += 1; |
| 2549 | break; |
| 2550 | case USB_SPEED_FULL: |
| 2551 | interval_bw->overhead[FS_OVERHEAD_TYPE] += 1; |
| 2552 | break; |
| 2553 | case USB_SPEED_HIGH: |
| 2554 | interval_bw->overhead[HS_OVERHEAD_TYPE] += 1; |
| 2555 | break; |
| 2556 | case USB_SPEED_SUPER: |
Mathias Nyman | 0caf6b3 | 2016-01-25 15:30:44 +0200 | [diff] [blame] | 2557 | case USB_SPEED_SUPER_PLUS: |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2558 | case USB_SPEED_UNKNOWN: |
| 2559 | case USB_SPEED_WIRELESS: |
| 2560 | /* Should never happen because only LS/FS/HS endpoints will get |
| 2561 | * added to the endpoint list. |
| 2562 | */ |
| 2563 | return; |
| 2564 | } |
| 2565 | |
| 2566 | if (tt_info) |
| 2567 | tt_info->active_eps += 1; |
| 2568 | /* Insert the endpoint into the list, largest max packet size first. */ |
| 2569 | list_for_each_entry(smaller_ep, &interval_bw->endpoints, |
| 2570 | bw_endpoint_list) { |
| 2571 | if (ep_bw->max_packet_size >= |
| 2572 | smaller_ep->bw_info.max_packet_size) { |
| 2573 | /* Add the new ep before the smaller endpoint */ |
| 2574 | list_add_tail(&virt_ep->bw_endpoint_list, |
| 2575 | &smaller_ep->bw_endpoint_list); |
| 2576 | return; |
| 2577 | } |
| 2578 | } |
| 2579 | /* Add the new endpoint at the end of the list. */ |
| 2580 | list_add_tail(&virt_ep->bw_endpoint_list, |
| 2581 | &interval_bw->endpoints); |
| 2582 | } |
| 2583 | |
| 2584 | void xhci_update_tt_active_eps(struct xhci_hcd *xhci, |
| 2585 | struct xhci_virt_device *virt_dev, |
| 2586 | int old_active_eps) |
| 2587 | { |
| 2588 | struct xhci_root_port_bw_info *rh_bw_info; |
| 2589 | if (!virt_dev->tt_info) |
| 2590 | return; |
| 2591 | |
| 2592 | rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1]; |
| 2593 | if (old_active_eps == 0 && |
| 2594 | virt_dev->tt_info->active_eps != 0) { |
| 2595 | rh_bw_info->num_active_tts += 1; |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 2596 | rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD; |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2597 | } else if (old_active_eps != 0 && |
| 2598 | virt_dev->tt_info->active_eps == 0) { |
| 2599 | rh_bw_info->num_active_tts -= 1; |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 2600 | rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD; |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2601 | } |
| 2602 | } |
| 2603 | |
| 2604 | static int xhci_reserve_bandwidth(struct xhci_hcd *xhci, |
| 2605 | struct xhci_virt_device *virt_dev, |
| 2606 | struct xhci_container_ctx *in_ctx) |
| 2607 | { |
| 2608 | struct xhci_bw_info ep_bw_info[31]; |
| 2609 | int i; |
| 2610 | struct xhci_input_control_ctx *ctrl_ctx; |
| 2611 | int old_active_eps = 0; |
| 2612 | |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2613 | if (virt_dev->tt_info) |
| 2614 | old_active_eps = virt_dev->tt_info->active_eps; |
| 2615 | |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 2616 | ctrl_ctx = xhci_get_input_control_ctx(in_ctx); |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2617 | if (!ctrl_ctx) { |
| 2618 | xhci_warn(xhci, "%s: Could not get input context, bad type.\n", |
| 2619 | __func__); |
| 2620 | return -ENOMEM; |
| 2621 | } |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2622 | |
| 2623 | for (i = 0; i < 31; i++) { |
| 2624 | if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i)) |
| 2625 | continue; |
| 2626 | |
| 2627 | /* Make a copy of the BW info in case we need to revert this */ |
| 2628 | memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info, |
| 2629 | sizeof(ep_bw_info[i])); |
| 2630 | /* Drop the endpoint from the interval table if the endpoint is |
| 2631 | * being dropped or changed. |
| 2632 | */ |
| 2633 | if (EP_IS_DROPPED(ctrl_ctx, i)) |
| 2634 | xhci_drop_ep_from_interval_table(xhci, |
| 2635 | &virt_dev->eps[i].bw_info, |
| 2636 | virt_dev->bw_table, |
| 2637 | virt_dev->udev, |
| 2638 | &virt_dev->eps[i], |
| 2639 | virt_dev->tt_info); |
| 2640 | } |
| 2641 | /* Overwrite the information stored in the endpoints' bw_info */ |
| 2642 | xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev); |
| 2643 | for (i = 0; i < 31; i++) { |
| 2644 | /* Add any changed or added endpoints to the interval table */ |
| 2645 | if (EP_IS_ADDED(ctrl_ctx, i)) |
| 2646 | xhci_add_ep_to_interval_table(xhci, |
| 2647 | &virt_dev->eps[i].bw_info, |
| 2648 | virt_dev->bw_table, |
| 2649 | virt_dev->udev, |
| 2650 | &virt_dev->eps[i], |
| 2651 | virt_dev->tt_info); |
| 2652 | } |
| 2653 | |
| 2654 | if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) { |
| 2655 | /* Ok, this fits in the bandwidth we have. |
| 2656 | * Update the number of active TTs. |
| 2657 | */ |
| 2658 | xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps); |
| 2659 | return 0; |
| 2660 | } |
| 2661 | |
| 2662 | /* We don't have enough bandwidth for this, revert the stored info. */ |
| 2663 | for (i = 0; i < 31; i++) { |
| 2664 | if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i)) |
| 2665 | continue; |
| 2666 | |
| 2667 | /* Drop the new copies of any added or changed endpoints from |
| 2668 | * the interval table. |
| 2669 | */ |
| 2670 | if (EP_IS_ADDED(ctrl_ctx, i)) { |
| 2671 | xhci_drop_ep_from_interval_table(xhci, |
| 2672 | &virt_dev->eps[i].bw_info, |
| 2673 | virt_dev->bw_table, |
| 2674 | virt_dev->udev, |
| 2675 | &virt_dev->eps[i], |
| 2676 | virt_dev->tt_info); |
| 2677 | } |
| 2678 | /* Revert the endpoint back to its old information */ |
| 2679 | memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i], |
| 2680 | sizeof(ep_bw_info[i])); |
| 2681 | /* Add any changed or dropped endpoints back into the table */ |
| 2682 | if (EP_IS_DROPPED(ctrl_ctx, i)) |
| 2683 | xhci_add_ep_to_interval_table(xhci, |
| 2684 | &virt_dev->eps[i].bw_info, |
| 2685 | virt_dev->bw_table, |
| 2686 | virt_dev->udev, |
| 2687 | &virt_dev->eps[i], |
| 2688 | virt_dev->tt_info); |
| 2689 | } |
| 2690 | return -ENOMEM; |
| 2691 | } |
| 2692 | |
| 2693 | |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2694 | /* Issue a configure endpoint command or evaluate context command |
| 2695 | * and wait for it to finish. |
| 2696 | */ |
| 2697 | static int xhci_configure_endpoint(struct xhci_hcd *xhci, |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2698 | struct usb_device *udev, |
| 2699 | struct xhci_command *command, |
| 2700 | bool ctx_change, bool must_succeed) |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2701 | { |
| 2702 | int ret; |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2703 | unsigned long flags; |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2704 | struct xhci_input_control_ctx *ctrl_ctx; |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2705 | struct xhci_virt_device *virt_dev; |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 2706 | |
| 2707 | if (!command) |
| 2708 | return -EINVAL; |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2709 | |
| 2710 | spin_lock_irqsave(&xhci->lock, flags); |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2711 | virt_dev = xhci->devs[udev->slot_id]; |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2712 | |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 2713 | ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2714 | if (!ctrl_ctx) { |
Emil Goode | 1f21569 | 2013-06-25 15:49:36 -0700 | [diff] [blame] | 2715 | spin_unlock_irqrestore(&xhci->lock, flags); |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2716 | xhci_warn(xhci, "%s: Could not get input context, bad type.\n", |
| 2717 | __func__); |
| 2718 | return -ENOMEM; |
| 2719 | } |
Sarah Sharp | 750645f | 2011-09-02 11:05:43 -0700 | [diff] [blame] | 2720 | |
| 2721 | if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) && |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2722 | xhci_reserve_host_resources(xhci, ctrl_ctx)) { |
Sarah Sharp | 750645f | 2011-09-02 11:05:43 -0700 | [diff] [blame] | 2723 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 2724 | xhci_warn(xhci, "Not enough host resources, " |
| 2725 | "active endpoint contexts = %u\n", |
| 2726 | xhci->num_active_eps); |
| 2727 | return -ENOMEM; |
| 2728 | } |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2729 | if ((xhci->quirks & XHCI_SW_BW_CHECKING) && |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 2730 | xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) { |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2731 | if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2732 | xhci_free_host_resources(xhci, ctrl_ctx); |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2733 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 2734 | xhci_warn(xhci, "Not enough bandwidth\n"); |
| 2735 | return -ENOMEM; |
| 2736 | } |
Sarah Sharp | 750645f | 2011-09-02 11:05:43 -0700 | [diff] [blame] | 2737 | |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2738 | if (!ctx_change) |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 2739 | ret = xhci_queue_configure_endpoint(xhci, command, |
| 2740 | command->in_ctx->dma, |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2741 | udev->slot_id, must_succeed); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2742 | else |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 2743 | ret = xhci_queue_evaluate_context(xhci, command, |
| 2744 | command->in_ctx->dma, |
Sarah Sharp | 4b26654 | 2012-05-07 15:34:26 -0700 | [diff] [blame] | 2745 | udev->slot_id, must_succeed); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2746 | if (ret < 0) { |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2747 | if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2748 | xhci_free_host_resources(xhci, ctrl_ctx); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2749 | spin_unlock_irqrestore(&xhci->lock, flags); |
Xenia Ragiadakou | 3a7fa5b | 2013-07-31 07:35:27 +0300 | [diff] [blame] | 2750 | xhci_dbg_trace(xhci, trace_xhci_dbg_context_change, |
| 2751 | "FIXME allocate a new ring segment"); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2752 | return -ENOMEM; |
| 2753 | } |
| 2754 | xhci_ring_cmd_db(xhci); |
| 2755 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 2756 | |
| 2757 | /* Wait for the configure endpoint command to complete */ |
Mathias Nyman | c311e39 | 2014-05-08 19:26:03 +0300 | [diff] [blame] | 2758 | wait_for_completion(command->completion); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2759 | |
| 2760 | if (!ctx_change) |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 2761 | ret = xhci_configure_endpoint_result(xhci, udev, |
| 2762 | &command->status); |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2763 | else |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 2764 | ret = xhci_evaluate_context_result(xhci, udev, |
| 2765 | &command->status); |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2766 | |
| 2767 | if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { |
| 2768 | spin_lock_irqsave(&xhci->lock, flags); |
| 2769 | /* If the command failed, remove the reserved resources. |
| 2770 | * Otherwise, clean up the estimate to include dropped eps. |
| 2771 | */ |
| 2772 | if (ret) |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2773 | xhci_free_host_resources(xhci, ctrl_ctx); |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2774 | else |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2775 | xhci_finish_resource_reservation(xhci, ctrl_ctx); |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2776 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 2777 | } |
| 2778 | return ret; |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2779 | } |
| 2780 | |
Hans de Goede | df61383 | 2013-10-04 00:29:45 +0200 | [diff] [blame] | 2781 | static void xhci_check_bw_drop_ep_streams(struct xhci_hcd *xhci, |
| 2782 | struct xhci_virt_device *vdev, int i) |
| 2783 | { |
| 2784 | struct xhci_virt_ep *ep = &vdev->eps[i]; |
| 2785 | |
| 2786 | if (ep->ep_state & EP_HAS_STREAMS) { |
| 2787 | xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n", |
| 2788 | xhci_get_endpoint_address(i)); |
| 2789 | xhci_free_stream_info(xhci, ep->stream_info); |
| 2790 | ep->stream_info = NULL; |
| 2791 | ep->ep_state &= ~EP_HAS_STREAMS; |
| 2792 | } |
| 2793 | } |
| 2794 | |
Sarah Sharp | f88ba78 | 2009-05-14 11:44:22 -0700 | [diff] [blame] | 2795 | /* Called after one or more calls to xhci_add_endpoint() or |
| 2796 | * xhci_drop_endpoint(). If this call fails, the USB core is expected |
| 2797 | * to call xhci_reset_bandwidth(). |
| 2798 | * |
| 2799 | * Since we are in the middle of changing either configuration or |
| 2800 | * installing a new alt setting, the USB core won't allow URBs to be |
| 2801 | * enqueued for any endpoint on the old config or interface. Nothing |
| 2802 | * else should be touching the xhci->devs[slot_id] structure, so we |
| 2803 | * don't need to take the xhci->lock for manipulating that. |
| 2804 | */ |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2805 | int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev) |
| 2806 | { |
| 2807 | int i; |
| 2808 | int ret = 0; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2809 | struct xhci_hcd *xhci; |
| 2810 | struct xhci_virt_device *virt_dev; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 2811 | struct xhci_input_control_ctx *ctrl_ctx; |
| 2812 | struct xhci_slot_ctx *slot_ctx; |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 2813 | struct xhci_command *command; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2814 | |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 2815 | ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2816 | if (ret <= 0) |
| 2817 | return ret; |
| 2818 | xhci = hcd_to_xhci(hcd); |
Mathias Nyman | 98d74f9 | 2016-04-08 16:25:10 +0300 | [diff] [blame] | 2819 | if ((xhci->xhc_state & XHCI_STATE_DYING) || |
| 2820 | (xhci->xhc_state & XHCI_STATE_REMOVING)) |
Sarah Sharp | fe6c6c1 | 2011-05-23 16:41:17 -0700 | [diff] [blame] | 2821 | return -ENODEV; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2822 | |
Vamsi Krishna Samavedam | f826f83 | 2016-11-03 17:06:34 -0700 | [diff] [blame] | 2823 | xhci_dbg(xhci, "%s called for udev %pK\n", __func__, udev); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2824 | virt_dev = xhci->devs[udev->slot_id]; |
| 2825 | |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 2826 | command = xhci_alloc_command(xhci, false, true, GFP_KERNEL); |
| 2827 | if (!command) |
| 2828 | return -ENOMEM; |
| 2829 | |
| 2830 | command->in_ctx = virt_dev->in_ctx; |
| 2831 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2832 | /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */ |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 2833 | ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2834 | if (!ctrl_ctx) { |
| 2835 | xhci_warn(xhci, "%s: Could not get input context, bad type.\n", |
| 2836 | __func__); |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 2837 | ret = -ENOMEM; |
| 2838 | goto command_cleanup; |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2839 | } |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 2840 | ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); |
| 2841 | ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG); |
| 2842 | ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG)); |
Sarah Sharp | 2dc3753 | 2011-09-02 11:05:40 -0700 | [diff] [blame] | 2843 | |
| 2844 | /* Don't issue the command if there's no endpoints to update. */ |
| 2845 | if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) && |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 2846 | ctrl_ctx->drop_flags == 0) { |
| 2847 | ret = 0; |
| 2848 | goto command_cleanup; |
| 2849 | } |
Julius Werner | d675913 | 2014-06-24 17:14:42 +0300 | [diff] [blame] | 2850 | /* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */ |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 2851 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); |
Julius Werner | d675913 | 2014-06-24 17:14:42 +0300 | [diff] [blame] | 2852 | for (i = 31; i >= 1; i--) { |
| 2853 | __le32 le32 = cpu_to_le32(BIT(i)); |
| 2854 | |
| 2855 | if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32)) |
| 2856 | || (ctrl_ctx->add_flags & le32) || i == 1) { |
| 2857 | slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK); |
| 2858 | slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i)); |
| 2859 | break; |
| 2860 | } |
| 2861 | } |
| 2862 | xhci_dbg(xhci, "New Input Control Context:\n"); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 2863 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 2864 | LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info))); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2865 | |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 2866 | ret = xhci_configure_endpoint(xhci, udev, command, |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2867 | false, false); |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 2868 | if (ret) |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2869 | /* Callee should call reset_bandwidth() */ |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 2870 | goto command_cleanup; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2871 | |
| 2872 | xhci_dbg(xhci, "Output context after successful config ep cmd:\n"); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 2873 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 2874 | LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info))); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2875 | |
Sarah Sharp | 834cb0f | 2011-05-12 18:06:37 -0700 | [diff] [blame] | 2876 | /* Free any rings that were dropped, but not changed. */ |
| 2877 | for (i = 1; i < 31; ++i) { |
Matt Evans | 4819fef | 2011-06-01 13:01:07 +1000 | [diff] [blame] | 2878 | if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) && |
Hans de Goede | df61383 | 2013-10-04 00:29:45 +0200 | [diff] [blame] | 2879 | !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) { |
Sarah Sharp | 834cb0f | 2011-05-12 18:06:37 -0700 | [diff] [blame] | 2880 | xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i); |
Hans de Goede | df61383 | 2013-10-04 00:29:45 +0200 | [diff] [blame] | 2881 | xhci_check_bw_drop_ep_streams(xhci, virt_dev, i); |
| 2882 | } |
Sarah Sharp | 834cb0f | 2011-05-12 18:06:37 -0700 | [diff] [blame] | 2883 | } |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 2884 | xhci_zero_in_ctx(xhci, virt_dev); |
Sarah Sharp | 834cb0f | 2011-05-12 18:06:37 -0700 | [diff] [blame] | 2885 | /* |
| 2886 | * Install any rings for completely new endpoints or changed endpoints, |
| 2887 | * and free or cache any old rings from changed endpoints. |
| 2888 | */ |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2889 | for (i = 1; i < 31; ++i) { |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 2890 | if (!virt_dev->eps[i].new_ring) |
| 2891 | continue; |
| 2892 | /* Only cache or free the old ring if it exists. |
| 2893 | * It may not if this is the first add of an endpoint. |
| 2894 | */ |
| 2895 | if (virt_dev->eps[i].ring) { |
Sarah Sharp | 412566b | 2009-12-09 15:59:01 -0800 | [diff] [blame] | 2896 | xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2897 | } |
Hans de Goede | df61383 | 2013-10-04 00:29:45 +0200 | [diff] [blame] | 2898 | xhci_check_bw_drop_ep_streams(xhci, virt_dev, i); |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 2899 | virt_dev->eps[i].ring = virt_dev->eps[i].new_ring; |
| 2900 | virt_dev->eps[i].new_ring = NULL; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2901 | } |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 2902 | command_cleanup: |
| 2903 | kfree(command->completion); |
| 2904 | kfree(command); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2905 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2906 | return ret; |
| 2907 | } |
| 2908 | |
| 2909 | void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev) |
| 2910 | { |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2911 | struct xhci_hcd *xhci; |
| 2912 | struct xhci_virt_device *virt_dev; |
| 2913 | int i, ret; |
| 2914 | |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 2915 | ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2916 | if (ret <= 0) |
| 2917 | return; |
| 2918 | xhci = hcd_to_xhci(hcd); |
| 2919 | |
Vamsi Krishna Samavedam | f826f83 | 2016-11-03 17:06:34 -0700 | [diff] [blame] | 2920 | xhci_dbg(xhci, "%s called for udev %pK\n", __func__, udev); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2921 | virt_dev = xhci->devs[udev->slot_id]; |
| 2922 | /* Free any rings allocated for added endpoints */ |
| 2923 | for (i = 0; i < 31; ++i) { |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 2924 | if (virt_dev->eps[i].new_ring) { |
| 2925 | xhci_ring_free(xhci, virt_dev->eps[i].new_ring); |
| 2926 | virt_dev->eps[i].new_ring = NULL; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2927 | } |
| 2928 | } |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 2929 | xhci_zero_in_ctx(xhci, virt_dev); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2930 | } |
| 2931 | |
Sarah Sharp | 5270b95 | 2009-09-04 10:53:11 -0700 | [diff] [blame] | 2932 | static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci, |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2933 | struct xhci_container_ctx *in_ctx, |
| 2934 | struct xhci_container_ctx *out_ctx, |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2935 | struct xhci_input_control_ctx *ctrl_ctx, |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2936 | u32 add_flags, u32 drop_flags) |
Sarah Sharp | 5270b95 | 2009-09-04 10:53:11 -0700 | [diff] [blame] | 2937 | { |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 2938 | ctrl_ctx->add_flags = cpu_to_le32(add_flags); |
| 2939 | ctrl_ctx->drop_flags = cpu_to_le32(drop_flags); |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2940 | xhci_slot_copy(xhci, in_ctx, out_ctx); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 2941 | ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); |
Sarah Sharp | 5270b95 | 2009-09-04 10:53:11 -0700 | [diff] [blame] | 2942 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2943 | xhci_dbg(xhci, "Input Context:\n"); |
| 2944 | xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags)); |
Sarah Sharp | 5270b95 | 2009-09-04 10:53:11 -0700 | [diff] [blame] | 2945 | } |
| 2946 | |
Dmitry Torokhov | 8212a49 | 2011-02-08 13:55:59 -0800 | [diff] [blame] | 2947 | static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci, |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2948 | unsigned int slot_id, unsigned int ep_index, |
| 2949 | struct xhci_dequeue_state *deq_state) |
| 2950 | { |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2951 | struct xhci_input_control_ctx *ctrl_ctx; |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2952 | struct xhci_container_ctx *in_ctx; |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2953 | struct xhci_ep_ctx *ep_ctx; |
| 2954 | u32 added_ctxs; |
| 2955 | dma_addr_t addr; |
| 2956 | |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2957 | in_ctx = xhci->devs[slot_id]->in_ctx; |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 2958 | ctrl_ctx = xhci_get_input_control_ctx(in_ctx); |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2959 | if (!ctrl_ctx) { |
| 2960 | xhci_warn(xhci, "%s: Could not get input context, bad type.\n", |
| 2961 | __func__); |
| 2962 | return; |
| 2963 | } |
| 2964 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2965 | xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx, |
| 2966 | xhci->devs[slot_id]->out_ctx, ep_index); |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2967 | ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index); |
| 2968 | addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg, |
| 2969 | deq_state->new_deq_ptr); |
| 2970 | if (addr == 0) { |
| 2971 | xhci_warn(xhci, "WARN Cannot submit config ep after " |
| 2972 | "reset ep command\n"); |
Vamsi Krishna Samavedam | f826f83 | 2016-11-03 17:06:34 -0700 | [diff] [blame] | 2973 | xhci_warn(xhci, "WARN deq seg = %pK, deq ptr = %pK\n", |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2974 | deq_state->new_deq_seg, |
| 2975 | deq_state->new_deq_ptr); |
| 2976 | return; |
| 2977 | } |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 2978 | ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state); |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2979 | |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2980 | added_ctxs = xhci_get_endpoint_flag_from_index(ep_index); |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2981 | xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx, |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 2982 | xhci->devs[slot_id]->out_ctx, ctrl_ctx, |
| 2983 | added_ctxs, added_ctxs); |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2984 | } |
| 2985 | |
Sarah Sharp | 82d1009 | 2009-08-07 14:04:52 -0700 | [diff] [blame] | 2986 | void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, |
Mathias Nyman | d97b4f8 | 2014-11-27 18:19:16 +0200 | [diff] [blame] | 2987 | unsigned int ep_index, struct xhci_td *td) |
Sarah Sharp | 82d1009 | 2009-08-07 14:04:52 -0700 | [diff] [blame] | 2988 | { |
| 2989 | struct xhci_dequeue_state deq_state; |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 2990 | struct xhci_virt_ep *ep; |
Mathias Nyman | d97b4f8 | 2014-11-27 18:19:16 +0200 | [diff] [blame] | 2991 | struct usb_device *udev = td->urb->dev; |
Sarah Sharp | 82d1009 | 2009-08-07 14:04:52 -0700 | [diff] [blame] | 2992 | |
Xenia Ragiadakou | a025432 | 2013-08-06 07:52:46 +0300 | [diff] [blame] | 2993 | xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep, |
| 2994 | "Cleaning up stalled endpoint ring"); |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 2995 | ep = &xhci->devs[udev->slot_id]->eps[ep_index]; |
Sarah Sharp | 82d1009 | 2009-08-07 14:04:52 -0700 | [diff] [blame] | 2996 | /* We need to move the HW's dequeue pointer past this TD, |
| 2997 | * or it will attempt to resend it on the next doorbell ring. |
| 2998 | */ |
| 2999 | xhci_find_new_dequeue_state(xhci, udev->slot_id, |
Mathias Nyman | d97b4f8 | 2014-11-27 18:19:16 +0200 | [diff] [blame] | 3000 | ep_index, ep->stopped_stream, td, &deq_state); |
Sarah Sharp | 82d1009 | 2009-08-07 14:04:52 -0700 | [diff] [blame] | 3001 | |
Mathias Nyman | 365038d | 2014-08-19 15:17:58 +0300 | [diff] [blame] | 3002 | if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg) |
| 3003 | return; |
| 3004 | |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 3005 | /* HW with the reset endpoint quirk will use the saved dequeue state to |
| 3006 | * issue a configure endpoint command later. |
| 3007 | */ |
| 3008 | if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) { |
Xenia Ragiadakou | a025432 | 2013-08-06 07:52:46 +0300 | [diff] [blame] | 3009 | xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep, |
| 3010 | "Queueing new dequeue state"); |
Hans de Goede | 1e3452e | 2014-08-20 16:41:52 +0300 | [diff] [blame] | 3011 | xhci_queue_new_dequeue_state(xhci, udev->slot_id, |
Sarah Sharp | e9df17e | 2010-04-02 15:34:43 -0700 | [diff] [blame] | 3012 | ep_index, ep->stopped_stream, &deq_state); |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 3013 | } else { |
| 3014 | /* Better hope no one uses the input context between now and the |
| 3015 | * reset endpoint completion! |
Sarah Sharp | e9df17e | 2010-04-02 15:34:43 -0700 | [diff] [blame] | 3016 | * XXX: No idea how this hardware will react when stream rings |
| 3017 | * are enabled. |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 3018 | */ |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 3019 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 3020 | "Setting up input context for " |
| 3021 | "configure endpoint command"); |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 3022 | xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id, |
| 3023 | ep_index, &deq_state); |
| 3024 | } |
Sarah Sharp | 82d1009 | 2009-08-07 14:04:52 -0700 | [diff] [blame] | 3025 | } |
| 3026 | |
Mathias Nyman | d0167ad | 2015-03-10 19:49:00 +0200 | [diff] [blame] | 3027 | /* Called when clearing halted device. The core should have sent the control |
Mathias Nyman | 8e71a32 | 2014-11-18 11:27:12 +0200 | [diff] [blame] | 3028 | * message to clear the device halt condition. The host side of the halt should |
Mathias Nyman | d0167ad | 2015-03-10 19:49:00 +0200 | [diff] [blame] | 3029 | * already be cleared with a reset endpoint command issued when the STALL tx |
| 3030 | * event was received. |
| 3031 | * |
| 3032 | * Context: in_interrupt |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 3033 | */ |
Mathias Nyman | 8e71a32 | 2014-11-18 11:27:12 +0200 | [diff] [blame] | 3034 | |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 3035 | void xhci_endpoint_reset(struct usb_hcd *hcd, |
| 3036 | struct usb_host_endpoint *ep) |
| 3037 | { |
| 3038 | struct xhci_hcd *xhci; |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 3039 | |
| 3040 | xhci = hcd_to_xhci(hcd); |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 3041 | |
Sarah Sharp | c92bcfa | 2009-07-27 12:05:21 -0700 | [diff] [blame] | 3042 | /* |
Mathias Nyman | d0167ad | 2015-03-10 19:49:00 +0200 | [diff] [blame] | 3043 | * We might need to implement the config ep cmd in xhci 4.8.1 note: |
Mathias Nyman | 8e71a32 | 2014-11-18 11:27:12 +0200 | [diff] [blame] | 3044 | * The Reset Endpoint Command may only be issued to endpoints in the |
| 3045 | * Halted state. If software wishes reset the Data Toggle or Sequence |
| 3046 | * Number of an endpoint that isn't in the Halted state, then software |
| 3047 | * may issue a Configure Endpoint Command with the Drop and Add bits set |
| 3048 | * for the target endpoint. that is in the Stopped state. |
Sarah Sharp | c92bcfa | 2009-07-27 12:05:21 -0700 | [diff] [blame] | 3049 | */ |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 3050 | |
Mathias Nyman | d0167ad | 2015-03-10 19:49:00 +0200 | [diff] [blame] | 3051 | /* For now just print debug to follow the situation */ |
| 3052 | xhci_dbg(xhci, "Endpoint 0x%x ep reset callback called\n", |
| 3053 | ep->desc.bEndpointAddress); |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 3054 | } |
| 3055 | |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3056 | static int xhci_check_streams_endpoint(struct xhci_hcd *xhci, |
| 3057 | struct usb_device *udev, struct usb_host_endpoint *ep, |
| 3058 | unsigned int slot_id) |
| 3059 | { |
| 3060 | int ret; |
| 3061 | unsigned int ep_index; |
| 3062 | unsigned int ep_state; |
| 3063 | |
| 3064 | if (!ep) |
| 3065 | return -EINVAL; |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 3066 | ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3067 | if (ret <= 0) |
| 3068 | return -EINVAL; |
Hans de Goede | a390153 | 2013-10-04 17:05:55 +0200 | [diff] [blame] | 3069 | if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) { |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3070 | xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion" |
| 3071 | " descriptor for ep 0x%x does not support streams\n", |
| 3072 | ep->desc.bEndpointAddress); |
| 3073 | return -EINVAL; |
| 3074 | } |
| 3075 | |
| 3076 | ep_index = xhci_get_endpoint_index(&ep->desc); |
| 3077 | ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state; |
| 3078 | if (ep_state & EP_HAS_STREAMS || |
| 3079 | ep_state & EP_GETTING_STREAMS) { |
| 3080 | xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x " |
| 3081 | "already has streams set up.\n", |
| 3082 | ep->desc.bEndpointAddress); |
| 3083 | xhci_warn(xhci, "Send email to xHCI maintainer and ask for " |
| 3084 | "dynamic stream context array reallocation.\n"); |
| 3085 | return -EINVAL; |
| 3086 | } |
| 3087 | if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) { |
| 3088 | xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk " |
| 3089 | "endpoint 0x%x; URBs are pending.\n", |
| 3090 | ep->desc.bEndpointAddress); |
| 3091 | return -EINVAL; |
| 3092 | } |
| 3093 | return 0; |
| 3094 | } |
| 3095 | |
| 3096 | static void xhci_calculate_streams_entries(struct xhci_hcd *xhci, |
| 3097 | unsigned int *num_streams, unsigned int *num_stream_ctxs) |
| 3098 | { |
| 3099 | unsigned int max_streams; |
| 3100 | |
| 3101 | /* The stream context array size must be a power of two */ |
| 3102 | *num_stream_ctxs = roundup_pow_of_two(*num_streams); |
| 3103 | /* |
| 3104 | * Find out how many primary stream array entries the host controller |
| 3105 | * supports. Later we may use secondary stream arrays (similar to 2nd |
| 3106 | * level page entries), but that's an optional feature for xHCI host |
| 3107 | * controllers. xHCs must support at least 4 stream IDs. |
| 3108 | */ |
| 3109 | max_streams = HCC_MAX_PSA(xhci->hcc_params); |
| 3110 | if (*num_stream_ctxs > max_streams) { |
| 3111 | xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n", |
| 3112 | max_streams); |
| 3113 | *num_stream_ctxs = max_streams; |
| 3114 | *num_streams = max_streams; |
| 3115 | } |
| 3116 | } |
| 3117 | |
| 3118 | /* Returns an error code if one of the endpoint already has streams. |
| 3119 | * This does not change any data structures, it only checks and gathers |
| 3120 | * information. |
| 3121 | */ |
| 3122 | static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci, |
| 3123 | struct usb_device *udev, |
| 3124 | struct usb_host_endpoint **eps, unsigned int num_eps, |
| 3125 | unsigned int *num_streams, u32 *changed_ep_bitmask) |
| 3126 | { |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3127 | unsigned int max_streams; |
| 3128 | unsigned int endpoint_flag; |
| 3129 | int i; |
| 3130 | int ret; |
| 3131 | |
| 3132 | for (i = 0; i < num_eps; i++) { |
| 3133 | ret = xhci_check_streams_endpoint(xhci, udev, |
| 3134 | eps[i], udev->slot_id); |
| 3135 | if (ret < 0) |
| 3136 | return ret; |
| 3137 | |
Felipe Balbi | 18b7ede | 2012-01-02 13:35:41 +0200 | [diff] [blame] | 3138 | max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3139 | if (max_streams < (*num_streams - 1)) { |
| 3140 | xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n", |
| 3141 | eps[i]->desc.bEndpointAddress, |
| 3142 | max_streams); |
| 3143 | *num_streams = max_streams+1; |
| 3144 | } |
| 3145 | |
| 3146 | endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc); |
| 3147 | if (*changed_ep_bitmask & endpoint_flag) |
| 3148 | return -EINVAL; |
| 3149 | *changed_ep_bitmask |= endpoint_flag; |
| 3150 | } |
| 3151 | return 0; |
| 3152 | } |
| 3153 | |
| 3154 | static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci, |
| 3155 | struct usb_device *udev, |
| 3156 | struct usb_host_endpoint **eps, unsigned int num_eps) |
| 3157 | { |
| 3158 | u32 changed_ep_bitmask = 0; |
| 3159 | unsigned int slot_id; |
| 3160 | unsigned int ep_index; |
| 3161 | unsigned int ep_state; |
| 3162 | int i; |
| 3163 | |
| 3164 | slot_id = udev->slot_id; |
| 3165 | if (!xhci->devs[slot_id]) |
| 3166 | return 0; |
| 3167 | |
| 3168 | for (i = 0; i < num_eps; i++) { |
| 3169 | ep_index = xhci_get_endpoint_index(&eps[i]->desc); |
| 3170 | ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state; |
| 3171 | /* Are streams already being freed for the endpoint? */ |
| 3172 | if (ep_state & EP_GETTING_NO_STREAMS) { |
| 3173 | xhci_warn(xhci, "WARN Can't disable streams for " |
Joe Perches | 03e64e9 | 2013-07-16 19:25:59 -0700 | [diff] [blame] | 3174 | "endpoint 0x%x, " |
| 3175 | "streams are being disabled already\n", |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3176 | eps[i]->desc.bEndpointAddress); |
| 3177 | return 0; |
| 3178 | } |
| 3179 | /* Are there actually any streams to free? */ |
| 3180 | if (!(ep_state & EP_HAS_STREAMS) && |
| 3181 | !(ep_state & EP_GETTING_STREAMS)) { |
| 3182 | xhci_warn(xhci, "WARN Can't disable streams for " |
Joe Perches | 03e64e9 | 2013-07-16 19:25:59 -0700 | [diff] [blame] | 3183 | "endpoint 0x%x, " |
| 3184 | "streams are already disabled!\n", |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3185 | eps[i]->desc.bEndpointAddress); |
| 3186 | xhci_warn(xhci, "WARN xhci_free_streams() called " |
| 3187 | "with non-streams endpoint\n"); |
| 3188 | return 0; |
| 3189 | } |
| 3190 | changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc); |
| 3191 | } |
| 3192 | return changed_ep_bitmask; |
| 3193 | } |
| 3194 | |
| 3195 | /* |
Luis de Bethencourt | c2a298d | 2015-06-30 16:48:54 +0200 | [diff] [blame] | 3196 | * The USB device drivers use this function (through the HCD interface in USB |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3197 | * core) to prepare a set of bulk endpoints to use streams. Streams are used to |
| 3198 | * coordinate mass storage command queueing across multiple endpoints (basically |
| 3199 | * a stream ID == a task ID). |
| 3200 | * |
| 3201 | * Setting up streams involves allocating the same size stream context array |
| 3202 | * for each endpoint and issuing a configure endpoint command for all endpoints. |
| 3203 | * |
| 3204 | * Don't allow the call to succeed if one endpoint only supports one stream |
| 3205 | * (which means it doesn't support streams at all). |
| 3206 | * |
| 3207 | * Drivers may get less stream IDs than they asked for, if the host controller |
| 3208 | * hardware or endpoints claim they can't support the number of requested |
| 3209 | * stream IDs. |
| 3210 | */ |
| 3211 | int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev, |
| 3212 | struct usb_host_endpoint **eps, unsigned int num_eps, |
| 3213 | unsigned int num_streams, gfp_t mem_flags) |
| 3214 | { |
| 3215 | int i, ret; |
| 3216 | struct xhci_hcd *xhci; |
| 3217 | struct xhci_virt_device *vdev; |
| 3218 | struct xhci_command *config_cmd; |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 3219 | struct xhci_input_control_ctx *ctrl_ctx; |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3220 | unsigned int ep_index; |
| 3221 | unsigned int num_stream_ctxs; |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 3222 | unsigned int max_packet; |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3223 | unsigned long flags; |
| 3224 | u32 changed_ep_bitmask = 0; |
| 3225 | |
| 3226 | if (!eps) |
| 3227 | return -EINVAL; |
| 3228 | |
| 3229 | /* Add one to the number of streams requested to account for |
| 3230 | * stream 0 that is reserved for xHCI usage. |
| 3231 | */ |
| 3232 | num_streams += 1; |
| 3233 | xhci = hcd_to_xhci(hcd); |
| 3234 | xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n", |
| 3235 | num_streams); |
| 3236 | |
Hans de Goede | f792088 | 2013-11-15 12:14:38 +0100 | [diff] [blame] | 3237 | /* MaxPSASize value 0 (2 streams) means streams are not supported */ |
Hans de Goede | 8f873c1 | 2014-07-25 22:01:18 +0200 | [diff] [blame] | 3238 | if ((xhci->quirks & XHCI_BROKEN_STREAMS) || |
| 3239 | HCC_MAX_PSA(xhci->hcc_params) < 4) { |
Hans de Goede | f792088 | 2013-11-15 12:14:38 +0100 | [diff] [blame] | 3240 | xhci_dbg(xhci, "xHCI controller does not support streams.\n"); |
| 3241 | return -ENOSYS; |
| 3242 | } |
| 3243 | |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3244 | config_cmd = xhci_alloc_command(xhci, true, true, mem_flags); |
| 3245 | if (!config_cmd) { |
| 3246 | xhci_dbg(xhci, "Could not allocate xHCI command structure.\n"); |
| 3247 | return -ENOMEM; |
| 3248 | } |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 3249 | ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx); |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 3250 | if (!ctrl_ctx) { |
| 3251 | xhci_warn(xhci, "%s: Could not get input context, bad type.\n", |
| 3252 | __func__); |
| 3253 | xhci_free_command(xhci, config_cmd); |
| 3254 | return -ENOMEM; |
| 3255 | } |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3256 | |
| 3257 | /* Check to make sure all endpoints are not already configured for |
| 3258 | * streams. While we're at it, find the maximum number of streams that |
| 3259 | * all the endpoints will support and check for duplicate endpoints. |
| 3260 | */ |
| 3261 | spin_lock_irqsave(&xhci->lock, flags); |
| 3262 | ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps, |
| 3263 | num_eps, &num_streams, &changed_ep_bitmask); |
| 3264 | if (ret < 0) { |
| 3265 | xhci_free_command(xhci, config_cmd); |
| 3266 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3267 | return ret; |
| 3268 | } |
| 3269 | if (num_streams <= 1) { |
| 3270 | xhci_warn(xhci, "WARN: endpoints can't handle " |
| 3271 | "more than one stream.\n"); |
| 3272 | xhci_free_command(xhci, config_cmd); |
| 3273 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3274 | return -EINVAL; |
| 3275 | } |
| 3276 | vdev = xhci->devs[udev->slot_id]; |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 3277 | /* Mark each endpoint as being in transition, so |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3278 | * xhci_urb_enqueue() will reject all URBs. |
| 3279 | */ |
| 3280 | for (i = 0; i < num_eps; i++) { |
| 3281 | ep_index = xhci_get_endpoint_index(&eps[i]->desc); |
| 3282 | vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS; |
| 3283 | } |
| 3284 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3285 | |
| 3286 | /* Setup internal data structures and allocate HW data structures for |
| 3287 | * streams (but don't install the HW structures in the input context |
| 3288 | * until we're sure all memory allocation succeeded). |
| 3289 | */ |
| 3290 | xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs); |
| 3291 | xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n", |
| 3292 | num_stream_ctxs, num_streams); |
| 3293 | |
| 3294 | for (i = 0; i < num_eps; i++) { |
| 3295 | ep_index = xhci_get_endpoint_index(&eps[i]->desc); |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 3296 | max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&eps[i]->desc)); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3297 | vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci, |
| 3298 | num_stream_ctxs, |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 3299 | num_streams, |
| 3300 | max_packet, mem_flags); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3301 | if (!vdev->eps[ep_index].stream_info) |
| 3302 | goto cleanup; |
| 3303 | /* Set maxPstreams in endpoint context and update deq ptr to |
| 3304 | * point to stream context array. FIXME |
| 3305 | */ |
| 3306 | } |
| 3307 | |
| 3308 | /* Set up the input context for a configure endpoint command. */ |
| 3309 | for (i = 0; i < num_eps; i++) { |
| 3310 | struct xhci_ep_ctx *ep_ctx; |
| 3311 | |
| 3312 | ep_index = xhci_get_endpoint_index(&eps[i]->desc); |
| 3313 | ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index); |
| 3314 | |
| 3315 | xhci_endpoint_copy(xhci, config_cmd->in_ctx, |
| 3316 | vdev->out_ctx, ep_index); |
| 3317 | xhci_setup_streams_ep_input_ctx(xhci, ep_ctx, |
| 3318 | vdev->eps[ep_index].stream_info); |
| 3319 | } |
| 3320 | /* Tell the HW to drop its old copy of the endpoint context info |
| 3321 | * and add the updated copy from the input context. |
| 3322 | */ |
| 3323 | xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx, |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 3324 | vdev->out_ctx, ctrl_ctx, |
| 3325 | changed_ep_bitmask, changed_ep_bitmask); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3326 | |
| 3327 | /* Issue and wait for the configure endpoint command */ |
| 3328 | ret = xhci_configure_endpoint(xhci, udev, config_cmd, |
| 3329 | false, false); |
| 3330 | |
| 3331 | /* xHC rejected the configure endpoint command for some reason, so we |
| 3332 | * leave the old ring intact and free our internal streams data |
| 3333 | * structure. |
| 3334 | */ |
| 3335 | if (ret < 0) |
| 3336 | goto cleanup; |
| 3337 | |
| 3338 | spin_lock_irqsave(&xhci->lock, flags); |
| 3339 | for (i = 0; i < num_eps; i++) { |
| 3340 | ep_index = xhci_get_endpoint_index(&eps[i]->desc); |
| 3341 | vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS; |
| 3342 | xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n", |
| 3343 | udev->slot_id, ep_index); |
| 3344 | vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS; |
| 3345 | } |
| 3346 | xhci_free_command(xhci, config_cmd); |
| 3347 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3348 | |
| 3349 | /* Subtract 1 for stream 0, which drivers can't use */ |
| 3350 | return num_streams - 1; |
| 3351 | |
| 3352 | cleanup: |
| 3353 | /* If it didn't work, free the streams! */ |
| 3354 | for (i = 0; i < num_eps; i++) { |
| 3355 | ep_index = xhci_get_endpoint_index(&eps[i]->desc); |
| 3356 | xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info); |
Sarah Sharp | 8a00774 | 2010-04-30 15:37:56 -0700 | [diff] [blame] | 3357 | vdev->eps[ep_index].stream_info = NULL; |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3358 | /* FIXME Unset maxPstreams in endpoint context and |
| 3359 | * update deq ptr to point to normal string ring. |
| 3360 | */ |
| 3361 | vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS; |
| 3362 | vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS; |
| 3363 | xhci_endpoint_zero(xhci, vdev, eps[i]); |
| 3364 | } |
| 3365 | xhci_free_command(xhci, config_cmd); |
| 3366 | return -ENOMEM; |
| 3367 | } |
| 3368 | |
| 3369 | /* Transition the endpoint from using streams to being a "normal" endpoint |
| 3370 | * without streams. |
| 3371 | * |
| 3372 | * Modify the endpoint context state, submit a configure endpoint command, |
| 3373 | * and free all endpoint rings for streams if that completes successfully. |
| 3374 | */ |
| 3375 | int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev, |
| 3376 | struct usb_host_endpoint **eps, unsigned int num_eps, |
| 3377 | gfp_t mem_flags) |
| 3378 | { |
| 3379 | int i, ret; |
| 3380 | struct xhci_hcd *xhci; |
| 3381 | struct xhci_virt_device *vdev; |
| 3382 | struct xhci_command *command; |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 3383 | struct xhci_input_control_ctx *ctrl_ctx; |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3384 | unsigned int ep_index; |
| 3385 | unsigned long flags; |
| 3386 | u32 changed_ep_bitmask; |
| 3387 | |
| 3388 | xhci = hcd_to_xhci(hcd); |
| 3389 | vdev = xhci->devs[udev->slot_id]; |
| 3390 | |
| 3391 | /* Set up a configure endpoint command to remove the streams rings */ |
| 3392 | spin_lock_irqsave(&xhci->lock, flags); |
| 3393 | changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci, |
| 3394 | udev, eps, num_eps); |
| 3395 | if (changed_ep_bitmask == 0) { |
| 3396 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3397 | return -EINVAL; |
| 3398 | } |
| 3399 | |
| 3400 | /* Use the xhci_command structure from the first endpoint. We may have |
| 3401 | * allocated too many, but the driver may call xhci_free_streams() for |
| 3402 | * each endpoint it grouped into one call to xhci_alloc_streams(). |
| 3403 | */ |
| 3404 | ep_index = xhci_get_endpoint_index(&eps[0]->desc); |
| 3405 | command = vdev->eps[ep_index].stream_info->free_streams_command; |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 3406 | ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 3407 | if (!ctrl_ctx) { |
Emil Goode | 1f21569 | 2013-06-25 15:49:36 -0700 | [diff] [blame] | 3408 | spin_unlock_irqrestore(&xhci->lock, flags); |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 3409 | xhci_warn(xhci, "%s: Could not get input context, bad type.\n", |
| 3410 | __func__); |
| 3411 | return -EINVAL; |
| 3412 | } |
| 3413 | |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3414 | for (i = 0; i < num_eps; i++) { |
| 3415 | struct xhci_ep_ctx *ep_ctx; |
| 3416 | |
| 3417 | ep_index = xhci_get_endpoint_index(&eps[i]->desc); |
| 3418 | ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index); |
| 3419 | xhci->devs[udev->slot_id]->eps[ep_index].ep_state |= |
| 3420 | EP_GETTING_NO_STREAMS; |
| 3421 | |
| 3422 | xhci_endpoint_copy(xhci, command->in_ctx, |
| 3423 | vdev->out_ctx, ep_index); |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 3424 | xhci_setup_no_streams_ep_input_ctx(ep_ctx, |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3425 | &vdev->eps[ep_index]); |
| 3426 | } |
| 3427 | xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx, |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 3428 | vdev->out_ctx, ctrl_ctx, |
| 3429 | changed_ep_bitmask, changed_ep_bitmask); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3430 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3431 | |
| 3432 | /* Issue and wait for the configure endpoint command, |
| 3433 | * which must succeed. |
| 3434 | */ |
| 3435 | ret = xhci_configure_endpoint(xhci, udev, command, |
| 3436 | false, true); |
| 3437 | |
| 3438 | /* xHC rejected the configure endpoint command for some reason, so we |
| 3439 | * leave the streams rings intact. |
| 3440 | */ |
| 3441 | if (ret < 0) |
| 3442 | return ret; |
| 3443 | |
| 3444 | spin_lock_irqsave(&xhci->lock, flags); |
| 3445 | for (i = 0; i < num_eps; i++) { |
| 3446 | ep_index = xhci_get_endpoint_index(&eps[i]->desc); |
| 3447 | xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info); |
Sarah Sharp | 8a00774 | 2010-04-30 15:37:56 -0700 | [diff] [blame] | 3448 | vdev->eps[ep_index].stream_info = NULL; |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3449 | /* FIXME Unset maxPstreams in endpoint context and |
| 3450 | * update deq ptr to point to normal string ring. |
| 3451 | */ |
| 3452 | vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS; |
| 3453 | vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS; |
| 3454 | } |
| 3455 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3456 | |
| 3457 | return 0; |
| 3458 | } |
| 3459 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3460 | /* |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 3461 | * Deletes endpoint resources for endpoints that were active before a Reset |
| 3462 | * Device command, or a Disable Slot command. The Reset Device command leaves |
| 3463 | * the control endpoint intact, whereas the Disable Slot command deletes it. |
| 3464 | * |
| 3465 | * Must be called with xhci->lock held. |
| 3466 | */ |
| 3467 | void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci, |
| 3468 | struct xhci_virt_device *virt_dev, bool drop_control_ep) |
| 3469 | { |
| 3470 | int i; |
| 3471 | unsigned int num_dropped_eps = 0; |
| 3472 | unsigned int drop_flags = 0; |
| 3473 | |
| 3474 | for (i = (drop_control_ep ? 0 : 1); i < 31; i++) { |
| 3475 | if (virt_dev->eps[i].ring) { |
| 3476 | drop_flags |= 1 << i; |
| 3477 | num_dropped_eps++; |
| 3478 | } |
| 3479 | } |
| 3480 | xhci->num_active_eps -= num_dropped_eps; |
| 3481 | if (num_dropped_eps) |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 3482 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 3483 | "Dropped %u ep ctxs, flags = 0x%x, " |
| 3484 | "%u now active.", |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 3485 | num_dropped_eps, drop_flags, |
| 3486 | xhci->num_active_eps); |
| 3487 | } |
| 3488 | |
| 3489 | /* |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3490 | * This submits a Reset Device Command, which will set the device state to 0, |
| 3491 | * set the device address to 0, and disable all the endpoints except the default |
| 3492 | * control endpoint. The USB core should come back and call |
| 3493 | * xhci_address_device(), and then re-set up the configuration. If this is |
| 3494 | * called because of a usb_reset_and_verify_device(), then the old alternate |
| 3495 | * settings will be re-installed through the normal bandwidth allocation |
| 3496 | * functions. |
| 3497 | * |
| 3498 | * Wait for the Reset Device command to finish. Remove all structures |
| 3499 | * associated with the endpoints that were disabled. Clear the input device |
| 3500 | * structure? Cache the rings? Reset the control endpoint 0 max packet size? |
Andiry Xu | f0615c4 | 2010-10-14 07:22:48 -0700 | [diff] [blame] | 3501 | * |
| 3502 | * If the virt_dev to be reset does not exist or does not match the udev, |
| 3503 | * it means the device is lost, possibly due to the xHC restore error and |
| 3504 | * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to |
| 3505 | * re-allocate the device. |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3506 | */ |
Andiry Xu | f0615c4 | 2010-10-14 07:22:48 -0700 | [diff] [blame] | 3507 | int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev) |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3508 | { |
| 3509 | int ret, i; |
| 3510 | unsigned long flags; |
| 3511 | struct xhci_hcd *xhci; |
| 3512 | unsigned int slot_id; |
| 3513 | struct xhci_virt_device *virt_dev; |
| 3514 | struct xhci_command *reset_device_cmd; |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3515 | int last_freed_endpoint; |
Maarten Lankhorst | 001fd38 | 2011-06-01 23:27:50 +0200 | [diff] [blame] | 3516 | struct xhci_slot_ctx *slot_ctx; |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 3517 | int old_active_eps = 0; |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3518 | |
Andiry Xu | f0615c4 | 2010-10-14 07:22:48 -0700 | [diff] [blame] | 3519 | ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__); |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3520 | if (ret <= 0) |
| 3521 | return ret; |
| 3522 | xhci = hcd_to_xhci(hcd); |
| 3523 | slot_id = udev->slot_id; |
| 3524 | virt_dev = xhci->devs[slot_id]; |
Andiry Xu | f0615c4 | 2010-10-14 07:22:48 -0700 | [diff] [blame] | 3525 | if (!virt_dev) { |
| 3526 | xhci_dbg(xhci, "The device to be reset with slot ID %u does " |
| 3527 | "not exist. Re-allocate the device\n", slot_id); |
| 3528 | ret = xhci_alloc_dev(hcd, udev); |
| 3529 | if (ret == 1) |
| 3530 | return 0; |
| 3531 | else |
| 3532 | return -EINVAL; |
| 3533 | } |
| 3534 | |
Brian Campbell | 326124a | 2015-07-21 17:20:28 +0300 | [diff] [blame] | 3535 | if (virt_dev->tt_info) |
| 3536 | old_active_eps = virt_dev->tt_info->active_eps; |
| 3537 | |
Andiry Xu | f0615c4 | 2010-10-14 07:22:48 -0700 | [diff] [blame] | 3538 | if (virt_dev->udev != udev) { |
| 3539 | /* If the virt_dev and the udev does not match, this virt_dev |
| 3540 | * may belong to another udev. |
| 3541 | * Re-allocate the device. |
| 3542 | */ |
| 3543 | xhci_dbg(xhci, "The device to be reset with slot ID %u does " |
| 3544 | "not match the udev. Re-allocate the device\n", |
| 3545 | slot_id); |
| 3546 | ret = xhci_alloc_dev(hcd, udev); |
| 3547 | if (ret == 1) |
| 3548 | return 0; |
| 3549 | else |
| 3550 | return -EINVAL; |
| 3551 | } |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3552 | |
Maarten Lankhorst | 001fd38 | 2011-06-01 23:27:50 +0200 | [diff] [blame] | 3553 | /* If device is not setup, there is no point in resetting it */ |
| 3554 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); |
| 3555 | if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) == |
| 3556 | SLOT_STATE_DISABLED) |
| 3557 | return 0; |
| 3558 | |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3559 | xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id); |
| 3560 | /* Allocate the command structure that holds the struct completion. |
| 3561 | * Assume we're in process context, since the normal device reset |
| 3562 | * process has to wait for the device anyway. Storage devices are |
| 3563 | * reset as part of error handling, so use GFP_NOIO instead of |
| 3564 | * GFP_KERNEL. |
| 3565 | */ |
| 3566 | reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO); |
| 3567 | if (!reset_device_cmd) { |
| 3568 | xhci_dbg(xhci, "Couldn't allocate command structure.\n"); |
| 3569 | return -ENOMEM; |
| 3570 | } |
| 3571 | |
| 3572 | /* Attempt to submit the Reset Device command to the command ring */ |
| 3573 | spin_lock_irqsave(&xhci->lock, flags); |
Paul Zimmerman | 7a3783e | 2010-11-17 16:26:50 -0800 | [diff] [blame] | 3574 | |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 3575 | ret = xhci_queue_reset_device(xhci, reset_device_cmd, slot_id); |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3576 | if (ret) { |
| 3577 | xhci_dbg(xhci, "FIXME: allocate a command ring segment\n"); |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3578 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3579 | goto command_cleanup; |
| 3580 | } |
| 3581 | xhci_ring_cmd_db(xhci); |
| 3582 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3583 | |
| 3584 | /* Wait for the Reset Device command to finish */ |
Mathias Nyman | c311e39 | 2014-05-08 19:26:03 +0300 | [diff] [blame] | 3585 | wait_for_completion(reset_device_cmd->completion); |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3586 | |
| 3587 | /* The Reset Device command can't fail, according to the 0.95/0.96 spec, |
| 3588 | * unless we tried to reset a slot ID that wasn't enabled, |
| 3589 | * or the device wasn't in the addressed or configured state. |
| 3590 | */ |
| 3591 | ret = reset_device_cmd->status; |
| 3592 | switch (ret) { |
Mathias Nyman | c311e39 | 2014-05-08 19:26:03 +0300 | [diff] [blame] | 3593 | case COMP_CMD_ABORT: |
| 3594 | case COMP_CMD_STOP: |
| 3595 | xhci_warn(xhci, "Timeout waiting for reset device command\n"); |
| 3596 | ret = -ETIME; |
| 3597 | goto command_cleanup; |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3598 | case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */ |
| 3599 | case COMP_CTX_STATE: /* 0.96 completion code for same thing */ |
Xenia Ragiadakou | 38a532a | 2013-07-02 17:49:25 +0300 | [diff] [blame] | 3600 | xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n", |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3601 | slot_id, |
| 3602 | xhci_get_slot_state(xhci, virt_dev->out_ctx)); |
Xenia Ragiadakou | 38a532a | 2013-07-02 17:49:25 +0300 | [diff] [blame] | 3603 | xhci_dbg(xhci, "Not freeing device rings.\n"); |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3604 | /* Don't treat this as an error. May change my mind later. */ |
| 3605 | ret = 0; |
| 3606 | goto command_cleanup; |
| 3607 | case COMP_SUCCESS: |
| 3608 | xhci_dbg(xhci, "Successful reset device command.\n"); |
| 3609 | break; |
| 3610 | default: |
| 3611 | if (xhci_is_vendor_info_code(xhci, ret)) |
| 3612 | break; |
| 3613 | xhci_warn(xhci, "Unknown completion code %u for " |
| 3614 | "reset device command.\n", ret); |
| 3615 | ret = -EINVAL; |
| 3616 | goto command_cleanup; |
| 3617 | } |
| 3618 | |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 3619 | /* Free up host controller endpoint resources */ |
| 3620 | if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { |
| 3621 | spin_lock_irqsave(&xhci->lock, flags); |
| 3622 | /* Don't delete the default control endpoint resources */ |
| 3623 | xhci_free_device_endpoint_resources(xhci, virt_dev, false); |
| 3624 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3625 | } |
| 3626 | |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3627 | /* Everything but endpoint 0 is disabled, so free or cache the rings. */ |
| 3628 | last_freed_endpoint = 1; |
| 3629 | for (i = 1; i < 31; ++i) { |
Dmitry Torokhov | 2dea75d | 2011-04-12 23:06:28 -0700 | [diff] [blame] | 3630 | struct xhci_virt_ep *ep = &virt_dev->eps[i]; |
| 3631 | |
| 3632 | if (ep->ep_state & EP_HAS_STREAMS) { |
Hans de Goede | df61383 | 2013-10-04 00:29:45 +0200 | [diff] [blame] | 3633 | xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n", |
| 3634 | xhci_get_endpoint_address(i)); |
Dmitry Torokhov | 2dea75d | 2011-04-12 23:06:28 -0700 | [diff] [blame] | 3635 | xhci_free_stream_info(xhci, ep->stream_info); |
| 3636 | ep->stream_info = NULL; |
| 3637 | ep->ep_state &= ~EP_HAS_STREAMS; |
| 3638 | } |
| 3639 | |
| 3640 | if (ep->ring) { |
| 3641 | xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i); |
| 3642 | last_freed_endpoint = i; |
| 3643 | } |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 3644 | if (!list_empty(&virt_dev->eps[i].bw_endpoint_list)) |
| 3645 | xhci_drop_ep_from_interval_table(xhci, |
| 3646 | &virt_dev->eps[i].bw_info, |
| 3647 | virt_dev->bw_table, |
| 3648 | udev, |
| 3649 | &virt_dev->eps[i], |
| 3650 | virt_dev->tt_info); |
Sarah Sharp | 9af5d71 | 2011-09-02 11:05:48 -0700 | [diff] [blame] | 3651 | xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info); |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3652 | } |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 3653 | /* If necessary, update the number of active TTs on this root port */ |
| 3654 | xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps); |
| 3655 | |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3656 | xhci_dbg(xhci, "Output context after successful reset device cmd:\n"); |
| 3657 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint); |
| 3658 | ret = 0; |
| 3659 | |
| 3660 | command_cleanup: |
| 3661 | xhci_free_command(xhci, reset_device_cmd); |
| 3662 | return ret; |
| 3663 | } |
| 3664 | |
| 3665 | /* |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3666 | * At this point, the struct usb_device is about to go away, the device has |
| 3667 | * disconnected, and all traffic has been stopped and the endpoints have been |
| 3668 | * disabled. Free any HC data structures associated with that device. |
| 3669 | */ |
| 3670 | void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev) |
| 3671 | { |
| 3672 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 3673 | struct xhci_virt_device *virt_dev; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3674 | unsigned long flags; |
Sarah Sharp | c526d0d | 2009-09-16 16:42:39 -0700 | [diff] [blame] | 3675 | u32 state; |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 3676 | int i, ret; |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 3677 | struct xhci_command *command; |
| 3678 | |
| 3679 | command = xhci_alloc_command(xhci, false, false, GFP_KERNEL); |
| 3680 | if (!command) |
| 3681 | return; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3682 | |
Shawn Nematbakhsh | c8476fb | 2013-08-19 10:36:13 -0700 | [diff] [blame] | 3683 | #ifndef CONFIG_USB_DEFAULT_PERSIST |
| 3684 | /* |
| 3685 | * We called pm_runtime_get_noresume when the device was attached. |
| 3686 | * Decrement the counter here to allow controller to runtime suspend |
| 3687 | * if no devices remain. |
| 3688 | */ |
| 3689 | if (xhci->quirks & XHCI_RESET_ON_RESUME) |
Sarah Sharp | e7ecf06 | 2013-08-28 09:31:04 -0700 | [diff] [blame] | 3690 | pm_runtime_put_noidle(hcd->self.controller); |
Shawn Nematbakhsh | c8476fb | 2013-08-19 10:36:13 -0700 | [diff] [blame] | 3691 | #endif |
| 3692 | |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 3693 | ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__); |
Sarah Sharp | 7bd89b4 | 2011-07-01 13:35:40 -0700 | [diff] [blame] | 3694 | /* If the host is halted due to driver unload, we still need to free the |
| 3695 | * device. |
| 3696 | */ |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 3697 | if (ret <= 0 && ret != -ENODEV) { |
| 3698 | kfree(command); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3699 | return; |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 3700 | } |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 3701 | |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 3702 | virt_dev = xhci->devs[udev->slot_id]; |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 3703 | |
| 3704 | /* Stop any wayward timer functions (which may grab the lock) */ |
| 3705 | for (i = 0; i < 31; ++i) { |
| 3706 | virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING; |
| 3707 | del_timer_sync(&virt_dev->eps[i].stop_cmd_timer); |
| 3708 | } |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3709 | |
Hemant Kumar | 595ce83 | 2018-06-14 17:58:58 -0700 | [diff] [blame] | 3710 | virt_dev->udev = NULL; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3711 | spin_lock_irqsave(&xhci->lock, flags); |
Mathias Nyman | 2679c22 | 2018-05-03 17:30:07 +0300 | [diff] [blame] | 3712 | |
| 3713 | virt_dev->udev = NULL; |
| 3714 | |
Sarah Sharp | c526d0d | 2009-09-16 16:42:39 -0700 | [diff] [blame] | 3715 | /* Don't disable the slot if the host controller is dead. */ |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 3716 | state = readl(&xhci->op_regs->status); |
Sarah Sharp | 7bd89b4 | 2011-07-01 13:35:40 -0700 | [diff] [blame] | 3717 | if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) || |
| 3718 | (xhci->xhc_state & XHCI_STATE_HALTED)) { |
Sarah Sharp | c526d0d | 2009-09-16 16:42:39 -0700 | [diff] [blame] | 3719 | xhci_free_virt_device(xhci, udev->slot_id); |
| 3720 | spin_unlock_irqrestore(&xhci->lock, flags); |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 3721 | kfree(command); |
Sarah Sharp | c526d0d | 2009-09-16 16:42:39 -0700 | [diff] [blame] | 3722 | return; |
| 3723 | } |
| 3724 | |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 3725 | if (xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT, |
| 3726 | udev->slot_id)) { |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3727 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3728 | xhci_dbg(xhci, "FIXME: allocate a command ring segment\n"); |
| 3729 | return; |
| 3730 | } |
Sarah Sharp | 23e3be1 | 2009-04-29 19:05:20 -0700 | [diff] [blame] | 3731 | xhci_ring_cmd_db(xhci); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3732 | spin_unlock_irqrestore(&xhci->lock, flags); |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 3733 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3734 | /* |
| 3735 | * Event command completion handler will free any data structures |
Sarah Sharp | f88ba78 | 2009-05-14 11:44:22 -0700 | [diff] [blame] | 3736 | * associated with the slot. XXX Can free sleep? |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3737 | */ |
| 3738 | } |
| 3739 | |
| 3740 | /* |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 3741 | * Checks if we have enough host controller resources for the default control |
| 3742 | * endpoint. |
| 3743 | * |
| 3744 | * Must be called with xhci->lock held. |
| 3745 | */ |
| 3746 | static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci) |
| 3747 | { |
| 3748 | if (xhci->num_active_eps + 1 > xhci->limit_active_eps) { |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 3749 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 3750 | "Not enough ep ctxs: " |
| 3751 | "%u active, need to add 1, limit is %u.", |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 3752 | xhci->num_active_eps, xhci->limit_active_eps); |
| 3753 | return -ENOMEM; |
| 3754 | } |
| 3755 | xhci->num_active_eps += 1; |
Xenia Ragiadakou | 4bdfe4c | 2013-08-06 07:52:45 +0300 | [diff] [blame] | 3756 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 3757 | "Adding 1 ep ctx, %u now active.", |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 3758 | xhci->num_active_eps); |
| 3759 | return 0; |
| 3760 | } |
| 3761 | |
| 3762 | |
| 3763 | /* |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3764 | * Returns 0 if the xHC ran out of device slots, the Enable Slot command |
| 3765 | * timed out, or allocating memory failed. Returns 1 on success. |
| 3766 | */ |
| 3767 | int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev) |
| 3768 | { |
| 3769 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 3770 | unsigned long flags; |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 3771 | int ret, slot_id; |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 3772 | struct xhci_command *command; |
| 3773 | |
| 3774 | command = xhci_alloc_command(xhci, false, false, GFP_KERNEL); |
| 3775 | if (!command) |
| 3776 | return 0; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3777 | |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 3778 | /* xhci->slot_id and xhci->addr_dev are not thread-safe */ |
| 3779 | mutex_lock(&xhci->mutex); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3780 | spin_lock_irqsave(&xhci->lock, flags); |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 3781 | command->completion = &xhci->addr_dev; |
| 3782 | ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3783 | if (ret) { |
| 3784 | spin_unlock_irqrestore(&xhci->lock, flags); |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 3785 | mutex_unlock(&xhci->mutex); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3786 | xhci_dbg(xhci, "FIXME: allocate a command ring segment\n"); |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 3787 | kfree(command); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3788 | return 0; |
| 3789 | } |
Sarah Sharp | 23e3be1 | 2009-04-29 19:05:20 -0700 | [diff] [blame] | 3790 | xhci_ring_cmd_db(xhci); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3791 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3792 | |
Mathias Nyman | c311e39 | 2014-05-08 19:26:03 +0300 | [diff] [blame] | 3793 | wait_for_completion(command->completion); |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 3794 | slot_id = xhci->slot_id; |
| 3795 | mutex_unlock(&xhci->mutex); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3796 | |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 3797 | if (!slot_id || command->status != COMP_SUCCESS) { |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3798 | xhci_err(xhci, "Error while assigning device slot ID\n"); |
Sarah Sharp | be98203 | 2014-05-08 19:25:59 +0300 | [diff] [blame] | 3799 | xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n", |
| 3800 | HCS_MAX_SLOTS( |
| 3801 | readl(&xhci->cap_regs->hcs_params1))); |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 3802 | kfree(command); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3803 | return 0; |
| 3804 | } |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 3805 | |
| 3806 | if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { |
| 3807 | spin_lock_irqsave(&xhci->lock, flags); |
| 3808 | ret = xhci_reserve_host_control_ep_resources(xhci); |
| 3809 | if (ret) { |
| 3810 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3811 | xhci_warn(xhci, "Not enough host resources, " |
| 3812 | "active endpoint contexts = %u\n", |
| 3813 | xhci->num_active_eps); |
| 3814 | goto disable_slot; |
| 3815 | } |
| 3816 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3817 | } |
| 3818 | /* Use GFP_NOIO, since this function can be called from |
Sarah Sharp | a6d940d | 2010-12-28 13:08:42 -0800 | [diff] [blame] | 3819 | * xhci_discover_or_reset_device(), which may be called as part of |
| 3820 | * mass storage driver error handling. |
| 3821 | */ |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 3822 | if (!xhci_alloc_virt_device(xhci, slot_id, udev, GFP_NOIO)) { |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3823 | xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n"); |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 3824 | goto disable_slot; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3825 | } |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 3826 | udev->slot_id = slot_id; |
Shawn Nematbakhsh | c8476fb | 2013-08-19 10:36:13 -0700 | [diff] [blame] | 3827 | |
| 3828 | #ifndef CONFIG_USB_DEFAULT_PERSIST |
| 3829 | /* |
| 3830 | * If resetting upon resume, we can't put the controller into runtime |
| 3831 | * suspend if there is a device attached. |
| 3832 | */ |
| 3833 | if (xhci->quirks & XHCI_RESET_ON_RESUME) |
Sarah Sharp | e7ecf06 | 2013-08-28 09:31:04 -0700 | [diff] [blame] | 3834 | pm_runtime_get_noresume(hcd->self.controller); |
Shawn Nematbakhsh | c8476fb | 2013-08-19 10:36:13 -0700 | [diff] [blame] | 3835 | #endif |
| 3836 | |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 3837 | |
| 3838 | kfree(command); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3839 | /* Is this a LS or FS device under a HS hub? */ |
| 3840 | /* Hub or peripherial? */ |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3841 | return 1; |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 3842 | |
| 3843 | disable_slot: |
| 3844 | /* Disable slot, if we can do it without mem alloc */ |
| 3845 | spin_lock_irqsave(&xhci->lock, flags); |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 3846 | command->completion = NULL; |
| 3847 | command->status = 0; |
| 3848 | if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT, |
| 3849 | udev->slot_id)) |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 3850 | xhci_ring_cmd_db(xhci); |
| 3851 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3852 | return 0; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3853 | } |
| 3854 | |
| 3855 | /* |
Dan Williams | 48fc7db | 2013-12-05 17:07:27 -0800 | [diff] [blame] | 3856 | * Issue an Address Device command and optionally send a corresponding |
| 3857 | * SetAddress request to the device. |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3858 | */ |
Dan Williams | 48fc7db | 2013-12-05 17:07:27 -0800 | [diff] [blame] | 3859 | static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev, |
| 3860 | enum xhci_setup_dev setup) |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3861 | { |
Dan Williams | 6f8ffc0 | 2013-11-22 01:20:01 -0800 | [diff] [blame] | 3862 | const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address"; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3863 | unsigned long flags; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3864 | struct xhci_virt_device *virt_dev; |
| 3865 | int ret = 0; |
| 3866 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 3867 | struct xhci_slot_ctx *slot_ctx; |
| 3868 | struct xhci_input_control_ctx *ctrl_ctx; |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 3869 | u64 temp_64; |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 3870 | struct xhci_command *command = NULL; |
| 3871 | |
| 3872 | mutex_lock(&xhci->mutex); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3873 | |
Lu Baolu | a2118d0 | 2017-01-03 18:28:44 +0200 | [diff] [blame] | 3874 | if (xhci->xhc_state) { /* dying, removing or halted */ |
| 3875 | ret = -ESHUTDOWN; |
Roger Quadros | 448116b | 2015-09-21 17:46:15 +0300 | [diff] [blame] | 3876 | goto out; |
Lu Baolu | a2118d0 | 2017-01-03 18:28:44 +0200 | [diff] [blame] | 3877 | } |
Roger Quadros | 448116b | 2015-09-21 17:46:15 +0300 | [diff] [blame] | 3878 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3879 | if (!udev->slot_id) { |
Xenia Ragiadakou | 84a99f6 | 2013-08-06 00:22:15 +0300 | [diff] [blame] | 3880 | xhci_dbg_trace(xhci, trace_xhci_dbg_address, |
| 3881 | "Bad Slot ID %d", udev->slot_id); |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 3882 | ret = -EINVAL; |
| 3883 | goto out; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3884 | } |
| 3885 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3886 | virt_dev = xhci->devs[udev->slot_id]; |
| 3887 | |
Matt Evans | 7ed603e | 2011-03-29 13:40:56 +1100 | [diff] [blame] | 3888 | if (WARN_ON(!virt_dev)) { |
| 3889 | /* |
| 3890 | * In plug/unplug torture test with an NEC controller, |
| 3891 | * a zero-dereference was observed once due to virt_dev = 0. |
| 3892 | * Print useful debug rather than crash if it is observed again! |
| 3893 | */ |
| 3894 | xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n", |
| 3895 | udev->slot_id); |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 3896 | ret = -EINVAL; |
| 3897 | goto out; |
Matt Evans | 7ed603e | 2011-03-29 13:40:56 +1100 | [diff] [blame] | 3898 | } |
| 3899 | |
Mathias Nyman | f161ead | 2015-01-09 17:18:28 +0200 | [diff] [blame] | 3900 | if (setup == SETUP_CONTEXT_ONLY) { |
| 3901 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); |
| 3902 | if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) == |
| 3903 | SLOT_STATE_DEFAULT) { |
| 3904 | xhci_dbg(xhci, "Slot already in default state\n"); |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 3905 | goto out; |
Mathias Nyman | f161ead | 2015-01-09 17:18:28 +0200 | [diff] [blame] | 3906 | } |
| 3907 | } |
| 3908 | |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 3909 | command = xhci_alloc_command(xhci, false, false, GFP_KERNEL); |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 3910 | if (!command) { |
| 3911 | ret = -ENOMEM; |
| 3912 | goto out; |
| 3913 | } |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 3914 | |
| 3915 | command->in_ctx = virt_dev->in_ctx; |
| 3916 | command->completion = &xhci->addr_dev; |
| 3917 | |
Andiry Xu | f0615c4 | 2010-10-14 07:22:48 -0700 | [diff] [blame] | 3918 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 3919 | ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx); |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 3920 | if (!ctrl_ctx) { |
| 3921 | xhci_warn(xhci, "%s: Could not get input context, bad type.\n", |
| 3922 | __func__); |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 3923 | ret = -EINVAL; |
| 3924 | goto out; |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 3925 | } |
Andiry Xu | f0615c4 | 2010-10-14 07:22:48 -0700 | [diff] [blame] | 3926 | /* |
| 3927 | * If this is the first Set Address since device plug-in or |
| 3928 | * virt_device realloaction after a resume with an xHCI power loss, |
| 3929 | * then set up the slot context. |
| 3930 | */ |
| 3931 | if (!slot_ctx->dev_info) |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3932 | xhci_setup_addressable_virt_dev(xhci, udev); |
Andiry Xu | f0615c4 | 2010-10-14 07:22:48 -0700 | [diff] [blame] | 3933 | /* Otherwise, update the control endpoint ring enqueue pointer. */ |
Sarah Sharp | 2d1ee59 | 2010-07-09 17:08:54 +0200 | [diff] [blame] | 3934 | else |
| 3935 | xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev); |
Sarah Sharp | d31c285 | 2011-11-03 13:06:08 -0700 | [diff] [blame] | 3936 | ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG); |
| 3937 | ctrl_ctx->drop_flags = 0; |
| 3938 | |
Sarah Sharp | 66e49d8 | 2009-07-27 12:03:46 -0700 | [diff] [blame] | 3939 | xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 3940 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2); |
Xenia Ragiadakou | 1d27fab | 2013-08-06 07:52:47 +0300 | [diff] [blame] | 3941 | trace_xhci_address_ctx(xhci, virt_dev->in_ctx, |
Xenia Ragiadakou | 0c052aa | 2013-11-15 03:18:07 +0200 | [diff] [blame] | 3942 | le32_to_cpu(slot_ctx->dev_info) >> 27); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3943 | |
Sarah Sharp | f88ba78 | 2009-05-14 11:44:22 -0700 | [diff] [blame] | 3944 | spin_lock_irqsave(&xhci->lock, flags); |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 3945 | ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma, |
Dan Williams | 48fc7db | 2013-12-05 17:07:27 -0800 | [diff] [blame] | 3946 | udev->slot_id, setup); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3947 | if (ret) { |
| 3948 | spin_unlock_irqrestore(&xhci->lock, flags); |
Xenia Ragiadakou | 84a99f6 | 2013-08-06 00:22:15 +0300 | [diff] [blame] | 3949 | xhci_dbg_trace(xhci, trace_xhci_dbg_address, |
| 3950 | "FIXME: allocate a command ring segment"); |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 3951 | goto out; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3952 | } |
Sarah Sharp | 23e3be1 | 2009-04-29 19:05:20 -0700 | [diff] [blame] | 3953 | xhci_ring_cmd_db(xhci); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3954 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3955 | |
| 3956 | /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */ |
Mathias Nyman | c311e39 | 2014-05-08 19:26:03 +0300 | [diff] [blame] | 3957 | wait_for_completion(command->completion); |
| 3958 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3959 | /* FIXME: From section 4.3.4: "Software shall be responsible for timing |
| 3960 | * the SetAddress() "recovery interval" required by USB and aborting the |
| 3961 | * command on a timeout. |
| 3962 | */ |
Mathias Nyman | 9ea1833 | 2014-05-08 19:26:02 +0300 | [diff] [blame] | 3963 | switch (command->status) { |
Mathias Nyman | c311e39 | 2014-05-08 19:26:03 +0300 | [diff] [blame] | 3964 | case COMP_CMD_ABORT: |
| 3965 | case COMP_CMD_STOP: |
| 3966 | xhci_warn(xhci, "Timeout while waiting for setup device command\n"); |
| 3967 | ret = -ETIME; |
| 3968 | break; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3969 | case COMP_CTX_STATE: |
| 3970 | case COMP_EBADSLT: |
Dan Williams | 6f8ffc0 | 2013-11-22 01:20:01 -0800 | [diff] [blame] | 3971 | xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n", |
| 3972 | act, udev->slot_id); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3973 | ret = -EINVAL; |
| 3974 | break; |
| 3975 | case COMP_TX_ERR: |
Dan Williams | 6f8ffc0 | 2013-11-22 01:20:01 -0800 | [diff] [blame] | 3976 | dev_warn(&udev->dev, "Device not responding to setup %s.\n", act); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3977 | ret = -EPROTO; |
| 3978 | break; |
Alex He | f6ba6fe | 2011-06-08 18:34:06 +0800 | [diff] [blame] | 3979 | case COMP_DEV_ERR: |
Dan Williams | 6f8ffc0 | 2013-11-22 01:20:01 -0800 | [diff] [blame] | 3980 | dev_warn(&udev->dev, |
| 3981 | "ERROR: Incompatible device for setup %s command\n", act); |
Alex He | f6ba6fe | 2011-06-08 18:34:06 +0800 | [diff] [blame] | 3982 | ret = -ENODEV; |
| 3983 | break; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3984 | case COMP_SUCCESS: |
Xenia Ragiadakou | 84a99f6 | 2013-08-06 00:22:15 +0300 | [diff] [blame] | 3985 | xhci_dbg_trace(xhci, trace_xhci_dbg_address, |
Dan Williams | 6f8ffc0 | 2013-11-22 01:20:01 -0800 | [diff] [blame] | 3986 | "Successful setup %s command", act); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3987 | break; |
| 3988 | default: |
Dan Williams | 6f8ffc0 | 2013-11-22 01:20:01 -0800 | [diff] [blame] | 3989 | xhci_err(xhci, |
| 3990 | "ERROR: unexpected setup %s command completion code 0x%x.\n", |
Mathias Nyman | 9ea1833 | 2014-05-08 19:26:02 +0300 | [diff] [blame] | 3991 | act, command->status); |
Sarah Sharp | 66e49d8 | 2009-07-27 12:03:46 -0700 | [diff] [blame] | 3992 | xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 3993 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2); |
Xenia Ragiadakou | 1d27fab | 2013-08-06 07:52:47 +0300 | [diff] [blame] | 3994 | trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3995 | ret = -EINVAL; |
| 3996 | break; |
| 3997 | } |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 3998 | if (ret) |
| 3999 | goto out; |
Sarah Sharp | f7b2e40 | 2014-01-30 13:27:49 -0800 | [diff] [blame] | 4000 | temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); |
Xenia Ragiadakou | 84a99f6 | 2013-08-06 00:22:15 +0300 | [diff] [blame] | 4001 | xhci_dbg_trace(xhci, trace_xhci_dbg_address, |
| 4002 | "Op regs DCBAA ptr = %#016llx", temp_64); |
| 4003 | xhci_dbg_trace(xhci, trace_xhci_dbg_address, |
Vamsi Krishna Samavedam | f826f83 | 2016-11-03 17:06:34 -0700 | [diff] [blame] | 4004 | "Slot ID %d dcbaa entry @%pK = %#016llx", |
Xenia Ragiadakou | 84a99f6 | 2013-08-06 00:22:15 +0300 | [diff] [blame] | 4005 | udev->slot_id, |
| 4006 | &xhci->dcbaa->dev_context_ptrs[udev->slot_id], |
| 4007 | (unsigned long long) |
| 4008 | le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id])); |
| 4009 | xhci_dbg_trace(xhci, trace_xhci_dbg_address, |
| 4010 | "Output Context DMA address = %#08llx", |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 4011 | (unsigned long long)virt_dev->out_ctx->dma); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 4012 | xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 4013 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2); |
Xenia Ragiadakou | 1d27fab | 2013-08-06 07:52:47 +0300 | [diff] [blame] | 4014 | trace_xhci_address_ctx(xhci, virt_dev->in_ctx, |
Xenia Ragiadakou | 0c052aa | 2013-11-15 03:18:07 +0200 | [diff] [blame] | 4015 | le32_to_cpu(slot_ctx->dev_info) >> 27); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 4016 | xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 4017 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 4018 | /* |
| 4019 | * USB core uses address 1 for the roothubs, so we add one to the |
| 4020 | * address given back to us by the HC. |
| 4021 | */ |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 4022 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); |
Xenia Ragiadakou | 1d27fab | 2013-08-06 07:52:47 +0300 | [diff] [blame] | 4023 | trace_xhci_address_ctx(xhci, virt_dev->out_ctx, |
Xenia Ragiadakou | 0c052aa | 2013-11-15 03:18:07 +0200 | [diff] [blame] | 4024 | le32_to_cpu(slot_ctx->dev_info) >> 27); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 4025 | /* Zero the input context control for later use */ |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 4026 | ctrl_ctx->add_flags = 0; |
| 4027 | ctrl_ctx->drop_flags = 0; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 4028 | |
Xenia Ragiadakou | 84a99f6 | 2013-08-06 00:22:15 +0300 | [diff] [blame] | 4029 | xhci_dbg_trace(xhci, trace_xhci_dbg_address, |
Dan Williams | a2cdc34 | 2013-10-16 12:25:44 -0700 | [diff] [blame] | 4030 | "Internal device address = %d", |
| 4031 | le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK); |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 4032 | out: |
| 4033 | mutex_unlock(&xhci->mutex); |
Mathias Nyman | ddba5cd | 2014-05-08 19:26:00 +0300 | [diff] [blame] | 4034 | kfree(command); |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 4035 | return ret; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 4036 | } |
| 4037 | |
Dan Williams | 48fc7db | 2013-12-05 17:07:27 -0800 | [diff] [blame] | 4038 | int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev) |
| 4039 | { |
| 4040 | return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS); |
| 4041 | } |
| 4042 | |
| 4043 | int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev) |
| 4044 | { |
| 4045 | return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY); |
| 4046 | } |
| 4047 | |
Lan Tianyu | 3f5eb14 | 2013-03-19 16:48:12 +0800 | [diff] [blame] | 4048 | /* |
| 4049 | * Transfer the port index into real index in the HW port status |
| 4050 | * registers. Caculate offset between the port's PORTSC register |
| 4051 | * and port status base. Divide the number of per port register |
| 4052 | * to get the real index. The raw port number bases 1. |
| 4053 | */ |
| 4054 | int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1) |
| 4055 | { |
| 4056 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 4057 | __le32 __iomem *base_addr = &xhci->op_regs->port_status_base; |
| 4058 | __le32 __iomem *addr; |
| 4059 | int raw_port; |
| 4060 | |
Mathias Nyman | b50107b | 2015-10-01 18:40:38 +0300 | [diff] [blame] | 4061 | if (hcd->speed < HCD_USB3) |
Lan Tianyu | 3f5eb14 | 2013-03-19 16:48:12 +0800 | [diff] [blame] | 4062 | addr = xhci->usb2_ports[port1 - 1]; |
| 4063 | else |
| 4064 | addr = xhci->usb3_ports[port1 - 1]; |
| 4065 | |
| 4066 | raw_port = (addr - base_addr)/NUM_PORT_REGS + 1; |
| 4067 | return raw_port; |
| 4068 | } |
| 4069 | |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4070 | /* |
| 4071 | * Issue an Evaluate Context command to change the Maximum Exit Latency in the |
| 4072 | * slot context. If that succeeds, store the new MEL in the xhci_virt_device. |
| 4073 | */ |
Olof Johansson | d5c82fe | 2013-07-23 11:58:20 -0700 | [diff] [blame] | 4074 | static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci, |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4075 | struct usb_device *udev, u16 max_exit_latency) |
| 4076 | { |
| 4077 | struct xhci_virt_device *virt_dev; |
| 4078 | struct xhci_command *command; |
| 4079 | struct xhci_input_control_ctx *ctrl_ctx; |
| 4080 | struct xhci_slot_ctx *slot_ctx; |
| 4081 | unsigned long flags; |
| 4082 | int ret; |
| 4083 | |
| 4084 | spin_lock_irqsave(&xhci->lock, flags); |
Mathias Nyman | 9604469 | 2014-09-11 13:55:50 +0300 | [diff] [blame] | 4085 | |
| 4086 | virt_dev = xhci->devs[udev->slot_id]; |
| 4087 | |
| 4088 | /* |
| 4089 | * virt_dev might not exists yet if xHC resumed from hibernate (S4) and |
| 4090 | * xHC was re-initialized. Exit latency will be set later after |
| 4091 | * hub_port_finish_reset() is done and xhci->devs[] are re-allocated |
| 4092 | */ |
| 4093 | |
| 4094 | if (!virt_dev || max_exit_latency == virt_dev->current_mel) { |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4095 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 4096 | return 0; |
| 4097 | } |
| 4098 | |
| 4099 | /* Attempt to issue an Evaluate Context command to change the MEL. */ |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4100 | command = xhci->lpm_command; |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 4101 | ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 4102 | if (!ctrl_ctx) { |
| 4103 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 4104 | xhci_warn(xhci, "%s: Could not get input context, bad type.\n", |
| 4105 | __func__); |
| 4106 | return -ENOMEM; |
| 4107 | } |
| 4108 | |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4109 | xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx); |
| 4110 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 4111 | |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4112 | ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); |
| 4113 | slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx); |
| 4114 | slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT)); |
| 4115 | slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency); |
Mathias Nyman | 4801d4ea | 2014-11-27 18:19:15 +0200 | [diff] [blame] | 4116 | slot_ctx->dev_state = 0; |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4117 | |
Xenia Ragiadakou | 3a7fa5b | 2013-07-31 07:35:27 +0300 | [diff] [blame] | 4118 | xhci_dbg_trace(xhci, trace_xhci_dbg_context_change, |
| 4119 | "Set up evaluate context for LPM MEL change."); |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4120 | xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id); |
| 4121 | xhci_dbg_ctx(xhci, command->in_ctx, 0); |
| 4122 | |
| 4123 | /* Issue and wait for the evaluate context command. */ |
| 4124 | ret = xhci_configure_endpoint(xhci, udev, command, |
| 4125 | true, true); |
| 4126 | xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id); |
| 4127 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0); |
| 4128 | |
| 4129 | if (!ret) { |
| 4130 | spin_lock_irqsave(&xhci->lock, flags); |
| 4131 | virt_dev->current_mel = max_exit_latency; |
| 4132 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 4133 | } |
| 4134 | return ret; |
| 4135 | } |
| 4136 | |
Rafael J. Wysocki | ceb6c9c | 2014-11-29 23:47:05 +0100 | [diff] [blame] | 4137 | #ifdef CONFIG_PM |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 4138 | |
| 4139 | /* BESL to HIRD Encoding array for USB2 LPM */ |
| 4140 | static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000, |
| 4141 | 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000}; |
| 4142 | |
| 4143 | /* Calculate HIRD/BESL for USB2 PORTPMSC*/ |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 4144 | static int xhci_calculate_hird_besl(struct xhci_hcd *xhci, |
| 4145 | struct usb_device *udev) |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 4146 | { |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 4147 | int u2del, besl, besl_host; |
| 4148 | int besl_device = 0; |
| 4149 | u32 field; |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 4150 | |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 4151 | u2del = HCS_U2_LATENCY(xhci->hcs_params3); |
| 4152 | field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); |
| 4153 | |
| 4154 | if (field & USB_BESL_SUPPORT) { |
| 4155 | for (besl_host = 0; besl_host < 16; besl_host++) { |
| 4156 | if (xhci_besl_encoding[besl_host] >= u2del) |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 4157 | break; |
| 4158 | } |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 4159 | /* Use baseline BESL value as default */ |
| 4160 | if (field & USB_BESL_BASELINE_VALID) |
| 4161 | besl_device = USB_GET_BESL_BASELINE(field); |
| 4162 | else if (field & USB_BESL_DEEP_VALID) |
| 4163 | besl_device = USB_GET_BESL_DEEP(field); |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 4164 | } else { |
| 4165 | if (u2del <= 50) |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 4166 | besl_host = 0; |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 4167 | else |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 4168 | besl_host = (u2del - 51) / 75 + 1; |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 4169 | } |
| 4170 | |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 4171 | besl = besl_host + besl_device; |
| 4172 | if (besl > 15) |
| 4173 | besl = 15; |
| 4174 | |
| 4175 | return besl; |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 4176 | } |
| 4177 | |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4178 | /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */ |
| 4179 | static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev) |
| 4180 | { |
| 4181 | u32 field; |
| 4182 | int l1; |
| 4183 | int besld = 0; |
| 4184 | int hirdm = 0; |
| 4185 | |
| 4186 | field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); |
| 4187 | |
| 4188 | /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */ |
Mathias Nyman | 17f3486 | 2013-05-23 17:14:31 +0300 | [diff] [blame] | 4189 | l1 = udev->l1_params.timeout / 256; |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4190 | |
| 4191 | /* device has preferred BESLD */ |
| 4192 | if (field & USB_BESL_DEEP_VALID) { |
| 4193 | besld = USB_GET_BESL_DEEP(field); |
| 4194 | hirdm = 1; |
| 4195 | } |
| 4196 | |
| 4197 | return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm); |
| 4198 | } |
| 4199 | |
Andiry Xu | 65580b43 | 2011-09-23 14:19:52 -0700 | [diff] [blame] | 4200 | int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd, |
| 4201 | struct usb_device *udev, int enable) |
| 4202 | { |
| 4203 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 4204 | __le32 __iomem **port_array; |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4205 | __le32 __iomem *pm_addr, *hlpm_addr; |
| 4206 | u32 pm_val, hlpm_val, field; |
Andiry Xu | 65580b43 | 2011-09-23 14:19:52 -0700 | [diff] [blame] | 4207 | unsigned int port_num; |
| 4208 | unsigned long flags; |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4209 | int hird, exit_latency; |
| 4210 | int ret; |
Andiry Xu | 65580b43 | 2011-09-23 14:19:52 -0700 | [diff] [blame] | 4211 | |
Mathias Nyman | b50107b | 2015-10-01 18:40:38 +0300 | [diff] [blame] | 4212 | if (hcd->speed >= HCD_USB3 || !xhci->hw_lpm_support || |
Andiry Xu | 65580b43 | 2011-09-23 14:19:52 -0700 | [diff] [blame] | 4213 | !udev->lpm_capable) |
| 4214 | return -EPERM; |
| 4215 | |
| 4216 | if (!udev->parent || udev->parent->parent || |
| 4217 | udev->descriptor.bDeviceClass == USB_CLASS_HUB) |
| 4218 | return -EPERM; |
| 4219 | |
| 4220 | if (udev->usb2_hw_lpm_capable != 1) |
| 4221 | return -EPERM; |
| 4222 | |
| 4223 | spin_lock_irqsave(&xhci->lock, flags); |
| 4224 | |
| 4225 | port_array = xhci->usb2_ports; |
| 4226 | port_num = udev->portnum - 1; |
Mathias Nyman | b6e7637 | 2013-05-23 17:14:29 +0300 | [diff] [blame] | 4227 | pm_addr = port_array[port_num] + PORTPMSC; |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 4228 | pm_val = readl(pm_addr); |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4229 | hlpm_addr = port_array[port_num] + PORTHLPMC; |
Andiry Xu | 65580b43 | 2011-09-23 14:19:52 -0700 | [diff] [blame] | 4230 | |
| 4231 | xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n", |
Lin Wang | 654a55d | 2014-05-08 19:25:54 +0300 | [diff] [blame] | 4232 | enable ? "enable" : "disable", port_num + 1); |
Andiry Xu | 65580b43 | 2011-09-23 14:19:52 -0700 | [diff] [blame] | 4233 | |
Andiry Xu | 65580b43 | 2011-09-23 14:19:52 -0700 | [diff] [blame] | 4234 | if (enable) { |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4235 | /* Host supports BESL timeout instead of HIRD */ |
| 4236 | if (udev->usb2_hw_lpm_besl_capable) { |
| 4237 | /* if device doesn't have a preferred BESL value use a |
| 4238 | * default one which works with mixed HIRD and BESL |
| 4239 | * systems. See XHCI_DEFAULT_BESL definition in xhci.h |
| 4240 | */ |
Carsten Schmid | 3899f1a | 2019-05-22 14:33:59 +0300 | [diff] [blame] | 4241 | field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4242 | if ((field & USB_BESL_SUPPORT) && |
| 4243 | (field & USB_BESL_BASELINE_VALID)) |
| 4244 | hird = USB_GET_BESL_BASELINE(field); |
| 4245 | else |
Mathias Nyman | 17f3486 | 2013-05-23 17:14:31 +0300 | [diff] [blame] | 4246 | hird = udev->l1_params.besl; |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4247 | |
| 4248 | exit_latency = xhci_besl_encoding[hird]; |
| 4249 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 4250 | |
| 4251 | /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx |
| 4252 | * input context for link powermanagement evaluate |
| 4253 | * context commands. It is protected by hcd->bandwidth |
| 4254 | * mutex and is shared by all devices. We need to set |
| 4255 | * the max ext latency in USB 2 BESL LPM as well, so |
| 4256 | * use the same mutex and xhci_change_max_exit_latency() |
| 4257 | */ |
| 4258 | mutex_lock(hcd->bandwidth_mutex); |
| 4259 | ret = xhci_change_max_exit_latency(xhci, udev, |
| 4260 | exit_latency); |
| 4261 | mutex_unlock(hcd->bandwidth_mutex); |
| 4262 | |
| 4263 | if (ret < 0) |
| 4264 | return ret; |
| 4265 | spin_lock_irqsave(&xhci->lock, flags); |
| 4266 | |
| 4267 | hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev); |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 4268 | writel(hlpm_val, hlpm_addr); |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4269 | /* flush write */ |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 4270 | readl(hlpm_addr); |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4271 | } else { |
| 4272 | hird = xhci_calculate_hird_besl(xhci, udev); |
| 4273 | } |
| 4274 | |
| 4275 | pm_val &= ~PORT_HIRD_MASK; |
Sarah Sharp | 58e21f7 | 2013-10-07 17:17:20 -0700 | [diff] [blame] | 4276 | pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id); |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 4277 | writel(pm_val, pm_addr); |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 4278 | pm_val = readl(pm_addr); |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4279 | pm_val |= PORT_HLE; |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 4280 | writel(pm_val, pm_addr); |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4281 | /* flush write */ |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 4282 | readl(pm_addr); |
Andiry Xu | 65580b43 | 2011-09-23 14:19:52 -0700 | [diff] [blame] | 4283 | } else { |
Sarah Sharp | 58e21f7 | 2013-10-07 17:17:20 -0700 | [diff] [blame] | 4284 | pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK); |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 4285 | writel(pm_val, pm_addr); |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4286 | /* flush write */ |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 4287 | readl(pm_addr); |
Mathias Nyman | a558ccd | 2013-05-23 17:14:30 +0300 | [diff] [blame] | 4288 | if (udev->usb2_hw_lpm_besl_capable) { |
| 4289 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 4290 | mutex_lock(hcd->bandwidth_mutex); |
| 4291 | xhci_change_max_exit_latency(xhci, udev, 0); |
| 4292 | mutex_unlock(hcd->bandwidth_mutex); |
| 4293 | return 0; |
| 4294 | } |
Andiry Xu | 65580b43 | 2011-09-23 14:19:52 -0700 | [diff] [blame] | 4295 | } |
| 4296 | |
| 4297 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 4298 | return 0; |
| 4299 | } |
| 4300 | |
Mathias Nyman | b630d4b | 2013-05-23 17:14:28 +0300 | [diff] [blame] | 4301 | /* check if a usb2 port supports a given extened capability protocol |
| 4302 | * only USB2 ports extended protocol capability values are cached. |
| 4303 | * Return 1 if capability is supported |
| 4304 | */ |
| 4305 | static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port, |
| 4306 | unsigned capability) |
| 4307 | { |
| 4308 | u32 port_offset, port_count; |
| 4309 | int i; |
| 4310 | |
| 4311 | for (i = 0; i < xhci->num_ext_caps; i++) { |
| 4312 | if (xhci->ext_caps[i] & capability) { |
| 4313 | /* port offsets starts at 1 */ |
| 4314 | port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1; |
| 4315 | port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]); |
| 4316 | if (port >= port_offset && |
| 4317 | port < port_offset + port_count) |
| 4318 | return 1; |
| 4319 | } |
| 4320 | } |
| 4321 | return 0; |
| 4322 | } |
| 4323 | |
Sarah Sharp | b01bcbf | 2012-05-21 07:54:42 -0700 | [diff] [blame] | 4324 | int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev) |
| 4325 | { |
| 4326 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
Mathias Nyman | b630d4b | 2013-05-23 17:14:28 +0300 | [diff] [blame] | 4327 | int portnum = udev->portnum - 1; |
Sarah Sharp | b01bcbf | 2012-05-21 07:54:42 -0700 | [diff] [blame] | 4328 | |
Mathias Nyman | b50107b | 2015-10-01 18:40:38 +0300 | [diff] [blame] | 4329 | if (hcd->speed >= HCD_USB3 || !xhci->sw_lpm_support || |
Sarah Sharp | de68bab | 2013-09-30 17:26:28 +0300 | [diff] [blame] | 4330 | !udev->lpm_capable) |
| 4331 | return 0; |
| 4332 | |
| 4333 | /* we only support lpm for non-hub device connected to root hub yet */ |
| 4334 | if (!udev->parent || udev->parent->parent || |
| 4335 | udev->descriptor.bDeviceClass == USB_CLASS_HUB) |
| 4336 | return 0; |
| 4337 | |
| 4338 | if (xhci->hw_lpm_support == 1 && |
| 4339 | xhci_check_usb2_port_capability( |
| 4340 | xhci, portnum, XHCI_HLC)) { |
| 4341 | udev->usb2_hw_lpm_capable = 1; |
| 4342 | udev->l1_params.timeout = XHCI_L1_TIMEOUT; |
| 4343 | udev->l1_params.besl = XHCI_DEFAULT_BESL; |
| 4344 | if (xhci_check_usb2_port_capability(xhci, portnum, |
| 4345 | XHCI_BLC)) |
| 4346 | udev->usb2_hw_lpm_besl_capable = 1; |
Sarah Sharp | b01bcbf | 2012-05-21 07:54:42 -0700 | [diff] [blame] | 4347 | } |
| 4348 | |
| 4349 | return 0; |
| 4350 | } |
| 4351 | |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4352 | /*---------------------- USB 3.0 Link PM functions ------------------------*/ |
| 4353 | |
Sarah Sharp | e3567d2 | 2012-05-16 13:36:24 -0700 | [diff] [blame] | 4354 | /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */ |
| 4355 | static unsigned long long xhci_service_interval_to_ns( |
| 4356 | struct usb_endpoint_descriptor *desc) |
| 4357 | { |
Oliver Neukum | 16b45fd | 2012-10-17 10:16:16 +0200 | [diff] [blame] | 4358 | return (1ULL << (desc->bInterval - 1)) * 125 * 1000; |
Sarah Sharp | e3567d2 | 2012-05-16 13:36:24 -0700 | [diff] [blame] | 4359 | } |
| 4360 | |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4361 | static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev, |
| 4362 | enum usb3_link_state state) |
| 4363 | { |
| 4364 | unsigned long long sel; |
| 4365 | unsigned long long pel; |
| 4366 | unsigned int max_sel_pel; |
| 4367 | char *state_name; |
| 4368 | |
| 4369 | switch (state) { |
| 4370 | case USB3_LPM_U1: |
| 4371 | /* Convert SEL and PEL stored in nanoseconds to microseconds */ |
| 4372 | sel = DIV_ROUND_UP(udev->u1_params.sel, 1000); |
| 4373 | pel = DIV_ROUND_UP(udev->u1_params.pel, 1000); |
| 4374 | max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL; |
| 4375 | state_name = "U1"; |
| 4376 | break; |
| 4377 | case USB3_LPM_U2: |
| 4378 | sel = DIV_ROUND_UP(udev->u2_params.sel, 1000); |
| 4379 | pel = DIV_ROUND_UP(udev->u2_params.pel, 1000); |
| 4380 | max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL; |
| 4381 | state_name = "U2"; |
| 4382 | break; |
| 4383 | default: |
| 4384 | dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n", |
| 4385 | __func__); |
Sarah Sharp | e25e62a | 2012-06-07 11:10:32 -0700 | [diff] [blame] | 4386 | return USB3_LPM_DISABLED; |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4387 | } |
| 4388 | |
| 4389 | if (sel <= max_sel_pel && pel <= max_sel_pel) |
| 4390 | return USB3_LPM_DEVICE_INITIATED; |
| 4391 | |
| 4392 | if (sel > max_sel_pel) |
| 4393 | dev_dbg(&udev->dev, "Device-initiated %s disabled " |
| 4394 | "due to long SEL %llu ms\n", |
| 4395 | state_name, sel); |
| 4396 | else |
| 4397 | dev_dbg(&udev->dev, "Device-initiated %s disabled " |
Joe Perches | 03e64e9 | 2013-07-16 19:25:59 -0700 | [diff] [blame] | 4398 | "due to long PEL %llu ms\n", |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4399 | state_name, pel); |
| 4400 | return USB3_LPM_DISABLED; |
| 4401 | } |
| 4402 | |
Pratyush Anand | 9502c46 | 2014-07-04 17:01:23 +0300 | [diff] [blame] | 4403 | /* The U1 timeout should be the maximum of the following values: |
Sarah Sharp | e3567d2 | 2012-05-16 13:36:24 -0700 | [diff] [blame] | 4404 | * - For control endpoints, U1 system exit latency (SEL) * 3 |
| 4405 | * - For bulk endpoints, U1 SEL * 5 |
| 4406 | * - For interrupt endpoints: |
| 4407 | * - Notification EPs, U1 SEL * 3 |
| 4408 | * - Periodic EPs, max(105% of bInterval, U1 SEL * 2) |
| 4409 | * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2) |
| 4410 | */ |
Pratyush Anand | 9502c46 | 2014-07-04 17:01:23 +0300 | [diff] [blame] | 4411 | static unsigned long long xhci_calculate_intel_u1_timeout( |
| 4412 | struct usb_device *udev, |
Sarah Sharp | e3567d2 | 2012-05-16 13:36:24 -0700 | [diff] [blame] | 4413 | struct usb_endpoint_descriptor *desc) |
| 4414 | { |
| 4415 | unsigned long long timeout_ns; |
| 4416 | int ep_type; |
| 4417 | int intr_type; |
| 4418 | |
| 4419 | ep_type = usb_endpoint_type(desc); |
| 4420 | switch (ep_type) { |
| 4421 | case USB_ENDPOINT_XFER_CONTROL: |
| 4422 | timeout_ns = udev->u1_params.sel * 3; |
| 4423 | break; |
| 4424 | case USB_ENDPOINT_XFER_BULK: |
| 4425 | timeout_ns = udev->u1_params.sel * 5; |
| 4426 | break; |
| 4427 | case USB_ENDPOINT_XFER_INT: |
| 4428 | intr_type = usb_endpoint_interrupt_type(desc); |
| 4429 | if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) { |
| 4430 | timeout_ns = udev->u1_params.sel * 3; |
| 4431 | break; |
| 4432 | } |
| 4433 | /* Otherwise the calculation is the same as isoc eps */ |
| 4434 | case USB_ENDPOINT_XFER_ISOC: |
| 4435 | timeout_ns = xhci_service_interval_to_ns(desc); |
Sarah Sharp | c88db16 | 2012-05-21 08:44:33 -0700 | [diff] [blame] | 4436 | timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100); |
Sarah Sharp | e3567d2 | 2012-05-16 13:36:24 -0700 | [diff] [blame] | 4437 | if (timeout_ns < udev->u1_params.sel * 2) |
| 4438 | timeout_ns = udev->u1_params.sel * 2; |
| 4439 | break; |
| 4440 | default: |
| 4441 | return 0; |
| 4442 | } |
| 4443 | |
Pratyush Anand | 9502c46 | 2014-07-04 17:01:23 +0300 | [diff] [blame] | 4444 | return timeout_ns; |
| 4445 | } |
| 4446 | |
| 4447 | /* Returns the hub-encoded U1 timeout value. */ |
| 4448 | static u16 xhci_calculate_u1_timeout(struct xhci_hcd *xhci, |
| 4449 | struct usb_device *udev, |
| 4450 | struct usb_endpoint_descriptor *desc) |
| 4451 | { |
| 4452 | unsigned long long timeout_ns; |
| 4453 | |
Mathias Nyman | d65afda | 2018-12-05 14:22:39 +0200 | [diff] [blame] | 4454 | /* Prevent U1 if service interval is shorter than U1 exit latency */ |
| 4455 | if (usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) { |
| 4456 | if (xhci_service_interval_to_ns(desc) <= udev->u1_params.mel) { |
| 4457 | dev_dbg(&udev->dev, "Disable U1, ESIT shorter than exit latency\n"); |
| 4458 | return USB3_LPM_DISABLED; |
| 4459 | } |
| 4460 | } |
| 4461 | |
Pratyush Anand | 9502c46 | 2014-07-04 17:01:23 +0300 | [diff] [blame] | 4462 | if (xhci->quirks & XHCI_INTEL_HOST) |
| 4463 | timeout_ns = xhci_calculate_intel_u1_timeout(udev, desc); |
| 4464 | else |
| 4465 | timeout_ns = udev->u1_params.sel; |
| 4466 | |
| 4467 | /* The U1 timeout is encoded in 1us intervals. |
| 4468 | * Don't return a timeout of zero, because that's USB3_LPM_DISABLED. |
| 4469 | */ |
Sarah Sharp | e3567d2 | 2012-05-16 13:36:24 -0700 | [diff] [blame] | 4470 | if (timeout_ns == USB3_LPM_DISABLED) |
Pratyush Anand | 9502c46 | 2014-07-04 17:01:23 +0300 | [diff] [blame] | 4471 | timeout_ns = 1; |
| 4472 | else |
| 4473 | timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000); |
Sarah Sharp | e3567d2 | 2012-05-16 13:36:24 -0700 | [diff] [blame] | 4474 | |
| 4475 | /* If the necessary timeout value is bigger than what we can set in the |
| 4476 | * USB 3.0 hub, we have to disable hub-initiated U1. |
| 4477 | */ |
| 4478 | if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT) |
| 4479 | return timeout_ns; |
| 4480 | dev_dbg(&udev->dev, "Hub-initiated U1 disabled " |
| 4481 | "due to long timeout %llu ms\n", timeout_ns); |
| 4482 | return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1); |
| 4483 | } |
| 4484 | |
Pratyush Anand | 9502c46 | 2014-07-04 17:01:23 +0300 | [diff] [blame] | 4485 | /* The U2 timeout should be the maximum of: |
Sarah Sharp | e3567d2 | 2012-05-16 13:36:24 -0700 | [diff] [blame] | 4486 | * - 10 ms (to avoid the bandwidth impact on the scheduler) |
| 4487 | * - largest bInterval of any active periodic endpoint (to avoid going |
| 4488 | * into lower power link states between intervals). |
| 4489 | * - the U2 Exit Latency of the device |
| 4490 | */ |
Pratyush Anand | 9502c46 | 2014-07-04 17:01:23 +0300 | [diff] [blame] | 4491 | static unsigned long long xhci_calculate_intel_u2_timeout( |
| 4492 | struct usb_device *udev, |
Sarah Sharp | e3567d2 | 2012-05-16 13:36:24 -0700 | [diff] [blame] | 4493 | struct usb_endpoint_descriptor *desc) |
| 4494 | { |
| 4495 | unsigned long long timeout_ns; |
| 4496 | unsigned long long u2_del_ns; |
| 4497 | |
| 4498 | timeout_ns = 10 * 1000 * 1000; |
| 4499 | |
| 4500 | if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) && |
| 4501 | (xhci_service_interval_to_ns(desc) > timeout_ns)) |
| 4502 | timeout_ns = xhci_service_interval_to_ns(desc); |
| 4503 | |
Oliver Neukum | 966e7a8 | 2012-10-17 12:17:50 +0200 | [diff] [blame] | 4504 | u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL; |
Sarah Sharp | e3567d2 | 2012-05-16 13:36:24 -0700 | [diff] [blame] | 4505 | if (u2_del_ns > timeout_ns) |
| 4506 | timeout_ns = u2_del_ns; |
| 4507 | |
Pratyush Anand | 9502c46 | 2014-07-04 17:01:23 +0300 | [diff] [blame] | 4508 | return timeout_ns; |
| 4509 | } |
| 4510 | |
| 4511 | /* Returns the hub-encoded U2 timeout value. */ |
| 4512 | static u16 xhci_calculate_u2_timeout(struct xhci_hcd *xhci, |
| 4513 | struct usb_device *udev, |
| 4514 | struct usb_endpoint_descriptor *desc) |
| 4515 | { |
| 4516 | unsigned long long timeout_ns; |
| 4517 | |
Mathias Nyman | d65afda | 2018-12-05 14:22:39 +0200 | [diff] [blame] | 4518 | /* Prevent U2 if service interval is shorter than U2 exit latency */ |
| 4519 | if (usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) { |
| 4520 | if (xhci_service_interval_to_ns(desc) <= udev->u2_params.mel) { |
| 4521 | dev_dbg(&udev->dev, "Disable U2, ESIT shorter than exit latency\n"); |
| 4522 | return USB3_LPM_DISABLED; |
| 4523 | } |
| 4524 | } |
| 4525 | |
Pratyush Anand | 9502c46 | 2014-07-04 17:01:23 +0300 | [diff] [blame] | 4526 | if (xhci->quirks & XHCI_INTEL_HOST) |
| 4527 | timeout_ns = xhci_calculate_intel_u2_timeout(udev, desc); |
| 4528 | else |
| 4529 | timeout_ns = udev->u2_params.sel; |
| 4530 | |
Sarah Sharp | e3567d2 | 2012-05-16 13:36:24 -0700 | [diff] [blame] | 4531 | /* The U2 timeout is encoded in 256us intervals */ |
Sarah Sharp | c88db16 | 2012-05-21 08:44:33 -0700 | [diff] [blame] | 4532 | timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000); |
Sarah Sharp | e3567d2 | 2012-05-16 13:36:24 -0700 | [diff] [blame] | 4533 | /* If the necessary timeout value is bigger than what we can set in the |
| 4534 | * USB 3.0 hub, we have to disable hub-initiated U2. |
| 4535 | */ |
| 4536 | if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT) |
| 4537 | return timeout_ns; |
| 4538 | dev_dbg(&udev->dev, "Hub-initiated U2 disabled " |
| 4539 | "due to long timeout %llu ms\n", timeout_ns); |
| 4540 | return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2); |
| 4541 | } |
| 4542 | |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4543 | static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci, |
| 4544 | struct usb_device *udev, |
| 4545 | struct usb_endpoint_descriptor *desc, |
| 4546 | enum usb3_link_state state, |
| 4547 | u16 *timeout) |
| 4548 | { |
Pratyush Anand | 9502c46 | 2014-07-04 17:01:23 +0300 | [diff] [blame] | 4549 | if (state == USB3_LPM_U1) |
| 4550 | return xhci_calculate_u1_timeout(xhci, udev, desc); |
| 4551 | else if (state == USB3_LPM_U2) |
| 4552 | return xhci_calculate_u2_timeout(xhci, udev, desc); |
Sarah Sharp | e3567d2 | 2012-05-16 13:36:24 -0700 | [diff] [blame] | 4553 | |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4554 | return USB3_LPM_DISABLED; |
| 4555 | } |
| 4556 | |
| 4557 | static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci, |
| 4558 | struct usb_device *udev, |
| 4559 | struct usb_endpoint_descriptor *desc, |
| 4560 | enum usb3_link_state state, |
| 4561 | u16 *timeout) |
| 4562 | { |
| 4563 | u16 alt_timeout; |
| 4564 | |
| 4565 | alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev, |
| 4566 | desc, state, timeout); |
| 4567 | |
Jan Schmidt | 6e29e09 | 2019-10-04 14:59:28 +0300 | [diff] [blame] | 4568 | /* If we found we can't enable hub-initiated LPM, and |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4569 | * the U1 or U2 exit latency was too high to allow |
Jan Schmidt | 6e29e09 | 2019-10-04 14:59:28 +0300 | [diff] [blame] | 4570 | * device-initiated LPM as well, then we will disable LPM |
| 4571 | * for this device, so stop searching any further. |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4572 | */ |
Jan Schmidt | 6e29e09 | 2019-10-04 14:59:28 +0300 | [diff] [blame] | 4573 | if (alt_timeout == USB3_LPM_DISABLED) { |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4574 | *timeout = alt_timeout; |
| 4575 | return -E2BIG; |
| 4576 | } |
| 4577 | if (alt_timeout > *timeout) |
| 4578 | *timeout = alt_timeout; |
| 4579 | return 0; |
| 4580 | } |
| 4581 | |
| 4582 | static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci, |
| 4583 | struct usb_device *udev, |
| 4584 | struct usb_host_interface *alt, |
| 4585 | enum usb3_link_state state, |
| 4586 | u16 *timeout) |
| 4587 | { |
| 4588 | int j; |
| 4589 | |
| 4590 | for (j = 0; j < alt->desc.bNumEndpoints; j++) { |
| 4591 | if (xhci_update_timeout_for_endpoint(xhci, udev, |
| 4592 | &alt->endpoint[j].desc, state, timeout)) |
| 4593 | return -E2BIG; |
| 4594 | continue; |
| 4595 | } |
| 4596 | return 0; |
| 4597 | } |
| 4598 | |
Sarah Sharp | e3567d2 | 2012-05-16 13:36:24 -0700 | [diff] [blame] | 4599 | static int xhci_check_intel_tier_policy(struct usb_device *udev, |
| 4600 | enum usb3_link_state state) |
| 4601 | { |
| 4602 | struct usb_device *parent; |
| 4603 | unsigned int num_hubs; |
| 4604 | |
| 4605 | if (state == USB3_LPM_U2) |
| 4606 | return 0; |
| 4607 | |
| 4608 | /* Don't enable U1 if the device is on a 2nd tier hub or lower. */ |
| 4609 | for (parent = udev->parent, num_hubs = 0; parent->parent; |
| 4610 | parent = parent->parent) |
| 4611 | num_hubs++; |
| 4612 | |
| 4613 | if (num_hubs < 2) |
| 4614 | return 0; |
| 4615 | |
| 4616 | dev_dbg(&udev->dev, "Disabling U1 link state for device" |
| 4617 | " below second-tier hub.\n"); |
| 4618 | dev_dbg(&udev->dev, "Plug device into first-tier hub " |
| 4619 | "to decrease power consumption.\n"); |
| 4620 | return -E2BIG; |
| 4621 | } |
| 4622 | |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4623 | static int xhci_check_tier_policy(struct xhci_hcd *xhci, |
| 4624 | struct usb_device *udev, |
| 4625 | enum usb3_link_state state) |
| 4626 | { |
Sarah Sharp | e3567d2 | 2012-05-16 13:36:24 -0700 | [diff] [blame] | 4627 | if (xhci->quirks & XHCI_INTEL_HOST) |
| 4628 | return xhci_check_intel_tier_policy(udev, state); |
Pratyush Anand | 9502c46 | 2014-07-04 17:01:23 +0300 | [diff] [blame] | 4629 | else |
| 4630 | return 0; |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4631 | } |
| 4632 | |
| 4633 | /* Returns the U1 or U2 timeout that should be enabled. |
| 4634 | * If the tier check or timeout setting functions return with a non-zero exit |
| 4635 | * code, that means the timeout value has been finalized and we shouldn't look |
| 4636 | * at any more endpoints. |
| 4637 | */ |
| 4638 | static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd, |
| 4639 | struct usb_device *udev, enum usb3_link_state state) |
| 4640 | { |
| 4641 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 4642 | struct usb_host_config *config; |
| 4643 | char *state_name; |
| 4644 | int i; |
| 4645 | u16 timeout = USB3_LPM_DISABLED; |
| 4646 | |
| 4647 | if (state == USB3_LPM_U1) |
| 4648 | state_name = "U1"; |
| 4649 | else if (state == USB3_LPM_U2) |
| 4650 | state_name = "U2"; |
| 4651 | else { |
| 4652 | dev_warn(&udev->dev, "Can't enable unknown link state %i\n", |
| 4653 | state); |
| 4654 | return timeout; |
| 4655 | } |
| 4656 | |
| 4657 | if (xhci_check_tier_policy(xhci, udev, state) < 0) |
| 4658 | return timeout; |
| 4659 | |
| 4660 | /* Gather some information about the currently installed configuration |
| 4661 | * and alternate interface settings. |
| 4662 | */ |
| 4663 | if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc, |
| 4664 | state, &timeout)) |
| 4665 | return timeout; |
| 4666 | |
| 4667 | config = udev->actconfig; |
| 4668 | if (!config) |
| 4669 | return timeout; |
| 4670 | |
Xenia Ragiadakou | 64ba419 | 2013-08-26 23:29:46 +0300 | [diff] [blame] | 4671 | for (i = 0; i < config->desc.bNumInterfaces; i++) { |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4672 | struct usb_driver *driver; |
| 4673 | struct usb_interface *intf = config->interface[i]; |
| 4674 | |
| 4675 | if (!intf) |
| 4676 | continue; |
| 4677 | |
| 4678 | /* Check if any currently bound drivers want hub-initiated LPM |
| 4679 | * disabled. |
| 4680 | */ |
| 4681 | if (intf->dev.driver) { |
| 4682 | driver = to_usb_driver(intf->dev.driver); |
| 4683 | if (driver && driver->disable_hub_initiated_lpm) { |
Mathias Nyman | 0ccae30 | 2019-10-04 14:59:27 +0300 | [diff] [blame] | 4684 | dev_dbg(&udev->dev, "Hub-initiated %s disabled at request of driver %s\n", |
| 4685 | state_name, driver->name); |
| 4686 | timeout = xhci_get_timeout_no_hub_lpm(udev, |
| 4687 | state); |
| 4688 | if (timeout == USB3_LPM_DISABLED) |
| 4689 | return timeout; |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4690 | } |
| 4691 | } |
| 4692 | |
| 4693 | /* Not sure how this could happen... */ |
| 4694 | if (!intf->cur_altsetting) |
| 4695 | continue; |
| 4696 | |
| 4697 | if (xhci_update_timeout_for_interface(xhci, udev, |
| 4698 | intf->cur_altsetting, |
| 4699 | state, &timeout)) |
| 4700 | return timeout; |
| 4701 | } |
| 4702 | return timeout; |
| 4703 | } |
| 4704 | |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4705 | static int calculate_max_exit_latency(struct usb_device *udev, |
| 4706 | enum usb3_link_state state_changed, |
| 4707 | u16 hub_encoded_timeout) |
| 4708 | { |
| 4709 | unsigned long long u1_mel_us = 0; |
| 4710 | unsigned long long u2_mel_us = 0; |
| 4711 | unsigned long long mel_us = 0; |
| 4712 | bool disabling_u1; |
| 4713 | bool disabling_u2; |
| 4714 | bool enabling_u1; |
| 4715 | bool enabling_u2; |
| 4716 | |
| 4717 | disabling_u1 = (state_changed == USB3_LPM_U1 && |
| 4718 | hub_encoded_timeout == USB3_LPM_DISABLED); |
| 4719 | disabling_u2 = (state_changed == USB3_LPM_U2 && |
| 4720 | hub_encoded_timeout == USB3_LPM_DISABLED); |
| 4721 | |
| 4722 | enabling_u1 = (state_changed == USB3_LPM_U1 && |
| 4723 | hub_encoded_timeout != USB3_LPM_DISABLED); |
| 4724 | enabling_u2 = (state_changed == USB3_LPM_U2 && |
| 4725 | hub_encoded_timeout != USB3_LPM_DISABLED); |
| 4726 | |
| 4727 | /* If U1 was already enabled and we're not disabling it, |
| 4728 | * or we're going to enable U1, account for the U1 max exit latency. |
| 4729 | */ |
| 4730 | if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) || |
| 4731 | enabling_u1) |
| 4732 | u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000); |
| 4733 | if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) || |
| 4734 | enabling_u2) |
| 4735 | u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000); |
| 4736 | |
| 4737 | if (u1_mel_us > u2_mel_us) |
| 4738 | mel_us = u1_mel_us; |
| 4739 | else |
| 4740 | mel_us = u2_mel_us; |
| 4741 | /* xHCI host controller max exit latency field is only 16 bits wide. */ |
| 4742 | if (mel_us > MAX_EXIT) { |
| 4743 | dev_warn(&udev->dev, "Link PM max exit latency of %lluus " |
| 4744 | "is too big.\n", mel_us); |
| 4745 | return -E2BIG; |
| 4746 | } |
| 4747 | return mel_us; |
| 4748 | } |
| 4749 | |
| 4750 | /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */ |
| 4751 | int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd, |
| 4752 | struct usb_device *udev, enum usb3_link_state state) |
| 4753 | { |
| 4754 | struct xhci_hcd *xhci; |
| 4755 | u16 hub_encoded_timeout; |
| 4756 | int mel; |
| 4757 | int ret; |
| 4758 | |
| 4759 | xhci = hcd_to_xhci(hcd); |
| 4760 | /* The LPM timeout values are pretty host-controller specific, so don't |
| 4761 | * enable hub-initiated timeouts unless the vendor has provided |
| 4762 | * information about their timeout algorithm. |
| 4763 | */ |
| 4764 | if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) || |
| 4765 | !xhci->devs[udev->slot_id]) |
| 4766 | return USB3_LPM_DISABLED; |
| 4767 | |
| 4768 | hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state); |
| 4769 | mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout); |
| 4770 | if (mel < 0) { |
| 4771 | /* Max Exit Latency is too big, disable LPM. */ |
| 4772 | hub_encoded_timeout = USB3_LPM_DISABLED; |
| 4773 | mel = 0; |
| 4774 | } |
| 4775 | |
| 4776 | ret = xhci_change_max_exit_latency(xhci, udev, mel); |
| 4777 | if (ret) |
| 4778 | return ret; |
| 4779 | return hub_encoded_timeout; |
| 4780 | } |
| 4781 | |
| 4782 | int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd, |
| 4783 | struct usb_device *udev, enum usb3_link_state state) |
| 4784 | { |
| 4785 | struct xhci_hcd *xhci; |
| 4786 | u16 mel; |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4787 | |
| 4788 | xhci = hcd_to_xhci(hcd); |
| 4789 | if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) || |
| 4790 | !xhci->devs[udev->slot_id]) |
| 4791 | return 0; |
| 4792 | |
| 4793 | mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED); |
Saurabh Karajgaonkar | f1cda54 | 2015-08-04 14:04:09 +0000 | [diff] [blame] | 4794 | return xhci_change_max_exit_latency(xhci, udev, mel); |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4795 | } |
Sarah Sharp | b01bcbf | 2012-05-21 07:54:42 -0700 | [diff] [blame] | 4796 | #else /* CONFIG_PM */ |
| 4797 | |
Rafael J. Wysocki | ceb6c9c | 2014-11-29 23:47:05 +0100 | [diff] [blame] | 4798 | int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd, |
| 4799 | struct usb_device *udev, int enable) |
| 4800 | { |
| 4801 | return 0; |
| 4802 | } |
| 4803 | |
| 4804 | int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev) |
| 4805 | { |
| 4806 | return 0; |
| 4807 | } |
| 4808 | |
Sarah Sharp | b01bcbf | 2012-05-21 07:54:42 -0700 | [diff] [blame] | 4809 | int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd, |
| 4810 | struct usb_device *udev, enum usb3_link_state state) |
| 4811 | { |
| 4812 | return USB3_LPM_DISABLED; |
| 4813 | } |
| 4814 | |
| 4815 | int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd, |
| 4816 | struct usb_device *udev, enum usb3_link_state state) |
| 4817 | { |
| 4818 | return 0; |
| 4819 | } |
| 4820 | #endif /* CONFIG_PM */ |
| 4821 | |
Sarah Sharp | 3b3db02 | 2012-05-09 10:55:03 -0700 | [diff] [blame] | 4822 | /*-------------------------------------------------------------------------*/ |
| 4823 | |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 4824 | /* Once a hub descriptor is fetched for a device, we need to update the xHC's |
| 4825 | * internal data structures for the device. |
| 4826 | */ |
| 4827 | int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev, |
| 4828 | struct usb_tt *tt, gfp_t mem_flags) |
| 4829 | { |
| 4830 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 4831 | struct xhci_virt_device *vdev; |
| 4832 | struct xhci_command *config_cmd; |
| 4833 | struct xhci_input_control_ctx *ctrl_ctx; |
| 4834 | struct xhci_slot_ctx *slot_ctx; |
| 4835 | unsigned long flags; |
| 4836 | unsigned think_time; |
| 4837 | int ret; |
| 4838 | |
| 4839 | /* Ignore root hubs */ |
| 4840 | if (!hdev->parent) |
| 4841 | return 0; |
| 4842 | |
| 4843 | vdev = xhci->devs[hdev->slot_id]; |
| 4844 | if (!vdev) { |
| 4845 | xhci_warn(xhci, "Cannot update hub desc for unknown device.\n"); |
| 4846 | return -EINVAL; |
| 4847 | } |
Sarah Sharp | a1d78c1 | 2009-12-09 15:59:03 -0800 | [diff] [blame] | 4848 | config_cmd = xhci_alloc_command(xhci, true, true, mem_flags); |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 4849 | if (!config_cmd) { |
| 4850 | xhci_dbg(xhci, "Could not allocate xHCI command structure.\n"); |
| 4851 | return -ENOMEM; |
| 4852 | } |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 4853 | ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx); |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 4854 | if (!ctrl_ctx) { |
| 4855 | xhci_warn(xhci, "%s: Could not get input context, bad type.\n", |
| 4856 | __func__); |
| 4857 | xhci_free_command(xhci, config_cmd); |
| 4858 | return -ENOMEM; |
| 4859 | } |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 4860 | |
| 4861 | spin_lock_irqsave(&xhci->lock, flags); |
Sarah Sharp | 839c817 | 2011-09-02 11:05:47 -0700 | [diff] [blame] | 4862 | if (hdev->speed == USB_SPEED_HIGH && |
| 4863 | xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) { |
| 4864 | xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n"); |
| 4865 | xhci_free_command(xhci, config_cmd); |
| 4866 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 4867 | return -ENOMEM; |
| 4868 | } |
| 4869 | |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 4870 | xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 4871 | ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 4872 | slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 4873 | slot_ctx->dev_info |= cpu_to_le32(DEV_HUB); |
Chunfeng Yun | 096b110 | 2015-12-04 15:53:43 +0200 | [diff] [blame] | 4874 | /* |
| 4875 | * refer to section 6.2.2: MTT should be 0 for full speed hub, |
| 4876 | * but it may be already set to 1 when setup an xHCI virtual |
| 4877 | * device, so clear it anyway. |
| 4878 | */ |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 4879 | if (tt->multi) |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 4880 | slot_ctx->dev_info |= cpu_to_le32(DEV_MTT); |
Chunfeng Yun | 096b110 | 2015-12-04 15:53:43 +0200 | [diff] [blame] | 4881 | else if (hdev->speed == USB_SPEED_FULL) |
| 4882 | slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT); |
| 4883 | |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 4884 | if (xhci->hci_version > 0x95) { |
| 4885 | xhci_dbg(xhci, "xHCI version %x needs hub " |
| 4886 | "TT think time and number of ports\n", |
| 4887 | (unsigned int) xhci->hci_version); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 4888 | slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild)); |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 4889 | /* Set TT think time - convert from ns to FS bit times. |
| 4890 | * 0 = 8 FS bit times, 1 = 16 FS bit times, |
| 4891 | * 2 = 24 FS bit times, 3 = 32 FS bit times. |
Andiry Xu | 700b417 | 2011-05-05 18:14:05 +0800 | [diff] [blame] | 4892 | * |
| 4893 | * xHCI 1.0: this field shall be 0 if the device is not a |
| 4894 | * High-spped hub. |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 4895 | */ |
| 4896 | think_time = tt->think_time; |
| 4897 | if (think_time != 0) |
| 4898 | think_time = (think_time / 666) - 1; |
Andiry Xu | 700b417 | 2011-05-05 18:14:05 +0800 | [diff] [blame] | 4899 | if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH) |
| 4900 | slot_ctx->tt_info |= |
| 4901 | cpu_to_le32(TT_THINK_TIME(think_time)); |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 4902 | } else { |
| 4903 | xhci_dbg(xhci, "xHCI version %x doesn't need hub " |
| 4904 | "TT think time or number of ports\n", |
| 4905 | (unsigned int) xhci->hci_version); |
| 4906 | } |
| 4907 | slot_ctx->dev_state = 0; |
| 4908 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 4909 | |
| 4910 | xhci_dbg(xhci, "Set up %s for hub device.\n", |
| 4911 | (xhci->hci_version > 0x95) ? |
| 4912 | "configure endpoint" : "evaluate context"); |
| 4913 | xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id); |
| 4914 | xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0); |
| 4915 | |
| 4916 | /* Issue and wait for the configure endpoint or |
| 4917 | * evaluate context command. |
| 4918 | */ |
| 4919 | if (xhci->hci_version > 0x95) |
| 4920 | ret = xhci_configure_endpoint(xhci, hdev, config_cmd, |
| 4921 | false, false); |
| 4922 | else |
| 4923 | ret = xhci_configure_endpoint(xhci, hdev, config_cmd, |
| 4924 | true, false); |
| 4925 | |
| 4926 | xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id); |
| 4927 | xhci_dbg_ctx(xhci, vdev->out_ctx, 0); |
| 4928 | |
| 4929 | xhci_free_command(xhci, config_cmd); |
| 4930 | return ret; |
| 4931 | } |
| 4932 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 4933 | int xhci_get_frame(struct usb_hcd *hcd) |
| 4934 | { |
| 4935 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 4936 | /* EHCI mods by the periodic size. Why? */ |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 4937 | return readl(&xhci->run_regs->microframe_index) >> 3; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 4938 | } |
| 4939 | |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 4940 | int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks) |
| 4941 | { |
| 4942 | struct xhci_hcd *xhci; |
Arnd Bergmann | a9ff911 | 2017-03-13 10:18:44 +0800 | [diff] [blame] | 4943 | /* |
| 4944 | * TODO: Check with DWC3 clients for sysdev according to |
| 4945 | * quirks |
| 4946 | */ |
| 4947 | struct device *dev = hcd->self.sysdev; |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 4948 | int retval; |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 4949 | |
Sarah Sharp | 1386ff7 | 2014-01-31 11:45:02 -0800 | [diff] [blame] | 4950 | /* Accept arbitrarily long scatter-gather lists */ |
| 4951 | hcd->self.sg_tablesize = ~0; |
Ming Lei | fc76051 | 2013-08-08 21:48:23 +0800 | [diff] [blame] | 4952 | |
Mathias Nyman | e2ed511 | 2014-03-07 17:06:57 +0200 | [diff] [blame] | 4953 | /* support to build packet from discontinuous buffers */ |
| 4954 | hcd->self.no_sg_constraint = 1; |
| 4955 | |
Hans de Goede | 19181bc | 2012-07-04 09:18:02 +0200 | [diff] [blame] | 4956 | /* XHCI controllers don't stop the ep queue on short packets :| */ |
| 4957 | hcd->self.no_stop_on_short = 1; |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 4958 | |
Mathias Nyman | b50107b | 2015-10-01 18:40:38 +0300 | [diff] [blame] | 4959 | xhci = hcd_to_xhci(hcd); |
| 4960 | |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 4961 | if (usb_hcd_is_primary_hcd(hcd)) { |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 4962 | xhci->main_hcd = hcd; |
| 4963 | /* Mark the first roothub as being USB 2.0. |
| 4964 | * The xHCI driver will register the USB 3.0 roothub. |
| 4965 | */ |
| 4966 | hcd->speed = HCD_USB2; |
| 4967 | hcd->self.root_hub->speed = USB_SPEED_HIGH; |
| 4968 | /* |
| 4969 | * USB 2.0 roothub under xHCI has an integrated TT, |
| 4970 | * (rate matching hub) as opposed to having an OHCI/UHCI |
| 4971 | * companion controller. |
| 4972 | */ |
| 4973 | hcd->has_tt = 1; |
| 4974 | } else { |
Mathias Nyman | dc1858a | 2017-10-06 17:45:27 +0300 | [diff] [blame] | 4975 | /* Some 3.1 hosts return sbrn 0x30, can't rely on sbrn alone */ |
| 4976 | if (xhci->sbrn == 0x31 || xhci->usb3_rhub.min_rev >= 1) { |
Mathias Nyman | b50107b | 2015-10-01 18:40:38 +0300 | [diff] [blame] | 4977 | xhci_info(xhci, "Host supports USB 3.1 Enhanced SuperSpeed\n"); |
| 4978 | hcd->speed = HCD_USB31; |
Mathias Nyman | 2c0e06f | 2016-01-25 15:30:45 +0200 | [diff] [blame] | 4979 | hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS; |
Mathias Nyman | b50107b | 2015-10-01 18:40:38 +0300 | [diff] [blame] | 4980 | } |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 4981 | /* xHCI private pointer was set in xhci_pci_probe for the second |
| 4982 | * registered roothub. |
| 4983 | */ |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 4984 | return 0; |
| 4985 | } |
| 4986 | |
Chris Bainbridge | a00918d | 2015-05-19 16:30:51 +0300 | [diff] [blame] | 4987 | mutex_init(&xhci->mutex); |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 4988 | xhci->cap_regs = hcd->regs; |
| 4989 | xhci->op_regs = hcd->regs + |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 4990 | HC_LENGTH(readl(&xhci->cap_regs->hc_capbase)); |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 4991 | xhci->run_regs = hcd->regs + |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 4992 | (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK); |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 4993 | /* Cache read-only capability registers */ |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 4994 | xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1); |
| 4995 | xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2); |
| 4996 | xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3); |
| 4997 | xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase); |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 4998 | xhci->hci_version = HC_VERSION(xhci->hcc_params); |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 4999 | xhci->hcc_params = readl(&xhci->cap_regs->hcc_params); |
Lu Baolu | 04abb6d | 2015-10-01 18:40:31 +0300 | [diff] [blame] | 5000 | if (xhci->hci_version > 0x100) |
| 5001 | xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2); |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 5002 | xhci_print_registers(xhci); |
| 5003 | |
Mathias Nyman | 757de49 | 2016-06-01 18:09:10 +0300 | [diff] [blame] | 5004 | xhci->quirks |= quirks; |
Takashi Iwai | 4e6a1ee | 2013-12-09 12:42:48 +0100 | [diff] [blame] | 5005 | |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 5006 | get_quirks(dev, xhci); |
| 5007 | |
George Cherian | 07f3cb7 | 2013-07-01 10:59:12 +0530 | [diff] [blame] | 5008 | /* In xhci controllers which follow xhci 1.0 spec gives a spurious |
| 5009 | * success event after a short transfer. This quirk will ignore such |
| 5010 | * spurious event. |
| 5011 | */ |
| 5012 | if (xhci->hci_version > 0x96) |
| 5013 | xhci->quirks |= XHCI_SPURIOUS_SUCCESS; |
| 5014 | |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 5015 | /* Make sure the HC is halted. */ |
| 5016 | retval = xhci_halt(xhci); |
| 5017 | if (retval) |
Roger Quadros | cd33a32 | 2015-05-29 17:01:46 +0300 | [diff] [blame] | 5018 | return retval; |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 5019 | |
| 5020 | xhci_dbg(xhci, "Resetting HCD\n"); |
| 5021 | /* Reset the internal HC memory state and registers. */ |
| 5022 | retval = xhci_reset(xhci); |
| 5023 | if (retval) |
Roger Quadros | cd33a32 | 2015-05-29 17:01:46 +0300 | [diff] [blame] | 5024 | return retval; |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 5025 | xhci_dbg(xhci, "Reset complete\n"); |
| 5026 | |
Yoshihiro Shimoda | 0a380be | 2016-04-08 16:25:07 +0300 | [diff] [blame] | 5027 | /* |
| 5028 | * On some xHCI controllers (e.g. R-Car SoCs), the AC64 bit (bit 0) |
| 5029 | * of HCCPARAMS1 is set to 1. However, the xHCs don't support 64-bit |
| 5030 | * address memory pointers actually. So, this driver clears the AC64 |
| 5031 | * bit of xhci->hcc_params to call dma_set_coherent_mask(dev, |
| 5032 | * DMA_BIT_MASK(32)) in this xhci_gen_setup(). |
| 5033 | */ |
| 5034 | if (xhci->quirks & XHCI_NO_64BIT_SUPPORT) |
| 5035 | xhci->hcc_params &= ~BIT(0); |
| 5036 | |
Xenia Ragiadakou | c10cf11 | 2013-08-14 05:55:19 +0300 | [diff] [blame] | 5037 | /* Set dma_mask and coherent_dma_mask to 64-bits, |
| 5038 | * if xHC supports 64-bit addressing */ |
| 5039 | if (HCC_64BIT_ADDR(xhci->hcc_params) && |
| 5040 | !dma_set_mask(dev, DMA_BIT_MASK(64))) { |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 5041 | xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n"); |
Xenia Ragiadakou | c10cf11 | 2013-08-14 05:55:19 +0300 | [diff] [blame] | 5042 | dma_set_coherent_mask(dev, DMA_BIT_MASK(64)); |
Duc Dang | fda182d | 2015-10-09 13:30:13 +0300 | [diff] [blame] | 5043 | } else { |
| 5044 | /* |
| 5045 | * This is to avoid error in cases where a 32-bit USB |
| 5046 | * controller is used on a 64-bit capable system. |
| 5047 | */ |
| 5048 | retval = dma_set_mask(dev, DMA_BIT_MASK(32)); |
| 5049 | if (retval) |
| 5050 | return retval; |
| 5051 | xhci_dbg(xhci, "Enabling 32-bit DMA addresses.\n"); |
| 5052 | dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 5053 | } |
| 5054 | |
| 5055 | xhci_dbg(xhci, "Calling HCD init\n"); |
| 5056 | /* Initialize HCD and host controller data structures. */ |
| 5057 | retval = xhci_init(hcd); |
| 5058 | if (retval) |
Roger Quadros | cd33a32 | 2015-05-29 17:01:46 +0300 | [diff] [blame] | 5059 | return retval; |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 5060 | xhci_dbg(xhci, "Called HCD init\n"); |
Hans de Goede | 9970509 | 2015-01-16 17:54:01 +0200 | [diff] [blame] | 5061 | |
| 5062 | xhci_info(xhci, "hcc params 0x%08x hci version 0x%x quirks 0x%08x\n", |
| 5063 | xhci->hcc_params, xhci->hci_version, xhci->quirks); |
| 5064 | |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 5065 | return 0; |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 5066 | } |
Andrew Bresticker | 436e8c7 | 2014-10-03 11:35:28 +0300 | [diff] [blame] | 5067 | EXPORT_SYMBOL_GPL(xhci_gen_setup); |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 5068 | |
Hemant Kumar | 1346a80 | 2017-09-22 15:03:45 -0700 | [diff] [blame] | 5069 | static phys_addr_t xhci_get_sec_event_ring_phys_addr(struct usb_hcd *hcd, |
| 5070 | unsigned int intr_num, dma_addr_t *dma) |
Hemant Kumar | 258b4b4 | 2016-03-22 19:34:20 -0700 | [diff] [blame] | 5071 | { |
| 5072 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
Hemant Kumar | 1346a80 | 2017-09-22 15:03:45 -0700 | [diff] [blame] | 5073 | struct device *dev = hcd->self.sysdev; |
| 5074 | struct sg_table sgt; |
| 5075 | phys_addr_t pa; |
Hemant Kumar | 258b4b4 | 2016-03-22 19:34:20 -0700 | [diff] [blame] | 5076 | |
Hemant Kumar | 48cb388 | 2017-02-07 11:50:13 -0800 | [diff] [blame] | 5077 | if (intr_num >= xhci->max_interrupters) { |
| 5078 | xhci_err(xhci, "intr num %d >= max intrs %d\n", intr_num, |
Hemant Kumar | 258b4b4 | 2016-03-22 19:34:20 -0700 | [diff] [blame] | 5079 | xhci->max_interrupters); |
| 5080 | return 0; |
| 5081 | } |
| 5082 | |
| 5083 | if (!(xhci->xhc_state & XHCI_STATE_HALTED) && |
| 5084 | xhci->sec_event_ring && xhci->sec_event_ring[intr_num] |
Hemant Kumar | 1346a80 | 2017-09-22 15:03:45 -0700 | [diff] [blame] | 5085 | && xhci->sec_event_ring[intr_num]->first_seg) { |
| 5086 | |
| 5087 | dma_get_sgtable(dev, &sgt, |
| 5088 | xhci->sec_event_ring[intr_num]->first_seg->trbs, |
| 5089 | xhci->sec_event_ring[intr_num]->first_seg->dma, |
| 5090 | TRB_SEGMENT_SIZE); |
| 5091 | |
| 5092 | *dma = xhci->sec_event_ring[intr_num]->first_seg->dma; |
| 5093 | |
| 5094 | pa = page_to_phys(sg_page(sgt.sgl)); |
| 5095 | sg_free_table(&sgt); |
| 5096 | |
| 5097 | return pa; |
| 5098 | } |
Hemant Kumar | 258b4b4 | 2016-03-22 19:34:20 -0700 | [diff] [blame] | 5099 | |
| 5100 | return 0; |
| 5101 | } |
| 5102 | |
Hemant Kumar | 1346a80 | 2017-09-22 15:03:45 -0700 | [diff] [blame] | 5103 | static phys_addr_t xhci_get_xfer_ring_phys_addr(struct usb_hcd *hcd, |
| 5104 | struct usb_device *udev, struct usb_host_endpoint *ep, dma_addr_t *dma) |
Hemant Kumar | 258b4b4 | 2016-03-22 19:34:20 -0700 | [diff] [blame] | 5105 | { |
| 5106 | int ret; |
| 5107 | unsigned int ep_index; |
| 5108 | struct xhci_virt_device *virt_dev; |
Hemant Kumar | 1346a80 | 2017-09-22 15:03:45 -0700 | [diff] [blame] | 5109 | struct device *dev = hcd->self.sysdev; |
Hemant Kumar | 258b4b4 | 2016-03-22 19:34:20 -0700 | [diff] [blame] | 5110 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
Hemant Kumar | 1346a80 | 2017-09-22 15:03:45 -0700 | [diff] [blame] | 5111 | struct sg_table sgt; |
| 5112 | phys_addr_t pa; |
Hemant Kumar | 258b4b4 | 2016-03-22 19:34:20 -0700 | [diff] [blame] | 5113 | |
| 5114 | ret = xhci_check_args(hcd, udev, ep, 1, true, __func__); |
| 5115 | if (ret <= 0) { |
| 5116 | xhci_err(xhci, "%s: invalid args\n", __func__); |
| 5117 | return 0; |
| 5118 | } |
| 5119 | |
| 5120 | virt_dev = xhci->devs[udev->slot_id]; |
| 5121 | ep_index = xhci_get_endpoint_index(&ep->desc); |
| 5122 | |
| 5123 | if (virt_dev->eps[ep_index].ring && |
Hemant Kumar | 1346a80 | 2017-09-22 15:03:45 -0700 | [diff] [blame] | 5124 | virt_dev->eps[ep_index].ring->first_seg) { |
| 5125 | |
| 5126 | dma_get_sgtable(dev, &sgt, |
| 5127 | virt_dev->eps[ep_index].ring->first_seg->trbs, |
| 5128 | virt_dev->eps[ep_index].ring->first_seg->dma, |
| 5129 | TRB_SEGMENT_SIZE); |
| 5130 | |
| 5131 | *dma = virt_dev->eps[ep_index].ring->first_seg->dma; |
| 5132 | |
| 5133 | pa = page_to_phys(sg_page(sgt.sgl)); |
| 5134 | sg_free_table(&sgt); |
| 5135 | |
| 5136 | return pa; |
| 5137 | } |
Hemant Kumar | 258b4b4 | 2016-03-22 19:34:20 -0700 | [diff] [blame] | 5138 | |
| 5139 | return 0; |
| 5140 | } |
| 5141 | |
Hemant Kumar | f0cdec4 | 2017-08-18 16:59:33 -0700 | [diff] [blame] | 5142 | int xhci_get_core_id(struct usb_hcd *hcd) |
| 5143 | { |
| 5144 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 5145 | |
| 5146 | return xhci->core_id; |
| 5147 | } |
| 5148 | |
Hemant Kumar | ee68f173 | 2017-11-14 20:06:15 -0800 | [diff] [blame] | 5149 | static int xhci_stop_endpoint(struct usb_hcd *hcd, |
| 5150 | struct usb_device *udev, struct usb_host_endpoint *ep) |
| 5151 | { |
| 5152 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 5153 | unsigned int ep_index; |
| 5154 | struct xhci_virt_device *virt_dev; |
| 5155 | struct xhci_command *cmd; |
| 5156 | unsigned long flags; |
| 5157 | int ret = 0; |
| 5158 | |
| 5159 | cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO); |
| 5160 | if (!cmd) |
| 5161 | return -ENOMEM; |
| 5162 | |
| 5163 | spin_lock_irqsave(&xhci->lock, flags); |
| 5164 | virt_dev = xhci->devs[udev->slot_id]; |
| 5165 | if (!virt_dev) { |
| 5166 | ret = -ENODEV; |
| 5167 | goto err; |
| 5168 | } |
| 5169 | |
| 5170 | ep_index = xhci_get_endpoint_index(&ep->desc); |
| 5171 | if (virt_dev->eps[ep_index].ring && |
| 5172 | virt_dev->eps[ep_index].ring->dequeue) { |
| 5173 | ret = xhci_queue_stop_endpoint(xhci, cmd, udev->slot_id, |
| 5174 | ep_index, 0); |
| 5175 | if (ret) |
| 5176 | goto err; |
| 5177 | |
| 5178 | xhci_ring_cmd_db(xhci); |
| 5179 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 5180 | |
| 5181 | /* Wait for stop endpoint command to finish */ |
| 5182 | wait_for_completion(cmd->completion); |
| 5183 | |
| 5184 | if (cmd->status == COMP_CMD_ABORT || |
| 5185 | cmd->status == COMP_CMD_STOP) { |
| 5186 | xhci_warn(xhci, |
| 5187 | "stop endpoint command timeout for ep%d%s\n", |
| 5188 | usb_endpoint_num(&ep->desc), |
| 5189 | usb_endpoint_dir_in(&ep->desc) ? "in" : "out"); |
| 5190 | ret = -ETIME; |
| 5191 | } |
| 5192 | goto free_cmd; |
| 5193 | } |
| 5194 | |
| 5195 | err: |
| 5196 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 5197 | free_cmd: |
| 5198 | xhci_free_command(xhci, cmd); |
| 5199 | return ret; |
| 5200 | } |
| 5201 | |
| 5202 | |
| 5203 | |
Andrew Bresticker | 1885d9a | 2014-10-03 11:35:26 +0300 | [diff] [blame] | 5204 | static const struct hc_driver xhci_hc_driver = { |
| 5205 | .description = "xhci-hcd", |
| 5206 | .product_desc = "xHCI Host Controller", |
Yoshihiro Shimoda | 32479d4 | 2015-11-24 13:09:47 +0200 | [diff] [blame] | 5207 | .hcd_priv_size = sizeof(struct xhci_hcd), |
Andrew Bresticker | 1885d9a | 2014-10-03 11:35:26 +0300 | [diff] [blame] | 5208 | |
| 5209 | /* |
| 5210 | * generic hardware linkage |
| 5211 | */ |
| 5212 | .irq = xhci_irq, |
| 5213 | .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED, |
| 5214 | |
| 5215 | /* |
| 5216 | * basic lifecycle operations |
| 5217 | */ |
| 5218 | .reset = NULL, /* set in xhci_init_driver() */ |
| 5219 | .start = xhci_run, |
| 5220 | .stop = xhci_stop, |
| 5221 | .shutdown = xhci_shutdown, |
| 5222 | |
| 5223 | /* |
| 5224 | * managing i/o requests and associated device resources |
| 5225 | */ |
| 5226 | .urb_enqueue = xhci_urb_enqueue, |
| 5227 | .urb_dequeue = xhci_urb_dequeue, |
| 5228 | .alloc_dev = xhci_alloc_dev, |
| 5229 | .free_dev = xhci_free_dev, |
| 5230 | .alloc_streams = xhci_alloc_streams, |
| 5231 | .free_streams = xhci_free_streams, |
| 5232 | .add_endpoint = xhci_add_endpoint, |
| 5233 | .drop_endpoint = xhci_drop_endpoint, |
| 5234 | .endpoint_reset = xhci_endpoint_reset, |
| 5235 | .check_bandwidth = xhci_check_bandwidth, |
| 5236 | .reset_bandwidth = xhci_reset_bandwidth, |
| 5237 | .address_device = xhci_address_device, |
| 5238 | .enable_device = xhci_enable_device, |
| 5239 | .update_hub_device = xhci_update_hub_device, |
| 5240 | .reset_device = xhci_discover_or_reset_device, |
| 5241 | |
| 5242 | /* |
| 5243 | * scheduling support |
| 5244 | */ |
| 5245 | .get_frame_number = xhci_get_frame, |
| 5246 | |
| 5247 | /* |
| 5248 | * root hub support |
| 5249 | */ |
| 5250 | .hub_control = xhci_hub_control, |
| 5251 | .hub_status_data = xhci_hub_status_data, |
| 5252 | .bus_suspend = xhci_bus_suspend, |
| 5253 | .bus_resume = xhci_bus_resume, |
| 5254 | |
| 5255 | /* |
| 5256 | * call back when device connected and addressed |
| 5257 | */ |
| 5258 | .update_device = xhci_update_device, |
| 5259 | .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm, |
| 5260 | .enable_usb3_lpm_timeout = xhci_enable_usb3_lpm_timeout, |
| 5261 | .disable_usb3_lpm_timeout = xhci_disable_usb3_lpm_timeout, |
| 5262 | .find_raw_port_number = xhci_find_raw_port_number, |
Hemant Kumar | 8aad842 | 2016-03-22 13:41:59 -0700 | [diff] [blame] | 5263 | .sec_event_ring_setup = xhci_sec_event_ring_setup, |
| 5264 | .sec_event_ring_cleanup = xhci_sec_event_ring_cleanup, |
Hemant Kumar | 1346a80 | 2017-09-22 15:03:45 -0700 | [diff] [blame] | 5265 | .get_sec_event_ring_phys_addr = xhci_get_sec_event_ring_phys_addr, |
| 5266 | .get_xfer_ring_phys_addr = xhci_get_xfer_ring_phys_addr, |
Hemant Kumar | f0cdec4 | 2017-08-18 16:59:33 -0700 | [diff] [blame] | 5267 | .get_core_id = xhci_get_core_id, |
Hemant Kumar | ee68f173 | 2017-11-14 20:06:15 -0800 | [diff] [blame] | 5268 | .stop_endpoint = xhci_stop_endpoint, |
Andrew Bresticker | 1885d9a | 2014-10-03 11:35:26 +0300 | [diff] [blame] | 5269 | }; |
| 5270 | |
Roger Quadros | cd33a32 | 2015-05-29 17:01:46 +0300 | [diff] [blame] | 5271 | void xhci_init_driver(struct hc_driver *drv, |
| 5272 | const struct xhci_driver_overrides *over) |
Andrew Bresticker | 1885d9a | 2014-10-03 11:35:26 +0300 | [diff] [blame] | 5273 | { |
Roger Quadros | cd33a32 | 2015-05-29 17:01:46 +0300 | [diff] [blame] | 5274 | BUG_ON(!over); |
| 5275 | |
| 5276 | /* Copy the generic table to drv then apply the overrides */ |
Andrew Bresticker | 1885d9a | 2014-10-03 11:35:26 +0300 | [diff] [blame] | 5277 | *drv = xhci_hc_driver; |
Roger Quadros | cd33a32 | 2015-05-29 17:01:46 +0300 | [diff] [blame] | 5278 | |
| 5279 | if (over) { |
| 5280 | drv->hcd_priv_size += over->extra_priv_size; |
| 5281 | if (over->reset) |
| 5282 | drv->reset = over->reset; |
| 5283 | if (over->start) |
| 5284 | drv->start = over->start; |
| 5285 | } |
Andrew Bresticker | 1885d9a | 2014-10-03 11:35:26 +0300 | [diff] [blame] | 5286 | } |
| 5287 | EXPORT_SYMBOL_GPL(xhci_init_driver); |
| 5288 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 5289 | MODULE_DESCRIPTION(DRIVER_DESC); |
| 5290 | MODULE_AUTHOR(DRIVER_AUTHOR); |
| 5291 | MODULE_LICENSE("GPL"); |
| 5292 | |
| 5293 | static int __init xhci_hcd_init(void) |
| 5294 | { |
Sarah Sharp | 9844197 | 2009-05-14 11:44:18 -0700 | [diff] [blame] | 5295 | /* |
| 5296 | * Check the compiler generated sizes of structures that must be laid |
| 5297 | * out in specific ways for hardware access. |
| 5298 | */ |
| 5299 | BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8); |
| 5300 | BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8); |
| 5301 | BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8); |
| 5302 | /* xhci_device_control has eight fields, and also |
| 5303 | * embeds one xhci_slot_ctx and 31 xhci_ep_ctx |
| 5304 | */ |
Sarah Sharp | 9844197 | 2009-05-14 11:44:18 -0700 | [diff] [blame] | 5305 | BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8); |
| 5306 | BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8); |
| 5307 | BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8); |
Lu Baolu | 04abb6d | 2015-10-01 18:40:31 +0300 | [diff] [blame] | 5308 | BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 8*32/8); |
Sarah Sharp | 9844197 | 2009-05-14 11:44:18 -0700 | [diff] [blame] | 5309 | BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8); |
| 5310 | /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */ |
| 5311 | BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8); |
Oliver Neukum | 1eaf35e | 2015-12-03 15:03:34 +0100 | [diff] [blame] | 5312 | |
| 5313 | if (usb_disabled()) |
| 5314 | return -ENODEV; |
| 5315 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 5316 | return 0; |
| 5317 | } |
Arthur Demchenkov | b04c846 | 2015-05-19 16:30:50 +0300 | [diff] [blame] | 5318 | |
| 5319 | /* |
| 5320 | * If an init function is provided, an exit function must also be provided |
| 5321 | * to allow module unload. |
| 5322 | */ |
| 5323 | static void __exit xhci_hcd_fini(void) { } |
| 5324 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 5325 | module_init(xhci_hcd_init); |
Arthur Demchenkov | b04c846 | 2015-05-19 16:30:50 +0300 | [diff] [blame] | 5326 | module_exit(xhci_hcd_fini); |