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Colin Cross7056d422010-04-22 20:30:13 -07001/*
Colin Cross7056d422010-04-22 20:30:13 -07002 * Copyright (C) 2010 Google, Inc.
3 *
4 * Author:
5 * Colin Cross <ccross@google.com>
6 * Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/types.h>
22#include <linux/sched.h>
23#include <linux/cpufreq.h>
24#include <linux/delay.h>
25#include <linux/init.h>
26#include <linux/err.h>
27#include <linux/clk.h>
28#include <linux/io.h>
29
Colin Cross7056d422010-04-22 20:30:13 -070030static struct cpufreq_frequency_table freq_table[] = {
Viresh Kumar5d690302013-05-14 19:08:50 +053031 { .frequency = 216000 },
32 { .frequency = 312000 },
33 { .frequency = 456000 },
34 { .frequency = 608000 },
35 { .frequency = 760000 },
36 { .frequency = 816000 },
37 { .frequency = 912000 },
38 { .frequency = 1000000 },
39 { .frequency = CPUFREQ_TABLE_END },
Colin Cross7056d422010-04-22 20:30:13 -070040};
41
42#define NUM_CPUS 2
43
44static struct clk *cpu_clk;
Stephen Warrence32dda2012-09-10 17:05:01 -060045static struct clk *pll_x_clk;
46static struct clk *pll_p_clk;
Colin Cross7a281282010-11-22 18:54:36 -080047static struct clk *emc_clk;
Viresh Kumar00917dd2014-06-02 22:49:29 +053048static bool pll_x_prepared;
Colin Cross7056d422010-04-22 20:30:13 -070049
Viresh Kumar00917dd2014-06-02 22:49:29 +053050static unsigned int tegra_get_intermediate(struct cpufreq_policy *policy,
51 unsigned int index)
52{
53 unsigned int ifreq = clk_get_rate(pll_p_clk) / 1000;
54
55 /*
56 * Don't switch to intermediate freq if:
57 * - we are already at it, i.e. policy->cur == ifreq
58 * - index corresponds to ifreq
59 */
60 if ((freq_table[index].frequency == ifreq) || (policy->cur == ifreq))
61 return 0;
62
63 return ifreq;
64}
65
66static int tegra_target_intermediate(struct cpufreq_policy *policy,
67 unsigned int index)
Stephen Warrence32dda2012-09-10 17:05:01 -060068{
69 int ret;
70
71 /*
72 * Take an extra reference to the main pll so it doesn't turn
Viresh Kumar00917dd2014-06-02 22:49:29 +053073 * off when we move the cpu off of it as enabling it again while we
Viresh Kumar40cc5492014-06-10 10:27:12 +053074 * switch to it from tegra_target() would take additional time.
75 *
76 * When target-freq is equal to intermediate freq we don't need to
77 * switch to an intermediate freq and so this routine isn't called.
78 * Also, we wouldn't be using pll_x anymore and must not take extra
79 * reference to it, as it can be disabled now to save some power.
Stephen Warrence32dda2012-09-10 17:05:01 -060080 */
81 clk_prepare_enable(pll_x_clk);
82
83 ret = clk_set_parent(cpu_clk, pll_p_clk);
Viresh Kumar00917dd2014-06-02 22:49:29 +053084 if (ret)
85 clk_disable_unprepare(pll_x_clk);
86 else
87 pll_x_prepared = true;
Stephen Warrence32dda2012-09-10 17:05:01 -060088
Stephen Warrence32dda2012-09-10 17:05:01 -060089 return ret;
90}
91
Viresh Kumare7b453d2014-05-15 11:21:19 +053092static int tegra_target(struct cpufreq_policy *policy, unsigned int index)
Colin Cross7056d422010-04-22 20:30:13 -070093{
Viresh Kumare7b453d2014-05-15 11:21:19 +053094 unsigned long rate = freq_table[index].frequency;
Viresh Kumar00917dd2014-06-02 22:49:29 +053095 unsigned int ifreq = clk_get_rate(pll_p_clk) / 1000;
Colin Cross7056d422010-04-22 20:30:13 -070096 int ret = 0;
Colin Cross7056d422010-04-22 20:30:13 -070097
Colin Cross7a281282010-11-22 18:54:36 -080098 /*
99 * Vote on memory bus frequency based on cpu frequency
100 * This sets the minimum frequency, display or avp may request higher
101 */
102 if (rate >= 816000)
103 clk_set_rate(emc_clk, 600000000); /* cpu 816 MHz, emc max */
104 else if (rate >= 456000)
105 clk_set_rate(emc_clk, 300000000); /* cpu 456 MHz, emc 150Mhz */
106 else
107 clk_set_rate(emc_clk, 100000000); /* emc 50Mhz */
108
Viresh Kumar00917dd2014-06-02 22:49:29 +0530109 /*
110 * target freq == pll_p, don't need to take extra reference to pll_x_clk
111 * as it isn't used anymore.
112 */
113 if (rate == ifreq)
114 return clk_set_parent(cpu_clk, pll_p_clk);
115
116 ret = clk_set_rate(pll_x_clk, rate * 1000);
117 /* Restore to earlier frequency on error, i.e. pll_x */
Viresh Kumard4019f02013-08-14 19:38:24 +0530118 if (ret)
Viresh Kumar00917dd2014-06-02 22:49:29 +0530119 pr_err("Failed to change pll_x to %lu\n", rate);
120
121 ret = clk_set_parent(cpu_clk, pll_x_clk);
122 /* This shouldn't fail while changing or restoring */
123 WARN_ON(ret);
124
125 /*
126 * Drop count to pll_x clock only if we switched to intermediate freq
127 * earlier while transitioning to a target frequency.
128 */
129 if (pll_x_prepared) {
130 clk_disable_unprepare(pll_x_clk);
131 pll_x_prepared = false;
132 }
Colin Cross7056d422010-04-22 20:30:13 -0700133
Viresh Kumarf56cc992013-06-19 11:18:20 +0530134 return ret;
Colin Cross7056d422010-04-22 20:30:13 -0700135}
136
Colin Cross7056d422010-04-22 20:30:13 -0700137static int tegra_cpu_init(struct cpufreq_policy *policy)
138{
Viresh Kumar99d428c2013-10-03 20:42:11 +0530139 int ret;
140
Colin Cross7056d422010-04-22 20:30:13 -0700141 if (policy->cpu >= NUM_CPUS)
142 return -EINVAL;
143
Prashant Gaikwad6a5278d2012-06-05 09:59:35 +0530144 clk_prepare_enable(emc_clk);
145 clk_prepare_enable(cpu_clk);
Colin Cross89a5fb82010-10-20 17:47:59 -0700146
Colin Cross7056d422010-04-22 20:30:13 -0700147 /* FIXME: what's the actual transition time? */
Viresh Kumar99d428c2013-10-03 20:42:11 +0530148 ret = cpufreq_generic_init(policy, freq_table, 300 * 1000);
149 if (ret) {
150 clk_disable_unprepare(cpu_clk);
151 clk_disable_unprepare(emc_clk);
152 return ret;
153 }
Colin Cross7056d422010-04-22 20:30:13 -0700154
Viresh Kumar652ed952014-01-09 20:38:43 +0530155 policy->clk = cpu_clk;
Viresh Kumard351cb32014-03-04 11:00:30 +0800156 policy->suspend_freq = freq_table[0].frequency;
Colin Cross7056d422010-04-22 20:30:13 -0700157 return 0;
158}
159
160static int tegra_cpu_exit(struct cpufreq_policy *policy)
161{
Viresh Kumar99d428c2013-10-03 20:42:11 +0530162 clk_disable_unprepare(cpu_clk);
Prashant Gaikwad6a5278d2012-06-05 09:59:35 +0530163 clk_disable_unprepare(emc_clk);
Colin Cross7056d422010-04-22 20:30:13 -0700164 return 0;
165}
166
Colin Cross7056d422010-04-22 20:30:13 -0700167static struct cpufreq_driver tegra_cpufreq_driver = {
Viresh Kumar00917dd2014-06-02 22:49:29 +0530168 .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
169 .verify = cpufreq_generic_frequency_table_verify,
170 .get_intermediate = tegra_get_intermediate,
171 .target_intermediate = tegra_target_intermediate,
172 .target_index = tegra_target,
173 .get = cpufreq_generic_get,
174 .init = tegra_cpu_init,
175 .exit = tegra_cpu_exit,
176 .name = "tegra",
177 .attr = cpufreq_generic_attr,
Viresh Kumard351cb32014-03-04 11:00:30 +0800178#ifdef CONFIG_PM
Viresh Kumar00917dd2014-06-02 22:49:29 +0530179 .suspend = cpufreq_generic_suspend,
Viresh Kumard351cb32014-03-04 11:00:30 +0800180#endif
Colin Cross7056d422010-04-22 20:30:13 -0700181};
182
183static int __init tegra_cpufreq_init(void)
184{
Joseph Lob192b912013-08-23 09:43:58 +0800185 cpu_clk = clk_get_sys(NULL, "cclk");
Richard Zhaoc26cefd2012-12-21 00:09:55 +0000186 if (IS_ERR(cpu_clk))
187 return PTR_ERR(cpu_clk);
188
189 pll_x_clk = clk_get_sys(NULL, "pll_x");
190 if (IS_ERR(pll_x_clk))
191 return PTR_ERR(pll_x_clk);
192
Joseph Lob192b912013-08-23 09:43:58 +0800193 pll_p_clk = clk_get_sys(NULL, "pll_p");
Richard Zhaoc26cefd2012-12-21 00:09:55 +0000194 if (IS_ERR(pll_p_clk))
195 return PTR_ERR(pll_p_clk);
196
197 emc_clk = clk_get_sys("cpu", "emc");
198 if (IS_ERR(emc_clk)) {
199 clk_put(cpu_clk);
200 return PTR_ERR(emc_clk);
201 }
202
Colin Cross7056d422010-04-22 20:30:13 -0700203 return cpufreq_register_driver(&tegra_cpufreq_driver);
204}
205
206static void __exit tegra_cpufreq_exit(void)
207{
208 cpufreq_unregister_driver(&tegra_cpufreq_driver);
Richard Zhaoc26cefd2012-12-21 00:09:55 +0000209 clk_put(emc_clk);
210 clk_put(cpu_clk);
Colin Cross7056d422010-04-22 20:30:13 -0700211}
212
213
214MODULE_AUTHOR("Colin Cross <ccross@android.com>");
215MODULE_DESCRIPTION("cpufreq driver for Nvidia Tegra2");
216MODULE_LICENSE("GPL");
217module_init(tegra_cpufreq_init);
218module_exit(tegra_cpufreq_exit);