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Auke Kok9d5c8242008-01-24 02:22:38 -08001/*******************************************************************************
2
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28#include <linux/module.h>
29#include <linux/types.h>
30#include <linux/init.h>
31#include <linux/vmalloc.h>
32#include <linux/pagemap.h>
33#include <linux/netdevice.h>
Auke Kok9d5c8242008-01-24 02:22:38 -080034#include <linux/ipv6.h>
35#include <net/checksum.h>
36#include <net/ip6_checksum.h>
37#include <linux/mii.h>
38#include <linux/ethtool.h>
39#include <linux/if_vlan.h>
40#include <linux/pci.h>
Alexander Duyckc54106b2008-10-16 21:26:57 -070041#include <linux/pci-aspm.h>
Auke Kok9d5c8242008-01-24 02:22:38 -080042#include <linux/delay.h>
43#include <linux/interrupt.h>
44#include <linux/if_ether.h>
Jeff Kirsher421e02f2008-10-17 11:08:31 -070045#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -070046#include <linux/dca.h>
47#endif
Auke Kok9d5c8242008-01-24 02:22:38 -080048#include "igb.h"
49
Auke Kok0024fd02008-07-08 15:09:37 -070050#define DRV_VERSION "1.2.45-k2"
Auke Kok9d5c8242008-01-24 02:22:38 -080051char igb_driver_name[] = "igb";
52char igb_driver_version[] = DRV_VERSION;
53static const char igb_driver_string[] =
54 "Intel(R) Gigabit Ethernet Network Driver";
Alexander Duyck2d064c02008-07-08 15:10:12 -070055static const char igb_copyright[] = "Copyright (c) 2008 Intel Corporation.";
Auke Kok9d5c8242008-01-24 02:22:38 -080056
Auke Kok9d5c8242008-01-24 02:22:38 -080057static const struct e1000_info *igb_info_tbl[] = {
58 [board_82575] = &e1000_82575_info,
59};
60
61static struct pci_device_id igb_pci_tbl[] = {
Alexander Duyck2d064c02008-07-08 15:10:12 -070062 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
63 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
64 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
Auke Kok9d5c8242008-01-24 02:22:38 -080065 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
66 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
67 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
68 /* required last entry */
69 {0, }
70};
71
72MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
73
74void igb_reset(struct igb_adapter *);
75static int igb_setup_all_tx_resources(struct igb_adapter *);
76static int igb_setup_all_rx_resources(struct igb_adapter *);
77static void igb_free_all_tx_resources(struct igb_adapter *);
78static void igb_free_all_rx_resources(struct igb_adapter *);
Mitch Williams3b644cf2008-06-27 10:59:48 -070079static void igb_free_tx_resources(struct igb_ring *);
80static void igb_free_rx_resources(struct igb_ring *);
Auke Kok9d5c8242008-01-24 02:22:38 -080081void igb_update_stats(struct igb_adapter *);
82static int igb_probe(struct pci_dev *, const struct pci_device_id *);
83static void __devexit igb_remove(struct pci_dev *pdev);
84static int igb_sw_init(struct igb_adapter *);
85static int igb_open(struct net_device *);
86static int igb_close(struct net_device *);
87static void igb_configure_tx(struct igb_adapter *);
88static void igb_configure_rx(struct igb_adapter *);
89static void igb_setup_rctl(struct igb_adapter *);
90static void igb_clean_all_tx_rings(struct igb_adapter *);
91static void igb_clean_all_rx_rings(struct igb_adapter *);
Mitch Williams3b644cf2008-06-27 10:59:48 -070092static void igb_clean_tx_ring(struct igb_ring *);
93static void igb_clean_rx_ring(struct igb_ring *);
Auke Kok9d5c8242008-01-24 02:22:38 -080094static void igb_set_multi(struct net_device *);
95static void igb_update_phy_info(unsigned long);
96static void igb_watchdog(unsigned long);
97static void igb_watchdog_task(struct work_struct *);
98static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
99 struct igb_ring *);
100static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
101static struct net_device_stats *igb_get_stats(struct net_device *);
102static int igb_change_mtu(struct net_device *, int);
103static int igb_set_mac(struct net_device *, void *);
104static irqreturn_t igb_intr(int irq, void *);
105static irqreturn_t igb_intr_msi(int irq, void *);
106static irqreturn_t igb_msix_other(int irq, void *);
107static irqreturn_t igb_msix_rx(int irq, void *);
108static irqreturn_t igb_msix_tx(int irq, void *);
109static int igb_clean_rx_ring_msix(struct napi_struct *, int);
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700110#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -0700111static void igb_update_rx_dca(struct igb_ring *);
112static void igb_update_tx_dca(struct igb_ring *);
113static void igb_setup_dca(struct igb_adapter *);
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700114#endif /* CONFIG_IGB_DCA */
Mitch Williams3b644cf2008-06-27 10:59:48 -0700115static bool igb_clean_tx_irq(struct igb_ring *);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700116static int igb_poll(struct napi_struct *, int);
Mitch Williams3b644cf2008-06-27 10:59:48 -0700117static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
118static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
Alexander Duyckd3352522008-07-08 15:12:13 -0700119#ifdef CONFIG_IGB_LRO
120static int igb_get_skb_hdr(struct sk_buff *skb, void **, void **, u64 *, void *);
121#endif
Auke Kok9d5c8242008-01-24 02:22:38 -0800122static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
123static void igb_tx_timeout(struct net_device *);
124static void igb_reset_task(struct work_struct *);
125static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
126static void igb_vlan_rx_add_vid(struct net_device *, u16);
127static void igb_vlan_rx_kill_vid(struct net_device *, u16);
128static void igb_restore_vlan(struct igb_adapter *);
129
130static int igb_suspend(struct pci_dev *, pm_message_t);
131#ifdef CONFIG_PM
132static int igb_resume(struct pci_dev *);
133#endif
134static void igb_shutdown(struct pci_dev *);
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700135#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -0700136static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
137static struct notifier_block dca_notifier = {
138 .notifier_call = igb_notify_dca,
139 .next = NULL,
140 .priority = 0
141};
142#endif
Auke Kok9d5c8242008-01-24 02:22:38 -0800143
144#ifdef CONFIG_NET_POLL_CONTROLLER
145/* for netdump / net console */
146static void igb_netpoll(struct net_device *);
147#endif
148
149static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
150 pci_channel_state_t);
151static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
152static void igb_io_resume(struct pci_dev *);
153
154static struct pci_error_handlers igb_err_handler = {
155 .error_detected = igb_io_error_detected,
156 .slot_reset = igb_io_slot_reset,
157 .resume = igb_io_resume,
158};
159
160
161static struct pci_driver igb_driver = {
162 .name = igb_driver_name,
163 .id_table = igb_pci_tbl,
164 .probe = igb_probe,
165 .remove = __devexit_p(igb_remove),
166#ifdef CONFIG_PM
167 /* Power Managment Hooks */
168 .suspend = igb_suspend,
169 .resume = igb_resume,
170#endif
171 .shutdown = igb_shutdown,
172 .err_handler = &igb_err_handler
173};
174
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700175static int global_quad_port_a; /* global quad port a indication */
176
Auke Kok9d5c8242008-01-24 02:22:38 -0800177MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
178MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
179MODULE_LICENSE("GPL");
180MODULE_VERSION(DRV_VERSION);
181
182#ifdef DEBUG
183/**
184 * igb_get_hw_dev_name - return device name string
185 * used by hardware layer to print debugging information
186 **/
187char *igb_get_hw_dev_name(struct e1000_hw *hw)
188{
189 struct igb_adapter *adapter = hw->back;
190 return adapter->netdev->name;
191}
192#endif
193
194/**
195 * igb_init_module - Driver Registration Routine
196 *
197 * igb_init_module is the first routine called when the driver is
198 * loaded. All it does is register with the PCI subsystem.
199 **/
200static int __init igb_init_module(void)
201{
202 int ret;
203 printk(KERN_INFO "%s - version %s\n",
204 igb_driver_string, igb_driver_version);
205
206 printk(KERN_INFO "%s\n", igb_copyright);
207
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700208 global_quad_port_a = 0;
209
Auke Kok9d5c8242008-01-24 02:22:38 -0800210 ret = pci_register_driver(&igb_driver);
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700211#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -0700212 dca_register_notify(&dca_notifier);
213#endif
Auke Kok9d5c8242008-01-24 02:22:38 -0800214 return ret;
215}
216
217module_init(igb_init_module);
218
219/**
220 * igb_exit_module - Driver Exit Cleanup Routine
221 *
222 * igb_exit_module is called just before the driver is removed
223 * from memory.
224 **/
225static void __exit igb_exit_module(void)
226{
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700227#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -0700228 dca_unregister_notify(&dca_notifier);
229#endif
Auke Kok9d5c8242008-01-24 02:22:38 -0800230 pci_unregister_driver(&igb_driver);
231}
232
233module_exit(igb_exit_module);
234
235/**
236 * igb_alloc_queues - Allocate memory for all rings
237 * @adapter: board private structure to initialize
238 *
239 * We allocate one ring per queue at run-time since we don't know the
240 * number of queues at compile-time.
241 **/
242static int igb_alloc_queues(struct igb_adapter *adapter)
243{
244 int i;
245
246 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
247 sizeof(struct igb_ring), GFP_KERNEL);
248 if (!adapter->tx_ring)
249 return -ENOMEM;
250
251 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
252 sizeof(struct igb_ring), GFP_KERNEL);
253 if (!adapter->rx_ring) {
254 kfree(adapter->tx_ring);
255 return -ENOMEM;
256 }
257
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -0700258 adapter->rx_ring->buddy = adapter->tx_ring;
259
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700260 for (i = 0; i < adapter->num_tx_queues; i++) {
261 struct igb_ring *ring = &(adapter->tx_ring[i]);
262 ring->adapter = adapter;
263 ring->queue_index = i;
264 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800265 for (i = 0; i < adapter->num_rx_queues; i++) {
266 struct igb_ring *ring = &(adapter->rx_ring[i]);
267 ring->adapter = adapter;
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700268 ring->queue_index = i;
Auke Kok9d5c8242008-01-24 02:22:38 -0800269 ring->itr_register = E1000_ITR;
270
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700271 /* set a default napi handler for each rx_ring */
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700272 netif_napi_add(adapter->netdev, &ring->napi, igb_poll, 64);
Auke Kok9d5c8242008-01-24 02:22:38 -0800273 }
274 return 0;
275}
276
Alexander Duycka88f10e2008-07-08 15:13:38 -0700277static void igb_free_queues(struct igb_adapter *adapter)
278{
279 int i;
280
281 for (i = 0; i < adapter->num_rx_queues; i++)
282 netif_napi_del(&adapter->rx_ring[i].napi);
283
284 kfree(adapter->tx_ring);
285 kfree(adapter->rx_ring);
286}
287
Auke Kok9d5c8242008-01-24 02:22:38 -0800288#define IGB_N0_QUEUE -1
289static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
290 int tx_queue, int msix_vector)
291{
292 u32 msixbm = 0;
293 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700294 u32 ivar, index;
295
296 switch (hw->mac.type) {
297 case e1000_82575:
Auke Kok9d5c8242008-01-24 02:22:38 -0800298 /* The 82575 assigns vectors using a bitmask, which matches the
299 bitmask for the EICR/EIMS/EIMC registers. To assign one
300 or more queues to a vector, we write the appropriate bits
301 into the MSIXBM register for that vector. */
302 if (rx_queue > IGB_N0_QUEUE) {
303 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
304 adapter->rx_ring[rx_queue].eims_value = msixbm;
305 }
306 if (tx_queue > IGB_N0_QUEUE) {
307 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
308 adapter->tx_ring[tx_queue].eims_value =
309 E1000_EICR_TX_QUEUE0 << tx_queue;
310 }
311 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
Alexander Duyck2d064c02008-07-08 15:10:12 -0700312 break;
313 case e1000_82576:
Alexander Duyck106ef2f2008-08-04 14:59:37 -0700314 /* The 82576 uses a table-based method for assigning vectors.
Alexander Duyck2d064c02008-07-08 15:10:12 -0700315 Each queue has a single entry in the table to which we write
316 a vector number along with a "valid" bit. Sadly, the layout
317 of the table is somewhat counterintuitive. */
318 if (rx_queue > IGB_N0_QUEUE) {
319 index = (rx_queue & 0x7);
320 ivar = array_rd32(E1000_IVAR0, index);
321 if (rx_queue < 8) {
322 /* vector goes into low byte of register */
323 ivar = ivar & 0xFFFFFF00;
324 ivar |= msix_vector | E1000_IVAR_VALID;
325 } else {
326 /* vector goes into third byte of register */
327 ivar = ivar & 0xFF00FFFF;
328 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
329 }
330 adapter->rx_ring[rx_queue].eims_value= 1 << msix_vector;
331 array_wr32(E1000_IVAR0, index, ivar);
332 }
333 if (tx_queue > IGB_N0_QUEUE) {
334 index = (tx_queue & 0x7);
335 ivar = array_rd32(E1000_IVAR0, index);
336 if (tx_queue < 8) {
337 /* vector goes into second byte of register */
338 ivar = ivar & 0xFFFF00FF;
339 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
340 } else {
341 /* vector goes into high byte of register */
342 ivar = ivar & 0x00FFFFFF;
343 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
344 }
345 adapter->tx_ring[tx_queue].eims_value= 1 << msix_vector;
346 array_wr32(E1000_IVAR0, index, ivar);
347 }
348 break;
349 default:
350 BUG();
351 break;
352 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800353}
354
355/**
356 * igb_configure_msix - Configure MSI-X hardware
357 *
358 * igb_configure_msix sets up the hardware to properly
359 * generate MSI-X interrupts.
360 **/
361static void igb_configure_msix(struct igb_adapter *adapter)
362{
363 u32 tmp;
364 int i, vector = 0;
365 struct e1000_hw *hw = &adapter->hw;
366
367 adapter->eims_enable_mask = 0;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700368 if (hw->mac.type == e1000_82576)
369 /* Turn on MSI-X capability first, or our settings
370 * won't stick. And it will take days to debug. */
371 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
372 E1000_GPIE_PBA | E1000_GPIE_EIAME |
373 E1000_GPIE_NSICR);
Auke Kok9d5c8242008-01-24 02:22:38 -0800374
375 for (i = 0; i < adapter->num_tx_queues; i++) {
376 struct igb_ring *tx_ring = &adapter->tx_ring[i];
377 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
378 adapter->eims_enable_mask |= tx_ring->eims_value;
379 if (tx_ring->itr_val)
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -0700380 writel(tx_ring->itr_val,
Auke Kok9d5c8242008-01-24 02:22:38 -0800381 hw->hw_addr + tx_ring->itr_register);
382 else
383 writel(1, hw->hw_addr + tx_ring->itr_register);
384 }
385
386 for (i = 0; i < adapter->num_rx_queues; i++) {
387 struct igb_ring *rx_ring = &adapter->rx_ring[i];
Harvey Harrison25ac3c22008-07-16 12:45:27 -0700388 rx_ring->buddy = NULL;
Auke Kok9d5c8242008-01-24 02:22:38 -0800389 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
390 adapter->eims_enable_mask |= rx_ring->eims_value;
391 if (rx_ring->itr_val)
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -0700392 writel(rx_ring->itr_val,
Auke Kok9d5c8242008-01-24 02:22:38 -0800393 hw->hw_addr + rx_ring->itr_register);
394 else
395 writel(1, hw->hw_addr + rx_ring->itr_register);
396 }
397
398
399 /* set vector for other causes, i.e. link changes */
Alexander Duyck2d064c02008-07-08 15:10:12 -0700400 switch (hw->mac.type) {
401 case e1000_82575:
Auke Kok9d5c8242008-01-24 02:22:38 -0800402 array_wr32(E1000_MSIXBM(0), vector++,
403 E1000_EIMS_OTHER);
404
Auke Kok9d5c8242008-01-24 02:22:38 -0800405 tmp = rd32(E1000_CTRL_EXT);
406 /* enable MSI-X PBA support*/
407 tmp |= E1000_CTRL_EXT_PBA_CLR;
408
409 /* Auto-Mask interrupts upon ICR read. */
410 tmp |= E1000_CTRL_EXT_EIAME;
411 tmp |= E1000_CTRL_EXT_IRCA;
412
413 wr32(E1000_CTRL_EXT, tmp);
414 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700415 adapter->eims_other = E1000_EIMS_OTHER;
Auke Kok9d5c8242008-01-24 02:22:38 -0800416
Alexander Duyck2d064c02008-07-08 15:10:12 -0700417 break;
418
419 case e1000_82576:
420 tmp = (vector++ | E1000_IVAR_VALID) << 8;
421 wr32(E1000_IVAR_MISC, tmp);
422
423 adapter->eims_enable_mask = (1 << (vector)) - 1;
424 adapter->eims_other = 1 << (vector - 1);
425 break;
426 default:
427 /* do nothing, since nothing else supports MSI-X */
428 break;
429 } /* switch (hw->mac.type) */
Auke Kok9d5c8242008-01-24 02:22:38 -0800430 wrfl();
431}
432
433/**
434 * igb_request_msix - Initialize MSI-X interrupts
435 *
436 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
437 * kernel.
438 **/
439static int igb_request_msix(struct igb_adapter *adapter)
440{
441 struct net_device *netdev = adapter->netdev;
442 int i, err = 0, vector = 0;
443
444 vector = 0;
445
446 for (i = 0; i < adapter->num_tx_queues; i++) {
447 struct igb_ring *ring = &(adapter->tx_ring[i]);
448 sprintf(ring->name, "%s-tx%d", netdev->name, i);
449 err = request_irq(adapter->msix_entries[vector].vector,
450 &igb_msix_tx, 0, ring->name,
451 &(adapter->tx_ring[i]));
452 if (err)
453 goto out;
454 ring->itr_register = E1000_EITR(0) + (vector << 2);
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -0700455 ring->itr_val = 976; /* ~4000 ints/sec */
Auke Kok9d5c8242008-01-24 02:22:38 -0800456 vector++;
457 }
458 for (i = 0; i < adapter->num_rx_queues; i++) {
459 struct igb_ring *ring = &(adapter->rx_ring[i]);
460 if (strlen(netdev->name) < (IFNAMSIZ - 5))
461 sprintf(ring->name, "%s-rx%d", netdev->name, i);
462 else
463 memcpy(ring->name, netdev->name, IFNAMSIZ);
464 err = request_irq(adapter->msix_entries[vector].vector,
465 &igb_msix_rx, 0, ring->name,
466 &(adapter->rx_ring[i]));
467 if (err)
468 goto out;
469 ring->itr_register = E1000_EITR(0) + (vector << 2);
470 ring->itr_val = adapter->itr;
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700471 /* overwrite the poll routine for MSIX, we've already done
472 * netif_napi_add */
473 ring->napi.poll = &igb_clean_rx_ring_msix;
Auke Kok9d5c8242008-01-24 02:22:38 -0800474 vector++;
475 }
476
477 err = request_irq(adapter->msix_entries[vector].vector,
478 &igb_msix_other, 0, netdev->name, netdev);
479 if (err)
480 goto out;
481
Auke Kok9d5c8242008-01-24 02:22:38 -0800482 igb_configure_msix(adapter);
483 return 0;
484out:
485 return err;
486}
487
488static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
489{
490 if (adapter->msix_entries) {
491 pci_disable_msix(adapter->pdev);
492 kfree(adapter->msix_entries);
493 adapter->msix_entries = NULL;
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700494 } else if (adapter->flags & IGB_FLAG_HAS_MSI)
Auke Kok9d5c8242008-01-24 02:22:38 -0800495 pci_disable_msi(adapter->pdev);
496 return;
497}
498
499
500/**
501 * igb_set_interrupt_capability - set MSI or MSI-X if supported
502 *
503 * Attempt to configure interrupts using the best available
504 * capabilities of the hardware and kernel.
505 **/
506static void igb_set_interrupt_capability(struct igb_adapter *adapter)
507{
508 int err;
509 int numvecs, i;
510
511 numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
512 adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
513 GFP_KERNEL);
514 if (!adapter->msix_entries)
515 goto msi_only;
516
517 for (i = 0; i < numvecs; i++)
518 adapter->msix_entries[i].entry = i;
519
520 err = pci_enable_msix(adapter->pdev,
521 adapter->msix_entries,
522 numvecs);
523 if (err == 0)
Alexander Duyck34a20e82008-08-26 04:25:13 -0700524 goto out;
Auke Kok9d5c8242008-01-24 02:22:38 -0800525
526 igb_reset_interrupt_capability(adapter);
527
528 /* If we can't do MSI-X, try MSI */
529msi_only:
530 adapter->num_rx_queues = 1;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700531 adapter->num_tx_queues = 1;
Auke Kok9d5c8242008-01-24 02:22:38 -0800532 if (!pci_enable_msi(adapter->pdev))
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700533 adapter->flags |= IGB_FLAG_HAS_MSI;
Alexander Duyck34a20e82008-08-26 04:25:13 -0700534out:
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700535 /* Notify the stack of the (possibly) reduced Tx Queue count. */
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700536 adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
Auke Kok9d5c8242008-01-24 02:22:38 -0800537 return;
538}
539
540/**
541 * igb_request_irq - initialize interrupts
542 *
543 * Attempts to configure interrupts using the best available
544 * capabilities of the hardware and kernel.
545 **/
546static int igb_request_irq(struct igb_adapter *adapter)
547{
548 struct net_device *netdev = adapter->netdev;
549 struct e1000_hw *hw = &adapter->hw;
550 int err = 0;
551
552 if (adapter->msix_entries) {
553 err = igb_request_msix(adapter);
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700554 if (!err)
Auke Kok9d5c8242008-01-24 02:22:38 -0800555 goto request_done;
Auke Kok9d5c8242008-01-24 02:22:38 -0800556 /* fall back to MSI */
557 igb_reset_interrupt_capability(adapter);
558 if (!pci_enable_msi(adapter->pdev))
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700559 adapter->flags |= IGB_FLAG_HAS_MSI;
Auke Kok9d5c8242008-01-24 02:22:38 -0800560 igb_free_all_tx_resources(adapter);
561 igb_free_all_rx_resources(adapter);
562 adapter->num_rx_queues = 1;
563 igb_alloc_queues(adapter);
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700564 } else {
Alexander Duyck2d064c02008-07-08 15:10:12 -0700565 switch (hw->mac.type) {
566 case e1000_82575:
567 wr32(E1000_MSIXBM(0),
568 (E1000_EICR_RX_QUEUE0 | E1000_EIMS_OTHER));
569 break;
570 case e1000_82576:
571 wr32(E1000_IVAR0, E1000_IVAR_VALID);
572 break;
573 default:
574 break;
575 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800576 }
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700577
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700578 if (adapter->flags & IGB_FLAG_HAS_MSI) {
Auke Kok9d5c8242008-01-24 02:22:38 -0800579 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
580 netdev->name, netdev);
581 if (!err)
582 goto request_done;
583 /* fall back to legacy interrupts */
584 igb_reset_interrupt_capability(adapter);
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700585 adapter->flags &= ~IGB_FLAG_HAS_MSI;
Auke Kok9d5c8242008-01-24 02:22:38 -0800586 }
587
588 err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
589 netdev->name, netdev);
590
Andy Gospodarek6cb5e572008-02-15 14:05:25 -0800591 if (err)
Auke Kok9d5c8242008-01-24 02:22:38 -0800592 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
593 err);
Auke Kok9d5c8242008-01-24 02:22:38 -0800594
595request_done:
596 return err;
597}
598
599static void igb_free_irq(struct igb_adapter *adapter)
600{
601 struct net_device *netdev = adapter->netdev;
602
603 if (adapter->msix_entries) {
604 int vector = 0, i;
605
606 for (i = 0; i < adapter->num_tx_queues; i++)
607 free_irq(adapter->msix_entries[vector++].vector,
608 &(adapter->tx_ring[i]));
609 for (i = 0; i < adapter->num_rx_queues; i++)
610 free_irq(adapter->msix_entries[vector++].vector,
611 &(adapter->rx_ring[i]));
612
613 free_irq(adapter->msix_entries[vector++].vector, netdev);
614 return;
615 }
616
617 free_irq(adapter->pdev->irq, netdev);
618}
619
620/**
621 * igb_irq_disable - Mask off interrupt generation on the NIC
622 * @adapter: board private structure
623 **/
624static void igb_irq_disable(struct igb_adapter *adapter)
625{
626 struct e1000_hw *hw = &adapter->hw;
627
628 if (adapter->msix_entries) {
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700629 wr32(E1000_EIAM, 0);
Auke Kok9d5c8242008-01-24 02:22:38 -0800630 wr32(E1000_EIMC, ~0);
631 wr32(E1000_EIAC, 0);
632 }
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700633
634 wr32(E1000_IAM, 0);
Auke Kok9d5c8242008-01-24 02:22:38 -0800635 wr32(E1000_IMC, ~0);
636 wrfl();
637 synchronize_irq(adapter->pdev->irq);
638}
639
640/**
641 * igb_irq_enable - Enable default interrupt generation settings
642 * @adapter: board private structure
643 **/
644static void igb_irq_enable(struct igb_adapter *adapter)
645{
646 struct e1000_hw *hw = &adapter->hw;
647
648 if (adapter->msix_entries) {
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700649 wr32(E1000_EIAC, adapter->eims_enable_mask);
650 wr32(E1000_EIAM, adapter->eims_enable_mask);
651 wr32(E1000_EIMS, adapter->eims_enable_mask);
Auke Kok9d5c8242008-01-24 02:22:38 -0800652 wr32(E1000_IMS, E1000_IMS_LSC);
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700653 } else {
654 wr32(E1000_IMS, IMS_ENABLE_MASK);
655 wr32(E1000_IAM, IMS_ENABLE_MASK);
656 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800657}
658
659static void igb_update_mng_vlan(struct igb_adapter *adapter)
660{
661 struct net_device *netdev = adapter->netdev;
662 u16 vid = adapter->hw.mng_cookie.vlan_id;
663 u16 old_vid = adapter->mng_vlan_id;
664 if (adapter->vlgrp) {
665 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
666 if (adapter->hw.mng_cookie.status &
667 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
668 igb_vlan_rx_add_vid(netdev, vid);
669 adapter->mng_vlan_id = vid;
670 } else
671 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
672
673 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
674 (vid != old_vid) &&
675 !vlan_group_get_device(adapter->vlgrp, old_vid))
676 igb_vlan_rx_kill_vid(netdev, old_vid);
677 } else
678 adapter->mng_vlan_id = vid;
679 }
680}
681
682/**
683 * igb_release_hw_control - release control of the h/w to f/w
684 * @adapter: address of board private structure
685 *
686 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
687 * For ASF and Pass Through versions of f/w this means that the
688 * driver is no longer loaded.
689 *
690 **/
691static void igb_release_hw_control(struct igb_adapter *adapter)
692{
693 struct e1000_hw *hw = &adapter->hw;
694 u32 ctrl_ext;
695
696 /* Let firmware take over control of h/w */
697 ctrl_ext = rd32(E1000_CTRL_EXT);
698 wr32(E1000_CTRL_EXT,
699 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
700}
701
702
703/**
704 * igb_get_hw_control - get control of the h/w from f/w
705 * @adapter: address of board private structure
706 *
707 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
708 * For ASF and Pass Through versions of f/w this means that
709 * the driver is loaded.
710 *
711 **/
712static void igb_get_hw_control(struct igb_adapter *adapter)
713{
714 struct e1000_hw *hw = &adapter->hw;
715 u32 ctrl_ext;
716
717 /* Let firmware know the driver has taken over */
718 ctrl_ext = rd32(E1000_CTRL_EXT);
719 wr32(E1000_CTRL_EXT,
720 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
721}
722
Auke Kok9d5c8242008-01-24 02:22:38 -0800723/**
724 * igb_configure - configure the hardware for RX and TX
725 * @adapter: private board structure
726 **/
727static void igb_configure(struct igb_adapter *adapter)
728{
729 struct net_device *netdev = adapter->netdev;
730 int i;
731
732 igb_get_hw_control(adapter);
733 igb_set_multi(netdev);
734
735 igb_restore_vlan(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800736
737 igb_configure_tx(adapter);
738 igb_setup_rctl(adapter);
739 igb_configure_rx(adapter);
Alexander Duyck662d7202008-06-27 11:00:29 -0700740
741 igb_rx_fifo_flush_82575(&adapter->hw);
742
Auke Kok9d5c8242008-01-24 02:22:38 -0800743 /* call IGB_DESC_UNUSED which always leaves
744 * at least 1 descriptor unused to make sure
745 * next_to_use != next_to_clean */
746 for (i = 0; i < adapter->num_rx_queues; i++) {
747 struct igb_ring *ring = &adapter->rx_ring[i];
Mitch Williams3b644cf2008-06-27 10:59:48 -0700748 igb_alloc_rx_buffers_adv(ring, IGB_DESC_UNUSED(ring));
Auke Kok9d5c8242008-01-24 02:22:38 -0800749 }
750
751
752 adapter->tx_queue_len = netdev->tx_queue_len;
753}
754
755
756/**
757 * igb_up - Open the interface and prepare it to handle traffic
758 * @adapter: board private structure
759 **/
760
761int igb_up(struct igb_adapter *adapter)
762{
763 struct e1000_hw *hw = &adapter->hw;
764 int i;
765
766 /* hardware has been reset, we need to reload some things */
767 igb_configure(adapter);
768
769 clear_bit(__IGB_DOWN, &adapter->state);
770
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700771 for (i = 0; i < adapter->num_rx_queues; i++)
772 napi_enable(&adapter->rx_ring[i].napi);
773 if (adapter->msix_entries)
Auke Kok9d5c8242008-01-24 02:22:38 -0800774 igb_configure_msix(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800775
776 /* Clear any pending interrupts. */
777 rd32(E1000_ICR);
778 igb_irq_enable(adapter);
779
780 /* Fire a link change interrupt to start the watchdog. */
781 wr32(E1000_ICS, E1000_ICS_LSC);
782 return 0;
783}
784
785void igb_down(struct igb_adapter *adapter)
786{
787 struct e1000_hw *hw = &adapter->hw;
788 struct net_device *netdev = adapter->netdev;
789 u32 tctl, rctl;
790 int i;
791
792 /* signal that we're down so the interrupt handler does not
793 * reschedule our watchdog timer */
794 set_bit(__IGB_DOWN, &adapter->state);
795
796 /* disable receives in the hardware */
797 rctl = rd32(E1000_RCTL);
798 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
799 /* flush and sleep below */
800
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700801 netif_tx_stop_all_queues(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -0800802
803 /* disable transmits in the hardware */
804 tctl = rd32(E1000_TCTL);
805 tctl &= ~E1000_TCTL_EN;
806 wr32(E1000_TCTL, tctl);
807 /* flush both disables and wait for them to finish */
808 wrfl();
809 msleep(10);
810
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700811 for (i = 0; i < adapter->num_rx_queues; i++)
812 napi_disable(&adapter->rx_ring[i].napi);
Auke Kok9d5c8242008-01-24 02:22:38 -0800813
Auke Kok9d5c8242008-01-24 02:22:38 -0800814 igb_irq_disable(adapter);
815
816 del_timer_sync(&adapter->watchdog_timer);
817 del_timer_sync(&adapter->phy_info_timer);
818
819 netdev->tx_queue_len = adapter->tx_queue_len;
820 netif_carrier_off(netdev);
821 adapter->link_speed = 0;
822 adapter->link_duplex = 0;
823
Jeff Kirsher30236822008-06-24 17:01:15 -0700824 if (!pci_channel_offline(adapter->pdev))
825 igb_reset(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800826 igb_clean_all_tx_rings(adapter);
827 igb_clean_all_rx_rings(adapter);
828}
829
830void igb_reinit_locked(struct igb_adapter *adapter)
831{
832 WARN_ON(in_interrupt());
833 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
834 msleep(1);
835 igb_down(adapter);
836 igb_up(adapter);
837 clear_bit(__IGB_RESETTING, &adapter->state);
838}
839
840void igb_reset(struct igb_adapter *adapter)
841{
842 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700843 struct e1000_mac_info *mac = &hw->mac;
844 struct e1000_fc_info *fc = &hw->fc;
Auke Kok9d5c8242008-01-24 02:22:38 -0800845 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
846 u16 hwm;
847
848 /* Repartition Pba for greater than 9k mtu
849 * To take effect CTRL.RST is required.
850 */
Alexander Duyck2d064c02008-07-08 15:10:12 -0700851 if (mac->type != e1000_82576) {
Auke Kok9d5c8242008-01-24 02:22:38 -0800852 pba = E1000_PBA_34K;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700853 }
854 else {
855 pba = E1000_PBA_64K;
856 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800857
Alexander Duyck2d064c02008-07-08 15:10:12 -0700858 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
859 (mac->type < e1000_82576)) {
Auke Kok9d5c8242008-01-24 02:22:38 -0800860 /* adjust PBA for jumbo frames */
861 wr32(E1000_PBA, pba);
862
863 /* To maintain wire speed transmits, the Tx FIFO should be
864 * large enough to accommodate two full transmit packets,
865 * rounded up to the next 1KB and expressed in KB. Likewise,
866 * the Rx FIFO should be large enough to accommodate at least
867 * one full receive packet and is similarly rounded up and
868 * expressed in KB. */
869 pba = rd32(E1000_PBA);
870 /* upper 16 bits has Tx packet buffer allocation size in KB */
871 tx_space = pba >> 16;
872 /* lower 16 bits has Rx packet buffer allocation size in KB */
873 pba &= 0xffff;
874 /* the tx fifo also stores 16 bytes of information about the tx
875 * but don't include ethernet FCS because hardware appends it */
876 min_tx_space = (adapter->max_frame_size +
877 sizeof(struct e1000_tx_desc) -
878 ETH_FCS_LEN) * 2;
879 min_tx_space = ALIGN(min_tx_space, 1024);
880 min_tx_space >>= 10;
881 /* software strips receive CRC, so leave room for it */
882 min_rx_space = adapter->max_frame_size;
883 min_rx_space = ALIGN(min_rx_space, 1024);
884 min_rx_space >>= 10;
885
886 /* If current Tx allocation is less than the min Tx FIFO size,
887 * and the min Tx FIFO size is less than the current Rx FIFO
888 * allocation, take space away from current Rx allocation */
889 if (tx_space < min_tx_space &&
890 ((min_tx_space - tx_space) < pba)) {
891 pba = pba - (min_tx_space - tx_space);
892
893 /* if short on rx space, rx wins and must trump tx
894 * adjustment */
895 if (pba < min_rx_space)
896 pba = min_rx_space;
897 }
Alexander Duyck2d064c02008-07-08 15:10:12 -0700898 wr32(E1000_PBA, pba);
Auke Kok9d5c8242008-01-24 02:22:38 -0800899 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800900
901 /* flow control settings */
902 /* The high water mark must be low enough to fit one full frame
903 * (or the size used for early receive) above it in the Rx FIFO.
904 * Set it to the lower of:
905 * - 90% of the Rx FIFO size, or
906 * - the full Rx FIFO size minus one full frame */
907 hwm = min(((pba << 10) * 9 / 10),
Alexander Duyck2d064c02008-07-08 15:10:12 -0700908 ((pba << 10) - 2 * adapter->max_frame_size));
Auke Kok9d5c8242008-01-24 02:22:38 -0800909
Alexander Duyck2d064c02008-07-08 15:10:12 -0700910 if (mac->type < e1000_82576) {
911 fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */
912 fc->low_water = fc->high_water - 8;
913 } else {
914 fc->high_water = hwm & 0xFFF0; /* 16-byte granularity */
915 fc->low_water = fc->high_water - 16;
916 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800917 fc->pause_time = 0xFFFF;
918 fc->send_xon = 1;
919 fc->type = fc->original_type;
920
921 /* Allow time for pending master requests to run */
922 adapter->hw.mac.ops.reset_hw(&adapter->hw);
923 wr32(E1000_WUC, 0);
924
925 if (adapter->hw.mac.ops.init_hw(&adapter->hw))
926 dev_err(&adapter->pdev->dev, "Hardware Error\n");
927
928 igb_update_mng_vlan(adapter);
929
930 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
931 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
932
933 igb_reset_adaptive(&adapter->hw);
Bill Hayes68707ac2008-02-19 10:24:41 -0800934 if (adapter->hw.phy.ops.get_phy_info)
935 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
Auke Kok9d5c8242008-01-24 02:22:38 -0800936}
937
938/**
Taku Izumi42bfd33a2008-06-20 12:10:30 +0900939 * igb_is_need_ioport - determine if an adapter needs ioport resources or not
940 * @pdev: PCI device information struct
941 *
942 * Returns true if an adapter needs ioport resources
943 **/
944static int igb_is_need_ioport(struct pci_dev *pdev)
945{
946 switch (pdev->device) {
947 /* Currently there are no adapters that need ioport resources */
948 default:
949 return false;
950 }
951}
952
Stephen Hemminger2e5c6922008-11-19 22:20:44 -0800953static const struct net_device_ops igb_netdev_ops = {
954 .ndo_open = igb_open,
955 .ndo_stop = igb_close,
956 .ndo_get_stats = igb_get_stats,
957 .ndo_set_multicast_list = igb_set_multi,
958 .ndo_set_mac_address = igb_set_mac,
959 .ndo_change_mtu = igb_change_mtu,
960 .ndo_do_ioctl = igb_ioctl,
961 .ndo_tx_timeout = igb_tx_timeout,
962 .ndo_validate_addr = eth_validate_addr,
963 .ndo_vlan_rx_register = igb_vlan_rx_register,
964 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
965 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
966#ifdef CONFIG_NET_POLL_CONTROLLER
967 .ndo_poll_controller = igb_netpoll,
968#endif
969};
970
Taku Izumi42bfd33a2008-06-20 12:10:30 +0900971/**
Auke Kok9d5c8242008-01-24 02:22:38 -0800972 * igb_probe - Device Initialization Routine
973 * @pdev: PCI device information struct
974 * @ent: entry in igb_pci_tbl
975 *
976 * Returns 0 on success, negative on failure
977 *
978 * igb_probe initializes an adapter identified by a pci_dev structure.
979 * The OS initialization, configuring of the adapter private structure,
980 * and a hardware reset occur.
981 **/
982static int __devinit igb_probe(struct pci_dev *pdev,
983 const struct pci_device_id *ent)
984{
985 struct net_device *netdev;
986 struct igb_adapter *adapter;
987 struct e1000_hw *hw;
Alexander Duyckc54106b2008-10-16 21:26:57 -0700988 struct pci_dev *us_dev;
Auke Kok9d5c8242008-01-24 02:22:38 -0800989 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
990 unsigned long mmio_start, mmio_len;
Alexander Duyckc54106b2008-10-16 21:26:57 -0700991 int i, err, pci_using_dac, pos;
992 u16 eeprom_data = 0, state = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -0800993 u16 eeprom_apme_mask = IGB_EEPROM_APME;
994 u32 part_num;
Taku Izumi42bfd33a2008-06-20 12:10:30 +0900995 int bars, need_ioport;
Auke Kok9d5c8242008-01-24 02:22:38 -0800996
Taku Izumi42bfd33a2008-06-20 12:10:30 +0900997 /* do not allocate ioport bars when not needed */
998 need_ioport = igb_is_need_ioport(pdev);
999 if (need_ioport) {
1000 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
1001 err = pci_enable_device(pdev);
1002 } else {
1003 bars = pci_select_bars(pdev, IORESOURCE_MEM);
1004 err = pci_enable_device_mem(pdev);
1005 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001006 if (err)
1007 return err;
1008
1009 pci_using_dac = 0;
1010 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1011 if (!err) {
1012 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1013 if (!err)
1014 pci_using_dac = 1;
1015 } else {
1016 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1017 if (err) {
1018 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1019 if (err) {
1020 dev_err(&pdev->dev, "No usable DMA "
1021 "configuration, aborting\n");
1022 goto err_dma;
1023 }
1024 }
1025 }
1026
Alexander Duyckc54106b2008-10-16 21:26:57 -07001027 /* 82575 requires that the pci-e link partner disable the L0s state */
1028 switch (pdev->device) {
1029 case E1000_DEV_ID_82575EB_COPPER:
1030 case E1000_DEV_ID_82575EB_FIBER_SERDES:
1031 case E1000_DEV_ID_82575GB_QUAD_COPPER:
1032 us_dev = pdev->bus->self;
1033 pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
1034 if (pos) {
1035 pci_read_config_word(us_dev, pos + PCI_EXP_LNKCTL,
1036 &state);
1037 state &= ~PCIE_LINK_STATE_L0S;
1038 pci_write_config_word(us_dev, pos + PCI_EXP_LNKCTL,
1039 state);
Bjorn Helgaasac450202008-11-13 06:20:10 +00001040 dev_info(&pdev->dev,
1041 "Disabling ASPM L0s upstream switch port %s\n",
1042 pci_name(us_dev));
Alexander Duyckc54106b2008-10-16 21:26:57 -07001043 }
1044 default:
1045 break;
1046 }
1047
Taku Izumi42bfd33a2008-06-20 12:10:30 +09001048 err = pci_request_selected_regions(pdev, bars, igb_driver_name);
Auke Kok9d5c8242008-01-24 02:22:38 -08001049 if (err)
1050 goto err_pci_reg;
1051
1052 pci_set_master(pdev);
Auke Kokc682fc22008-04-23 11:09:34 -07001053 pci_save_state(pdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001054
1055 err = -ENOMEM;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07001056 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter), IGB_MAX_TX_QUEUES);
Auke Kok9d5c8242008-01-24 02:22:38 -08001057 if (!netdev)
1058 goto err_alloc_etherdev;
1059
1060 SET_NETDEV_DEV(netdev, &pdev->dev);
1061
1062 pci_set_drvdata(pdev, netdev);
1063 adapter = netdev_priv(netdev);
1064 adapter->netdev = netdev;
1065 adapter->pdev = pdev;
1066 hw = &adapter->hw;
1067 hw->back = adapter;
1068 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
Taku Izumi42bfd33a2008-06-20 12:10:30 +09001069 adapter->bars = bars;
1070 adapter->need_ioport = need_ioport;
Auke Kok9d5c8242008-01-24 02:22:38 -08001071
1072 mmio_start = pci_resource_start(pdev, 0);
1073 mmio_len = pci_resource_len(pdev, 0);
1074
1075 err = -EIO;
1076 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
1077 if (!adapter->hw.hw_addr)
1078 goto err_ioremap;
1079
Stephen Hemminger2e5c6922008-11-19 22:20:44 -08001080 netdev->netdev_ops = &igb_netdev_ops;
Auke Kok9d5c8242008-01-24 02:22:38 -08001081 igb_set_ethtool_ops(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001082 netdev->watchdog_timeo = 5 * HZ;
Auke Kok9d5c8242008-01-24 02:22:38 -08001083 netdev->hard_start_xmit = &igb_xmit_frame_adv;
1084
1085 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1086
1087 netdev->mem_start = mmio_start;
1088 netdev->mem_end = mmio_start + mmio_len;
1089
Auke Kok9d5c8242008-01-24 02:22:38 -08001090 /* PCI config space info */
1091 hw->vendor_id = pdev->vendor;
1092 hw->device_id = pdev->device;
1093 hw->revision_id = pdev->revision;
1094 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1095 hw->subsystem_device_id = pdev->subsystem_device;
1096
1097 /* setup the private structure */
1098 hw->back = adapter;
1099 /* Copy the default MAC, PHY and NVM function pointers */
1100 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1101 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1102 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1103 /* Initialize skew-specific constants */
1104 err = ei->get_invariants(hw);
1105 if (err)
1106 goto err_hw_init;
1107
1108 err = igb_sw_init(adapter);
1109 if (err)
1110 goto err_sw_init;
1111
1112 igb_get_bus_info_pcie(hw);
1113
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001114 /* set flags */
1115 switch (hw->mac.type) {
1116 case e1000_82576:
1117 case e1000_82575:
1118 adapter->flags |= IGB_FLAG_HAS_DCA;
1119 adapter->flags |= IGB_FLAG_NEED_CTX_IDX;
1120 break;
1121 default:
1122 break;
1123 }
1124
Auke Kok9d5c8242008-01-24 02:22:38 -08001125 hw->phy.autoneg_wait_to_complete = false;
1126 hw->mac.adaptive_ifs = true;
1127
1128 /* Copper options */
1129 if (hw->phy.media_type == e1000_media_type_copper) {
1130 hw->phy.mdix = AUTO_ALL_MODES;
1131 hw->phy.disable_polarity_correction = false;
1132 hw->phy.ms_type = e1000_ms_hw_default;
1133 }
1134
1135 if (igb_check_reset_block(hw))
1136 dev_info(&pdev->dev,
1137 "PHY reset is blocked due to SOL/IDER session.\n");
1138
1139 netdev->features = NETIF_F_SG |
1140 NETIF_F_HW_CSUM |
1141 NETIF_F_HW_VLAN_TX |
1142 NETIF_F_HW_VLAN_RX |
1143 NETIF_F_HW_VLAN_FILTER;
1144
1145 netdev->features |= NETIF_F_TSO;
Auke Kok9d5c8242008-01-24 02:22:38 -08001146 netdev->features |= NETIF_F_TSO6;
Jeff Kirsher48f29ff2008-06-05 04:06:27 -07001147
Alexander Duyckd3352522008-07-08 15:12:13 -07001148#ifdef CONFIG_IGB_LRO
1149 netdev->features |= NETIF_F_LRO;
1150#endif
1151
Jeff Kirsher48f29ff2008-06-05 04:06:27 -07001152 netdev->vlan_features |= NETIF_F_TSO;
1153 netdev->vlan_features |= NETIF_F_TSO6;
1154 netdev->vlan_features |= NETIF_F_HW_CSUM;
1155 netdev->vlan_features |= NETIF_F_SG;
1156
Auke Kok9d5c8242008-01-24 02:22:38 -08001157 if (pci_using_dac)
1158 netdev->features |= NETIF_F_HIGHDMA;
1159
1160 netdev->features |= NETIF_F_LLTX;
1161 adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1162
1163 /* before reading the NVM, reset the controller to put the device in a
1164 * known good starting state */
1165 hw->mac.ops.reset_hw(hw);
1166
1167 /* make sure the NVM is good */
1168 if (igb_validate_nvm_checksum(hw) < 0) {
1169 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1170 err = -EIO;
1171 goto err_eeprom;
1172 }
1173
1174 /* copy the MAC address out of the NVM */
1175 if (hw->mac.ops.read_mac_addr(hw))
1176 dev_err(&pdev->dev, "NVM Read Error\n");
1177
1178 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1179 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1180
1181 if (!is_valid_ether_addr(netdev->perm_addr)) {
1182 dev_err(&pdev->dev, "Invalid MAC Address\n");
1183 err = -EIO;
1184 goto err_eeprom;
1185 }
1186
1187 init_timer(&adapter->watchdog_timer);
1188 adapter->watchdog_timer.function = &igb_watchdog;
1189 adapter->watchdog_timer.data = (unsigned long) adapter;
1190
1191 init_timer(&adapter->phy_info_timer);
1192 adapter->phy_info_timer.function = &igb_update_phy_info;
1193 adapter->phy_info_timer.data = (unsigned long) adapter;
1194
1195 INIT_WORK(&adapter->reset_task, igb_reset_task);
1196 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1197
1198 /* Initialize link & ring properties that are user-changeable */
1199 adapter->tx_ring->count = 256;
1200 for (i = 0; i < adapter->num_tx_queues; i++)
1201 adapter->tx_ring[i].count = adapter->tx_ring->count;
1202 adapter->rx_ring->count = 256;
1203 for (i = 0; i < adapter->num_rx_queues; i++)
1204 adapter->rx_ring[i].count = adapter->rx_ring->count;
1205
1206 adapter->fc_autoneg = true;
1207 hw->mac.autoneg = true;
1208 hw->phy.autoneg_advertised = 0x2f;
1209
1210 hw->fc.original_type = e1000_fc_default;
1211 hw->fc.type = e1000_fc_default;
1212
1213 adapter->itr_setting = 3;
1214 adapter->itr = IGB_START_ITR;
1215
1216 igb_validate_mdi_setting(hw);
1217
1218 adapter->rx_csum = 1;
1219
1220 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1221 * enable the ACPI Magic Packet filter
1222 */
1223
1224 if (hw->bus.func == 0 ||
1225 hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1226 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1227 &eeprom_data);
1228
1229 if (eeprom_data & eeprom_apme_mask)
1230 adapter->eeprom_wol |= E1000_WUFC_MAG;
1231
1232 /* now that we have the eeprom settings, apply the special cases where
1233 * the eeprom may be wrong or the board simply won't support wake on
1234 * lan on a particular port */
1235 switch (pdev->device) {
1236 case E1000_DEV_ID_82575GB_QUAD_COPPER:
1237 adapter->eeprom_wol = 0;
1238 break;
1239 case E1000_DEV_ID_82575EB_FIBER_SERDES:
Alexander Duyck2d064c02008-07-08 15:10:12 -07001240 case E1000_DEV_ID_82576_FIBER:
1241 case E1000_DEV_ID_82576_SERDES:
Auke Kok9d5c8242008-01-24 02:22:38 -08001242 /* Wake events only supported on port A for dual fiber
1243 * regardless of eeprom setting */
1244 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1245 adapter->eeprom_wol = 0;
1246 break;
1247 }
1248
1249 /* initialize the wol settings based on the eeprom settings */
1250 adapter->wol = adapter->eeprom_wol;
\"Rafael J. Wysocki\e1b86d82008-11-07 20:30:37 +00001251 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
Auke Kok9d5c8242008-01-24 02:22:38 -08001252
1253 /* reset the hardware with the new settings */
1254 igb_reset(adapter);
1255
1256 /* let the f/w know that the h/w is now under the control of the
1257 * driver. */
1258 igb_get_hw_control(adapter);
1259
1260 /* tell the stack to leave us alone until igb_open() is called */
1261 netif_carrier_off(netdev);
David S. Millerfd2ea0a2008-07-17 01:56:23 -07001262 netif_tx_stop_all_queues(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001263
1264 strcpy(netdev->name, "eth%d");
1265 err = register_netdev(netdev);
1266 if (err)
1267 goto err_register;
1268
Jeff Kirsher421e02f2008-10-17 11:08:31 -07001269#ifdef CONFIG_IGB_DCA
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001270 if ((adapter->flags & IGB_FLAG_HAS_DCA) &&
1271 (dca_add_requester(&pdev->dev) == 0)) {
1272 adapter->flags |= IGB_FLAG_DCA_ENABLED;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07001273 dev_info(&pdev->dev, "DCA enabled\n");
1274 /* Always use CB2 mode, difference is masked
1275 * in the CB driver. */
1276 wr32(E1000_DCA_CTRL, 2);
1277 igb_setup_dca(adapter);
1278 }
1279#endif
1280
Auke Kok9d5c8242008-01-24 02:22:38 -08001281 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1282 /* print bus type/speed/width info */
Johannes Berg7c510e42008-10-27 17:47:26 -07001283 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
Auke Kok9d5c8242008-01-24 02:22:38 -08001284 netdev->name,
1285 ((hw->bus.speed == e1000_bus_speed_2500)
1286 ? "2.5Gb/s" : "unknown"),
1287 ((hw->bus.width == e1000_bus_width_pcie_x4)
1288 ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1289 ? "Width x1" : "unknown"),
Johannes Berg7c510e42008-10-27 17:47:26 -07001290 netdev->dev_addr);
Auke Kok9d5c8242008-01-24 02:22:38 -08001291
1292 igb_read_part_num(hw, &part_num);
1293 dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1294 (part_num >> 8), (part_num & 0xff));
1295
1296 dev_info(&pdev->dev,
1297 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1298 adapter->msix_entries ? "MSI-X" :
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001299 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
Auke Kok9d5c8242008-01-24 02:22:38 -08001300 adapter->num_rx_queues, adapter->num_tx_queues);
1301
Auke Kok9d5c8242008-01-24 02:22:38 -08001302 return 0;
1303
1304err_register:
1305 igb_release_hw_control(adapter);
1306err_eeprom:
1307 if (!igb_check_reset_block(hw))
1308 hw->phy.ops.reset_phy(hw);
1309
1310 if (hw->flash_address)
1311 iounmap(hw->flash_address);
1312
1313 igb_remove_device(hw);
Alexander Duycka88f10e2008-07-08 15:13:38 -07001314 igb_free_queues(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001315err_sw_init:
1316err_hw_init:
1317 iounmap(hw->hw_addr);
1318err_ioremap:
1319 free_netdev(netdev);
1320err_alloc_etherdev:
Taku Izumi42bfd33a2008-06-20 12:10:30 +09001321 pci_release_selected_regions(pdev, bars);
Auke Kok9d5c8242008-01-24 02:22:38 -08001322err_pci_reg:
1323err_dma:
1324 pci_disable_device(pdev);
1325 return err;
1326}
1327
1328/**
1329 * igb_remove - Device Removal Routine
1330 * @pdev: PCI device information struct
1331 *
1332 * igb_remove is called by the PCI subsystem to alert the driver
1333 * that it should release a PCI device. The could be caused by a
1334 * Hot-Plug event, or because the driver is going to be removed from
1335 * memory.
1336 **/
1337static void __devexit igb_remove(struct pci_dev *pdev)
1338{
1339 struct net_device *netdev = pci_get_drvdata(pdev);
1340 struct igb_adapter *adapter = netdev_priv(netdev);
Jeff Kirsher421e02f2008-10-17 11:08:31 -07001341#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -07001342 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck9280fa52008-07-08 15:14:04 -07001343#endif
Auke Kok9d5c8242008-01-24 02:22:38 -08001344
1345 /* flush_scheduled work may reschedule our watchdog task, so
1346 * explicitly disable watchdog tasks from being rescheduled */
1347 set_bit(__IGB_DOWN, &adapter->state);
1348 del_timer_sync(&adapter->watchdog_timer);
1349 del_timer_sync(&adapter->phy_info_timer);
1350
1351 flush_scheduled_work();
1352
Jeff Kirsher421e02f2008-10-17 11:08:31 -07001353#ifdef CONFIG_IGB_DCA
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001354 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
Jeb Cramerfe4506b2008-07-08 15:07:55 -07001355 dev_info(&pdev->dev, "DCA disabled\n");
1356 dca_remove_requester(&pdev->dev);
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001357 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07001358 wr32(E1000_DCA_CTRL, 1);
1359 }
1360#endif
1361
Auke Kok9d5c8242008-01-24 02:22:38 -08001362 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1363 * would have already happened in close and is redundant. */
1364 igb_release_hw_control(adapter);
1365
1366 unregister_netdev(netdev);
1367
Alexander Duyckc743a872008-08-04 14:59:46 -07001368 if (adapter->hw.phy.ops.reset_phy &&
1369 !igb_check_reset_block(&adapter->hw))
Auke Kok9d5c8242008-01-24 02:22:38 -08001370 adapter->hw.phy.ops.reset_phy(&adapter->hw);
1371
1372 igb_remove_device(&adapter->hw);
1373 igb_reset_interrupt_capability(adapter);
1374
Alexander Duycka88f10e2008-07-08 15:13:38 -07001375 igb_free_queues(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001376
1377 iounmap(adapter->hw.hw_addr);
1378 if (adapter->hw.flash_address)
1379 iounmap(adapter->hw.flash_address);
Taku Izumi42bfd33a2008-06-20 12:10:30 +09001380 pci_release_selected_regions(pdev, adapter->bars);
Auke Kok9d5c8242008-01-24 02:22:38 -08001381
1382 free_netdev(netdev);
1383
1384 pci_disable_device(pdev);
1385}
1386
1387/**
1388 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1389 * @adapter: board private structure to initialize
1390 *
1391 * igb_sw_init initializes the Adapter private data structure.
1392 * Fields are initialized based on PCI device information and
1393 * OS network device settings (MTU size).
1394 **/
1395static int __devinit igb_sw_init(struct igb_adapter *adapter)
1396{
1397 struct e1000_hw *hw = &adapter->hw;
1398 struct net_device *netdev = adapter->netdev;
1399 struct pci_dev *pdev = adapter->pdev;
1400
1401 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1402
1403 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1404 adapter->rx_ps_hdr_size = 0; /* disable packet split */
1405 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1406 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1407
1408 /* Number of supported queues. */
1409 /* Having more queues than CPUs doesn't make sense. */
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07001410 adapter->num_rx_queues = min((u32)IGB_MAX_RX_QUEUES, (u32)num_online_cpus());
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07001411 adapter->num_tx_queues = min(IGB_MAX_TX_QUEUES, num_online_cpus());
Auke Kok9d5c8242008-01-24 02:22:38 -08001412
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07001413 /* This call may decrease the number of queues depending on
1414 * interrupt mode. */
Auke Kok9d5c8242008-01-24 02:22:38 -08001415 igb_set_interrupt_capability(adapter);
1416
1417 if (igb_alloc_queues(adapter)) {
1418 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1419 return -ENOMEM;
1420 }
1421
1422 /* Explicitly disable IRQ since the NIC can be in any state. */
1423 igb_irq_disable(adapter);
1424
1425 set_bit(__IGB_DOWN, &adapter->state);
1426 return 0;
1427}
1428
1429/**
1430 * igb_open - Called when a network interface is made active
1431 * @netdev: network interface device structure
1432 *
1433 * Returns 0 on success, negative value on failure
1434 *
1435 * The open entry point is called when a network interface is made
1436 * active by the system (IFF_UP). At this point all resources needed
1437 * for transmit and receive operations are allocated, the interrupt
1438 * handler is registered with the OS, the watchdog timer is started,
1439 * and the stack is notified that the interface is ready.
1440 **/
1441static int igb_open(struct net_device *netdev)
1442{
1443 struct igb_adapter *adapter = netdev_priv(netdev);
1444 struct e1000_hw *hw = &adapter->hw;
1445 int err;
1446 int i;
1447
1448 /* disallow open during test */
1449 if (test_bit(__IGB_TESTING, &adapter->state))
1450 return -EBUSY;
1451
1452 /* allocate transmit descriptors */
1453 err = igb_setup_all_tx_resources(adapter);
1454 if (err)
1455 goto err_setup_tx;
1456
1457 /* allocate receive descriptors */
1458 err = igb_setup_all_rx_resources(adapter);
1459 if (err)
1460 goto err_setup_rx;
1461
1462 /* e1000_power_up_phy(adapter); */
1463
1464 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1465 if ((adapter->hw.mng_cookie.status &
1466 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1467 igb_update_mng_vlan(adapter);
1468
1469 /* before we allocate an interrupt, we must be ready to handle it.
1470 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1471 * as soon as we call pci_request_irq, so we have to setup our
1472 * clean_rx handler before we do so. */
1473 igb_configure(adapter);
1474
1475 err = igb_request_irq(adapter);
1476 if (err)
1477 goto err_req_irq;
1478
1479 /* From here on the code is the same as igb_up() */
1480 clear_bit(__IGB_DOWN, &adapter->state);
1481
PJ Waskiewicz844290e2008-06-27 11:00:39 -07001482 for (i = 0; i < adapter->num_rx_queues; i++)
1483 napi_enable(&adapter->rx_ring[i].napi);
Auke Kok9d5c8242008-01-24 02:22:38 -08001484
1485 /* Clear any pending interrupts. */
1486 rd32(E1000_ICR);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07001487
1488 igb_irq_enable(adapter);
1489
Jeff Kirsherd55b53f2008-07-18 04:33:03 -07001490 netif_tx_start_all_queues(netdev);
1491
Auke Kok9d5c8242008-01-24 02:22:38 -08001492 /* Fire a link status change interrupt to start the watchdog. */
1493 wr32(E1000_ICS, E1000_ICS_LSC);
1494
1495 return 0;
1496
1497err_req_irq:
1498 igb_release_hw_control(adapter);
1499 /* e1000_power_down_phy(adapter); */
1500 igb_free_all_rx_resources(adapter);
1501err_setup_rx:
1502 igb_free_all_tx_resources(adapter);
1503err_setup_tx:
1504 igb_reset(adapter);
1505
1506 return err;
1507}
1508
1509/**
1510 * igb_close - Disables a network interface
1511 * @netdev: network interface device structure
1512 *
1513 * Returns 0, this is not allowed to fail
1514 *
1515 * The close entry point is called when an interface is de-activated
1516 * by the OS. The hardware is still under the driver's control, but
1517 * needs to be disabled. A global MAC reset is issued to stop the
1518 * hardware, and all transmit and receive resources are freed.
1519 **/
1520static int igb_close(struct net_device *netdev)
1521{
1522 struct igb_adapter *adapter = netdev_priv(netdev);
1523
1524 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1525 igb_down(adapter);
1526
1527 igb_free_irq(adapter);
1528
1529 igb_free_all_tx_resources(adapter);
1530 igb_free_all_rx_resources(adapter);
1531
1532 /* kill manageability vlan ID if supported, but not if a vlan with
1533 * the same ID is registered on the host OS (let 8021q kill it) */
1534 if ((adapter->hw.mng_cookie.status &
1535 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1536 !(adapter->vlgrp &&
1537 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1538 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1539
1540 return 0;
1541}
1542
1543/**
1544 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1545 * @adapter: board private structure
1546 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1547 *
1548 * Return 0 on success, negative on failure
1549 **/
1550
1551int igb_setup_tx_resources(struct igb_adapter *adapter,
1552 struct igb_ring *tx_ring)
1553{
1554 struct pci_dev *pdev = adapter->pdev;
1555 int size;
1556
1557 size = sizeof(struct igb_buffer) * tx_ring->count;
1558 tx_ring->buffer_info = vmalloc(size);
1559 if (!tx_ring->buffer_info)
1560 goto err;
1561 memset(tx_ring->buffer_info, 0, size);
1562
1563 /* round up to nearest 4K */
1564 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1565 + sizeof(u32);
1566 tx_ring->size = ALIGN(tx_ring->size, 4096);
1567
1568 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1569 &tx_ring->dma);
1570
1571 if (!tx_ring->desc)
1572 goto err;
1573
1574 tx_ring->adapter = adapter;
1575 tx_ring->next_to_use = 0;
1576 tx_ring->next_to_clean = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08001577 return 0;
1578
1579err:
1580 vfree(tx_ring->buffer_info);
1581 dev_err(&adapter->pdev->dev,
1582 "Unable to allocate memory for the transmit descriptor ring\n");
1583 return -ENOMEM;
1584}
1585
1586/**
1587 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1588 * (Descriptors) for all queues
1589 * @adapter: board private structure
1590 *
1591 * Return 0 on success, negative on failure
1592 **/
1593static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1594{
1595 int i, err = 0;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07001596 int r_idx;
Auke Kok9d5c8242008-01-24 02:22:38 -08001597
1598 for (i = 0; i < adapter->num_tx_queues; i++) {
1599 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1600 if (err) {
1601 dev_err(&adapter->pdev->dev,
1602 "Allocation for Tx Queue %u failed\n", i);
1603 for (i--; i >= 0; i--)
Mitch Williams3b644cf2008-06-27 10:59:48 -07001604 igb_free_tx_resources(&adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08001605 break;
1606 }
1607 }
1608
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07001609 for (i = 0; i < IGB_MAX_TX_QUEUES; i++) {
1610 r_idx = i % adapter->num_tx_queues;
1611 adapter->multi_tx_table[i] = &adapter->tx_ring[r_idx];
1612 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001613 return err;
1614}
1615
1616/**
1617 * igb_configure_tx - Configure transmit Unit after Reset
1618 * @adapter: board private structure
1619 *
1620 * Configure the Tx unit of the MAC after a reset.
1621 **/
1622static void igb_configure_tx(struct igb_adapter *adapter)
1623{
1624 u64 tdba, tdwba;
1625 struct e1000_hw *hw = &adapter->hw;
1626 u32 tctl;
1627 u32 txdctl, txctrl;
1628 int i;
1629
1630 for (i = 0; i < adapter->num_tx_queues; i++) {
1631 struct igb_ring *ring = &(adapter->tx_ring[i]);
1632
1633 wr32(E1000_TDLEN(i),
1634 ring->count * sizeof(struct e1000_tx_desc));
1635 tdba = ring->dma;
1636 wr32(E1000_TDBAL(i),
1637 tdba & 0x00000000ffffffffULL);
1638 wr32(E1000_TDBAH(i), tdba >> 32);
1639
1640 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1641 tdwba |= 1; /* enable head wb */
1642 wr32(E1000_TDWBAL(i),
1643 tdwba & 0x00000000ffffffffULL);
1644 wr32(E1000_TDWBAH(i), tdwba >> 32);
1645
1646 ring->head = E1000_TDH(i);
1647 ring->tail = E1000_TDT(i);
1648 writel(0, hw->hw_addr + ring->tail);
1649 writel(0, hw->hw_addr + ring->head);
1650 txdctl = rd32(E1000_TXDCTL(i));
1651 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1652 wr32(E1000_TXDCTL(i), txdctl);
1653
1654 /* Turn off Relaxed Ordering on head write-backs. The
1655 * writebacks MUST be delivered in order or it will
1656 * completely screw up our bookeeping.
1657 */
1658 txctrl = rd32(E1000_DCA_TXCTRL(i));
1659 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1660 wr32(E1000_DCA_TXCTRL(i), txctrl);
1661 }
1662
1663
1664
1665 /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1666
1667 /* Program the Transmit Control Register */
1668
1669 tctl = rd32(E1000_TCTL);
1670 tctl &= ~E1000_TCTL_CT;
1671 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1672 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1673
1674 igb_config_collision_dist(hw);
1675
1676 /* Setup Transmit Descriptor Settings for eop descriptor */
1677 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1678
1679 /* Enable transmits */
1680 tctl |= E1000_TCTL_EN;
1681
1682 wr32(E1000_TCTL, tctl);
1683}
1684
1685/**
1686 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1687 * @adapter: board private structure
1688 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1689 *
1690 * Returns 0 on success, negative on failure
1691 **/
1692
1693int igb_setup_rx_resources(struct igb_adapter *adapter,
1694 struct igb_ring *rx_ring)
1695{
1696 struct pci_dev *pdev = adapter->pdev;
1697 int size, desc_len;
1698
Alexander Duyckd3352522008-07-08 15:12:13 -07001699#ifdef CONFIG_IGB_LRO
1700 size = sizeof(struct net_lro_desc) * MAX_LRO_DESCRIPTORS;
1701 rx_ring->lro_mgr.lro_arr = vmalloc(size);
1702 if (!rx_ring->lro_mgr.lro_arr)
1703 goto err;
1704 memset(rx_ring->lro_mgr.lro_arr, 0, size);
1705#endif
1706
Auke Kok9d5c8242008-01-24 02:22:38 -08001707 size = sizeof(struct igb_buffer) * rx_ring->count;
1708 rx_ring->buffer_info = vmalloc(size);
1709 if (!rx_ring->buffer_info)
1710 goto err;
1711 memset(rx_ring->buffer_info, 0, size);
1712
1713 desc_len = sizeof(union e1000_adv_rx_desc);
1714
1715 /* Round up to nearest 4K */
1716 rx_ring->size = rx_ring->count * desc_len;
1717 rx_ring->size = ALIGN(rx_ring->size, 4096);
1718
1719 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1720 &rx_ring->dma);
1721
1722 if (!rx_ring->desc)
1723 goto err;
1724
1725 rx_ring->next_to_clean = 0;
1726 rx_ring->next_to_use = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08001727
1728 rx_ring->adapter = adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08001729
1730 return 0;
1731
1732err:
Alexander Duyckd3352522008-07-08 15:12:13 -07001733#ifdef CONFIG_IGB_LRO
1734 vfree(rx_ring->lro_mgr.lro_arr);
1735 rx_ring->lro_mgr.lro_arr = NULL;
1736#endif
Auke Kok9d5c8242008-01-24 02:22:38 -08001737 vfree(rx_ring->buffer_info);
1738 dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1739 "the receive descriptor ring\n");
1740 return -ENOMEM;
1741}
1742
1743/**
1744 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1745 * (Descriptors) for all queues
1746 * @adapter: board private structure
1747 *
1748 * Return 0 on success, negative on failure
1749 **/
1750static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1751{
1752 int i, err = 0;
1753
1754 for (i = 0; i < adapter->num_rx_queues; i++) {
1755 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1756 if (err) {
1757 dev_err(&adapter->pdev->dev,
1758 "Allocation for Rx Queue %u failed\n", i);
1759 for (i--; i >= 0; i--)
Mitch Williams3b644cf2008-06-27 10:59:48 -07001760 igb_free_rx_resources(&adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08001761 break;
1762 }
1763 }
1764
1765 return err;
1766}
1767
1768/**
1769 * igb_setup_rctl - configure the receive control registers
1770 * @adapter: Board private structure
1771 **/
1772static void igb_setup_rctl(struct igb_adapter *adapter)
1773{
1774 struct e1000_hw *hw = &adapter->hw;
1775 u32 rctl;
1776 u32 srrctl = 0;
1777 int i;
1778
1779 rctl = rd32(E1000_RCTL);
1780
1781 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1782
1783 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1784 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1785 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1786
Auke Kok87cb7e82008-07-08 15:08:29 -07001787 /*
1788 * enable stripping of CRC. It's unlikely this will break BMC
1789 * redirection as it did with e1000. Newer features require
1790 * that the HW strips the CRC.
Auke Kok9d5c8242008-01-24 02:22:38 -08001791 */
Auke Kok87cb7e82008-07-08 15:08:29 -07001792 rctl |= E1000_RCTL_SECRC;
Auke Kok9d5c8242008-01-24 02:22:38 -08001793
1794 rctl &= ~E1000_RCTL_SBP;
1795
1796 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1797 rctl &= ~E1000_RCTL_LPE;
1798 else
1799 rctl |= E1000_RCTL_LPE;
1800 if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) {
1801 /* Setup buffer sizes */
1802 rctl &= ~E1000_RCTL_SZ_4096;
1803 rctl |= E1000_RCTL_BSEX;
1804 switch (adapter->rx_buffer_len) {
1805 case IGB_RXBUFFER_256:
1806 rctl |= E1000_RCTL_SZ_256;
1807 rctl &= ~E1000_RCTL_BSEX;
1808 break;
1809 case IGB_RXBUFFER_512:
1810 rctl |= E1000_RCTL_SZ_512;
1811 rctl &= ~E1000_RCTL_BSEX;
1812 break;
1813 case IGB_RXBUFFER_1024:
1814 rctl |= E1000_RCTL_SZ_1024;
1815 rctl &= ~E1000_RCTL_BSEX;
1816 break;
1817 case IGB_RXBUFFER_2048:
1818 default:
1819 rctl |= E1000_RCTL_SZ_2048;
1820 rctl &= ~E1000_RCTL_BSEX;
1821 break;
Auke Kok9d5c8242008-01-24 02:22:38 -08001822 }
1823 } else {
1824 rctl &= ~E1000_RCTL_BSEX;
1825 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1826 }
1827
1828 /* 82575 and greater support packet-split where the protocol
1829 * header is placed in skb->data and the packet data is
1830 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1831 * In the case of a non-split, skb->data is linearly filled,
1832 * followed by the page buffers. Therefore, skb->data is
1833 * sized to hold the largest protocol header.
1834 */
1835 /* allocations using alloc_page take too long for regular MTU
1836 * so only enable packet split for jumbo frames */
1837 if (rctl & E1000_RCTL_LPE) {
1838 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07001839 srrctl |= adapter->rx_ps_hdr_size <<
Auke Kok9d5c8242008-01-24 02:22:38 -08001840 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
Auke Kok9d5c8242008-01-24 02:22:38 -08001841 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1842 } else {
1843 adapter->rx_ps_hdr_size = 0;
1844 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1845 }
1846
1847 for (i = 0; i < adapter->num_rx_queues; i++)
1848 wr32(E1000_SRRCTL(i), srrctl);
1849
1850 wr32(E1000_RCTL, rctl);
1851}
1852
1853/**
1854 * igb_configure_rx - Configure receive Unit after Reset
1855 * @adapter: board private structure
1856 *
1857 * Configure the Rx unit of the MAC after a reset.
1858 **/
1859static void igb_configure_rx(struct igb_adapter *adapter)
1860{
1861 u64 rdba;
1862 struct e1000_hw *hw = &adapter->hw;
1863 u32 rctl, rxcsum;
1864 u32 rxdctl;
1865 int i;
1866
1867 /* disable receives while setting up the descriptors */
1868 rctl = rd32(E1000_RCTL);
1869 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1870 wrfl();
1871 mdelay(10);
1872
1873 if (adapter->itr_setting > 3)
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07001874 wr32(E1000_ITR, adapter->itr);
Auke Kok9d5c8242008-01-24 02:22:38 -08001875
1876 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1877 * the Base and Length of the Rx Descriptor Ring */
1878 for (i = 0; i < adapter->num_rx_queues; i++) {
1879 struct igb_ring *ring = &(adapter->rx_ring[i]);
1880 rdba = ring->dma;
1881 wr32(E1000_RDBAL(i),
1882 rdba & 0x00000000ffffffffULL);
1883 wr32(E1000_RDBAH(i), rdba >> 32);
1884 wr32(E1000_RDLEN(i),
1885 ring->count * sizeof(union e1000_adv_rx_desc));
1886
1887 ring->head = E1000_RDH(i);
1888 ring->tail = E1000_RDT(i);
1889 writel(0, hw->hw_addr + ring->tail);
1890 writel(0, hw->hw_addr + ring->head);
1891
1892 rxdctl = rd32(E1000_RXDCTL(i));
1893 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1894 rxdctl &= 0xFFF00000;
1895 rxdctl |= IGB_RX_PTHRESH;
1896 rxdctl |= IGB_RX_HTHRESH << 8;
1897 rxdctl |= IGB_RX_WTHRESH << 16;
1898 wr32(E1000_RXDCTL(i), rxdctl);
Alexander Duyckd3352522008-07-08 15:12:13 -07001899#ifdef CONFIG_IGB_LRO
1900 /* Intitial LRO Settings */
1901 ring->lro_mgr.max_aggr = MAX_LRO_AGGR;
1902 ring->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS;
1903 ring->lro_mgr.get_skb_header = igb_get_skb_hdr;
1904 ring->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1905 ring->lro_mgr.dev = adapter->netdev;
1906 ring->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1907 ring->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1908#endif
Auke Kok9d5c8242008-01-24 02:22:38 -08001909 }
1910
1911 if (adapter->num_rx_queues > 1) {
1912 u32 random[10];
1913 u32 mrqc;
1914 u32 j, shift;
1915 union e1000_reta {
1916 u32 dword;
1917 u8 bytes[4];
1918 } reta;
1919
1920 get_random_bytes(&random[0], 40);
1921
Alexander Duyck2d064c02008-07-08 15:10:12 -07001922 if (hw->mac.type >= e1000_82576)
1923 shift = 0;
1924 else
1925 shift = 6;
Auke Kok9d5c8242008-01-24 02:22:38 -08001926 for (j = 0; j < (32 * 4); j++) {
1927 reta.bytes[j & 3] =
1928 (j % adapter->num_rx_queues) << shift;
1929 if ((j & 3) == 3)
1930 writel(reta.dword,
1931 hw->hw_addr + E1000_RETA(0) + (j & ~3));
1932 }
1933 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1934
1935 /* Fill out hash function seeds */
1936 for (j = 0; j < 10; j++)
1937 array_wr32(E1000_RSSRK(0), j, random[j]);
1938
1939 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1940 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1941 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1942 E1000_MRQC_RSS_FIELD_IPV6_TCP);
1943 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1944 E1000_MRQC_RSS_FIELD_IPV6_UDP);
1945 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1946 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1947
1948
1949 wr32(E1000_MRQC, mrqc);
1950
1951 /* Multiqueue and raw packet checksumming are mutually
1952 * exclusive. Note that this not the same as TCP/IP
1953 * checksumming, which works fine. */
1954 rxcsum = rd32(E1000_RXCSUM);
1955 rxcsum |= E1000_RXCSUM_PCSD;
1956 wr32(E1000_RXCSUM, rxcsum);
1957 } else {
1958 /* Enable Receive Checksum Offload for TCP and UDP */
1959 rxcsum = rd32(E1000_RXCSUM);
1960 if (adapter->rx_csum) {
1961 rxcsum |= E1000_RXCSUM_TUOFL;
1962
1963 /* Enable IPv4 payload checksum for UDP fragments
1964 * Must be used in conjunction with packet-split. */
1965 if (adapter->rx_ps_hdr_size)
1966 rxcsum |= E1000_RXCSUM_IPPCSE;
1967 } else {
1968 rxcsum &= ~E1000_RXCSUM_TUOFL;
1969 /* don't need to clear IPPCSE as it defaults to 0 */
1970 }
1971 wr32(E1000_RXCSUM, rxcsum);
1972 }
1973
1974 if (adapter->vlgrp)
1975 wr32(E1000_RLPML,
1976 adapter->max_frame_size + VLAN_TAG_SIZE);
1977 else
1978 wr32(E1000_RLPML, adapter->max_frame_size);
1979
1980 /* Enable Receives */
1981 wr32(E1000_RCTL, rctl);
1982}
1983
1984/**
1985 * igb_free_tx_resources - Free Tx Resources per Queue
1986 * @adapter: board private structure
1987 * @tx_ring: Tx descriptor ring for a specific queue
1988 *
1989 * Free all transmit software resources
1990 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07001991static void igb_free_tx_resources(struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08001992{
Mitch Williams3b644cf2008-06-27 10:59:48 -07001993 struct pci_dev *pdev = tx_ring->adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08001994
Mitch Williams3b644cf2008-06-27 10:59:48 -07001995 igb_clean_tx_ring(tx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08001996
1997 vfree(tx_ring->buffer_info);
1998 tx_ring->buffer_info = NULL;
1999
2000 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2001
2002 tx_ring->desc = NULL;
2003}
2004
2005/**
2006 * igb_free_all_tx_resources - Free Tx Resources for All Queues
2007 * @adapter: board private structure
2008 *
2009 * Free all transmit software resources
2010 **/
2011static void igb_free_all_tx_resources(struct igb_adapter *adapter)
2012{
2013 int i;
2014
2015 for (i = 0; i < adapter->num_tx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07002016 igb_free_tx_resources(&adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002017}
2018
2019static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
2020 struct igb_buffer *buffer_info)
2021{
2022 if (buffer_info->dma) {
2023 pci_unmap_page(adapter->pdev,
2024 buffer_info->dma,
2025 buffer_info->length,
2026 PCI_DMA_TODEVICE);
2027 buffer_info->dma = 0;
2028 }
2029 if (buffer_info->skb) {
2030 dev_kfree_skb_any(buffer_info->skb);
2031 buffer_info->skb = NULL;
2032 }
2033 buffer_info->time_stamp = 0;
2034 /* buffer_info must be completely set up in the transmit path */
2035}
2036
2037/**
2038 * igb_clean_tx_ring - Free Tx Buffers
2039 * @adapter: board private structure
2040 * @tx_ring: ring to be cleaned
2041 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07002042static void igb_clean_tx_ring(struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002043{
Mitch Williams3b644cf2008-06-27 10:59:48 -07002044 struct igb_adapter *adapter = tx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08002045 struct igb_buffer *buffer_info;
2046 unsigned long size;
2047 unsigned int i;
2048
2049 if (!tx_ring->buffer_info)
2050 return;
2051 /* Free all the Tx ring sk_buffs */
2052
2053 for (i = 0; i < tx_ring->count; i++) {
2054 buffer_info = &tx_ring->buffer_info[i];
2055 igb_unmap_and_free_tx_resource(adapter, buffer_info);
2056 }
2057
2058 size = sizeof(struct igb_buffer) * tx_ring->count;
2059 memset(tx_ring->buffer_info, 0, size);
2060
2061 /* Zero out the descriptor ring */
2062
2063 memset(tx_ring->desc, 0, tx_ring->size);
2064
2065 tx_ring->next_to_use = 0;
2066 tx_ring->next_to_clean = 0;
2067
2068 writel(0, adapter->hw.hw_addr + tx_ring->head);
2069 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2070}
2071
2072/**
2073 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2074 * @adapter: board private structure
2075 **/
2076static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
2077{
2078 int i;
2079
2080 for (i = 0; i < adapter->num_tx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07002081 igb_clean_tx_ring(&adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002082}
2083
2084/**
2085 * igb_free_rx_resources - Free Rx Resources
2086 * @adapter: board private structure
2087 * @rx_ring: ring to clean the resources from
2088 *
2089 * Free all receive software resources
2090 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07002091static void igb_free_rx_resources(struct igb_ring *rx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002092{
Mitch Williams3b644cf2008-06-27 10:59:48 -07002093 struct pci_dev *pdev = rx_ring->adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08002094
Mitch Williams3b644cf2008-06-27 10:59:48 -07002095 igb_clean_rx_ring(rx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08002096
2097 vfree(rx_ring->buffer_info);
2098 rx_ring->buffer_info = NULL;
2099
Alexander Duyckd3352522008-07-08 15:12:13 -07002100#ifdef CONFIG_IGB_LRO
2101 vfree(rx_ring->lro_mgr.lro_arr);
2102 rx_ring->lro_mgr.lro_arr = NULL;
2103#endif
2104
Auke Kok9d5c8242008-01-24 02:22:38 -08002105 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2106
2107 rx_ring->desc = NULL;
2108}
2109
2110/**
2111 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2112 * @adapter: board private structure
2113 *
2114 * Free all receive software resources
2115 **/
2116static void igb_free_all_rx_resources(struct igb_adapter *adapter)
2117{
2118 int i;
2119
2120 for (i = 0; i < adapter->num_rx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07002121 igb_free_rx_resources(&adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002122}
2123
2124/**
2125 * igb_clean_rx_ring - Free Rx Buffers per Queue
2126 * @adapter: board private structure
2127 * @rx_ring: ring to free buffers from
2128 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07002129static void igb_clean_rx_ring(struct igb_ring *rx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002130{
Mitch Williams3b644cf2008-06-27 10:59:48 -07002131 struct igb_adapter *adapter = rx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08002132 struct igb_buffer *buffer_info;
2133 struct pci_dev *pdev = adapter->pdev;
2134 unsigned long size;
2135 unsigned int i;
2136
2137 if (!rx_ring->buffer_info)
2138 return;
2139 /* Free all the Rx ring sk_buffs */
2140 for (i = 0; i < rx_ring->count; i++) {
2141 buffer_info = &rx_ring->buffer_info[i];
2142 if (buffer_info->dma) {
2143 if (adapter->rx_ps_hdr_size)
2144 pci_unmap_single(pdev, buffer_info->dma,
2145 adapter->rx_ps_hdr_size,
2146 PCI_DMA_FROMDEVICE);
2147 else
2148 pci_unmap_single(pdev, buffer_info->dma,
2149 adapter->rx_buffer_len,
2150 PCI_DMA_FROMDEVICE);
2151 buffer_info->dma = 0;
2152 }
2153
2154 if (buffer_info->skb) {
2155 dev_kfree_skb(buffer_info->skb);
2156 buffer_info->skb = NULL;
2157 }
2158 if (buffer_info->page) {
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07002159 if (buffer_info->page_dma)
2160 pci_unmap_page(pdev, buffer_info->page_dma,
2161 PAGE_SIZE / 2,
2162 PCI_DMA_FROMDEVICE);
Auke Kok9d5c8242008-01-24 02:22:38 -08002163 put_page(buffer_info->page);
2164 buffer_info->page = NULL;
2165 buffer_info->page_dma = 0;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07002166 buffer_info->page_offset = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08002167 }
2168 }
2169
Auke Kok9d5c8242008-01-24 02:22:38 -08002170 size = sizeof(struct igb_buffer) * rx_ring->count;
2171 memset(rx_ring->buffer_info, 0, size);
2172
2173 /* Zero out the descriptor ring */
2174 memset(rx_ring->desc, 0, rx_ring->size);
2175
2176 rx_ring->next_to_clean = 0;
2177 rx_ring->next_to_use = 0;
2178
2179 writel(0, adapter->hw.hw_addr + rx_ring->head);
2180 writel(0, adapter->hw.hw_addr + rx_ring->tail);
2181}
2182
2183/**
2184 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2185 * @adapter: board private structure
2186 **/
2187static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
2188{
2189 int i;
2190
2191 for (i = 0; i < adapter->num_rx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07002192 igb_clean_rx_ring(&adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002193}
2194
2195/**
2196 * igb_set_mac - Change the Ethernet Address of the NIC
2197 * @netdev: network interface device structure
2198 * @p: pointer to an address structure
2199 *
2200 * Returns 0 on success, negative on failure
2201 **/
2202static int igb_set_mac(struct net_device *netdev, void *p)
2203{
2204 struct igb_adapter *adapter = netdev_priv(netdev);
2205 struct sockaddr *addr = p;
2206
2207 if (!is_valid_ether_addr(addr->sa_data))
2208 return -EADDRNOTAVAIL;
2209
2210 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2211 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2212
2213 adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2214
2215 return 0;
2216}
2217
2218/**
2219 * igb_set_multi - Multicast and Promiscuous mode set
2220 * @netdev: network interface device structure
2221 *
2222 * The set_multi entry point is called whenever the multicast address
2223 * list or the network interface flags are updated. This routine is
2224 * responsible for configuring the hardware for proper multicast,
2225 * promiscuous mode, and all-multi behavior.
2226 **/
2227static void igb_set_multi(struct net_device *netdev)
2228{
2229 struct igb_adapter *adapter = netdev_priv(netdev);
2230 struct e1000_hw *hw = &adapter->hw;
2231 struct e1000_mac_info *mac = &hw->mac;
2232 struct dev_mc_list *mc_ptr;
2233 u8 *mta_list;
2234 u32 rctl;
2235 int i;
2236
2237 /* Check for Promiscuous and All Multicast modes */
2238
2239 rctl = rd32(E1000_RCTL);
2240
Patrick McHardy746b9f02008-07-16 20:15:45 -07002241 if (netdev->flags & IFF_PROMISC) {
Auke Kok9d5c8242008-01-24 02:22:38 -08002242 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
Patrick McHardy746b9f02008-07-16 20:15:45 -07002243 rctl &= ~E1000_RCTL_VFE;
2244 } else {
2245 if (netdev->flags & IFF_ALLMULTI) {
2246 rctl |= E1000_RCTL_MPE;
2247 rctl &= ~E1000_RCTL_UPE;
2248 } else
2249 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
Patrick McHardy78ed11a2008-07-16 20:16:14 -07002250 rctl |= E1000_RCTL_VFE;
Patrick McHardy746b9f02008-07-16 20:15:45 -07002251 }
Auke Kok9d5c8242008-01-24 02:22:38 -08002252 wr32(E1000_RCTL, rctl);
2253
2254 if (!netdev->mc_count) {
2255 /* nothing to program, so clear mc list */
Alexander Duyck2d064c02008-07-08 15:10:12 -07002256 igb_update_mc_addr_list_82575(hw, NULL, 0, 1,
Auke Kok9d5c8242008-01-24 02:22:38 -08002257 mac->rar_entry_count);
2258 return;
2259 }
2260
2261 mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2262 if (!mta_list)
2263 return;
2264
2265 /* The shared function expects a packed array of only addresses. */
2266 mc_ptr = netdev->mc_list;
2267
2268 for (i = 0; i < netdev->mc_count; i++) {
2269 if (!mc_ptr)
2270 break;
2271 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2272 mc_ptr = mc_ptr->next;
2273 }
Alexander Duyck2d064c02008-07-08 15:10:12 -07002274 igb_update_mc_addr_list_82575(hw, mta_list, i, 1,
2275 mac->rar_entry_count);
Auke Kok9d5c8242008-01-24 02:22:38 -08002276 kfree(mta_list);
2277}
2278
2279/* Need to wait a few seconds after link up to get diagnostic information from
2280 * the phy */
2281static void igb_update_phy_info(unsigned long data)
2282{
2283 struct igb_adapter *adapter = (struct igb_adapter *) data;
Bill Hayes68707ac2008-02-19 10:24:41 -08002284 if (adapter->hw.phy.ops.get_phy_info)
2285 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08002286}
2287
2288/**
2289 * igb_watchdog - Timer Call-back
2290 * @data: pointer to adapter cast into an unsigned long
2291 **/
2292static void igb_watchdog(unsigned long data)
2293{
2294 struct igb_adapter *adapter = (struct igb_adapter *)data;
2295 /* Do the rest outside of interrupt context */
2296 schedule_work(&adapter->watchdog_task);
2297}
2298
2299static void igb_watchdog_task(struct work_struct *work)
2300{
2301 struct igb_adapter *adapter = container_of(work,
2302 struct igb_adapter, watchdog_task);
2303 struct e1000_hw *hw = &adapter->hw;
2304
2305 struct net_device *netdev = adapter->netdev;
2306 struct igb_ring *tx_ring = adapter->tx_ring;
2307 struct e1000_mac_info *mac = &adapter->hw.mac;
2308 u32 link;
Alexander Duyck7a6ea552008-08-26 04:25:03 -07002309 u32 eics = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08002310 s32 ret_val;
Alexander Duyck7a6ea552008-08-26 04:25:03 -07002311 int i;
Auke Kok9d5c8242008-01-24 02:22:38 -08002312
2313 if ((netif_carrier_ok(netdev)) &&
2314 (rd32(E1000_STATUS) & E1000_STATUS_LU))
2315 goto link_up;
2316
2317 ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2318 if ((ret_val == E1000_ERR_PHY) &&
2319 (hw->phy.type == e1000_phy_igp_3) &&
2320 (rd32(E1000_CTRL) &
2321 E1000_PHY_CTRL_GBE_DISABLE))
2322 dev_info(&adapter->pdev->dev,
2323 "Gigabit has been disabled, downgrading speed\n");
2324
2325 if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2326 !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2327 link = mac->serdes_has_link;
2328 else
2329 link = rd32(E1000_STATUS) &
2330 E1000_STATUS_LU;
2331
2332 if (link) {
2333 if (!netif_carrier_ok(netdev)) {
2334 u32 ctrl;
2335 hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2336 &adapter->link_speed,
2337 &adapter->link_duplex);
2338
2339 ctrl = rd32(E1000_CTRL);
2340 dev_info(&adapter->pdev->dev,
2341 "NIC Link is Up %d Mbps %s, "
2342 "Flow Control: %s\n",
2343 adapter->link_speed,
2344 adapter->link_duplex == FULL_DUPLEX ?
2345 "Full Duplex" : "Half Duplex",
2346 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2347 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2348 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2349 E1000_CTRL_TFCE) ? "TX" : "None")));
2350
2351 /* tweak tx_queue_len according to speed/duplex and
2352 * adjust the timeout factor */
2353 netdev->tx_queue_len = adapter->tx_queue_len;
2354 adapter->tx_timeout_factor = 1;
2355 switch (adapter->link_speed) {
2356 case SPEED_10:
2357 netdev->tx_queue_len = 10;
2358 adapter->tx_timeout_factor = 14;
2359 break;
2360 case SPEED_100:
2361 netdev->tx_queue_len = 100;
2362 /* maybe add some timeout factor ? */
2363 break;
2364 }
2365
2366 netif_carrier_on(netdev);
David S. Millerfd2ea0a2008-07-17 01:56:23 -07002367 netif_tx_wake_all_queues(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08002368
2369 if (!test_bit(__IGB_DOWN, &adapter->state))
2370 mod_timer(&adapter->phy_info_timer,
2371 round_jiffies(jiffies + 2 * HZ));
2372 }
2373 } else {
2374 if (netif_carrier_ok(netdev)) {
2375 adapter->link_speed = 0;
2376 adapter->link_duplex = 0;
2377 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2378 netif_carrier_off(netdev);
David S. Millerfd2ea0a2008-07-17 01:56:23 -07002379 netif_tx_stop_all_queues(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08002380 if (!test_bit(__IGB_DOWN, &adapter->state))
2381 mod_timer(&adapter->phy_info_timer,
2382 round_jiffies(jiffies + 2 * HZ));
2383 }
2384 }
2385
2386link_up:
2387 igb_update_stats(adapter);
2388
2389 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2390 adapter->tpt_old = adapter->stats.tpt;
2391 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2392 adapter->colc_old = adapter->stats.colc;
2393
2394 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2395 adapter->gorc_old = adapter->stats.gorc;
2396 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2397 adapter->gotc_old = adapter->stats.gotc;
2398
2399 igb_update_adaptive(&adapter->hw);
2400
2401 if (!netif_carrier_ok(netdev)) {
2402 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2403 /* We've lost link, so the controller stops DMA,
2404 * but we've got queued Tx work that's never going
2405 * to get done, so reset controller to flush Tx.
2406 * (Do the reset outside of interrupt context). */
2407 adapter->tx_timeout_count++;
2408 schedule_work(&adapter->reset_task);
2409 }
2410 }
2411
2412 /* Cause software interrupt to ensure rx ring is cleaned */
Alexander Duyck7a6ea552008-08-26 04:25:03 -07002413 if (adapter->msix_entries) {
2414 for (i = 0; i < adapter->num_rx_queues; i++)
2415 eics |= adapter->rx_ring[i].eims_value;
2416 wr32(E1000_EICS, eics);
2417 } else {
2418 wr32(E1000_ICS, E1000_ICS_RXDMT0);
2419 }
Auke Kok9d5c8242008-01-24 02:22:38 -08002420
2421 /* Force detection of hung controller every watchdog period */
2422 tx_ring->detect_tx_hung = true;
2423
2424 /* Reset the timer */
2425 if (!test_bit(__IGB_DOWN, &adapter->state))
2426 mod_timer(&adapter->watchdog_timer,
2427 round_jiffies(jiffies + 2 * HZ));
2428}
2429
2430enum latency_range {
2431 lowest_latency = 0,
2432 low_latency = 1,
2433 bulk_latency = 2,
2434 latency_invalid = 255
2435};
2436
2437
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002438/**
2439 * igb_update_ring_itr - update the dynamic ITR value based on packet size
2440 *
2441 * Stores a new ITR value based on strictly on packet size. This
2442 * algorithm is less sophisticated than that used in igb_update_itr,
2443 * due to the difficulty of synchronizing statistics across multiple
2444 * receive rings. The divisors and thresholds used by this fuction
2445 * were determined based on theoretical maximum wire speed and testing
2446 * data, in order to minimize response time while increasing bulk
2447 * throughput.
2448 * This functionality is controlled by the InterruptThrottleRate module
2449 * parameter (see igb_param.c)
2450 * NOTE: This function is called only when operating in a multiqueue
2451 * receive environment.
2452 * @rx_ring: pointer to ring
2453 **/
2454static void igb_update_ring_itr(struct igb_ring *rx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002455{
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002456 int new_val = rx_ring->itr_val;
2457 int avg_wire_size = 0;
2458 struct igb_adapter *adapter = rx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08002459
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002460 if (!rx_ring->total_packets)
2461 goto clear_counts; /* no packets, so don't do anything */
Auke Kok9d5c8242008-01-24 02:22:38 -08002462
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002463 /* For non-gigabit speeds, just fix the interrupt rate at 4000
2464 * ints/sec - ITR timer value of 120 ticks.
2465 */
2466 if (adapter->link_speed != SPEED_1000) {
2467 new_val = 120;
2468 goto set_itr_val;
2469 }
2470 avg_wire_size = rx_ring->total_bytes / rx_ring->total_packets;
2471
2472 /* Add 24 bytes to size to account for CRC, preamble, and gap */
2473 avg_wire_size += 24;
2474
2475 /* Don't starve jumbo frames */
2476 avg_wire_size = min(avg_wire_size, 3000);
2477
2478 /* Give a little boost to mid-size frames */
2479 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
2480 new_val = avg_wire_size / 3;
2481 else
2482 new_val = avg_wire_size / 2;
2483
2484set_itr_val:
Auke Kok9d5c8242008-01-24 02:22:38 -08002485 if (new_val != rx_ring->itr_val) {
2486 rx_ring->itr_val = new_val;
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002487 rx_ring->set_itr = 1;
Auke Kok9d5c8242008-01-24 02:22:38 -08002488 }
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002489clear_counts:
2490 rx_ring->total_bytes = 0;
2491 rx_ring->total_packets = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08002492}
2493
2494/**
2495 * igb_update_itr - update the dynamic ITR value based on statistics
2496 * Stores a new ITR value based on packets and byte
2497 * counts during the last interrupt. The advantage of per interrupt
2498 * computation is faster updates and more accurate ITR for the current
2499 * traffic pattern. Constants in this function were computed
2500 * based on theoretical maximum wire speed and thresholds were set based
2501 * on testing data as well as attempting to minimize response time
2502 * while increasing bulk throughput.
2503 * this functionality is controlled by the InterruptThrottleRate module
2504 * parameter (see igb_param.c)
2505 * NOTE: These calculations are only valid when operating in a single-
2506 * queue environment.
2507 * @adapter: pointer to adapter
2508 * @itr_setting: current adapter->itr
2509 * @packets: the number of packets during this measurement interval
2510 * @bytes: the number of bytes during this measurement interval
2511 **/
2512static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2513 int packets, int bytes)
2514{
2515 unsigned int retval = itr_setting;
2516
2517 if (packets == 0)
2518 goto update_itr_done;
2519
2520 switch (itr_setting) {
2521 case lowest_latency:
2522 /* handle TSO and jumbo frames */
2523 if (bytes/packets > 8000)
2524 retval = bulk_latency;
2525 else if ((packets < 5) && (bytes > 512))
2526 retval = low_latency;
2527 break;
2528 case low_latency: /* 50 usec aka 20000 ints/s */
2529 if (bytes > 10000) {
2530 /* this if handles the TSO accounting */
2531 if (bytes/packets > 8000) {
2532 retval = bulk_latency;
2533 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2534 retval = bulk_latency;
2535 } else if ((packets > 35)) {
2536 retval = lowest_latency;
2537 }
2538 } else if (bytes/packets > 2000) {
2539 retval = bulk_latency;
2540 } else if (packets <= 2 && bytes < 512) {
2541 retval = lowest_latency;
2542 }
2543 break;
2544 case bulk_latency: /* 250 usec aka 4000 ints/s */
2545 if (bytes > 25000) {
2546 if (packets > 35)
2547 retval = low_latency;
2548 } else if (bytes < 6000) {
2549 retval = low_latency;
2550 }
2551 break;
2552 }
2553
2554update_itr_done:
2555 return retval;
2556}
2557
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002558static void igb_set_itr(struct igb_adapter *adapter)
Auke Kok9d5c8242008-01-24 02:22:38 -08002559{
2560 u16 current_itr;
2561 u32 new_itr = adapter->itr;
2562
2563 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2564 if (adapter->link_speed != SPEED_1000) {
2565 current_itr = 0;
2566 new_itr = 4000;
2567 goto set_itr_now;
2568 }
2569
2570 adapter->rx_itr = igb_update_itr(adapter,
2571 adapter->rx_itr,
2572 adapter->rx_ring->total_packets,
2573 adapter->rx_ring->total_bytes);
Auke Kok9d5c8242008-01-24 02:22:38 -08002574
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002575 if (adapter->rx_ring->buddy) {
Auke Kok9d5c8242008-01-24 02:22:38 -08002576 adapter->tx_itr = igb_update_itr(adapter,
2577 adapter->tx_itr,
2578 adapter->tx_ring->total_packets,
2579 adapter->tx_ring->total_bytes);
Auke Kok9d5c8242008-01-24 02:22:38 -08002580
2581 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2582 } else {
2583 current_itr = adapter->rx_itr;
2584 }
2585
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002586 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2587 if (adapter->itr_setting == 3 &&
2588 current_itr == lowest_latency)
2589 current_itr = low_latency;
2590
Auke Kok9d5c8242008-01-24 02:22:38 -08002591 switch (current_itr) {
2592 /* counts and packets in update_itr are dependent on these numbers */
2593 case lowest_latency:
2594 new_itr = 70000;
2595 break;
2596 case low_latency:
2597 new_itr = 20000; /* aka hwitr = ~200 */
2598 break;
2599 case bulk_latency:
2600 new_itr = 4000;
2601 break;
2602 default:
2603 break;
2604 }
2605
2606set_itr_now:
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002607 adapter->rx_ring->total_bytes = 0;
2608 adapter->rx_ring->total_packets = 0;
2609 if (adapter->rx_ring->buddy) {
2610 adapter->rx_ring->buddy->total_bytes = 0;
2611 adapter->rx_ring->buddy->total_packets = 0;
2612 }
2613
Auke Kok9d5c8242008-01-24 02:22:38 -08002614 if (new_itr != adapter->itr) {
2615 /* this attempts to bias the interrupt rate towards Bulk
2616 * by adding intermediate steps when interrupt rate is
2617 * increasing */
2618 new_itr = new_itr > adapter->itr ?
2619 min(adapter->itr + (new_itr >> 2), new_itr) :
2620 new_itr;
2621 /* Don't write the value here; it resets the adapter's
2622 * internal timer, and causes us to delay far longer than
2623 * we should between interrupts. Instead, we write the ITR
2624 * value at the beginning of the next interrupt so the timing
2625 * ends up being correct.
2626 */
2627 adapter->itr = new_itr;
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002628 adapter->rx_ring->itr_val = 1000000000 / (new_itr * 256);
2629 adapter->rx_ring->set_itr = 1;
Auke Kok9d5c8242008-01-24 02:22:38 -08002630 }
2631
2632 return;
2633}
2634
2635
2636#define IGB_TX_FLAGS_CSUM 0x00000001
2637#define IGB_TX_FLAGS_VLAN 0x00000002
2638#define IGB_TX_FLAGS_TSO 0x00000004
2639#define IGB_TX_FLAGS_IPV4 0x00000008
2640#define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2641#define IGB_TX_FLAGS_VLAN_SHIFT 16
2642
2643static inline int igb_tso_adv(struct igb_adapter *adapter,
2644 struct igb_ring *tx_ring,
2645 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2646{
2647 struct e1000_adv_tx_context_desc *context_desc;
2648 unsigned int i;
2649 int err;
2650 struct igb_buffer *buffer_info;
2651 u32 info = 0, tu_cmd = 0;
2652 u32 mss_l4len_idx, l4len;
2653 *hdr_len = 0;
2654
2655 if (skb_header_cloned(skb)) {
2656 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2657 if (err)
2658 return err;
2659 }
2660
2661 l4len = tcp_hdrlen(skb);
2662 *hdr_len += l4len;
2663
2664 if (skb->protocol == htons(ETH_P_IP)) {
2665 struct iphdr *iph = ip_hdr(skb);
2666 iph->tot_len = 0;
2667 iph->check = 0;
2668 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2669 iph->daddr, 0,
2670 IPPROTO_TCP,
2671 0);
2672 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2673 ipv6_hdr(skb)->payload_len = 0;
2674 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2675 &ipv6_hdr(skb)->daddr,
2676 0, IPPROTO_TCP, 0);
2677 }
2678
2679 i = tx_ring->next_to_use;
2680
2681 buffer_info = &tx_ring->buffer_info[i];
2682 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2683 /* VLAN MACLEN IPLEN */
2684 if (tx_flags & IGB_TX_FLAGS_VLAN)
2685 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2686 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2687 *hdr_len += skb_network_offset(skb);
2688 info |= skb_network_header_len(skb);
2689 *hdr_len += skb_network_header_len(skb);
2690 context_desc->vlan_macip_lens = cpu_to_le32(info);
2691
2692 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2693 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2694
2695 if (skb->protocol == htons(ETH_P_IP))
2696 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2697 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2698
2699 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2700
2701 /* MSS L4LEN IDX */
2702 mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2703 mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2704
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07002705 /* Context index must be unique per ring. */
2706 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2707 mss_l4len_idx |= tx_ring->queue_index << 4;
Auke Kok9d5c8242008-01-24 02:22:38 -08002708
2709 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2710 context_desc->seqnum_seed = 0;
2711
2712 buffer_info->time_stamp = jiffies;
2713 buffer_info->dma = 0;
2714 i++;
2715 if (i == tx_ring->count)
2716 i = 0;
2717
2718 tx_ring->next_to_use = i;
2719
2720 return true;
2721}
2722
2723static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2724 struct igb_ring *tx_ring,
2725 struct sk_buff *skb, u32 tx_flags)
2726{
2727 struct e1000_adv_tx_context_desc *context_desc;
2728 unsigned int i;
2729 struct igb_buffer *buffer_info;
2730 u32 info = 0, tu_cmd = 0;
2731
2732 if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2733 (tx_flags & IGB_TX_FLAGS_VLAN)) {
2734 i = tx_ring->next_to_use;
2735 buffer_info = &tx_ring->buffer_info[i];
2736 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2737
2738 if (tx_flags & IGB_TX_FLAGS_VLAN)
2739 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2740 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2741 if (skb->ip_summed == CHECKSUM_PARTIAL)
2742 info |= skb_network_header_len(skb);
2743
2744 context_desc->vlan_macip_lens = cpu_to_le32(info);
2745
2746 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2747
2748 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Mitch Williams44b0cda2008-03-07 10:32:13 -08002749 switch (skb->protocol) {
2750 case __constant_htons(ETH_P_IP):
Auke Kok9d5c8242008-01-24 02:22:38 -08002751 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
Mitch Williams44b0cda2008-03-07 10:32:13 -08002752 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2753 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2754 break;
2755 case __constant_htons(ETH_P_IPV6):
2756 /* XXX what about other V6 headers?? */
2757 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2758 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2759 break;
2760 default:
2761 if (unlikely(net_ratelimit()))
2762 dev_warn(&adapter->pdev->dev,
2763 "partial checksum but proto=%x!\n",
2764 skb->protocol);
2765 break;
2766 }
Auke Kok9d5c8242008-01-24 02:22:38 -08002767 }
2768
2769 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2770 context_desc->seqnum_seed = 0;
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07002771 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2772 context_desc->mss_l4len_idx =
2773 cpu_to_le32(tx_ring->queue_index << 4);
Auke Kok9d5c8242008-01-24 02:22:38 -08002774
2775 buffer_info->time_stamp = jiffies;
2776 buffer_info->dma = 0;
2777
2778 i++;
2779 if (i == tx_ring->count)
2780 i = 0;
2781 tx_ring->next_to_use = i;
2782
2783 return true;
2784 }
2785
2786
2787 return false;
2788}
2789
2790#define IGB_MAX_TXD_PWR 16
2791#define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
2792
2793static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2794 struct igb_ring *tx_ring,
2795 struct sk_buff *skb)
2796{
2797 struct igb_buffer *buffer_info;
2798 unsigned int len = skb_headlen(skb);
2799 unsigned int count = 0, i;
2800 unsigned int f;
2801
2802 i = tx_ring->next_to_use;
2803
2804 buffer_info = &tx_ring->buffer_info[i];
2805 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2806 buffer_info->length = len;
2807 /* set time_stamp *before* dma to help avoid a possible race */
2808 buffer_info->time_stamp = jiffies;
2809 buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2810 PCI_DMA_TODEVICE);
2811 count++;
2812 i++;
2813 if (i == tx_ring->count)
2814 i = 0;
2815
2816 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2817 struct skb_frag_struct *frag;
2818
2819 frag = &skb_shinfo(skb)->frags[f];
2820 len = frag->size;
2821
2822 buffer_info = &tx_ring->buffer_info[i];
2823 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2824 buffer_info->length = len;
2825 buffer_info->time_stamp = jiffies;
2826 buffer_info->dma = pci_map_page(adapter->pdev,
2827 frag->page,
2828 frag->page_offset,
2829 len,
2830 PCI_DMA_TODEVICE);
2831
2832 count++;
2833 i++;
2834 if (i == tx_ring->count)
2835 i = 0;
2836 }
2837
2838 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2839 tx_ring->buffer_info[i].skb = skb;
2840
2841 return count;
2842}
2843
2844static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2845 struct igb_ring *tx_ring,
2846 int tx_flags, int count, u32 paylen,
2847 u8 hdr_len)
2848{
2849 union e1000_adv_tx_desc *tx_desc = NULL;
2850 struct igb_buffer *buffer_info;
2851 u32 olinfo_status = 0, cmd_type_len;
2852 unsigned int i;
2853
2854 cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2855 E1000_ADVTXD_DCMD_DEXT);
2856
2857 if (tx_flags & IGB_TX_FLAGS_VLAN)
2858 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2859
2860 if (tx_flags & IGB_TX_FLAGS_TSO) {
2861 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2862
2863 /* insert tcp checksum */
2864 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2865
2866 /* insert ip checksum */
2867 if (tx_flags & IGB_TX_FLAGS_IPV4)
2868 olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2869
2870 } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2871 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2872 }
2873
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07002874 if ((adapter->flags & IGB_FLAG_NEED_CTX_IDX) &&
2875 (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2876 IGB_TX_FLAGS_VLAN)))
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07002877 olinfo_status |= tx_ring->queue_index << 4;
Auke Kok9d5c8242008-01-24 02:22:38 -08002878
2879 olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2880
2881 i = tx_ring->next_to_use;
2882 while (count--) {
2883 buffer_info = &tx_ring->buffer_info[i];
2884 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2885 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2886 tx_desc->read.cmd_type_len =
2887 cpu_to_le32(cmd_type_len | buffer_info->length);
2888 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2889 i++;
2890 if (i == tx_ring->count)
2891 i = 0;
2892 }
2893
2894 tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2895 /* Force memory writes to complete before letting h/w
2896 * know there are new descriptors to fetch. (Only
2897 * applicable for weak-ordered memory model archs,
2898 * such as IA-64). */
2899 wmb();
2900
2901 tx_ring->next_to_use = i;
2902 writel(i, adapter->hw.hw_addr + tx_ring->tail);
2903 /* we need this if more than one processor can write to our tail
2904 * at a time, it syncronizes IO on IA64/Altix systems */
2905 mmiowb();
2906}
2907
2908static int __igb_maybe_stop_tx(struct net_device *netdev,
2909 struct igb_ring *tx_ring, int size)
2910{
2911 struct igb_adapter *adapter = netdev_priv(netdev);
2912
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07002913 netif_stop_subqueue(netdev, tx_ring->queue_index);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07002914
Auke Kok9d5c8242008-01-24 02:22:38 -08002915 /* Herbert's original patch had:
2916 * smp_mb__after_netif_stop_queue();
2917 * but since that doesn't exist yet, just open code it. */
2918 smp_mb();
2919
2920 /* We need to check again in a case another CPU has just
2921 * made room available. */
2922 if (IGB_DESC_UNUSED(tx_ring) < size)
2923 return -EBUSY;
2924
2925 /* A reprieve! */
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07002926 netif_wake_subqueue(netdev, tx_ring->queue_index);
Auke Kok9d5c8242008-01-24 02:22:38 -08002927 ++adapter->restart_queue;
2928 return 0;
2929}
2930
2931static int igb_maybe_stop_tx(struct net_device *netdev,
2932 struct igb_ring *tx_ring, int size)
2933{
2934 if (IGB_DESC_UNUSED(tx_ring) >= size)
2935 return 0;
2936 return __igb_maybe_stop_tx(netdev, tx_ring, size);
2937}
2938
2939#define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2940
2941static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2942 struct net_device *netdev,
2943 struct igb_ring *tx_ring)
2944{
2945 struct igb_adapter *adapter = netdev_priv(netdev);
2946 unsigned int tx_flags = 0;
2947 unsigned int len;
Auke Kok9d5c8242008-01-24 02:22:38 -08002948 u8 hdr_len = 0;
2949 int tso = 0;
2950
2951 len = skb_headlen(skb);
2952
2953 if (test_bit(__IGB_DOWN, &adapter->state)) {
2954 dev_kfree_skb_any(skb);
2955 return NETDEV_TX_OK;
2956 }
2957
2958 if (skb->len <= 0) {
2959 dev_kfree_skb_any(skb);
2960 return NETDEV_TX_OK;
2961 }
2962
Auke Kok9d5c8242008-01-24 02:22:38 -08002963 /* need: 1 descriptor per page,
2964 * + 2 desc gap to keep tail from touching head,
2965 * + 1 desc for skb->data,
2966 * + 1 desc for context descriptor,
2967 * otherwise try next time */
2968 if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2969 /* this is a hard error */
Auke Kok9d5c8242008-01-24 02:22:38 -08002970 return NETDEV_TX_BUSY;
2971 }
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002972 skb_orphan(skb);
Auke Kok9d5c8242008-01-24 02:22:38 -08002973
2974 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2975 tx_flags |= IGB_TX_FLAGS_VLAN;
2976 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2977 }
2978
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07002979 if (skb->protocol == htons(ETH_P_IP))
2980 tx_flags |= IGB_TX_FLAGS_IPV4;
2981
Auke Kok9d5c8242008-01-24 02:22:38 -08002982 tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2983 &hdr_len) : 0;
2984
2985 if (tso < 0) {
2986 dev_kfree_skb_any(skb);
Auke Kok9d5c8242008-01-24 02:22:38 -08002987 return NETDEV_TX_OK;
2988 }
2989
2990 if (tso)
2991 tx_flags |= IGB_TX_FLAGS_TSO;
2992 else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
2993 if (skb->ip_summed == CHECKSUM_PARTIAL)
2994 tx_flags |= IGB_TX_FLAGS_CSUM;
2995
Auke Kok9d5c8242008-01-24 02:22:38 -08002996 igb_tx_queue_adv(adapter, tx_ring, tx_flags,
2997 igb_tx_map_adv(adapter, tx_ring, skb),
2998 skb->len, hdr_len);
2999
3000 netdev->trans_start = jiffies;
3001
3002 /* Make sure there is space in the ring for the next send. */
3003 igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
3004
Auke Kok9d5c8242008-01-24 02:22:38 -08003005 return NETDEV_TX_OK;
3006}
3007
3008static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
3009{
3010 struct igb_adapter *adapter = netdev_priv(netdev);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003011 struct igb_ring *tx_ring;
3012
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003013 int r_idx = 0;
3014 r_idx = skb->queue_mapping & (IGB_MAX_TX_QUEUES - 1);
3015 tx_ring = adapter->multi_tx_table[r_idx];
Auke Kok9d5c8242008-01-24 02:22:38 -08003016
3017 /* This goes back to the question of how to logically map a tx queue
3018 * to a flow. Right now, performance is impacted slightly negatively
3019 * if using multiple tx queues. If the stack breaks away from a
3020 * single qdisc implementation, we can look at this again. */
3021 return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
3022}
3023
3024/**
3025 * igb_tx_timeout - Respond to a Tx Hang
3026 * @netdev: network interface device structure
3027 **/
3028static void igb_tx_timeout(struct net_device *netdev)
3029{
3030 struct igb_adapter *adapter = netdev_priv(netdev);
3031 struct e1000_hw *hw = &adapter->hw;
3032
3033 /* Do the reset outside of interrupt context */
3034 adapter->tx_timeout_count++;
3035 schedule_work(&adapter->reset_task);
3036 wr32(E1000_EICS, adapter->eims_enable_mask &
3037 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
3038}
3039
3040static void igb_reset_task(struct work_struct *work)
3041{
3042 struct igb_adapter *adapter;
3043 adapter = container_of(work, struct igb_adapter, reset_task);
3044
3045 igb_reinit_locked(adapter);
3046}
3047
3048/**
3049 * igb_get_stats - Get System Network Statistics
3050 * @netdev: network interface device structure
3051 *
3052 * Returns the address of the device statistics structure.
3053 * The statistics are actually updated from the timer callback.
3054 **/
3055static struct net_device_stats *
3056igb_get_stats(struct net_device *netdev)
3057{
3058 struct igb_adapter *adapter = netdev_priv(netdev);
3059
3060 /* only return the current stats */
3061 return &adapter->net_stats;
3062}
3063
3064/**
3065 * igb_change_mtu - Change the Maximum Transfer Unit
3066 * @netdev: network interface device structure
3067 * @new_mtu: new value for maximum frame size
3068 *
3069 * Returns 0 on success, negative on failure
3070 **/
3071static int igb_change_mtu(struct net_device *netdev, int new_mtu)
3072{
3073 struct igb_adapter *adapter = netdev_priv(netdev);
3074 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3075
3076 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
3077 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3078 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
3079 return -EINVAL;
3080 }
3081
3082#define MAX_STD_JUMBO_FRAME_SIZE 9234
3083 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3084 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
3085 return -EINVAL;
3086 }
3087
3088 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
3089 msleep(1);
3090 /* igb_down has a dependency on max_frame_size */
3091 adapter->max_frame_size = max_frame;
3092 if (netif_running(netdev))
3093 igb_down(adapter);
3094
3095 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3096 * means we reserve 2 more, this pushes us to allocate from the next
3097 * larger slab size.
3098 * i.e. RXBUFFER_2048 --> size-4096 slab
3099 */
3100
3101 if (max_frame <= IGB_RXBUFFER_256)
3102 adapter->rx_buffer_len = IGB_RXBUFFER_256;
3103 else if (max_frame <= IGB_RXBUFFER_512)
3104 adapter->rx_buffer_len = IGB_RXBUFFER_512;
3105 else if (max_frame <= IGB_RXBUFFER_1024)
3106 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
3107 else if (max_frame <= IGB_RXBUFFER_2048)
3108 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
3109 else
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07003110#if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3111 adapter->rx_buffer_len = IGB_RXBUFFER_16384;
3112#else
3113 adapter->rx_buffer_len = PAGE_SIZE / 2;
3114#endif
Auke Kok9d5c8242008-01-24 02:22:38 -08003115 /* adjust allocation if LPE protects us, and we aren't using SBP */
3116 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
3117 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
3118 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3119
3120 dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
3121 netdev->mtu, new_mtu);
3122 netdev->mtu = new_mtu;
3123
3124 if (netif_running(netdev))
3125 igb_up(adapter);
3126 else
3127 igb_reset(adapter);
3128
3129 clear_bit(__IGB_RESETTING, &adapter->state);
3130
3131 return 0;
3132}
3133
3134/**
3135 * igb_update_stats - Update the board statistics counters
3136 * @adapter: board private structure
3137 **/
3138
3139void igb_update_stats(struct igb_adapter *adapter)
3140{
3141 struct e1000_hw *hw = &adapter->hw;
3142 struct pci_dev *pdev = adapter->pdev;
3143 u16 phy_tmp;
3144
3145#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3146
3147 /*
3148 * Prevent stats update while adapter is being reset, or if the pci
3149 * connection is down.
3150 */
3151 if (adapter->link_speed == 0)
3152 return;
3153 if (pci_channel_offline(pdev))
3154 return;
3155
3156 adapter->stats.crcerrs += rd32(E1000_CRCERRS);
3157 adapter->stats.gprc += rd32(E1000_GPRC);
3158 adapter->stats.gorc += rd32(E1000_GORCL);
3159 rd32(E1000_GORCH); /* clear GORCL */
3160 adapter->stats.bprc += rd32(E1000_BPRC);
3161 adapter->stats.mprc += rd32(E1000_MPRC);
3162 adapter->stats.roc += rd32(E1000_ROC);
3163
3164 adapter->stats.prc64 += rd32(E1000_PRC64);
3165 adapter->stats.prc127 += rd32(E1000_PRC127);
3166 adapter->stats.prc255 += rd32(E1000_PRC255);
3167 adapter->stats.prc511 += rd32(E1000_PRC511);
3168 adapter->stats.prc1023 += rd32(E1000_PRC1023);
3169 adapter->stats.prc1522 += rd32(E1000_PRC1522);
3170 adapter->stats.symerrs += rd32(E1000_SYMERRS);
3171 adapter->stats.sec += rd32(E1000_SEC);
3172
3173 adapter->stats.mpc += rd32(E1000_MPC);
3174 adapter->stats.scc += rd32(E1000_SCC);
3175 adapter->stats.ecol += rd32(E1000_ECOL);
3176 adapter->stats.mcc += rd32(E1000_MCC);
3177 adapter->stats.latecol += rd32(E1000_LATECOL);
3178 adapter->stats.dc += rd32(E1000_DC);
3179 adapter->stats.rlec += rd32(E1000_RLEC);
3180 adapter->stats.xonrxc += rd32(E1000_XONRXC);
3181 adapter->stats.xontxc += rd32(E1000_XONTXC);
3182 adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
3183 adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
3184 adapter->stats.fcruc += rd32(E1000_FCRUC);
3185 adapter->stats.gptc += rd32(E1000_GPTC);
3186 adapter->stats.gotc += rd32(E1000_GOTCL);
3187 rd32(E1000_GOTCH); /* clear GOTCL */
3188 adapter->stats.rnbc += rd32(E1000_RNBC);
3189 adapter->stats.ruc += rd32(E1000_RUC);
3190 adapter->stats.rfc += rd32(E1000_RFC);
3191 adapter->stats.rjc += rd32(E1000_RJC);
3192 adapter->stats.tor += rd32(E1000_TORH);
3193 adapter->stats.tot += rd32(E1000_TOTH);
3194 adapter->stats.tpr += rd32(E1000_TPR);
3195
3196 adapter->stats.ptc64 += rd32(E1000_PTC64);
3197 adapter->stats.ptc127 += rd32(E1000_PTC127);
3198 adapter->stats.ptc255 += rd32(E1000_PTC255);
3199 adapter->stats.ptc511 += rd32(E1000_PTC511);
3200 adapter->stats.ptc1023 += rd32(E1000_PTC1023);
3201 adapter->stats.ptc1522 += rd32(E1000_PTC1522);
3202
3203 adapter->stats.mptc += rd32(E1000_MPTC);
3204 adapter->stats.bptc += rd32(E1000_BPTC);
3205
3206 /* used for adaptive IFS */
3207
3208 hw->mac.tx_packet_delta = rd32(E1000_TPT);
3209 adapter->stats.tpt += hw->mac.tx_packet_delta;
3210 hw->mac.collision_delta = rd32(E1000_COLC);
3211 adapter->stats.colc += hw->mac.collision_delta;
3212
3213 adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
3214 adapter->stats.rxerrc += rd32(E1000_RXERRC);
3215 adapter->stats.tncrs += rd32(E1000_TNCRS);
3216 adapter->stats.tsctc += rd32(E1000_TSCTC);
3217 adapter->stats.tsctfc += rd32(E1000_TSCTFC);
3218
3219 adapter->stats.iac += rd32(E1000_IAC);
3220 adapter->stats.icrxoc += rd32(E1000_ICRXOC);
3221 adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
3222 adapter->stats.icrxatc += rd32(E1000_ICRXATC);
3223 adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
3224 adapter->stats.ictxatc += rd32(E1000_ICTXATC);
3225 adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
3226 adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
3227 adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
3228
3229 /* Fill out the OS statistics structure */
3230 adapter->net_stats.multicast = adapter->stats.mprc;
3231 adapter->net_stats.collisions = adapter->stats.colc;
3232
3233 /* Rx Errors */
3234
3235 /* RLEC on some newer hardware can be incorrect so build
3236 * our own version based on RUC and ROC */
3237 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3238 adapter->stats.crcerrs + adapter->stats.algnerrc +
3239 adapter->stats.ruc + adapter->stats.roc +
3240 adapter->stats.cexterr;
3241 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3242 adapter->stats.roc;
3243 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3244 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3245 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3246
3247 /* Tx Errors */
3248 adapter->net_stats.tx_errors = adapter->stats.ecol +
3249 adapter->stats.latecol;
3250 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3251 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3252 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3253
3254 /* Tx Dropped needs to be maintained elsewhere */
3255
3256 /* Phy Stats */
3257 if (hw->phy.media_type == e1000_media_type_copper) {
3258 if ((adapter->link_speed == SPEED_1000) &&
3259 (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS,
3260 &phy_tmp))) {
3261 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3262 adapter->phy_stats.idle_errors += phy_tmp;
3263 }
3264 }
3265
3266 /* Management Stats */
3267 adapter->stats.mgptc += rd32(E1000_MGTPTC);
3268 adapter->stats.mgprc += rd32(E1000_MGTPRC);
3269 adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3270}
3271
3272
3273static irqreturn_t igb_msix_other(int irq, void *data)
3274{
3275 struct net_device *netdev = data;
3276 struct igb_adapter *adapter = netdev_priv(netdev);
3277 struct e1000_hw *hw = &adapter->hw;
PJ Waskiewicz844290e2008-06-27 11:00:39 -07003278 u32 icr = rd32(E1000_ICR);
Auke Kok9d5c8242008-01-24 02:22:38 -08003279
PJ Waskiewicz844290e2008-06-27 11:00:39 -07003280 /* reading ICR causes bit 31 of EICR to be cleared */
3281 if (!(icr & E1000_ICR_LSC))
3282 goto no_link_interrupt;
3283 hw->mac.get_link_status = 1;
3284 /* guard against interrupt when we're going down */
3285 if (!test_bit(__IGB_DOWN, &adapter->state))
3286 mod_timer(&adapter->watchdog_timer, jiffies + 1);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003287
Auke Kok9d5c8242008-01-24 02:22:38 -08003288no_link_interrupt:
3289 wr32(E1000_IMS, E1000_IMS_LSC);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07003290 wr32(E1000_EIMS, adapter->eims_other);
Auke Kok9d5c8242008-01-24 02:22:38 -08003291
3292 return IRQ_HANDLED;
3293}
3294
3295static irqreturn_t igb_msix_tx(int irq, void *data)
3296{
3297 struct igb_ring *tx_ring = data;
3298 struct igb_adapter *adapter = tx_ring->adapter;
3299 struct e1000_hw *hw = &adapter->hw;
3300
Jeff Kirsher421e02f2008-10-17 11:08:31 -07003301#ifdef CONFIG_IGB_DCA
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003302 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003303 igb_update_tx_dca(tx_ring);
3304#endif
Auke Kok9d5c8242008-01-24 02:22:38 -08003305 tx_ring->total_bytes = 0;
3306 tx_ring->total_packets = 0;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003307
3308 /* auto mask will automatically reenable the interrupt when we write
3309 * EICS */
Mitch Williams3b644cf2008-06-27 10:59:48 -07003310 if (!igb_clean_tx_irq(tx_ring))
Auke Kok9d5c8242008-01-24 02:22:38 -08003311 /* Ring was not completely cleaned, so fire another interrupt */
3312 wr32(E1000_EICS, tx_ring->eims_value);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003313 else
Auke Kok9d5c8242008-01-24 02:22:38 -08003314 wr32(E1000_EIMS, tx_ring->eims_value);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003315
Auke Kok9d5c8242008-01-24 02:22:38 -08003316 return IRQ_HANDLED;
3317}
3318
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003319static void igb_write_itr(struct igb_ring *ring)
3320{
3321 struct e1000_hw *hw = &ring->adapter->hw;
3322 if ((ring->adapter->itr_setting & 3) && ring->set_itr) {
3323 switch (hw->mac.type) {
3324 case e1000_82576:
3325 wr32(ring->itr_register,
3326 ring->itr_val |
3327 0x80000000);
3328 break;
3329 default:
3330 wr32(ring->itr_register,
3331 ring->itr_val |
3332 (ring->itr_val << 16));
3333 break;
3334 }
3335 ring->set_itr = 0;
3336 }
3337}
3338
Auke Kok9d5c8242008-01-24 02:22:38 -08003339static irqreturn_t igb_msix_rx(int irq, void *data)
3340{
3341 struct igb_ring *rx_ring = data;
3342 struct igb_adapter *adapter = rx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08003343
PJ Waskiewicz844290e2008-06-27 11:00:39 -07003344 /* Write the ITR value calculated at the end of the
3345 * previous interrupt.
3346 */
Auke Kok9d5c8242008-01-24 02:22:38 -08003347
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003348 igb_write_itr(rx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08003349
PJ Waskiewicz844290e2008-06-27 11:00:39 -07003350 if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi))
3351 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3352
Jeff Kirsher421e02f2008-10-17 11:08:31 -07003353#ifdef CONFIG_IGB_DCA
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003354 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003355 igb_update_rx_dca(rx_ring);
3356#endif
3357 return IRQ_HANDLED;
Auke Kok9d5c8242008-01-24 02:22:38 -08003358}
3359
Jeff Kirsher421e02f2008-10-17 11:08:31 -07003360#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003361static void igb_update_rx_dca(struct igb_ring *rx_ring)
3362{
3363 u32 dca_rxctrl;
3364 struct igb_adapter *adapter = rx_ring->adapter;
3365 struct e1000_hw *hw = &adapter->hw;
3366 int cpu = get_cpu();
3367 int q = rx_ring - adapter->rx_ring;
3368
3369 if (rx_ring->cpu != cpu) {
3370 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
Alexander Duyck2d064c02008-07-08 15:10:12 -07003371 if (hw->mac.type == e1000_82576) {
3372 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
3373 dca_rxctrl |= dca_get_tag(cpu) <<
3374 E1000_DCA_RXCTRL_CPUID_SHIFT;
3375 } else {
3376 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
3377 dca_rxctrl |= dca_get_tag(cpu);
3378 }
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003379 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
3380 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
3381 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
3382 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
3383 rx_ring->cpu = cpu;
3384 }
3385 put_cpu();
3386}
3387
3388static void igb_update_tx_dca(struct igb_ring *tx_ring)
3389{
3390 u32 dca_txctrl;
3391 struct igb_adapter *adapter = tx_ring->adapter;
3392 struct e1000_hw *hw = &adapter->hw;
3393 int cpu = get_cpu();
3394 int q = tx_ring - adapter->tx_ring;
3395
3396 if (tx_ring->cpu != cpu) {
3397 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
Alexander Duyck2d064c02008-07-08 15:10:12 -07003398 if (hw->mac.type == e1000_82576) {
3399 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
3400 dca_txctrl |= dca_get_tag(cpu) <<
3401 E1000_DCA_TXCTRL_CPUID_SHIFT;
3402 } else {
3403 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
3404 dca_txctrl |= dca_get_tag(cpu);
3405 }
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003406 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
3407 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
3408 tx_ring->cpu = cpu;
3409 }
3410 put_cpu();
3411}
3412
3413static void igb_setup_dca(struct igb_adapter *adapter)
3414{
3415 int i;
3416
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003417 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003418 return;
3419
3420 for (i = 0; i < adapter->num_tx_queues; i++) {
3421 adapter->tx_ring[i].cpu = -1;
3422 igb_update_tx_dca(&adapter->tx_ring[i]);
3423 }
3424 for (i = 0; i < adapter->num_rx_queues; i++) {
3425 adapter->rx_ring[i].cpu = -1;
3426 igb_update_rx_dca(&adapter->rx_ring[i]);
3427 }
3428}
3429
3430static int __igb_notify_dca(struct device *dev, void *data)
3431{
3432 struct net_device *netdev = dev_get_drvdata(dev);
3433 struct igb_adapter *adapter = netdev_priv(netdev);
3434 struct e1000_hw *hw = &adapter->hw;
3435 unsigned long event = *(unsigned long *)data;
3436
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003437 if (!(adapter->flags & IGB_FLAG_HAS_DCA))
3438 goto out;
3439
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003440 switch (event) {
3441 case DCA_PROVIDER_ADD:
3442 /* if already enabled, don't do it again */
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003443 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003444 break;
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003445 adapter->flags |= IGB_FLAG_DCA_ENABLED;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003446 /* Always use CB2 mode, difference is masked
3447 * in the CB driver. */
3448 wr32(E1000_DCA_CTRL, 2);
3449 if (dca_add_requester(dev) == 0) {
3450 dev_info(&adapter->pdev->dev, "DCA enabled\n");
3451 igb_setup_dca(adapter);
3452 break;
3453 }
3454 /* Fall Through since DCA is disabled. */
3455 case DCA_PROVIDER_REMOVE:
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003456 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003457 /* without this a class_device is left
3458 * hanging around in the sysfs model */
3459 dca_remove_requester(dev);
3460 dev_info(&adapter->pdev->dev, "DCA disabled\n");
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003461 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003462 wr32(E1000_DCA_CTRL, 1);
3463 }
3464 break;
3465 }
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003466out:
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003467 return 0;
3468}
3469
3470static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
3471 void *p)
3472{
3473 int ret_val;
3474
3475 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
3476 __igb_notify_dca);
3477
3478 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3479}
Jeff Kirsher421e02f2008-10-17 11:08:31 -07003480#endif /* CONFIG_IGB_DCA */
Auke Kok9d5c8242008-01-24 02:22:38 -08003481
3482/**
3483 * igb_intr_msi - Interrupt Handler
3484 * @irq: interrupt number
3485 * @data: pointer to a network interface device structure
3486 **/
3487static irqreturn_t igb_intr_msi(int irq, void *data)
3488{
3489 struct net_device *netdev = data;
3490 struct igb_adapter *adapter = netdev_priv(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08003491 struct e1000_hw *hw = &adapter->hw;
3492 /* read ICR disables interrupts using IAM */
3493 u32 icr = rd32(E1000_ICR);
3494
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003495 igb_write_itr(adapter->rx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08003496
Auke Kok9d5c8242008-01-24 02:22:38 -08003497 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3498 hw->mac.get_link_status = 1;
3499 if (!test_bit(__IGB_DOWN, &adapter->state))
3500 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3501 }
3502
PJ Waskiewicz844290e2008-06-27 11:00:39 -07003503 netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
Auke Kok9d5c8242008-01-24 02:22:38 -08003504
3505 return IRQ_HANDLED;
3506}
3507
3508/**
3509 * igb_intr - Interrupt Handler
3510 * @irq: interrupt number
3511 * @data: pointer to a network interface device structure
3512 **/
3513static irqreturn_t igb_intr(int irq, void *data)
3514{
3515 struct net_device *netdev = data;
3516 struct igb_adapter *adapter = netdev_priv(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08003517 struct e1000_hw *hw = &adapter->hw;
3518 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3519 * need for the IMC write */
3520 u32 icr = rd32(E1000_ICR);
3521 u32 eicr = 0;
3522 if (!icr)
3523 return IRQ_NONE; /* Not our interrupt */
3524
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003525 igb_write_itr(adapter->rx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08003526
3527 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3528 * not set, then the adapter didn't send an interrupt */
3529 if (!(icr & E1000_ICR_INT_ASSERTED))
3530 return IRQ_NONE;
3531
3532 eicr = rd32(E1000_EICR);
3533
3534 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3535 hw->mac.get_link_status = 1;
3536 /* guard against interrupt when we're going down */
3537 if (!test_bit(__IGB_DOWN, &adapter->state))
3538 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3539 }
3540
PJ Waskiewicz844290e2008-06-27 11:00:39 -07003541 netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
Auke Kok9d5c8242008-01-24 02:22:38 -08003542
3543 return IRQ_HANDLED;
3544}
3545
3546/**
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003547 * igb_poll - NAPI Rx polling callback
3548 * @napi: napi polling structure
3549 * @budget: count of how many packets we should handle
Auke Kok9d5c8242008-01-24 02:22:38 -08003550 **/
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003551static int igb_poll(struct napi_struct *napi, int budget)
Auke Kok9d5c8242008-01-24 02:22:38 -08003552{
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003553 struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3554 struct igb_adapter *adapter = rx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08003555 struct net_device *netdev = adapter->netdev;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003556 int tx_clean_complete, work_done = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08003557
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003558 /* this poll routine only supports one tx and one rx queue */
Jeff Kirsher421e02f2008-10-17 11:08:31 -07003559#ifdef CONFIG_IGB_DCA
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003560 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003561 igb_update_tx_dca(&adapter->tx_ring[0]);
3562#endif
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003563 tx_clean_complete = igb_clean_tx_irq(&adapter->tx_ring[0]);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003564
Jeff Kirsher421e02f2008-10-17 11:08:31 -07003565#ifdef CONFIG_IGB_DCA
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003566 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003567 igb_update_rx_dca(&adapter->rx_ring[0]);
3568#endif
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003569 igb_clean_rx_irq_adv(&adapter->rx_ring[0], &work_done, budget);
Auke Kok9d5c8242008-01-24 02:22:38 -08003570
3571 /* If no Tx and not enough Rx work done, exit the polling mode */
3572 if ((tx_clean_complete && (work_done < budget)) ||
3573 !netif_running(netdev)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08003574 if (adapter->itr_setting & 3)
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003575 igb_set_itr(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08003576 netif_rx_complete(netdev, napi);
3577 if (!test_bit(__IGB_DOWN, &adapter->state))
3578 igb_irq_enable(adapter);
3579 return 0;
3580 }
3581
3582 return 1;
3583}
3584
3585static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3586{
3587 struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3588 struct igb_adapter *adapter = rx_ring->adapter;
3589 struct e1000_hw *hw = &adapter->hw;
3590 struct net_device *netdev = adapter->netdev;
3591 int work_done = 0;
3592
Jeff Kirsher421e02f2008-10-17 11:08:31 -07003593#ifdef CONFIG_IGB_DCA
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003594 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003595 igb_update_rx_dca(rx_ring);
3596#endif
Mitch Williams3b644cf2008-06-27 10:59:48 -07003597 igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
Auke Kok9d5c8242008-01-24 02:22:38 -08003598
3599
3600 /* If not enough Rx work done, exit the polling mode */
3601 if ((work_done == 0) || !netif_running(netdev)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08003602 netif_rx_complete(netdev, napi);
3603
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003604 if (adapter->itr_setting & 3) {
3605 if (adapter->num_rx_queues == 1)
3606 igb_set_itr(adapter);
3607 else
3608 igb_update_ring_itr(rx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08003609 }
PJ Waskiewicz844290e2008-06-27 11:00:39 -07003610
3611 if (!test_bit(__IGB_DOWN, &adapter->state))
3612 wr32(E1000_EIMS, rx_ring->eims_value);
3613
Auke Kok9d5c8242008-01-24 02:22:38 -08003614 return 0;
3615 }
3616
3617 return 1;
3618}
Al Viro6d8126f2008-03-16 22:23:24 +00003619
3620static inline u32 get_head(struct igb_ring *tx_ring)
3621{
3622 void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
3623 return le32_to_cpu(*(volatile __le32 *)end);
3624}
3625
Auke Kok9d5c8242008-01-24 02:22:38 -08003626/**
3627 * igb_clean_tx_irq - Reclaim resources after transmit completes
3628 * @adapter: board private structure
3629 * returns true if ring is completely cleaned
3630 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07003631static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08003632{
Mitch Williams3b644cf2008-06-27 10:59:48 -07003633 struct igb_adapter *adapter = tx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08003634 struct e1000_hw *hw = &adapter->hw;
Mitch Williams3b644cf2008-06-27 10:59:48 -07003635 struct net_device *netdev = adapter->netdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08003636 struct e1000_tx_desc *tx_desc;
3637 struct igb_buffer *buffer_info;
3638 struct sk_buff *skb;
3639 unsigned int i;
3640 u32 head, oldhead;
3641 unsigned int count = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08003642 unsigned int total_bytes = 0, total_packets = 0;
Alexander Duyckfc7d3452008-08-26 04:25:08 -07003643 bool retval = true;
Auke Kok9d5c8242008-01-24 02:22:38 -08003644
3645 rmb();
Al Viro6d8126f2008-03-16 22:23:24 +00003646 head = get_head(tx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08003647 i = tx_ring->next_to_clean;
3648 while (1) {
3649 while (i != head) {
Auke Kok9d5c8242008-01-24 02:22:38 -08003650 tx_desc = E1000_TX_DESC(*tx_ring, i);
3651 buffer_info = &tx_ring->buffer_info[i];
3652 skb = buffer_info->skb;
3653
3654 if (skb) {
3655 unsigned int segs, bytecount;
3656 /* gso_segs is currently only valid for tcp */
3657 segs = skb_shinfo(skb)->gso_segs ?: 1;
3658 /* multiply data chunks by size of headers */
3659 bytecount = ((segs - 1) * skb_headlen(skb)) +
3660 skb->len;
3661 total_packets += segs;
3662 total_bytes += bytecount;
3663 }
3664
3665 igb_unmap_and_free_tx_resource(adapter, buffer_info);
Auke Kok9d5c8242008-01-24 02:22:38 -08003666
3667 i++;
3668 if (i == tx_ring->count)
3669 i = 0;
3670
3671 count++;
3672 if (count == IGB_MAX_TX_CLEAN) {
3673 retval = false;
3674 goto done_cleaning;
3675 }
3676 }
3677 oldhead = head;
3678 rmb();
Al Viro6d8126f2008-03-16 22:23:24 +00003679 head = get_head(tx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08003680 if (head == oldhead)
3681 goto done_cleaning;
3682 } /* while (1) */
3683
3684done_cleaning:
3685 tx_ring->next_to_clean = i;
3686
Alexander Duyckfc7d3452008-08-26 04:25:08 -07003687 if (unlikely(count &&
Auke Kok9d5c8242008-01-24 02:22:38 -08003688 netif_carrier_ok(netdev) &&
3689 IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3690 /* Make sure that anybody stopping the queue after this
3691 * sees the new next_to_clean.
3692 */
3693 smp_mb();
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003694 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
3695 !(test_bit(__IGB_DOWN, &adapter->state))) {
3696 netif_wake_subqueue(netdev, tx_ring->queue_index);
3697 ++adapter->restart_queue;
3698 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003699 }
3700
3701 if (tx_ring->detect_tx_hung) {
3702 /* Detect a transmit hang in hardware, this serializes the
3703 * check with the clearing of time_stamp and movement of i */
3704 tx_ring->detect_tx_hung = false;
3705 if (tx_ring->buffer_info[i].time_stamp &&
3706 time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3707 (adapter->tx_timeout_factor * HZ))
3708 && !(rd32(E1000_STATUS) &
3709 E1000_STATUS_TXOFF)) {
3710
3711 tx_desc = E1000_TX_DESC(*tx_ring, i);
3712 /* detected Tx unit hang */
3713 dev_err(&adapter->pdev->dev,
3714 "Detected Tx Unit Hang\n"
Alexander Duyck2d064c02008-07-08 15:10:12 -07003715 " Tx Queue <%d>\n"
Auke Kok9d5c8242008-01-24 02:22:38 -08003716 " TDH <%x>\n"
3717 " TDT <%x>\n"
3718 " next_to_use <%x>\n"
3719 " next_to_clean <%x>\n"
3720 " head (WB) <%x>\n"
3721 "buffer_info[next_to_clean]\n"
3722 " time_stamp <%lx>\n"
3723 " jiffies <%lx>\n"
3724 " desc.status <%x>\n",
Alexander Duyck2d064c02008-07-08 15:10:12 -07003725 tx_ring->queue_index,
Auke Kok9d5c8242008-01-24 02:22:38 -08003726 readl(adapter->hw.hw_addr + tx_ring->head),
3727 readl(adapter->hw.hw_addr + tx_ring->tail),
3728 tx_ring->next_to_use,
3729 tx_ring->next_to_clean,
3730 head,
3731 tx_ring->buffer_info[i].time_stamp,
3732 jiffies,
3733 tx_desc->upper.fields.status);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003734 netif_stop_subqueue(netdev, tx_ring->queue_index);
Auke Kok9d5c8242008-01-24 02:22:38 -08003735 }
3736 }
3737 tx_ring->total_bytes += total_bytes;
3738 tx_ring->total_packets += total_packets;
Alexander Duycke21ed352008-07-08 15:07:24 -07003739 tx_ring->tx_stats.bytes += total_bytes;
3740 tx_ring->tx_stats.packets += total_packets;
Auke Kok9d5c8242008-01-24 02:22:38 -08003741 adapter->net_stats.tx_bytes += total_bytes;
3742 adapter->net_stats.tx_packets += total_packets;
3743 return retval;
3744}
3745
Alexander Duyckd3352522008-07-08 15:12:13 -07003746#ifdef CONFIG_IGB_LRO
3747 /**
3748 * igb_get_skb_hdr - helper function for LRO header processing
3749 * @skb: pointer to sk_buff to be added to LRO packet
3750 * @iphdr: pointer to ip header structure
3751 * @tcph: pointer to tcp header structure
3752 * @hdr_flags: pointer to header flags
3753 * @priv: pointer to the receive descriptor for the current sk_buff
3754 **/
3755static int igb_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
3756 u64 *hdr_flags, void *priv)
3757{
3758 union e1000_adv_rx_desc *rx_desc = priv;
3759 u16 pkt_type = rx_desc->wb.lower.lo_dword.pkt_info &
3760 (E1000_RXDADV_PKTTYPE_IPV4 | E1000_RXDADV_PKTTYPE_TCP);
3761
3762 /* Verify that this is a valid IPv4 TCP packet */
3763 if (pkt_type != (E1000_RXDADV_PKTTYPE_IPV4 |
3764 E1000_RXDADV_PKTTYPE_TCP))
3765 return -1;
3766
3767 /* Set network headers */
3768 skb_reset_network_header(skb);
3769 skb_set_transport_header(skb, ip_hdrlen(skb));
3770 *iphdr = ip_hdr(skb);
3771 *tcph = tcp_hdr(skb);
3772 *hdr_flags = LRO_IPV4 | LRO_TCP;
3773
3774 return 0;
3775
3776}
3777#endif /* CONFIG_IGB_LRO */
Auke Kok9d5c8242008-01-24 02:22:38 -08003778
3779/**
3780 * igb_receive_skb - helper function to handle rx indications
Alexander Duyckd3352522008-07-08 15:12:13 -07003781 * @ring: pointer to receive ring receving this packet
Auke Kok9d5c8242008-01-24 02:22:38 -08003782 * @status: descriptor status field as written by hardware
3783 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3784 * @skb: pointer to sk_buff to be indicated to stack
3785 **/
Alexander Duyckd3352522008-07-08 15:12:13 -07003786static void igb_receive_skb(struct igb_ring *ring, u8 status,
3787 union e1000_adv_rx_desc * rx_desc,
3788 struct sk_buff *skb)
Auke Kok9d5c8242008-01-24 02:22:38 -08003789{
Alexander Duyckd3352522008-07-08 15:12:13 -07003790 struct igb_adapter * adapter = ring->adapter;
3791 bool vlan_extracted = (adapter->vlgrp && (status & E1000_RXD_STAT_VP));
3792
3793#ifdef CONFIG_IGB_LRO
3794 if (adapter->netdev->features & NETIF_F_LRO &&
3795 skb->ip_summed == CHECKSUM_UNNECESSARY) {
3796 if (vlan_extracted)
3797 lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
3798 adapter->vlgrp,
3799 le16_to_cpu(rx_desc->wb.upper.vlan),
3800 rx_desc);
3801 else
3802 lro_receive_skb(&ring->lro_mgr,skb, rx_desc);
3803 ring->lro_used = 1;
3804 } else {
3805#endif
3806 if (vlan_extracted)
3807 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3808 le16_to_cpu(rx_desc->wb.upper.vlan));
3809 else
3810
3811 netif_receive_skb(skb);
3812#ifdef CONFIG_IGB_LRO
3813 }
3814#endif
Auke Kok9d5c8242008-01-24 02:22:38 -08003815}
3816
3817
3818static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3819 u32 status_err, struct sk_buff *skb)
3820{
3821 skb->ip_summed = CHECKSUM_NONE;
3822
3823 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3824 if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3825 return;
3826 /* TCP/UDP checksum error bit is set */
3827 if (status_err &
3828 (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3829 /* let the stack verify checksum errors */
3830 adapter->hw_csum_err++;
3831 return;
3832 }
3833 /* It must be a TCP or UDP packet with a valid checksum */
3834 if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3835 skb->ip_summed = CHECKSUM_UNNECESSARY;
3836
3837 adapter->hw_csum_good++;
3838}
3839
Mitch Williams3b644cf2008-06-27 10:59:48 -07003840static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
3841 int *work_done, int budget)
Auke Kok9d5c8242008-01-24 02:22:38 -08003842{
Mitch Williams3b644cf2008-06-27 10:59:48 -07003843 struct igb_adapter *adapter = rx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08003844 struct net_device *netdev = adapter->netdev;
3845 struct pci_dev *pdev = adapter->pdev;
3846 union e1000_adv_rx_desc *rx_desc , *next_rxd;
3847 struct igb_buffer *buffer_info , *next_buffer;
3848 struct sk_buff *skb;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07003849 unsigned int i;
Auke Kok9d5c8242008-01-24 02:22:38 -08003850 u32 length, hlen, staterr;
3851 bool cleaned = false;
3852 int cleaned_count = 0;
3853 unsigned int total_bytes = 0, total_packets = 0;
3854
3855 i = rx_ring->next_to_clean;
3856 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3857 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3858
3859 while (staterr & E1000_RXD_STAT_DD) {
3860 if (*work_done >= budget)
3861 break;
3862 (*work_done)++;
3863 buffer_info = &rx_ring->buffer_info[i];
3864
3865 /* HW will not DMA in data larger than the given buffer, even
3866 * if it parses the (NFS, of course) header to be larger. In
3867 * that case, it fills the header buffer and spills the rest
3868 * into the page.
3869 */
Al Viro7deb07b2008-03-16 22:43:06 +00003870 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3871 E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
Auke Kok9d5c8242008-01-24 02:22:38 -08003872 if (hlen > adapter->rx_ps_hdr_size)
3873 hlen = adapter->rx_ps_hdr_size;
3874
3875 length = le16_to_cpu(rx_desc->wb.upper.length);
3876 cleaned = true;
3877 cleaned_count++;
3878
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07003879 skb = buffer_info->skb;
3880 prefetch(skb->data - NET_IP_ALIGN);
3881 buffer_info->skb = NULL;
3882 if (!adapter->rx_ps_hdr_size) {
3883 pci_unmap_single(pdev, buffer_info->dma,
3884 adapter->rx_buffer_len +
3885 NET_IP_ALIGN,
3886 PCI_DMA_FROMDEVICE);
3887 skb_put(skb, length);
3888 goto send_up;
Auke Kok9d5c8242008-01-24 02:22:38 -08003889 }
3890
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07003891 if (!skb_shinfo(skb)->nr_frags) {
3892 pci_unmap_single(pdev, buffer_info->dma,
3893 adapter->rx_ps_hdr_size +
3894 NET_IP_ALIGN,
3895 PCI_DMA_FROMDEVICE);
3896 skb_put(skb, hlen);
3897 }
3898
3899 if (length) {
Auke Kok9d5c8242008-01-24 02:22:38 -08003900 pci_unmap_page(pdev, buffer_info->page_dma,
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07003901 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
Auke Kok9d5c8242008-01-24 02:22:38 -08003902 buffer_info->page_dma = 0;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07003903
3904 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
3905 buffer_info->page,
3906 buffer_info->page_offset,
3907 length);
3908
3909 if ((adapter->rx_buffer_len > (PAGE_SIZE / 2)) ||
3910 (page_count(buffer_info->page) != 1))
3911 buffer_info->page = NULL;
3912 else
3913 get_page(buffer_info->page);
Auke Kok9d5c8242008-01-24 02:22:38 -08003914
3915 skb->len += length;
3916 skb->data_len += length;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07003917
Auke Kok9d5c8242008-01-24 02:22:38 -08003918 skb->truesize += length;
Auke Kok9d5c8242008-01-24 02:22:38 -08003919 }
3920send_up:
Auke Kok9d5c8242008-01-24 02:22:38 -08003921 i++;
3922 if (i == rx_ring->count)
3923 i = 0;
3924 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3925 prefetch(next_rxd);
3926 next_buffer = &rx_ring->buffer_info[i];
3927
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07003928 if (!(staterr & E1000_RXD_STAT_EOP)) {
Alexander Duyckb2d56532008-11-20 00:47:34 -08003929 buffer_info->skb = next_buffer->skb;
3930 buffer_info->dma = next_buffer->dma;
3931 next_buffer->skb = skb;
3932 next_buffer->dma = 0;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07003933 goto next_desc;
3934 }
3935
Auke Kok9d5c8242008-01-24 02:22:38 -08003936 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3937 dev_kfree_skb_irq(skb);
3938 goto next_desc;
3939 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003940
3941 total_bytes += skb->len;
3942 total_packets++;
3943
3944 igb_rx_checksum_adv(adapter, staterr, skb);
3945
3946 skb->protocol = eth_type_trans(skb, netdev);
3947
Alexander Duyckd3352522008-07-08 15:12:13 -07003948 igb_receive_skb(rx_ring, staterr, rx_desc, skb);
Auke Kok9d5c8242008-01-24 02:22:38 -08003949
Auke Kok9d5c8242008-01-24 02:22:38 -08003950next_desc:
3951 rx_desc->wb.upper.status_error = 0;
3952
3953 /* return some buffers to hardware, one at a time is too slow */
3954 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
Mitch Williams3b644cf2008-06-27 10:59:48 -07003955 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
Auke Kok9d5c8242008-01-24 02:22:38 -08003956 cleaned_count = 0;
3957 }
3958
3959 /* use prefetched values */
3960 rx_desc = next_rxd;
3961 buffer_info = next_buffer;
3962
3963 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3964 }
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07003965
Auke Kok9d5c8242008-01-24 02:22:38 -08003966 rx_ring->next_to_clean = i;
3967 cleaned_count = IGB_DESC_UNUSED(rx_ring);
3968
Alexander Duyckd3352522008-07-08 15:12:13 -07003969#ifdef CONFIG_IGB_LRO
3970 if (rx_ring->lro_used) {
3971 lro_flush_all(&rx_ring->lro_mgr);
3972 rx_ring->lro_used = 0;
3973 }
3974#endif
3975
Auke Kok9d5c8242008-01-24 02:22:38 -08003976 if (cleaned_count)
Mitch Williams3b644cf2008-06-27 10:59:48 -07003977 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
Auke Kok9d5c8242008-01-24 02:22:38 -08003978
3979 rx_ring->total_packets += total_packets;
3980 rx_ring->total_bytes += total_bytes;
3981 rx_ring->rx_stats.packets += total_packets;
3982 rx_ring->rx_stats.bytes += total_bytes;
3983 adapter->net_stats.rx_bytes += total_bytes;
3984 adapter->net_stats.rx_packets += total_packets;
3985 return cleaned;
3986}
3987
3988
3989/**
3990 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3991 * @adapter: address of board private structure
3992 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07003993static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
Auke Kok9d5c8242008-01-24 02:22:38 -08003994 int cleaned_count)
3995{
Mitch Williams3b644cf2008-06-27 10:59:48 -07003996 struct igb_adapter *adapter = rx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08003997 struct net_device *netdev = adapter->netdev;
3998 struct pci_dev *pdev = adapter->pdev;
3999 union e1000_adv_rx_desc *rx_desc;
4000 struct igb_buffer *buffer_info;
4001 struct sk_buff *skb;
4002 unsigned int i;
4003
4004 i = rx_ring->next_to_use;
4005 buffer_info = &rx_ring->buffer_info[i];
4006
4007 while (cleaned_count--) {
4008 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
4009
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07004010 if (adapter->rx_ps_hdr_size && !buffer_info->page_dma) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004011 if (!buffer_info->page) {
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07004012 buffer_info->page = alloc_page(GFP_ATOMIC);
4013 if (!buffer_info->page) {
4014 adapter->alloc_rx_buff_failed++;
4015 goto no_buffers;
4016 }
4017 buffer_info->page_offset = 0;
4018 } else {
4019 buffer_info->page_offset ^= PAGE_SIZE / 2;
Auke Kok9d5c8242008-01-24 02:22:38 -08004020 }
4021 buffer_info->page_dma =
4022 pci_map_page(pdev,
4023 buffer_info->page,
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07004024 buffer_info->page_offset,
4025 PAGE_SIZE / 2,
Auke Kok9d5c8242008-01-24 02:22:38 -08004026 PCI_DMA_FROMDEVICE);
4027 }
4028
4029 if (!buffer_info->skb) {
4030 int bufsz;
4031
4032 if (adapter->rx_ps_hdr_size)
4033 bufsz = adapter->rx_ps_hdr_size;
4034 else
4035 bufsz = adapter->rx_buffer_len;
4036 bufsz += NET_IP_ALIGN;
4037 skb = netdev_alloc_skb(netdev, bufsz);
4038
4039 if (!skb) {
4040 adapter->alloc_rx_buff_failed++;
4041 goto no_buffers;
4042 }
4043
4044 /* Make buffer alignment 2 beyond a 16 byte boundary
4045 * this will result in a 16 byte aligned IP header after
4046 * the 14 byte MAC header is removed
4047 */
4048 skb_reserve(skb, NET_IP_ALIGN);
4049
4050 buffer_info->skb = skb;
4051 buffer_info->dma = pci_map_single(pdev, skb->data,
4052 bufsz,
4053 PCI_DMA_FROMDEVICE);
4054
4055 }
4056 /* Refresh the desc even if buffer_addrs didn't change because
4057 * each write-back erases this info. */
4058 if (adapter->rx_ps_hdr_size) {
4059 rx_desc->read.pkt_addr =
4060 cpu_to_le64(buffer_info->page_dma);
4061 rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
4062 } else {
4063 rx_desc->read.pkt_addr =
4064 cpu_to_le64(buffer_info->dma);
4065 rx_desc->read.hdr_addr = 0;
4066 }
4067
4068 i++;
4069 if (i == rx_ring->count)
4070 i = 0;
4071 buffer_info = &rx_ring->buffer_info[i];
4072 }
4073
4074no_buffers:
4075 if (rx_ring->next_to_use != i) {
4076 rx_ring->next_to_use = i;
4077 if (i == 0)
4078 i = (rx_ring->count - 1);
4079 else
4080 i--;
4081
4082 /* Force memory writes to complete before letting h/w
4083 * know there are new descriptors to fetch. (Only
4084 * applicable for weak-ordered memory model archs,
4085 * such as IA-64). */
4086 wmb();
4087 writel(i, adapter->hw.hw_addr + rx_ring->tail);
4088 }
4089}
4090
4091/**
4092 * igb_mii_ioctl -
4093 * @netdev:
4094 * @ifreq:
4095 * @cmd:
4096 **/
4097static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4098{
4099 struct igb_adapter *adapter = netdev_priv(netdev);
4100 struct mii_ioctl_data *data = if_mii(ifr);
4101
4102 if (adapter->hw.phy.media_type != e1000_media_type_copper)
4103 return -EOPNOTSUPP;
4104
4105 switch (cmd) {
4106 case SIOCGMIIPHY:
4107 data->phy_id = adapter->hw.phy.addr;
4108 break;
4109 case SIOCGMIIREG:
4110 if (!capable(CAP_NET_ADMIN))
4111 return -EPERM;
4112 if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw,
4113 data->reg_num
4114 & 0x1F, &data->val_out))
4115 return -EIO;
4116 break;
4117 case SIOCSMIIREG:
4118 default:
4119 return -EOPNOTSUPP;
4120 }
4121 return 0;
4122}
4123
4124/**
4125 * igb_ioctl -
4126 * @netdev:
4127 * @ifreq:
4128 * @cmd:
4129 **/
4130static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4131{
4132 switch (cmd) {
4133 case SIOCGMIIPHY:
4134 case SIOCGMIIREG:
4135 case SIOCSMIIREG:
4136 return igb_mii_ioctl(netdev, ifr, cmd);
4137 default:
4138 return -EOPNOTSUPP;
4139 }
4140}
4141
4142static void igb_vlan_rx_register(struct net_device *netdev,
4143 struct vlan_group *grp)
4144{
4145 struct igb_adapter *adapter = netdev_priv(netdev);
4146 struct e1000_hw *hw = &adapter->hw;
4147 u32 ctrl, rctl;
4148
4149 igb_irq_disable(adapter);
4150 adapter->vlgrp = grp;
4151
4152 if (grp) {
4153 /* enable VLAN tag insert/strip */
4154 ctrl = rd32(E1000_CTRL);
4155 ctrl |= E1000_CTRL_VME;
4156 wr32(E1000_CTRL, ctrl);
4157
4158 /* enable VLAN receive filtering */
4159 rctl = rd32(E1000_RCTL);
Auke Kok9d5c8242008-01-24 02:22:38 -08004160 rctl &= ~E1000_RCTL_CFIEN;
4161 wr32(E1000_RCTL, rctl);
4162 igb_update_mng_vlan(adapter);
4163 wr32(E1000_RLPML,
4164 adapter->max_frame_size + VLAN_TAG_SIZE);
4165 } else {
4166 /* disable VLAN tag insert/strip */
4167 ctrl = rd32(E1000_CTRL);
4168 ctrl &= ~E1000_CTRL_VME;
4169 wr32(E1000_CTRL, ctrl);
4170
Auke Kok9d5c8242008-01-24 02:22:38 -08004171 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
4172 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4173 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
4174 }
4175 wr32(E1000_RLPML,
4176 adapter->max_frame_size);
4177 }
4178
4179 if (!test_bit(__IGB_DOWN, &adapter->state))
4180 igb_irq_enable(adapter);
4181}
4182
4183static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4184{
4185 struct igb_adapter *adapter = netdev_priv(netdev);
4186 struct e1000_hw *hw = &adapter->hw;
4187 u32 vfta, index;
4188
4189 if ((adapter->hw.mng_cookie.status &
4190 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4191 (vid == adapter->mng_vlan_id))
4192 return;
4193 /* add VID to filter table */
4194 index = (vid >> 5) & 0x7F;
4195 vfta = array_rd32(E1000_VFTA, index);
4196 vfta |= (1 << (vid & 0x1F));
4197 igb_write_vfta(&adapter->hw, index, vfta);
4198}
4199
4200static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4201{
4202 struct igb_adapter *adapter = netdev_priv(netdev);
4203 struct e1000_hw *hw = &adapter->hw;
4204 u32 vfta, index;
4205
4206 igb_irq_disable(adapter);
4207 vlan_group_set_device(adapter->vlgrp, vid, NULL);
4208
4209 if (!test_bit(__IGB_DOWN, &adapter->state))
4210 igb_irq_enable(adapter);
4211
4212 if ((adapter->hw.mng_cookie.status &
4213 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4214 (vid == adapter->mng_vlan_id)) {
4215 /* release control to f/w */
4216 igb_release_hw_control(adapter);
4217 return;
4218 }
4219
4220 /* remove VID from filter table */
4221 index = (vid >> 5) & 0x7F;
4222 vfta = array_rd32(E1000_VFTA, index);
4223 vfta &= ~(1 << (vid & 0x1F));
4224 igb_write_vfta(&adapter->hw, index, vfta);
4225}
4226
4227static void igb_restore_vlan(struct igb_adapter *adapter)
4228{
4229 igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4230
4231 if (adapter->vlgrp) {
4232 u16 vid;
4233 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4234 if (!vlan_group_get_device(adapter->vlgrp, vid))
4235 continue;
4236 igb_vlan_rx_add_vid(adapter->netdev, vid);
4237 }
4238 }
4239}
4240
4241int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
4242{
4243 struct e1000_mac_info *mac = &adapter->hw.mac;
4244
4245 mac->autoneg = 0;
4246
4247 /* Fiber NICs only allow 1000 gbps Full duplex */
4248 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
4249 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4250 dev_err(&adapter->pdev->dev,
4251 "Unsupported Speed/Duplex configuration\n");
4252 return -EINVAL;
4253 }
4254
4255 switch (spddplx) {
4256 case SPEED_10 + DUPLEX_HALF:
4257 mac->forced_speed_duplex = ADVERTISE_10_HALF;
4258 break;
4259 case SPEED_10 + DUPLEX_FULL:
4260 mac->forced_speed_duplex = ADVERTISE_10_FULL;
4261 break;
4262 case SPEED_100 + DUPLEX_HALF:
4263 mac->forced_speed_duplex = ADVERTISE_100_HALF;
4264 break;
4265 case SPEED_100 + DUPLEX_FULL:
4266 mac->forced_speed_duplex = ADVERTISE_100_FULL;
4267 break;
4268 case SPEED_1000 + DUPLEX_FULL:
4269 mac->autoneg = 1;
4270 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
4271 break;
4272 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4273 default:
4274 dev_err(&adapter->pdev->dev,
4275 "Unsupported Speed/Duplex configuration\n");
4276 return -EINVAL;
4277 }
4278 return 0;
4279}
4280
4281
4282static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
4283{
4284 struct net_device *netdev = pci_get_drvdata(pdev);
4285 struct igb_adapter *adapter = netdev_priv(netdev);
4286 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck2d064c02008-07-08 15:10:12 -07004287 u32 ctrl, rctl, status;
Auke Kok9d5c8242008-01-24 02:22:38 -08004288 u32 wufc = adapter->wol;
4289#ifdef CONFIG_PM
4290 int retval = 0;
4291#endif
4292
4293 netif_device_detach(netdev);
4294
Alexander Duycka88f10e2008-07-08 15:13:38 -07004295 if (netif_running(netdev))
4296 igb_close(netdev);
4297
4298 igb_reset_interrupt_capability(adapter);
4299
4300 igb_free_queues(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08004301
4302#ifdef CONFIG_PM
4303 retval = pci_save_state(pdev);
4304 if (retval)
4305 return retval;
4306#endif
4307
4308 status = rd32(E1000_STATUS);
4309 if (status & E1000_STATUS_LU)
4310 wufc &= ~E1000_WUFC_LNKC;
4311
4312 if (wufc) {
4313 igb_setup_rctl(adapter);
4314 igb_set_multi(netdev);
4315
4316 /* turn on all-multi mode if wake on multicast is enabled */
4317 if (wufc & E1000_WUFC_MC) {
4318 rctl = rd32(E1000_RCTL);
4319 rctl |= E1000_RCTL_MPE;
4320 wr32(E1000_RCTL, rctl);
4321 }
4322
4323 ctrl = rd32(E1000_CTRL);
4324 /* advertise wake from D3Cold */
4325 #define E1000_CTRL_ADVD3WUC 0x00100000
4326 /* phy power management enable */
4327 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4328 ctrl |= E1000_CTRL_ADVD3WUC;
4329 wr32(E1000_CTRL, ctrl);
4330
Auke Kok9d5c8242008-01-24 02:22:38 -08004331 /* Allow time for pending master requests to run */
4332 igb_disable_pcie_master(&adapter->hw);
4333
4334 wr32(E1000_WUC, E1000_WUC_PME_EN);
4335 wr32(E1000_WUFC, wufc);
Auke Kok9d5c8242008-01-24 02:22:38 -08004336 } else {
4337 wr32(E1000_WUC, 0);
4338 wr32(E1000_WUFC, 0);
Auke Kok9d5c8242008-01-24 02:22:38 -08004339 }
4340
Alexander Duyck2d064c02008-07-08 15:10:12 -07004341 /* make sure adapter isn't asleep if manageability/wol is enabled */
4342 if (wufc || adapter->en_mng_pt) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004343 pci_enable_wake(pdev, PCI_D3hot, 1);
4344 pci_enable_wake(pdev, PCI_D3cold, 1);
Alexander Duyck2d064c02008-07-08 15:10:12 -07004345 } else {
4346 igb_shutdown_fiber_serdes_link_82575(hw);
4347 pci_enable_wake(pdev, PCI_D3hot, 0);
4348 pci_enable_wake(pdev, PCI_D3cold, 0);
Auke Kok9d5c8242008-01-24 02:22:38 -08004349 }
4350
4351 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4352 * would have already happened in close and is redundant. */
4353 igb_release_hw_control(adapter);
4354
4355 pci_disable_device(pdev);
4356
4357 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4358
4359 return 0;
4360}
4361
4362#ifdef CONFIG_PM
4363static int igb_resume(struct pci_dev *pdev)
4364{
4365 struct net_device *netdev = pci_get_drvdata(pdev);
4366 struct igb_adapter *adapter = netdev_priv(netdev);
4367 struct e1000_hw *hw = &adapter->hw;
4368 u32 err;
4369
4370 pci_set_power_state(pdev, PCI_D0);
4371 pci_restore_state(pdev);
Taku Izumi42bfd33a2008-06-20 12:10:30 +09004372
4373 if (adapter->need_ioport)
4374 err = pci_enable_device(pdev);
4375 else
4376 err = pci_enable_device_mem(pdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08004377 if (err) {
4378 dev_err(&pdev->dev,
4379 "igb: Cannot enable PCI device from suspend\n");
4380 return err;
4381 }
4382 pci_set_master(pdev);
4383
4384 pci_enable_wake(pdev, PCI_D3hot, 0);
4385 pci_enable_wake(pdev, PCI_D3cold, 0);
4386
Alexander Duycka88f10e2008-07-08 15:13:38 -07004387 igb_set_interrupt_capability(adapter);
4388
4389 if (igb_alloc_queues(adapter)) {
4390 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4391 return -ENOMEM;
Auke Kok9d5c8242008-01-24 02:22:38 -08004392 }
4393
4394 /* e1000_power_up_phy(adapter); */
4395
4396 igb_reset(adapter);
4397 wr32(E1000_WUS, ~0);
4398
Alexander Duycka88f10e2008-07-08 15:13:38 -07004399 if (netif_running(netdev)) {
4400 err = igb_open(netdev);
4401 if (err)
4402 return err;
4403 }
Auke Kok9d5c8242008-01-24 02:22:38 -08004404
4405 netif_device_attach(netdev);
4406
4407 /* let the f/w know that the h/w is now under the control of the
4408 * driver. */
4409 igb_get_hw_control(adapter);
4410
4411 return 0;
4412}
4413#endif
4414
4415static void igb_shutdown(struct pci_dev *pdev)
4416{
4417 igb_suspend(pdev, PMSG_SUSPEND);
4418}
4419
4420#ifdef CONFIG_NET_POLL_CONTROLLER
4421/*
4422 * Polling 'interrupt' - used by things like netconsole to send skbs
4423 * without having to re-enable interrupts. It's not called while
4424 * the interrupt routine is executing.
4425 */
4426static void igb_netpoll(struct net_device *netdev)
4427{
4428 struct igb_adapter *adapter = netdev_priv(netdev);
4429 int i;
4430 int work_done = 0;
4431
4432 igb_irq_disable(adapter);
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07004433 adapter->flags |= IGB_FLAG_IN_NETPOLL;
4434
Auke Kok9d5c8242008-01-24 02:22:38 -08004435 for (i = 0; i < adapter->num_tx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07004436 igb_clean_tx_irq(&adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08004437
4438 for (i = 0; i < adapter->num_rx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07004439 igb_clean_rx_irq_adv(&adapter->rx_ring[i],
Auke Kok9d5c8242008-01-24 02:22:38 -08004440 &work_done,
4441 adapter->rx_ring[i].napi.weight);
4442
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07004443 adapter->flags &= ~IGB_FLAG_IN_NETPOLL;
Auke Kok9d5c8242008-01-24 02:22:38 -08004444 igb_irq_enable(adapter);
4445}
4446#endif /* CONFIG_NET_POLL_CONTROLLER */
4447
4448/**
4449 * igb_io_error_detected - called when PCI error is detected
4450 * @pdev: Pointer to PCI device
4451 * @state: The current pci connection state
4452 *
4453 * This function is called after a PCI bus error affecting
4454 * this device has been detected.
4455 */
4456static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4457 pci_channel_state_t state)
4458{
4459 struct net_device *netdev = pci_get_drvdata(pdev);
4460 struct igb_adapter *adapter = netdev_priv(netdev);
4461
4462 netif_device_detach(netdev);
4463
4464 if (netif_running(netdev))
4465 igb_down(adapter);
4466 pci_disable_device(pdev);
4467
4468 /* Request a slot slot reset. */
4469 return PCI_ERS_RESULT_NEED_RESET;
4470}
4471
4472/**
4473 * igb_io_slot_reset - called after the pci bus has been reset.
4474 * @pdev: Pointer to PCI device
4475 *
4476 * Restart the card from scratch, as if from a cold-boot. Implementation
4477 * resembles the first-half of the igb_resume routine.
4478 */
4479static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4480{
4481 struct net_device *netdev = pci_get_drvdata(pdev);
4482 struct igb_adapter *adapter = netdev_priv(netdev);
4483 struct e1000_hw *hw = &adapter->hw;
Taku Izumi42bfd33a2008-06-20 12:10:30 +09004484 int err;
Auke Kok9d5c8242008-01-24 02:22:38 -08004485
Taku Izumi42bfd33a2008-06-20 12:10:30 +09004486 if (adapter->need_ioport)
4487 err = pci_enable_device(pdev);
4488 else
4489 err = pci_enable_device_mem(pdev);
4490 if (err) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004491 dev_err(&pdev->dev,
4492 "Cannot re-enable PCI device after reset.\n");
4493 return PCI_ERS_RESULT_DISCONNECT;
4494 }
4495 pci_set_master(pdev);
Auke Kokc682fc22008-04-23 11:09:34 -07004496 pci_restore_state(pdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08004497
4498 pci_enable_wake(pdev, PCI_D3hot, 0);
4499 pci_enable_wake(pdev, PCI_D3cold, 0);
4500
4501 igb_reset(adapter);
4502 wr32(E1000_WUS, ~0);
4503
4504 return PCI_ERS_RESULT_RECOVERED;
4505}
4506
4507/**
4508 * igb_io_resume - called when traffic can start flowing again.
4509 * @pdev: Pointer to PCI device
4510 *
4511 * This callback is called when the error recovery driver tells us that
4512 * its OK to resume normal operation. Implementation resembles the
4513 * second-half of the igb_resume routine.
4514 */
4515static void igb_io_resume(struct pci_dev *pdev)
4516{
4517 struct net_device *netdev = pci_get_drvdata(pdev);
4518 struct igb_adapter *adapter = netdev_priv(netdev);
4519
Auke Kok9d5c8242008-01-24 02:22:38 -08004520 if (netif_running(netdev)) {
4521 if (igb_up(adapter)) {
4522 dev_err(&pdev->dev, "igb_up failed after reset\n");
4523 return;
4524 }
4525 }
4526
4527 netif_device_attach(netdev);
4528
4529 /* let the f/w know that the h/w is now under the control of the
4530 * driver. */
4531 igb_get_hw_control(adapter);
4532
4533}
4534
4535/* igb_main.c */