blob: e2a2658cf841d554c37fa5aa702e9e55ad7c93f6 [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#ifndef _CORE_H_
19#define _CORE_H_
20
21#include <linux/completion.h>
22#include <linux/if_ether.h>
23#include <linux/types.h>
24#include <linux/pci.h>
25
Michal Kazioredb82362013-07-05 16:15:14 +030026#include "htt.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030027#include "htc.h"
28#include "hw.h"
29#include "targaddrs.h"
30#include "wmi.h"
31#include "../ath.h"
32#include "../regd.h"
33
34#define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
35#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
36#define WO(_f) ((_f##_OFFSET) >> 2)
37
38#define ATH10K_SCAN_ID 0
39#define WMI_READY_TIMEOUT (5 * HZ)
40#define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
Michal Kazior2e1dea42013-07-31 10:32:40 +020041#define ATH10K_NUM_CHANS 38
Kalle Valo5e3dd152013-06-12 20:52:10 +030042
43/* Antenna noise floor */
44#define ATH10K_DEFAULT_NOISE_FLOOR -95
45
46struct ath10k;
47
Kalle Valo5e3dd152013-06-12 20:52:10 +030048struct ath10k_skb_cb {
49 dma_addr_t paddr;
50 bool is_mapped;
51 bool is_aborted;
52
53 struct {
54 u8 vdev_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +030055 u8 tid;
56 bool is_offchan;
Michal Kazior1f8bb152013-09-18 14:43:22 +020057
58 u8 frag_len;
59 u8 pad_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +030060 } __packed htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +030061} __packed;
62
63static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
64{
65 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
66 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
67 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
68}
69
70static inline int ath10k_skb_map(struct device *dev, struct sk_buff *skb)
71{
72 if (ATH10K_SKB_CB(skb)->is_mapped)
73 return -EINVAL;
74
75 ATH10K_SKB_CB(skb)->paddr = dma_map_single(dev, skb->data, skb->len,
76 DMA_TO_DEVICE);
77
78 if (unlikely(dma_mapping_error(dev, ATH10K_SKB_CB(skb)->paddr)))
79 return -EIO;
80
81 ATH10K_SKB_CB(skb)->is_mapped = true;
82 return 0;
83}
84
85static inline int ath10k_skb_unmap(struct device *dev, struct sk_buff *skb)
86{
87 if (!ATH10K_SKB_CB(skb)->is_mapped)
88 return -EINVAL;
89
90 dma_unmap_single(dev, ATH10K_SKB_CB(skb)->paddr, skb->len,
91 DMA_TO_DEVICE);
92 ATH10K_SKB_CB(skb)->is_mapped = false;
93 return 0;
94}
95
96static inline u32 host_interest_item_address(u32 item_offset)
97{
98 return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
99}
100
101struct ath10k_bmi {
102 bool done_sent;
103};
104
Bartosz Markowskib3effe62013-09-26 17:47:11 +0200105#define ATH10K_MAX_MEM_REQS 16
106
107struct ath10k_mem_chunk {
108 void *vaddr;
109 dma_addr_t paddr;
110 u32 len;
111 u32 req_id;
112};
113
Kalle Valo5e3dd152013-06-12 20:52:10 +0300114struct ath10k_wmi {
115 enum ath10k_htc_ep_id eid;
116 struct completion service_ready;
117 struct completion unified_ready;
Michal Kaziorbe8b3942013-09-13 14:16:54 +0200118 wait_queue_head_t tx_credits_wq;
Bartosz Markowskice428702013-09-26 17:47:05 +0200119 struct wmi_cmd_map *cmd;
Bartosz Markowskib3effe62013-09-26 17:47:11 +0200120
121 u32 num_mem_chunks;
122 struct ath10k_mem_chunk mem_chunks[ATH10K_MAX_MEM_REQS];
Kalle Valo5e3dd152013-06-12 20:52:10 +0300123};
124
125struct ath10k_peer_stat {
126 u8 peer_macaddr[ETH_ALEN];
127 u32 peer_rssi;
128 u32 peer_tx_rate;
129};
130
131struct ath10k_target_stats {
132 /* PDEV stats */
133 s32 ch_noise_floor;
134 u32 tx_frame_count;
135 u32 rx_frame_count;
136 u32 rx_clear_count;
137 u32 cycle_count;
138 u32 phy_err_count;
139 u32 chan_tx_power;
140
141 /* PDEV TX stats */
142 s32 comp_queued;
143 s32 comp_delivered;
144 s32 msdu_enqued;
145 s32 mpdu_enqued;
146 s32 wmm_drop;
147 s32 local_enqued;
148 s32 local_freed;
149 s32 hw_queued;
150 s32 hw_reaped;
151 s32 underrun;
152 s32 tx_abort;
153 s32 mpdus_requed;
154 u32 tx_ko;
155 u32 data_rc;
156 u32 self_triggers;
157 u32 sw_retry_failure;
158 u32 illgl_rate_phy_err;
159 u32 pdev_cont_xretry;
160 u32 pdev_tx_timeout;
161 u32 pdev_resets;
162 u32 phy_underrun;
163 u32 txop_ovf;
164
165 /* PDEV RX stats */
166 s32 mid_ppdu_route_change;
167 s32 status_rcvd;
168 s32 r0_frags;
169 s32 r1_frags;
170 s32 r2_frags;
171 s32 r3_frags;
172 s32 htt_msdus;
173 s32 htt_mpdus;
174 s32 loc_msdus;
175 s32 loc_mpdus;
176 s32 oversize_amsdu;
177 s32 phy_errs;
178 s32 phy_err_drop;
179 s32 mpdu_errs;
180
181 /* VDEV STATS */
182
183 /* PEER STATS */
184 u8 peers;
185 struct ath10k_peer_stat peer_stat[TARGET_NUM_PEERS];
186
187 /* TODO: Beacon filter stats */
188
189};
190
191#define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
192
193struct ath10k_peer {
194 struct list_head list;
195 int vdev_id;
196 u8 addr[ETH_ALEN];
197 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
198 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
199};
200
201#define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
202
203struct ath10k_vif {
204 u32 vdev_id;
205 enum wmi_vdev_type vdev_type;
206 enum wmi_vdev_subtype vdev_subtype;
207 u32 beacon_interval;
208 u32 dtim_period;
Michal Kaziored543882013-09-13 14:16:56 +0200209 struct sk_buff *beacon;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300210
211 struct ath10k *ar;
212 struct ieee80211_vif *vif;
213
214 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
215 u8 def_wep_key_index;
216
217 u16 tx_seq_no;
218
219 union {
220 struct {
221 u8 bssid[ETH_ALEN];
222 u32 uapsd;
223 } sta;
224 struct {
225 /* 127 stations; wmi limit */
226 u8 tim_bitmap[16];
227 u8 tim_len;
228 u32 ssid_len;
229 u8 ssid[IEEE80211_MAX_SSID_LEN];
230 bool hidden_ssid;
231 /* P2P_IE with NoA attribute for P2P_GO case */
232 u32 noa_len;
233 u8 *noa_data;
234 } ap;
235 struct {
236 u8 bssid[ETH_ALEN];
237 } ibss;
238 } u;
239};
240
241struct ath10k_vif_iter {
242 u32 vdev_id;
243 struct ath10k_vif *arvif;
244};
245
246struct ath10k_debug {
247 struct dentry *debugfs_phy;
248
249 struct ath10k_target_stats target_stats;
250 u32 wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
251
252 struct completion event_stats_compl;
Kalle Valoa3d135e2013-09-03 11:44:10 +0300253
254 unsigned long htt_stats_mask;
255 struct delayed_work htt_stats_dwork;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300256};
257
Michal Kaziorf7843d72013-07-16 09:38:52 +0200258enum ath10k_state {
259 ATH10K_STATE_OFF = 0,
260 ATH10K_STATE_ON,
Michal Kazioraffd3212013-07-16 09:54:35 +0200261
262 /* When doing firmware recovery the device is first powered down.
263 * mac80211 is supposed to call in to start() hook later on. It is
264 * however possible that driver unloading and firmware crash overlap.
265 * mac80211 can wait on conf_mutex in stop() while the device is
266 * stopped in ath10k_core_restart() work holding conf_mutex. The state
267 * RESTARTED means that the device is up and mac80211 has started hw
268 * reconfiguration. Once mac80211 is done with the reconfiguration we
269 * set the state to STATE_ON in restart_complete(). */
270 ATH10K_STATE_RESTARTING,
271 ATH10K_STATE_RESTARTED,
272
273 /* The device has crashed while restarting hw. This state is like ON
274 * but commands are blocked in HTC and -ECOMM response is given. This
275 * prevents completion timeouts and makes the driver more responsive to
276 * userspace commands. This is also prevents recursive recovery. */
277 ATH10K_STATE_WEDGED,
Michal Kaziorf7843d72013-07-16 09:38:52 +0200278};
279
Michal Kazior0d9b0432013-08-09 10:13:33 +0200280enum ath10k_fw_features {
281 /* wmi_mgmt_rx_hdr contains extra RSSI information */
282 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
283
Bartosz Markowskice428702013-09-26 17:47:05 +0200284 /* firmware from 10X branch */
285 ATH10K_FW_FEATURE_WMI_10X = 1,
286
Michal Kazior0d9b0432013-08-09 10:13:33 +0200287 /* keep last */
288 ATH10K_FW_FEATURE_COUNT,
289};
290
Kalle Valo5e3dd152013-06-12 20:52:10 +0300291struct ath10k {
292 struct ath_common ath_common;
293 struct ieee80211_hw *hw;
294 struct device *dev;
295 u8 mac_addr[ETH_ALEN];
296
Kalle Valoe01ae682013-09-01 11:22:14 +0300297 u32 chip_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300298 u32 target_version;
299 u8 fw_version_major;
300 u32 fw_version_minor;
301 u16 fw_version_release;
302 u16 fw_version_build;
303 u32 phy_capability;
304 u32 hw_min_tx_power;
305 u32 hw_max_tx_power;
306 u32 ht_cap_info;
307 u32 vht_cap_info;
Michal Kazior8865bee42013-07-24 12:36:46 +0200308 u32 num_rf_chains;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300309
Michal Kazior0d9b0432013-08-09 10:13:33 +0200310 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
311
Kalle Valo5e3dd152013-06-12 20:52:10 +0300312 struct targetdef *targetdef;
313 struct hostdef *hostdef;
314
315 bool p2p;
316
317 struct {
318 void *priv;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300319 const struct ath10k_hif_ops *ops;
320 } hif;
321
Kalle Valo5e3dd152013-06-12 20:52:10 +0300322 wait_queue_head_t event_queue;
323 bool is_target_paused;
324
325 struct ath10k_bmi bmi;
Michal Kazioredb82362013-07-05 16:15:14 +0300326 struct ath10k_wmi wmi;
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300327 struct ath10k_htc htc;
Michal Kazioredb82362013-07-05 16:15:14 +0300328 struct ath10k_htt htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300329
330 struct ath10k_hw_params {
331 u32 id;
332 const char *name;
333 u32 patch_load_addr;
334
335 struct ath10k_hw_params_fw {
336 const char *dir;
337 const char *fw;
338 const char *otp;
339 const char *board;
340 } fw;
341 } hw_params;
342
Michal Kazior29385052013-07-16 09:38:58 +0200343 const struct firmware *board_data;
344 const struct firmware *otp;
345 const struct firmware *firmware;
346
Kalle Valo5e3dd152013-06-12 20:52:10 +0300347 struct {
348 struct completion started;
349 struct completion completed;
350 struct completion on_channel;
351 struct timer_list timeout;
352 bool is_roc;
353 bool in_progress;
354 bool aborting;
355 int vdev_id;
356 int roc_freq;
357 } scan;
358
359 struct {
360 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
361 } mac;
362
363 /* should never be NULL; needed for regular htt rx */
364 struct ieee80211_channel *rx_channel;
365
366 /* valid during scan; needed for mgmt rx during scan */
367 struct ieee80211_channel *scan_channel;
368
369 int free_vdev_map;
370 int monitor_vdev_id;
371 bool monitor_enabled;
372 bool monitor_present;
373 unsigned int filter_flags;
374
375 struct wmi_pdev_set_wmm_params_arg wmm_params;
376 struct completion install_key_done;
377
378 struct completion vdev_setup_done;
379
380 struct workqueue_struct *workqueue;
381
382 /* prevents concurrent FW reconfiguration */
383 struct mutex conf_mutex;
384
385 /* protects shared structure data */
386 spinlock_t data_lock;
387
388 struct list_head peers;
389 wait_queue_head_t peer_mapping_wq;
390
391 struct work_struct offchan_tx_work;
392 struct sk_buff_head offchan_tx_queue;
393 struct completion offchan_tx_completed;
394 struct sk_buff *offchan_tx_skb;
395
Michal Kaziorf7843d72013-07-16 09:38:52 +0200396 enum ath10k_state state;
397
Michal Kazioraffd3212013-07-16 09:54:35 +0200398 struct work_struct restart_work;
399
Michal Kazior2e1dea42013-07-31 10:32:40 +0200400 /* cycle count is reported twice for each visited channel during scan.
401 * access protected by data_lock */
402 u32 survey_last_rx_clear_count;
403 u32 survey_last_cycle_count;
404 struct survey_info survey[ATH10K_NUM_CHANS];
405
Kalle Valo5e3dd152013-06-12 20:52:10 +0300406#ifdef CONFIG_ATH10K_DEBUGFS
407 struct ath10k_debug debug;
408#endif
409};
410
411struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300412 const struct ath10k_hif_ops *hif_ops);
413void ath10k_core_destroy(struct ath10k *ar);
414
Michal Kaziordd30a362013-07-16 09:38:51 +0200415int ath10k_core_start(struct ath10k *ar);
416void ath10k_core_stop(struct ath10k *ar);
Kalle Valoe01ae682013-09-01 11:22:14 +0300417int ath10k_core_register(struct ath10k *ar, u32 chip_id);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300418void ath10k_core_unregister(struct ath10k *ar);
419
Kalle Valo5e3dd152013-06-12 20:52:10 +0300420#endif /* _CORE_H_ */