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Kristian Høgsbergc781c062007-05-07 20:33:32 -04001/*
2 * Driver for OHCI 1394 controllers
Kristian Høgsberged568912006-12-19 19:58:35 -05003 *
Kristian Høgsberged568912006-12-19 19:58:35 -05004 * Copyright (C) 2003-2006 Kristian Hoegsberg <krh@bitplanet.net>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software Foundation,
18 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
Stefan Richtere524f6162007-08-20 21:58:30 +020021#include <linux/compiler.h>
Kristian Høgsberged568912006-12-19 19:58:35 -050022#include <linux/delay.h>
Andrew Mortoncf3e72f2006-12-27 14:36:37 -080023#include <linux/dma-mapping.h>
Stefan Richterc26f0232007-08-20 21:40:30 +020024#include <linux/gfp.h>
Stefan Richtera7fb60d2007-08-20 21:41:22 +020025#include <linux/init.h>
26#include <linux/interrupt.h>
27#include <linux/kernel.h>
Al Virofaa2fb42007-05-15 20:36:10 +010028#include <linux/mm.h>
Stefan Richtera7fb60d2007-08-20 21:41:22 +020029#include <linux/module.h>
Stefan Richterad3c0fe2008-03-20 22:04:36 +010030#include <linux/moduleparam.h>
Stefan Richtera7fb60d2007-08-20 21:41:22 +020031#include <linux/pci.h>
Stefan Richterc26f0232007-08-20 21:40:30 +020032#include <linux/spinlock.h>
Andrew Mortoncf3e72f2006-12-27 14:36:37 -080033
Stefan Richterc26f0232007-08-20 21:40:30 +020034#include <asm/page.h>
Stefan Richteree71c2f2007-08-25 14:08:19 +020035#include <asm/system.h>
Kristian Høgsberged568912006-12-19 19:58:35 -050036
Stefan Richterea8d0062008-03-01 02:42:56 +010037#ifdef CONFIG_PPC_PMAC
38#include <asm/pmac_feature.h>
39#endif
40
Kristian Høgsberged568912006-12-19 19:58:35 -050041#include "fw-ohci.h"
Stefan Richtera7fb60d2007-08-20 21:41:22 +020042#include "fw-transaction.h"
Kristian Høgsberged568912006-12-19 19:58:35 -050043
Kristian Høgsberga77754a2007-05-07 20:33:35 -040044#define DESCRIPTOR_OUTPUT_MORE 0
45#define DESCRIPTOR_OUTPUT_LAST (1 << 12)
46#define DESCRIPTOR_INPUT_MORE (2 << 12)
47#define DESCRIPTOR_INPUT_LAST (3 << 12)
48#define DESCRIPTOR_STATUS (1 << 11)
49#define DESCRIPTOR_KEY_IMMEDIATE (2 << 8)
50#define DESCRIPTOR_PING (1 << 7)
51#define DESCRIPTOR_YY (1 << 6)
52#define DESCRIPTOR_NO_IRQ (0 << 4)
53#define DESCRIPTOR_IRQ_ERROR (1 << 4)
54#define DESCRIPTOR_IRQ_ALWAYS (3 << 4)
55#define DESCRIPTOR_BRANCH_ALWAYS (3 << 2)
56#define DESCRIPTOR_WAIT (3 << 0)
Kristian Høgsberged568912006-12-19 19:58:35 -050057
58struct descriptor {
59 __le16 req_count;
60 __le16 control;
61 __le32 data_address;
62 __le32 branch_address;
63 __le16 res_count;
64 __le16 transfer_status;
65} __attribute__((aligned(16)));
66
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -050067struct db_descriptor {
68 __le16 first_size;
69 __le16 control;
70 __le16 second_req_count;
71 __le16 first_req_count;
72 __le32 branch_address;
73 __le16 second_res_count;
74 __le16 first_res_count;
75 __le32 reserved0;
76 __le32 first_buffer;
77 __le32 second_buffer;
78 __le32 reserved1;
79} __attribute__((aligned(16)));
80
Kristian Høgsberga77754a2007-05-07 20:33:35 -040081#define CONTROL_SET(regs) (regs)
82#define CONTROL_CLEAR(regs) ((regs) + 4)
83#define COMMAND_PTR(regs) ((regs) + 12)
84#define CONTEXT_MATCH(regs) ((regs) + 16)
Kristian Høgsberg72e318e2007-02-06 14:49:31 -050085
Kristian Høgsberg32b46092007-02-06 14:49:30 -050086struct ar_buffer {
87 struct descriptor descriptor;
88 struct ar_buffer *next;
89 __le32 data[0];
90};
91
Kristian Høgsberged568912006-12-19 19:58:35 -050092struct ar_context {
93 struct fw_ohci *ohci;
Kristian Høgsberg32b46092007-02-06 14:49:30 -050094 struct ar_buffer *current_buffer;
95 struct ar_buffer *last_buffer;
96 void *pointer;
Kristian Høgsberg72e318e2007-02-06 14:49:31 -050097 u32 regs;
Kristian Høgsberged568912006-12-19 19:58:35 -050098 struct tasklet_struct tasklet;
99};
100
Kristian Høgsberg30200732007-02-16 17:34:39 -0500101struct context;
102
103typedef int (*descriptor_callback_t)(struct context *ctx,
104 struct descriptor *d,
105 struct descriptor *last);
David Moorefe5ca632008-01-06 17:21:41 -0500106
107/*
108 * A buffer that contains a block of DMA-able coherent memory used for
109 * storing a portion of a DMA descriptor program.
110 */
111struct descriptor_buffer {
112 struct list_head list;
113 dma_addr_t buffer_bus;
114 size_t buffer_size;
115 size_t used;
116 struct descriptor buffer[0];
117};
118
Kristian Høgsberg30200732007-02-16 17:34:39 -0500119struct context {
Stefan Richter373b2ed2007-03-04 14:45:18 +0100120 struct fw_ohci *ohci;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500121 u32 regs;
David Moorefe5ca632008-01-06 17:21:41 -0500122 int total_allocation;
Stefan Richter373b2ed2007-03-04 14:45:18 +0100123
David Moorefe5ca632008-01-06 17:21:41 -0500124 /*
125 * List of page-sized buffers for storing DMA descriptors.
126 * Head of list contains buffers in use and tail of list contains
127 * free buffers.
128 */
129 struct list_head buffer_list;
130
131 /*
132 * Pointer to a buffer inside buffer_list that contains the tail
133 * end of the current DMA program.
134 */
135 struct descriptor_buffer *buffer_tail;
136
137 /*
138 * The descriptor containing the branch address of the first
139 * descriptor that has not yet been filled by the device.
140 */
141 struct descriptor *last;
142
143 /*
144 * The last descriptor in the DMA program. It contains the branch
145 * address that must be updated upon appending a new descriptor.
146 */
147 struct descriptor *prev;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500148
149 descriptor_callback_t callback;
150
Stefan Richter373b2ed2007-03-04 14:45:18 +0100151 struct tasklet_struct tasklet;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500152};
Kristian Høgsberg30200732007-02-16 17:34:39 -0500153
Kristian Høgsberga77754a2007-05-07 20:33:35 -0400154#define IT_HEADER_SY(v) ((v) << 0)
155#define IT_HEADER_TCODE(v) ((v) << 4)
156#define IT_HEADER_CHANNEL(v) ((v) << 8)
157#define IT_HEADER_TAG(v) ((v) << 14)
158#define IT_HEADER_SPEED(v) ((v) << 16)
159#define IT_HEADER_DATA_LENGTH(v) ((v) << 16)
Kristian Høgsberged568912006-12-19 19:58:35 -0500160
161struct iso_context {
162 struct fw_iso_context base;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500163 struct context context;
David Moore0642b652007-12-19 03:09:18 -0500164 int excess_bytes;
Kristian Høgsberg9b32d5f2007-02-16 17:34:44 -0500165 void *header;
166 size_t header_length;
Kristian Høgsberged568912006-12-19 19:58:35 -0500167};
168
169#define CONFIG_ROM_SIZE 1024
170
171struct fw_ohci {
172 struct fw_card card;
173
Kristian Høgsberge364cf42007-02-16 17:34:49 -0500174 u32 version;
Kristian Høgsberged568912006-12-19 19:58:35 -0500175 __iomem char *registers;
176 dma_addr_t self_id_bus;
177 __le32 *self_id_cpu;
178 struct tasklet_struct bus_reset_tasklet;
Kristian Høgsberge636fe22007-01-26 00:38:04 -0500179 int node_id;
Kristian Høgsberged568912006-12-19 19:58:35 -0500180 int generation;
181 int request_generation;
Kristian Høgsbergd60d7f12007-03-07 12:12:56 -0500182 u32 bus_seconds;
Stefan Richter11bf20a2008-03-01 02:47:15 +0100183 bool old_uninorth;
Stefan Richterd34316a2008-04-12 22:31:25 +0200184 bool bus_reset_packet_quirk;
Kristian Høgsberged568912006-12-19 19:58:35 -0500185
Kristian Høgsbergc781c062007-05-07 20:33:32 -0400186 /*
187 * Spinlock for accessing fw_ohci data. Never call out of
188 * this driver with this lock held.
189 */
Kristian Høgsberged568912006-12-19 19:58:35 -0500190 spinlock_t lock;
191 u32 self_id_buffer[512];
192
193 /* Config rom buffers */
194 __be32 *config_rom;
195 dma_addr_t config_rom_bus;
196 __be32 *next_config_rom;
197 dma_addr_t next_config_rom_bus;
198 u32 next_header;
199
200 struct ar_context ar_request_ctx;
201 struct ar_context ar_response_ctx;
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500202 struct context at_request_ctx;
203 struct context at_response_ctx;
Kristian Høgsberged568912006-12-19 19:58:35 -0500204
205 u32 it_context_mask;
206 struct iso_context *it_context_list;
207 u32 ir_context_mask;
208 struct iso_context *ir_context_list;
209};
210
Adrian Bunk95688e92007-01-22 19:17:37 +0100211static inline struct fw_ohci *fw_ohci(struct fw_card *card)
Kristian Høgsberged568912006-12-19 19:58:35 -0500212{
213 return container_of(card, struct fw_ohci, card);
214}
215
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -0500216#define IT_CONTEXT_CYCLE_MATCH_ENABLE 0x80000000
217#define IR_CONTEXT_BUFFER_FILL 0x80000000
218#define IR_CONTEXT_ISOCH_HEADER 0x40000000
219#define IR_CONTEXT_CYCLE_MATCH_ENABLE 0x20000000
220#define IR_CONTEXT_MULTI_CHANNEL_MODE 0x10000000
221#define IR_CONTEXT_DUAL_BUFFER_MODE 0x08000000
Kristian Høgsberged568912006-12-19 19:58:35 -0500222
223#define CONTEXT_RUN 0x8000
224#define CONTEXT_WAKE 0x1000
225#define CONTEXT_DEAD 0x0800
226#define CONTEXT_ACTIVE 0x0400
227
228#define OHCI1394_MAX_AT_REQ_RETRIES 0x2
229#define OHCI1394_MAX_AT_RESP_RETRIES 0x2
230#define OHCI1394_MAX_PHYS_RESP_RETRIES 0x8
231
232#define FW_OHCI_MAJOR 240
233#define OHCI1394_REGISTER_SIZE 0x800
234#define OHCI_LOOP_COUNT 500
235#define OHCI1394_PCI_HCI_Control 0x40
236#define SELF_ID_BUF_SIZE 0x800
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500237#define OHCI_TCODE_PHY_PACKET 0x0e
Kristian Høgsberge364cf42007-02-16 17:34:49 -0500238#define OHCI_VERSION_1_1 0x010010
Kristian Høgsberg0edeefd2007-01-26 00:38:49 -0500239
Kristian Høgsberged568912006-12-19 19:58:35 -0500240static char ohci_driver_name[] = KBUILD_MODNAME;
241
Stefan Richterad3c0fe2008-03-20 22:04:36 +0100242#ifdef CONFIG_FIREWIRE_OHCI_DEBUG
243
Stefan Richtera007bb82008-04-07 22:33:35 +0200244#define OHCI_PARAM_DEBUG_AT_AR 1
Stefan Richterad3c0fe2008-03-20 22:04:36 +0100245#define OHCI_PARAM_DEBUG_SELFIDS 2
Stefan Richtera007bb82008-04-07 22:33:35 +0200246#define OHCI_PARAM_DEBUG_IRQS 4
247#define OHCI_PARAM_DEBUG_BUSRESETS 8 /* only effective before chip init */
Stefan Richterad3c0fe2008-03-20 22:04:36 +0100248
249static int param_debug;
250module_param_named(debug, param_debug, int, 0644);
251MODULE_PARM_DESC(debug, "Verbose logging (default = 0"
Stefan Richterad3c0fe2008-03-20 22:04:36 +0100252 ", AT/AR events = " __stringify(OHCI_PARAM_DEBUG_AT_AR)
Stefan Richtera007bb82008-04-07 22:33:35 +0200253 ", self-IDs = " __stringify(OHCI_PARAM_DEBUG_SELFIDS)
254 ", IRQs = " __stringify(OHCI_PARAM_DEBUG_IRQS)
255 ", busReset events = " __stringify(OHCI_PARAM_DEBUG_BUSRESETS)
Stefan Richterad3c0fe2008-03-20 22:04:36 +0100256 ", or a combination, or all = -1)");
257
258static void log_irqs(u32 evt)
259{
Stefan Richtera007bb82008-04-07 22:33:35 +0200260 if (likely(!(param_debug &
261 (OHCI_PARAM_DEBUG_IRQS | OHCI_PARAM_DEBUG_BUSRESETS))))
Stefan Richterad3c0fe2008-03-20 22:04:36 +0100262 return;
263
Stefan Richtera007bb82008-04-07 22:33:35 +0200264 if (!(param_debug & OHCI_PARAM_DEBUG_IRQS) &&
265 !(evt & OHCI1394_busReset))
266 return;
267
268 printk(KERN_DEBUG KBUILD_MODNAME ": IRQ "
269 "%08x%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
Stefan Richterad3c0fe2008-03-20 22:04:36 +0100270 evt,
271 evt & OHCI1394_selfIDComplete ? " selfID" : "",
272 evt & OHCI1394_RQPkt ? " AR_req" : "",
273 evt & OHCI1394_RSPkt ? " AR_resp" : "",
274 evt & OHCI1394_reqTxComplete ? " AT_req" : "",
275 evt & OHCI1394_respTxComplete ? " AT_resp" : "",
276 evt & OHCI1394_isochRx ? " IR" : "",
277 evt & OHCI1394_isochTx ? " IT" : "",
278 evt & OHCI1394_postedWriteErr ? " postedWriteErr" : "",
279 evt & OHCI1394_cycleTooLong ? " cycleTooLong" : "",
280 evt & OHCI1394_cycle64Seconds ? " cycle64Seconds" : "",
Jarod Wilson75f78322008-04-03 17:18:23 -0400281 evt & OHCI1394_regAccessFail ? " regAccessFail" : "",
Stefan Richtera007bb82008-04-07 22:33:35 +0200282 evt & OHCI1394_busReset ? " busReset" : "",
Stefan Richterad3c0fe2008-03-20 22:04:36 +0100283 evt & ~(OHCI1394_selfIDComplete | OHCI1394_RQPkt |
284 OHCI1394_RSPkt | OHCI1394_reqTxComplete |
285 OHCI1394_respTxComplete | OHCI1394_isochRx |
286 OHCI1394_isochTx | OHCI1394_postedWriteErr |
Jarod Wilson75f78322008-04-03 17:18:23 -0400287 OHCI1394_cycleTooLong | OHCI1394_cycle64Seconds |
Stefan Richtera007bb82008-04-07 22:33:35 +0200288 OHCI1394_regAccessFail | OHCI1394_busReset)
Stefan Richterad3c0fe2008-03-20 22:04:36 +0100289 ? " ?" : "");
290}
291
292static const char *speed[] = {
293 [0] = "S100", [1] = "S200", [2] = "S400", [3] = "beta",
294};
295static const char *power[] = {
296 [0] = "+0W", [1] = "+15W", [2] = "+30W", [3] = "+45W",
297 [4] = "-3W", [5] = " ?W", [6] = "-3..-6W", [7] = "-3..-10W",
298};
299static const char port[] = { '.', '-', 'p', 'c', };
300
301static char _p(u32 *s, int shift)
302{
303 return port[*s >> shift & 3];
304}
305
Stefan Richter08ddb2f2008-04-11 00:51:15 +0200306static void log_selfids(int node_id, int generation, int self_id_count, u32 *s)
Stefan Richterad3c0fe2008-03-20 22:04:36 +0100307{
308 if (likely(!(param_debug & OHCI_PARAM_DEBUG_SELFIDS)))
309 return;
310
Stefan Richter08ddb2f2008-04-11 00:51:15 +0200311 printk(KERN_DEBUG KBUILD_MODNAME ": %d selfIDs, generation %d, "
312 "local node ID %04x\n", self_id_count, generation, node_id);
Stefan Richterad3c0fe2008-03-20 22:04:36 +0100313
314 for (; self_id_count--; ++s)
315 if ((*s & 1 << 23) == 0)
316 printk(KERN_DEBUG "selfID 0: %08x, phy %d [%c%c%c] "
317 "%s gc=%d %s %s%s%s\n",
318 *s, *s >> 24 & 63, _p(s, 6), _p(s, 4), _p(s, 2),
319 speed[*s >> 14 & 3], *s >> 16 & 63,
320 power[*s >> 8 & 7], *s >> 22 & 1 ? "L" : "",
321 *s >> 11 & 1 ? "c" : "", *s & 2 ? "i" : "");
322 else
323 printk(KERN_DEBUG "selfID n: %08x, phy %d "
324 "[%c%c%c%c%c%c%c%c]\n",
325 *s, *s >> 24 & 63,
326 _p(s, 16), _p(s, 14), _p(s, 12), _p(s, 10),
327 _p(s, 8), _p(s, 6), _p(s, 4), _p(s, 2));
328}
329
330static const char *evts[] = {
331 [0x00] = "evt_no_status", [0x01] = "-reserved-",
332 [0x02] = "evt_long_packet", [0x03] = "evt_missing_ack",
333 [0x04] = "evt_underrun", [0x05] = "evt_overrun",
334 [0x06] = "evt_descriptor_read", [0x07] = "evt_data_read",
335 [0x08] = "evt_data_write", [0x09] = "evt_bus_reset",
336 [0x0a] = "evt_timeout", [0x0b] = "evt_tcode_err",
337 [0x0c] = "-reserved-", [0x0d] = "-reserved-",
338 [0x0e] = "evt_unknown", [0x0f] = "evt_flushed",
339 [0x10] = "-reserved-", [0x11] = "ack_complete",
340 [0x12] = "ack_pending ", [0x13] = "-reserved-",
341 [0x14] = "ack_busy_X", [0x15] = "ack_busy_A",
342 [0x16] = "ack_busy_B", [0x17] = "-reserved-",
343 [0x18] = "-reserved-", [0x19] = "-reserved-",
344 [0x1a] = "-reserved-", [0x1b] = "ack_tardy",
345 [0x1c] = "-reserved-", [0x1d] = "ack_data_error",
346 [0x1e] = "ack_type_error", [0x1f] = "-reserved-",
347 [0x20] = "pending/cancelled",
348};
349static const char *tcodes[] = {
350 [0x0] = "QW req", [0x1] = "BW req",
351 [0x2] = "W resp", [0x3] = "-reserved-",
352 [0x4] = "QR req", [0x5] = "BR req",
353 [0x6] = "QR resp", [0x7] = "BR resp",
354 [0x8] = "cycle start", [0x9] = "Lk req",
355 [0xa] = "async stream packet", [0xb] = "Lk resp",
356 [0xc] = "-reserved-", [0xd] = "-reserved-",
357 [0xe] = "link internal", [0xf] = "-reserved-",
358};
359static const char *phys[] = {
360 [0x0] = "phy config packet", [0x1] = "link-on packet",
361 [0x2] = "self-id packet", [0x3] = "-reserved-",
362};
363
364static void log_ar_at_event(char dir, int speed, u32 *header, int evt)
365{
366 int tcode = header[0] >> 4 & 0xf;
367 char specific[12];
368
369 if (likely(!(param_debug & OHCI_PARAM_DEBUG_AT_AR)))
370 return;
371
372 if (unlikely(evt >= ARRAY_SIZE(evts)))
373 evt = 0x1f;
374
Stefan Richter08ddb2f2008-04-11 00:51:15 +0200375 if (evt == OHCI1394_evt_bus_reset) {
376 printk(KERN_DEBUG "A%c evt_bus_reset, generation %d\n",
377 dir, (header[2] >> 16) & 0xff);
378 return;
379 }
380
Stefan Richterad3c0fe2008-03-20 22:04:36 +0100381 if (header[0] == ~header[1]) {
382 printk(KERN_DEBUG "A%c %s, %s, %08x\n",
383 dir, evts[evt], phys[header[0] >> 30 & 0x3],
384 header[0]);
385 return;
386 }
387
388 switch (tcode) {
389 case 0x0: case 0x6: case 0x8:
390 snprintf(specific, sizeof(specific), " = %08x",
391 be32_to_cpu((__force __be32)header[3]));
392 break;
393 case 0x1: case 0x5: case 0x7: case 0x9: case 0xb:
394 snprintf(specific, sizeof(specific), " %x,%x",
395 header[3] >> 16, header[3] & 0xffff);
396 break;
397 default:
398 specific[0] = '\0';
399 }
400
401 switch (tcode) {
402 case 0xe: case 0xa:
403 printk(KERN_DEBUG "A%c %s, %s\n",
404 dir, evts[evt], tcodes[tcode]);
405 break;
406 case 0x0: case 0x1: case 0x4: case 0x5: case 0x9:
407 printk(KERN_DEBUG "A%c spd %x tl %02x, "
408 "%04x -> %04x, %s, "
409 "%s, %04x%08x%s\n",
410 dir, speed, header[0] >> 10 & 0x3f,
411 header[1] >> 16, header[0] >> 16, evts[evt],
412 tcodes[tcode], header[1] & 0xffff, header[2], specific);
413 break;
414 default:
415 printk(KERN_DEBUG "A%c spd %x tl %02x, "
416 "%04x -> %04x, %s, "
417 "%s%s\n",
418 dir, speed, header[0] >> 10 & 0x3f,
419 header[1] >> 16, header[0] >> 16, evts[evt],
420 tcodes[tcode], specific);
421 }
422}
423
424#else
425
426#define log_irqs(evt)
Stefan Richter08ddb2f2008-04-11 00:51:15 +0200427#define log_selfids(node_id, generation, self_id_count, sid)
Stefan Richterad3c0fe2008-03-20 22:04:36 +0100428#define log_ar_at_event(dir, speed, header, evt)
429
430#endif /* CONFIG_FIREWIRE_OHCI_DEBUG */
431
Adrian Bunk95688e92007-01-22 19:17:37 +0100432static inline void reg_write(const struct fw_ohci *ohci, int offset, u32 data)
Kristian Høgsberged568912006-12-19 19:58:35 -0500433{
434 writel(data, ohci->registers + offset);
435}
436
Adrian Bunk95688e92007-01-22 19:17:37 +0100437static inline u32 reg_read(const struct fw_ohci *ohci, int offset)
Kristian Høgsberged568912006-12-19 19:58:35 -0500438{
439 return readl(ohci->registers + offset);
440}
441
Adrian Bunk95688e92007-01-22 19:17:37 +0100442static inline void flush_writes(const struct fw_ohci *ohci)
Kristian Høgsberged568912006-12-19 19:58:35 -0500443{
444 /* Do a dummy read to flush writes. */
445 reg_read(ohci, OHCI1394_Version);
446}
447
448static int
449ohci_update_phy_reg(struct fw_card *card, int addr,
450 int clear_bits, int set_bits)
451{
452 struct fw_ohci *ohci = fw_ohci(card);
453 u32 val, old;
454
455 reg_write(ohci, OHCI1394_PhyControl, OHCI1394_PhyControl_Read(addr));
Stefan Richter362e9012007-07-12 22:24:19 +0200456 flush_writes(ohci);
Kristian Høgsberged568912006-12-19 19:58:35 -0500457 msleep(2);
458 val = reg_read(ohci, OHCI1394_PhyControl);
459 if ((val & OHCI1394_PhyControl_ReadDone) == 0) {
460 fw_error("failed to set phy reg bits.\n");
461 return -EBUSY;
462 }
463
464 old = OHCI1394_PhyControl_ReadData(val);
465 old = (old & ~clear_bits) | set_bits;
466 reg_write(ohci, OHCI1394_PhyControl,
467 OHCI1394_PhyControl_Write(addr, old));
468
469 return 0;
470}
471
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500472static int ar_context_add_page(struct ar_context *ctx)
Kristian Høgsberged568912006-12-19 19:58:35 -0500473{
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500474 struct device *dev = ctx->ohci->card.device;
475 struct ar_buffer *ab;
Stefan Richterf5101d582008-03-14 00:27:49 +0100476 dma_addr_t uninitialized_var(ab_bus);
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500477 size_t offset;
478
Jarod Wilsonbde17092008-03-12 17:43:26 -0400479 ab = dma_alloc_coherent(dev, PAGE_SIZE, &ab_bus, GFP_ATOMIC);
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500480 if (ab == NULL)
481 return -ENOMEM;
482
Kristian Høgsberg2d826cc2007-05-09 19:23:14 -0400483 memset(&ab->descriptor, 0, sizeof(ab->descriptor));
Kristian Høgsberga77754a2007-05-07 20:33:35 -0400484 ab->descriptor.control = cpu_to_le16(DESCRIPTOR_INPUT_MORE |
485 DESCRIPTOR_STATUS |
486 DESCRIPTOR_BRANCH_ALWAYS);
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500487 offset = offsetof(struct ar_buffer, data);
488 ab->descriptor.req_count = cpu_to_le16(PAGE_SIZE - offset);
489 ab->descriptor.data_address = cpu_to_le32(ab_bus + offset);
490 ab->descriptor.res_count = cpu_to_le16(PAGE_SIZE - offset);
491 ab->descriptor.branch_address = 0;
492
Kristian Høgsbergec839e42007-05-22 18:55:48 -0400493 ctx->last_buffer->descriptor.branch_address = cpu_to_le32(ab_bus | 1);
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500494 ctx->last_buffer->next = ab;
495 ctx->last_buffer = ab;
496
Kristian Høgsberga77754a2007-05-07 20:33:35 -0400497 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE);
Kristian Høgsberged568912006-12-19 19:58:35 -0500498 flush_writes(ctx->ohci);
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500499
500 return 0;
Kristian Høgsberged568912006-12-19 19:58:35 -0500501}
502
Stefan Richter11bf20a2008-03-01 02:47:15 +0100503#if defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32)
504#define cond_le32_to_cpu(v) \
505 (ohci->old_uninorth ? (__force __u32)(v) : le32_to_cpu(v))
506#else
507#define cond_le32_to_cpu(v) le32_to_cpu(v)
508#endif
509
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500510static __le32 *handle_ar_packet(struct ar_context *ctx, __le32 *buffer)
Kristian Høgsberged568912006-12-19 19:58:35 -0500511{
Kristian Høgsberged568912006-12-19 19:58:35 -0500512 struct fw_ohci *ohci = ctx->ohci;
Kristian Høgsberg2639a6f2007-01-26 00:37:57 -0500513 struct fw_packet p;
514 u32 status, length, tcode;
Stefan Richter43286562008-03-11 21:22:26 +0100515 int evt;
Kristian Høgsberg0edeefd2007-01-26 00:38:49 -0500516
Stefan Richter11bf20a2008-03-01 02:47:15 +0100517 p.header[0] = cond_le32_to_cpu(buffer[0]);
518 p.header[1] = cond_le32_to_cpu(buffer[1]);
519 p.header[2] = cond_le32_to_cpu(buffer[2]);
Kristian Høgsberg2639a6f2007-01-26 00:37:57 -0500520
521 tcode = (p.header[0] >> 4) & 0x0f;
522 switch (tcode) {
523 case TCODE_WRITE_QUADLET_REQUEST:
524 case TCODE_READ_QUADLET_RESPONSE:
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500525 p.header[3] = (__force __u32) buffer[3];
Kristian Høgsberg2639a6f2007-01-26 00:37:57 -0500526 p.header_length = 16;
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500527 p.payload_length = 0;
528 break;
529
530 case TCODE_READ_BLOCK_REQUEST :
Stefan Richter11bf20a2008-03-01 02:47:15 +0100531 p.header[3] = cond_le32_to_cpu(buffer[3]);
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500532 p.header_length = 16;
533 p.payload_length = 0;
Kristian Høgsberg2639a6f2007-01-26 00:37:57 -0500534 break;
535
536 case TCODE_WRITE_BLOCK_REQUEST:
Kristian Høgsberg2639a6f2007-01-26 00:37:57 -0500537 case TCODE_READ_BLOCK_RESPONSE:
538 case TCODE_LOCK_REQUEST:
539 case TCODE_LOCK_RESPONSE:
Stefan Richter11bf20a2008-03-01 02:47:15 +0100540 p.header[3] = cond_le32_to_cpu(buffer[3]);
Kristian Høgsberg2639a6f2007-01-26 00:37:57 -0500541 p.header_length = 16;
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500542 p.payload_length = p.header[3] >> 16;
Kristian Høgsberg2639a6f2007-01-26 00:37:57 -0500543 break;
544
545 case TCODE_WRITE_RESPONSE:
546 case TCODE_READ_QUADLET_REQUEST:
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500547 case OHCI_TCODE_PHY_PACKET:
Kristian Høgsberg2639a6f2007-01-26 00:37:57 -0500548 p.header_length = 12;
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500549 p.payload_length = 0;
Kristian Høgsberg2639a6f2007-01-26 00:37:57 -0500550 break;
551 }
552
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500553 p.payload = (void *) buffer + p.header_length;
554
555 /* FIXME: What to do about evt_* errors? */
556 length = (p.header_length + p.payload_length + 3) / 4;
Stefan Richter11bf20a2008-03-01 02:47:15 +0100557 status = cond_le32_to_cpu(buffer[length]);
Stefan Richter43286562008-03-11 21:22:26 +0100558 evt = (status >> 16) & 0x1f;
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500559
Stefan Richter43286562008-03-11 21:22:26 +0100560 p.ack = evt - 16;
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500561 p.speed = (status >> 21) & 0x7;
562 p.timestamp = status & 0xffff;
563 p.generation = ohci->request_generation;
Kristian Høgsberged568912006-12-19 19:58:35 -0500564
Stefan Richter43286562008-03-11 21:22:26 +0100565 log_ar_at_event('R', p.speed, p.header, evt);
Stefan Richterad3c0fe2008-03-20 22:04:36 +0100566
Kristian Høgsbergc781c062007-05-07 20:33:32 -0400567 /*
568 * The OHCI bus reset handler synthesizes a phy packet with
Kristian Høgsberged568912006-12-19 19:58:35 -0500569 * the new generation number when a bus reset happens (see
570 * section 8.4.2.3). This helps us determine when a request
571 * was received and make sure we send the response in the same
572 * generation. We only need this for requests; for responses
573 * we use the unique tlabel for finding the matching
Kristian Høgsbergc781c062007-05-07 20:33:32 -0400574 * request.
Stefan Richterd34316a2008-04-12 22:31:25 +0200575 *
576 * Alas some chips sometimes emit bus reset packets with a
577 * wrong generation. We set the correct generation for these
578 * at a slightly incorrect time (in bus_reset_tasklet).
Kristian Høgsbergc781c062007-05-07 20:33:32 -0400579 */
Stefan Richterd34316a2008-04-12 22:31:25 +0200580 if (evt == OHCI1394_evt_bus_reset) {
581 if (!ohci->bus_reset_packet_quirk)
582 ohci->request_generation = (p.header[2] >> 16) & 0xff;
583 } else if (ctx == &ohci->ar_request_ctx) {
Kristian Høgsberg2639a6f2007-01-26 00:37:57 -0500584 fw_core_handle_request(&ohci->card, &p);
Stefan Richterd34316a2008-04-12 22:31:25 +0200585 } else {
Kristian Høgsberg2639a6f2007-01-26 00:37:57 -0500586 fw_core_handle_response(&ohci->card, &p);
Stefan Richterd34316a2008-04-12 22:31:25 +0200587 }
Kristian Høgsberged568912006-12-19 19:58:35 -0500588
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500589 return buffer + length + 1;
590}
Kristian Høgsberged568912006-12-19 19:58:35 -0500591
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500592static void ar_context_tasklet(unsigned long data)
593{
594 struct ar_context *ctx = (struct ar_context *)data;
595 struct fw_ohci *ohci = ctx->ohci;
596 struct ar_buffer *ab;
597 struct descriptor *d;
598 void *buffer, *end;
Kristian Høgsberged568912006-12-19 19:58:35 -0500599
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500600 ab = ctx->current_buffer;
601 d = &ab->descriptor;
Kristian Høgsberged568912006-12-19 19:58:35 -0500602
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500603 if (d->res_count == 0) {
604 size_t size, rest, offset;
Jarod Wilson6b842362008-03-25 16:47:16 -0400605 dma_addr_t start_bus;
606 void *start;
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500607
Kristian Høgsbergc781c062007-05-07 20:33:32 -0400608 /*
609 * This descriptor is finished and we may have a
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500610 * packet split across this and the next buffer. We
Kristian Høgsbergc781c062007-05-07 20:33:32 -0400611 * reuse the page for reassembling the split packet.
612 */
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500613
614 offset = offsetof(struct ar_buffer, data);
Jarod Wilson6b842362008-03-25 16:47:16 -0400615 start = buffer = ab;
616 start_bus = le32_to_cpu(ab->descriptor.data_address) - offset;
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500617
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500618 ab = ab->next;
619 d = &ab->descriptor;
620 size = buffer + PAGE_SIZE - ctx->pointer;
621 rest = le16_to_cpu(d->req_count) - le16_to_cpu(d->res_count);
622 memmove(buffer, ctx->pointer, size);
623 memcpy(buffer + size, ab->data, rest);
624 ctx->current_buffer = ab;
625 ctx->pointer = (void *) ab->data + rest;
626 end = buffer + size + rest;
627
628 while (buffer < end)
629 buffer = handle_ar_packet(ctx, buffer);
630
Jarod Wilsonbde17092008-03-12 17:43:26 -0400631 dma_free_coherent(ohci->card.device, PAGE_SIZE,
Jarod Wilson6b842362008-03-25 16:47:16 -0400632 start, start_bus);
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500633 ar_context_add_page(ctx);
634 } else {
635 buffer = ctx->pointer;
636 ctx->pointer = end =
637 (void *) ab + PAGE_SIZE - le16_to_cpu(d->res_count);
638
639 while (buffer < end)
640 buffer = handle_ar_packet(ctx, buffer);
641 }
Kristian Høgsberged568912006-12-19 19:58:35 -0500642}
643
644static int
Kristian Høgsberg72e318e2007-02-06 14:49:31 -0500645ar_context_init(struct ar_context *ctx, struct fw_ohci *ohci, u32 regs)
Kristian Høgsberged568912006-12-19 19:58:35 -0500646{
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500647 struct ar_buffer ab;
Kristian Høgsberged568912006-12-19 19:58:35 -0500648
Kristian Høgsberg72e318e2007-02-06 14:49:31 -0500649 ctx->regs = regs;
650 ctx->ohci = ohci;
651 ctx->last_buffer = &ab;
Kristian Høgsberged568912006-12-19 19:58:35 -0500652 tasklet_init(&ctx->tasklet, ar_context_tasklet, (unsigned long)ctx);
653
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500654 ar_context_add_page(ctx);
655 ar_context_add_page(ctx);
656 ctx->current_buffer = ab.next;
657 ctx->pointer = ctx->current_buffer->data;
658
Kristian Høgsberg2aef4692007-05-30 19:06:35 -0400659 return 0;
660}
661
662static void ar_context_run(struct ar_context *ctx)
663{
664 struct ar_buffer *ab = ctx->current_buffer;
665 dma_addr_t ab_bus;
666 size_t offset;
667
668 offset = offsetof(struct ar_buffer, data);
Stefan Richter0a9972b2007-06-23 20:28:17 +0200669 ab_bus = le32_to_cpu(ab->descriptor.data_address) - offset;
Kristian Høgsberg2aef4692007-05-30 19:06:35 -0400670
671 reg_write(ctx->ohci, COMMAND_PTR(ctx->regs), ab_bus | 1);
Kristian Høgsberga77754a2007-05-07 20:33:35 -0400672 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN);
Kristian Høgsberg32b46092007-02-06 14:49:30 -0500673 flush_writes(ctx->ohci);
Kristian Høgsberged568912006-12-19 19:58:35 -0500674}
Stefan Richter373b2ed2007-03-04 14:45:18 +0100675
Jarod Wilsona186b4a2007-12-03 13:43:12 -0500676static struct descriptor *
677find_branch_descriptor(struct descriptor *d, int z)
678{
679 int b, key;
680
681 b = (le16_to_cpu(d->control) & DESCRIPTOR_BRANCH_ALWAYS) >> 2;
682 key = (le16_to_cpu(d->control) & DESCRIPTOR_KEY_IMMEDIATE) >> 8;
683
684 /* figure out which descriptor the branch address goes in */
685 if (z == 2 && (b == 3 || key == 2))
686 return d;
687 else
688 return d + z - 1;
689}
690
Kristian Høgsberg30200732007-02-16 17:34:39 -0500691static void context_tasklet(unsigned long data)
692{
693 struct context *ctx = (struct context *) data;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500694 struct descriptor *d, *last;
695 u32 address;
696 int z;
David Moorefe5ca632008-01-06 17:21:41 -0500697 struct descriptor_buffer *desc;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500698
David Moorefe5ca632008-01-06 17:21:41 -0500699 desc = list_entry(ctx->buffer_list.next,
700 struct descriptor_buffer, list);
701 last = ctx->last;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500702 while (last->branch_address != 0) {
David Moorefe5ca632008-01-06 17:21:41 -0500703 struct descriptor_buffer *old_desc = desc;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500704 address = le32_to_cpu(last->branch_address);
705 z = address & 0xf;
David Moorefe5ca632008-01-06 17:21:41 -0500706 address &= ~0xf;
707
708 /* If the branch address points to a buffer outside of the
709 * current buffer, advance to the next buffer. */
710 if (address < desc->buffer_bus ||
711 address >= desc->buffer_bus + desc->used)
712 desc = list_entry(desc->list.next,
713 struct descriptor_buffer, list);
714 d = desc->buffer + (address - desc->buffer_bus) / sizeof(*d);
Jarod Wilsona186b4a2007-12-03 13:43:12 -0500715 last = find_branch_descriptor(d, z);
Kristian Høgsberg30200732007-02-16 17:34:39 -0500716
717 if (!ctx->callback(ctx, d, last))
718 break;
719
David Moorefe5ca632008-01-06 17:21:41 -0500720 if (old_desc != desc) {
721 /* If we've advanced to the next buffer, move the
722 * previous buffer to the free list. */
723 unsigned long flags;
724 old_desc->used = 0;
725 spin_lock_irqsave(&ctx->ohci->lock, flags);
726 list_move_tail(&old_desc->list, &ctx->buffer_list);
727 spin_unlock_irqrestore(&ctx->ohci->lock, flags);
728 }
729 ctx->last = last;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500730 }
731}
732
David Moorefe5ca632008-01-06 17:21:41 -0500733/*
734 * Allocate a new buffer and add it to the list of free buffers for this
735 * context. Must be called with ohci->lock held.
736 */
737static int
738context_add_buffer(struct context *ctx)
739{
740 struct descriptor_buffer *desc;
Stefan Richterf5101d582008-03-14 00:27:49 +0100741 dma_addr_t uninitialized_var(bus_addr);
David Moorefe5ca632008-01-06 17:21:41 -0500742 int offset;
743
744 /*
745 * 16MB of descriptors should be far more than enough for any DMA
746 * program. This will catch run-away userspace or DoS attacks.
747 */
748 if (ctx->total_allocation >= 16*1024*1024)
749 return -ENOMEM;
750
751 desc = dma_alloc_coherent(ctx->ohci->card.device, PAGE_SIZE,
752 &bus_addr, GFP_ATOMIC);
753 if (!desc)
754 return -ENOMEM;
755
756 offset = (void *)&desc->buffer - (void *)desc;
757 desc->buffer_size = PAGE_SIZE - offset;
758 desc->buffer_bus = bus_addr + offset;
759 desc->used = 0;
760
761 list_add_tail(&desc->list, &ctx->buffer_list);
762 ctx->total_allocation += PAGE_SIZE;
763
764 return 0;
765}
766
Kristian Høgsberg30200732007-02-16 17:34:39 -0500767static int
768context_init(struct context *ctx, struct fw_ohci *ohci,
David Moorefe5ca632008-01-06 17:21:41 -0500769 u32 regs, descriptor_callback_t callback)
Kristian Høgsberg30200732007-02-16 17:34:39 -0500770{
771 ctx->ohci = ohci;
772 ctx->regs = regs;
David Moorefe5ca632008-01-06 17:21:41 -0500773 ctx->total_allocation = 0;
774
775 INIT_LIST_HEAD(&ctx->buffer_list);
776 if (context_add_buffer(ctx) < 0)
Kristian Høgsberg30200732007-02-16 17:34:39 -0500777 return -ENOMEM;
778
David Moorefe5ca632008-01-06 17:21:41 -0500779 ctx->buffer_tail = list_entry(ctx->buffer_list.next,
780 struct descriptor_buffer, list);
781
Kristian Høgsberg30200732007-02-16 17:34:39 -0500782 tasklet_init(&ctx->tasklet, context_tasklet, (unsigned long)ctx);
783 ctx->callback = callback;
784
Kristian Høgsbergc781c062007-05-07 20:33:32 -0400785 /*
786 * We put a dummy descriptor in the buffer that has a NULL
Kristian Høgsberg30200732007-02-16 17:34:39 -0500787 * branch address and looks like it's been sent. That way we
David Moorefe5ca632008-01-06 17:21:41 -0500788 * have a descriptor to append DMA programs to.
Kristian Høgsbergc781c062007-05-07 20:33:32 -0400789 */
David Moorefe5ca632008-01-06 17:21:41 -0500790 memset(ctx->buffer_tail->buffer, 0, sizeof(*ctx->buffer_tail->buffer));
791 ctx->buffer_tail->buffer->control = cpu_to_le16(DESCRIPTOR_OUTPUT_LAST);
792 ctx->buffer_tail->buffer->transfer_status = cpu_to_le16(0x8011);
793 ctx->buffer_tail->used += sizeof(*ctx->buffer_tail->buffer);
794 ctx->last = ctx->buffer_tail->buffer;
795 ctx->prev = ctx->buffer_tail->buffer;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500796
797 return 0;
798}
799
Kristian Høgsberg9b32d5f2007-02-16 17:34:44 -0500800static void
Kristian Høgsberg30200732007-02-16 17:34:39 -0500801context_release(struct context *ctx)
802{
803 struct fw_card *card = &ctx->ohci->card;
David Moorefe5ca632008-01-06 17:21:41 -0500804 struct descriptor_buffer *desc, *tmp;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500805
David Moorefe5ca632008-01-06 17:21:41 -0500806 list_for_each_entry_safe(desc, tmp, &ctx->buffer_list, list)
807 dma_free_coherent(card->device, PAGE_SIZE, desc,
808 desc->buffer_bus -
809 ((void *)&desc->buffer - (void *)desc));
Kristian Høgsberg30200732007-02-16 17:34:39 -0500810}
811
David Moorefe5ca632008-01-06 17:21:41 -0500812/* Must be called with ohci->lock held */
Kristian Høgsberg30200732007-02-16 17:34:39 -0500813static struct descriptor *
814context_get_descriptors(struct context *ctx, int z, dma_addr_t *d_bus)
815{
David Moorefe5ca632008-01-06 17:21:41 -0500816 struct descriptor *d = NULL;
817 struct descriptor_buffer *desc = ctx->buffer_tail;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500818
David Moorefe5ca632008-01-06 17:21:41 -0500819 if (z * sizeof(*d) > desc->buffer_size)
820 return NULL;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500821
David Moorefe5ca632008-01-06 17:21:41 -0500822 if (z * sizeof(*d) > desc->buffer_size - desc->used) {
823 /* No room for the descriptor in this buffer, so advance to the
824 * next one. */
825
826 if (desc->list.next == &ctx->buffer_list) {
827 /* If there is no free buffer next in the list,
828 * allocate one. */
829 if (context_add_buffer(ctx) < 0)
830 return NULL;
831 }
832 desc = list_entry(desc->list.next,
833 struct descriptor_buffer, list);
834 ctx->buffer_tail = desc;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500835 }
836
David Moorefe5ca632008-01-06 17:21:41 -0500837 d = desc->buffer + desc->used / sizeof(*d);
Kristian Høgsberg2d826cc2007-05-09 19:23:14 -0400838 memset(d, 0, z * sizeof(*d));
David Moorefe5ca632008-01-06 17:21:41 -0500839 *d_bus = desc->buffer_bus + desc->used;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500840
841 return d;
842}
843
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -0500844static void context_run(struct context *ctx, u32 extra)
Kristian Høgsberg30200732007-02-16 17:34:39 -0500845{
846 struct fw_ohci *ohci = ctx->ohci;
847
Kristian Høgsberga77754a2007-05-07 20:33:35 -0400848 reg_write(ohci, COMMAND_PTR(ctx->regs),
David Moorefe5ca632008-01-06 17:21:41 -0500849 le32_to_cpu(ctx->last->branch_address));
Kristian Høgsberga77754a2007-05-07 20:33:35 -0400850 reg_write(ohci, CONTROL_CLEAR(ctx->regs), ~0);
851 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN | extra);
Kristian Høgsberg30200732007-02-16 17:34:39 -0500852 flush_writes(ohci);
853}
854
855static void context_append(struct context *ctx,
856 struct descriptor *d, int z, int extra)
857{
858 dma_addr_t d_bus;
David Moorefe5ca632008-01-06 17:21:41 -0500859 struct descriptor_buffer *desc = ctx->buffer_tail;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500860
David Moorefe5ca632008-01-06 17:21:41 -0500861 d_bus = desc->buffer_bus + (d - desc->buffer) * sizeof(*d);
Kristian Høgsberg30200732007-02-16 17:34:39 -0500862
David Moorefe5ca632008-01-06 17:21:41 -0500863 desc->used += (z + extra) * sizeof(*d);
864 ctx->prev->branch_address = cpu_to_le32(d_bus | z);
865 ctx->prev = find_branch_descriptor(d, z);
Kristian Høgsberg30200732007-02-16 17:34:39 -0500866
Kristian Høgsberga77754a2007-05-07 20:33:35 -0400867 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE);
Kristian Høgsberg30200732007-02-16 17:34:39 -0500868 flush_writes(ctx->ohci);
869}
870
871static void context_stop(struct context *ctx)
872{
873 u32 reg;
Kristian Høgsbergb8295662007-02-16 17:34:42 -0500874 int i;
Kristian Høgsberg30200732007-02-16 17:34:39 -0500875
Kristian Høgsberga77754a2007-05-07 20:33:35 -0400876 reg_write(ctx->ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN);
Kristian Høgsbergb8295662007-02-16 17:34:42 -0500877 flush_writes(ctx->ohci);
Kristian Høgsberg30200732007-02-16 17:34:39 -0500878
Kristian Høgsbergb8295662007-02-16 17:34:42 -0500879 for (i = 0; i < 10; i++) {
Kristian Høgsberga77754a2007-05-07 20:33:35 -0400880 reg = reg_read(ctx->ohci, CONTROL_SET(ctx->regs));
Kristian Høgsbergb8295662007-02-16 17:34:42 -0500881 if ((reg & CONTEXT_ACTIVE) == 0)
882 break;
883
884 fw_notify("context_stop: still active (0x%08x)\n", reg);
Stefan Richterb980f5a2007-07-12 22:25:14 +0200885 mdelay(1);
Kristian Høgsbergb8295662007-02-16 17:34:42 -0500886 }
Kristian Høgsberg30200732007-02-16 17:34:39 -0500887}
Kristian Høgsberged568912006-12-19 19:58:35 -0500888
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500889struct driver_data {
Kristian Høgsberged568912006-12-19 19:58:35 -0500890 struct fw_packet *packet;
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500891};
892
Kristian Høgsbergc781c062007-05-07 20:33:32 -0400893/*
894 * This function apppends a packet to the DMA queue for transmission.
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500895 * Must always be called with the ochi->lock held to ensure proper
Kristian Høgsbergc781c062007-05-07 20:33:32 -0400896 * generation handling and locking around packet queue manipulation.
897 */
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500898static int
899at_context_queue_packet(struct context *ctx, struct fw_packet *packet)
900{
Kristian Høgsberged568912006-12-19 19:58:35 -0500901 struct fw_ohci *ohci = ctx->ohci;
Stefan Richter4b6d51e2007-10-21 11:20:07 +0200902 dma_addr_t d_bus, uninitialized_var(payload_bus);
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500903 struct driver_data *driver_data;
904 struct descriptor *d, *last;
905 __le32 *header;
Kristian Høgsberged568912006-12-19 19:58:35 -0500906 int z, tcode;
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500907 u32 reg;
Kristian Høgsberged568912006-12-19 19:58:35 -0500908
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500909 d = context_get_descriptors(ctx, 4, &d_bus);
910 if (d == NULL) {
911 packet->ack = RCODE_SEND_ERROR;
912 return -1;
Kristian Høgsberged568912006-12-19 19:58:35 -0500913 }
914
Kristian Høgsberga77754a2007-05-07 20:33:35 -0400915 d[0].control = cpu_to_le16(DESCRIPTOR_KEY_IMMEDIATE);
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500916 d[0].res_count = cpu_to_le16(packet->timestamp);
917
Kristian Høgsbergc781c062007-05-07 20:33:32 -0400918 /*
919 * The DMA format for asyncronous link packets is different
Kristian Høgsberged568912006-12-19 19:58:35 -0500920 * from the IEEE1394 layout, so shift the fields around
921 * accordingly. If header_length is 8, it's a PHY packet, to
Kristian Høgsbergc781c062007-05-07 20:33:32 -0400922 * which we need to prepend an extra quadlet.
923 */
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500924
925 header = (__le32 *) &d[1];
Kristian Høgsberged568912006-12-19 19:58:35 -0500926 if (packet->header_length > 8) {
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500927 header[0] = cpu_to_le32((packet->header[0] & 0xffff) |
928 (packet->speed << 16));
929 header[1] = cpu_to_le32((packet->header[1] & 0xffff) |
930 (packet->header[0] & 0xffff0000));
931 header[2] = cpu_to_le32(packet->header[2]);
Kristian Høgsberged568912006-12-19 19:58:35 -0500932
933 tcode = (packet->header[0] >> 4) & 0x0f;
934 if (TCODE_IS_BLOCK_PACKET(tcode))
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500935 header[3] = cpu_to_le32(packet->header[3]);
Kristian Høgsberged568912006-12-19 19:58:35 -0500936 else
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500937 header[3] = (__force __le32) packet->header[3];
938
939 d[0].req_count = cpu_to_le16(packet->header_length);
Kristian Høgsberged568912006-12-19 19:58:35 -0500940 } else {
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500941 header[0] = cpu_to_le32((OHCI1394_phy_tcode << 4) |
942 (packet->speed << 16));
943 header[1] = cpu_to_le32(packet->header[0]);
944 header[2] = cpu_to_le32(packet->header[1]);
945 d[0].req_count = cpu_to_le16(12);
Kristian Høgsberged568912006-12-19 19:58:35 -0500946 }
947
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500948 driver_data = (struct driver_data *) &d[3];
949 driver_data->packet = packet;
Kristian Høgsberg20d11672007-03-26 19:18:19 -0400950 packet->driver_data = driver_data;
Jarod Wilsona186b4a2007-12-03 13:43:12 -0500951
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500952 if (packet->payload_length > 0) {
953 payload_bus =
954 dma_map_single(ohci->card.device, packet->payload,
955 packet->payload_length, DMA_TO_DEVICE);
956 if (dma_mapping_error(payload_bus)) {
957 packet->ack = RCODE_SEND_ERROR;
958 return -1;
959 }
960
961 d[2].req_count = cpu_to_le16(packet->payload_length);
962 d[2].data_address = cpu_to_le32(payload_bus);
963 last = &d[2];
964 z = 3;
965 } else {
966 last = &d[0];
967 z = 2;
968 }
969
Kristian Høgsberga77754a2007-05-07 20:33:35 -0400970 last->control |= cpu_to_le16(DESCRIPTOR_OUTPUT_LAST |
971 DESCRIPTOR_IRQ_ALWAYS |
972 DESCRIPTOR_BRANCH_ALWAYS);
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500973
Jarod Wilson76f73ca2008-04-07 22:32:33 +0200974 /*
975 * If the controller and packet generations don't match, we need to
976 * bail out and try again. If IntEvent.busReset is set, the AT context
977 * is halted, so appending to the context and trying to run it is
978 * futile. Most controllers do the right thing and just flush the AT
979 * queue (per section 7.2.3.2 of the OHCI 1.1 specification), but
980 * some controllers (like a JMicron JMB381 PCI-e) misbehave and wind
981 * up stalling out. So we just bail out in software and try again
982 * later, and everyone is happy.
983 * FIXME: Document how the locking works.
984 */
985 if (ohci->generation != packet->generation ||
986 reg_read(ohci, OHCI1394_IntEventSet) & OHCI1394_busReset) {
Stefan Richterab88ca42007-08-29 19:40:28 +0200987 if (packet->payload_length > 0)
988 dma_unmap_single(ohci->card.device, payload_bus,
989 packet->payload_length, DMA_TO_DEVICE);
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500990 packet->ack = RCODE_GENERATION;
991 return -1;
Kristian Høgsberged568912006-12-19 19:58:35 -0500992 }
Kristian Høgsberged568912006-12-19 19:58:35 -0500993
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500994 context_append(ctx, d, z, 4 - z);
Kristian Høgsberged568912006-12-19 19:58:35 -0500995
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500996 /* If the context isn't already running, start it up. */
Kristian Høgsberga77754a2007-05-07 20:33:35 -0400997 reg = reg_read(ctx->ohci, CONTROL_SET(ctx->regs));
Kristian Høgsberg053b3082007-04-10 18:11:17 -0400998 if ((reg & CONTEXT_RUN) == 0)
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -0500999 context_run(ctx, 0);
Kristian Høgsberged568912006-12-19 19:58:35 -05001000
1001 return 0;
1002}
1003
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05001004static int handle_at_packet(struct context *context,
1005 struct descriptor *d,
1006 struct descriptor *last)
1007{
1008 struct driver_data *driver_data;
1009 struct fw_packet *packet;
1010 struct fw_ohci *ohci = context->ohci;
1011 dma_addr_t payload_bus;
1012 int evt;
1013
1014 if (last->transfer_status == 0)
1015 /* This descriptor isn't done yet, stop iteration. */
1016 return 0;
1017
1018 driver_data = (struct driver_data *) &d[3];
1019 packet = driver_data->packet;
1020 if (packet == NULL)
1021 /* This packet was cancelled, just continue. */
1022 return 1;
1023
1024 payload_bus = le32_to_cpu(last->data_address);
1025 if (payload_bus != 0)
1026 dma_unmap_single(ohci->card.device, payload_bus,
1027 packet->payload_length, DMA_TO_DEVICE);
1028
1029 evt = le16_to_cpu(last->transfer_status) & 0x1f;
1030 packet->timestamp = le16_to_cpu(last->res_count);
1031
Stefan Richterad3c0fe2008-03-20 22:04:36 +01001032 log_ar_at_event('T', packet->speed, packet->header, evt);
1033
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05001034 switch (evt) {
1035 case OHCI1394_evt_timeout:
1036 /* Async response transmit timed out. */
1037 packet->ack = RCODE_CANCELLED;
1038 break;
1039
1040 case OHCI1394_evt_flushed:
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001041 /*
1042 * The packet was flushed should give same error as
1043 * when we try to use a stale generation count.
1044 */
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05001045 packet->ack = RCODE_GENERATION;
1046 break;
1047
1048 case OHCI1394_evt_missing_ack:
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001049 /*
1050 * Using a valid (current) generation count, but the
1051 * node is not on the bus or not sending acks.
1052 */
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05001053 packet->ack = RCODE_NO_ACK;
1054 break;
1055
1056 case ACK_COMPLETE + 0x10:
1057 case ACK_PENDING + 0x10:
1058 case ACK_BUSY_X + 0x10:
1059 case ACK_BUSY_A + 0x10:
1060 case ACK_BUSY_B + 0x10:
1061 case ACK_DATA_ERROR + 0x10:
1062 case ACK_TYPE_ERROR + 0x10:
1063 packet->ack = evt - 0x10;
1064 break;
1065
1066 default:
1067 packet->ack = RCODE_SEND_ERROR;
1068 break;
1069 }
1070
1071 packet->callback(packet, &ohci->card, packet->ack);
1072
1073 return 1;
1074}
1075
Kristian Høgsberga77754a2007-05-07 20:33:35 -04001076#define HEADER_GET_DESTINATION(q) (((q) >> 16) & 0xffff)
1077#define HEADER_GET_TCODE(q) (((q) >> 4) & 0x0f)
1078#define HEADER_GET_OFFSET_HIGH(q) (((q) >> 0) & 0xffff)
1079#define HEADER_GET_DATA_LENGTH(q) (((q) >> 16) & 0xffff)
1080#define HEADER_GET_EXTENDED_TCODE(q) (((q) >> 0) & 0xffff)
Kristian Høgsberg93c4cce2007-01-26 00:38:26 -05001081
1082static void
1083handle_local_rom(struct fw_ohci *ohci, struct fw_packet *packet, u32 csr)
1084{
1085 struct fw_packet response;
1086 int tcode, length, i;
1087
Kristian Høgsberga77754a2007-05-07 20:33:35 -04001088 tcode = HEADER_GET_TCODE(packet->header[0]);
Kristian Høgsberg93c4cce2007-01-26 00:38:26 -05001089 if (TCODE_IS_BLOCK_PACKET(tcode))
Kristian Høgsberga77754a2007-05-07 20:33:35 -04001090 length = HEADER_GET_DATA_LENGTH(packet->header[3]);
Kristian Høgsberg93c4cce2007-01-26 00:38:26 -05001091 else
1092 length = 4;
1093
1094 i = csr - CSR_CONFIG_ROM;
1095 if (i + length > CONFIG_ROM_SIZE) {
1096 fw_fill_response(&response, packet->header,
1097 RCODE_ADDRESS_ERROR, NULL, 0);
1098 } else if (!TCODE_IS_READ_REQUEST(tcode)) {
1099 fw_fill_response(&response, packet->header,
1100 RCODE_TYPE_ERROR, NULL, 0);
1101 } else {
1102 fw_fill_response(&response, packet->header, RCODE_COMPLETE,
1103 (void *) ohci->config_rom + i, length);
1104 }
1105
1106 fw_core_handle_response(&ohci->card, &response);
1107}
1108
1109static void
1110handle_local_lock(struct fw_ohci *ohci, struct fw_packet *packet, u32 csr)
1111{
1112 struct fw_packet response;
1113 int tcode, length, ext_tcode, sel;
1114 __be32 *payload, lock_old;
1115 u32 lock_arg, lock_data;
1116
Kristian Høgsberga77754a2007-05-07 20:33:35 -04001117 tcode = HEADER_GET_TCODE(packet->header[0]);
1118 length = HEADER_GET_DATA_LENGTH(packet->header[3]);
Kristian Høgsberg93c4cce2007-01-26 00:38:26 -05001119 payload = packet->payload;
Kristian Høgsberga77754a2007-05-07 20:33:35 -04001120 ext_tcode = HEADER_GET_EXTENDED_TCODE(packet->header[3]);
Kristian Høgsberg93c4cce2007-01-26 00:38:26 -05001121
1122 if (tcode == TCODE_LOCK_REQUEST &&
1123 ext_tcode == EXTCODE_COMPARE_SWAP && length == 8) {
1124 lock_arg = be32_to_cpu(payload[0]);
1125 lock_data = be32_to_cpu(payload[1]);
1126 } else if (tcode == TCODE_READ_QUADLET_REQUEST) {
1127 lock_arg = 0;
1128 lock_data = 0;
1129 } else {
1130 fw_fill_response(&response, packet->header,
1131 RCODE_TYPE_ERROR, NULL, 0);
1132 goto out;
1133 }
1134
1135 sel = (csr - CSR_BUS_MANAGER_ID) / 4;
1136 reg_write(ohci, OHCI1394_CSRData, lock_data);
1137 reg_write(ohci, OHCI1394_CSRCompareData, lock_arg);
1138 reg_write(ohci, OHCI1394_CSRControl, sel);
1139
1140 if (reg_read(ohci, OHCI1394_CSRControl) & 0x80000000)
1141 lock_old = cpu_to_be32(reg_read(ohci, OHCI1394_CSRData));
1142 else
1143 fw_notify("swap not done yet\n");
1144
1145 fw_fill_response(&response, packet->header,
Kristian Høgsberg2d826cc2007-05-09 19:23:14 -04001146 RCODE_COMPLETE, &lock_old, sizeof(lock_old));
Kristian Høgsberg93c4cce2007-01-26 00:38:26 -05001147 out:
1148 fw_core_handle_response(&ohci->card, &response);
1149}
1150
1151static void
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05001152handle_local_request(struct context *ctx, struct fw_packet *packet)
Kristian Høgsberg93c4cce2007-01-26 00:38:26 -05001153{
1154 u64 offset;
1155 u32 csr;
1156
Kristian Høgsberg473d28c2007-03-07 12:12:55 -05001157 if (ctx == &ctx->ohci->at_request_ctx) {
1158 packet->ack = ACK_PENDING;
1159 packet->callback(packet, &ctx->ohci->card, packet->ack);
1160 }
Kristian Høgsberg93c4cce2007-01-26 00:38:26 -05001161
1162 offset =
1163 ((unsigned long long)
Kristian Høgsberga77754a2007-05-07 20:33:35 -04001164 HEADER_GET_OFFSET_HIGH(packet->header[1]) << 32) |
Kristian Høgsberg93c4cce2007-01-26 00:38:26 -05001165 packet->header[2];
1166 csr = offset - CSR_REGISTER_BASE;
1167
1168 /* Handle config rom reads. */
1169 if (csr >= CSR_CONFIG_ROM && csr < CSR_CONFIG_ROM_END)
1170 handle_local_rom(ctx->ohci, packet, csr);
1171 else switch (csr) {
1172 case CSR_BUS_MANAGER_ID:
1173 case CSR_BANDWIDTH_AVAILABLE:
1174 case CSR_CHANNELS_AVAILABLE_HI:
1175 case CSR_CHANNELS_AVAILABLE_LO:
1176 handle_local_lock(ctx->ohci, packet, csr);
1177 break;
1178 default:
1179 if (ctx == &ctx->ohci->at_request_ctx)
1180 fw_core_handle_request(&ctx->ohci->card, packet);
1181 else
1182 fw_core_handle_response(&ctx->ohci->card, packet);
1183 break;
1184 }
Kristian Høgsberg473d28c2007-03-07 12:12:55 -05001185
1186 if (ctx == &ctx->ohci->at_response_ctx) {
1187 packet->ack = ACK_COMPLETE;
1188 packet->callback(packet, &ctx->ohci->card, packet->ack);
1189 }
Kristian Høgsberg93c4cce2007-01-26 00:38:26 -05001190}
Kristian Høgsberge636fe22007-01-26 00:38:04 -05001191
Kristian Høgsberged568912006-12-19 19:58:35 -05001192static void
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05001193at_context_transmit(struct context *ctx, struct fw_packet *packet)
Kristian Høgsberged568912006-12-19 19:58:35 -05001194{
Kristian Høgsberged568912006-12-19 19:58:35 -05001195 unsigned long flags;
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05001196 int retval;
Kristian Høgsberged568912006-12-19 19:58:35 -05001197
1198 spin_lock_irqsave(&ctx->ohci->lock, flags);
1199
Kristian Høgsberga77754a2007-05-07 20:33:35 -04001200 if (HEADER_GET_DESTINATION(packet->header[0]) == ctx->ohci->node_id &&
Kristian Høgsberge636fe22007-01-26 00:38:04 -05001201 ctx->ohci->generation == packet->generation) {
Kristian Høgsberg93c4cce2007-01-26 00:38:26 -05001202 spin_unlock_irqrestore(&ctx->ohci->lock, flags);
1203 handle_local_request(ctx, packet);
1204 return;
Kristian Høgsberge636fe22007-01-26 00:38:04 -05001205 }
Kristian Høgsberged568912006-12-19 19:58:35 -05001206
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05001207 retval = at_context_queue_packet(ctx, packet);
Kristian Høgsberged568912006-12-19 19:58:35 -05001208 spin_unlock_irqrestore(&ctx->ohci->lock, flags);
1209
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05001210 if (retval < 0)
1211 packet->callback(packet, &ctx->ohci->card, packet->ack);
Jarod Wilsona186b4a2007-12-03 13:43:12 -05001212
Kristian Høgsberged568912006-12-19 19:58:35 -05001213}
1214
1215static void bus_reset_tasklet(unsigned long data)
1216{
1217 struct fw_ohci *ohci = (struct fw_ohci *)data;
Kristian Høgsberge636fe22007-01-26 00:38:04 -05001218 int self_id_count, i, j, reg;
Kristian Høgsberged568912006-12-19 19:58:35 -05001219 int generation, new_generation;
1220 unsigned long flags;
Stefan Richter4eaff7d2007-07-25 19:18:08 +02001221 void *free_rom = NULL;
1222 dma_addr_t free_rom_bus = 0;
Kristian Høgsberged568912006-12-19 19:58:35 -05001223
1224 reg = reg_read(ohci, OHCI1394_NodeID);
1225 if (!(reg & OHCI1394_NodeID_idValid)) {
Stefan Richter02ff8f82007-08-30 00:11:40 +02001226 fw_notify("node ID not valid, new bus reset in progress\n");
Kristian Høgsberged568912006-12-19 19:58:35 -05001227 return;
1228 }
Stefan Richter02ff8f82007-08-30 00:11:40 +02001229 if ((reg & OHCI1394_NodeID_nodeNumber) == 63) {
1230 fw_notify("malconfigured bus\n");
1231 return;
1232 }
1233 ohci->node_id = reg & (OHCI1394_NodeID_busNumber |
1234 OHCI1394_NodeID_nodeNumber);
Kristian Høgsberged568912006-12-19 19:58:35 -05001235
Stefan Richterc8a9a492008-03-19 21:40:32 +01001236 reg = reg_read(ohci, OHCI1394_SelfIDCount);
1237 if (reg & OHCI1394_SelfIDCount_selfIDError) {
1238 fw_notify("inconsistent self IDs\n");
1239 return;
1240 }
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001241 /*
1242 * The count in the SelfIDCount register is the number of
Kristian Høgsberged568912006-12-19 19:58:35 -05001243 * bytes in the self ID receive buffer. Since we also receive
1244 * the inverted quadlets and a header quadlet, we shift one
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001245 * bit extra to get the actual number of self IDs.
1246 */
Stefan Richterc8a9a492008-03-19 21:40:32 +01001247 self_id_count = (reg >> 3) & 0x3ff;
Stefan Richter016bf3d2008-03-19 22:05:02 +01001248 if (self_id_count == 0) {
1249 fw_notify("inconsistent self IDs\n");
1250 return;
1251 }
Stefan Richter11bf20a2008-03-01 02:47:15 +01001252 generation = (cond_le32_to_cpu(ohci->self_id_cpu[0]) >> 16) & 0xff;
Stefan Richteree71c2f2007-08-25 14:08:19 +02001253 rmb();
Kristian Høgsberged568912006-12-19 19:58:35 -05001254
1255 for (i = 1, j = 0; j < self_id_count; i += 2, j++) {
Stefan Richterc8a9a492008-03-19 21:40:32 +01001256 if (ohci->self_id_cpu[i] != ~ohci->self_id_cpu[i + 1]) {
1257 fw_notify("inconsistent self IDs\n");
1258 return;
1259 }
Stefan Richter11bf20a2008-03-01 02:47:15 +01001260 ohci->self_id_buffer[j] =
1261 cond_le32_to_cpu(ohci->self_id_cpu[i]);
Kristian Høgsberged568912006-12-19 19:58:35 -05001262 }
Stefan Richteree71c2f2007-08-25 14:08:19 +02001263 rmb();
Kristian Høgsberged568912006-12-19 19:58:35 -05001264
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001265 /*
1266 * Check the consistency of the self IDs we just read. The
Kristian Høgsberged568912006-12-19 19:58:35 -05001267 * problem we face is that a new bus reset can start while we
1268 * read out the self IDs from the DMA buffer. If this happens,
1269 * the DMA buffer will be overwritten with new self IDs and we
1270 * will read out inconsistent data. The OHCI specification
1271 * (section 11.2) recommends a technique similar to
1272 * linux/seqlock.h, where we remember the generation of the
1273 * self IDs in the buffer before reading them out and compare
1274 * it to the current generation after reading them out. If
1275 * the two generations match we know we have a consistent set
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001276 * of self IDs.
1277 */
Kristian Høgsberged568912006-12-19 19:58:35 -05001278
1279 new_generation = (reg_read(ohci, OHCI1394_SelfIDCount) >> 16) & 0xff;
1280 if (new_generation != generation) {
1281 fw_notify("recursive bus reset detected, "
1282 "discarding self ids\n");
1283 return;
1284 }
1285
1286 /* FIXME: Document how the locking works. */
1287 spin_lock_irqsave(&ohci->lock, flags);
1288
1289 ohci->generation = generation;
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05001290 context_stop(&ohci->at_request_ctx);
1291 context_stop(&ohci->at_response_ctx);
Kristian Høgsberged568912006-12-19 19:58:35 -05001292 reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset);
1293
Stefan Richterd34316a2008-04-12 22:31:25 +02001294 if (ohci->bus_reset_packet_quirk)
1295 ohci->request_generation = generation;
1296
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001297 /*
1298 * This next bit is unrelated to the AT context stuff but we
Kristian Høgsberged568912006-12-19 19:58:35 -05001299 * have to do it under the spinlock also. If a new config rom
1300 * was set up before this reset, the old one is now no longer
1301 * in use and we can free it. Update the config rom pointers
1302 * to point to the current config rom and clear the
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001303 * next_config_rom pointer so a new udpate can take place.
1304 */
Kristian Høgsberged568912006-12-19 19:58:35 -05001305
1306 if (ohci->next_config_rom != NULL) {
Kristian Høgsberg0bd243c2007-06-05 19:27:05 -04001307 if (ohci->next_config_rom != ohci->config_rom) {
1308 free_rom = ohci->config_rom;
1309 free_rom_bus = ohci->config_rom_bus;
1310 }
Kristian Høgsberged568912006-12-19 19:58:35 -05001311 ohci->config_rom = ohci->next_config_rom;
1312 ohci->config_rom_bus = ohci->next_config_rom_bus;
1313 ohci->next_config_rom = NULL;
1314
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001315 /*
1316 * Restore config_rom image and manually update
Kristian Høgsberged568912006-12-19 19:58:35 -05001317 * config_rom registers. Writing the header quadlet
1318 * will indicate that the config rom is ready, so we
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001319 * do that last.
1320 */
Kristian Høgsberged568912006-12-19 19:58:35 -05001321 reg_write(ohci, OHCI1394_BusOptions,
1322 be32_to_cpu(ohci->config_rom[2]));
1323 ohci->config_rom[0] = cpu_to_be32(ohci->next_header);
1324 reg_write(ohci, OHCI1394_ConfigROMhdr, ohci->next_header);
1325 }
1326
Stefan Richter080de8c2008-02-28 20:54:43 +01001327#ifdef CONFIG_FIREWIRE_OHCI_REMOTE_DMA
1328 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, ~0);
1329 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, ~0);
1330#endif
1331
Kristian Høgsberged568912006-12-19 19:58:35 -05001332 spin_unlock_irqrestore(&ohci->lock, flags);
1333
Stefan Richter4eaff7d2007-07-25 19:18:08 +02001334 if (free_rom)
1335 dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE,
1336 free_rom, free_rom_bus);
1337
Stefan Richter08ddb2f2008-04-11 00:51:15 +02001338 log_selfids(ohci->node_id, generation,
1339 self_id_count, ohci->self_id_buffer);
Stefan Richterad3c0fe2008-03-20 22:04:36 +01001340
Kristian Høgsberge636fe22007-01-26 00:38:04 -05001341 fw_core_handle_bus_reset(&ohci->card, ohci->node_id, generation,
Kristian Høgsberged568912006-12-19 19:58:35 -05001342 self_id_count, ohci->self_id_buffer);
1343}
1344
1345static irqreturn_t irq_handler(int irq, void *data)
1346{
1347 struct fw_ohci *ohci = data;
Kristian Høgsbergd60d7f12007-03-07 12:12:56 -05001348 u32 event, iso_event, cycle_time;
Kristian Høgsberged568912006-12-19 19:58:35 -05001349 int i;
1350
1351 event = reg_read(ohci, OHCI1394_IntEventClear);
1352
Stefan Richtera5159582007-06-09 19:31:14 +02001353 if (!event || !~event)
Kristian Høgsberged568912006-12-19 19:58:35 -05001354 return IRQ_NONE;
1355
Stefan Richtera007bb82008-04-07 22:33:35 +02001356 /* busReset must not be cleared yet, see OHCI 1.1 clause 7.2.3.2 */
1357 reg_write(ohci, OHCI1394_IntEventClear, event & ~OHCI1394_busReset);
Stefan Richterad3c0fe2008-03-20 22:04:36 +01001358 log_irqs(event);
Kristian Høgsberged568912006-12-19 19:58:35 -05001359
1360 if (event & OHCI1394_selfIDComplete)
1361 tasklet_schedule(&ohci->bus_reset_tasklet);
1362
1363 if (event & OHCI1394_RQPkt)
1364 tasklet_schedule(&ohci->ar_request_ctx.tasklet);
1365
1366 if (event & OHCI1394_RSPkt)
1367 tasklet_schedule(&ohci->ar_response_ctx.tasklet);
1368
1369 if (event & OHCI1394_reqTxComplete)
1370 tasklet_schedule(&ohci->at_request_ctx.tasklet);
1371
1372 if (event & OHCI1394_respTxComplete)
1373 tasklet_schedule(&ohci->at_response_ctx.tasklet);
1374
Kristian Høgsbergc8894752007-02-16 17:34:36 -05001375 iso_event = reg_read(ohci, OHCI1394_IsoRecvIntEventClear);
Kristian Høgsberged568912006-12-19 19:58:35 -05001376 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, iso_event);
1377
1378 while (iso_event) {
1379 i = ffs(iso_event) - 1;
Kristian Høgsberg30200732007-02-16 17:34:39 -05001380 tasklet_schedule(&ohci->ir_context_list[i].context.tasklet);
Kristian Høgsberged568912006-12-19 19:58:35 -05001381 iso_event &= ~(1 << i);
1382 }
1383
Kristian Høgsbergc8894752007-02-16 17:34:36 -05001384 iso_event = reg_read(ohci, OHCI1394_IsoXmitIntEventClear);
Kristian Høgsberged568912006-12-19 19:58:35 -05001385 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, iso_event);
1386
1387 while (iso_event) {
1388 i = ffs(iso_event) - 1;
Kristian Høgsberg30200732007-02-16 17:34:39 -05001389 tasklet_schedule(&ohci->it_context_list[i].context.tasklet);
Kristian Høgsberged568912006-12-19 19:58:35 -05001390 iso_event &= ~(1 << i);
1391 }
1392
Jarod Wilson75f78322008-04-03 17:18:23 -04001393 if (unlikely(event & OHCI1394_regAccessFail))
1394 fw_error("Register access failure - "
1395 "please notify linux1394-devel@lists.sf.net\n");
1396
Stefan Richtere524f6162007-08-20 21:58:30 +02001397 if (unlikely(event & OHCI1394_postedWriteErr))
1398 fw_error("PCI posted write error\n");
1399
Stefan Richterbb9f2202007-12-22 22:14:52 +01001400 if (unlikely(event & OHCI1394_cycleTooLong)) {
1401 if (printk_ratelimit())
1402 fw_notify("isochronous cycle too long\n");
1403 reg_write(ohci, OHCI1394_LinkControlSet,
1404 OHCI1394_LinkControl_cycleMaster);
1405 }
1406
Kristian Høgsbergd60d7f12007-03-07 12:12:56 -05001407 if (event & OHCI1394_cycle64Seconds) {
1408 cycle_time = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
1409 if ((cycle_time & 0x80000000) == 0)
1410 ohci->bus_seconds++;
1411 }
1412
Kristian Høgsberged568912006-12-19 19:58:35 -05001413 return IRQ_HANDLED;
1414}
1415
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04001416static int software_reset(struct fw_ohci *ohci)
1417{
1418 int i;
1419
1420 reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset);
1421
1422 for (i = 0; i < OHCI_LOOP_COUNT; i++) {
1423 if ((reg_read(ohci, OHCI1394_HCControlSet) &
1424 OHCI1394_HCControl_softReset) == 0)
1425 return 0;
1426 msleep(1);
1427 }
1428
1429 return -EBUSY;
1430}
1431
Kristian Høgsberged568912006-12-19 19:58:35 -05001432static int ohci_enable(struct fw_card *card, u32 *config_rom, size_t length)
1433{
1434 struct fw_ohci *ohci = fw_ohci(card);
1435 struct pci_dev *dev = to_pci_dev(card->device);
Jarod Wilson02214722008-03-28 10:02:50 -04001436 u32 lps;
1437 int i;
Kristian Høgsberged568912006-12-19 19:58:35 -05001438
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04001439 if (software_reset(ohci)) {
1440 fw_error("Failed to reset ohci card.\n");
1441 return -EBUSY;
1442 }
1443
1444 /*
1445 * Now enable LPS, which we need in order to start accessing
1446 * most of the registers. In fact, on some cards (ALI M5251),
1447 * accessing registers in the SClk domain without LPS enabled
1448 * will lock up the machine. Wait 50msec to make sure we have
Jarod Wilson02214722008-03-28 10:02:50 -04001449 * full link enabled. However, with some cards (well, at least
1450 * a JMicron PCIe card), we have to try again sometimes.
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04001451 */
1452 reg_write(ohci, OHCI1394_HCControlSet,
1453 OHCI1394_HCControl_LPS |
1454 OHCI1394_HCControl_postedWriteEnable);
1455 flush_writes(ohci);
Jarod Wilson02214722008-03-28 10:02:50 -04001456
1457 for (lps = 0, i = 0; !lps && i < 3; i++) {
1458 msleep(50);
1459 lps = reg_read(ohci, OHCI1394_HCControlSet) &
1460 OHCI1394_HCControl_LPS;
1461 }
1462
1463 if (!lps) {
1464 fw_error("Failed to set Link Power Status\n");
1465 return -EIO;
1466 }
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04001467
1468 reg_write(ohci, OHCI1394_HCControlClear,
1469 OHCI1394_HCControl_noByteSwapData);
1470
1471 reg_write(ohci, OHCI1394_LinkControlSet,
1472 OHCI1394_LinkControl_rcvSelfID |
1473 OHCI1394_LinkControl_cycleTimerEnable |
1474 OHCI1394_LinkControl_cycleMaster);
1475
1476 reg_write(ohci, OHCI1394_ATRetries,
1477 OHCI1394_MAX_AT_REQ_RETRIES |
1478 (OHCI1394_MAX_AT_RESP_RETRIES << 4) |
1479 (OHCI1394_MAX_PHYS_RESP_RETRIES << 8));
1480
1481 ar_context_run(&ohci->ar_request_ctx);
1482 ar_context_run(&ohci->ar_response_ctx);
1483
1484 reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus);
1485 reg_write(ohci, OHCI1394_PhyUpperBound, 0x00010000);
1486 reg_write(ohci, OHCI1394_IntEventClear, ~0);
1487 reg_write(ohci, OHCI1394_IntMaskClear, ~0);
1488 reg_write(ohci, OHCI1394_IntMaskSet,
1489 OHCI1394_selfIDComplete |
1490 OHCI1394_RQPkt | OHCI1394_RSPkt |
1491 OHCI1394_reqTxComplete | OHCI1394_respTxComplete |
1492 OHCI1394_isochRx | OHCI1394_isochTx |
Stefan Richterbb9f2202007-12-22 22:14:52 +01001493 OHCI1394_postedWriteErr | OHCI1394_cycleTooLong |
Jarod Wilson75f78322008-04-03 17:18:23 -04001494 OHCI1394_cycle64Seconds | OHCI1394_regAccessFail |
1495 OHCI1394_masterIntEnable);
Stefan Richtera007bb82008-04-07 22:33:35 +02001496 if (param_debug & OHCI_PARAM_DEBUG_BUSRESETS)
1497 reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_busReset);
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04001498
1499 /* Activate link_on bit and contender bit in our self ID packets.*/
1500 if (ohci_update_phy_reg(card, 4, 0,
1501 PHY_LINK_ACTIVE | PHY_CONTENDER) < 0)
1502 return -EIO;
1503
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001504 /*
1505 * When the link is not yet enabled, the atomic config rom
Kristian Høgsberged568912006-12-19 19:58:35 -05001506 * update mechanism described below in ohci_set_config_rom()
1507 * is not active. We have to update ConfigRomHeader and
1508 * BusOptions manually, and the write to ConfigROMmap takes
1509 * effect immediately. We tie this to the enabling of the
1510 * link, so we have a valid config rom before enabling - the
1511 * OHCI requires that ConfigROMhdr and BusOptions have valid
1512 * values before enabling.
1513 *
1514 * However, when the ConfigROMmap is written, some controllers
1515 * always read back quadlets 0 and 2 from the config rom to
1516 * the ConfigRomHeader and BusOptions registers on bus reset.
1517 * They shouldn't do that in this initial case where the link
1518 * isn't enabled. This means we have to use the same
1519 * workaround here, setting the bus header to 0 and then write
1520 * the right values in the bus reset tasklet.
1521 */
1522
Kristian Høgsberg0bd243c2007-06-05 19:27:05 -04001523 if (config_rom) {
1524 ohci->next_config_rom =
1525 dma_alloc_coherent(ohci->card.device, CONFIG_ROM_SIZE,
1526 &ohci->next_config_rom_bus,
1527 GFP_KERNEL);
1528 if (ohci->next_config_rom == NULL)
1529 return -ENOMEM;
Kristian Høgsberged568912006-12-19 19:58:35 -05001530
Kristian Høgsberg0bd243c2007-06-05 19:27:05 -04001531 memset(ohci->next_config_rom, 0, CONFIG_ROM_SIZE);
1532 fw_memcpy_to_be32(ohci->next_config_rom, config_rom, length * 4);
1533 } else {
1534 /*
1535 * In the suspend case, config_rom is NULL, which
1536 * means that we just reuse the old config rom.
1537 */
1538 ohci->next_config_rom = ohci->config_rom;
1539 ohci->next_config_rom_bus = ohci->config_rom_bus;
1540 }
Kristian Høgsberged568912006-12-19 19:58:35 -05001541
Kristian Høgsberg0bd243c2007-06-05 19:27:05 -04001542 ohci->next_header = be32_to_cpu(ohci->next_config_rom[0]);
Kristian Høgsberged568912006-12-19 19:58:35 -05001543 ohci->next_config_rom[0] = 0;
1544 reg_write(ohci, OHCI1394_ConfigROMhdr, 0);
Kristian Høgsberg0bd243c2007-06-05 19:27:05 -04001545 reg_write(ohci, OHCI1394_BusOptions,
1546 be32_to_cpu(ohci->next_config_rom[2]));
Kristian Høgsberged568912006-12-19 19:58:35 -05001547 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus);
1548
1549 reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000);
1550
1551 if (request_irq(dev->irq, irq_handler,
Thomas Gleixner65efffa2007-03-05 18:19:51 -08001552 IRQF_SHARED, ohci_driver_name, ohci)) {
Kristian Høgsberged568912006-12-19 19:58:35 -05001553 fw_error("Failed to allocate shared interrupt %d.\n",
1554 dev->irq);
1555 dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE,
1556 ohci->config_rom, ohci->config_rom_bus);
1557 return -EIO;
1558 }
1559
1560 reg_write(ohci, OHCI1394_HCControlSet,
1561 OHCI1394_HCControl_linkEnable |
1562 OHCI1394_HCControl_BIBimageValid);
1563 flush_writes(ohci);
1564
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001565 /*
1566 * We are ready to go, initiate bus reset to finish the
1567 * initialization.
1568 */
Kristian Høgsberged568912006-12-19 19:58:35 -05001569
1570 fw_core_initiate_bus_reset(&ohci->card, 1);
1571
1572 return 0;
1573}
1574
1575static int
1576ohci_set_config_rom(struct fw_card *card, u32 *config_rom, size_t length)
1577{
1578 struct fw_ohci *ohci;
1579 unsigned long flags;
Stefan Richter4eaff7d2007-07-25 19:18:08 +02001580 int retval = -EBUSY;
Kristian Høgsberged568912006-12-19 19:58:35 -05001581 __be32 *next_config_rom;
Stefan Richterf5101d582008-03-14 00:27:49 +01001582 dma_addr_t uninitialized_var(next_config_rom_bus);
Kristian Høgsberged568912006-12-19 19:58:35 -05001583
1584 ohci = fw_ohci(card);
1585
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001586 /*
1587 * When the OHCI controller is enabled, the config rom update
Kristian Høgsberged568912006-12-19 19:58:35 -05001588 * mechanism is a bit tricky, but easy enough to use. See
1589 * section 5.5.6 in the OHCI specification.
1590 *
1591 * The OHCI controller caches the new config rom address in a
1592 * shadow register (ConfigROMmapNext) and needs a bus reset
1593 * for the changes to take place. When the bus reset is
1594 * detected, the controller loads the new values for the
1595 * ConfigRomHeader and BusOptions registers from the specified
1596 * config rom and loads ConfigROMmap from the ConfigROMmapNext
1597 * shadow register. All automatically and atomically.
1598 *
1599 * Now, there's a twist to this story. The automatic load of
1600 * ConfigRomHeader and BusOptions doesn't honor the
1601 * noByteSwapData bit, so with a be32 config rom, the
1602 * controller will load be32 values in to these registers
1603 * during the atomic update, even on litte endian
1604 * architectures. The workaround we use is to put a 0 in the
1605 * header quadlet; 0 is endian agnostic and means that the
1606 * config rom isn't ready yet. In the bus reset tasklet we
1607 * then set up the real values for the two registers.
1608 *
1609 * We use ohci->lock to avoid racing with the code that sets
1610 * ohci->next_config_rom to NULL (see bus_reset_tasklet).
1611 */
1612
1613 next_config_rom =
1614 dma_alloc_coherent(ohci->card.device, CONFIG_ROM_SIZE,
1615 &next_config_rom_bus, GFP_KERNEL);
1616 if (next_config_rom == NULL)
1617 return -ENOMEM;
1618
1619 spin_lock_irqsave(&ohci->lock, flags);
1620
1621 if (ohci->next_config_rom == NULL) {
1622 ohci->next_config_rom = next_config_rom;
1623 ohci->next_config_rom_bus = next_config_rom_bus;
1624
1625 memset(ohci->next_config_rom, 0, CONFIG_ROM_SIZE);
1626 fw_memcpy_to_be32(ohci->next_config_rom, config_rom,
1627 length * 4);
1628
1629 ohci->next_header = config_rom[0];
1630 ohci->next_config_rom[0] = 0;
1631
1632 reg_write(ohci, OHCI1394_ConfigROMmap,
1633 ohci->next_config_rom_bus);
Stefan Richter4eaff7d2007-07-25 19:18:08 +02001634 retval = 0;
Kristian Høgsberged568912006-12-19 19:58:35 -05001635 }
1636
1637 spin_unlock_irqrestore(&ohci->lock, flags);
1638
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001639 /*
1640 * Now initiate a bus reset to have the changes take
Kristian Høgsberged568912006-12-19 19:58:35 -05001641 * effect. We clean up the old config rom memory and DMA
1642 * mappings in the bus reset tasklet, since the OHCI
1643 * controller could need to access it before the bus reset
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001644 * takes effect.
1645 */
Kristian Høgsberged568912006-12-19 19:58:35 -05001646 if (retval == 0)
1647 fw_core_initiate_bus_reset(&ohci->card, 1);
Stefan Richter4eaff7d2007-07-25 19:18:08 +02001648 else
1649 dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE,
1650 next_config_rom, next_config_rom_bus);
Kristian Høgsberged568912006-12-19 19:58:35 -05001651
1652 return retval;
1653}
1654
1655static void ohci_send_request(struct fw_card *card, struct fw_packet *packet)
1656{
1657 struct fw_ohci *ohci = fw_ohci(card);
1658
1659 at_context_transmit(&ohci->at_request_ctx, packet);
1660}
1661
1662static void ohci_send_response(struct fw_card *card, struct fw_packet *packet)
1663{
1664 struct fw_ohci *ohci = fw_ohci(card);
1665
1666 at_context_transmit(&ohci->at_response_ctx, packet);
1667}
1668
Kristian Høgsberg730c32f2007-02-06 14:49:32 -05001669static int ohci_cancel_packet(struct fw_card *card, struct fw_packet *packet)
1670{
1671 struct fw_ohci *ohci = fw_ohci(card);
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05001672 struct context *ctx = &ohci->at_request_ctx;
1673 struct driver_data *driver_data = packet->driver_data;
1674 int retval = -ENOENT;
Kristian Høgsberg730c32f2007-02-06 14:49:32 -05001675
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05001676 tasklet_disable(&ctx->tasklet);
Kristian Høgsberg730c32f2007-02-06 14:49:32 -05001677
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05001678 if (packet->ack != 0)
1679 goto out;
Kristian Høgsberg730c32f2007-02-06 14:49:32 -05001680
Stefan Richterad3c0fe2008-03-20 22:04:36 +01001681 log_ar_at_event('T', packet->speed, packet->header, 0x20);
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05001682 driver_data->packet = NULL;
1683 packet->ack = RCODE_CANCELLED;
1684 packet->callback(packet, &ohci->card, packet->ack);
1685 retval = 0;
Kristian Høgsberg730c32f2007-02-06 14:49:32 -05001686
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05001687 out:
1688 tasklet_enable(&ctx->tasklet);
Kristian Høgsberg730c32f2007-02-06 14:49:32 -05001689
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05001690 return retval;
Kristian Høgsberg730c32f2007-02-06 14:49:32 -05001691}
1692
Kristian Høgsberged568912006-12-19 19:58:35 -05001693static int
1694ohci_enable_phys_dma(struct fw_card *card, int node_id, int generation)
1695{
Stefan Richter080de8c2008-02-28 20:54:43 +01001696#ifdef CONFIG_FIREWIRE_OHCI_REMOTE_DMA
1697 return 0;
1698#else
Kristian Høgsberged568912006-12-19 19:58:35 -05001699 struct fw_ohci *ohci = fw_ohci(card);
1700 unsigned long flags;
Stefan Richter907293d2007-01-23 21:11:43 +01001701 int n, retval = 0;
Kristian Høgsberged568912006-12-19 19:58:35 -05001702
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001703 /*
1704 * FIXME: Make sure this bitmask is cleared when we clear the busReset
1705 * interrupt bit. Clear physReqResourceAllBuses on bus reset.
1706 */
Kristian Høgsberged568912006-12-19 19:58:35 -05001707
1708 spin_lock_irqsave(&ohci->lock, flags);
1709
1710 if (ohci->generation != generation) {
1711 retval = -ESTALE;
1712 goto out;
1713 }
1714
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001715 /*
1716 * Note, if the node ID contains a non-local bus ID, physical DMA is
1717 * enabled for _all_ nodes on remote buses.
1718 */
Stefan Richter907293d2007-01-23 21:11:43 +01001719
1720 n = (node_id & 0xffc0) == LOCAL_BUS ? node_id & 0x3f : 63;
1721 if (n < 32)
1722 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 1 << n);
1723 else
1724 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 1 << (n - 32));
1725
Kristian Høgsberged568912006-12-19 19:58:35 -05001726 flush_writes(ohci);
Kristian Høgsberged568912006-12-19 19:58:35 -05001727 out:
Stefan Richter6cad95f2007-01-21 20:46:45 +01001728 spin_unlock_irqrestore(&ohci->lock, flags);
Kristian Høgsberged568912006-12-19 19:58:35 -05001729 return retval;
Stefan Richter080de8c2008-02-28 20:54:43 +01001730#endif /* CONFIG_FIREWIRE_OHCI_REMOTE_DMA */
Kristian Høgsberged568912006-12-19 19:58:35 -05001731}
Stefan Richter373b2ed2007-03-04 14:45:18 +01001732
Kristian Høgsbergd60d7f12007-03-07 12:12:56 -05001733static u64
1734ohci_get_bus_time(struct fw_card *card)
1735{
1736 struct fw_ohci *ohci = fw_ohci(card);
1737 u32 cycle_time;
1738 u64 bus_time;
1739
1740 cycle_time = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
1741 bus_time = ((u64) ohci->bus_seconds << 32) | cycle_time;
1742
1743 return bus_time;
1744}
1745
Kristian Høgsbergd2746dc2007-02-16 17:34:46 -05001746static int handle_ir_dualbuffer_packet(struct context *context,
1747 struct descriptor *d,
1748 struct descriptor *last)
Kristian Høgsberged568912006-12-19 19:58:35 -05001749{
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05001750 struct iso_context *ctx =
1751 container_of(context, struct iso_context, context);
1752 struct db_descriptor *db = (struct db_descriptor *) d;
Kristian Høgsbergc70dc782007-03-14 17:34:53 -04001753 __le32 *ir_header;
Kristian Høgsberg9b32d5f2007-02-16 17:34:44 -05001754 size_t header_length;
Kristian Høgsbergc70dc782007-03-14 17:34:53 -04001755 void *p, *end;
1756 int i;
Kristian Høgsbergd2746dc2007-02-16 17:34:46 -05001757
Stefan Richterefbf3902008-02-23 12:24:57 +01001758 if (db->first_res_count != 0 && db->second_res_count != 0) {
David Moore0642b652007-12-19 03:09:18 -05001759 if (ctx->excess_bytes <= le16_to_cpu(db->second_req_count)) {
1760 /* This descriptor isn't done yet, stop iteration. */
1761 return 0;
1762 }
1763 ctx->excess_bytes -= le16_to_cpu(db->second_req_count);
1764 }
Kristian Høgsberged568912006-12-19 19:58:35 -05001765
Kristian Høgsbergc70dc782007-03-14 17:34:53 -04001766 header_length = le16_to_cpu(db->first_req_count) -
1767 le16_to_cpu(db->first_res_count);
1768
1769 i = ctx->header_length;
1770 p = db + 1;
1771 end = p + header_length;
1772 while (p < end && i + ctx->base.header_size <= PAGE_SIZE) {
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001773 /*
1774 * The iso header is byteswapped to little endian by
Kristian Høgsberg15536222007-04-10 18:11:16 -04001775 * the controller, but the remaining header quadlets
1776 * are big endian. We want to present all the headers
1777 * as big endian, so we have to swap the first
Kristian Høgsbergc781c062007-05-07 20:33:32 -04001778 * quadlet.
1779 */
Kristian Høgsberg15536222007-04-10 18:11:16 -04001780 *(u32 *) (ctx->header + i) = __swab32(*(u32 *) (p + 4));
1781 memcpy(ctx->header + i + 4, p + 8, ctx->base.header_size - 4);
Kristian Høgsbergc70dc782007-03-14 17:34:53 -04001782 i += ctx->base.header_size;
David Moore0642b652007-12-19 03:09:18 -05001783 ctx->excess_bytes +=
Stefan Richterefbf3902008-02-23 12:24:57 +01001784 (le32_to_cpu(*(__le32 *)(p + 4)) >> 16) & 0xffff;
Kristian Høgsbergc70dc782007-03-14 17:34:53 -04001785 p += ctx->base.header_size + 4;
1786 }
Kristian Høgsbergc70dc782007-03-14 17:34:53 -04001787 ctx->header_length = i;
Kristian Høgsberg9b32d5f2007-02-16 17:34:44 -05001788
David Moore0642b652007-12-19 03:09:18 -05001789 ctx->excess_bytes -= le16_to_cpu(db->second_req_count) -
1790 le16_to_cpu(db->second_res_count);
1791
Kristian Høgsberga77754a2007-05-07 20:33:35 -04001792 if (le16_to_cpu(db->control) & DESCRIPTOR_IRQ_ALWAYS) {
Kristian Høgsbergc70dc782007-03-14 17:34:53 -04001793 ir_header = (__le32 *) (db + 1);
1794 ctx->base.callback(&ctx->base,
1795 le32_to_cpu(ir_header[0]) & 0xffff,
Kristian Høgsberg9b32d5f2007-02-16 17:34:44 -05001796 ctx->header_length, ctx->header,
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05001797 ctx->base.callback_data);
Kristian Høgsberg9b32d5f2007-02-16 17:34:44 -05001798 ctx->header_length = 0;
1799 }
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05001800
1801 return 1;
Kristian Høgsberged568912006-12-19 19:58:35 -05001802}
1803
Jarod Wilsona186b4a2007-12-03 13:43:12 -05001804static int handle_ir_packet_per_buffer(struct context *context,
1805 struct descriptor *d,
1806 struct descriptor *last)
1807{
1808 struct iso_context *ctx =
1809 container_of(context, struct iso_context, context);
David Moorebcee8932007-12-19 15:26:38 -05001810 struct descriptor *pd;
Jarod Wilsona186b4a2007-12-03 13:43:12 -05001811 __le32 *ir_header;
David Moorebcee8932007-12-19 15:26:38 -05001812 void *p;
1813 int i;
Jarod Wilsona186b4a2007-12-03 13:43:12 -05001814
David Moorebcee8932007-12-19 15:26:38 -05001815 for (pd = d; pd <= last; pd++) {
1816 if (pd->transfer_status)
1817 break;
1818 }
1819 if (pd > last)
Jarod Wilsona186b4a2007-12-03 13:43:12 -05001820 /* Descriptor(s) not done yet, stop iteration */
1821 return 0;
1822
Jarod Wilsona186b4a2007-12-03 13:43:12 -05001823 i = ctx->header_length;
David Moorebcee8932007-12-19 15:26:38 -05001824 p = last + 1;
Jarod Wilsona186b4a2007-12-03 13:43:12 -05001825
David Moorebcee8932007-12-19 15:26:38 -05001826 if (ctx->base.header_size > 0 &&
1827 i + ctx->base.header_size <= PAGE_SIZE) {
Jarod Wilsona186b4a2007-12-03 13:43:12 -05001828 /*
1829 * The iso header is byteswapped to little endian by
1830 * the controller, but the remaining header quadlets
1831 * are big endian. We want to present all the headers
1832 * as big endian, so we have to swap the first quadlet.
1833 */
1834 *(u32 *) (ctx->header + i) = __swab32(*(u32 *) (p + 4));
1835 memcpy(ctx->header + i + 4, p + 8, ctx->base.header_size - 4);
David Moorebcee8932007-12-19 15:26:38 -05001836 ctx->header_length += ctx->base.header_size;
Jarod Wilsona186b4a2007-12-03 13:43:12 -05001837 }
1838
David Moorebcee8932007-12-19 15:26:38 -05001839 if (le16_to_cpu(last->control) & DESCRIPTOR_IRQ_ALWAYS) {
1840 ir_header = (__le32 *) p;
Jarod Wilsona186b4a2007-12-03 13:43:12 -05001841 ctx->base.callback(&ctx->base,
1842 le32_to_cpu(ir_header[0]) & 0xffff,
1843 ctx->header_length, ctx->header,
1844 ctx->base.callback_data);
1845 ctx->header_length = 0;
1846 }
1847
Jarod Wilsona186b4a2007-12-03 13:43:12 -05001848 return 1;
1849}
1850
Kristian Høgsberg30200732007-02-16 17:34:39 -05001851static int handle_it_packet(struct context *context,
1852 struct descriptor *d,
1853 struct descriptor *last)
Kristian Høgsberged568912006-12-19 19:58:35 -05001854{
Kristian Høgsberg30200732007-02-16 17:34:39 -05001855 struct iso_context *ctx =
1856 container_of(context, struct iso_context, context);
Stefan Richter373b2ed2007-03-04 14:45:18 +01001857
Kristian Høgsberg30200732007-02-16 17:34:39 -05001858 if (last->transfer_status == 0)
1859 /* This descriptor isn't done yet, stop iteration. */
1860 return 0;
Kristian Høgsberged568912006-12-19 19:58:35 -05001861
Kristian Høgsberga77754a2007-05-07 20:33:35 -04001862 if (le16_to_cpu(last->control) & DESCRIPTOR_IRQ_ALWAYS)
Kristian Høgsberg9b32d5f2007-02-16 17:34:44 -05001863 ctx->base.callback(&ctx->base, le16_to_cpu(last->res_count),
1864 0, NULL, ctx->base.callback_data);
Kristian Høgsberged568912006-12-19 19:58:35 -05001865
Kristian Høgsberg30200732007-02-16 17:34:39 -05001866 return 1;
Kristian Høgsberged568912006-12-19 19:58:35 -05001867}
1868
Kristian Høgsberg30200732007-02-16 17:34:39 -05001869static struct fw_iso_context *
Kristian Høgsbergeb0306e2007-03-14 17:34:54 -04001870ohci_allocate_iso_context(struct fw_card *card, int type, size_t header_size)
Kristian Høgsberged568912006-12-19 19:58:35 -05001871{
1872 struct fw_ohci *ohci = fw_ohci(card);
1873 struct iso_context *ctx, *list;
Kristian Høgsberg30200732007-02-16 17:34:39 -05001874 descriptor_callback_t callback;
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05001875 u32 *mask, regs;
Kristian Høgsberged568912006-12-19 19:58:35 -05001876 unsigned long flags;
Kristian Høgsberg9b32d5f2007-02-16 17:34:44 -05001877 int index, retval = -ENOMEM;
Kristian Høgsberged568912006-12-19 19:58:35 -05001878
1879 if (type == FW_ISO_CONTEXT_TRANSMIT) {
1880 mask = &ohci->it_context_mask;
1881 list = ohci->it_context_list;
Kristian Høgsberg30200732007-02-16 17:34:39 -05001882 callback = handle_it_packet;
Kristian Høgsberged568912006-12-19 19:58:35 -05001883 } else {
Stefan Richter373b2ed2007-03-04 14:45:18 +01001884 mask = &ohci->ir_context_mask;
1885 list = ohci->ir_context_list;
Jarod Wilsona186b4a2007-12-03 13:43:12 -05001886 if (ohci->version >= OHCI_VERSION_1_1)
1887 callback = handle_ir_dualbuffer_packet;
1888 else
1889 callback = handle_ir_packet_per_buffer;
Kristian Høgsberged568912006-12-19 19:58:35 -05001890 }
1891
1892 spin_lock_irqsave(&ohci->lock, flags);
1893 index = ffs(*mask) - 1;
1894 if (index >= 0)
1895 *mask &= ~(1 << index);
1896 spin_unlock_irqrestore(&ohci->lock, flags);
1897
1898 if (index < 0)
1899 return ERR_PTR(-EBUSY);
1900
Stefan Richter373b2ed2007-03-04 14:45:18 +01001901 if (type == FW_ISO_CONTEXT_TRANSMIT)
1902 regs = OHCI1394_IsoXmitContextBase(index);
1903 else
1904 regs = OHCI1394_IsoRcvContextBase(index);
1905
Kristian Høgsberged568912006-12-19 19:58:35 -05001906 ctx = &list[index];
Kristian Høgsberg2d826cc2007-05-09 19:23:14 -04001907 memset(ctx, 0, sizeof(*ctx));
Kristian Høgsberg9b32d5f2007-02-16 17:34:44 -05001908 ctx->header_length = 0;
1909 ctx->header = (void *) __get_free_page(GFP_KERNEL);
1910 if (ctx->header == NULL)
1911 goto out;
1912
David Moorefe5ca632008-01-06 17:21:41 -05001913 retval = context_init(&ctx->context, ohci, regs, callback);
Kristian Høgsberg9b32d5f2007-02-16 17:34:44 -05001914 if (retval < 0)
1915 goto out_with_header;
Kristian Høgsberged568912006-12-19 19:58:35 -05001916
1917 return &ctx->base;
Kristian Høgsberg9b32d5f2007-02-16 17:34:44 -05001918
1919 out_with_header:
1920 free_page((unsigned long)ctx->header);
1921 out:
1922 spin_lock_irqsave(&ohci->lock, flags);
1923 *mask |= 1 << index;
1924 spin_unlock_irqrestore(&ohci->lock, flags);
1925
1926 return ERR_PTR(retval);
Kristian Høgsberged568912006-12-19 19:58:35 -05001927}
1928
Kristian Høgsbergeb0306e2007-03-14 17:34:54 -04001929static int ohci_start_iso(struct fw_iso_context *base,
1930 s32 cycle, u32 sync, u32 tags)
Kristian Høgsberged568912006-12-19 19:58:35 -05001931{
Stefan Richter373b2ed2007-03-04 14:45:18 +01001932 struct iso_context *ctx = container_of(base, struct iso_context, base);
Kristian Høgsberg30200732007-02-16 17:34:39 -05001933 struct fw_ohci *ohci = ctx->context.ohci;
Kristian Høgsberg8a2f7d92007-03-28 14:26:10 -04001934 u32 control, match;
Kristian Høgsberged568912006-12-19 19:58:35 -05001935 int index;
1936
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05001937 if (ctx->base.type == FW_ISO_CONTEXT_TRANSMIT) {
1938 index = ctx - ohci->it_context_list;
Kristian Høgsberg8a2f7d92007-03-28 14:26:10 -04001939 match = 0;
1940 if (cycle >= 0)
1941 match = IT_CONTEXT_CYCLE_MATCH_ENABLE |
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05001942 (cycle & 0x7fff) << 16;
Kristian Høgsberg21efb3c2007-02-16 17:34:50 -05001943
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05001944 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 1 << index);
1945 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << index);
Kristian Høgsberg8a2f7d92007-03-28 14:26:10 -04001946 context_run(&ctx->context, match);
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05001947 } else {
1948 index = ctx - ohci->ir_context_list;
Jarod Wilsona186b4a2007-12-03 13:43:12 -05001949 control = IR_CONTEXT_ISOCH_HEADER;
1950 if (ohci->version >= OHCI_VERSION_1_1)
1951 control |= IR_CONTEXT_DUAL_BUFFER_MODE;
Kristian Høgsberg8a2f7d92007-03-28 14:26:10 -04001952 match = (tags << 28) | (sync << 8) | ctx->base.channel;
1953 if (cycle >= 0) {
1954 match |= (cycle & 0x07fff) << 12;
1955 control |= IR_CONTEXT_CYCLE_MATCH_ENABLE;
1956 }
Kristian Høgsberged568912006-12-19 19:58:35 -05001957
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05001958 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 1 << index);
1959 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1 << index);
Kristian Høgsberga77754a2007-05-07 20:33:35 -04001960 reg_write(ohci, CONTEXT_MATCH(ctx->context.regs), match);
Kristian Høgsberg8a2f7d92007-03-28 14:26:10 -04001961 context_run(&ctx->context, control);
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05001962 }
Kristian Høgsberged568912006-12-19 19:58:35 -05001963
1964 return 0;
1965}
1966
Kristian Høgsbergb8295662007-02-16 17:34:42 -05001967static int ohci_stop_iso(struct fw_iso_context *base)
1968{
1969 struct fw_ohci *ohci = fw_ohci(base->card);
Stefan Richter373b2ed2007-03-04 14:45:18 +01001970 struct iso_context *ctx = container_of(base, struct iso_context, base);
Kristian Høgsbergb8295662007-02-16 17:34:42 -05001971 int index;
1972
1973 if (ctx->base.type == FW_ISO_CONTEXT_TRANSMIT) {
1974 index = ctx - ohci->it_context_list;
1975 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 1 << index);
1976 } else {
1977 index = ctx - ohci->ir_context_list;
1978 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 1 << index);
1979 }
1980 flush_writes(ohci);
1981 context_stop(&ctx->context);
1982
1983 return 0;
1984}
1985
Kristian Høgsberged568912006-12-19 19:58:35 -05001986static void ohci_free_iso_context(struct fw_iso_context *base)
1987{
1988 struct fw_ohci *ohci = fw_ohci(base->card);
Stefan Richter373b2ed2007-03-04 14:45:18 +01001989 struct iso_context *ctx = container_of(base, struct iso_context, base);
Kristian Høgsberged568912006-12-19 19:58:35 -05001990 unsigned long flags;
1991 int index;
1992
Kristian Høgsbergb8295662007-02-16 17:34:42 -05001993 ohci_stop_iso(base);
1994 context_release(&ctx->context);
Kristian Høgsberg9b32d5f2007-02-16 17:34:44 -05001995 free_page((unsigned long)ctx->header);
Kristian Høgsbergb8295662007-02-16 17:34:42 -05001996
Kristian Høgsberged568912006-12-19 19:58:35 -05001997 spin_lock_irqsave(&ohci->lock, flags);
1998
1999 if (ctx->base.type == FW_ISO_CONTEXT_TRANSMIT) {
2000 index = ctx - ohci->it_context_list;
Kristian Høgsberged568912006-12-19 19:58:35 -05002001 ohci->it_context_mask |= 1 << index;
2002 } else {
2003 index = ctx - ohci->ir_context_list;
Kristian Høgsberged568912006-12-19 19:58:35 -05002004 ohci->ir_context_mask |= 1 << index;
2005 }
Kristian Høgsberged568912006-12-19 19:58:35 -05002006
2007 spin_unlock_irqrestore(&ohci->lock, flags);
2008}
2009
2010static int
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05002011ohci_queue_iso_transmit(struct fw_iso_context *base,
2012 struct fw_iso_packet *packet,
2013 struct fw_iso_buffer *buffer,
2014 unsigned long payload)
Kristian Høgsberged568912006-12-19 19:58:35 -05002015{
Stefan Richter373b2ed2007-03-04 14:45:18 +01002016 struct iso_context *ctx = container_of(base, struct iso_context, base);
Kristian Høgsberg30200732007-02-16 17:34:39 -05002017 struct descriptor *d, *last, *pd;
Kristian Høgsberged568912006-12-19 19:58:35 -05002018 struct fw_iso_packet *p;
2019 __le32 *header;
Kristian Høgsberg9aad8122007-02-16 17:34:38 -05002020 dma_addr_t d_bus, page_bus;
Kristian Høgsberged568912006-12-19 19:58:35 -05002021 u32 z, header_z, payload_z, irq;
2022 u32 payload_index, payload_end_index, next_page_index;
Kristian Høgsberg30200732007-02-16 17:34:39 -05002023 int page, end_page, i, length, offset;
Kristian Høgsberged568912006-12-19 19:58:35 -05002024
Kristian Høgsbergc781c062007-05-07 20:33:32 -04002025 /*
2026 * FIXME: Cycle lost behavior should be configurable: lose
2027 * packet, retransmit or terminate..
2028 */
Kristian Høgsberged568912006-12-19 19:58:35 -05002029
2030 p = packet;
Kristian Høgsberg9aad8122007-02-16 17:34:38 -05002031 payload_index = payload;
Kristian Høgsberged568912006-12-19 19:58:35 -05002032
2033 if (p->skip)
2034 z = 1;
2035 else
2036 z = 2;
2037 if (p->header_length > 0)
2038 z++;
2039
2040 /* Determine the first page the payload isn't contained in. */
2041 end_page = PAGE_ALIGN(payload_index + p->payload_length) >> PAGE_SHIFT;
2042 if (p->payload_length > 0)
2043 payload_z = end_page - (payload_index >> PAGE_SHIFT);
2044 else
2045 payload_z = 0;
2046
2047 z += payload_z;
2048
2049 /* Get header size in number of descriptors. */
Kristian Høgsberg2d826cc2007-05-09 19:23:14 -04002050 header_z = DIV_ROUND_UP(p->header_length, sizeof(*d));
Kristian Høgsberged568912006-12-19 19:58:35 -05002051
Kristian Høgsberg30200732007-02-16 17:34:39 -05002052 d = context_get_descriptors(&ctx->context, z + header_z, &d_bus);
2053 if (d == NULL)
2054 return -ENOMEM;
Kristian Høgsberged568912006-12-19 19:58:35 -05002055
2056 if (!p->skip) {
Kristian Høgsberga77754a2007-05-07 20:33:35 -04002057 d[0].control = cpu_to_le16(DESCRIPTOR_KEY_IMMEDIATE);
Kristian Høgsberged568912006-12-19 19:58:35 -05002058 d[0].req_count = cpu_to_le16(8);
2059
2060 header = (__le32 *) &d[1];
Kristian Høgsberga77754a2007-05-07 20:33:35 -04002061 header[0] = cpu_to_le32(IT_HEADER_SY(p->sy) |
2062 IT_HEADER_TAG(p->tag) |
2063 IT_HEADER_TCODE(TCODE_STREAM_DATA) |
2064 IT_HEADER_CHANNEL(ctx->base.channel) |
2065 IT_HEADER_SPEED(ctx->base.speed));
Kristian Høgsberged568912006-12-19 19:58:35 -05002066 header[1] =
Kristian Høgsberga77754a2007-05-07 20:33:35 -04002067 cpu_to_le32(IT_HEADER_DATA_LENGTH(p->header_length +
Kristian Høgsberged568912006-12-19 19:58:35 -05002068 p->payload_length));
2069 }
2070
2071 if (p->header_length > 0) {
2072 d[2].req_count = cpu_to_le16(p->header_length);
Kristian Høgsberg2d826cc2007-05-09 19:23:14 -04002073 d[2].data_address = cpu_to_le32(d_bus + z * sizeof(*d));
Kristian Høgsberged568912006-12-19 19:58:35 -05002074 memcpy(&d[z], p->header, p->header_length);
2075 }
2076
2077 pd = d + z - payload_z;
2078 payload_end_index = payload_index + p->payload_length;
2079 for (i = 0; i < payload_z; i++) {
2080 page = payload_index >> PAGE_SHIFT;
2081 offset = payload_index & ~PAGE_MASK;
2082 next_page_index = (page + 1) << PAGE_SHIFT;
2083 length =
2084 min(next_page_index, payload_end_index) - payload_index;
2085 pd[i].req_count = cpu_to_le16(length);
Kristian Høgsberg9aad8122007-02-16 17:34:38 -05002086
2087 page_bus = page_private(buffer->pages[page]);
2088 pd[i].data_address = cpu_to_le32(page_bus + offset);
Kristian Høgsberged568912006-12-19 19:58:35 -05002089
2090 payload_index += length;
2091 }
2092
Kristian Høgsberged568912006-12-19 19:58:35 -05002093 if (p->interrupt)
Kristian Høgsberga77754a2007-05-07 20:33:35 -04002094 irq = DESCRIPTOR_IRQ_ALWAYS;
Kristian Høgsberged568912006-12-19 19:58:35 -05002095 else
Kristian Høgsberga77754a2007-05-07 20:33:35 -04002096 irq = DESCRIPTOR_NO_IRQ;
Kristian Høgsberged568912006-12-19 19:58:35 -05002097
Kristian Høgsberg30200732007-02-16 17:34:39 -05002098 last = z == 2 ? d : d + z - 1;
Kristian Høgsberga77754a2007-05-07 20:33:35 -04002099 last->control |= cpu_to_le16(DESCRIPTOR_OUTPUT_LAST |
2100 DESCRIPTOR_STATUS |
2101 DESCRIPTOR_BRANCH_ALWAYS |
Kristian Høgsbergcbb59da2007-02-16 17:34:35 -05002102 irq);
Kristian Høgsberged568912006-12-19 19:58:35 -05002103
Kristian Høgsberg30200732007-02-16 17:34:39 -05002104 context_append(&ctx->context, d, z, header_z);
Kristian Høgsberged568912006-12-19 19:58:35 -05002105
2106 return 0;
2107}
Stefan Richter373b2ed2007-03-04 14:45:18 +01002108
Kristian Høgsberg98b6cbe2007-02-16 17:34:51 -05002109static int
Kristian Høgsbergd2746dc2007-02-16 17:34:46 -05002110ohci_queue_iso_receive_dualbuffer(struct fw_iso_context *base,
2111 struct fw_iso_packet *packet,
2112 struct fw_iso_buffer *buffer,
2113 unsigned long payload)
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05002114{
2115 struct iso_context *ctx = container_of(base, struct iso_context, base);
2116 struct db_descriptor *db = NULL;
2117 struct descriptor *d;
2118 struct fw_iso_packet *p;
2119 dma_addr_t d_bus, page_bus;
2120 u32 z, header_z, length, rest;
Kristian Høgsbergc70dc782007-03-14 17:34:53 -04002121 int page, offset, packet_count, header_size;
Stefan Richter373b2ed2007-03-04 14:45:18 +01002122
Kristian Høgsbergc781c062007-05-07 20:33:32 -04002123 /*
2124 * FIXME: Cycle lost behavior should be configurable: lose
2125 * packet, retransmit or terminate..
2126 */
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05002127
2128 p = packet;
2129 z = 2;
2130
Kristian Høgsbergc781c062007-05-07 20:33:32 -04002131 /*
2132 * The OHCI controller puts the status word in the header
2133 * buffer too, so we need 4 extra bytes per packet.
2134 */
Kristian Høgsbergc70dc782007-03-14 17:34:53 -04002135 packet_count = p->header_length / ctx->base.header_size;
2136 header_size = packet_count * (ctx->base.header_size + 4);
2137
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05002138 /* Get header size in number of descriptors. */
Kristian Høgsberg2d826cc2007-05-09 19:23:14 -04002139 header_z = DIV_ROUND_UP(header_size, sizeof(*d));
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05002140 page = payload >> PAGE_SHIFT;
2141 offset = payload & ~PAGE_MASK;
2142 rest = p->payload_length;
2143
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05002144 /* FIXME: make packet-per-buffer/dual-buffer a context option */
2145 while (rest > 0) {
2146 d = context_get_descriptors(&ctx->context,
2147 z + header_z, &d_bus);
2148 if (d == NULL)
2149 return -ENOMEM;
2150
2151 db = (struct db_descriptor *) d;
Kristian Høgsberga77754a2007-05-07 20:33:35 -04002152 db->control = cpu_to_le16(DESCRIPTOR_STATUS |
2153 DESCRIPTOR_BRANCH_ALWAYS);
Kristian Høgsbergc70dc782007-03-14 17:34:53 -04002154 db->first_size = cpu_to_le16(ctx->base.header_size + 4);
David Moore0642b652007-12-19 03:09:18 -05002155 if (p->skip && rest == p->payload_length) {
2156 db->control |= cpu_to_le16(DESCRIPTOR_WAIT);
2157 db->first_req_count = db->first_size;
2158 } else {
2159 db->first_req_count = cpu_to_le16(header_size);
2160 }
Kristian Høgsberg1e1d1962007-02-16 17:34:45 -05002161 db->first_res_count = db->first_req_count;
Kristian Høgsberg2d826cc2007-05-09 19:23:14 -04002162 db->first_buffer = cpu_to_le32(d_bus + sizeof(*db));
Stefan Richter373b2ed2007-03-04 14:45:18 +01002163
David Moore0642b652007-12-19 03:09:18 -05002164 if (p->skip && rest == p->payload_length)
2165 length = 4;
2166 else if (offset + rest < PAGE_SIZE)
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05002167 length = rest;
2168 else
2169 length = PAGE_SIZE - offset;
2170
Kristian Høgsberg1e1d1962007-02-16 17:34:45 -05002171 db->second_req_count = cpu_to_le16(length);
2172 db->second_res_count = db->second_req_count;
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05002173 page_bus = page_private(buffer->pages[page]);
2174 db->second_buffer = cpu_to_le32(page_bus + offset);
2175
Kristian Høgsbergcb2d2cd2007-02-16 17:34:47 -05002176 if (p->interrupt && length == rest)
Kristian Høgsberga77754a2007-05-07 20:33:35 -04002177 db->control |= cpu_to_le16(DESCRIPTOR_IRQ_ALWAYS);
Kristian Høgsbergcb2d2cd2007-02-16 17:34:47 -05002178
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05002179 context_append(&ctx->context, d, z, header_z);
2180 offset = (offset + length) & ~PAGE_MASK;
2181 rest -= length;
David Moore0642b652007-12-19 03:09:18 -05002182 if (offset == 0)
2183 page++;
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05002184 }
2185
Kristian Høgsbergd2746dc2007-02-16 17:34:46 -05002186 return 0;
2187}
Kristian Høgsberg21efb3c2007-02-16 17:34:50 -05002188
Kristian Høgsbergd2746dc2007-02-16 17:34:46 -05002189static int
Jarod Wilsona186b4a2007-12-03 13:43:12 -05002190ohci_queue_iso_receive_packet_per_buffer(struct fw_iso_context *base,
2191 struct fw_iso_packet *packet,
2192 struct fw_iso_buffer *buffer,
2193 unsigned long payload)
2194{
2195 struct iso_context *ctx = container_of(base, struct iso_context, base);
2196 struct descriptor *d = NULL, *pd = NULL;
David Moorebcee8932007-12-19 15:26:38 -05002197 struct fw_iso_packet *p = packet;
Jarod Wilsona186b4a2007-12-03 13:43:12 -05002198 dma_addr_t d_bus, page_bus;
2199 u32 z, header_z, rest;
David Moorebcee8932007-12-19 15:26:38 -05002200 int i, j, length;
2201 int page, offset, packet_count, header_size, payload_per_buffer;
Jarod Wilsona186b4a2007-12-03 13:43:12 -05002202
2203 /*
2204 * The OHCI controller puts the status word in the
2205 * buffer too, so we need 4 extra bytes per packet.
2206 */
2207 packet_count = p->header_length / ctx->base.header_size;
David Moorebcee8932007-12-19 15:26:38 -05002208 header_size = ctx->base.header_size + 4;
Jarod Wilsona186b4a2007-12-03 13:43:12 -05002209
2210 /* Get header size in number of descriptors. */
2211 header_z = DIV_ROUND_UP(header_size, sizeof(*d));
2212 page = payload >> PAGE_SHIFT;
2213 offset = payload & ~PAGE_MASK;
David Moorebcee8932007-12-19 15:26:38 -05002214 payload_per_buffer = p->payload_length / packet_count;
Jarod Wilsona186b4a2007-12-03 13:43:12 -05002215
2216 for (i = 0; i < packet_count; i++) {
2217 /* d points to the header descriptor */
David Moorebcee8932007-12-19 15:26:38 -05002218 z = DIV_ROUND_UP(payload_per_buffer + offset, PAGE_SIZE) + 1;
Jarod Wilsona186b4a2007-12-03 13:43:12 -05002219 d = context_get_descriptors(&ctx->context,
David Moorebcee8932007-12-19 15:26:38 -05002220 z + header_z, &d_bus);
Jarod Wilsona186b4a2007-12-03 13:43:12 -05002221 if (d == NULL)
2222 return -ENOMEM;
2223
David Moorebcee8932007-12-19 15:26:38 -05002224 d->control = cpu_to_le16(DESCRIPTOR_STATUS |
2225 DESCRIPTOR_INPUT_MORE);
2226 if (p->skip && i == 0)
2227 d->control |= cpu_to_le16(DESCRIPTOR_WAIT);
Jarod Wilsona186b4a2007-12-03 13:43:12 -05002228 d->req_count = cpu_to_le16(header_size);
2229 d->res_count = d->req_count;
David Moorebcee8932007-12-19 15:26:38 -05002230 d->transfer_status = 0;
Jarod Wilsona186b4a2007-12-03 13:43:12 -05002231 d->data_address = cpu_to_le32(d_bus + (z * sizeof(*d)));
2232
David Moorebcee8932007-12-19 15:26:38 -05002233 rest = payload_per_buffer;
2234 for (j = 1; j < z; j++) {
2235 pd = d + j;
2236 pd->control = cpu_to_le16(DESCRIPTOR_STATUS |
2237 DESCRIPTOR_INPUT_MORE);
2238
2239 if (offset + rest < PAGE_SIZE)
2240 length = rest;
2241 else
2242 length = PAGE_SIZE - offset;
2243 pd->req_count = cpu_to_le16(length);
2244 pd->res_count = pd->req_count;
2245 pd->transfer_status = 0;
2246
2247 page_bus = page_private(buffer->pages[page]);
2248 pd->data_address = cpu_to_le32(page_bus + offset);
2249
2250 offset = (offset + length) & ~PAGE_MASK;
2251 rest -= length;
2252 if (offset == 0)
2253 page++;
2254 }
Jarod Wilsona186b4a2007-12-03 13:43:12 -05002255 pd->control = cpu_to_le16(DESCRIPTOR_STATUS |
2256 DESCRIPTOR_INPUT_LAST |
2257 DESCRIPTOR_BRANCH_ALWAYS);
David Moorebcee8932007-12-19 15:26:38 -05002258 if (p->interrupt && i == packet_count - 1)
Jarod Wilsona186b4a2007-12-03 13:43:12 -05002259 pd->control |= cpu_to_le16(DESCRIPTOR_IRQ_ALWAYS);
2260
Jarod Wilsona186b4a2007-12-03 13:43:12 -05002261 context_append(&ctx->context, d, z, header_z);
2262 }
2263
2264 return 0;
2265}
2266
2267static int
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05002268ohci_queue_iso(struct fw_iso_context *base,
2269 struct fw_iso_packet *packet,
2270 struct fw_iso_buffer *buffer,
2271 unsigned long payload)
2272{
Kristian Høgsberge364cf42007-02-16 17:34:49 -05002273 struct iso_context *ctx = container_of(base, struct iso_context, base);
David Moorefe5ca632008-01-06 17:21:41 -05002274 unsigned long flags;
2275 int retval;
Kristian Høgsberge364cf42007-02-16 17:34:49 -05002276
David Moorefe5ca632008-01-06 17:21:41 -05002277 spin_lock_irqsave(&ctx->context.ohci->lock, flags);
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05002278 if (base->type == FW_ISO_CONTEXT_TRANSMIT)
David Moorefe5ca632008-01-06 17:21:41 -05002279 retval = ohci_queue_iso_transmit(base, packet, buffer, payload);
Kristian Høgsberge364cf42007-02-16 17:34:49 -05002280 else if (ctx->context.ohci->version >= OHCI_VERSION_1_1)
David Moorefe5ca632008-01-06 17:21:41 -05002281 retval = ohci_queue_iso_receive_dualbuffer(base, packet,
Kristian Høgsbergd2746dc2007-02-16 17:34:46 -05002282 buffer, payload);
Kristian Høgsberge364cf42007-02-16 17:34:49 -05002283 else
David Moorefe5ca632008-01-06 17:21:41 -05002284 retval = ohci_queue_iso_receive_packet_per_buffer(base, packet,
Jarod Wilsona186b4a2007-12-03 13:43:12 -05002285 buffer,
2286 payload);
David Moorefe5ca632008-01-06 17:21:41 -05002287 spin_unlock_irqrestore(&ctx->context.ohci->lock, flags);
2288
2289 return retval;
Kristian Høgsberg295e3fe2007-02-16 17:34:40 -05002290}
2291
Stefan Richter21ebcd12007-01-14 15:29:07 +01002292static const struct fw_card_driver ohci_driver = {
Kristian Høgsberged568912006-12-19 19:58:35 -05002293 .name = ohci_driver_name,
2294 .enable = ohci_enable,
2295 .update_phy_reg = ohci_update_phy_reg,
2296 .set_config_rom = ohci_set_config_rom,
2297 .send_request = ohci_send_request,
2298 .send_response = ohci_send_response,
Kristian Høgsberg730c32f2007-02-06 14:49:32 -05002299 .cancel_packet = ohci_cancel_packet,
Kristian Høgsberged568912006-12-19 19:58:35 -05002300 .enable_phys_dma = ohci_enable_phys_dma,
Kristian Høgsbergd60d7f12007-03-07 12:12:56 -05002301 .get_bus_time = ohci_get_bus_time,
Kristian Høgsberged568912006-12-19 19:58:35 -05002302
2303 .allocate_iso_context = ohci_allocate_iso_context,
2304 .free_iso_context = ohci_free_iso_context,
2305 .queue_iso = ohci_queue_iso,
Kristian Høgsberg69cdb722007-02-16 17:34:41 -05002306 .start_iso = ohci_start_iso,
Kristian Høgsbergb8295662007-02-16 17:34:42 -05002307 .stop_iso = ohci_stop_iso,
Kristian Høgsberged568912006-12-19 19:58:35 -05002308};
2309
Stefan Richter2ed0f182008-03-01 12:35:29 +01002310#ifdef CONFIG_PPC_PMAC
2311static void ohci_pmac_on(struct pci_dev *dev)
2312{
2313 if (machine_is(powermac)) {
2314 struct device_node *ofn = pci_device_to_OF_node(dev);
2315
2316 if (ofn) {
2317 pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, ofn, 0, 1);
2318 pmac_call_feature(PMAC_FTR_1394_ENABLE, ofn, 0, 1);
2319 }
2320 }
2321}
2322
2323static void ohci_pmac_off(struct pci_dev *dev)
2324{
2325 if (machine_is(powermac)) {
2326 struct device_node *ofn = pci_device_to_OF_node(dev);
2327
2328 if (ofn) {
2329 pmac_call_feature(PMAC_FTR_1394_ENABLE, ofn, 0, 0);
2330 pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, ofn, 0, 0);
2331 }
2332 }
2333}
2334#else
2335#define ohci_pmac_on(dev)
2336#define ohci_pmac_off(dev)
2337#endif /* CONFIG_PPC_PMAC */
2338
Kristian Høgsberged568912006-12-19 19:58:35 -05002339static int __devinit
2340pci_probe(struct pci_dev *dev, const struct pci_device_id *ent)
2341{
2342 struct fw_ohci *ohci;
Kristian Høgsberge364cf42007-02-16 17:34:49 -05002343 u32 bus_options, max_receive, link_speed;
Kristian Høgsberged568912006-12-19 19:58:35 -05002344 u64 guid;
Kristian Høgsbergd79406d2007-05-09 19:23:15 -04002345 int err;
Kristian Høgsberged568912006-12-19 19:58:35 -05002346 size_t size;
2347
Kristian Høgsberg2d826cc2007-05-09 19:23:14 -04002348 ohci = kzalloc(sizeof(*ohci), GFP_KERNEL);
Kristian Høgsberged568912006-12-19 19:58:35 -05002349 if (ohci == NULL) {
2350 fw_error("Could not malloc fw_ohci data.\n");
2351 return -ENOMEM;
2352 }
2353
2354 fw_card_initialize(&ohci->card, &ohci_driver, &dev->dev);
2355
Stefan Richter130d5492008-03-24 20:55:28 +01002356 ohci_pmac_on(dev);
2357
Kristian Høgsbergd79406d2007-05-09 19:23:15 -04002358 err = pci_enable_device(dev);
2359 if (err) {
Kristian Høgsberged568912006-12-19 19:58:35 -05002360 fw_error("Failed to enable OHCI hardware.\n");
Stefan Richterbd7dee62008-02-24 18:59:55 +01002361 goto fail_free;
Kristian Høgsberged568912006-12-19 19:58:35 -05002362 }
2363
2364 pci_set_master(dev);
2365 pci_write_config_dword(dev, OHCI1394_PCI_HCI_Control, 0);
2366 pci_set_drvdata(dev, ohci);
2367
Stefan Richter11bf20a2008-03-01 02:47:15 +01002368#if defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32)
2369 ohci->old_uninorth = dev->vendor == PCI_VENDOR_ID_APPLE &&
2370 dev->device == PCI_DEVICE_ID_APPLE_UNI_N_FW;
2371#endif
Stefan Richterd34316a2008-04-12 22:31:25 +02002372 ohci->bus_reset_packet_quirk = dev->vendor == PCI_VENDOR_ID_TI;
2373
Kristian Høgsberged568912006-12-19 19:58:35 -05002374 spin_lock_init(&ohci->lock);
2375
2376 tasklet_init(&ohci->bus_reset_tasklet,
2377 bus_reset_tasklet, (unsigned long)ohci);
2378
Kristian Høgsbergd79406d2007-05-09 19:23:15 -04002379 err = pci_request_region(dev, 0, ohci_driver_name);
2380 if (err) {
Kristian Høgsberged568912006-12-19 19:58:35 -05002381 fw_error("MMIO resource unavailable\n");
Kristian Høgsbergd79406d2007-05-09 19:23:15 -04002382 goto fail_disable;
Kristian Høgsberged568912006-12-19 19:58:35 -05002383 }
2384
2385 ohci->registers = pci_iomap(dev, 0, OHCI1394_REGISTER_SIZE);
2386 if (ohci->registers == NULL) {
2387 fw_error("Failed to remap registers\n");
Kristian Høgsbergd79406d2007-05-09 19:23:15 -04002388 err = -ENXIO;
2389 goto fail_iomem;
Kristian Høgsberged568912006-12-19 19:58:35 -05002390 }
2391
Kristian Høgsberged568912006-12-19 19:58:35 -05002392 ar_context_init(&ohci->ar_request_ctx, ohci,
2393 OHCI1394_AsReqRcvContextControlSet);
2394
2395 ar_context_init(&ohci->ar_response_ctx, ohci,
2396 OHCI1394_AsRspRcvContextControlSet);
2397
David Moorefe5ca632008-01-06 17:21:41 -05002398 context_init(&ohci->at_request_ctx, ohci,
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05002399 OHCI1394_AsReqTrContextControlSet, handle_at_packet);
Kristian Høgsberged568912006-12-19 19:58:35 -05002400
David Moorefe5ca632008-01-06 17:21:41 -05002401 context_init(&ohci->at_response_ctx, ohci,
Kristian Høgsbergf319b6a2007-03-07 12:12:49 -05002402 OHCI1394_AsRspTrContextControlSet, handle_at_packet);
Kristian Høgsberged568912006-12-19 19:58:35 -05002403
Kristian Høgsberged568912006-12-19 19:58:35 -05002404 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, ~0);
2405 ohci->it_context_mask = reg_read(ohci, OHCI1394_IsoRecvIntMaskSet);
2406 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, ~0);
2407 size = sizeof(struct iso_context) * hweight32(ohci->it_context_mask);
2408 ohci->it_context_list = kzalloc(size, GFP_KERNEL);
2409
2410 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, ~0);
2411 ohci->ir_context_mask = reg_read(ohci, OHCI1394_IsoXmitIntMaskSet);
2412 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, ~0);
2413 size = sizeof(struct iso_context) * hweight32(ohci->ir_context_mask);
2414 ohci->ir_context_list = kzalloc(size, GFP_KERNEL);
2415
2416 if (ohci->it_context_list == NULL || ohci->ir_context_list == NULL) {
2417 fw_error("Out of memory for it/ir contexts.\n");
Kristian Høgsbergd79406d2007-05-09 19:23:15 -04002418 err = -ENOMEM;
2419 goto fail_registers;
Kristian Høgsberged568912006-12-19 19:58:35 -05002420 }
2421
2422 /* self-id dma buffer allocation */
2423 ohci->self_id_cpu = dma_alloc_coherent(ohci->card.device,
2424 SELF_ID_BUF_SIZE,
2425 &ohci->self_id_bus,
2426 GFP_KERNEL);
2427 if (ohci->self_id_cpu == NULL) {
2428 fw_error("Out of memory for self ID buffer.\n");
Kristian Høgsbergd79406d2007-05-09 19:23:15 -04002429 err = -ENOMEM;
2430 goto fail_registers;
Kristian Høgsberged568912006-12-19 19:58:35 -05002431 }
2432
Kristian Høgsberged568912006-12-19 19:58:35 -05002433 bus_options = reg_read(ohci, OHCI1394_BusOptions);
2434 max_receive = (bus_options >> 12) & 0xf;
2435 link_speed = bus_options & 0x7;
2436 guid = ((u64) reg_read(ohci, OHCI1394_GUIDHi) << 32) |
2437 reg_read(ohci, OHCI1394_GUIDLo);
2438
Kristian Høgsbergd79406d2007-05-09 19:23:15 -04002439 err = fw_card_add(&ohci->card, max_receive, link_speed, guid);
2440 if (err < 0)
2441 goto fail_self_id;
Kristian Høgsberged568912006-12-19 19:58:35 -05002442
Kristian Høgsberge364cf42007-02-16 17:34:49 -05002443 ohci->version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff;
Kristian Høgsberg500be722007-02-16 17:34:43 -05002444 fw_notify("Added fw-ohci device %s, OHCI version %x.%x\n",
Kristian Høgsberge364cf42007-02-16 17:34:49 -05002445 dev->dev.bus_id, ohci->version >> 16, ohci->version & 0xff);
Kristian Høgsberged568912006-12-19 19:58:35 -05002446 return 0;
Kristian Høgsbergd79406d2007-05-09 19:23:15 -04002447
2448 fail_self_id:
2449 dma_free_coherent(ohci->card.device, SELF_ID_BUF_SIZE,
2450 ohci->self_id_cpu, ohci->self_id_bus);
2451 fail_registers:
2452 kfree(ohci->it_context_list);
2453 kfree(ohci->ir_context_list);
2454 pci_iounmap(dev, ohci->registers);
2455 fail_iomem:
2456 pci_release_region(dev, 0);
2457 fail_disable:
2458 pci_disable_device(dev);
Stefan Richterbd7dee62008-02-24 18:59:55 +01002459 fail_free:
2460 kfree(&ohci->card);
Stefan Richter130d5492008-03-24 20:55:28 +01002461 ohci_pmac_off(dev);
Kristian Høgsbergd79406d2007-05-09 19:23:15 -04002462
2463 return err;
Kristian Høgsberged568912006-12-19 19:58:35 -05002464}
2465
2466static void pci_remove(struct pci_dev *dev)
2467{
2468 struct fw_ohci *ohci;
2469
2470 ohci = pci_get_drvdata(dev);
Kristian Høgsberge254a4b2007-03-07 12:12:38 -05002471 reg_write(ohci, OHCI1394_IntMaskClear, ~0);
2472 flush_writes(ohci);
Kristian Høgsberged568912006-12-19 19:58:35 -05002473 fw_core_remove_card(&ohci->card);
2474
Kristian Høgsbergc781c062007-05-07 20:33:32 -04002475 /*
2476 * FIXME: Fail all pending packets here, now that the upper
2477 * layers can't queue any more.
2478 */
Kristian Høgsberged568912006-12-19 19:58:35 -05002479
2480 software_reset(ohci);
2481 free_irq(dev->irq, ohci);
Kristian Høgsbergd79406d2007-05-09 19:23:15 -04002482 dma_free_coherent(ohci->card.device, SELF_ID_BUF_SIZE,
2483 ohci->self_id_cpu, ohci->self_id_bus);
2484 kfree(ohci->it_context_list);
2485 kfree(ohci->ir_context_list);
2486 pci_iounmap(dev, ohci->registers);
2487 pci_release_region(dev, 0);
2488 pci_disable_device(dev);
Stefan Richterbd7dee62008-02-24 18:59:55 +01002489 kfree(&ohci->card);
Stefan Richter2ed0f182008-03-01 12:35:29 +01002490 ohci_pmac_off(dev);
Stefan Richterea8d0062008-03-01 02:42:56 +01002491
Kristian Høgsberged568912006-12-19 19:58:35 -05002492 fw_notify("Removed fw-ohci device.\n");
2493}
2494
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04002495#ifdef CONFIG_PM
Stefan Richter2ed0f182008-03-01 12:35:29 +01002496static int pci_suspend(struct pci_dev *dev, pm_message_t state)
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04002497{
Stefan Richter2ed0f182008-03-01 12:35:29 +01002498 struct fw_ohci *ohci = pci_get_drvdata(dev);
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04002499 int err;
2500
2501 software_reset(ohci);
Stefan Richter2ed0f182008-03-01 12:35:29 +01002502 free_irq(dev->irq, ohci);
2503 err = pci_save_state(dev);
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04002504 if (err) {
Stefan Richter8a8cea22007-06-09 19:26:22 +02002505 fw_error("pci_save_state failed\n");
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04002506 return err;
2507 }
Stefan Richter2ed0f182008-03-01 12:35:29 +01002508 err = pci_set_power_state(dev, pci_choose_state(dev, state));
Stefan Richter55111422007-09-06 09:50:30 +02002509 if (err)
2510 fw_error("pci_set_power_state failed with %d\n", err);
Stefan Richter2ed0f182008-03-01 12:35:29 +01002511 ohci_pmac_off(dev);
Stefan Richterea8d0062008-03-01 02:42:56 +01002512
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04002513 return 0;
2514}
2515
Stefan Richter2ed0f182008-03-01 12:35:29 +01002516static int pci_resume(struct pci_dev *dev)
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04002517{
Stefan Richter2ed0f182008-03-01 12:35:29 +01002518 struct fw_ohci *ohci = pci_get_drvdata(dev);
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04002519 int err;
2520
Stefan Richter2ed0f182008-03-01 12:35:29 +01002521 ohci_pmac_on(dev);
2522 pci_set_power_state(dev, PCI_D0);
2523 pci_restore_state(dev);
2524 err = pci_enable_device(dev);
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04002525 if (err) {
Stefan Richter8a8cea22007-06-09 19:26:22 +02002526 fw_error("pci_enable_device failed\n");
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04002527 return err;
2528 }
2529
Kristian Høgsberg0bd243c2007-06-05 19:27:05 -04002530 return ohci_enable(&ohci->card, NULL, 0);
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04002531}
2532#endif
2533
Kristian Høgsberged568912006-12-19 19:58:35 -05002534static struct pci_device_id pci_table[] = {
2535 { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_FIREWIRE_OHCI, ~0) },
2536 { }
2537};
2538
2539MODULE_DEVICE_TABLE(pci, pci_table);
2540
2541static struct pci_driver fw_ohci_pci_driver = {
2542 .name = ohci_driver_name,
2543 .id_table = pci_table,
2544 .probe = pci_probe,
2545 .remove = pci_remove,
Kristian Høgsberg2aef4692007-05-30 19:06:35 -04002546#ifdef CONFIG_PM
2547 .resume = pci_resume,
2548 .suspend = pci_suspend,
2549#endif
Kristian Høgsberged568912006-12-19 19:58:35 -05002550};
2551
2552MODULE_AUTHOR("Kristian Hoegsberg <krh@bitplanet.net>");
2553MODULE_DESCRIPTION("Driver for PCI OHCI IEEE1394 controllers");
2554MODULE_LICENSE("GPL");
2555
Olaf Hering1e4c7b02007-05-05 23:17:13 +02002556/* Provide a module alias so root-on-sbp2 initrds don't break. */
2557#ifndef CONFIG_IEEE1394_OHCI1394_MODULE
2558MODULE_ALIAS("ohci1394");
2559#endif
2560
Kristian Høgsberged568912006-12-19 19:58:35 -05002561static int __init fw_ohci_init(void)
2562{
2563 return pci_register_driver(&fw_ohci_pci_driver);
2564}
2565
2566static void __exit fw_ohci_cleanup(void)
2567{
2568 pci_unregister_driver(&fw_ohci_pci_driver);
2569}
2570
2571module_init(fw_ohci_init);
2572module_exit(fw_ohci_cleanup);