blob: 3973d67449bf031688188a635e5fe89532b12695 [file] [log] [blame]
Srinivas Ramana3cac2782017-09-13 16:31:17 +05301/*
2 * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include "skeleton64.dtsi"
15#include <dt-bindings/gpio/gpio.h>
Kiran Gunda0954f392017-10-16 16:24:55 +053016#include <dt-bindings/spmi/spmi.h>
Kiran Gundaaf6a0b62017-10-23 16:03:10 +053017#include <dt-bindings/interrupt-controller/arm-gic.h>
Kiran Gunda0954f392017-10-16 16:24:55 +053018#include <dt-bindings/regulator/qcom,rpm-smd-regulator.h>
Srinivas Ramana3cac2782017-09-13 16:31:17 +053019
20/ {
21 model = "Qualcomm Technologies, Inc. MSM 8953";
22 compatible = "qcom,msm8953";
23 qcom,msm-id = <293 0x0>;
24 interrupt-parent = <&intc>;
25
26 chosen {
27 bootargs = "sched_enable_hmp=1 sched_enable_power_aware=1";
28 };
29
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
33 ranges;
34
35 other_ext_mem: other_ext_region@0 {
36 compatible = "removed-dma-pool";
37 no-map;
38 reg = <0x0 0x85b00000 0x0 0xd00000>;
39 };
40
41 modem_mem: modem_region@0 {
42 compatible = "removed-dma-pool";
43 no-map-fixup;
44 reg = <0x0 0x86c00000 0x0 0x6a00000>;
45 };
46
47 adsp_fw_mem: adsp_fw_region@0 {
48 compatible = "removed-dma-pool";
49 no-map;
50 reg = <0x0 0x8d600000 0x0 0x1100000>;
51 };
52
53 wcnss_fw_mem: wcnss_fw_region@0 {
54 compatible = "removed-dma-pool";
55 no-map;
56 reg = <0x0 0x8e700000 0x0 0x700000>;
57 };
58
59 venus_mem: venus_region@0 {
60 compatible = "shared-dma-pool";
61 reusable;
62 alloc-ranges = <0x0 0x80000000 0x0 0x10000000>;
63 alignment = <0 0x400000>;
64 size = <0 0x0800000>;
65 };
66
67 secure_mem: secure_region@0 {
68 compatible = "shared-dma-pool";
69 reusable;
70 alignment = <0 0x400000>;
71 size = <0 0x09800000>;
72 };
73
74 qseecom_mem: qseecom_region@0 {
75 compatible = "shared-dma-pool";
76 reusable;
77 alignment = <0 0x400000>;
78 size = <0 0x1000000>;
79 };
80
81 adsp_mem: adsp_region@0 {
82 compatible = "shared-dma-pool";
83 reusable;
84 size = <0 0x400000>;
85 };
86
87 dfps_data_mem: dfps_data_mem@90000000 {
88 reg = <0 0x90000000 0 0x1000>;
89 label = "dfps_data_mem";
90 };
91
92 cont_splash_mem: splash_region@0x90001000 {
93 reg = <0x0 0x90001000 0x0 0x13ff000>;
94 label = "cont_splash_mem";
95 };
96
97 gpu_mem: gpu_region@0 {
98 compatible = "shared-dma-pool";
99 reusable;
100 alloc-ranges = <0x0 0x80000000 0x0 0x10000000>;
101 alignment = <0 0x400000>;
102 size = <0 0x800000>;
103 };
104 };
105
106 aliases {
107 /* smdtty devices */
Arun Kumar Neelakantam36151aa2017-11-02 21:34:33 +0530108 smd1 = &smdtty_apps_fm;
109 smd2 = &smdtty_apps_riva_bt_acl;
110 smd3 = &smdtty_apps_riva_bt_cmd;
111 smd4 = &smdtty_mbalbridge;
112 smd5 = &smdtty_apps_riva_ant_cmd;
113 smd6 = &smdtty_apps_riva_ant_data;
114 smd7 = &smdtty_data1;
115 smd8 = &smdtty_data4;
116 smd11 = &smdtty_data11;
117 smd21 = &smdtty_data21;
118 smd36 = &smdtty_loopback;
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530119 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
120 sdhc2 = &sdhc_2; /* SDC2 for SD card */
121 };
122
123 soc: soc { };
124
125};
126
127#include "msm8953-pinctrl.dtsi"
128#include "msm8953-cpu.dtsi"
Raju P.L.S.S.S.Ne0b22c92017-11-02 13:42:27 +0530129#include "msm8953-pm.dtsi"
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530130
131
132&soc {
133 #address-cells = <1>;
134 #size-cells = <1>;
135 ranges = <0 0 0 0xffffffff>;
136 compatible = "simple-bus";
137
138 apc_apm: apm@b111000 {
139 compatible = "qcom,msm8953-apm";
140 reg = <0xb111000 0x1000>;
141 reg-names = "pm-apcc-glb";
142 qcom,apm-post-halt-delay = <0x2>;
143 qcom,apm-halt-clk-delay = <0x11>;
144 qcom,apm-resume-clk-delay = <0x10>;
145 qcom,apm-sel-switch-delay = <0x01>;
146 };
147
148 intc: interrupt-controller@b000000 {
149 compatible = "qcom,msm-qgic2";
150 interrupt-controller;
151 #interrupt-cells = <3>;
152 reg = <0x0b000000 0x1000>,
153 <0x0b002000 0x1000>;
154 };
155
156 qcom,msm-gladiator@b1c0000 {
157 compatible = "qcom,msm-gladiator";
158 reg = <0x0b1c0000 0x4000>;
159 reg-names = "gladiator_base";
160 interrupts = <0 22 0>;
161 };
162
163 timer {
164 compatible = "arm,armv8-timer";
165 interrupts = <1 2 0xff08>,
166 <1 3 0xff08>,
167 <1 4 0xff08>,
168 <1 1 0xff08>;
169 clock-frequency = <19200000>;
170 };
171
172 timer@b120000 {
173 #address-cells = <1>;
174 #size-cells = <1>;
175 ranges;
176 compatible = "arm,armv7-timer-mem";
177 reg = <0xb120000 0x1000>;
178 clock-frequency = <19200000>;
179
180 frame@b121000 {
181 frame-number = <0>;
182 interrupts = <0 8 0x4>,
183 <0 7 0x4>;
184 reg = <0xb121000 0x1000>,
185 <0xb122000 0x1000>;
186 };
187
188 frame@b123000 {
189 frame-number = <1>;
190 interrupts = <0 9 0x4>;
191 reg = <0xb123000 0x1000>;
192 status = "disabled";
193 };
194
195 frame@b124000 {
196 frame-number = <2>;
197 interrupts = <0 10 0x4>;
198 reg = <0xb124000 0x1000>;
199 status = "disabled";
200 };
201
202 frame@b125000 {
203 frame-number = <3>;
204 interrupts = <0 11 0x4>;
205 reg = <0xb125000 0x1000>;
206 status = "disabled";
207 };
208
209 frame@b126000 {
210 frame-number = <4>;
211 interrupts = <0 12 0x4>;
212 reg = <0xb126000 0x1000>;
213 status = "disabled";
214 };
215
216 frame@b127000 {
217 frame-number = <5>;
218 interrupts = <0 13 0x4>;
219 reg = <0xb127000 0x1000>;
220 status = "disabled";
221 };
222
223 frame@b128000 {
224 frame-number = <6>;
225 interrupts = <0 14 0x4>;
226 reg = <0xb128000 0x1000>;
227 status = "disabled";
228 };
229 };
230 qcom,rmtfs_sharedmem@00000000 {
231 compatible = "qcom,sharedmem-uio";
232 reg = <0x00000000 0x00180000>;
233 reg-names = "rmtfs";
234 qcom,client-id = <0x00000001>;
235 };
236
237 restart@4ab000 {
238 compatible = "qcom,pshold";
239 reg = <0x4ab000 0x4>,
240 <0x193d100 0x4>;
241 reg-names = "pshold-base", "tcsr-boot-misc-detect";
242 };
243
244 qcom,mpm2-sleep-counter@4a3000 {
245 compatible = "qcom,mpm2-sleep-counter";
246 reg = <0x4a3000 0x1000>;
247 clock-frequency = <32768>;
248 };
249
250 cpu-pmu {
251 compatible = "arm,armv8-pmuv3";
252 interrupts = <1 7 0xff00>;
253 };
254
255 qcom,sps {
256 compatible = "qcom,msm_sps_4k";
257 qcom,pipe-attr-ee;
258 };
259
Ashok Jammigumpuladb43f572017-12-06 18:05:57 +0530260 thermal_zones: thermal-zones {
261 mdm-core-usr {
262 polling-delay-passive = <0>;
263 polling-delay = <0>;
264 thermal-governor = "user_space";
265 thermal-sensors = <&tsens0 1>;
266 trips {
267 active-config0 {
268 temperature = <125000>;
269 hysteresis = <1000>;
270 type = "passive";
271 };
272 };
273 };
274
275 qdsp-usr {
276 polling-delay-passive = <0>;
277 polling-delay = <0>;
278 thermal-governor = "user_space";
279 thermal-sensors = <&tsens0 2>;
280 trips {
281 active-config0 {
282 temperature = <125000>;
283 hysteresis = <1000>;
284 type = "passive";
285 };
286 };
287 };
288
289 camera-usr {
290 polling-delay-passive = <0>;
291 polling-delay = <0>;
292 thermal-governor = "user_space";
293 thermal-sensors = <&tsens0 3>;
294 trips {
295 active-config0 {
296 temperature = <125000>;
297 hysteresis = <1000>;
298 type = "passive";
299 };
300 };
301 };
302
303 apc1_cpu0-usr {
304 polling-delay-passive = <0>;
305 polling-delay = <0>;
306 thermal-sensors = <&tsens0 4>;
307 thermal-governor = "user_space";
308 trips {
309 active-config0 {
310 temperature = <125000>;
311 hysteresis = <1000>;
312 type = "passive";
313 };
314 };
315 };
316
317 apc1_cpu1-usr {
318 polling-delay-passive = <0>;
319 polling-delay = <0>;
320 thermal-sensors = <&tsens0 5>;
321 thermal-governor = "user_space";
322 trips {
323 active-config0 {
324 temperature = <125000>;
325 hysteresis = <1000>;
326 type = "passive";
327 };
328 };
329 };
330
331 apc1_cpu2-usr {
332 polling-delay-passive = <0>;
333 polling-delay = <0>;
334 thermal-sensors = <&tsens0 6>;
335 thermal-governor = "user_space";
336 trips {
337 active-config0 {
338 temperature = <125000>;
339 hysteresis = <1000>;
340 type = "passive";
341 };
342 };
343 };
344
345 apc1_cpu3-usr {
346 polling-delay-passive = <0>;
347 polling-delay = <0>;
348 thermal-sensors = <&tsens0 7>;
349 thermal-governor = "user_space";
350 trips {
351 active-config0 {
352 temperature = <125000>;
353 hysteresis = <1000>;
354 type = "passive";
355 };
356 };
357 };
358
359 apc1_l2-usr {
360 polling-delay-passive = <0>;
361 polling-delay = <0>;
362 thermal-sensors = <&tsens0 8>;
363 thermal-governor = "user_space";
364 trips {
365 active-config0 {
366 temperature = <125000>;
367 hysteresis = <1000>;
368 type = "passive";
369 };
370 };
371 };
372
373 apc0_cpu0-usr {
374 polling-delay-passive = <0>;
375 polling-delay = <0>;
376 thermal-sensors = <&tsens0 9>;
377 thermal-governor = "user_space";
378 trips {
379 active-config0 {
380 temperature = <125000>;
381 hysteresis = <1000>;
382 type = "passive";
383 };
384 };
385 };
386
387 apc0_cpu1-usr {
388 polling-delay-passive = <0>;
389 polling-delay = <0>;
390 thermal-sensors = <&tsens0 10>;
391 thermal-governor = "user_space";
392 trips {
393 active-config0 {
394 temperature = <125000>;
395 hysteresis = <1000>;
396 type = "passive";
397 };
398 };
399 };
400
401 apc0_cpu2-usr {
402 polling-delay-passive = <0>;
403 polling-delay = <0>;
404 thermal-sensors = <&tsens0 11>;
405 thermal-governor = "user_space";
406 trips {
407 active-config0 {
408 temperature = <125000>;
409 hysteresis = <1000>;
410 type = "passive";
411 };
412 };
413 };
414
415 apc0_cpu3-usr {
416 polling-delay-passive = <0>;
417 polling-delay = <0>;
418 thermal-sensors = <&tsens0 12>;
419 thermal-governor = "user_space";
420 trips {
421 active-config0 {
422 temperature = <125000>;
423 hysteresis = <1000>;
424 type = "passive";
425 };
426 };
427 };
428
429 apc0_l2-usr {
430 polling-delay-passive = <0>;
431 polling-delay = <0>;
432 thermal-sensors = <&tsens0 13>;
433 thermal-governor = "user_space";
434 trips {
435 active-config0 {
436 temperature = <125000>;
437 hysteresis = <1000>;
438 type = "passive";
439 };
440 };
441 };
442
443 gpu0-usr {
444 polling-delay-passive = <0>;
445 polling-delay = <0>;
446 thermal-sensors = <&tsens0 14>;
447 thermal-governor = "user_space";
448 trips {
449 active-config0 {
450 temperature = <125000>;
451 hysteresis = <1000>;
452 type = "passive";
453 };
454 };
455 };
456
457 gpu1-usr {
458 polling-delay-passive = <0>;
459 polling-delay = <0>;
460 thermal-sensors = <&tsens0 15>;
461 thermal-governor = "user_space";
462 trips {
463 active-config0 {
464 temperature = <125000>;
465 hysteresis = <1000>;
466 type = "passive";
467 };
468 };
469 };
470 };
471
472 tsens0: tsens@4a8000 {
473 compatible = "qcom,msm8953-tsens";
474 reg = <0x4a8000 0x1000>,
475 <0x4a9000 0x1000>;
476 reg-names = "tsens_srot_physical",
477 "tsens_tm_physical";
478 interrupts = <0 184 0>, <0 314 0>;
479 interrupt-names = "tsens-upper-lower", "tsens-critical";
480 #thermal-sensor-cells = <1>;
481 };
482
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530483 blsp1_uart0: serial@78af000 {
484 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
485 reg = <0x78af000 0x200>;
486 interrupts = <0 107 0>;
487 status = "disabled";
488 };
489
490 dma_blsp1: qcom,sps-dma@7884000 { /* BLSP1 */
491 #dma-cells = <4>;
492 compatible = "qcom,sps-dma";
493 reg = <0x7884000 0x1f000>;
494 interrupts = <0 238 0>;
495 qcom,summing-threshold = <10>;
496 };
497
498 dma_blsp2: qcom,sps-dma@7ac4000 { /* BLSP2 */
499 #dma-cells = <4>;
500 compatible = "qcom,sps-dma";
501 reg = <0x7ac4000 0x1f000>;
502 interrupts = <0 239 0>;
503 qcom,summing-threshold = <10>;
504 };
505
506 slim_msm: slim@c140000{
507 cell-index = <1>;
508 compatible = "qcom,slim-ngd";
509 reg = <0xc140000 0x2c000>,
510 <0xc104000 0x2a000>;
511 reg-names = "slimbus_physical", "slimbus_bam_physical";
512 interrupts = <0 163 0>, <0 180 0>;
513 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
514 qcom,apps-ch-pipes = <0x600000>;
515 qcom,ea-pc = <0x200>;
516 status = "disabled";
517 };
518
519 cpubw: qcom,cpubw {
520 compatible = "qcom,devbw";
521 governor = "cpufreq";
522 qcom,src-dst-ports = <1 512>;
523 qcom,active-only;
524 qcom,bw-tbl =
525 < 769 /* 100.8 MHz */ >,
526 < 1611 /* 211.2 MHz */ >, /*Low SVS*/
527 < 2124 /* 278.4 MHz */ >,
528 < 2929 /* 384 MHz */ >,
529 < 3221 /* 422.4 MHz */ >, /* SVS */
530 < 4248 /* 556.8 MHz */ >,
531 < 5126 /* 672 MHz */ >,
532 < 5859 /* 768 MHz */ >, /* SVS+ */
533 < 6152 /* 806.4 MHz */ >,
534 < 6445 /* 844.8 MHz */ >, /* NOM */
535 < 7104 /* 931.2 MHz */ >; /* TURBO */
536 };
537
538 mincpubw: qcom,mincpubw {
539 compatible = "qcom,devbw";
540 governor = "cpufreq";
541 qcom,src-dst-ports = <1 512>;
542 qcom,active-only;
543 qcom,bw-tbl =
544 < 769 /* 100.8 MHz */ >,
545 < 1611 /* 211.2 MHz */ >, /*Low SVS*/
546 < 2124 /* 278.4 MHz */ >,
547 < 2929 /* 384 MHz */ >,
548 < 3221 /* 422.4 MHz */ >, /* SVS */
549 < 4248 /* 556.8 MHz */ >,
550 < 5126 /* 672 MHz */ >,
551 < 5859 /* 768 MHz */ >, /* SVS+ */
552 < 6152 /* 806.4 MHz */ >,
553 < 6445 /* 844.8 MHz */ >, /* NOM */
554 < 7104 /* 931.2 MHz */ >; /* TURBO */
555 };
556
557 qcom,cpu-bwmon {
558 compatible = "qcom,bimc-bwmon2";
559 reg = <0x408000 0x300>, <0x401000 0x200>;
560 reg-names = "base", "global_base";
561 interrupts = <0 183 4>;
562 qcom,mport = <0>;
563 qcom,target-dev = <&cpubw>;
564 };
565
566 devfreq-cpufreq {
567 cpubw-cpufreq {
568 target-dev = <&cpubw>;
569 cpu-to-dev-map =
570 < 652800 1611>,
571 < 1036800 3221>,
572 < 1401600 5859>,
573 < 1689600 6445>,
574 < 1804800 7104>,
575 < 1958400 7104>,
576 < 2208000 7104>;
577 };
578
579 mincpubw-cpufreq {
580 target-dev = <&mincpubw>;
581 cpu-to-dev-map =
582 < 652800 1611 >,
583 < 1401600 3221 >,
584 < 2208000 5859 >;
585 };
586 };
587
Jonathan Avilac7a6fd52017-10-12 15:24:05 -0700588 cpubw_compute: qcom,cpubw-compute {
589 compatible = "qcom,arm-cpu-mon";
590 qcom,cpulist = < &CPU0 &CPU1 &CPU2 &CPU3
591 &CPU4 &CPU5 &CPU6 &CPU7 >;
592 qcom,target-dev = <&cpubw>;
593 qcom,core-dev-table =
594 < 652800 1611>,
595 < 1036800 3221>,
596 < 1401600 5859>,
597 < 1689600 6445>,
598 < 1804800 7104>,
599 < 1958400 7104>,
600 < 2208000 7104>;
601 };
602
603 mincpubw_compute: qcom,mincpubw-compute {
604 compatible = "qcom,arm-cpu-mon";
605 qcom,cpulist = < &CPU0 &CPU1 &CPU2 &CPU3
606 &CPU4 &CPU5 &CPU6 &CPU7 >;
607 qcom,target-dev = <&mincpubw>;
608 qcom,core-dev-table =
609 < 652800 1611 >,
610 < 1401600 3221 >,
611 < 2208000 5859 >;
612 };
613
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530614 qcom,ipc-spinlock@1905000 {
615 compatible = "qcom,ipc-spinlock-sfpb";
616 reg = <0x1905000 0x8000>;
617 qcom,num-locks = <8>;
618 };
619
620 qcom,smem@86300000 {
621 compatible = "qcom,smem";
622 reg = <0x86300000 0x100000>,
623 <0x0b011008 0x4>,
624 <0x60000 0x8000>,
625 <0x193d000 0x8>;
626 reg-names = "smem", "irq-reg-base",
627 "aux-mem1", "smem_targ_info_reg";
628 qcom,mpu-enabled;
629
630 qcom,smd-modem {
631 compatible = "qcom,smd";
632 qcom,smd-edge = <0>;
633 qcom,smd-irq-offset = <0x0>;
634 qcom,smd-irq-bitmask = <0x1000>;
635 interrupts = <0 25 1>;
636 label = "modem";
637 qcom,not-loadable;
638 };
639
640 qcom,smsm-modem {
641 compatible = "qcom,smsm";
642 qcom,smsm-edge = <0>;
643 qcom,smsm-irq-offset = <0x0>;
644 qcom,smsm-irq-bitmask = <0x2000>;
645 interrupts = <0 26 1>;
646 };
647
648 qcom,smd-wcnss {
649 compatible = "qcom,smd";
650 qcom,smd-edge = <6>;
651 qcom,smd-irq-offset = <0x0>;
652 qcom,smd-irq-bitmask = <0x20000>;
653 interrupts = <0 142 1>;
654 label = "wcnss";
655 };
656
657 qcom,smsm-wcnss {
658 compatible = "qcom,smsm";
659 qcom,smsm-edge = <6>;
660 qcom,smsm-irq-offset = <0x0>;
661 qcom,smsm-irq-bitmask = <0x80000>;
662 interrupts = <0 144 1>;
663 };
664
665 qcom,smd-adsp {
666 compatible = "qcom,smd";
667 qcom,smd-edge = <1>;
668 qcom,smd-irq-offset = <0x0>;
669 qcom,smd-irq-bitmask = <0x100>;
670 interrupts = <0 289 1>;
671 label = "adsp";
672 };
673
674 qcom,smsm-adsp {
675 compatible = "qcom,smsm";
676 qcom,smsm-edge = <1>;
677 qcom,smsm-irq-offset = <0x0>;
678 qcom,smsm-irq-bitmask = <0x200>;
679 interrupts = <0 290 1>;
680 };
681
682 qcom,smd-rpm {
683 compatible = "qcom,smd";
684 qcom,smd-edge = <15>;
685 qcom,smd-irq-offset = <0x0>;
686 qcom,smd-irq-bitmask = <0x1>;
687 interrupts = <0 168 1>;
688 label = "rpm";
689 qcom,irq-no-suspend;
690 qcom,not-loadable;
691 };
692 };
693
Arun Kumar Neelakantam36151aa2017-11-02 21:34:33 +0530694 qcom,smdtty {
695 compatible = "qcom,smdtty";
696
697 smdtty_apps_fm: qcom,smdtty-apps-fm {
698 qcom,smdtty-remote = "wcnss";
699 qcom,smdtty-port-name = "APPS_FM";
700 };
701
702 smdtty_apps_riva_bt_acl: smdtty-apps-riva-bt-acl {
703 qcom,smdtty-remote = "wcnss";
704 qcom,smdtty-port-name = "APPS_RIVA_BT_ACL";
705 };
706
707 smdtty_apps_riva_bt_cmd: qcom,smdtty-apps-riva-bt-cmd {
708 qcom,smdtty-remote = "wcnss";
709 qcom,smdtty-port-name = "APPS_RIVA_BT_CMD";
710 };
711
712 smdtty_mbalbridge: qcom,smdtty-mbalbridge {
713 qcom,smdtty-remote = "modem";
714 qcom,smdtty-port-name = "MBALBRIDGE";
715 };
716
717 smdtty_apps_riva_ant_cmd: smdtty-apps-riva-ant-cmd {
718 qcom,smdtty-remote = "wcnss";
719 qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD";
720 };
721
722 smdtty_apps_riva_ant_data: smdtty-apps-riva-ant-data {
723 qcom,smdtty-remote = "wcnss";
724 qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA";
725 };
726
727 smdtty_data1: qcom,smdtty-data1 {
728 qcom,smdtty-remote = "modem";
729 qcom,smdtty-port-name = "DATA1";
730 };
731
732 smdtty_data4: qcom,smdtty-data4 {
733 qcom,smdtty-remote = "modem";
734 qcom,smdtty-port-name = "DATA4";
735 };
736
737 smdtty_data11: qcom,smdtty-data11 {
738 qcom,smdtty-remote = "modem";
739 qcom,smdtty-port-name = "DATA11";
740 };
741
742 smdtty_data21: qcom,smdtty-data21 {
743 qcom,smdtty-remote = "modem";
744 qcom,smdtty-port-name = "DATA21";
745 };
746
747 smdtty_loopback: smdtty-loopback {
748 qcom,smdtty-remote = "modem";
749 qcom,smdtty-port-name = "LOOPBACK";
750 qcom,smdtty-dev-name = "LOOPBACK_TTY";
751 };
752 };
753
Arun Kumar Neelakantamea07e3d2017-11-02 21:27:50 +0530754 qcom,smdpkt {
755 compatible = "qcom,smdpkt";
756
757 qcom,smdpkt-data5-cntl {
758 qcom,smdpkt-remote = "modem";
759 qcom,smdpkt-port-name = "DATA5_CNTL";
760 qcom,smdpkt-dev-name = "smdcntl0";
761 };
762
763 qcom,smdpkt-data22 {
764 qcom,smdpkt-remote = "modem";
765 qcom,smdpkt-port-name = "DATA22";
766 qcom,smdpkt-dev-name = "smd22";
767 };
768
769 qcom,smdpkt-data40-cntl {
770 qcom,smdpkt-remote = "modem";
771 qcom,smdpkt-port-name = "DATA40_CNTL";
772 qcom,smdpkt-dev-name = "smdcntl8";
773 };
774
775 qcom,smdpkt-apr-apps2 {
776 qcom,smdpkt-remote = "adsp";
777 qcom,smdpkt-port-name = "apr_apps2";
778 qcom,smdpkt-dev-name = "apr_apps2";
779 };
780
781 qcom,smdpkt-loopback {
782 qcom,smdpkt-remote = "modem";
783 qcom,smdpkt-port-name = "LOOPBACK";
784 qcom,smdpkt-dev-name = "smd_pkt_loopback";
785 };
786 };
787
Raju P.L.S.S.S.N786994d2017-11-08 17:03:56 +0530788 rpm_bus: qcom,rpm-smd {
789 compatible = "qcom,rpm-smd";
790 rpm-channel-name = "rpm_requests";
791 rpm-channel-type = <15>; /* SMD_APPS_RPM */
792 };
793
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530794 qcom,wdt@b017000 {
795 compatible = "qcom,msm-watchdog";
796 reg = <0xb017000 0x1000>;
797 reg-names = "wdt-base";
798 interrupts = <0 3 0>, <0 4 0>;
799 qcom,bark-time = <11000>;
800 qcom,pet-time = <10000>;
801 qcom,ipi-ping;
802 qcom,wakeup-enable;
803 };
804
805 qcom,chd {
806 compatible = "qcom,core-hang-detect";
807 qcom,threshold-arr = <0xb1880b0 0xb1980b0 0xb1a80b0
808 0xb1b80b0 0xb0880b0 0xb0980b0 0xb0a80b0 0xb0b80b0>;
809 qcom,config-arr = <0xb1880b8 0xb1980b8 0xb1a80b8
810 0xb1b80b8 0xb0880b8 0xb0980b8 0xb0a80b8 0xb0b80b8>;
811 };
812
813 qcom,msm-rtb {
814 compatible = "qcom,msm-rtb";
815 qcom,rtb-size = <0x100000>;
816 };
817
818 qcom,msm-imem@8600000 {
819 compatible = "qcom,msm-imem";
820 reg = <0x08600000 0x1000>;
821 ranges = <0x0 0x08600000 0x1000>;
822 #address-cells = <1>;
823 #size-cells = <1>;
824
825 mem_dump_table@10 {
826 compatible = "qcom,msm-imem-mem_dump_table";
827 reg = <0x10 8>;
828 };
829
Maria Yu06cf96e2017-09-21 17:35:13 +0800830 dload_type@18 {
831 compatible = "qcom,msm-imem-dload-type";
832 reg = <0x18 4>;
833 };
834
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530835 restart_reason@65c {
836 compatible = "qcom,msm-imem-restart_reason";
837 reg = <0x65c 4>;
838 };
839
840 boot_stats@6b0 {
841 compatible = "qcom,msm-imem-boot_stats";
842 reg = <0x6b0 32>;
843 };
844
Maria Yu575d67f2017-12-05 16:31:19 +0800845 kaslr_offset@6d0 {
846 compatible = "qcom,msm-imem-kaslr_offset";
847 reg = <0x6d0 12>;
848 };
849
850 pil@94c {
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530851 compatible = "qcom,msm-imem-pil";
852 reg = <0x94c 200>;
853
854 };
855 };
856
857 qcom,memshare {
858 compatible = "qcom,memshare";
859
860 qcom,client_1 {
861 compatible = "qcom,memshare-peripheral";
862 qcom,peripheral-size = <0x200000>;
863 qcom,client-id = <0>;
864 qcom,allocate-boot-time;
865 label = "modem";
866 };
867
868 qcom,client_2 {
869 compatible = "qcom,memshare-peripheral";
870 qcom,peripheral-size = <0x300000>;
871 qcom,client-id = <2>;
872 label = "modem";
873 };
874
875 mem_client_3_size: qcom,client_3 {
876 compatible = "qcom,memshare-peripheral";
877 qcom,peripheral-size = <0x0>;
878 qcom,client-id = <1>;
879 label = "modem";
880 };
881 };
882 sdcc1_ice: sdcc1ice@7803000 {
883 compatible = "qcom,ice";
884 reg = <0x7803000 0x8000>;
885 interrupt-names = "sdcc_ice_nonsec_level_irq",
886 "sdcc_ice_sec_level_irq";
887 interrupts = <0 312 0>, <0 313 0>;
888 qcom,enable-ice-clk;
889 qcom,op-freq-hz = <270000000>, <0>, <0>, <0>;
890 qcom,msm-bus,name = "sdcc_ice_noc";
891 qcom,msm-bus,num-cases = <2>;
892 qcom,msm-bus,num-paths = <1>;
893 qcom,msm-bus,vectors-KBps =
894 <78 512 0 0>, /* No vote */
895 <78 512 1000 0>; /* Max. bandwidth */
896 qcom,bus-vector-names = "MIN", "MAX";
897 qcom,instance-type = "sdcc";
898 };
899
900 sdhc_1: sdhci@7824900 {
901 compatible = "qcom,sdhci-msm";
902 reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>;
903 reg-names = "hc_mem", "core_mem", "cmdq_mem";
904
905 interrupts = <0 123 0>, <0 138 0>;
906 interrupt-names = "hc_irq", "pwr_irq";
907
908 sdhc-msm-crypto = <&sdcc1_ice>;
909 qcom,bus-width = <8>;
910
911 qcom,devfreq,freq-table = <50000000 200000000>;
912
913 qcom,pm-qos-irq-type = "affine_irq";
914 qcom,pm-qos-irq-latency = <2 213>;
915
916 qcom,pm-qos-cpu-groups = <0x0f 0xf0>;
917 qcom,pm-qos-cmdq-latency-us = <2 213>, <2 213>;
918
919 qcom,pm-qos-legacy-latency-us = <2 213>, <2 213>;
920
921 qcom,msm-bus,name = "sdhc1";
922 qcom,msm-bus,num-cases = <9>;
923 qcom,msm-bus,num-paths = <1>;
924 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
925 <78 512 1046 3200>, /* 400 KB/s*/
926 <78 512 52286 160000>, /* 20 MB/s */
927 <78 512 65360 200000>, /* 25 MB/s */
928 <78 512 130718 400000>, /* 50 MB/s */
929 <78 512 130718 400000>, /* 100 MB/s */
930 <78 512 261438 800000>, /* 200 MB/s */
931 <78 512 261438 800000>, /* 400 MB/s */
932 <78 512 1338562 4096000>; /* Max. bandwidth */
933 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
934 100000000 200000000 400000000 4294967295>;
935
936 qcom,ice-clk-rates = <270000000 160000000>;
937 qcom,large-address-bus;
938
939 status = "disabled";
940 };
941
942 sdhc_2: sdhci@7864900 {
943 compatible = "qcom,sdhci-msm";
944 reg = <0x7864900 0x500>, <0x7864000 0x800>;
945 reg-names = "hc_mem", "core_mem";
946
947 interrupts = <0 125 0>, <0 221 0>;
948 interrupt-names = "hc_irq", "pwr_irq";
949
950 qcom,bus-width = <4>;
951
952 qcom,pm-qos-irq-type = "affine_irq";
953 qcom,pm-qos-irq-latency = <2 213>;
954
955 qcom,pm-qos-cpu-groups = <0x0f 0xf0>;
956 qcom,pm-qos-legacy-latency-us = <2 213>, <2 213>;
957
958 qcom,devfreq,freq-table = <50000000 200000000>;
959
960 qcom,msm-bus,name = "sdhc2";
961 qcom,msm-bus,num-cases = <8>;
962 qcom,msm-bus,num-paths = <1>;
963 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
964 <81 512 1046 3200>, /* 400 KB/s*/
965 <81 512 52286 160000>, /* 20 MB/s */
966 <81 512 65360 200000>, /* 25 MB/s */
967 <81 512 130718 400000>, /* 50 MB/s */
968 <81 512 261438 800000>, /* 100 MB/s */
969 <81 512 261438 800000>, /* 200 MB/s */
970 <81 512 1338562 4096000>; /* Max. bandwidth */
971 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
972 100000000 200000000 4294967295>;
973
974 qcom,large-address-bus;
975 status = "disabled";
976 };
977
Mohammed Javidf62ec622017-11-29 20:07:32 +0530978 ipa_hw: qcom,ipa@07900000 {
979 compatible = "qcom,ipa";
980 reg = <0x07900000 0x4effc>, <0x07904000 0x26934>;
981 reg-names = "ipa-base", "bam-base";
982 interrupts = <0 228 0>,
983 <0 230 0>;
984 interrupt-names = "ipa-irq", "bam-irq";
985 qcom,ipa-hw-ver = <6>; /* IPA core version = IPAv2.6L */
986 qcom,ipa-hw-mode = <0>; /* IPA hw type = Normal */
987 qcom,wan-rx-ring-size = <192>; /* IPA WAN-rx-ring-size*/
988 qcom,lan-rx-ring-size = <192>; /* IPA LAN-rx-ring-size*/
989 clock-names = "core_clk";
990 clocks = <&clock_gcc clk_ipa_clk>;
991 qcom,ee = <0>;
992 qcom,use-ipa-tethering-bridge;
993 qcom,modem-cfg-emb-pipe-flt;
994 qcom,msm-bus,name = "ipa";
995 qcom,msm-bus,num-cases = <3>;
996 qcom,msm-bus,num-paths = <1>;
997 qcom,msm-bus,vectors-KBps =
998 <90 512 0 0>, /* No BIMC vote (ab=0 Mbps, ib=0 Mbps ~ 0MHZ) */
999 <90 512 100000 800000>, /* SVS (ab=100, ib=800 ~ 50MHz) */
1000 <90 512 100000 1200000>; /* PERF (ab=100, ib=1200 ~ 75MHz) */
1001 qcom,bus-vector-names = "MIN", "SVS", "PERF";
1002 };
1003
1004 qcom,rmnet-ipa {
1005 compatible = "qcom,rmnet-ipa";
1006 qcom,rmnet-ipa-ssr;
1007 qcom,ipa-loaduC;
1008 qcom,ipa-advertise-sg-support;
1009 };
1010
Kiran Gundaaf6a0b62017-10-23 16:03:10 +05301011 spmi_bus: qcom,spmi@200f000 {
1012 compatible = "qcom,spmi-pmic-arb";
1013 reg = <0x200f000 0x1000>,
1014 <0x2400000 0x800000>,
1015 <0x2c00000 0x800000>,
1016 <0x3800000 0x200000>,
1017 <0x200a000 0x2100>;
1018 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
1019 interrupt-names = "periph_irq";
1020 interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
1021 qcom,ee = <0>;
1022 qcom,channel = <0>;
Kiran Gunda90e356a2017-11-22 17:04:46 +05301023 #address-cells = <2>;
Kiran Gundaaf6a0b62017-10-23 16:03:10 +05301024 #size-cells = <0>;
1025 interrupt-controller;
Kiran Gunda90e356a2017-11-22 17:04:46 +05301026 #interrupt-cells = <4>;
Kiran Gundaaf6a0b62017-10-23 16:03:10 +05301027 cell-index = <0>;
1028 };
Srinivas Ramana3cac2782017-09-13 16:31:17 +05301029};
Kiran Gunda0954f392017-10-16 16:24:55 +05301030
1031#include "pm8953-rpm-regulator.dtsi"
1032#include "pm8953.dtsi"
1033#include "msm8953-regulator.dtsi"