blob: 6c479de3b8d49f864418df0afe50fccdd722d277 [file] [log] [blame]
Johannes Berg8ca151b2013-01-24 14:25:36 +01001/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
Emmanuel Grumbach51368bf2013-12-30 13:15:54 +02008 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
Johannes Berg8ca151b2013-01-24 14:25:36 +01009 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
Emmanuel Grumbach410dc5a2013-02-18 09:22:28 +020025 * in the file called COPYING.
Johannes Berg8ca151b2013-01-24 14:25:36 +010026 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
Emmanuel Grumbach51368bf2013-12-30 13:15:54 +020033 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
Johannes Berg8ca151b2013-01-24 14:25:36 +010034 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
63
64#ifndef __fw_api_h__
65#define __fw_api_h__
66
67#include "fw-api-rs.h"
68#include "fw-api-tx.h"
69#include "fw-api-sta.h"
70#include "fw-api-mac.h"
71#include "fw-api-power.h"
72#include "fw-api-d3.h"
Emmanuel Grumbach5b7ff612014-03-11 19:27:45 +020073#include "fw-api-coex.h"
Haim Dreyfusse820c2d2014-04-06 11:19:09 +030074#include "fw-api-scan.h"
Johannes Berg8ca151b2013-01-24 14:25:36 +010075
Eytan Lifshitz19e737c2013-09-09 13:30:15 +020076/* maximal number of Tx queues in any platform */
77#define IWL_MVM_MAX_QUEUES 20
78
79/* Tx queue numbers */
Johannes Berg8ca151b2013-01-24 14:25:36 +010080enum {
81 IWL_MVM_OFFCHANNEL_QUEUE = 8,
82 IWL_MVM_CMD_QUEUE = 9,
Johannes Berg8ca151b2013-01-24 14:25:36 +010083};
84
Eytan Lifshitz19e737c2013-09-09 13:30:15 +020085#define IWL_MVM_CMD_FIFO 7
86
Johannes Berg8ca151b2013-01-24 14:25:36 +010087#define IWL_MVM_STATION_COUNT 16
88
89/* commands */
90enum {
91 MVM_ALIVE = 0x1,
92 REPLY_ERROR = 0x2,
93
94 INIT_COMPLETE_NOTIF = 0x4,
95
96 /* PHY context commands */
97 PHY_CONTEXT_CMD = 0x8,
98 DBG_CFG = 0x9,
Emmanuel Grumbachb9fae2d2014-02-17 11:24:10 +020099 ANTENNA_COUPLING_NOTIFICATION = 0xa,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100100
101 /* station table */
Max Stepanov5a258aa2013-04-07 09:11:21 +0300102 ADD_STA_KEY = 0x17,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100103 ADD_STA = 0x18,
104 REMOVE_STA = 0x19,
105
106 /* TX */
107 TX_CMD = 0x1c,
108 TXPATH_FLUSH = 0x1e,
109 MGMT_MCAST_KEY = 0x1f,
110
111 /* global key */
112 WEP_KEY = 0x20,
113
114 /* MAC and Binding commands */
115 MAC_CONTEXT_CMD = 0x28,
116 TIME_EVENT_CMD = 0x29, /* both CMD and response */
117 TIME_EVENT_NOTIFICATION = 0x2a,
118 BINDING_CONTEXT_CMD = 0x2b,
119 TIME_QUOTA_CMD = 0x2c,
Johannes Berg4ac6cb52013-08-08 09:30:13 +0200120 NON_QOS_TX_COUNTER_CMD = 0x2d,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100121
122 LQ_CMD = 0x4e,
123
124 /* Calibration */
125 TEMPERATURE_NOTIFICATION = 0x62,
126 CALIBRATION_CFG_CMD = 0x65,
127 CALIBRATION_RES_NOTIFICATION = 0x66,
128 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
129 RADIO_VERSION_NOTIFICATION = 0x68,
130
131 /* Scan offload */
132 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
133 SCAN_OFFLOAD_ABORT_CMD = 0x52,
134 SCAN_OFFLOAD_COMPLETE = 0x6D,
135 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
136 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
David Spinadel35a000b2013-08-28 09:29:43 +0300137 MATCH_FOUND_NOTIFICATION = 0xd9,
David Spinadelfb98be52014-05-04 12:51:10 +0300138 SCAN_ITERATION_COMPLETE = 0xe7,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100139
140 /* Phy */
141 PHY_CONFIGURATION_CMD = 0x6a,
142 CALIB_RES_NOTIF_PHY_DB = 0x6b,
143 /* PHY_DB_CMD = 0x6c, */
144
Alexander Bondare811ada2013-03-10 15:29:44 +0200145 /* Power - legacy power table command */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100146 POWER_TABLE_CMD = 0x77,
Alexander Bondar175a70b2013-04-14 20:59:37 +0300147 PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100148
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +0300149 /* Thermal Throttling*/
150 REPLY_THERMAL_MNG_BACKOFF = 0x7e,
151
Johannes Berg8ca151b2013-01-24 14:25:36 +0100152 /* Scanning */
153 SCAN_REQUEST_CMD = 0x80,
154 SCAN_ABORT_CMD = 0x81,
155 SCAN_START_NOTIFICATION = 0x82,
156 SCAN_RESULTS_NOTIFICATION = 0x83,
157 SCAN_COMPLETE_NOTIFICATION = 0x84,
158
159 /* NVM */
160 NVM_ACCESS_CMD = 0x88,
161
162 SET_CALIB_DEFAULT_CMD = 0x8e,
163
Ilan Peer571765c2013-03-05 15:26:03 +0200164 BEACON_NOTIFICATION = 0x90,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100165 BEACON_TEMPLATE_CMD = 0x91,
166 TX_ANT_CONFIGURATION_CMD = 0x98,
167 STATISTICS_NOTIFICATION = 0x9d,
Johannes Berg3e56ead2013-02-15 22:23:18 +0100168 EOSP_NOTIFICATION = 0x9e,
Matti Gottlieb88f2fd72013-07-09 15:25:46 +0300169 REDUCE_TX_POWER_CMD = 0x9f,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100170
171 /* RF-KILL commands and notifications */
172 CARD_STATE_CMD = 0xa0,
173 CARD_STATE_NOTIFICATION = 0xa1,
174
Hila Gonend64048e2013-03-13 18:00:03 +0200175 MISSED_BEACONS_NOTIFICATION = 0xa2,
176
Alexander Bondare811ada2013-03-10 15:29:44 +0200177 /* Power - new power table command */
178 MAC_PM_POWER_TABLE = 0xa9,
179
Johannes Berg8ca151b2013-01-24 14:25:36 +0100180 REPLY_RX_PHY_CMD = 0xc0,
181 REPLY_RX_MPDU_CMD = 0xc1,
182 BA_NOTIF = 0xc5,
183
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200184 /* BT Coex */
185 BT_COEX_PRIO_TABLE = 0xcc,
186 BT_COEX_PROT_ENV = 0xcd,
187 BT_PROFILE_NOTIFICATION = 0xce,
Emmanuel Grumbach430a3bb2014-04-02 09:55:16 +0300188 BT_CONFIG = 0x9b,
189 BT_COEX_UPDATE_SW_BOOST = 0x5a,
190 BT_COEX_UPDATE_CORUN_LUT = 0x5b,
191 BT_COEX_UPDATE_REDUCED_TXP = 0x5c,
Emmanuel Grumbachdac94da2013-06-18 07:35:27 +0300192 BT_COEX_CI = 0x5d,
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200193
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +0200194 REPLY_SF_CFG_CMD = 0xd1,
Hila Gonen7df15b12012-12-12 11:16:19 +0200195 REPLY_BEACON_FILTERING_CMD = 0xd2,
196
Johannes Berg8ca151b2013-01-24 14:25:36 +0100197 REPLY_DEBUG_CMD = 0xf0,
198 DEBUG_LOG_MSG = 0xf7,
199
Eliad Pellerc87163b2014-01-08 10:11:11 +0200200 BCAST_FILTER_CMD = 0xcf,
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +0300201 MCAST_FILTER_CMD = 0xd0,
202
Johannes Berg8ca151b2013-01-24 14:25:36 +0100203 /* D3 commands/notifications */
204 D3_CONFIG_CMD = 0xd3,
205 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
206 OFFLOADS_QUERY_CMD = 0xd5,
207 REMOTE_WAKE_CONFIG_CMD = 0xd6,
Arik Nemtsov98ee7782013-10-02 16:58:09 +0300208 D0I3_END_CMD = 0xed,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100209
210 /* for WoWLAN in particular */
211 WOWLAN_PATTERNS = 0xe0,
212 WOWLAN_CONFIGURATION = 0xe1,
213 WOWLAN_TSC_RSC_PARAM = 0xe2,
214 WOWLAN_TKIP_PARAM = 0xe3,
215 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
216 WOWLAN_GET_STATUSES = 0xe5,
217 WOWLAN_TX_POWER_PER_DB = 0xe6,
218
219 /* and for NetDetect */
220 NET_DETECT_CONFIG_CMD = 0x54,
221 NET_DETECT_PROFILES_QUERY_CMD = 0x56,
222 NET_DETECT_PROFILES_CMD = 0x57,
223 NET_DETECT_HOTSPOTS_CMD = 0x58,
224 NET_DETECT_HOTSPOTS_QUERY_CMD = 0x59,
225
226 REPLY_MAX = 0xff,
227};
228
229/**
230 * struct iwl_cmd_response - generic response struct for most commands
231 * @status: status of the command asked, changes for each one
232 */
233struct iwl_cmd_response {
234 __le32 status;
235};
236
237/*
238 * struct iwl_tx_ant_cfg_cmd
239 * @valid: valid antenna configuration
240 */
241struct iwl_tx_ant_cfg_cmd {
242 __le32 valid;
243} __packed;
244
Matti Gottlieb88f2fd72013-07-09 15:25:46 +0300245/**
246 * struct iwl_reduce_tx_power_cmd - TX power reduction command
247 * REDUCE_TX_POWER_CMD = 0x9f
248 * @flags: (reserved for future implementation)
249 * @mac_context_id: id of the mac ctx for which we are reducing TX power.
250 * @pwr_restriction: TX power restriction in dBms.
251 */
252struct iwl_reduce_tx_power_cmd {
253 u8 flags;
254 u8 mac_context_id;
255 __le16 pwr_restriction;
256} __packed; /* TX_REDUCED_POWER_API_S_VER_1 */
257
Johannes Berg8ca151b2013-01-24 14:25:36 +0100258/*
259 * Calibration control struct.
260 * Sent as part of the phy configuration command.
261 * @flow_trigger: bitmap for which calibrations to perform according to
262 * flow triggers.
263 * @event_trigger: bitmap for which calibrations to perform according to
264 * event triggers.
265 */
266struct iwl_calib_ctrl {
267 __le32 flow_trigger;
268 __le32 event_trigger;
269} __packed;
270
271/* This enum defines the bitmap of various calibrations to enable in both
272 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
273 */
274enum iwl_calib_cfg {
275 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
276 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
277 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
278 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
279 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
280 IWL_CALIB_CFG_DC_IDX = BIT(5),
281 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
282 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
283 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
284 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
285 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
286 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
287 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
288 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
289 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
290 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
291 IWL_CALIB_CFG_DAC_IDX = BIT(16),
292 IWL_CALIB_CFG_ABS_IDX = BIT(17),
293 IWL_CALIB_CFG_AGC_IDX = BIT(18),
294};
295
296/*
297 * Phy configuration command.
298 */
299struct iwl_phy_cfg_cmd {
300 __le32 phy_cfg;
301 struct iwl_calib_ctrl calib_control;
302} __packed;
303
304#define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
305#define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
306#define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
307#define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
308#define PHY_CFG_TX_CHAIN_A BIT(8)
309#define PHY_CFG_TX_CHAIN_B BIT(9)
310#define PHY_CFG_TX_CHAIN_C BIT(10)
311#define PHY_CFG_RX_CHAIN_A BIT(12)
312#define PHY_CFG_RX_CHAIN_B BIT(13)
313#define PHY_CFG_RX_CHAIN_C BIT(14)
314
315
316/* Target of the NVM_ACCESS_CMD */
317enum {
318 NVM_ACCESS_TARGET_CACHE = 0,
319 NVM_ACCESS_TARGET_OTP = 1,
320 NVM_ACCESS_TARGET_EEPROM = 2,
321};
322
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200323/* Section types for NVM_ACCESS_CMD */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100324enum {
Eran Hararyae2b21b2014-01-09 08:08:24 +0200325 NVM_SECTION_TYPE_SW = 1,
Eran Harary77db0a32014-02-04 14:21:38 +0200326 NVM_SECTION_TYPE_REGULATORY = 3,
Eran Hararyae2b21b2014-01-09 08:08:24 +0200327 NVM_SECTION_TYPE_CALIBRATION = 4,
328 NVM_SECTION_TYPE_PRODUCTION = 5,
Eran Harary77db0a32014-02-04 14:21:38 +0200329 NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
330 NVM_MAX_NUM_SECTIONS = 12,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100331};
332
333/**
334 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
335 * @op_code: 0 - read, 1 - write
336 * @target: NVM_ACCESS_TARGET_*
337 * @type: NVM_SECTION_TYPE_*
338 * @offset: offset in bytes into the section
339 * @length: in bytes, to read/write
340 * @data: if write operation, the data to write. On read its empty
341 */
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200342struct iwl_nvm_access_cmd {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100343 u8 op_code;
344 u8 target;
345 __le16 type;
346 __le16 offset;
347 __le16 length;
348 u8 data[];
349} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
350
351/**
352 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
353 * @offset: offset in bytes into the section
354 * @length: in bytes, either how much was written or read
355 * @type: NVM_SECTION_TYPE_*
356 * @status: 0 for success, fail otherwise
357 * @data: if read operation, the data returned. Empty on write.
358 */
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200359struct iwl_nvm_access_resp {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100360 __le16 offset;
361 __le16 length;
362 __le16 type;
363 __le16 status;
364 u8 data[];
365} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
366
367/* MVM_ALIVE 0x1 */
368
369/* alive response is_valid values */
370#define ALIVE_RESP_UCODE_OK BIT(0)
371#define ALIVE_RESP_RFKILL BIT(1)
372
373/* alive response ver_type values */
374enum {
375 FW_TYPE_HW = 0,
376 FW_TYPE_PROT = 1,
377 FW_TYPE_AP = 2,
378 FW_TYPE_WOWLAN = 3,
379 FW_TYPE_TIMING = 4,
380 FW_TYPE_WIPAN = 5
381};
382
383/* alive response ver_subtype values */
384enum {
385 FW_SUBTYPE_FULL_FEATURE = 0,
386 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
387 FW_SUBTYPE_REDUCED = 2,
388 FW_SUBTYPE_ALIVE_ONLY = 3,
389 FW_SUBTYPE_WOWLAN = 4,
390 FW_SUBTYPE_AP_SUBTYPE = 5,
391 FW_SUBTYPE_WIPAN = 6,
392 FW_SUBTYPE_INITIALIZE = 9
393};
394
395#define IWL_ALIVE_STATUS_ERR 0xDEAD
396#define IWL_ALIVE_STATUS_OK 0xCAFE
397
398#define IWL_ALIVE_FLG_RFKILL BIT(0)
399
400struct mvm_alive_resp {
401 __le16 status;
402 __le16 flags;
403 u8 ucode_minor;
404 u8 ucode_major;
405 __le16 id;
406 u8 api_minor;
407 u8 api_major;
408 u8 ver_subtype;
409 u8 ver_type;
410 u8 mac;
411 u8 opt;
412 __le16 reserved2;
413 __le32 timestamp;
414 __le32 error_event_table_ptr; /* SRAM address for error log */
415 __le32 log_event_table_ptr; /* SRAM address for event log */
416 __le32 cpu_register_ptr;
417 __le32 dbgm_config_ptr;
418 __le32 alive_counter_ptr;
419 __le32 scd_base_ptr; /* SRAM address for SCD */
420} __packed; /* ALIVE_RES_API_S_VER_1 */
421
Eran Harary01a9ca52014-02-03 09:29:57 +0200422struct mvm_alive_resp_ver2 {
423 __le16 status;
424 __le16 flags;
425 u8 ucode_minor;
426 u8 ucode_major;
427 __le16 id;
428 u8 api_minor;
429 u8 api_major;
430 u8 ver_subtype;
431 u8 ver_type;
432 u8 mac;
433 u8 opt;
434 __le16 reserved2;
435 __le32 timestamp;
436 __le32 error_event_table_ptr; /* SRAM address for error log */
437 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */
438 __le32 cpu_register_ptr;
439 __le32 dbgm_config_ptr;
440 __le32 alive_counter_ptr;
441 __le32 scd_base_ptr; /* SRAM address for SCD */
442 __le32 st_fwrd_addr; /* pointer to Store and forward */
443 __le32 st_fwrd_size;
444 u8 umac_minor; /* UMAC version: minor */
445 u8 umac_major; /* UMAC version: major */
446 __le16 umac_id; /* UMAC version: id */
447 __le32 error_info_addr; /* SRAM address for UMAC error log */
448 __le32 dbg_print_buff_addr;
449} __packed; /* ALIVE_RES_API_S_VER_2 */
450
Johannes Berg8ca151b2013-01-24 14:25:36 +0100451/* Error response/notification */
452enum {
453 FW_ERR_UNKNOWN_CMD = 0x0,
454 FW_ERR_INVALID_CMD_PARAM = 0x1,
455 FW_ERR_SERVICE = 0x2,
456 FW_ERR_ARC_MEMORY = 0x3,
457 FW_ERR_ARC_CODE = 0x4,
458 FW_ERR_WATCH_DOG = 0x5,
459 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
460 FW_ERR_WEP_KEY_SIZE = 0x11,
461 FW_ERR_OBSOLETE_FUNC = 0x12,
462 FW_ERR_UNEXPECTED = 0xFE,
463 FW_ERR_FATAL = 0xFF
464};
465
466/**
467 * struct iwl_error_resp - FW error indication
468 * ( REPLY_ERROR = 0x2 )
469 * @error_type: one of FW_ERR_*
470 * @cmd_id: the command ID for which the error occured
471 * @bad_cmd_seq_num: sequence number of the erroneous command
472 * @error_service: which service created the error, applicable only if
473 * error_type = 2, otherwise 0
474 * @timestamp: TSF in usecs.
475 */
476struct iwl_error_resp {
477 __le32 error_type;
478 u8 cmd_id;
479 u8 reserved1;
480 __le16 bad_cmd_seq_num;
481 __le32 error_service;
482 __le64 timestamp;
483} __packed;
484
485
486/* Common PHY, MAC and Bindings definitions */
487
488#define MAX_MACS_IN_BINDING (3)
489#define MAX_BINDINGS (4)
490#define AUX_BINDING_INDEX (3)
491#define MAX_PHYS (4)
492
493/* Used to extract ID and color from the context dword */
494#define FW_CTXT_ID_POS (0)
495#define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
496#define FW_CTXT_COLOR_POS (8)
497#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
498#define FW_CTXT_INVALID (0xffffffff)
499
500#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
501 (_color << FW_CTXT_COLOR_POS))
502
503/* Possible actions on PHYs, MACs and Bindings */
504enum {
505 FW_CTXT_ACTION_STUB = 0,
506 FW_CTXT_ACTION_ADD,
507 FW_CTXT_ACTION_MODIFY,
508 FW_CTXT_ACTION_REMOVE,
509 FW_CTXT_ACTION_NUM
510}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
511
512/* Time Events */
513
514/* Time Event types, according to MAC type */
515enum iwl_time_event_type {
516 /* BSS Station Events */
517 TE_BSS_STA_AGGRESSIVE_ASSOC,
518 TE_BSS_STA_ASSOC,
519 TE_BSS_EAP_DHCP_PROT,
520 TE_BSS_QUIET_PERIOD,
521
522 /* P2P Device Events */
523 TE_P2P_DEVICE_DISCOVERABLE,
524 TE_P2P_DEVICE_LISTEN,
525 TE_P2P_DEVICE_ACTION_SCAN,
526 TE_P2P_DEVICE_FULL_SCAN,
527
528 /* P2P Client Events */
529 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
530 TE_P2P_CLIENT_ASSOC,
531 TE_P2P_CLIENT_QUIET_PERIOD,
532
533 /* P2P GO Events */
534 TE_P2P_GO_ASSOC_PROT,
535 TE_P2P_GO_REPETITIVE_NOA,
536 TE_P2P_GO_CT_WINDOW,
537
538 /* WiDi Sync Events */
539 TE_WIDI_TX_SYNC,
540
541 TE_MAX
542}; /* MAC_EVENT_TYPE_API_E_VER_1 */
543
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300544
545
546/* Time event - defines for command API v1 */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100547
548/*
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300549 * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed.
550 * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only
551 * the first fragment is scheduled.
552 * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only
553 * the first 2 fragments are scheduled.
554 * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
555 * number of fragments are valid.
Johannes Berg8ca151b2013-01-24 14:25:36 +0100556 *
557 * Other than the constant defined above, specifying a fragmentation value 'x'
558 * means that the event can be fragmented but only the first 'x' will be
559 * scheduled.
560 */
561enum {
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300562 TE_V1_FRAG_NONE = 0,
563 TE_V1_FRAG_SINGLE = 1,
564 TE_V1_FRAG_DUAL = 2,
565 TE_V1_FRAG_ENDLESS = 0xffffffff
Johannes Berg8ca151b2013-01-24 14:25:36 +0100566};
567
Johannes Berg8ca151b2013-01-24 14:25:36 +0100568/* If a Time Event can be fragmented, this is the max number of fragments */
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300569#define TE_V1_FRAG_MAX_MSK 0x0fffffff
570/* Repeat the time event endlessly (until removed) */
571#define TE_V1_REPEAT_ENDLESS 0xffffffff
572/* If a Time Event has bounded repetitions, this is the maximal value */
573#define TE_V1_REPEAT_MAX_MSK_V1 0x0fffffff
574
575/* Time Event dependencies: none, on another TE, or in a specific time */
576enum {
577 TE_V1_INDEPENDENT = 0,
578 TE_V1_DEP_OTHER = BIT(0),
579 TE_V1_DEP_TSF = BIT(1),
580 TE_V1_EVENT_SOCIOPATHIC = BIT(2),
581}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
582
583/*
584 * @TE_V1_NOTIF_NONE: no notifications
585 * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start
586 * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end
587 * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use
588 * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use.
589 * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start
590 * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end
591 * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use.
592 * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use.
593 *
594 * Supported Time event notifications configuration.
595 * A notification (both event and fragment) includes a status indicating weather
596 * the FW was able to schedule the event or not. For fragment start/end
597 * notification the status is always success. There is no start/end fragment
598 * notification for monolithic events.
599 */
600enum {
601 TE_V1_NOTIF_NONE = 0,
602 TE_V1_NOTIF_HOST_EVENT_START = BIT(0),
603 TE_V1_NOTIF_HOST_EVENT_END = BIT(1),
604 TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2),
605 TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3),
606 TE_V1_NOTIF_HOST_FRAG_START = BIT(4),
607 TE_V1_NOTIF_HOST_FRAG_END = BIT(5),
608 TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6),
609 TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7),
610}; /* MAC_EVENT_ACTION_API_E_VER_2 */
611
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300612/* Time event - defines for command API */
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300613
614/*
615 * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed.
616 * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only
617 * the first fragment is scheduled.
618 * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only
619 * the first 2 fragments are scheduled.
620 * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
621 * number of fragments are valid.
622 *
623 * Other than the constant defined above, specifying a fragmentation value 'x'
624 * means that the event can be fragmented but only the first 'x' will be
625 * scheduled.
626 */
627enum {
628 TE_V2_FRAG_NONE = 0,
629 TE_V2_FRAG_SINGLE = 1,
630 TE_V2_FRAG_DUAL = 2,
631 TE_V2_FRAG_MAX = 0xfe,
632 TE_V2_FRAG_ENDLESS = 0xff
633};
634
635/* Repeat the time event endlessly (until removed) */
636#define TE_V2_REPEAT_ENDLESS 0xff
637/* If a Time Event has bounded repetitions, this is the maximal value */
638#define TE_V2_REPEAT_MAX 0xfe
639
640#define TE_V2_PLACEMENT_POS 12
641#define TE_V2_ABSENCE_POS 15
642
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300643/* Time event policy values
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300644 * A notification (both event and fragment) includes a status indicating weather
645 * the FW was able to schedule the event or not. For fragment start/end
646 * notification the status is always success. There is no start/end fragment
647 * notification for monolithic events.
648 *
649 * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable
650 * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start
651 * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end
652 * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use
653 * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use.
654 * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start
655 * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end
656 * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use.
657 * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
658 * @TE_V2_DEP_OTHER: depends on another time event
659 * @TE_V2_DEP_TSF: depends on a specific time
660 * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
661 * @TE_V2_ABSENCE: are we present or absent during the Time Event.
662 */
663enum {
664 TE_V2_DEFAULT_POLICY = 0x0,
665
666 /* notifications (event start/stop, fragment start/stop) */
667 TE_V2_NOTIF_HOST_EVENT_START = BIT(0),
668 TE_V2_NOTIF_HOST_EVENT_END = BIT(1),
669 TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2),
670 TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3),
671
672 TE_V2_NOTIF_HOST_FRAG_START = BIT(4),
673 TE_V2_NOTIF_HOST_FRAG_END = BIT(5),
674 TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6),
675 TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7),
Emmanuel Grumbach1f6bf072014-02-16 15:36:00 +0200676 T2_V2_START_IMMEDIATELY = BIT(11),
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300677
678 TE_V2_NOTIF_MSK = 0xff,
679
680 /* placement characteristics */
681 TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS),
682 TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1),
683 TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2),
684
685 /* are we present or absent during the Time Event. */
686 TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS),
687};
688
689/**
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300690 * struct iwl_time_event_cmd_api - configuring Time Events
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300691 * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also
692 * with version 1. determined by IWL_UCODE_TLV_FLAGS)
693 * ( TIME_EVENT_CMD = 0x29 )
694 * @id_and_color: ID and color of the relevant MAC
695 * @action: action to perform, one of FW_CTXT_ACTION_*
696 * @id: this field has two meanings, depending on the action:
697 * If the action is ADD, then it means the type of event to add.
698 * For all other actions it is the unique event ID assigned when the
699 * event was added by the FW.
700 * @apply_time: When to start the Time Event (in GP2)
701 * @max_delay: maximum delay to event's start (apply time), in TU
702 * @depends_on: the unique ID of the event we depend on (if any)
703 * @interval: interval between repetitions, in TU
704 * @duration: duration of event in TU
705 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
706 * @max_frags: maximal number of fragments the Time Event can be divided to
707 * @policy: defines whether uCode shall notify the host or other uCode modules
708 * on event and/or fragment start and/or end
709 * using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
710 * TE_EVENT_SOCIOPATHIC
711 * using TE_ABSENCE and using TE_NOTIF_*
712 */
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300713struct iwl_time_event_cmd {
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300714 /* COMMON_INDEX_HDR_API_S_VER_1 */
715 __le32 id_and_color;
716 __le32 action;
717 __le32 id;
718 /* MAC_TIME_EVENT_DATA_API_S_VER_2 */
719 __le32 apply_time;
720 __le32 max_delay;
721 __le32 depends_on;
722 __le32 interval;
723 __le32 duration;
724 u8 repeat;
725 u8 max_frags;
726 __le16 policy;
727} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */
728
Johannes Berg8ca151b2013-01-24 14:25:36 +0100729/**
730 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
731 * @status: bit 0 indicates success, all others specify errors
732 * @id: the Time Event type
733 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
734 * @id_and_color: ID and color of the relevant MAC
735 */
736struct iwl_time_event_resp {
737 __le32 status;
738 __le32 id;
739 __le32 unique_id;
740 __le32 id_and_color;
741} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
742
743/**
744 * struct iwl_time_event_notif - notifications of time event start/stop
745 * ( TIME_EVENT_NOTIFICATION = 0x2a )
746 * @timestamp: action timestamp in GP2
747 * @session_id: session's unique id
748 * @unique_id: unique id of the Time Event itself
749 * @id_and_color: ID and color of the relevant MAC
750 * @action: one of TE_NOTIF_START or TE_NOTIF_END
751 * @status: true if scheduled, false otherwise (not executed)
752 */
753struct iwl_time_event_notif {
754 __le32 timestamp;
755 __le32 session_id;
756 __le32 unique_id;
757 __le32 id_and_color;
758 __le32 action;
759 __le32 status;
760} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
761
762
763/* Bindings and Time Quota */
764
765/**
766 * struct iwl_binding_cmd - configuring bindings
767 * ( BINDING_CONTEXT_CMD = 0x2b )
768 * @id_and_color: ID and color of the relevant Binding
769 * @action: action to perform, one of FW_CTXT_ACTION_*
770 * @macs: array of MAC id and colors which belong to the binding
771 * @phy: PHY id and color which belongs to the binding
772 */
773struct iwl_binding_cmd {
774 /* COMMON_INDEX_HDR_API_S_VER_1 */
775 __le32 id_and_color;
776 __le32 action;
777 /* BINDING_DATA_API_S_VER_1 */
778 __le32 macs[MAX_MACS_IN_BINDING];
779 __le32 phy;
780} __packed; /* BINDING_CMD_API_S_VER_1 */
781
Ilan Peer35adfd62013-02-04 13:16:24 +0200782/* The maximal number of fragments in the FW's schedule session */
783#define IWL_MVM_MAX_QUOTA 128
784
Johannes Berg8ca151b2013-01-24 14:25:36 +0100785/**
786 * struct iwl_time_quota_data - configuration of time quota per binding
787 * @id_and_color: ID and color of the relevant Binding
788 * @quota: absolute time quota in TU. The scheduler will try to divide the
789 * remainig quota (after Time Events) according to this quota.
790 * @max_duration: max uninterrupted context duration in TU
791 */
792struct iwl_time_quota_data {
793 __le32 id_and_color;
794 __le32 quota;
795 __le32 max_duration;
796} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
797
798/**
799 * struct iwl_time_quota_cmd - configuration of time quota between bindings
800 * ( TIME_QUOTA_CMD = 0x2c )
801 * @quotas: allocations per binding
802 */
803struct iwl_time_quota_cmd {
804 struct iwl_time_quota_data quotas[MAX_BINDINGS];
805} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
806
807
808/* PHY context */
809
810/* Supported bands */
811#define PHY_BAND_5 (0)
812#define PHY_BAND_24 (1)
813
814/* Supported channel width, vary if there is VHT support */
815#define PHY_VHT_CHANNEL_MODE20 (0x0)
816#define PHY_VHT_CHANNEL_MODE40 (0x1)
817#define PHY_VHT_CHANNEL_MODE80 (0x2)
818#define PHY_VHT_CHANNEL_MODE160 (0x3)
819
820/*
821 * Control channel position:
822 * For legacy set bit means upper channel, otherwise lower.
823 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
824 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
825 * center_freq
826 * |
827 * 40Mhz |_______|_______|
828 * 80Mhz |_______|_______|_______|_______|
829 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
830 * code 011 010 001 000 | 100 101 110 111
831 */
832#define PHY_VHT_CTRL_POS_1_BELOW (0x0)
833#define PHY_VHT_CTRL_POS_2_BELOW (0x1)
834#define PHY_VHT_CTRL_POS_3_BELOW (0x2)
835#define PHY_VHT_CTRL_POS_4_BELOW (0x3)
836#define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
837#define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
838#define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
839#define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
840
841/*
842 * @band: PHY_BAND_*
843 * @channel: channel number
844 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
845 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
846 */
847struct iwl_fw_channel_info {
848 u8 band;
849 u8 channel;
850 u8 width;
851 u8 ctrl_pos;
852} __packed;
853
854#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
855#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
856 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
857#define PHY_RX_CHAIN_VALID_POS (1)
858#define PHY_RX_CHAIN_VALID_MSK \
859 (0x7 << PHY_RX_CHAIN_VALID_POS)
860#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
861#define PHY_RX_CHAIN_FORCE_SEL_MSK \
862 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
863#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
864#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
865 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
866#define PHY_RX_CHAIN_CNT_POS (10)
867#define PHY_RX_CHAIN_CNT_MSK \
868 (0x3 << PHY_RX_CHAIN_CNT_POS)
869#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
870#define PHY_RX_CHAIN_MIMO_CNT_MSK \
871 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
872#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
873#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
874 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
875
876/* TODO: fix the value, make it depend on firmware at runtime? */
877#define NUM_PHY_CTX 3
878
879/* TODO: complete missing documentation */
880/**
881 * struct iwl_phy_context_cmd - config of the PHY context
882 * ( PHY_CONTEXT_CMD = 0x8 )
883 * @id_and_color: ID and color of the relevant Binding
884 * @action: action to perform, one of FW_CTXT_ACTION_*
885 * @apply_time: 0 means immediate apply and context switch.
886 * other value means apply new params after X usecs
887 * @tx_param_color: ???
888 * @channel_info:
889 * @txchain_info: ???
890 * @rxchain_info: ???
891 * @acquisition_data: ???
892 * @dsp_cfg_flags: set to 0
893 */
894struct iwl_phy_context_cmd {
895 /* COMMON_INDEX_HDR_API_S_VER_1 */
896 __le32 id_and_color;
897 __le32 action;
898 /* PHY_CONTEXT_DATA_API_S_VER_1 */
899 __le32 apply_time;
900 __le32 tx_param_color;
901 struct iwl_fw_channel_info ci;
902 __le32 txchain_info;
903 __le32 rxchain_info;
904 __le32 acquisition_data;
905 __le32 dsp_cfg_flags;
906} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
907
908#define IWL_RX_INFO_PHY_CNT 8
Avri Altmana2d7b872013-07-09 01:42:17 +0300909#define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1
910#define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff
911#define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00
912#define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000
913#define IWL_RX_INFO_ENERGY_ANT_A_POS 0
914#define IWL_RX_INFO_ENERGY_ANT_B_POS 8
915#define IWL_RX_INFO_ENERGY_ANT_C_POS 16
916
Johannes Berg8ca151b2013-01-24 14:25:36 +0100917#define IWL_RX_INFO_AGC_IDX 1
918#define IWL_RX_INFO_RSSI_AB_IDX 2
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200919#define IWL_OFDM_AGC_A_MSK 0x0000007f
920#define IWL_OFDM_AGC_A_POS 0
921#define IWL_OFDM_AGC_B_MSK 0x00003f80
922#define IWL_OFDM_AGC_B_POS 7
923#define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
924#define IWL_OFDM_AGC_CODE_POS 20
Johannes Berg8ca151b2013-01-24 14:25:36 +0100925#define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
Johannes Berg8ca151b2013-01-24 14:25:36 +0100926#define IWL_OFDM_RSSI_A_POS 0
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200927#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
928#define IWL_OFDM_RSSI_ALLBAND_A_POS 8
Johannes Berg8ca151b2013-01-24 14:25:36 +0100929#define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
Johannes Berg8ca151b2013-01-24 14:25:36 +0100930#define IWL_OFDM_RSSI_B_POS 16
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200931#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
932#define IWL_OFDM_RSSI_ALLBAND_B_POS 24
Johannes Berg8ca151b2013-01-24 14:25:36 +0100933
934/**
935 * struct iwl_rx_phy_info - phy info
936 * (REPLY_RX_PHY_CMD = 0xc0)
937 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
938 * @cfg_phy_cnt: configurable DSP phy data byte count
939 * @stat_id: configurable DSP phy data set ID
940 * @reserved1:
941 * @system_timestamp: GP2 at on air rise
942 * @timestamp: TSF at on air rise
943 * @beacon_time_stamp: beacon at on-air rise
944 * @phy_flags: general phy flags: band, modulation, ...
945 * @channel: channel number
946 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
947 * @rate_n_flags: RATE_MCS_*
948 * @byte_count: frame's byte-count
949 * @frame_time: frame's time on the air, based on byte count and frame rate
950 * calculation
Emmanuel Grumbach6bfcb7e2013-03-03 10:19:45 +0200951 * @mac_active_msk: what MACs were active when the frame was received
Johannes Berg8ca151b2013-01-24 14:25:36 +0100952 *
953 * Before each Rx, the device sends this data. It contains PHY information
954 * about the reception of the packet.
955 */
956struct iwl_rx_phy_info {
957 u8 non_cfg_phy_cnt;
958 u8 cfg_phy_cnt;
959 u8 stat_id;
960 u8 reserved1;
961 __le32 system_timestamp;
962 __le64 timestamp;
963 __le32 beacon_time_stamp;
964 __le16 phy_flags;
965 __le16 channel;
966 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
967 __le32 rate_n_flags;
968 __le32 byte_count;
Emmanuel Grumbach6bfcb7e2013-03-03 10:19:45 +0200969 __le16 mac_active_msk;
Johannes Berg8ca151b2013-01-24 14:25:36 +0100970 __le16 frame_time;
971} __packed;
972
973struct iwl_rx_mpdu_res_start {
974 __le16 byte_count;
975 __le16 reserved;
976} __packed;
977
978/**
979 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
980 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
981 * @RX_RES_PHY_FLAGS_MOD_CCK:
982 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
983 * @RX_RES_PHY_FLAGS_NARROW_BAND:
984 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
985 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
986 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
987 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
988 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
989 */
990enum iwl_rx_phy_flags {
991 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
992 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
993 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
994 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
995 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
996 RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
997 RX_RES_PHY_FLAGS_AGG = BIT(7),
998 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
999 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
1000 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
1001};
1002
1003/**
1004 * enum iwl_mvm_rx_status - written by fw for each Rx packet
1005 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
1006 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
1007 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
1008 * @RX_MPDU_RES_STATUS_KEY_VALID:
1009 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
1010 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
1011 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
1012 * in the driver.
1013 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
1014 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
1015 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
1016 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
1017 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
1018 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
1019 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
1020 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
1021 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
1022 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
1023 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
1024 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
1025 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
1026 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
1027 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
1028 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
1029 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
1030 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
1031 * @RX_MPDU_RES_STATUS_RRF_KILL:
1032 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
1033 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
1034 */
1035enum iwl_mvm_rx_status {
1036 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
1037 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
1038 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
1039 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
1040 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
1041 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
1042 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
1043 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
1044 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
1045 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
1046 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
1047 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
1048 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
Max Stepanove36e5432013-08-27 19:56:13 +03001049 RX_MPDU_RES_STATUS_SEC_EXT_ENC = (4 << 8),
Johannes Berg8ca151b2013-01-24 14:25:36 +01001050 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
1051 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
1052 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
1053 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
1054 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
1055 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
1056 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
1057 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
1058 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
1059 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
1060 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
1061 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
1062 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
1063};
1064
1065/**
1066 * struct iwl_radio_version_notif - information on the radio version
1067 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
1068 * @radio_flavor:
1069 * @radio_step:
1070 * @radio_dash:
1071 */
1072struct iwl_radio_version_notif {
1073 __le32 radio_flavor;
1074 __le32 radio_step;
1075 __le32 radio_dash;
1076} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
1077
1078enum iwl_card_state_flags {
1079 CARD_ENABLED = 0x00,
1080 HW_CARD_DISABLED = 0x01,
1081 SW_CARD_DISABLED = 0x02,
1082 CT_KILL_CARD_DISABLED = 0x04,
1083 HALT_CARD_DISABLED = 0x08,
1084 CARD_DISABLED_MSK = 0x0f,
1085 CARD_IS_RX_ON = 0x10,
1086};
1087
1088/**
1089 * struct iwl_radio_version_notif - information on the radio version
1090 * ( CARD_STATE_NOTIFICATION = 0xa1 )
1091 * @flags: %iwl_card_state_flags
1092 */
1093struct iwl_card_state_notif {
1094 __le32 flags;
1095} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
1096
1097/**
Hila Gonend64048e2013-03-13 18:00:03 +02001098 * struct iwl_missed_beacons_notif - information on missed beacons
1099 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 )
1100 * @mac_id: interface ID
1101 * @consec_missed_beacons_since_last_rx: number of consecutive missed
1102 * beacons since last RX.
1103 * @consec_missed_beacons: number of consecutive missed beacons
1104 * @num_expected_beacons:
1105 * @num_recvd_beacons:
1106 */
1107struct iwl_missed_beacons_notif {
1108 __le32 mac_id;
1109 __le32 consec_missed_beacons_since_last_rx;
1110 __le32 consec_missed_beacons;
1111 __le32 num_expected_beacons;
1112 __le32 num_recvd_beacons;
1113} __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */
1114
1115/**
Johannes Berg8ca151b2013-01-24 14:25:36 +01001116 * struct iwl_set_calib_default_cmd - set default value for calibration.
1117 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
1118 * @calib_index: the calibration to set value for
1119 * @length: of data
1120 * @data: the value to set for the calibration result
1121 */
1122struct iwl_set_calib_default_cmd {
1123 __le16 calib_index;
1124 __le16 length;
1125 u8 data[0];
1126} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
1127
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +03001128#define MAX_PORT_ID_NUM 2
Eliad Pellere59647e2013-11-28 14:08:50 +02001129#define MAX_MCAST_FILTERING_ADDRESSES 256
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +03001130
1131/**
1132 * struct iwl_mcast_filter_cmd - configure multicast filter.
1133 * @filter_own: Set 1 to filter out multicast packets sent by station itself
1134 * @port_id: Multicast MAC addresses array specifier. This is a strange way
1135 * to identify network interface adopted in host-device IF.
1136 * It is used by FW as index in array of addresses. This array has
1137 * MAX_PORT_ID_NUM members.
1138 * @count: Number of MAC addresses in the array
1139 * @pass_all: Set 1 to pass all multicast packets.
1140 * @bssid: current association BSSID.
1141 * @addr_list: Place holder for array of MAC addresses.
1142 * IMPORTANT: add padding if necessary to ensure DWORD alignment.
1143 */
1144struct iwl_mcast_filter_cmd {
1145 u8 filter_own;
1146 u8 port_id;
1147 u8 count;
1148 u8 pass_all;
1149 u8 bssid[6];
1150 u8 reserved[2];
1151 u8 addr_list[0];
1152} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
1153
Eliad Pellerc87163b2014-01-08 10:11:11 +02001154#define MAX_BCAST_FILTERS 8
1155#define MAX_BCAST_FILTER_ATTRS 2
1156
1157/**
1158 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet
1159 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start.
1160 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e.
1161 * start of ip payload).
1162 */
1163enum iwl_mvm_bcast_filter_attr_offset {
1164 BCAST_FILTER_OFFSET_PAYLOAD_START = 0,
1165 BCAST_FILTER_OFFSET_IP_END = 1,
1166};
1167
1168/**
1169 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute
1170 * @offset_type: &enum iwl_mvm_bcast_filter_attr_offset.
1171 * @offset: starting offset of this pattern.
1172 * @val: value to match - big endian (MSB is the first
1173 * byte to match from offset pos).
1174 * @mask: mask to match (big endian).
1175 */
1176struct iwl_fw_bcast_filter_attr {
1177 u8 offset_type;
1178 u8 offset;
1179 __le16 reserved1;
1180 __be32 val;
1181 __be32 mask;
1182} __packed; /* BCAST_FILTER_ATT_S_VER_1 */
1183
1184/**
1185 * enum iwl_mvm_bcast_filter_frame_type - filter frame type
1186 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames.
1187 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames
1188 */
1189enum iwl_mvm_bcast_filter_frame_type {
1190 BCAST_FILTER_FRAME_TYPE_ALL = 0,
1191 BCAST_FILTER_FRAME_TYPE_IPV4 = 1,
1192};
1193
1194/**
1195 * struct iwl_fw_bcast_filter - broadcast filter
1196 * @discard: discard frame (1) or let it pass (0).
1197 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type.
1198 * @num_attrs: number of valid attributes in this filter.
1199 * @attrs: attributes of this filter. a filter is considered matched
1200 * only when all its attributes are matched (i.e. AND relationship)
1201 */
1202struct iwl_fw_bcast_filter {
1203 u8 discard;
1204 u8 frame_type;
1205 u8 num_attrs;
1206 u8 reserved1;
1207 struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS];
1208} __packed; /* BCAST_FILTER_S_VER_1 */
1209
1210/**
1211 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration.
1212 * @default_discard: default action for this mac (discard (1) / pass (0)).
1213 * @attached_filters: bitmap of relevant filters for this mac.
1214 */
1215struct iwl_fw_bcast_mac {
1216 u8 default_discard;
1217 u8 reserved1;
1218 __le16 attached_filters;
1219} __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */
1220
1221/**
1222 * struct iwl_bcast_filter_cmd - broadcast filtering configuration
1223 * @disable: enable (0) / disable (1)
1224 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS)
1225 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER)
1226 * @filters: broadcast filters
1227 * @macs: broadcast filtering configuration per-mac
1228 */
1229struct iwl_bcast_filter_cmd {
1230 u8 disable;
1231 u8 max_bcast_filters;
1232 u8 max_macs;
1233 u8 reserved1;
1234 struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS];
1235 struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER];
1236} __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */
1237
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +03001238struct mvm_statistics_dbg {
1239 __le32 burst_check;
1240 __le32 burst_count;
1241 __le32 wait_for_silence_timeout_cnt;
1242 __le32 reserved[3];
1243} __packed; /* STATISTICS_DEBUG_API_S_VER_2 */
1244
1245struct mvm_statistics_div {
1246 __le32 tx_on_a;
1247 __le32 tx_on_b;
1248 __le32 exec_time;
1249 __le32 probe_time;
1250 __le32 rssi_ant;
1251 __le32 reserved2;
1252} __packed; /* STATISTICS_SLOW_DIV_API_S_VER_2 */
1253
1254struct mvm_statistics_general_common {
1255 __le32 temperature; /* radio temperature */
1256 __le32 temperature_m; /* radio voltage */
1257 struct mvm_statistics_dbg dbg;
1258 __le32 sleep_time;
1259 __le32 slots_out;
1260 __le32 slots_idle;
1261 __le32 ttl_timestamp;
1262 struct mvm_statistics_div div;
1263 __le32 rx_enable_counter;
1264 /*
1265 * num_of_sos_states:
1266 * count the number of times we have to re-tune
1267 * in order to get out of bad PHY status
1268 */
1269 __le32 num_of_sos_states;
1270} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1271
1272struct mvm_statistics_rx_non_phy {
1273 __le32 bogus_cts; /* CTS received when not expecting CTS */
1274 __le32 bogus_ack; /* ACK received when not expecting ACK */
1275 __le32 non_bssid_frames; /* number of frames with BSSID that
1276 * doesn't belong to the STA BSSID */
1277 __le32 filtered_frames; /* count frames that were dumped in the
1278 * filtering process */
1279 __le32 non_channel_beacons; /* beacons with our bss id but not on
1280 * our serving channel */
1281 __le32 channel_beacons; /* beacons with our bss id and in our
1282 * serving channel */
1283 __le32 num_missed_bcon; /* number of missed beacons */
1284 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
1285 * ADC was in saturation */
1286 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
1287 * for INA */
1288 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
1289 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
1290 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
1291 __le32 interference_data_flag; /* flag for interference data
1292 * availability. 1 when data is
1293 * available. */
1294 __le32 channel_load; /* counts RX Enable time in uSec */
1295 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
1296 * and CCK) counter */
1297 __le32 beacon_rssi_a;
1298 __le32 beacon_rssi_b;
1299 __le32 beacon_rssi_c;
1300 __le32 beacon_energy_a;
1301 __le32 beacon_energy_b;
1302 __le32 beacon_energy_c;
1303 __le32 num_bt_kills;
1304 __le32 mac_id;
1305 __le32 directed_data_mpdu;
1306} __packed; /* STATISTICS_RX_NON_PHY_API_S_VER_3 */
1307
1308struct mvm_statistics_rx_phy {
1309 __le32 ina_cnt;
1310 __le32 fina_cnt;
1311 __le32 plcp_err;
1312 __le32 crc32_err;
1313 __le32 overrun_err;
1314 __le32 early_overrun_err;
1315 __le32 crc32_good;
1316 __le32 false_alarm_cnt;
1317 __le32 fina_sync_err_cnt;
1318 __le32 sfd_timeout;
1319 __le32 fina_timeout;
1320 __le32 unresponded_rts;
1321 __le32 rxe_frame_limit_overrun;
1322 __le32 sent_ack_cnt;
1323 __le32 sent_cts_cnt;
1324 __le32 sent_ba_rsp_cnt;
1325 __le32 dsp_self_kill;
1326 __le32 mh_format_err;
1327 __le32 re_acq_main_rssi_sum;
1328 __le32 reserved;
1329} __packed; /* STATISTICS_RX_PHY_API_S_VER_2 */
1330
1331struct mvm_statistics_rx_ht_phy {
1332 __le32 plcp_err;
1333 __le32 overrun_err;
1334 __le32 early_overrun_err;
1335 __le32 crc32_good;
1336 __le32 crc32_err;
1337 __le32 mh_format_err;
1338 __le32 agg_crc32_good;
1339 __le32 agg_mpdu_cnt;
1340 __le32 agg_cnt;
1341 __le32 unsupport_mcs;
1342} __packed; /* STATISTICS_HT_RX_PHY_API_S_VER_1 */
1343
1344#define MAX_CHAINS 3
1345
1346struct mvm_statistics_tx_non_phy_agg {
1347 __le32 ba_timeout;
1348 __le32 ba_reschedule_frames;
1349 __le32 scd_query_agg_frame_cnt;
1350 __le32 scd_query_no_agg;
1351 __le32 scd_query_agg;
1352 __le32 scd_query_mismatch;
1353 __le32 frame_not_ready;
1354 __le32 underrun;
1355 __le32 bt_prio_kill;
1356 __le32 rx_ba_rsp_cnt;
1357 __s8 txpower[MAX_CHAINS];
1358 __s8 reserved;
1359 __le32 reserved2;
1360} __packed; /* STATISTICS_TX_NON_PHY_AGG_API_S_VER_1 */
1361
1362struct mvm_statistics_tx_channel_width {
1363 __le32 ext_cca_narrow_ch20[1];
1364 __le32 ext_cca_narrow_ch40[2];
1365 __le32 ext_cca_narrow_ch80[3];
1366 __le32 ext_cca_narrow_ch160[4];
1367 __le32 last_tx_ch_width_indx;
1368 __le32 rx_detected_per_ch_width[4];
1369 __le32 success_per_ch_width[4];
1370 __le32 fail_per_ch_width[4];
1371}; /* STATISTICS_TX_CHANNEL_WIDTH_API_S_VER_1 */
1372
1373struct mvm_statistics_tx {
1374 __le32 preamble_cnt;
1375 __le32 rx_detected_cnt;
1376 __le32 bt_prio_defer_cnt;
1377 __le32 bt_prio_kill_cnt;
1378 __le32 few_bytes_cnt;
1379 __le32 cts_timeout;
1380 __le32 ack_timeout;
1381 __le32 expected_ack_cnt;
1382 __le32 actual_ack_cnt;
1383 __le32 dump_msdu_cnt;
1384 __le32 burst_abort_next_frame_mismatch_cnt;
1385 __le32 burst_abort_missing_next_frame_cnt;
1386 __le32 cts_timeout_collision;
1387 __le32 ack_or_ba_timeout_collision;
1388 struct mvm_statistics_tx_non_phy_agg agg;
1389 struct mvm_statistics_tx_channel_width channel_width;
1390} __packed; /* STATISTICS_TX_API_S_VER_4 */
1391
1392
1393struct mvm_statistics_bt_activity {
1394 __le32 hi_priority_tx_req_cnt;
1395 __le32 hi_priority_tx_denied_cnt;
1396 __le32 lo_priority_tx_req_cnt;
1397 __le32 lo_priority_tx_denied_cnt;
1398 __le32 hi_priority_rx_req_cnt;
1399 __le32 hi_priority_rx_denied_cnt;
1400 __le32 lo_priority_rx_req_cnt;
1401 __le32 lo_priority_rx_denied_cnt;
1402} __packed; /* STATISTICS_BT_ACTIVITY_API_S_VER_1 */
1403
1404struct mvm_statistics_general {
1405 struct mvm_statistics_general_common common;
1406 __le32 beacon_filtered;
1407 __le32 missed_beacons;
Andrei Otcheretianskia20fd392013-07-21 17:23:59 +03001408 __s8 beacon_filter_average_energy;
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +03001409 __s8 beacon_filter_reason;
1410 __s8 beacon_filter_current_energy;
1411 __s8 beacon_filter_reserved;
1412 __le32 beacon_filter_delta_time;
1413 struct mvm_statistics_bt_activity bt_activity;
1414} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1415
1416struct mvm_statistics_rx {
1417 struct mvm_statistics_rx_phy ofdm;
1418 struct mvm_statistics_rx_phy cck;
1419 struct mvm_statistics_rx_non_phy general;
1420 struct mvm_statistics_rx_ht_phy ofdm_ht;
1421} __packed; /* STATISTICS_RX_API_S_VER_3 */
1422
1423/*
1424 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
1425 *
1426 * By default, uCode issues this notification after receiving a beacon
1427 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
1428 * REPLY_STATISTICS_CMD 0x9c, above.
1429 *
1430 * Statistics counters continue to increment beacon after beacon, but are
1431 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
1432 * 0x9c with CLEAR_STATS bit set (see above).
1433 *
1434 * uCode also issues this notification during scans. uCode clears statistics
1435 * appropriately so that each notification contains statistics for only the
1436 * one channel that has just been scanned.
1437 */
1438
1439struct iwl_notif_statistics { /* STATISTICS_NTFY_API_S_VER_8 */
1440 __le32 flag;
1441 struct mvm_statistics_rx rx;
1442 struct mvm_statistics_tx tx;
1443 struct mvm_statistics_general general;
1444} __packed;
1445
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +02001446/***********************************
1447 * Smart Fifo API
1448 ***********************************/
1449/* Smart Fifo state */
1450enum iwl_sf_state {
1451 SF_LONG_DELAY_ON = 0, /* should never be called by driver */
1452 SF_FULL_ON,
1453 SF_UNINIT,
1454 SF_INIT_OFF,
1455 SF_HW_NUM_STATES
1456};
1457
1458/* Smart Fifo possible scenario */
1459enum iwl_sf_scenario {
1460 SF_SCENARIO_SINGLE_UNICAST,
1461 SF_SCENARIO_AGG_UNICAST,
1462 SF_SCENARIO_MULTICAST,
1463 SF_SCENARIO_BA_RESP,
1464 SF_SCENARIO_TX_RESP,
1465 SF_NUM_SCENARIO
1466};
1467
1468#define SF_TRANSIENT_STATES_NUMBER 2 /* SF_LONG_DELAY_ON and SF_FULL_ON */
1469#define SF_NUM_TIMEOUT_TYPES 2 /* Aging timer and Idle timer */
1470
1471/* smart FIFO default values */
1472#define SF_W_MARK_SISO 4096
1473#define SF_W_MARK_MIMO2 8192
1474#define SF_W_MARK_MIMO3 6144
1475#define SF_W_MARK_LEGACY 4096
1476#define SF_W_MARK_SCAN 4096
1477
1478/* SF Scenarios timers for FULL_ON state (aligned to 32 uSec) */
1479#define SF_SINGLE_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1480#define SF_SINGLE_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1481#define SF_AGG_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1482#define SF_AGG_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1483#define SF_MCAST_IDLE_TIMER 2016 /* 2 mSec */
1484#define SF_MCAST_AGING_TIMER 10016 /* 10 mSec */
1485#define SF_BA_IDLE_TIMER 320 /* 300 uSec */
1486#define SF_BA_AGING_TIMER 2016 /* 2 mSec */
1487#define SF_TX_RE_IDLE_TIMER 320 /* 300 uSec */
1488#define SF_TX_RE_AGING_TIMER 2016 /* 2 mSec */
1489
1490#define SF_LONG_DELAY_AGING_TIMER 1000000 /* 1 Sec */
1491
1492/**
1493 * Smart Fifo configuration command.
1494 * @state: smart fifo state, types listed in iwl_sf_sate.
1495 * @watermark: Minimum allowed availabe free space in RXF for transient state.
1496 * @long_delay_timeouts: aging and idle timer values for each scenario
1497 * in long delay state.
1498 * @full_on_timeouts: timer values for each scenario in full on state.
1499 */
1500struct iwl_sf_cfg_cmd {
1501 enum iwl_sf_state state;
1502 __le32 watermark[SF_TRANSIENT_STATES_NUMBER];
1503 __le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1504 __le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1505} __packed; /* SF_CFG_API_S_VER_2 */
1506
Johannes Berg8ca151b2013-01-24 14:25:36 +01001507#endif /* __fw_api_h__ */