1. 7abd931 clk: qcom: CPU clock driver for SDM845 by Deepak Katragadda · 8 years ago
  2. 18b078a Merge "clk: qcom: Add Display clock controller for SDM845" into msm-4.9 by Kyle Yan · 7 years ago
  3. 24ee246 clk: qcom: Add Display clock controller for SDM845 by Deepak Katragadda · 8 years ago
  4. 577379a Merge "Merge remote-tracking branch '4.9/tmp-82ab074' into 4.9" into msm-4.9 by Channagoud Kadabi · 7 years ago
  5. 110cce4 Merge remote-tracking branch '4.9/tmp-82ab074' into 4.9 by Kyle Yan · 7 years ago
  6. e2a56bd clk: qcom: Remove control of the QM clocks from APPS on SDM845 by Deepak Katragadda · 7 years ago
  7. 7843b10 clk: qcom: clock: Add Camera clock controller driver for SDM845 by Deepak Katragadda · 8 years ago
  8. eeccf5a clk: qcom: clk-branch: Correct the round_rate callback behavior by Deepak Katragadda · 7 years ago
  9. f4d40cf clk: bcm2835: Fix ->fixed_divider of pllh_aux by Boris Brezillon · 8 years ago
  10. 3084b3a3 clk: qcom: gcc-sdm845: remove XO dummy clock by Osvaldo Banuelos · 7 years ago
  11. c5ad078 clk: qcom: clk-rpmh: remove xo_board clock as parent by Osvaldo Banuelos · 7 years ago
  12. 9d2c5b3 Merge "clk: qcom: gcc-sdm845: Terminate the divider table" into msm-4.9 by Kyle Yan · 7 years ago
  13. 11d3623 clk: qcom: clk-rpmh: add clk-rpmh driver by Osvaldo Banuelos · 8 years ago
  14. 9e3b0a3 clk: qcom: gcc-sdm845: Terminate the divider table by Stephen Boyd · 7 years ago
  15. 15e9aca clk: qcom: gcc-sdm845: Add reset clock registers for USB on SDM845 by Deepak Katragadda · 7 years ago
  16. 8ced322 Merge "clk: qcom: clk-branch: Add support for branch clocks rate aggregation" into msm-4.9 by Kyle Yan · 7 years ago
  17. 9caf899 clk: qcom: clk-branch: Add support for branch clocks rate aggregation by Deepak Katragadda · 8 years ago
  18. dc666f3 clk: qcom: Add qpnp clock divider support by Tirupathi Reddy · 8 years ago
  19. 125fe37 clk: qcom: gcc-sdm845: Update peripheral clock structures on SDM845 by Deepak Katragadda · 7 years ago
  20. 31b3c42 clk: qcom: Use the saved current frequency for enable_safe_config by Taniya Das · 7 years ago
  21. 2a0985e clk: qcom: Add support for RCGs with dynamic and fixed sources by Taniya Das · 8 years ago
  22. f4e292a Merge "clk: qcom: clk-alpha-pll: Account for FSM enabled PLL post dividers" into msm-4.8 by Kyle Yan · 7 years ago
  23. 043f854 clk: qcom: clk-alpha-pll: Account for FSM enabled PLL post dividers by Deepak Katragadda · 7 years ago
  24. 5c64234 clk: qcom: Add RCG support for DP pixel source by Taniya Das · 8 years ago
  25. 8810e5f Merge remote-tracking branch 'origin/tmp-dcb6110' into 4.8 by Channagoud Kadabi · 7 years ago
  26. be53bc8 clk: qcom: clk-rcg: Add a src_freq field to the RCG freq_tbl structure by Deepak Katragadda · 8 years ago
  27. 6a20fae msm: Rename msmskunk and sdmbat to sdm845 and sdm830 by Kyle Yan · 7 years ago
  28. d9744c1 clk: qcom: clk-voter: Add support for voter clocks by Taniya Das · 8 years ago
  29. dfd9e6e clk: qcom: clk-rcg2: Correct the erroneous RCG configuration during enable by Deepak Katragadda · 7 years ago
  30. 9c5c5aa2 clk: qcom: videocc: Update frequency table for Video clocks on MSMSKUNK by Deepak Katragadda · 7 years ago
  31. aeb94eb clk: msm: mdss: change DP clock rate in order of KHz by Padmanabhan Komanduru · 8 years ago
  32. e95883b clk: msm: mdss: update Dp PLL/Phy configuration by Chandan Uddaraju · 8 years ago
  33. cd55b5e mdss: display-port: fix Display-port disable sequence by Chandan Uddaraju · 8 years ago
  34. 5058037 clk: msm: mdss: add SSC support for dsi PLL on msm8998 by Benjamin Chan · 8 years ago
  35. 85ff06b clk: msm: hdmi: fix value of constant for minimum VCO rate by Tatenda Chipeperekwa · 8 years ago
  36. 55d0e22 clk: msm: mdss: fix calculation of VCO rate during handoff by Aravind Venkateswaran · 8 years ago
  37. 78e0f02 clk: msm: hdmi: add 8998 hdmi pll calculator and clocks by Ajay Singh Parmar · 8 years ago
  38. 601c3a9 clk: msm: mdss: fix DP register configurations by Chandan Uddaraju · 8 years ago
  39. 6b30041 clk: msm: mdss: fix dp_link_2x_clk_mux clock ops for DP PLL on msm8998 by Chandan Uddaraju · 8 years ago
  40. 071ecc8 clk: msm: mdss: fix DSI PLL programming for msm8998 by Aravind Venkateswaran · 8 years ago
  41. 4f60e8d clk: msm: mdss: fix pclk_src_mux clock ops for DSI PLL on msm8998 by Aravind Venkateswaran · 8 years ago
  42. 16128f3 clk: qcom: mdss: add Display-port pll clock driver support by Chandan Uddaraju · 8 years ago
  43. 5773d73 clk: msm: mdss: add support for dsi pll on msm8998 by Aravind Venkateswaran · 8 years ago
  44. 5c15038 Merge branch 'mdss-final-replay' into msm-4.4 by Adrian Salido-Moreno · 8 years ago
  45. 0c323c0a clk: msm: mdss: update PLL configuration for 8996 by Chandan Uddaraju · 9 years ago
  46. 95bb8da clk: msm: mdss: update the frame rate count supported for DFPS by Padmanabhan Komanduru · 8 years ago
  47. 716c550 clk: msm: mdss: update the programming of DYNAMIC_REFRESH_PLL_UPPER_ADDR2 by Padmanabhan Komanduru · 8 years ago
  48. 56ec61e clk: msm: mdss: update the procedure for storing DSI PLL codes by Padmanabhan Komanduru · 8 years ago
  49. 8da168a clk: qcom: mdss: set the hdmi vco clock rate by Tatenda Chipeperekwa · 9 years ago
  50. 7e49a5a clk: msm: mdss: Read PLL/PHY status once during bootup by Tatenda Chipeperekwa · 9 years ago
  51. 4953815 clk: msm: mdss: add DT support for SSC frequency and PPM values by Padmanabhan Komanduru · 9 years ago
  52. 4769e1d clk: msm: mdss: Change PLL/PHY status messages to debug level by Tatenda Chipeperekwa · 9 years ago
  53. 1f6c7da drivers: iommu, leds, input, clk, devfreq: fix warnings. by Rohit Vaswani · 8 years ago
  54. f27d9ab clk: msm: mdss: fix 32 bit compilation issues by Vishnuvardhan Prodduturi · 9 years ago
  55. d9bc2bf clk: mdss: shadow clock implementation for dynamic refresh rate by Jeevan Shriram · 9 years ago
  56. 328d115 clk: msm: mdss: add HDMI PLL sequence for external 1.8V supply by Clarence Ip · 8 years ago
  57. 334d6bd msm: dsi-pll: update pll ref config before start for msm8996 by Dhaval Patel · 9 years ago
  58. d41c1b5 clk: msm: mdss: read pre-calibrated PLL codes from dfps memory by Jeevan Shriram · 9 years ago
  59. 1e76e75 clk: msm: mdss: Increase polling timer before SW calibration by Casey Piper · 9 years ago
  60. 8fff6e3 clk: msm: hdmi: Increase PLL ready bit timeout by Casey Piper · 9 years ago
  61. 1b3a620 clk: mdss: hdmi: enable PLL value calculations for MSM8996V3 by Casey Piper · 9 years ago
  62. 8d0f786 clk: msm: mdss: enable pll resources once in prepare by Vinu Deokaran · 9 years ago
  63. 1d23056 msm: mdss: add support of dsi pll SSC for 8996 by Kuogee Hsieh · 9 years ago
  64. 7b24f28 clk: msm: mdss: update HDMI PLL locking sequence for MSM8996v1 by Casey Piper · 9 years ago
  65. 8d72206 msm: mdss: add pll master/slave auto detection for msm8996 by Kuogee Hsieh · 9 years ago
  66. 22cbd11 clk: mdss: remove configuring phy registers during pll disable by Jeevan Shriram · 9 years ago
  67. 18fef3b clk: msm: mdss: increase VCO frequency to above 8.9Ghz by Casey Piper · 9 years ago
  68. a6f8c2e clk: msm: mdss: Export DSI1 PLL clocks by Aravind Venkateswaran · 9 years ago
  69. f759297 clk: qcom: mdss: remove DSI1 PLL configuration from DSI0 PLL by Aravind Venkateswaran · 9 years ago
  70. 7173257 clk: msm: mdss: add HDMI PLL sequence for MSM8996v2 by Casey Piper · 9 years ago
  71. c3628f5 msm: clk: mdss: fix vco clk get rate API for msm8996 by Dhaval Patel · 9 years ago
  72. 0ed9f96 msm: mdss: fix pll stop sequence for msm8996 target by Dhaval Patel · 9 years ago
  73. 0d49d47 clk: msm: mdss: update pll ldo configuration for 8996 v2 by Dhaval Patel · 9 years ago
  74. 7879c15 msm: mdss: fixed calculation of pll fractional divider by Kuogee Hsieh · 9 years ago
  75. bfbfa0d clk: mdss: Remove pll support for all targets except msm8996 by Veera Sundaram Sankaran · 9 years ago
  76. d78d27c clk: mdss: write lane mode when powering on HDMI PHY by Casey Piper · 9 years ago
  77. 0eb0ae0 clk: msm: mdss: update pll calculator with new settings by Vinu Deokaran · 9 years ago
  78. df49854 msm: mdss: add configuration for dsi pll-1's clock dividers by Kuogee Hsieh · 9 years ago
  79. 80237c2 clk: qcom: mdss: remove references to 14nm by Vinu Deokaran · 10 years ago
  80. 6c9c1d9 msm: mdss: add 8996 dsi pll support by Kuogee Hsieh · 10 years ago
  81. ffb6964 clk: mdss: fix pll 1 leakage issue by calling power down sequence by Huaibin Yang · 10 years ago
  82. 29f173e clk: mdss: add pll common block register settings for pll 1 by Huaibin Yang · 10 years ago
  83. e59034a clk: mdss: add delay for new pll locking sequence by Huaibin Yang · 10 years ago
  84. ff625c0 clk: mdss: implement new pll re-locking sequence by Huaibin Yang · 10 years ago
  85. daa7889 iopoll: unify atomic and non-atomic interfaces by Mitchel Humpherys · 10 years ago
  86. dc3ce96 clk: qcom: mdss: add support for HDMI pll on 8996 by Vinu Deokaran · 10 years ago
  87. c5c6ad4 clk: mdss: implement new pll locking sequence by Huaibin Yang · 10 years ago
  88. d90e076 clk: qcom: mdss: add 20nm hdmi pll support for msm8992 by Casey Piper · 10 years ago
  89. cb2cd1f clk: qcom: mdss: Add 8992 to 20nm pll supported devices by Jeykumar Sankaran · 10 years ago
  90. 9d177d5 clk: qcom: mdss: hdmi: increase delays to fix 20nm PLL lock failures by Casey Piper · 10 years ago
  91. 23775f1 clk: qcom: mdss: fix device crash on continuous splash disabled by Veera Sundaram Sankaran · 10 years ago
  92. b8ba5fa ARM: 8631/1: clkdev: Detect errors in clk_hw_register_clkdev() for mass registration by Geert Uytterhoeven · 8 years ago
  93. 7c47cd6 clk: qcom: mdss: update PLL VCO frequency range to change clock phase by Chandan Uddaraju · 10 years ago
  94. a07eed0 clk: qcom: mdss: add support for HDMI autopll calculations by Casey Piper · 10 years ago
  95. d682c4a iopoll: remove overly-helpful helper macros, clarify naming by Mitchel Humpherys · 10 years ago
  96. aaeeb49 clk: qcom: mdss: add DSI PLL clock driver support for msm8909 by Shivaraj Shetty · 10 years ago
  97. 0c33391 clk: qcom: mdss: Reduce delays in HDMI clock enable by Casey Piper · 10 years ago
  98. 174bbb3 clk: msm: mdss: Add support for DSI PLL 1 clock registration by Siddhartha Agrawal · 10 years ago
  99. a91de84 clk: mdss: shutdown 20nm PHY pll properly to fix power issue by Siddhartha Agrawal · 10 years ago
  100. cee50fd clk: qcom: mdss: init mdss pll driver at subsys level by Dhaval Patel · 10 years ago