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Yuval Mintz32a47e72016-05-11 16:36:12 +03001/* QLogic qed NIC Driver
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02002 * Copyright (c) 2015-2017 QLogic Corporation
Yuval Mintz32a47e72016-05-11 16:36:12 +03003 *
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02004 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Yuval Mintz32a47e72016-05-11 16:36:12 +030031 */
32
Yuval Mintzdacd88d2016-05-11 16:36:16 +030033#include <linux/etherdevice.h>
Yuval Mintz36558c32016-05-11 16:36:17 +030034#include <linux/crc32.h>
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +020035#include <linux/vmalloc.h>
Yuval Mintz0b55e272016-05-11 16:36:15 +030036#include <linux/qed/qed_iov_if.h>
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030037#include "qed_cxt.h"
38#include "qed_hsi.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030039#include "qed_hw.h"
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030040#include "qed_init_ops.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030041#include "qed_int.h"
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030042#include "qed_mcp.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030043#include "qed_reg_addr.h"
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030044#include "qed_sp.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030045#include "qed_sriov.h"
46#include "qed_vf.h"
47
Mintz, Yuval3b19f472017-06-04 13:31:04 +030048static u8 qed_vf_calculate_legacy(struct qed_vf_info *p_vf)
49{
50 u8 legacy = QED_QCID_LEGACY_VF_CID;
51
52 if (p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
53 ETH_HSI_VER_NO_PKT_LEN_TUNN)
54 legacy |= QED_QCID_LEGACY_VF_RX_PROD;
55
56 return legacy;
57}
58
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030059/* IOV ramrods */
Yuval Mintz1fe614d2016-06-05 13:11:11 +030060static int qed_sp_vf_start(struct qed_hwfn *p_hwfn, struct qed_vf_info *p_vf)
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030061{
62 struct vf_start_ramrod_data *p_ramrod = NULL;
63 struct qed_spq_entry *p_ent = NULL;
64 struct qed_sp_init_data init_data;
65 int rc = -EINVAL;
Yuval Mintz1fe614d2016-06-05 13:11:11 +030066 u8 fp_minor;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030067
68 /* Get SPQ entry */
69 memset(&init_data, 0, sizeof(init_data));
70 init_data.cid = qed_spq_get_cid(p_hwfn);
Yuval Mintz1fe614d2016-06-05 13:11:11 +030071 init_data.opaque_fid = p_vf->opaque_fid;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030072 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
73
74 rc = qed_sp_init_request(p_hwfn, &p_ent,
75 COMMON_RAMROD_VF_START,
76 PROTOCOLID_COMMON, &init_data);
77 if (rc)
78 return rc;
79
80 p_ramrod = &p_ent->ramrod.vf_start;
81
Yuval Mintz1fe614d2016-06-05 13:11:11 +030082 p_ramrod->vf_id = GET_FIELD(p_vf->concrete_fid, PXP_CONCRETE_FID_VFID);
83 p_ramrod->opaque_fid = cpu_to_le16(p_vf->opaque_fid);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030084
Yuval Mintz1fe614d2016-06-05 13:11:11 +030085 switch (p_hwfn->hw_info.personality) {
86 case QED_PCI_ETH:
87 p_ramrod->personality = PERSONALITY_ETH;
88 break;
89 case QED_PCI_ETH_ROCE:
90 p_ramrod->personality = PERSONALITY_RDMA_AND_ETH;
91 break;
92 default:
93 DP_NOTICE(p_hwfn, "Unknown VF personality %d\n",
94 p_hwfn->hw_info.personality);
95 return -EINVAL;
96 }
97
98 fp_minor = p_vf->acquire.vfdev_info.eth_fp_hsi_minor;
Yuval Mintza044df82016-08-22 13:25:09 +030099 if (fp_minor > ETH_HSI_VER_MINOR &&
100 fp_minor != ETH_HSI_VER_NO_PKT_LEN_TUNN) {
Yuval Mintz1fe614d2016-06-05 13:11:11 +0300101 DP_VERBOSE(p_hwfn,
102 QED_MSG_IOV,
103 "VF [%d] - Requested fp hsi %02x.%02x which is slightly newer than PF's %02x.%02x; Configuring PFs version\n",
104 p_vf->abs_vf_id,
105 ETH_HSI_VER_MAJOR,
106 fp_minor, ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
107 fp_minor = ETH_HSI_VER_MINOR;
108 }
109
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300110 p_ramrod->hsi_fp_ver.major_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MAJOR;
Yuval Mintz1fe614d2016-06-05 13:11:11 +0300111 p_ramrod->hsi_fp_ver.minor_ver_arr[ETH_VER_KEY] = fp_minor;
112
113 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
114 "VF[%d] - Starting using HSI %02x.%02x\n",
115 p_vf->abs_vf_id, ETH_HSI_VER_MAJOR, fp_minor);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300116
117 return qed_spq_post(p_hwfn, p_ent, NULL);
118}
119
Yuval Mintz0b55e272016-05-11 16:36:15 +0300120static int qed_sp_vf_stop(struct qed_hwfn *p_hwfn,
121 u32 concrete_vfid, u16 opaque_vfid)
122{
123 struct vf_stop_ramrod_data *p_ramrod = NULL;
124 struct qed_spq_entry *p_ent = NULL;
125 struct qed_sp_init_data init_data;
126 int rc = -EINVAL;
127
128 /* Get SPQ entry */
129 memset(&init_data, 0, sizeof(init_data));
130 init_data.cid = qed_spq_get_cid(p_hwfn);
131 init_data.opaque_fid = opaque_vfid;
132 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
133
134 rc = qed_sp_init_request(p_hwfn, &p_ent,
135 COMMON_RAMROD_VF_STOP,
136 PROTOCOLID_COMMON, &init_data);
137 if (rc)
138 return rc;
139
140 p_ramrod = &p_ent->ramrod.vf_stop;
141
142 p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
143
144 return qed_spq_post(p_hwfn, p_ent, NULL);
145}
146
Baoyou Xieba569472016-09-09 09:21:15 +0800147static bool qed_iov_is_valid_vfid(struct qed_hwfn *p_hwfn,
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400148 int rel_vf_id,
149 bool b_enabled_only, bool b_non_malicious)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300150{
151 if (!p_hwfn->pf_iov_info) {
152 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
153 return false;
154 }
155
156 if ((rel_vf_id >= p_hwfn->cdev->p_iov_info->total_vfs) ||
157 (rel_vf_id < 0))
158 return false;
159
160 if ((!p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_init) &&
161 b_enabled_only)
162 return false;
163
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400164 if ((p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_malicious) &&
165 b_non_malicious)
166 return false;
167
Yuval Mintz32a47e72016-05-11 16:36:12 +0300168 return true;
169}
170
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300171static struct qed_vf_info *qed_iov_get_vf_info(struct qed_hwfn *p_hwfn,
172 u16 relative_vf_id,
173 bool b_enabled_only)
174{
175 struct qed_vf_info *vf = NULL;
176
177 if (!p_hwfn->pf_iov_info) {
178 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
179 return NULL;
180 }
181
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400182 if (qed_iov_is_valid_vfid(p_hwfn, relative_vf_id,
183 b_enabled_only, false))
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300184 vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
185 else
186 DP_ERR(p_hwfn, "qed_iov_get_vf_info: VF[%d] is not enabled\n",
187 relative_vf_id);
188
189 return vf;
190}
191
Mintz, Yuval007bc372017-06-04 13:31:05 +0300192static struct qed_queue_cid *
193qed_iov_get_vf_rx_queue_cid(struct qed_vf_queue *p_queue)
194{
195 int i;
196
197 for (i = 0; i < MAX_QUEUES_PER_QZONE; i++) {
198 if (p_queue->cids[i].p_cid && !p_queue->cids[i].b_is_tx)
199 return p_queue->cids[i].p_cid;
200 }
201
202 return NULL;
203}
204
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200205enum qed_iov_validate_q_mode {
206 QED_IOV_VALIDATE_Q_NA,
207 QED_IOV_VALIDATE_Q_ENABLE,
208 QED_IOV_VALIDATE_Q_DISABLE,
209};
210
211static bool qed_iov_validate_queue_mode(struct qed_hwfn *p_hwfn,
212 struct qed_vf_info *p_vf,
213 u16 qid,
214 enum qed_iov_validate_q_mode mode,
215 bool b_is_tx)
Yuval Mintz41086462016-06-05 13:11:13 +0300216{
Mintz, Yuval007bc372017-06-04 13:31:05 +0300217 int i;
218
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200219 if (mode == QED_IOV_VALIDATE_Q_NA)
220 return true;
221
Mintz, Yuval007bc372017-06-04 13:31:05 +0300222 for (i = 0; i < MAX_QUEUES_PER_QZONE; i++) {
223 struct qed_vf_queue_cid *p_qcid;
224
225 p_qcid = &p_vf->vf_queues[qid].cids[i];
226
227 if (!p_qcid->p_cid)
228 continue;
229
230 if (p_qcid->b_is_tx != b_is_tx)
231 continue;
232
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200233 return mode == QED_IOV_VALIDATE_Q_ENABLE;
Mintz, Yuval007bc372017-06-04 13:31:05 +0300234 }
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200235
236 /* In case we haven't found any valid cid, then its disabled */
237 return mode == QED_IOV_VALIDATE_Q_DISABLE;
238}
239
240static bool qed_iov_validate_rxq(struct qed_hwfn *p_hwfn,
241 struct qed_vf_info *p_vf,
242 u16 rx_qid,
243 enum qed_iov_validate_q_mode mode)
244{
245 if (rx_qid >= p_vf->num_rxqs) {
Yuval Mintz41086462016-06-05 13:11:13 +0300246 DP_VERBOSE(p_hwfn,
247 QED_MSG_IOV,
248 "VF[0x%02x] - can't touch Rx queue[%04x]; Only 0x%04x are allocated\n",
249 p_vf->abs_vf_id, rx_qid, p_vf->num_rxqs);
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200250 return false;
251 }
252
253 return qed_iov_validate_queue_mode(p_hwfn, p_vf, rx_qid, mode, false);
Yuval Mintz41086462016-06-05 13:11:13 +0300254}
255
256static bool qed_iov_validate_txq(struct qed_hwfn *p_hwfn,
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200257 struct qed_vf_info *p_vf,
258 u16 tx_qid,
259 enum qed_iov_validate_q_mode mode)
Yuval Mintz41086462016-06-05 13:11:13 +0300260{
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200261 if (tx_qid >= p_vf->num_txqs) {
Yuval Mintz41086462016-06-05 13:11:13 +0300262 DP_VERBOSE(p_hwfn,
263 QED_MSG_IOV,
264 "VF[0x%02x] - can't touch Tx queue[%04x]; Only 0x%04x are allocated\n",
265 p_vf->abs_vf_id, tx_qid, p_vf->num_txqs);
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200266 return false;
267 }
268
269 return qed_iov_validate_queue_mode(p_hwfn, p_vf, tx_qid, mode, true);
Yuval Mintz41086462016-06-05 13:11:13 +0300270}
271
272static bool qed_iov_validate_sb(struct qed_hwfn *p_hwfn,
273 struct qed_vf_info *p_vf, u16 sb_idx)
274{
275 int i;
276
277 for (i = 0; i < p_vf->num_sbs; i++)
278 if (p_vf->igu_sbs[i] == sb_idx)
279 return true;
280
281 DP_VERBOSE(p_hwfn,
282 QED_MSG_IOV,
283 "VF[0%02x] - tried using sb_idx %04x which doesn't exist as one of its 0x%02x SBs\n",
284 p_vf->abs_vf_id, sb_idx, p_vf->num_sbs);
285
286 return false;
287}
288
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200289static bool qed_iov_validate_active_rxq(struct qed_hwfn *p_hwfn,
290 struct qed_vf_info *p_vf)
291{
292 u8 i;
293
294 for (i = 0; i < p_vf->num_rxqs; i++)
295 if (qed_iov_validate_queue_mode(p_hwfn, p_vf, i,
296 QED_IOV_VALIDATE_Q_ENABLE,
297 false))
298 return true;
299
300 return false;
301}
302
303static bool qed_iov_validate_active_txq(struct qed_hwfn *p_hwfn,
304 struct qed_vf_info *p_vf)
305{
306 u8 i;
307
308 for (i = 0; i < p_vf->num_txqs; i++)
309 if (qed_iov_validate_queue_mode(p_hwfn, p_vf, i,
310 QED_IOV_VALIDATE_Q_ENABLE,
311 true))
312 return true;
313
314 return false;
315}
316
Baoyou Xieba569472016-09-09 09:21:15 +0800317static int qed_iov_post_vf_bulletin(struct qed_hwfn *p_hwfn,
318 int vfid, struct qed_ptt *p_ptt)
Yuval Mintz36558c32016-05-11 16:36:17 +0300319{
320 struct qed_bulletin_content *p_bulletin;
321 int crc_size = sizeof(p_bulletin->crc);
322 struct qed_dmae_params params;
323 struct qed_vf_info *p_vf;
324
325 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
326 if (!p_vf)
327 return -EINVAL;
328
329 if (!p_vf->vf_bulletin)
330 return -EINVAL;
331
332 p_bulletin = p_vf->bulletin.p_virt;
333
334 /* Increment bulletin board version and compute crc */
335 p_bulletin->version++;
336 p_bulletin->crc = crc32(0, (u8 *)p_bulletin + crc_size,
337 p_vf->bulletin.size - crc_size);
338
339 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
340 "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n",
341 p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc);
342
343 /* propagate bulletin board via dmae to vm memory */
344 memset(&params, 0, sizeof(params));
345 params.flags = QED_DMAE_FLAG_VF_DST;
346 params.dst_vfid = p_vf->abs_vf_id;
347 return qed_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys,
348 p_vf->vf_bulletin, p_vf->bulletin.size / 4,
349 &params);
350}
351
Yuval Mintz32a47e72016-05-11 16:36:12 +0300352static int qed_iov_pci_cfg_info(struct qed_dev *cdev)
353{
354 struct qed_hw_sriov_info *iov = cdev->p_iov_info;
355 int pos = iov->pos;
356
357 DP_VERBOSE(cdev, QED_MSG_IOV, "sriov ext pos %d\n", pos);
358 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
359
360 pci_read_config_word(cdev->pdev,
361 pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs);
362 pci_read_config_word(cdev->pdev,
363 pos + PCI_SRIOV_INITIAL_VF, &iov->initial_vfs);
364
365 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs);
366 if (iov->num_vfs) {
367 DP_VERBOSE(cdev,
368 QED_MSG_IOV,
369 "Number of VFs are already set to non-zero value. Ignoring PCI configuration value\n");
370 iov->num_vfs = 0;
371 }
372
373 pci_read_config_word(cdev->pdev,
374 pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
375
376 pci_read_config_word(cdev->pdev,
377 pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
378
379 pci_read_config_word(cdev->pdev,
380 pos + PCI_SRIOV_VF_DID, &iov->vf_device_id);
381
382 pci_read_config_dword(cdev->pdev,
383 pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
384
385 pci_read_config_dword(cdev->pdev, pos + PCI_SRIOV_CAP, &iov->cap);
386
387 pci_read_config_byte(cdev->pdev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
388
389 DP_VERBOSE(cdev,
390 QED_MSG_IOV,
391 "IOV info: nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
392 iov->nres,
393 iov->cap,
394 iov->ctrl,
395 iov->total_vfs,
396 iov->initial_vfs,
397 iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
398
399 /* Some sanity checks */
400 if (iov->num_vfs > NUM_OF_VFS(cdev) ||
401 iov->total_vfs > NUM_OF_VFS(cdev)) {
402 /* This can happen only due to a bug. In this case we set
403 * num_vfs to zero to avoid memory corruption in the code that
404 * assumes max number of vfs
405 */
406 DP_NOTICE(cdev,
407 "IOV: Unexpected number of vfs set: %d setting num_vf to zero\n",
408 iov->num_vfs);
409
410 iov->num_vfs = 0;
411 iov->total_vfs = 0;
412 }
413
414 return 0;
415}
416
Yuval Mintz32a47e72016-05-11 16:36:12 +0300417static void qed_iov_setup_vfdb(struct qed_hwfn *p_hwfn)
418{
419 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
420 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
421 struct qed_bulletin_content *p_bulletin_virt;
422 dma_addr_t req_p, rply_p, bulletin_p;
423 union pfvf_tlvs *p_reply_virt_addr;
424 union vfpf_tlvs *p_req_virt_addr;
425 u8 idx = 0;
426
427 memset(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array));
428
429 p_req_virt_addr = p_iov_info->mbx_msg_virt_addr;
430 req_p = p_iov_info->mbx_msg_phys_addr;
431 p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr;
432 rply_p = p_iov_info->mbx_reply_phys_addr;
433 p_bulletin_virt = p_iov_info->p_bulletins;
434 bulletin_p = p_iov_info->bulletins_phys;
435 if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) {
436 DP_ERR(p_hwfn,
437 "qed_iov_setup_vfdb called without allocating mem first\n");
438 return;
439 }
440
441 for (idx = 0; idx < p_iov->total_vfs; idx++) {
442 struct qed_vf_info *vf = &p_iov_info->vfs_array[idx];
443 u32 concrete;
444
445 vf->vf_mbx.req_virt = p_req_virt_addr + idx;
446 vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs);
447 vf->vf_mbx.reply_virt = p_reply_virt_addr + idx;
448 vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs);
449
450 vf->state = VF_STOPPED;
451 vf->b_init = false;
452
453 vf->bulletin.phys = idx *
454 sizeof(struct qed_bulletin_content) +
455 bulletin_p;
456 vf->bulletin.p_virt = p_bulletin_virt + idx;
457 vf->bulletin.size = sizeof(struct qed_bulletin_content);
458
459 vf->relative_vf_id = idx;
460 vf->abs_vf_id = idx + p_iov->first_vf_in_pf;
461 concrete = qed_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
462 vf->concrete_fid = concrete;
463 vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
464 (vf->abs_vf_id << 8);
465 vf->vport_id = idx + 1;
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +0300466
467 vf->num_mac_filters = QED_ETH_VF_NUM_MAC_FILTERS;
468 vf->num_vlan_filters = QED_ETH_VF_NUM_VLAN_FILTERS;
Yuval Mintz32a47e72016-05-11 16:36:12 +0300469 }
470}
471
472static int qed_iov_allocate_vfdb(struct qed_hwfn *p_hwfn)
473{
474 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
475 void **p_v_addr;
476 u16 num_vfs = 0;
477
478 num_vfs = p_hwfn->cdev->p_iov_info->total_vfs;
479
480 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
481 "qed_iov_allocate_vfdb for %d VFs\n", num_vfs);
482
483 /* Allocate PF Mailbox buffer (per-VF) */
484 p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs;
485 p_v_addr = &p_iov_info->mbx_msg_virt_addr;
486 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
487 p_iov_info->mbx_msg_size,
488 &p_iov_info->mbx_msg_phys_addr,
489 GFP_KERNEL);
490 if (!*p_v_addr)
491 return -ENOMEM;
492
493 /* Allocate PF Mailbox Reply buffer (per-VF) */
494 p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs;
495 p_v_addr = &p_iov_info->mbx_reply_virt_addr;
496 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
497 p_iov_info->mbx_reply_size,
498 &p_iov_info->mbx_reply_phys_addr,
499 GFP_KERNEL);
500 if (!*p_v_addr)
501 return -ENOMEM;
502
503 p_iov_info->bulletins_size = sizeof(struct qed_bulletin_content) *
504 num_vfs;
505 p_v_addr = &p_iov_info->p_bulletins;
506 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
507 p_iov_info->bulletins_size,
508 &p_iov_info->bulletins_phys,
509 GFP_KERNEL);
510 if (!*p_v_addr)
511 return -ENOMEM;
512
513 DP_VERBOSE(p_hwfn,
514 QED_MSG_IOV,
515 "PF's Requests mailbox [%p virt 0x%llx phys], Response mailbox [%p virt 0x%llx phys] Bulletins [%p virt 0x%llx phys]\n",
516 p_iov_info->mbx_msg_virt_addr,
517 (u64) p_iov_info->mbx_msg_phys_addr,
518 p_iov_info->mbx_reply_virt_addr,
519 (u64) p_iov_info->mbx_reply_phys_addr,
520 p_iov_info->p_bulletins, (u64) p_iov_info->bulletins_phys);
521
522 return 0;
523}
524
525static void qed_iov_free_vfdb(struct qed_hwfn *p_hwfn)
526{
527 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
528
529 if (p_hwfn->pf_iov_info->mbx_msg_virt_addr)
530 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
531 p_iov_info->mbx_msg_size,
532 p_iov_info->mbx_msg_virt_addr,
533 p_iov_info->mbx_msg_phys_addr);
534
535 if (p_hwfn->pf_iov_info->mbx_reply_virt_addr)
536 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
537 p_iov_info->mbx_reply_size,
538 p_iov_info->mbx_reply_virt_addr,
539 p_iov_info->mbx_reply_phys_addr);
540
541 if (p_iov_info->p_bulletins)
542 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
543 p_iov_info->bulletins_size,
544 p_iov_info->p_bulletins,
545 p_iov_info->bulletins_phys);
546}
547
548int qed_iov_alloc(struct qed_hwfn *p_hwfn)
549{
550 struct qed_pf_iov *p_sriov;
551
552 if (!IS_PF_SRIOV(p_hwfn)) {
553 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
554 "No SR-IOV - no need for IOV db\n");
555 return 0;
556 }
557
558 p_sriov = kzalloc(sizeof(*p_sriov), GFP_KERNEL);
Joe Perches2591c282016-09-04 14:24:03 -0700559 if (!p_sriov)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300560 return -ENOMEM;
Yuval Mintz32a47e72016-05-11 16:36:12 +0300561
562 p_hwfn->pf_iov_info = p_sriov;
563
564 return qed_iov_allocate_vfdb(p_hwfn);
565}
566
Mintz, Yuval1ee240e2017-06-01 15:29:11 +0300567void qed_iov_setup(struct qed_hwfn *p_hwfn)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300568{
569 if (!IS_PF_SRIOV(p_hwfn) || !IS_PF_SRIOV_ALLOC(p_hwfn))
570 return;
571
572 qed_iov_setup_vfdb(p_hwfn);
Yuval Mintz32a47e72016-05-11 16:36:12 +0300573}
574
575void qed_iov_free(struct qed_hwfn *p_hwfn)
576{
577 if (IS_PF_SRIOV_ALLOC(p_hwfn)) {
578 qed_iov_free_vfdb(p_hwfn);
579 kfree(p_hwfn->pf_iov_info);
580 }
581}
582
583void qed_iov_free_hw_info(struct qed_dev *cdev)
584{
585 kfree(cdev->p_iov_info);
586 cdev->p_iov_info = NULL;
587}
588
589int qed_iov_hw_info(struct qed_hwfn *p_hwfn)
590{
591 struct qed_dev *cdev = p_hwfn->cdev;
592 int pos;
593 int rc;
594
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300595 if (IS_VF(p_hwfn->cdev))
596 return 0;
597
Yuval Mintz32a47e72016-05-11 16:36:12 +0300598 /* Learn the PCI configuration */
599 pos = pci_find_ext_capability(p_hwfn->cdev->pdev,
600 PCI_EXT_CAP_ID_SRIOV);
601 if (!pos) {
602 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No PCIe IOV support\n");
603 return 0;
604 }
605
606 /* Allocate a new struct for IOV information */
607 cdev->p_iov_info = kzalloc(sizeof(*cdev->p_iov_info), GFP_KERNEL);
Joe Perches2591c282016-09-04 14:24:03 -0700608 if (!cdev->p_iov_info)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300609 return -ENOMEM;
Joe Perches2591c282016-09-04 14:24:03 -0700610
Yuval Mintz32a47e72016-05-11 16:36:12 +0300611 cdev->p_iov_info->pos = pos;
612
613 rc = qed_iov_pci_cfg_info(cdev);
614 if (rc)
615 return rc;
616
617 /* We want PF IOV to be synonemous with the existance of p_iov_info;
618 * In case the capability is published but there are no VFs, simply
619 * de-allocate the struct.
620 */
621 if (!cdev->p_iov_info->total_vfs) {
622 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
623 "IOV capabilities, but no VFs are published\n");
624 kfree(cdev->p_iov_info);
625 cdev->p_iov_info = NULL;
626 return 0;
627 }
628
Mintz, Yuval9c79dda2017-03-14 16:23:54 +0200629 /* First VF index based on offset is tricky:
630 * - If ARI is supported [likely], offset - (16 - pf_id) would
631 * provide the number for eng0. 2nd engine Vfs would begin
632 * after the first engine's VFs.
633 * - If !ARI, VFs would start on next device.
634 * so offset - (256 - pf_id) would provide the number.
635 * Utilize the fact that (256 - pf_id) is achieved only by later
Joe Perches8ac1ed72017-05-08 15:57:56 -0700636 * to differentiate between the two.
Yuval Mintz32a47e72016-05-11 16:36:12 +0300637 */
Mintz, Yuval9c79dda2017-03-14 16:23:54 +0200638
639 if (p_hwfn->cdev->p_iov_info->offset < (256 - p_hwfn->abs_pf_id)) {
640 u32 first = p_hwfn->cdev->p_iov_info->offset +
641 p_hwfn->abs_pf_id - 16;
642
643 cdev->p_iov_info->first_vf_in_pf = first;
644
645 if (QED_PATH_ID(p_hwfn))
646 cdev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB;
647 } else {
648 u32 first = p_hwfn->cdev->p_iov_info->offset +
649 p_hwfn->abs_pf_id - 256;
650
651 cdev->p_iov_info->first_vf_in_pf = first;
652 }
Yuval Mintz32a47e72016-05-11 16:36:12 +0300653
654 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
655 "First VF in hwfn 0x%08x\n",
656 cdev->p_iov_info->first_vf_in_pf);
657
658 return 0;
659}
660
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400661bool _qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn,
662 int vfid, bool b_fail_malicious)
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300663{
664 /* Check PF supports sriov */
Yuval Mintzb0409fa2016-05-15 14:48:05 +0300665 if (IS_VF(p_hwfn->cdev) || !IS_QED_SRIOV(p_hwfn->cdev) ||
666 !IS_PF_SRIOV_ALLOC(p_hwfn))
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300667 return false;
668
669 /* Check VF validity */
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400670 if (!qed_iov_is_valid_vfid(p_hwfn, vfid, true, b_fail_malicious))
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300671 return false;
672
673 return true;
674}
675
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400676bool qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn, int vfid)
677{
678 return _qed_iov_pf_sanity_check(p_hwfn, vfid, true);
679}
680
Yuval Mintz0b55e272016-05-11 16:36:15 +0300681static void qed_iov_set_vf_to_disable(struct qed_dev *cdev,
682 u16 rel_vf_id, u8 to_disable)
683{
684 struct qed_vf_info *vf;
685 int i;
686
687 for_each_hwfn(cdev, i) {
688 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
689
690 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
691 if (!vf)
692 continue;
693
694 vf->to_disable = to_disable;
695 }
696}
697
Baoyou Xieba569472016-09-09 09:21:15 +0800698static void qed_iov_set_vfs_to_disable(struct qed_dev *cdev, u8 to_disable)
Yuval Mintz0b55e272016-05-11 16:36:15 +0300699{
700 u16 i;
701
702 if (!IS_QED_SRIOV(cdev))
703 return;
704
705 for (i = 0; i < cdev->p_iov_info->total_vfs; i++)
706 qed_iov_set_vf_to_disable(cdev, i, to_disable);
707}
708
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300709static void qed_iov_vf_pglue_clear_err(struct qed_hwfn *p_hwfn,
710 struct qed_ptt *p_ptt, u8 abs_vfid)
711{
712 qed_wr(p_hwfn, p_ptt,
713 PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4,
714 1 << (abs_vfid & 0x1f));
715}
716
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300717static void qed_iov_vf_igu_reset(struct qed_hwfn *p_hwfn,
718 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
719{
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300720 int i;
721
722 /* Set VF masks and configuration - pretend */
723 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
724
725 qed_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);
726
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300727 /* unpretend */
728 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
729
730 /* iterate over all queues, clear sb consumer */
Yuval Mintzb2b897e2016-05-15 14:48:06 +0300731 for (i = 0; i < vf->num_sbs; i++)
732 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
733 vf->igu_sbs[i],
734 vf->opaque_fid, true);
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300735}
736
Yuval Mintz0b55e272016-05-11 16:36:15 +0300737static void qed_iov_vf_igu_set_int(struct qed_hwfn *p_hwfn,
738 struct qed_ptt *p_ptt,
739 struct qed_vf_info *vf, bool enable)
740{
741 u32 igu_vf_conf;
742
743 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
744
745 igu_vf_conf = qed_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION);
746
747 if (enable)
748 igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN;
749 else
750 igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN;
751
752 qed_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);
753
754 /* unpretend */
755 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
756}
757
Mintz, Yuval88072fd2017-05-29 09:53:08 +0300758static int
759qed_iov_enable_vf_access_msix(struct qed_hwfn *p_hwfn,
760 struct qed_ptt *p_ptt, u8 abs_vf_id, u8 num_sbs)
761{
762 u8 current_max = 0;
763 int i;
764
765 /* For AH onward, configuration is per-PF. Find maximum of all
766 * the currently enabled child VFs, and set the number to be that.
767 */
768 if (!QED_IS_BB(p_hwfn->cdev)) {
769 qed_for_each_vf(p_hwfn, i) {
770 struct qed_vf_info *p_vf;
771
772 p_vf = qed_iov_get_vf_info(p_hwfn, (u16)i, true);
773 if (!p_vf)
774 continue;
775
776 current_max = max_t(u8, current_max, p_vf->num_sbs);
777 }
778 }
779
780 if (num_sbs > current_max)
781 return qed_mcp_config_vf_msix(p_hwfn, p_ptt,
782 abs_vf_id, num_sbs);
783
784 return 0;
785}
786
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300787static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn,
788 struct qed_ptt *p_ptt,
789 struct qed_vf_info *vf)
790{
791 u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
792 int rc;
793
Mintz, Yuval4e9b2a62017-03-19 13:08:13 +0200794 /* It's possible VF was previously considered malicious -
795 * clear the indication even if we're only going to disable VF.
796 */
797 vf->b_malicious = false;
798
Yuval Mintz0b55e272016-05-11 16:36:15 +0300799 if (vf->to_disable)
800 return 0;
801
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300802 DP_VERBOSE(p_hwfn,
803 QED_MSG_IOV,
804 "Enable internal access for vf %x [abs %x]\n",
805 vf->abs_vf_id, QED_VF_ABS_ID(p_hwfn, vf));
806
807 qed_iov_vf_pglue_clear_err(p_hwfn, p_ptt, QED_VF_ABS_ID(p_hwfn, vf));
808
Yuval Mintzb2b897e2016-05-15 14:48:06 +0300809 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
810
Mintz, Yuval88072fd2017-05-29 09:53:08 +0300811 rc = qed_iov_enable_vf_access_msix(p_hwfn, p_ptt,
812 vf->abs_vf_id, vf->num_sbs);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300813 if (rc)
814 return rc;
815
816 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
817
818 SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
819 STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf);
820
821 qed_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id,
822 p_hwfn->hw_info.hw_mode);
823
824 /* unpretend */
825 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
826
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300827 vf->state = VF_FREE;
828
829 return rc;
830}
831
Yuval Mintz0b55e272016-05-11 16:36:15 +0300832/**
833 * @brief qed_iov_config_perm_table - configure the permission
834 * zone table.
835 * In E4, queue zone permission table size is 320x9. There
836 * are 320 VF queues for single engine device (256 for dual
837 * engine device), and each entry has the following format:
838 * {Valid, VF[7:0]}
839 * @param p_hwfn
840 * @param p_ptt
841 * @param vf
842 * @param enable
843 */
844static void qed_iov_config_perm_table(struct qed_hwfn *p_hwfn,
845 struct qed_ptt *p_ptt,
846 struct qed_vf_info *vf, u8 enable)
847{
848 u32 reg_addr, val;
849 u16 qzone_id = 0;
850 int qid;
851
852 for (qid = 0; qid < vf->num_rxqs; qid++) {
853 qed_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid,
854 &qzone_id);
855
856 reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4;
Yuval Mintz1a635e42016-08-15 10:42:43 +0300857 val = enable ? (vf->abs_vf_id | BIT(8)) : 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +0300858 qed_wr(p_hwfn, p_ptt, reg_addr, val);
859 }
860}
861
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300862static void qed_iov_enable_vf_traffic(struct qed_hwfn *p_hwfn,
863 struct qed_ptt *p_ptt,
864 struct qed_vf_info *vf)
865{
866 /* Reset vf in IGU - interrupts are still disabled */
867 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
868
869 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1);
870
871 /* Permission Table */
872 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, true);
873}
874
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300875static u8 qed_iov_alloc_vf_igu_sbs(struct qed_hwfn *p_hwfn,
876 struct qed_ptt *p_ptt,
877 struct qed_vf_info *vf, u16 num_rx_queues)
878{
Mintz, Yuval09b6b142017-06-01 15:29:08 +0300879 struct qed_igu_block *p_block;
880 struct cau_sb_entry sb_entry;
881 int qid = 0;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300882 u32 val = 0;
883
Mintz, Yuval726fdbe2017-06-01 15:29:06 +0300884 if (num_rx_queues > p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov)
885 num_rx_queues = p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov;
886 p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov -= num_rx_queues;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300887
888 SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
889 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
890 SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
891
Mintz, Yuval09b6b142017-06-01 15:29:08 +0300892 for (qid = 0; qid < num_rx_queues; qid++) {
893 p_block = qed_get_igu_free_sb(p_hwfn, false);
894 vf->igu_sbs[qid] = p_block->igu_sb_id;
895 p_block->status &= ~QED_IGU_STATUS_FREE;
896 SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300897
Mintz, Yuval09b6b142017-06-01 15:29:08 +0300898 qed_wr(p_hwfn, p_ptt,
899 IGU_REG_MAPPING_MEMORY +
900 sizeof(u32) * p_block->igu_sb_id, val);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300901
Mintz, Yuval09b6b142017-06-01 15:29:08 +0300902 /* Configure igu sb in CAU which were marked valid */
903 qed_init_cau_sb_entry(p_hwfn, &sb_entry,
904 p_hwfn->rel_pf_id, vf->abs_vf_id, 1);
905 qed_dmae_host2grc(p_hwfn, p_ptt,
906 (u64)(uintptr_t)&sb_entry,
907 CAU_REG_SB_VAR_MEMORY +
908 p_block->igu_sb_id * sizeof(u64), 2, 0);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300909 }
910
911 vf->num_sbs = (u8) num_rx_queues;
912
913 return vf->num_sbs;
914}
915
Yuval Mintz0b55e272016-05-11 16:36:15 +0300916static void qed_iov_free_vf_igu_sbs(struct qed_hwfn *p_hwfn,
917 struct qed_ptt *p_ptt,
918 struct qed_vf_info *vf)
919{
920 struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
921 int idx, igu_id;
922 u32 addr, val;
923
924 /* Invalidate igu CAM lines and mark them as free */
925 for (idx = 0; idx < vf->num_sbs; idx++) {
926 igu_id = vf->igu_sbs[idx];
927 addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id;
928
929 val = qed_rd(p_hwfn, p_ptt, addr);
930 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
931 qed_wr(p_hwfn, p_ptt, addr, val);
932
Mintz, Yuvald749dd02017-06-01 15:29:03 +0300933 p_info->entry[igu_id].status |= QED_IGU_STATUS_FREE;
Mintz, Yuval726fdbe2017-06-01 15:29:06 +0300934 p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov++;
Yuval Mintz0b55e272016-05-11 16:36:15 +0300935 }
936
937 vf->num_sbs = 0;
938}
939
Mintz, Yuval33b2fbd2017-02-20 22:43:36 +0200940static void qed_iov_set_link(struct qed_hwfn *p_hwfn,
941 u16 vfid,
942 struct qed_mcp_link_params *params,
943 struct qed_mcp_link_state *link,
944 struct qed_mcp_link_capabilities *p_caps)
945{
946 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
947 vfid,
948 false);
949 struct qed_bulletin_content *p_bulletin;
950
951 if (!p_vf)
952 return;
953
954 p_bulletin = p_vf->bulletin.p_virt;
955 p_bulletin->req_autoneg = params->speed.autoneg;
956 p_bulletin->req_adv_speed = params->speed.advertised_speeds;
957 p_bulletin->req_forced_speed = params->speed.forced_speed;
958 p_bulletin->req_autoneg_pause = params->pause.autoneg;
959 p_bulletin->req_forced_rx = params->pause.forced_rx;
960 p_bulletin->req_forced_tx = params->pause.forced_tx;
961 p_bulletin->req_loopback = params->loopback_mode;
962
963 p_bulletin->link_up = link->link_up;
964 p_bulletin->speed = link->speed;
965 p_bulletin->full_duplex = link->full_duplex;
966 p_bulletin->autoneg = link->an;
967 p_bulletin->autoneg_complete = link->an_complete;
968 p_bulletin->parallel_detection = link->parallel_detection;
969 p_bulletin->pfc_enabled = link->pfc_enabled;
970 p_bulletin->partner_adv_speed = link->partner_adv_speed;
971 p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en;
972 p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en;
973 p_bulletin->partner_adv_pause = link->partner_adv_pause;
974 p_bulletin->sfp_tx_fault = link->sfp_tx_fault;
975
976 p_bulletin->capability_speed = p_caps->speed_capabilities;
977}
978
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300979static int qed_iov_init_hw_for_vf(struct qed_hwfn *p_hwfn,
980 struct qed_ptt *p_ptt,
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200981 struct qed_iov_vf_init_params *p_params)
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300982{
Mintz, Yuval33b2fbd2017-02-20 22:43:36 +0200983 struct qed_mcp_link_capabilities link_caps;
984 struct qed_mcp_link_params link_params;
985 struct qed_mcp_link_state link_state;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300986 u8 num_of_vf_avaiable_chains = 0;
987 struct qed_vf_info *vf = NULL;
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200988 u16 qid, num_irqs;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300989 int rc = 0;
990 u32 cids;
991 u8 i;
992
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200993 vf = qed_iov_get_vf_info(p_hwfn, p_params->rel_vf_id, false);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300994 if (!vf) {
995 DP_ERR(p_hwfn, "qed_iov_init_hw_for_vf : vf is NULL\n");
996 return -EINVAL;
997 }
998
999 if (vf->b_init) {
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001000 DP_NOTICE(p_hwfn, "VF[%d] is already active.\n",
1001 p_params->rel_vf_id);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001002 return -EINVAL;
1003 }
1004
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001005 /* Perform sanity checking on the requested queue_id */
1006 for (i = 0; i < p_params->num_queues; i++) {
1007 u16 min_vf_qzone = FEAT_NUM(p_hwfn, QED_PF_L2_QUE);
1008 u16 max_vf_qzone = min_vf_qzone +
1009 FEAT_NUM(p_hwfn, QED_VF_L2_QUE) - 1;
1010
1011 qid = p_params->req_rx_queue[i];
1012 if (qid < min_vf_qzone || qid > max_vf_qzone) {
1013 DP_NOTICE(p_hwfn,
1014 "Can't enable Rx qid [%04x] for VF[%d]: qids [0x%04x,...,0x%04x] available\n",
1015 qid,
1016 p_params->rel_vf_id,
1017 min_vf_qzone, max_vf_qzone);
1018 return -EINVAL;
1019 }
1020
1021 qid = p_params->req_tx_queue[i];
1022 if (qid > max_vf_qzone) {
1023 DP_NOTICE(p_hwfn,
1024 "Can't enable Tx qid [%04x] for VF[%d]: max qid 0x%04x\n",
1025 qid, p_params->rel_vf_id, max_vf_qzone);
1026 return -EINVAL;
1027 }
1028
1029 /* If client *really* wants, Tx qid can be shared with PF */
1030 if (qid < min_vf_qzone)
1031 DP_VERBOSE(p_hwfn,
1032 QED_MSG_IOV,
1033 "VF[%d] is using PF qid [0x%04x] for Txq[0x%02x]\n",
1034 p_params->rel_vf_id, qid, i);
1035 }
1036
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001037 /* Limit number of queues according to number of CIDs */
1038 qed_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids);
1039 DP_VERBOSE(p_hwfn,
1040 QED_MSG_IOV,
1041 "VF[%d] - requesting to initialize for 0x%04x queues [0x%04x CIDs available]\n",
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001042 vf->relative_vf_id, p_params->num_queues, (u16)cids);
1043 num_irqs = min_t(u16, p_params->num_queues, ((u16)cids));
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001044
1045 num_of_vf_avaiable_chains = qed_iov_alloc_vf_igu_sbs(p_hwfn,
1046 p_ptt,
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001047 vf, num_irqs);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001048 if (!num_of_vf_avaiable_chains) {
1049 DP_ERR(p_hwfn, "no available igu sbs\n");
1050 return -ENOMEM;
1051 }
1052
1053 /* Choose queue number and index ranges */
1054 vf->num_rxqs = num_of_vf_avaiable_chains;
1055 vf->num_txqs = num_of_vf_avaiable_chains;
1056
1057 for (i = 0; i < vf->num_rxqs; i++) {
Mintz, Yuval007bc372017-06-04 13:31:05 +03001058 struct qed_vf_queue *p_queue = &vf->vf_queues[i];
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001059
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001060 p_queue->fw_rx_qid = p_params->req_rx_queue[i];
1061 p_queue->fw_tx_qid = p_params->req_tx_queue[i];
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001062
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001063 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
Mintz, Yuval007bc372017-06-04 13:31:05 +03001064 "VF[%d] - Q[%d] SB %04x, qid [Rx %04x Tx %04x]\n",
1065 vf->relative_vf_id, i, vf->igu_sbs[i],
1066 p_queue->fw_rx_qid, p_queue->fw_tx_qid);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001067 }
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001068
Mintz, Yuval33b2fbd2017-02-20 22:43:36 +02001069 /* Update the link configuration in bulletin */
1070 memcpy(&link_params, qed_mcp_get_link_params(p_hwfn),
1071 sizeof(link_params));
1072 memcpy(&link_state, qed_mcp_get_link_state(p_hwfn), sizeof(link_state));
1073 memcpy(&link_caps, qed_mcp_get_link_capabilities(p_hwfn),
1074 sizeof(link_caps));
1075 qed_iov_set_link(p_hwfn, p_params->rel_vf_id,
1076 &link_params, &link_state, &link_caps);
1077
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001078 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, vf);
1079 if (!rc) {
1080 vf->b_init = true;
1081
1082 if (IS_LEAD_HWFN(p_hwfn))
1083 p_hwfn->cdev->p_iov_info->num_vfs++;
1084 }
1085
1086 return rc;
1087}
1088
Yuval Mintz0b55e272016-05-11 16:36:15 +03001089static int qed_iov_release_hw_for_vf(struct qed_hwfn *p_hwfn,
1090 struct qed_ptt *p_ptt, u16 rel_vf_id)
1091{
Manish Chopra079d20a2016-05-15 14:48:07 +03001092 struct qed_mcp_link_capabilities caps;
1093 struct qed_mcp_link_params params;
1094 struct qed_mcp_link_state link;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001095 struct qed_vf_info *vf = NULL;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001096
1097 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
1098 if (!vf) {
1099 DP_ERR(p_hwfn, "qed_iov_release_hw_for_vf : vf is NULL\n");
1100 return -EINVAL;
1101 }
1102
Yuval Mintz36558c32016-05-11 16:36:17 +03001103 if (vf->bulletin.p_virt)
1104 memset(vf->bulletin.p_virt, 0, sizeof(*vf->bulletin.p_virt));
1105
1106 memset(&vf->p_vf_info, 0, sizeof(vf->p_vf_info));
1107
Manish Chopra079d20a2016-05-15 14:48:07 +03001108 /* Get the link configuration back in bulletin so
1109 * that when VFs are re-enabled they get the actual
1110 * link configuration.
1111 */
1112 memcpy(&params, qed_mcp_get_link_params(p_hwfn), sizeof(params));
1113 memcpy(&link, qed_mcp_get_link_state(p_hwfn), sizeof(link));
1114 memcpy(&caps, qed_mcp_get_link_capabilities(p_hwfn), sizeof(caps));
1115 qed_iov_set_link(p_hwfn, rel_vf_id, &params, &link, &caps);
1116
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001117 /* Forget the VF's acquisition message */
1118 memset(&vf->acquire, 0, sizeof(vf->acquire));
Yuval Mintz0b55e272016-05-11 16:36:15 +03001119
1120 /* disablng interrupts and resetting permission table was done during
1121 * vf-close, however, we could get here without going through vf_close
1122 */
1123 /* Disable Interrupts for VF */
1124 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
1125
1126 /* Reset Permission table */
1127 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
1128
1129 vf->num_rxqs = 0;
1130 vf->num_txqs = 0;
1131 qed_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf);
1132
1133 if (vf->b_init) {
1134 vf->b_init = false;
1135
1136 if (IS_LEAD_HWFN(p_hwfn))
1137 p_hwfn->cdev->p_iov_info->num_vfs--;
1138 }
1139
1140 return 0;
1141}
1142
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001143static bool qed_iov_tlv_supported(u16 tlvtype)
1144{
1145 return CHANNEL_TLV_NONE < tlvtype && tlvtype < CHANNEL_TLV_MAX;
1146}
1147
1148/* place a given tlv on the tlv buffer, continuing current tlv list */
1149void *qed_add_tlv(struct qed_hwfn *p_hwfn, u8 **offset, u16 type, u16 length)
1150{
1151 struct channel_tlv *tl = (struct channel_tlv *)*offset;
1152
1153 tl->type = type;
1154 tl->length = length;
1155
1156 /* Offset should keep pointing to next TLV (the end of the last) */
1157 *offset += length;
1158
1159 /* Return a pointer to the start of the added tlv */
1160 return *offset - length;
1161}
1162
1163/* list the types and lengths of the tlvs on the buffer */
1164void qed_dp_tlv_list(struct qed_hwfn *p_hwfn, void *tlvs_list)
1165{
1166 u16 i = 1, total_length = 0;
1167 struct channel_tlv *tlv;
1168
1169 do {
1170 tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length);
1171
1172 /* output tlv */
1173 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1174 "TLV number %d: type %d, length %d\n",
1175 i, tlv->type, tlv->length);
1176
1177 if (tlv->type == CHANNEL_TLV_LIST_END)
1178 return;
1179
1180 /* Validate entry - protect against malicious VFs */
1181 if (!tlv->length) {
1182 DP_NOTICE(p_hwfn, "TLV of length 0 found\n");
1183 return;
1184 }
1185
1186 total_length += tlv->length;
1187
1188 if (total_length >= sizeof(struct tlv_buffer_size)) {
1189 DP_NOTICE(p_hwfn, "TLV ==> Buffer overflow\n");
1190 return;
1191 }
1192
1193 i++;
1194 } while (1);
1195}
1196
1197static void qed_iov_send_response(struct qed_hwfn *p_hwfn,
1198 struct qed_ptt *p_ptt,
1199 struct qed_vf_info *p_vf,
1200 u16 length, u8 status)
1201{
1202 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
1203 struct qed_dmae_params params;
1204 u8 eng_vf_id;
1205
1206 mbx->reply_virt->default_resp.hdr.status = status;
1207
1208 qed_dp_tlv_list(p_hwfn, mbx->reply_virt);
1209
1210 eng_vf_id = p_vf->abs_vf_id;
1211
1212 memset(&params, 0, sizeof(struct qed_dmae_params));
1213 params.flags = QED_DMAE_FLAG_VF_DST;
1214 params.dst_vfid = eng_vf_id;
1215
1216 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64),
1217 mbx->req_virt->first_tlv.reply_address +
1218 sizeof(u64),
1219 (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4,
1220 &params);
1221
Mintz, Yuvald9194082017-03-19 13:08:14 +02001222 /* Once PF copies the rc to the VF, the latter can continue
1223 * and send an additional message. So we have to make sure the
1224 * channel would be re-set to ready prior to that.
1225 */
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001226 REG_WR(p_hwfn,
1227 GTT_BAR0_MAP_REG_USDM_RAM +
1228 USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1);
Mintz, Yuvald9194082017-03-19 13:08:14 +02001229
1230 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys,
1231 mbx->req_virt->first_tlv.reply_address,
1232 sizeof(u64) / 4, &params);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001233}
1234
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001235static u16 qed_iov_vport_to_tlv(struct qed_hwfn *p_hwfn,
1236 enum qed_iov_vport_update_flag flag)
1237{
1238 switch (flag) {
1239 case QED_IOV_VP_UPDATE_ACTIVATE:
1240 return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
Yuval Mintz17b235c2016-05-11 16:36:18 +03001241 case QED_IOV_VP_UPDATE_VLAN_STRIP:
1242 return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
1243 case QED_IOV_VP_UPDATE_TX_SWITCH:
1244 return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001245 case QED_IOV_VP_UPDATE_MCAST:
1246 return CHANNEL_TLV_VPORT_UPDATE_MCAST;
1247 case QED_IOV_VP_UPDATE_ACCEPT_PARAM:
1248 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1249 case QED_IOV_VP_UPDATE_RSS:
1250 return CHANNEL_TLV_VPORT_UPDATE_RSS;
Yuval Mintz17b235c2016-05-11 16:36:18 +03001251 case QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN:
1252 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1253 case QED_IOV_VP_UPDATE_SGE_TPA:
1254 return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001255 default:
1256 return 0;
1257 }
1258}
1259
1260static u16 qed_iov_prep_vp_update_resp_tlvs(struct qed_hwfn *p_hwfn,
1261 struct qed_vf_info *p_vf,
1262 struct qed_iov_vf_mbx *p_mbx,
1263 u8 status,
1264 u16 tlvs_mask, u16 tlvs_accepted)
1265{
1266 struct pfvf_def_resp_tlv *resp;
1267 u16 size, total_len, i;
1268
1269 memset(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs));
1270 p_mbx->offset = (u8 *)p_mbx->reply_virt;
1271 size = sizeof(struct pfvf_def_resp_tlv);
1272 total_len = size;
1273
1274 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size);
1275
1276 /* Prepare response for all extended tlvs if they are found by PF */
1277 for (i = 0; i < QED_IOV_VP_UPDATE_MAX; i++) {
Yuval Mintz1a635e42016-08-15 10:42:43 +03001278 if (!(tlvs_mask & BIT(i)))
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001279 continue;
1280
1281 resp = qed_add_tlv(p_hwfn, &p_mbx->offset,
1282 qed_iov_vport_to_tlv(p_hwfn, i), size);
1283
Yuval Mintz1a635e42016-08-15 10:42:43 +03001284 if (tlvs_accepted & BIT(i))
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001285 resp->hdr.status = status;
1286 else
1287 resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED;
1288
1289 DP_VERBOSE(p_hwfn,
1290 QED_MSG_IOV,
1291 "VF[%d] - vport_update response: TLV %d, status %02x\n",
1292 p_vf->relative_vf_id,
1293 qed_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status);
1294
1295 total_len += size;
1296 }
1297
1298 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END,
1299 sizeof(struct channel_list_end_tlv));
1300
1301 return total_len;
1302}
1303
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001304static void qed_iov_prepare_resp(struct qed_hwfn *p_hwfn,
1305 struct qed_ptt *p_ptt,
1306 struct qed_vf_info *vf_info,
1307 u16 type, u16 length, u8 status)
1308{
1309 struct qed_iov_vf_mbx *mbx = &vf_info->vf_mbx;
1310
1311 mbx->offset = (u8 *)mbx->reply_virt;
1312
1313 qed_add_tlv(p_hwfn, &mbx->offset, type, length);
1314 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1315 sizeof(struct channel_list_end_tlv));
1316
1317 qed_iov_send_response(p_hwfn, p_ptt, vf_info, length, status);
1318}
1319
Baoyou Xieba569472016-09-09 09:21:15 +08001320static struct
1321qed_public_vf_info *qed_iov_get_public_vf_info(struct qed_hwfn *p_hwfn,
1322 u16 relative_vf_id,
1323 bool b_enabled_only)
Yuval Mintz0b55e272016-05-11 16:36:15 +03001324{
1325 struct qed_vf_info *vf = NULL;
1326
1327 vf = qed_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only);
1328 if (!vf)
1329 return NULL;
1330
1331 return &vf->p_vf_info;
1332}
1333
Baoyou Xieba569472016-09-09 09:21:15 +08001334static void qed_iov_clean_vf(struct qed_hwfn *p_hwfn, u8 vfid)
Yuval Mintz0b55e272016-05-11 16:36:15 +03001335{
1336 struct qed_public_vf_info *vf_info;
1337
1338 vf_info = qed_iov_get_public_vf_info(p_hwfn, vfid, false);
1339
1340 if (!vf_info)
1341 return;
1342
1343 /* Clear the VF mac */
Shyam Saini0ee28e32017-01-17 07:35:04 +05301344 eth_zero_addr(vf_info->mac);
Mintz, Yuvalf990c822017-01-01 13:57:08 +02001345
1346 vf_info->rx_accept_mode = 0;
1347 vf_info->tx_accept_mode = 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001348}
1349
1350static void qed_iov_vf_cleanup(struct qed_hwfn *p_hwfn,
1351 struct qed_vf_info *p_vf)
1352{
Mintz, Yuval007bc372017-06-04 13:31:05 +03001353 u32 i, j;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001354
1355 p_vf->vf_bulletin = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001356 p_vf->vport_instance = 0;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001357 p_vf->configured_features = 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001358
1359 /* If VF previously requested less resources, go back to default */
1360 p_vf->num_rxqs = p_vf->num_sbs;
1361 p_vf->num_txqs = p_vf->num_sbs;
1362
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001363 p_vf->num_active_rxqs = 0;
1364
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001365 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
Mintz, Yuval007bc372017-06-04 13:31:05 +03001366 struct qed_vf_queue *p_queue = &p_vf->vf_queues[i];
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001367
Mintz, Yuval007bc372017-06-04 13:31:05 +03001368 for (j = 0; j < MAX_QUEUES_PER_QZONE; j++) {
1369 if (!p_queue->cids[j].p_cid)
1370 continue;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001371
Mintz, Yuval007bc372017-06-04 13:31:05 +03001372 qed_eth_queue_cid_release(p_hwfn,
1373 p_queue->cids[j].p_cid);
1374 p_queue->cids[j].p_cid = NULL;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001375 }
1376 }
Yuval Mintz0b55e272016-05-11 16:36:15 +03001377
Yuval Mintz08feecd2016-05-11 16:36:20 +03001378 memset(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config));
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001379 memset(&p_vf->acquire, 0, sizeof(p_vf->acquire));
Yuval Mintz0b55e272016-05-11 16:36:15 +03001380 qed_iov_clean_vf(p_hwfn, p_vf->relative_vf_id);
1381}
1382
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001383static u8 qed_iov_vf_mbx_acquire_resc(struct qed_hwfn *p_hwfn,
1384 struct qed_ptt *p_ptt,
1385 struct qed_vf_info *p_vf,
1386 struct vf_pf_resc_request *p_req,
1387 struct pf_vf_resc *p_resp)
1388{
Mintz, Yuval007bc372017-06-04 13:31:05 +03001389 u8 i;
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001390
1391 /* Queue related information */
1392 p_resp->num_rxqs = p_vf->num_rxqs;
1393 p_resp->num_txqs = p_vf->num_txqs;
1394 p_resp->num_sbs = p_vf->num_sbs;
1395
1396 for (i = 0; i < p_resp->num_sbs; i++) {
1397 p_resp->hw_sbs[i].hw_sb_id = p_vf->igu_sbs[i];
1398 p_resp->hw_sbs[i].sb_qid = 0;
1399 }
1400
1401 /* These fields are filled for backward compatibility.
1402 * Unused by modern vfs.
1403 */
1404 for (i = 0; i < p_resp->num_rxqs; i++) {
1405 qed_fw_l2_queue(p_hwfn, p_vf->vf_queues[i].fw_rx_qid,
1406 (u16 *)&p_resp->hw_qid[i]);
Mintz, Yuval007bc372017-06-04 13:31:05 +03001407 p_resp->cid[i] = i;
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001408 }
1409
1410 /* Filter related information */
1411 p_resp->num_mac_filters = min_t(u8, p_vf->num_mac_filters,
1412 p_req->num_mac_filters);
1413 p_resp->num_vlan_filters = min_t(u8, p_vf->num_vlan_filters,
1414 p_req->num_vlan_filters);
1415
1416 /* This isn't really needed/enforced, but some legacy VFs might depend
1417 * on the correct filling of this field.
1418 */
1419 p_resp->num_mc_filters = QED_MAX_MC_ADDRS;
1420
1421 /* Validate sufficient resources for VF */
1422 if (p_resp->num_rxqs < p_req->num_rxqs ||
1423 p_resp->num_txqs < p_req->num_txqs ||
1424 p_resp->num_sbs < p_req->num_sbs ||
1425 p_resp->num_mac_filters < p_req->num_mac_filters ||
1426 p_resp->num_vlan_filters < p_req->num_vlan_filters ||
1427 p_resp->num_mc_filters < p_req->num_mc_filters) {
1428 DP_VERBOSE(p_hwfn,
1429 QED_MSG_IOV,
1430 "VF[%d] - Insufficient resources: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x]\n",
1431 p_vf->abs_vf_id,
1432 p_req->num_rxqs,
1433 p_resp->num_rxqs,
1434 p_req->num_rxqs,
1435 p_resp->num_txqs,
1436 p_req->num_sbs,
1437 p_resp->num_sbs,
1438 p_req->num_mac_filters,
1439 p_resp->num_mac_filters,
1440 p_req->num_vlan_filters,
1441 p_resp->num_vlan_filters,
1442 p_req->num_mc_filters, p_resp->num_mc_filters);
Yuval Mintza044df82016-08-22 13:25:09 +03001443
1444 /* Some legacy OSes are incapable of correctly handling this
1445 * failure.
1446 */
1447 if ((p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
1448 ETH_HSI_VER_NO_PKT_LEN_TUNN) &&
1449 (p_vf->acquire.vfdev_info.os_type ==
1450 VFPF_ACQUIRE_OS_WINDOWS))
1451 return PFVF_STATUS_SUCCESS;
1452
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001453 return PFVF_STATUS_NO_RESOURCE;
1454 }
1455
1456 return PFVF_STATUS_SUCCESS;
1457}
1458
1459static void qed_iov_vf_mbx_acquire_stats(struct qed_hwfn *p_hwfn,
1460 struct pfvf_stats_info *p_stats)
1461{
1462 p_stats->mstats.address = PXP_VF_BAR0_START_MSDM_ZONE_B +
1463 offsetof(struct mstorm_vf_zone,
1464 non_trigger.eth_queue_stat);
1465 p_stats->mstats.len = sizeof(struct eth_mstorm_per_queue_stat);
1466 p_stats->ustats.address = PXP_VF_BAR0_START_USDM_ZONE_B +
1467 offsetof(struct ustorm_vf_zone,
1468 non_trigger.eth_queue_stat);
1469 p_stats->ustats.len = sizeof(struct eth_ustorm_per_queue_stat);
1470 p_stats->pstats.address = PXP_VF_BAR0_START_PSDM_ZONE_B +
1471 offsetof(struct pstorm_vf_zone,
1472 non_trigger.eth_queue_stat);
1473 p_stats->pstats.len = sizeof(struct eth_pstorm_per_queue_stat);
1474 p_stats->tstats.address = 0;
1475 p_stats->tstats.len = 0;
1476}
1477
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001478static void qed_iov_vf_mbx_acquire(struct qed_hwfn *p_hwfn,
1479 struct qed_ptt *p_ptt,
1480 struct qed_vf_info *vf)
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001481{
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001482 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1483 struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp;
1484 struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
1485 struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire;
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001486 u8 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001487 struct pf_vf_resc *resc = &resp->resc;
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001488 int rc;
1489
1490 memset(resp, 0, sizeof(*resp));
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001491
Yuval Mintz05fafbf2016-08-19 09:33:31 +03001492 /* Write the PF version so that VF would know which version
1493 * is supported - might be later overriden. This guarantees that
1494 * VF could recognize legacy PF based on lack of versions in reply.
1495 */
1496 pfdev_info->major_fp_hsi = ETH_HSI_VER_MAJOR;
1497 pfdev_info->minor_fp_hsi = ETH_HSI_VER_MINOR;
1498
Yuval Mintza044df82016-08-22 13:25:09 +03001499 if (vf->state != VF_FREE && vf->state != VF_STOPPED) {
1500 DP_VERBOSE(p_hwfn,
1501 QED_MSG_IOV,
1502 "VF[%d] sent ACQUIRE but is already in state %d - fail request\n",
1503 vf->abs_vf_id, vf->state);
1504 goto out;
1505 }
1506
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001507 /* Validate FW compatibility */
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001508 if (req->vfdev_info.eth_fp_hsi_major != ETH_HSI_VER_MAJOR) {
Yuval Mintza044df82016-08-22 13:25:09 +03001509 if (req->vfdev_info.capabilities &
1510 VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
1511 struct vf_pf_vfdev_info *p_vfdev = &req->vfdev_info;
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001512
Yuval Mintza044df82016-08-22 13:25:09 +03001513 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1514 "VF[%d] is pre-fastpath HSI\n",
1515 vf->abs_vf_id);
1516 p_vfdev->eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
1517 p_vfdev->eth_fp_hsi_minor = ETH_HSI_VER_NO_PKT_LEN_TUNN;
1518 } else {
1519 DP_INFO(p_hwfn,
1520 "VF[%d] needs fastpath HSI %02x.%02x, which is incompatible with loaded FW's faspath HSI %02x.%02x\n",
1521 vf->abs_vf_id,
1522 req->vfdev_info.eth_fp_hsi_major,
1523 req->vfdev_info.eth_fp_hsi_minor,
1524 ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
1525
1526 goto out;
1527 }
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001528 }
1529
1530 /* On 100g PFs, prevent old VFs from loading */
1531 if ((p_hwfn->cdev->num_hwfns > 1) &&
1532 !(req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_100G)) {
1533 DP_INFO(p_hwfn,
1534 "VF[%d] is running an old driver that doesn't support 100g\n",
1535 vf->abs_vf_id);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001536 goto out;
1537 }
1538
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001539 /* Store the acquire message */
1540 memcpy(&vf->acquire, req, sizeof(vf->acquire));
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001541
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001542 vf->opaque_fid = req->vfdev_info.opaque_fid;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001543
1544 vf->vf_bulletin = req->bulletin_addr;
1545 vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ?
1546 vf->bulletin.size : req->bulletin_size;
1547
1548 /* fill in pfdev info */
1549 pfdev_info->chip_num = p_hwfn->cdev->chip_num;
1550 pfdev_info->db_size = 0;
1551 pfdev_info->indices_per_sb = PIS_PER_SB;
1552
1553 pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED |
1554 PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE;
1555 if (p_hwfn->cdev->num_hwfns > 1)
1556 pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_100G;
1557
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001558 qed_iov_vf_mbx_acquire_stats(p_hwfn, &pfdev_info->stats_info);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001559
1560 memcpy(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr, ETH_ALEN);
1561
1562 pfdev_info->fw_major = FW_MAJOR_VERSION;
1563 pfdev_info->fw_minor = FW_MINOR_VERSION;
1564 pfdev_info->fw_rev = FW_REVISION_VERSION;
1565 pfdev_info->fw_eng = FW_ENGINEERING_VERSION;
Yuval Mintza044df82016-08-22 13:25:09 +03001566
1567 /* Incorrect when legacy, but doesn't matter as legacy isn't reading
1568 * this field.
1569 */
Yuval Mintz1a635e42016-08-15 10:42:43 +03001570 pfdev_info->minor_fp_hsi = min_t(u8, ETH_HSI_VER_MINOR,
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001571 req->vfdev_info.eth_fp_hsi_minor);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001572 pfdev_info->os_type = VFPF_ACQUIRE_OS_LINUX;
1573 qed_mcp_get_mfw_ver(p_hwfn, p_ptt, &pfdev_info->mfw_ver, NULL);
1574
1575 pfdev_info->dev_type = p_hwfn->cdev->type;
1576 pfdev_info->chip_rev = p_hwfn->cdev->chip_rev;
1577
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001578 /* Fill resources available to VF; Make sure there are enough to
1579 * satisfy the VF's request.
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001580 */
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001581 vfpf_status = qed_iov_vf_mbx_acquire_resc(p_hwfn, p_ptt, vf,
1582 &req->resc_request, resc);
1583 if (vfpf_status != PFVF_STATUS_SUCCESS)
1584 goto out;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001585
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001586 /* Start the VF in FW */
1587 rc = qed_sp_vf_start(p_hwfn, vf);
1588 if (rc) {
1589 DP_NOTICE(p_hwfn, "Failed to start VF[%02x]\n", vf->abs_vf_id);
1590 vfpf_status = PFVF_STATUS_FAILURE;
1591 goto out;
1592 }
1593
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001594 /* Fill agreed size of bulletin board in response */
1595 resp->bulletin_size = vf->bulletin.size;
Yuval Mintz36558c32016-05-11 16:36:17 +03001596 qed_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001597
1598 DP_VERBOSE(p_hwfn,
1599 QED_MSG_IOV,
1600 "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x, db_size=%d, idx_per_sb=%d, pf_cap=0x%llx\n"
1601 "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d, n_vlans-%d\n",
1602 vf->abs_vf_id,
1603 resp->pfdev_info.chip_num,
1604 resp->pfdev_info.db_size,
1605 resp->pfdev_info.indices_per_sb,
1606 resp->pfdev_info.capabilities,
1607 resc->num_rxqs,
1608 resc->num_txqs,
1609 resc->num_sbs,
1610 resc->num_mac_filters,
1611 resc->num_vlan_filters);
1612 vf->state = VF_ACQUIRED;
1613
1614 /* Prepare Response */
1615out:
1616 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE,
1617 sizeof(struct pfvf_acquire_resp_tlv), vfpf_status);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001618}
1619
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001620static int __qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn,
1621 struct qed_vf_info *p_vf, bool val)
1622{
1623 struct qed_sp_vport_update_params params;
1624 int rc;
1625
1626 if (val == p_vf->spoof_chk) {
1627 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1628 "Spoofchk value[%d] is already configured\n", val);
1629 return 0;
1630 }
1631
1632 memset(&params, 0, sizeof(struct qed_sp_vport_update_params));
1633 params.opaque_fid = p_vf->opaque_fid;
1634 params.vport_id = p_vf->vport_id;
1635 params.update_anti_spoofing_en_flg = 1;
1636 params.anti_spoofing_en = val;
1637
1638 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
Yuval Mintzcb1fa082016-07-27 14:45:20 +03001639 if (!rc) {
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001640 p_vf->spoof_chk = val;
1641 p_vf->req_spoofchk_val = p_vf->spoof_chk;
1642 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1643 "Spoofchk val[%d] configured\n", val);
1644 } else {
1645 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1646 "Spoofchk configuration[val:%d] failed for VF[%d]\n",
1647 val, p_vf->relative_vf_id);
1648 }
1649
1650 return rc;
1651}
1652
Yuval Mintz08feecd2016-05-11 16:36:20 +03001653static int qed_iov_reconfigure_unicast_vlan(struct qed_hwfn *p_hwfn,
1654 struct qed_vf_info *p_vf)
1655{
1656 struct qed_filter_ucast filter;
1657 int rc = 0;
1658 int i;
1659
1660 memset(&filter, 0, sizeof(filter));
1661 filter.is_rx_filter = 1;
1662 filter.is_tx_filter = 1;
1663 filter.vport_to_add_to = p_vf->vport_id;
1664 filter.opcode = QED_FILTER_ADD;
1665
1666 /* Reconfigure vlans */
1667 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
1668 if (!p_vf->shadow_config.vlans[i].used)
1669 continue;
1670
1671 filter.type = QED_FILTER_VLAN;
1672 filter.vlan = p_vf->shadow_config.vlans[i].vid;
Yuval Mintz1a635e42016-08-15 10:42:43 +03001673 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
Yuval Mintz08feecd2016-05-11 16:36:20 +03001674 "Reconfiguring VLAN [0x%04x] for VF [%04x]\n",
1675 filter.vlan, p_vf->relative_vf_id);
Yuval Mintz1a635e42016-08-15 10:42:43 +03001676 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1677 &filter, QED_SPQ_MODE_CB, NULL);
Yuval Mintz08feecd2016-05-11 16:36:20 +03001678 if (rc) {
1679 DP_NOTICE(p_hwfn,
1680 "Failed to configure VLAN [%04x] to VF [%04x]\n",
1681 filter.vlan, p_vf->relative_vf_id);
1682 break;
1683 }
1684 }
1685
1686 return rc;
1687}
1688
1689static int
1690qed_iov_reconfigure_unicast_shadow(struct qed_hwfn *p_hwfn,
1691 struct qed_vf_info *p_vf, u64 events)
1692{
1693 int rc = 0;
1694
Yuval Mintz1a635e42016-08-15 10:42:43 +03001695 if ((events & BIT(VLAN_ADDR_FORCED)) &&
Yuval Mintz08feecd2016-05-11 16:36:20 +03001696 !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
1697 rc = qed_iov_reconfigure_unicast_vlan(p_hwfn, p_vf);
1698
1699 return rc;
1700}
1701
1702static int qed_iov_configure_vport_forced(struct qed_hwfn *p_hwfn,
1703 struct qed_vf_info *p_vf, u64 events)
1704{
1705 int rc = 0;
1706 struct qed_filter_ucast filter;
1707
1708 if (!p_vf->vport_instance)
1709 return -EINVAL;
1710
Yuval Mintz1a635e42016-08-15 10:42:43 +03001711 if (events & BIT(MAC_ADDR_FORCED)) {
Yuval Mintzeff16962016-05-11 16:36:21 +03001712 /* Since there's no way [currently] of removing the MAC,
1713 * we can always assume this means we need to force it.
1714 */
1715 memset(&filter, 0, sizeof(filter));
1716 filter.type = QED_FILTER_MAC;
1717 filter.opcode = QED_FILTER_REPLACE;
1718 filter.is_rx_filter = 1;
1719 filter.is_tx_filter = 1;
1720 filter.vport_to_add_to = p_vf->vport_id;
1721 ether_addr_copy(filter.mac, p_vf->bulletin.p_virt->mac);
1722
1723 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1724 &filter, QED_SPQ_MODE_CB, NULL);
1725 if (rc) {
1726 DP_NOTICE(p_hwfn,
1727 "PF failed to configure MAC for VF\n");
1728 return rc;
1729 }
1730
1731 p_vf->configured_features |= 1 << MAC_ADDR_FORCED;
1732 }
1733
Yuval Mintz1a635e42016-08-15 10:42:43 +03001734 if (events & BIT(VLAN_ADDR_FORCED)) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03001735 struct qed_sp_vport_update_params vport_update;
1736 u8 removal;
1737 int i;
1738
1739 memset(&filter, 0, sizeof(filter));
1740 filter.type = QED_FILTER_VLAN;
1741 filter.is_rx_filter = 1;
1742 filter.is_tx_filter = 1;
1743 filter.vport_to_add_to = p_vf->vport_id;
1744 filter.vlan = p_vf->bulletin.p_virt->pvid;
1745 filter.opcode = filter.vlan ? QED_FILTER_REPLACE :
1746 QED_FILTER_FLUSH;
1747
1748 /* Send the ramrod */
1749 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1750 &filter, QED_SPQ_MODE_CB, NULL);
1751 if (rc) {
1752 DP_NOTICE(p_hwfn,
1753 "PF failed to configure VLAN for VF\n");
1754 return rc;
1755 }
1756
1757 /* Update the default-vlan & silent vlan stripping */
1758 memset(&vport_update, 0, sizeof(vport_update));
1759 vport_update.opaque_fid = p_vf->opaque_fid;
1760 vport_update.vport_id = p_vf->vport_id;
1761 vport_update.update_default_vlan_enable_flg = 1;
1762 vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0;
1763 vport_update.update_default_vlan_flg = 1;
1764 vport_update.default_vlan = filter.vlan;
1765
1766 vport_update.update_inner_vlan_removal_flg = 1;
1767 removal = filter.vlan ? 1
1768 : p_vf->shadow_config.inner_vlan_removal;
1769 vport_update.inner_vlan_removal_flg = removal;
1770 vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0;
1771 rc = qed_sp_vport_update(p_hwfn,
1772 &vport_update,
1773 QED_SPQ_MODE_EBLOCK, NULL);
1774 if (rc) {
1775 DP_NOTICE(p_hwfn,
1776 "PF failed to configure VF vport for vlan\n");
1777 return rc;
1778 }
1779
1780 /* Update all the Rx queues */
1781 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
Mintz, Yuval007bc372017-06-04 13:31:05 +03001782 struct qed_vf_queue *p_queue = &p_vf->vf_queues[i];
1783 struct qed_queue_cid *p_cid = NULL;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001784
Mintz, Yuval007bc372017-06-04 13:31:05 +03001785 /* There can be at most 1 Rx queue on qzone. Find it */
1786 p_cid = qed_iov_get_vf_rx_queue_cid(p_queue);
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001787 if (!p_cid)
Yuval Mintz08feecd2016-05-11 16:36:20 +03001788 continue;
1789
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001790 rc = qed_sp_eth_rx_queues_update(p_hwfn,
1791 (void **)&p_cid,
Yuval Mintz08feecd2016-05-11 16:36:20 +03001792 1, 0, 1,
1793 QED_SPQ_MODE_EBLOCK,
1794 NULL);
1795 if (rc) {
1796 DP_NOTICE(p_hwfn,
1797 "Failed to send Rx update fo queue[0x%04x]\n",
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001798 p_cid->rel.queue_id);
Yuval Mintz08feecd2016-05-11 16:36:20 +03001799 return rc;
1800 }
1801 }
1802
1803 if (filter.vlan)
1804 p_vf->configured_features |= 1 << VLAN_ADDR_FORCED;
1805 else
Yuval Mintz1a635e42016-08-15 10:42:43 +03001806 p_vf->configured_features &= ~BIT(VLAN_ADDR_FORCED);
Yuval Mintz08feecd2016-05-11 16:36:20 +03001807 }
1808
1809 /* If forced features are terminated, we need to configure the shadow
1810 * configuration back again.
1811 */
1812 if (events)
1813 qed_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events);
1814
1815 return rc;
1816}
1817
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001818static void qed_iov_vf_mbx_start_vport(struct qed_hwfn *p_hwfn,
1819 struct qed_ptt *p_ptt,
1820 struct qed_vf_info *vf)
1821{
1822 struct qed_sp_vport_start_params params = { 0 };
1823 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1824 struct vfpf_vport_start_tlv *start;
1825 u8 status = PFVF_STATUS_SUCCESS;
1826 struct qed_vf_info *vf_info;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001827 u64 *p_bitmap;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001828 int sb_id;
1829 int rc;
1830
1831 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vf->relative_vf_id, true);
1832 if (!vf_info) {
1833 DP_NOTICE(p_hwfn->cdev,
1834 "Failed to get VF info, invalid vfid [%d]\n",
1835 vf->relative_vf_id);
1836 return;
1837 }
1838
1839 vf->state = VF_ENABLED;
1840 start = &mbx->req_virt->start_vport;
1841
Mintz, Yuvalb801b152017-03-19 13:08:15 +02001842 qed_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);
1843
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001844 /* Initialize Status block in CAU */
1845 for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {
1846 if (!start->sb_addr[sb_id]) {
1847 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1848 "VF[%d] did not fill the address of SB %d\n",
1849 vf->relative_vf_id, sb_id);
1850 break;
1851 }
1852
1853 qed_int_cau_conf_sb(p_hwfn, p_ptt,
1854 start->sb_addr[sb_id],
Yuval Mintz1a635e42016-08-15 10:42:43 +03001855 vf->igu_sbs[sb_id], vf->abs_vf_id, 1);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001856 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001857
1858 vf->mtu = start->mtu;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001859 vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;
1860
1861 /* Take into consideration configuration forced by hypervisor;
1862 * If none is configured, use the supplied VF values [for old
1863 * vfs that would still be fine, since they passed '0' as padding].
1864 */
1865 p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
Yuval Mintz1a635e42016-08-15 10:42:43 +03001866 if (!(*p_bitmap & BIT(VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03001867 u8 vf_req = start->only_untagged;
1868
1869 vf_info->bulletin.p_virt->default_only_untagged = vf_req;
1870 *p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT;
1871 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001872
1873 params.tpa_mode = start->tpa_mode;
1874 params.remove_inner_vlan = start->inner_vlan_removal;
Yuval Mintz831bfb0e2016-05-11 16:36:25 +03001875 params.tx_switching = true;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001876
Yuval Mintz08feecd2016-05-11 16:36:20 +03001877 params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001878 params.drop_ttl0 = false;
1879 params.concrete_fid = vf->concrete_fid;
1880 params.opaque_fid = vf->opaque_fid;
1881 params.vport_id = vf->vport_id;
1882 params.max_buffers_per_cqe = start->max_buffers_per_cqe;
1883 params.mtu = vf->mtu;
Yuval Mintz11a85d72016-08-22 13:25:10 +03001884 params.check_mac = true;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001885
1886 rc = qed_sp_eth_vport_start(p_hwfn, &params);
Yuval Mintz1a635e42016-08-15 10:42:43 +03001887 if (rc) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001888 DP_ERR(p_hwfn,
1889 "qed_iov_vf_mbx_start_vport returned error %d\n", rc);
1890 status = PFVF_STATUS_FAILURE;
1891 } else {
1892 vf->vport_instance++;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001893
1894 /* Force configuration if needed on the newly opened vport */
1895 qed_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap);
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001896
1897 __qed_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001898 }
1899 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START,
1900 sizeof(struct pfvf_def_resp_tlv), status);
1901}
1902
1903static void qed_iov_vf_mbx_stop_vport(struct qed_hwfn *p_hwfn,
1904 struct qed_ptt *p_ptt,
1905 struct qed_vf_info *vf)
1906{
1907 u8 status = PFVF_STATUS_SUCCESS;
1908 int rc;
1909
1910 vf->vport_instance--;
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001911 vf->spoof_chk = false;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001912
Mintz, Yuvalf109c242017-03-19 13:08:16 +02001913 if ((qed_iov_validate_active_rxq(p_hwfn, vf)) ||
1914 (qed_iov_validate_active_txq(p_hwfn, vf))) {
1915 vf->b_malicious = true;
1916 DP_NOTICE(p_hwfn,
1917 "VF [%02x] - considered malicious; Unable to stop RX/TX queuess\n",
1918 vf->abs_vf_id);
1919 status = PFVF_STATUS_MALICIOUS;
1920 goto out;
1921 }
1922
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001923 rc = qed_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id);
Yuval Mintz1a635e42016-08-15 10:42:43 +03001924 if (rc) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001925 DP_ERR(p_hwfn, "qed_iov_vf_mbx_stop_vport returned error %d\n",
1926 rc);
1927 status = PFVF_STATUS_FAILURE;
1928 }
1929
Yuval Mintz08feecd2016-05-11 16:36:20 +03001930 /* Forget the configuration on the vport */
1931 vf->configured_features = 0;
1932 memset(&vf->shadow_config, 0, sizeof(vf->shadow_config));
1933
Mintz, Yuvalf109c242017-03-19 13:08:16 +02001934out:
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001935 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN,
1936 sizeof(struct pfvf_def_resp_tlv), status);
1937}
1938
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001939static void qed_iov_vf_mbx_start_rxq_resp(struct qed_hwfn *p_hwfn,
1940 struct qed_ptt *p_ptt,
Yuval Mintza044df82016-08-22 13:25:09 +03001941 struct qed_vf_info *vf,
1942 u8 status, bool b_legacy)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001943{
1944 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1945 struct pfvf_start_queue_resp_tlv *p_tlv;
1946 struct vfpf_start_rxq_tlv *req;
Yuval Mintza044df82016-08-22 13:25:09 +03001947 u16 length;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001948
1949 mbx->offset = (u8 *)mbx->reply_virt;
1950
Yuval Mintza044df82016-08-22 13:25:09 +03001951 /* Taking a bigger struct instead of adding a TLV to list was a
1952 * mistake, but one which we're now stuck with, as some older
1953 * clients assume the size of the previous response.
1954 */
1955 if (!b_legacy)
1956 length = sizeof(*p_tlv);
1957 else
1958 length = sizeof(struct pfvf_def_resp_tlv);
1959
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001960 p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_RXQ,
Yuval Mintza044df82016-08-22 13:25:09 +03001961 length);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001962 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1963 sizeof(struct channel_list_end_tlv));
1964
1965 /* Update the TLV with the response */
Yuval Mintza044df82016-08-22 13:25:09 +03001966 if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001967 req = &mbx->req_virt->start_rxq;
Yuval Mintz351a4ded2016-06-02 10:23:29 +03001968 p_tlv->offset = PXP_VF_BAR0_START_MSDM_ZONE_B +
1969 offsetof(struct mstorm_vf_zone,
1970 non_trigger.eth_rx_queue_producers) +
1971 sizeof(struct eth_rx_prod_data) * req->rx_qid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001972 }
1973
Yuval Mintza044df82016-08-22 13:25:09 +03001974 qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001975}
1976
Mintz, Yuvalbbe3f232017-06-04 13:31:03 +03001977static u8 qed_iov_vf_mbx_qid(struct qed_hwfn *p_hwfn,
1978 struct qed_vf_info *p_vf, bool b_is_tx)
1979{
1980 if (b_is_tx)
1981 return QED_IOV_LEGACY_QID_TX;
1982 else
1983 return QED_IOV_LEGACY_QID_RX;
1984}
1985
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001986static void qed_iov_vf_mbx_start_rxq(struct qed_hwfn *p_hwfn,
1987 struct qed_ptt *p_ptt,
1988 struct qed_vf_info *vf)
1989{
1990 struct qed_queue_start_common_params params;
Mintz, Yuval39464972017-06-04 13:31:02 +03001991 struct qed_queue_cid_vf_params vf_params;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001992 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Yuval Mintz41086462016-06-05 13:11:13 +03001993 u8 status = PFVF_STATUS_NO_RESOURCE;
Mintz, Yuval3b19f472017-06-04 13:31:04 +03001994 u8 qid_usage_idx, vf_legacy = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001995 struct vfpf_start_rxq_tlv *req;
Mintz, Yuval007bc372017-06-04 13:31:05 +03001996 struct qed_vf_queue *p_queue;
1997 struct qed_queue_cid *p_cid;
Mintz, Yuvalf604b172017-06-04 13:31:01 +03001998 struct qed_sb_info sb_dummy;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001999 int rc;
2000
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002001 req = &mbx->req_virt->start_rxq;
Yuval Mintz41086462016-06-05 13:11:13 +03002002
Mintz, Yuvalf109c242017-03-19 13:08:16 +02002003 if (!qed_iov_validate_rxq(p_hwfn, vf, req->rx_qid,
2004 QED_IOV_VALIDATE_Q_DISABLE) ||
Yuval Mintz41086462016-06-05 13:11:13 +03002005 !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
2006 goto out;
2007
Mintz, Yuvalbbe3f232017-06-04 13:31:03 +03002008 qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, false);
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002009 p_queue = &vf->vf_queues[req->rx_qid];
2010
Mintz, Yuval3b19f472017-06-04 13:31:04 +03002011 vf_legacy = qed_vf_calculate_legacy(vf);
Mintz, Yuval39464972017-06-04 13:31:02 +03002012
Mintz, Yuvalbbe3f232017-06-04 13:31:03 +03002013 /* Acquire a new queue-cid */
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002014 memset(&params, 0, sizeof(params));
2015 params.queue_id = p_queue->fw_rx_qid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002016 params.vport_id = vf->vport_id;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002017 params.stats_id = vf->abs_vf_id + 0x10;
Mintz, Yuvalf604b172017-06-04 13:31:01 +03002018 /* Since IGU index is passed via sb_info, construct a dummy one */
2019 memset(&sb_dummy, 0, sizeof(sb_dummy));
2020 sb_dummy.igu_sb_id = req->hw_sb;
2021 params.p_sb = &sb_dummy;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002022 params.sb_idx = req->sb_index;
2023
Mintz, Yuval39464972017-06-04 13:31:02 +03002024 memset(&vf_params, 0, sizeof(vf_params));
2025 vf_params.vfid = vf->relative_vf_id;
2026 vf_params.vf_qid = (u8)req->rx_qid;
Mintz, Yuval3b19f472017-06-04 13:31:04 +03002027 vf_params.vf_legacy = vf_legacy;
Mintz, Yuvalbbe3f232017-06-04 13:31:03 +03002028 vf_params.qid_usage_idx = qid_usage_idx;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002029 p_cid = qed_eth_queue_to_cid(p_hwfn, vf->opaque_fid,
2030 &params, true, &vf_params);
2031 if (!p_cid)
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002032 goto out;
2033
Yuval Mintza044df82016-08-22 13:25:09 +03002034 /* Legacy VFs have their Producers in a different location, which they
2035 * calculate on their own and clean the producer prior to this.
2036 */
Mintz, Yuval3b19f472017-06-04 13:31:04 +03002037 if (!(vf_legacy & QED_QCID_LEGACY_VF_RX_PROD))
Yuval Mintza044df82016-08-22 13:25:09 +03002038 REG_WR(p_hwfn,
2039 GTT_BAR0_MAP_REG_MSDM_RAM +
2040 MSTORM_ETH_VF_PRODS_OFFSET(vf->abs_vf_id, req->rx_qid),
2041 0);
Yuval Mintza044df82016-08-22 13:25:09 +03002042
Mintz, Yuval007bc372017-06-04 13:31:05 +03002043 rc = qed_eth_rxq_start_ramrod(p_hwfn, p_cid,
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002044 req->bd_max_bytes,
2045 req->rxq_addr,
2046 req->cqe_pbl_addr, req->cqe_pbl_size);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002047 if (rc) {
2048 status = PFVF_STATUS_FAILURE;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002049 qed_eth_queue_cid_release(p_hwfn, p_cid);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002050 } else {
Mintz, Yuval007bc372017-06-04 13:31:05 +03002051 p_queue->cids[qid_usage_idx].p_cid = p_cid;
2052 p_queue->cids[qid_usage_idx].b_is_tx = false;
Yuval Mintz41086462016-06-05 13:11:13 +03002053 status = PFVF_STATUS_SUCCESS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002054 vf->num_active_rxqs++;
2055 }
2056
Yuval Mintz41086462016-06-05 13:11:13 +03002057out:
Mintz, Yuval3b19f472017-06-04 13:31:04 +03002058 qed_iov_vf_mbx_start_rxq_resp(p_hwfn, p_ptt, vf, status,
2059 !!(vf_legacy &
2060 QED_QCID_LEGACY_VF_RX_PROD));
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002061}
2062
Chopra, Manisheaf3c0c2017-04-24 10:00:49 -07002063static void
2064qed_iov_pf_update_tun_response(struct pfvf_update_tunn_param_tlv *p_resp,
2065 struct qed_tunnel_info *p_tun,
2066 u16 tunn_feature_mask)
2067{
2068 p_resp->tunn_feature_mask = tunn_feature_mask;
2069 p_resp->vxlan_mode = p_tun->vxlan.b_mode_enabled;
2070 p_resp->l2geneve_mode = p_tun->l2_geneve.b_mode_enabled;
2071 p_resp->ipgeneve_mode = p_tun->ip_geneve.b_mode_enabled;
2072 p_resp->l2gre_mode = p_tun->l2_gre.b_mode_enabled;
2073 p_resp->ipgre_mode = p_tun->l2_gre.b_mode_enabled;
2074 p_resp->vxlan_clss = p_tun->vxlan.tun_cls;
2075 p_resp->l2gre_clss = p_tun->l2_gre.tun_cls;
2076 p_resp->ipgre_clss = p_tun->ip_gre.tun_cls;
2077 p_resp->l2geneve_clss = p_tun->l2_geneve.tun_cls;
2078 p_resp->ipgeneve_clss = p_tun->ip_geneve.tun_cls;
2079 p_resp->geneve_udp_port = p_tun->geneve_port.port;
2080 p_resp->vxlan_udp_port = p_tun->vxlan_port.port;
2081}
2082
2083static void
2084__qed_iov_pf_update_tun_param(struct vfpf_update_tunn_param_tlv *p_req,
2085 struct qed_tunn_update_type *p_tun,
2086 enum qed_tunn_mode mask, u8 tun_cls)
2087{
2088 if (p_req->tun_mode_update_mask & BIT(mask)) {
2089 p_tun->b_update_mode = true;
2090
2091 if (p_req->tunn_mode & BIT(mask))
2092 p_tun->b_mode_enabled = true;
2093 }
2094
2095 p_tun->tun_cls = tun_cls;
2096}
2097
2098static void
2099qed_iov_pf_update_tun_param(struct vfpf_update_tunn_param_tlv *p_req,
2100 struct qed_tunn_update_type *p_tun,
2101 struct qed_tunn_update_udp_port *p_port,
2102 enum qed_tunn_mode mask,
2103 u8 tun_cls, u8 update_port, u16 port)
2104{
2105 if (update_port) {
2106 p_port->b_update_port = true;
2107 p_port->port = port;
2108 }
2109
2110 __qed_iov_pf_update_tun_param(p_req, p_tun, mask, tun_cls);
2111}
2112
2113static bool
2114qed_iov_pf_validate_tunn_param(struct vfpf_update_tunn_param_tlv *p_req)
2115{
2116 bool b_update_requested = false;
2117
2118 if (p_req->tun_mode_update_mask || p_req->update_tun_cls ||
2119 p_req->update_geneve_port || p_req->update_vxlan_port)
2120 b_update_requested = true;
2121
2122 return b_update_requested;
2123}
2124
2125static void qed_pf_validate_tunn_mode(struct qed_tunn_update_type *tun, int *rc)
2126{
2127 if (tun->b_update_mode && !tun->b_mode_enabled) {
2128 tun->b_update_mode = false;
2129 *rc = -EINVAL;
2130 }
2131}
2132
2133static int
2134qed_pf_validate_modify_tunn_config(struct qed_hwfn *p_hwfn,
2135 u16 *tun_features, bool *update,
2136 struct qed_tunnel_info *tun_src)
2137{
2138 struct qed_eth_cb_ops *ops = p_hwfn->cdev->protocol_ops.eth;
2139 struct qed_tunnel_info *tun = &p_hwfn->cdev->tunnel;
2140 u16 bultn_vxlan_port, bultn_geneve_port;
2141 void *cookie = p_hwfn->cdev->ops_cookie;
2142 int i, rc = 0;
2143
2144 *tun_features = p_hwfn->cdev->tunn_feature_mask;
2145 bultn_vxlan_port = tun->vxlan_port.port;
2146 bultn_geneve_port = tun->geneve_port.port;
2147 qed_pf_validate_tunn_mode(&tun_src->vxlan, &rc);
2148 qed_pf_validate_tunn_mode(&tun_src->l2_geneve, &rc);
2149 qed_pf_validate_tunn_mode(&tun_src->ip_geneve, &rc);
2150 qed_pf_validate_tunn_mode(&tun_src->l2_gre, &rc);
2151 qed_pf_validate_tunn_mode(&tun_src->ip_gre, &rc);
2152
2153 if ((tun_src->b_update_rx_cls || tun_src->b_update_tx_cls) &&
2154 (tun_src->vxlan.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2155 tun_src->l2_geneve.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2156 tun_src->ip_geneve.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2157 tun_src->l2_gre.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2158 tun_src->ip_gre.tun_cls != QED_TUNN_CLSS_MAC_VLAN)) {
2159 tun_src->b_update_rx_cls = false;
2160 tun_src->b_update_tx_cls = false;
2161 rc = -EINVAL;
2162 }
2163
2164 if (tun_src->vxlan_port.b_update_port) {
2165 if (tun_src->vxlan_port.port == tun->vxlan_port.port) {
2166 tun_src->vxlan_port.b_update_port = false;
2167 } else {
2168 *update = true;
2169 bultn_vxlan_port = tun_src->vxlan_port.port;
2170 }
2171 }
2172
2173 if (tun_src->geneve_port.b_update_port) {
2174 if (tun_src->geneve_port.port == tun->geneve_port.port) {
2175 tun_src->geneve_port.b_update_port = false;
2176 } else {
2177 *update = true;
2178 bultn_geneve_port = tun_src->geneve_port.port;
2179 }
2180 }
2181
2182 qed_for_each_vf(p_hwfn, i) {
2183 qed_iov_bulletin_set_udp_ports(p_hwfn, i, bultn_vxlan_port,
2184 bultn_geneve_port);
2185 }
2186
2187 qed_schedule_iov(p_hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
2188 ops->ports_update(cookie, bultn_vxlan_port, bultn_geneve_port);
2189
2190 return rc;
2191}
2192
2193static void qed_iov_vf_mbx_update_tunn_param(struct qed_hwfn *p_hwfn,
2194 struct qed_ptt *p_ptt,
2195 struct qed_vf_info *p_vf)
2196{
2197 struct qed_tunnel_info *p_tun = &p_hwfn->cdev->tunnel;
2198 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
2199 struct pfvf_update_tunn_param_tlv *p_resp;
2200 struct vfpf_update_tunn_param_tlv *p_req;
2201 u8 status = PFVF_STATUS_SUCCESS;
2202 bool b_update_required = false;
2203 struct qed_tunnel_info tunn;
2204 u16 tunn_feature_mask = 0;
2205 int i, rc = 0;
2206
2207 mbx->offset = (u8 *)mbx->reply_virt;
2208
2209 memset(&tunn, 0, sizeof(tunn));
2210 p_req = &mbx->req_virt->tunn_param_update;
2211
2212 if (!qed_iov_pf_validate_tunn_param(p_req)) {
2213 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2214 "No tunnel update requested by VF\n");
2215 status = PFVF_STATUS_FAILURE;
2216 goto send_resp;
2217 }
2218
2219 tunn.b_update_rx_cls = p_req->update_tun_cls;
2220 tunn.b_update_tx_cls = p_req->update_tun_cls;
2221
2222 qed_iov_pf_update_tun_param(p_req, &tunn.vxlan, &tunn.vxlan_port,
2223 QED_MODE_VXLAN_TUNN, p_req->vxlan_clss,
2224 p_req->update_vxlan_port,
2225 p_req->vxlan_port);
2226 qed_iov_pf_update_tun_param(p_req, &tunn.l2_geneve, &tunn.geneve_port,
2227 QED_MODE_L2GENEVE_TUNN,
2228 p_req->l2geneve_clss,
2229 p_req->update_geneve_port,
2230 p_req->geneve_port);
2231 __qed_iov_pf_update_tun_param(p_req, &tunn.ip_geneve,
2232 QED_MODE_IPGENEVE_TUNN,
2233 p_req->ipgeneve_clss);
2234 __qed_iov_pf_update_tun_param(p_req, &tunn.l2_gre,
2235 QED_MODE_L2GRE_TUNN, p_req->l2gre_clss);
2236 __qed_iov_pf_update_tun_param(p_req, &tunn.ip_gre,
2237 QED_MODE_IPGRE_TUNN, p_req->ipgre_clss);
2238
2239 /* If PF modifies VF's req then it should
2240 * still return an error in case of partial configuration
2241 * or modified configuration as opposed to requested one.
2242 */
2243 rc = qed_pf_validate_modify_tunn_config(p_hwfn, &tunn_feature_mask,
2244 &b_update_required, &tunn);
2245
2246 if (rc)
2247 status = PFVF_STATUS_FAILURE;
2248
2249 /* If QED client is willing to update anything ? */
2250 if (b_update_required) {
2251 u16 geneve_port;
2252
Manish Chopra4f646752017-05-23 09:41:20 +03002253 rc = qed_sp_pf_update_tunn_cfg(p_hwfn, p_ptt, &tunn,
Chopra, Manisheaf3c0c2017-04-24 10:00:49 -07002254 QED_SPQ_MODE_EBLOCK, NULL);
2255 if (rc)
2256 status = PFVF_STATUS_FAILURE;
2257
2258 geneve_port = p_tun->geneve_port.port;
2259 qed_for_each_vf(p_hwfn, i) {
2260 qed_iov_bulletin_set_udp_ports(p_hwfn, i,
2261 p_tun->vxlan_port.port,
2262 geneve_port);
2263 }
2264 }
2265
2266send_resp:
2267 p_resp = qed_add_tlv(p_hwfn, &mbx->offset,
2268 CHANNEL_TLV_UPDATE_TUNN_PARAM, sizeof(*p_resp));
2269
2270 qed_iov_pf_update_tun_response(p_resp, p_tun, tunn_feature_mask);
2271 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
2272 sizeof(struct channel_list_end_tlv));
2273
2274 qed_iov_send_response(p_hwfn, p_ptt, p_vf, sizeof(*p_resp), status);
2275}
2276
Yuval Mintz5040acf2016-06-05 13:11:14 +03002277static void qed_iov_vf_mbx_start_txq_resp(struct qed_hwfn *p_hwfn,
2278 struct qed_ptt *p_ptt,
Mintz, Yuval007bc372017-06-04 13:31:05 +03002279 struct qed_vf_info *p_vf,
2280 u32 cid, u8 status)
Yuval Mintz5040acf2016-06-05 13:11:14 +03002281{
2282 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
2283 struct pfvf_start_queue_resp_tlv *p_tlv;
Yuval Mintza044df82016-08-22 13:25:09 +03002284 bool b_legacy = false;
2285 u16 length;
Yuval Mintz5040acf2016-06-05 13:11:14 +03002286
2287 mbx->offset = (u8 *)mbx->reply_virt;
2288
Yuval Mintza044df82016-08-22 13:25:09 +03002289 /* Taking a bigger struct instead of adding a TLV to list was a
2290 * mistake, but one which we're now stuck with, as some older
2291 * clients assume the size of the previous response.
2292 */
2293 if (p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
2294 ETH_HSI_VER_NO_PKT_LEN_TUNN)
2295 b_legacy = true;
2296
2297 if (!b_legacy)
2298 length = sizeof(*p_tlv);
2299 else
2300 length = sizeof(struct pfvf_def_resp_tlv);
2301
Yuval Mintz5040acf2016-06-05 13:11:14 +03002302 p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_TXQ,
Yuval Mintza044df82016-08-22 13:25:09 +03002303 length);
Yuval Mintz5040acf2016-06-05 13:11:14 +03002304 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
2305 sizeof(struct channel_list_end_tlv));
2306
2307 /* Update the TLV with the response */
Mintz, Yuval007bc372017-06-04 13:31:05 +03002308 if ((status == PFVF_STATUS_SUCCESS) && !b_legacy)
2309 p_tlv->offset = qed_db_addr_vf(cid, DQ_DEMS_LEGACY);
Yuval Mintz5040acf2016-06-05 13:11:14 +03002310
Yuval Mintza044df82016-08-22 13:25:09 +03002311 qed_iov_send_response(p_hwfn, p_ptt, p_vf, length, status);
Yuval Mintz5040acf2016-06-05 13:11:14 +03002312}
2313
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002314static void qed_iov_vf_mbx_start_txq(struct qed_hwfn *p_hwfn,
2315 struct qed_ptt *p_ptt,
2316 struct qed_vf_info *vf)
2317{
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002318 struct qed_queue_start_common_params params;
Mintz, Yuval39464972017-06-04 13:31:02 +03002319 struct qed_queue_cid_vf_params vf_params;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002320 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Yuval Mintz41086462016-06-05 13:11:13 +03002321 u8 status = PFVF_STATUS_NO_RESOURCE;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002322 struct vfpf_start_txq_tlv *req;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002323 struct qed_vf_queue *p_queue;
2324 struct qed_queue_cid *p_cid;
Mintz, Yuvalf604b172017-06-04 13:31:01 +03002325 struct qed_sb_info sb_dummy;
Mintz, Yuval3b19f472017-06-04 13:31:04 +03002326 u8 qid_usage_idx, vf_legacy;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002327 u32 cid = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002328 int rc;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002329 u16 pq;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002330
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002331 memset(&params, 0, sizeof(params));
2332 req = &mbx->req_virt->start_txq;
Yuval Mintz41086462016-06-05 13:11:13 +03002333
Mintz, Yuvalf109c242017-03-19 13:08:16 +02002334 if (!qed_iov_validate_txq(p_hwfn, vf, req->tx_qid,
2335 QED_IOV_VALIDATE_Q_DISABLE) ||
Yuval Mintz41086462016-06-05 13:11:13 +03002336 !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
2337 goto out;
2338
Mintz, Yuvalbbe3f232017-06-04 13:31:03 +03002339 qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, true);
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002340 p_queue = &vf->vf_queues[req->tx_qid];
2341
Mintz, Yuval3b19f472017-06-04 13:31:04 +03002342 vf_legacy = qed_vf_calculate_legacy(vf);
Mintz, Yuval39464972017-06-04 13:31:02 +03002343
Mintz, Yuvalbbe3f232017-06-04 13:31:03 +03002344 /* Acquire a new queue-cid */
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002345 params.queue_id = p_queue->fw_tx_qid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002346 params.vport_id = vf->vport_id;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002347 params.stats_id = vf->abs_vf_id + 0x10;
Mintz, Yuvalf604b172017-06-04 13:31:01 +03002348
2349 /* Since IGU index is passed via sb_info, construct a dummy one */
2350 memset(&sb_dummy, 0, sizeof(sb_dummy));
2351 sb_dummy.igu_sb_id = req->hw_sb;
2352 params.p_sb = &sb_dummy;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002353 params.sb_idx = req->sb_index;
2354
Mintz, Yuval39464972017-06-04 13:31:02 +03002355 memset(&vf_params, 0, sizeof(vf_params));
2356 vf_params.vfid = vf->relative_vf_id;
2357 vf_params.vf_qid = (u8)req->tx_qid;
Mintz, Yuval3b19f472017-06-04 13:31:04 +03002358 vf_params.vf_legacy = vf_legacy;
Mintz, Yuvalbbe3f232017-06-04 13:31:03 +03002359 vf_params.qid_usage_idx = qid_usage_idx;
Mintz, Yuval39464972017-06-04 13:31:02 +03002360
Mintz, Yuval007bc372017-06-04 13:31:05 +03002361 p_cid = qed_eth_queue_to_cid(p_hwfn, vf->opaque_fid,
2362 &params, false, &vf_params);
2363 if (!p_cid)
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002364 goto out;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002365
Ariel Eliorb5a9ee72017-04-03 12:21:09 +03002366 pq = qed_get_cm_pq_idx_vf(p_hwfn, vf->relative_vf_id);
Mintz, Yuval007bc372017-06-04 13:31:05 +03002367 rc = qed_eth_txq_start_ramrod(p_hwfn, p_cid,
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002368 req->pbl_addr, req->pbl_size, pq);
Yuval Mintz41086462016-06-05 13:11:13 +03002369 if (rc) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002370 status = PFVF_STATUS_FAILURE;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002371 qed_eth_queue_cid_release(p_hwfn, p_cid);
Yuval Mintz41086462016-06-05 13:11:13 +03002372 } else {
2373 status = PFVF_STATUS_SUCCESS;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002374 p_queue->cids[qid_usage_idx].p_cid = p_cid;
2375 p_queue->cids[qid_usage_idx].b_is_tx = true;
2376 cid = p_cid->cid;
Yuval Mintz41086462016-06-05 13:11:13 +03002377 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002378
Yuval Mintz41086462016-06-05 13:11:13 +03002379out:
Mintz, Yuval007bc372017-06-04 13:31:05 +03002380 qed_iov_vf_mbx_start_txq_resp(p_hwfn, p_ptt, vf, cid, status);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002381}
2382
2383static int qed_iov_vf_stop_rxqs(struct qed_hwfn *p_hwfn,
2384 struct qed_vf_info *vf,
Mintz, Yuval007bc372017-06-04 13:31:05 +03002385 u16 rxq_id,
2386 u8 qid_usage_idx, bool cqe_completion)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002387{
Mintz, Yuval007bc372017-06-04 13:31:05 +03002388 struct qed_vf_queue *p_queue;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002389 int rc = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002390
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002391 if (!qed_iov_validate_rxq(p_hwfn, vf, rxq_id,
2392 QED_IOV_VALIDATE_Q_ENABLE)) {
2393 DP_VERBOSE(p_hwfn,
2394 QED_MSG_IOV,
2395 "VF[%d] Tried Closing Rx 0x%04x which is inactive\n",
2396 vf->relative_vf_id, rxq_id);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002397 return -EINVAL;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002398 }
2399
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002400 p_queue = &vf->vf_queues[rxq_id];
2401
2402 rc = qed_eth_rx_queue_stop(p_hwfn,
Mintz, Yuval007bc372017-06-04 13:31:05 +03002403 p_queue->cids[qid_usage_idx].p_cid,
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002404 false, cqe_completion);
2405 if (rc)
2406 return rc;
2407
Mintz, Yuval007bc372017-06-04 13:31:05 +03002408 p_queue->cids[qid_usage_idx].p_cid = NULL;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002409 vf->num_active_rxqs--;
2410
2411 return 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002412}
2413
2414static int qed_iov_vf_stop_txqs(struct qed_hwfn *p_hwfn,
Mintz, Yuval007bc372017-06-04 13:31:05 +03002415 struct qed_vf_info *vf,
2416 u16 txq_id, u8 qid_usage_idx)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002417{
Mintz, Yuval007bc372017-06-04 13:31:05 +03002418 struct qed_vf_queue *p_queue;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002419 int rc = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002420
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002421 if (!qed_iov_validate_txq(p_hwfn, vf, txq_id,
2422 QED_IOV_VALIDATE_Q_ENABLE))
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002423 return -EINVAL;
2424
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002425 p_queue = &vf->vf_queues[txq_id];
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002426
Mintz, Yuval007bc372017-06-04 13:31:05 +03002427 rc = qed_eth_tx_queue_stop(p_hwfn, p_queue->cids[qid_usage_idx].p_cid);
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002428 if (rc)
2429 return rc;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002430
Mintz, Yuval007bc372017-06-04 13:31:05 +03002431 p_queue->cids[qid_usage_idx].p_cid = NULL;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002432 return 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002433}
2434
2435static void qed_iov_vf_mbx_stop_rxqs(struct qed_hwfn *p_hwfn,
2436 struct qed_ptt *p_ptt,
2437 struct qed_vf_info *vf)
2438{
2439 u16 length = sizeof(struct pfvf_def_resp_tlv);
2440 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002441 u8 status = PFVF_STATUS_FAILURE;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002442 struct vfpf_stop_rxqs_tlv *req;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002443 u8 qid_usage_idx;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002444 int rc;
2445
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002446 /* There has never been an official driver that used this interface
2447 * for stopping multiple queues, and it is now considered deprecated.
2448 * Validate this isn't used here.
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002449 */
2450 req = &mbx->req_virt->stop_rxqs;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002451 if (req->num_rxqs != 1) {
2452 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2453 "Odd; VF[%d] tried stopping multiple Rx queues\n",
2454 vf->relative_vf_id);
2455 status = PFVF_STATUS_NOT_SUPPORTED;
2456 goto out;
2457 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002458
Mintz, Yuval007bc372017-06-04 13:31:05 +03002459 /* Find which qid-index is associated with the queue */
2460 qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, false);
2461
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002462 rc = qed_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid,
Mintz, Yuval007bc372017-06-04 13:31:05 +03002463 qid_usage_idx, req->cqe_completion);
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002464 if (!rc)
2465 status = PFVF_STATUS_SUCCESS;
2466out:
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002467 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS,
2468 length, status);
2469}
2470
2471static void qed_iov_vf_mbx_stop_txqs(struct qed_hwfn *p_hwfn,
2472 struct qed_ptt *p_ptt,
2473 struct qed_vf_info *vf)
2474{
2475 u16 length = sizeof(struct pfvf_def_resp_tlv);
2476 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002477 u8 status = PFVF_STATUS_FAILURE;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002478 struct vfpf_stop_txqs_tlv *req;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002479 u8 qid_usage_idx;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002480 int rc;
2481
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002482 /* There has never been an official driver that used this interface
2483 * for stopping multiple queues, and it is now considered deprecated.
2484 * Validate this isn't used here.
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002485 */
2486 req = &mbx->req_virt->stop_txqs;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002487 if (req->num_txqs != 1) {
2488 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2489 "Odd; VF[%d] tried stopping multiple Tx queues\n",
2490 vf->relative_vf_id);
2491 status = PFVF_STATUS_NOT_SUPPORTED;
2492 goto out;
2493 }
Mintz, Yuval007bc372017-06-04 13:31:05 +03002494
2495 /* Find which qid-index is associated with the queue */
2496 qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, true);
2497
2498 rc = qed_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid, qid_usage_idx);
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002499 if (!rc)
2500 status = PFVF_STATUS_SUCCESS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002501
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002502out:
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002503 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS,
2504 length, status);
2505}
2506
Yuval Mintz17b235c2016-05-11 16:36:18 +03002507static void qed_iov_vf_mbx_update_rxqs(struct qed_hwfn *p_hwfn,
2508 struct qed_ptt *p_ptt,
2509 struct qed_vf_info *vf)
2510{
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002511 struct qed_queue_cid *handlers[QED_MAX_VF_CHAINS_PER_PF];
Yuval Mintz17b235c2016-05-11 16:36:18 +03002512 u16 length = sizeof(struct pfvf_def_resp_tlv);
2513 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2514 struct vfpf_update_rxq_tlv *req;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002515 u8 status = PFVF_STATUS_FAILURE;
Yuval Mintz17b235c2016-05-11 16:36:18 +03002516 u8 complete_event_flg;
2517 u8 complete_cqe_flg;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002518 u8 qid_usage_idx;
Yuval Mintz17b235c2016-05-11 16:36:18 +03002519 int rc;
2520 u8 i;
2521
2522 req = &mbx->req_virt->update_rxq;
2523 complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG);
2524 complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG);
2525
Mintz, Yuval007bc372017-06-04 13:31:05 +03002526 qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, false);
2527
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002528 /* Validate inputs */
Mintz, Yuvalf109c242017-03-19 13:08:16 +02002529 for (i = req->rx_qid; i < req->rx_qid + req->num_rxqs; i++)
2530 if (!qed_iov_validate_rxq(p_hwfn, vf, i,
2531 QED_IOV_VALIDATE_Q_ENABLE)) {
2532 DP_INFO(p_hwfn, "VF[%d]: Incorrect Rxqs [%04x, %02x]\n",
2533 vf->relative_vf_id, req->rx_qid, req->num_rxqs);
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002534 goto out;
2535 }
2536
Mintz, Yuvalf109c242017-03-19 13:08:16 +02002537 /* Prepare the handlers */
2538 for (i = 0; i < req->num_rxqs; i++) {
Mintz, Yuval007bc372017-06-04 13:31:05 +03002539 u16 qid = req->rx_qid + i;
2540
2541 handlers[i] = vf->vf_queues[qid].cids[qid_usage_idx].p_cid;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002542 }
2543
2544 rc = qed_sp_eth_rx_queues_update(p_hwfn, (void **)&handlers,
2545 req->num_rxqs,
2546 complete_cqe_flg,
2547 complete_event_flg,
2548 QED_SPQ_MODE_EBLOCK, NULL);
2549 if (rc)
2550 goto out;
2551
2552 status = PFVF_STATUS_SUCCESS;
2553out:
Yuval Mintz17b235c2016-05-11 16:36:18 +03002554 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ,
2555 length, status);
2556}
2557
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002558void *qed_iov_search_list_tlvs(struct qed_hwfn *p_hwfn,
2559 void *p_tlvs_list, u16 req_type)
2560{
2561 struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list;
2562 int len = 0;
2563
2564 do {
2565 if (!p_tlv->length) {
2566 DP_NOTICE(p_hwfn, "Zero length TLV found\n");
2567 return NULL;
2568 }
2569
2570 if (p_tlv->type == req_type) {
2571 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2572 "Extended tlv type %d, length %d found\n",
2573 p_tlv->type, p_tlv->length);
2574 return p_tlv;
2575 }
2576
2577 len += p_tlv->length;
2578 p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length);
2579
2580 if ((len + p_tlv->length) > TLV_BUFFER_SIZE) {
2581 DP_NOTICE(p_hwfn, "TLVs has overrun the buffer size\n");
2582 return NULL;
2583 }
2584 } while (p_tlv->type != CHANNEL_TLV_LIST_END);
2585
2586 return NULL;
2587}
2588
2589static void
2590qed_iov_vp_update_act_param(struct qed_hwfn *p_hwfn,
2591 struct qed_sp_vport_update_params *p_data,
2592 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2593{
2594 struct vfpf_vport_update_activate_tlv *p_act_tlv;
2595 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
2596
2597 p_act_tlv = (struct vfpf_vport_update_activate_tlv *)
2598 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2599 if (!p_act_tlv)
2600 return;
2601
2602 p_data->update_vport_active_rx_flg = p_act_tlv->update_rx;
2603 p_data->vport_active_rx_flg = p_act_tlv->active_rx;
2604 p_data->update_vport_active_tx_flg = p_act_tlv->update_tx;
2605 p_data->vport_active_tx_flg = p_act_tlv->active_tx;
2606 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACTIVATE;
2607}
2608
2609static void
Yuval Mintz17b235c2016-05-11 16:36:18 +03002610qed_iov_vp_update_vlan_param(struct qed_hwfn *p_hwfn,
2611 struct qed_sp_vport_update_params *p_data,
2612 struct qed_vf_info *p_vf,
2613 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2614{
2615 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
2616 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
2617
2618 p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *)
2619 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2620 if (!p_vlan_tlv)
2621 return;
2622
Yuval Mintz08feecd2016-05-11 16:36:20 +03002623 p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan;
2624
2625 /* Ignore the VF request if we're forcing a vlan */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002626 if (!(p_vf->configured_features & BIT(VLAN_ADDR_FORCED))) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03002627 p_data->update_inner_vlan_removal_flg = 1;
2628 p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan;
2629 }
Yuval Mintz17b235c2016-05-11 16:36:18 +03002630
2631 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_VLAN_STRIP;
2632}
2633
2634static void
2635qed_iov_vp_update_tx_switch(struct qed_hwfn *p_hwfn,
2636 struct qed_sp_vport_update_params *p_data,
2637 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2638{
2639 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
2640 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
2641
2642 p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *)
2643 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
2644 tlv);
2645 if (!p_tx_switch_tlv)
2646 return;
2647
2648 p_data->update_tx_switching_flg = 1;
2649 p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching;
2650 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_TX_SWITCH;
2651}
2652
2653static void
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002654qed_iov_vp_update_mcast_bin_param(struct qed_hwfn *p_hwfn,
2655 struct qed_sp_vport_update_params *p_data,
2656 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2657{
2658 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
2659 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
2660
2661 p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *)
2662 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2663 if (!p_mcast_tlv)
2664 return;
2665
2666 p_data->update_approx_mcast_flg = 1;
2667 memcpy(p_data->bins, p_mcast_tlv->bins,
2668 sizeof(unsigned long) * ETH_MULTICAST_MAC_BINS_IN_REGS);
2669 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_MCAST;
2670}
2671
2672static void
2673qed_iov_vp_update_accept_flag(struct qed_hwfn *p_hwfn,
2674 struct qed_sp_vport_update_params *p_data,
2675 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2676{
2677 struct qed_filter_accept_flags *p_flags = &p_data->accept_flags;
2678 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
2679 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
2680
2681 p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *)
2682 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2683 if (!p_accept_tlv)
2684 return;
2685
2686 p_flags->update_rx_mode_config = p_accept_tlv->update_rx_mode;
2687 p_flags->rx_accept_filter = p_accept_tlv->rx_accept_filter;
2688 p_flags->update_tx_mode_config = p_accept_tlv->update_tx_mode;
2689 p_flags->tx_accept_filter = p_accept_tlv->tx_accept_filter;
2690 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_PARAM;
2691}
2692
2693static void
Yuval Mintz17b235c2016-05-11 16:36:18 +03002694qed_iov_vp_update_accept_any_vlan(struct qed_hwfn *p_hwfn,
2695 struct qed_sp_vport_update_params *p_data,
2696 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2697{
2698 struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan;
2699 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
2700
2701 p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *)
2702 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
2703 tlv);
2704 if (!p_accept_any_vlan)
2705 return;
2706
2707 p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan;
2708 p_data->update_accept_any_vlan_flg =
2709 p_accept_any_vlan->update_accept_any_vlan_flg;
2710 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN;
2711}
2712
2713static void
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002714qed_iov_vp_update_rss_param(struct qed_hwfn *p_hwfn,
2715 struct qed_vf_info *vf,
2716 struct qed_sp_vport_update_params *p_data,
2717 struct qed_rss_params *p_rss,
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002718 struct qed_iov_vf_mbx *p_mbx,
2719 u16 *tlvs_mask, u16 *tlvs_accepted)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002720{
2721 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
2722 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002723 bool b_reject = false;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002724 u16 table_size;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002725 u16 i, q_idx;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002726
2727 p_rss_tlv = (struct vfpf_vport_update_rss_tlv *)
2728 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2729 if (!p_rss_tlv) {
2730 p_data->rss_params = NULL;
2731 return;
2732 }
2733
2734 memset(p_rss, 0, sizeof(struct qed_rss_params));
2735
2736 p_rss->update_rss_config = !!(p_rss_tlv->update_rss_flags &
2737 VFPF_UPDATE_RSS_CONFIG_FLAG);
2738 p_rss->update_rss_capabilities = !!(p_rss_tlv->update_rss_flags &
2739 VFPF_UPDATE_RSS_CAPS_FLAG);
2740 p_rss->update_rss_ind_table = !!(p_rss_tlv->update_rss_flags &
2741 VFPF_UPDATE_RSS_IND_TABLE_FLAG);
2742 p_rss->update_rss_key = !!(p_rss_tlv->update_rss_flags &
2743 VFPF_UPDATE_RSS_KEY_FLAG);
2744
2745 p_rss->rss_enable = p_rss_tlv->rss_enable;
2746 p_rss->rss_eng_id = vf->relative_vf_id + 1;
2747 p_rss->rss_caps = p_rss_tlv->rss_caps;
2748 p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002749 memcpy(p_rss->rss_key, p_rss_tlv->rss_key, sizeof(p_rss->rss_key));
2750
2751 table_size = min_t(u16, ARRAY_SIZE(p_rss->rss_ind_table),
2752 (1 << p_rss_tlv->rss_table_size_log));
2753
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002754 for (i = 0; i < table_size; i++) {
Mintz, Yuval007bc372017-06-04 13:31:05 +03002755 struct qed_queue_cid *p_cid;
2756
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002757 q_idx = p_rss_tlv->rss_ind_table[i];
Mintz, Yuvalf109c242017-03-19 13:08:16 +02002758 if (!qed_iov_validate_rxq(p_hwfn, vf, q_idx,
2759 QED_IOV_VALIDATE_Q_ENABLE)) {
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002760 DP_VERBOSE(p_hwfn,
2761 QED_MSG_IOV,
2762 "VF[%d]: Omitting RSS due to wrong queue %04x\n",
2763 vf->relative_vf_id, q_idx);
2764 b_reject = true;
2765 goto out;
2766 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002767
Mintz, Yuval007bc372017-06-04 13:31:05 +03002768 p_cid = qed_iov_get_vf_rx_queue_cid(&vf->vf_queues[q_idx]);
2769 p_rss->rss_ind_table[i] = p_cid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002770 }
2771
2772 p_data->rss_params = p_rss;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002773out:
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002774 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_RSS;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002775 if (!b_reject)
2776 *tlvs_accepted |= 1 << QED_IOV_VP_UPDATE_RSS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002777}
2778
Yuval Mintz17b235c2016-05-11 16:36:18 +03002779static void
2780qed_iov_vp_update_sge_tpa_param(struct qed_hwfn *p_hwfn,
2781 struct qed_vf_info *vf,
2782 struct qed_sp_vport_update_params *p_data,
2783 struct qed_sge_tpa_params *p_sge_tpa,
2784 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2785{
2786 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
2787 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
2788
2789 p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *)
2790 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2791
2792 if (!p_sge_tpa_tlv) {
2793 p_data->sge_tpa_params = NULL;
2794 return;
2795 }
2796
2797 memset(p_sge_tpa, 0, sizeof(struct qed_sge_tpa_params));
2798
2799 p_sge_tpa->update_tpa_en_flg =
2800 !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG);
2801 p_sge_tpa->update_tpa_param_flg =
2802 !!(p_sge_tpa_tlv->update_sge_tpa_flags &
2803 VFPF_UPDATE_TPA_PARAM_FLAG);
2804
2805 p_sge_tpa->tpa_ipv4_en_flg =
2806 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG);
2807 p_sge_tpa->tpa_ipv6_en_flg =
2808 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG);
2809 p_sge_tpa->tpa_pkt_split_flg =
2810 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG);
2811 p_sge_tpa->tpa_hdr_data_split_flg =
2812 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG);
2813 p_sge_tpa->tpa_gro_consistent_flg =
2814 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG);
2815
2816 p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num;
2817 p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size;
2818 p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start;
2819 p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont;
2820 p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe;
2821
2822 p_data->sge_tpa_params = p_sge_tpa;
2823
2824 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_SGE_TPA;
2825}
2826
Mintz, Yuvalf990c822017-01-01 13:57:08 +02002827static int qed_iov_pre_update_vport(struct qed_hwfn *hwfn,
2828 u8 vfid,
2829 struct qed_sp_vport_update_params *params,
2830 u16 *tlvs)
2831{
2832 u8 mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED;
2833 struct qed_filter_accept_flags *flags = &params->accept_flags;
2834 struct qed_public_vf_info *vf_info;
2835
2836 /* Untrusted VFs can't even be trusted to know that fact.
2837 * Simply indicate everything is configured fine, and trace
2838 * configuration 'behind their back'.
2839 */
2840 if (!(*tlvs & BIT(QED_IOV_VP_UPDATE_ACCEPT_PARAM)))
2841 return 0;
2842
2843 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
2844
2845 if (flags->update_rx_mode_config) {
2846 vf_info->rx_accept_mode = flags->rx_accept_filter;
2847 if (!vf_info->is_trusted_configured)
2848 flags->rx_accept_filter &= ~mask;
2849 }
2850
2851 if (flags->update_tx_mode_config) {
2852 vf_info->tx_accept_mode = flags->tx_accept_filter;
2853 if (!vf_info->is_trusted_configured)
2854 flags->tx_accept_filter &= ~mask;
2855 }
2856
2857 return 0;
2858}
2859
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002860static void qed_iov_vf_mbx_vport_update(struct qed_hwfn *p_hwfn,
2861 struct qed_ptt *p_ptt,
2862 struct qed_vf_info *vf)
2863{
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002864 struct qed_rss_params *p_rss_params = NULL;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002865 struct qed_sp_vport_update_params params;
2866 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Yuval Mintz17b235c2016-05-11 16:36:18 +03002867 struct qed_sge_tpa_params sge_tpa_params;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002868 u16 tlvs_mask = 0, tlvs_accepted = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002869 u8 status = PFVF_STATUS_SUCCESS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002870 u16 length;
2871 int rc;
2872
Yuval Mintz41086462016-06-05 13:11:13 +03002873 /* Valiate PF can send such a request */
2874 if (!vf->vport_instance) {
2875 DP_VERBOSE(p_hwfn,
2876 QED_MSG_IOV,
2877 "No VPORT instance available for VF[%d], failing vport update\n",
2878 vf->abs_vf_id);
2879 status = PFVF_STATUS_FAILURE;
2880 goto out;
2881 }
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002882 p_rss_params = vzalloc(sizeof(*p_rss_params));
2883 if (p_rss_params == NULL) {
2884 status = PFVF_STATUS_FAILURE;
2885 goto out;
2886 }
Yuval Mintz41086462016-06-05 13:11:13 +03002887
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002888 memset(&params, 0, sizeof(params));
2889 params.opaque_fid = vf->opaque_fid;
2890 params.vport_id = vf->vport_id;
2891 params.rss_params = NULL;
2892
2893 /* Search for extended tlvs list and update values
2894 * from VF in struct qed_sp_vport_update_params.
2895 */
2896 qed_iov_vp_update_act_param(p_hwfn, &params, mbx, &tlvs_mask);
Yuval Mintz17b235c2016-05-11 16:36:18 +03002897 qed_iov_vp_update_vlan_param(p_hwfn, &params, vf, mbx, &tlvs_mask);
2898 qed_iov_vp_update_tx_switch(p_hwfn, &params, mbx, &tlvs_mask);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002899 qed_iov_vp_update_mcast_bin_param(p_hwfn, &params, mbx, &tlvs_mask);
2900 qed_iov_vp_update_accept_flag(p_hwfn, &params, mbx, &tlvs_mask);
Yuval Mintz17b235c2016-05-11 16:36:18 +03002901 qed_iov_vp_update_accept_any_vlan(p_hwfn, &params, mbx, &tlvs_mask);
2902 qed_iov_vp_update_sge_tpa_param(p_hwfn, vf, &params,
2903 &sge_tpa_params, mbx, &tlvs_mask);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002904
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002905 tlvs_accepted = tlvs_mask;
2906
2907 /* Some of the extended TLVs need to be validated first; In that case,
2908 * they can update the mask without updating the accepted [so that
2909 * PF could communicate to VF it has rejected request].
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002910 */
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002911 qed_iov_vp_update_rss_param(p_hwfn, vf, &params, p_rss_params,
2912 mbx, &tlvs_mask, &tlvs_accepted);
2913
Mintz, Yuvalf990c822017-01-01 13:57:08 +02002914 if (qed_iov_pre_update_vport(p_hwfn, vf->relative_vf_id,
2915 &params, &tlvs_accepted)) {
2916 tlvs_accepted = 0;
2917 status = PFVF_STATUS_NOT_SUPPORTED;
2918 goto out;
2919 }
2920
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002921 if (!tlvs_accepted) {
2922 if (tlvs_mask)
2923 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2924 "Upper-layer prevents VF vport configuration\n");
2925 else
2926 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2927 "No feature tlvs found for vport update\n");
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002928 status = PFVF_STATUS_NOT_SUPPORTED;
2929 goto out;
2930 }
2931
2932 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
2933
2934 if (rc)
2935 status = PFVF_STATUS_FAILURE;
2936
2937out:
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002938 vfree(p_rss_params);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002939 length = qed_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status,
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002940 tlvs_mask, tlvs_accepted);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002941 qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
2942}
2943
Yuval Mintz8246d0b2016-06-05 13:11:15 +03002944static int qed_iov_vf_update_vlan_shadow(struct qed_hwfn *p_hwfn,
2945 struct qed_vf_info *p_vf,
2946 struct qed_filter_ucast *p_params)
Yuval Mintz08feecd2016-05-11 16:36:20 +03002947{
2948 int i;
2949
Yuval Mintz08feecd2016-05-11 16:36:20 +03002950 /* First remove entries and then add new ones */
2951 if (p_params->opcode == QED_FILTER_REMOVE) {
2952 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2953 if (p_vf->shadow_config.vlans[i].used &&
2954 p_vf->shadow_config.vlans[i].vid ==
2955 p_params->vlan) {
2956 p_vf->shadow_config.vlans[i].used = false;
2957 break;
2958 }
2959 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
2960 DP_VERBOSE(p_hwfn,
2961 QED_MSG_IOV,
2962 "VF [%d] - Tries to remove a non-existing vlan\n",
2963 p_vf->relative_vf_id);
2964 return -EINVAL;
2965 }
2966 } else if (p_params->opcode == QED_FILTER_REPLACE ||
2967 p_params->opcode == QED_FILTER_FLUSH) {
2968 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2969 p_vf->shadow_config.vlans[i].used = false;
2970 }
2971
2972 /* In forced mode, we're willing to remove entries - but we don't add
2973 * new ones.
2974 */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002975 if (p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED))
Yuval Mintz08feecd2016-05-11 16:36:20 +03002976 return 0;
2977
2978 if (p_params->opcode == QED_FILTER_ADD ||
2979 p_params->opcode == QED_FILTER_REPLACE) {
2980 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
2981 if (p_vf->shadow_config.vlans[i].used)
2982 continue;
2983
2984 p_vf->shadow_config.vlans[i].used = true;
2985 p_vf->shadow_config.vlans[i].vid = p_params->vlan;
2986 break;
2987 }
2988
2989 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
2990 DP_VERBOSE(p_hwfn,
2991 QED_MSG_IOV,
2992 "VF [%d] - Tries to configure more than %d vlan filters\n",
2993 p_vf->relative_vf_id,
2994 QED_ETH_VF_NUM_VLAN_FILTERS + 1);
2995 return -EINVAL;
2996 }
2997 }
2998
2999 return 0;
3000}
3001
Yuval Mintz8246d0b2016-06-05 13:11:15 +03003002static int qed_iov_vf_update_mac_shadow(struct qed_hwfn *p_hwfn,
3003 struct qed_vf_info *p_vf,
3004 struct qed_filter_ucast *p_params)
3005{
3006 int i;
3007
3008 /* If we're in forced-mode, we don't allow any change */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003009 if (p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED))
Yuval Mintz8246d0b2016-06-05 13:11:15 +03003010 return 0;
3011
3012 /* First remove entries and then add new ones */
3013 if (p_params->opcode == QED_FILTER_REMOVE) {
3014 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
3015 if (ether_addr_equal(p_vf->shadow_config.macs[i],
3016 p_params->mac)) {
Shyam Saini0ee28e32017-01-17 07:35:04 +05303017 eth_zero_addr(p_vf->shadow_config.macs[i]);
Yuval Mintz8246d0b2016-06-05 13:11:15 +03003018 break;
3019 }
3020 }
3021
3022 if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
3023 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3024 "MAC isn't configured\n");
3025 return -EINVAL;
3026 }
3027 } else if (p_params->opcode == QED_FILTER_REPLACE ||
3028 p_params->opcode == QED_FILTER_FLUSH) {
3029 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++)
Shyam Saini0ee28e32017-01-17 07:35:04 +05303030 eth_zero_addr(p_vf->shadow_config.macs[i]);
Yuval Mintz8246d0b2016-06-05 13:11:15 +03003031 }
3032
3033 /* List the new MAC address */
3034 if (p_params->opcode != QED_FILTER_ADD &&
3035 p_params->opcode != QED_FILTER_REPLACE)
3036 return 0;
3037
3038 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
3039 if (is_zero_ether_addr(p_vf->shadow_config.macs[i])) {
3040 ether_addr_copy(p_vf->shadow_config.macs[i],
3041 p_params->mac);
3042 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3043 "Added MAC at %d entry in shadow\n", i);
3044 break;
3045 }
3046 }
3047
3048 if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
3049 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No available place for MAC\n");
3050 return -EINVAL;
3051 }
3052
3053 return 0;
3054}
3055
3056static int
3057qed_iov_vf_update_unicast_shadow(struct qed_hwfn *p_hwfn,
3058 struct qed_vf_info *p_vf,
3059 struct qed_filter_ucast *p_params)
3060{
3061 int rc = 0;
3062
3063 if (p_params->type == QED_FILTER_MAC) {
3064 rc = qed_iov_vf_update_mac_shadow(p_hwfn, p_vf, p_params);
3065 if (rc)
3066 return rc;
3067 }
3068
3069 if (p_params->type == QED_FILTER_VLAN)
3070 rc = qed_iov_vf_update_vlan_shadow(p_hwfn, p_vf, p_params);
3071
3072 return rc;
3073}
3074
Baoyou Xieba569472016-09-09 09:21:15 +08003075static int qed_iov_chk_ucast(struct qed_hwfn *hwfn,
3076 int vfid, struct qed_filter_ucast *params)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003077{
3078 struct qed_public_vf_info *vf;
3079
3080 vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
3081 if (!vf)
3082 return -EINVAL;
3083
3084 /* No real decision to make; Store the configured MAC */
3085 if (params->type == QED_FILTER_MAC ||
3086 params->type == QED_FILTER_MAC_VLAN)
3087 ether_addr_copy(vf->mac, params->mac);
3088
3089 return 0;
3090}
3091
3092static void qed_iov_vf_mbx_ucast_filter(struct qed_hwfn *p_hwfn,
3093 struct qed_ptt *p_ptt,
3094 struct qed_vf_info *vf)
3095{
Yuval Mintz08feecd2016-05-11 16:36:20 +03003096 struct qed_bulletin_content *p_bulletin = vf->bulletin.p_virt;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003097 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
3098 struct vfpf_ucast_filter_tlv *req;
3099 u8 status = PFVF_STATUS_SUCCESS;
3100 struct qed_filter_ucast params;
3101 int rc;
3102
3103 /* Prepare the unicast filter params */
3104 memset(&params, 0, sizeof(struct qed_filter_ucast));
3105 req = &mbx->req_virt->ucast_filter;
3106 params.opcode = (enum qed_filter_opcode)req->opcode;
3107 params.type = (enum qed_filter_ucast_type)req->type;
3108
3109 params.is_rx_filter = 1;
3110 params.is_tx_filter = 1;
3111 params.vport_to_remove_from = vf->vport_id;
3112 params.vport_to_add_to = vf->vport_id;
3113 memcpy(params.mac, req->mac, ETH_ALEN);
3114 params.vlan = req->vlan;
3115
3116 DP_VERBOSE(p_hwfn,
3117 QED_MSG_IOV,
3118 "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x] MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n",
3119 vf->abs_vf_id, params.opcode, params.type,
3120 params.is_rx_filter ? "RX" : "",
3121 params.is_tx_filter ? "TX" : "",
3122 params.vport_to_add_to,
3123 params.mac[0], params.mac[1],
3124 params.mac[2], params.mac[3],
3125 params.mac[4], params.mac[5], params.vlan);
3126
3127 if (!vf->vport_instance) {
3128 DP_VERBOSE(p_hwfn,
3129 QED_MSG_IOV,
3130 "No VPORT instance available for VF[%d], failing ucast MAC configuration\n",
3131 vf->abs_vf_id);
3132 status = PFVF_STATUS_FAILURE;
3133 goto out;
3134 }
3135
Yuval Mintz08feecd2016-05-11 16:36:20 +03003136 /* Update shadow copy of the VF configuration */
3137 if (qed_iov_vf_update_unicast_shadow(p_hwfn, vf, &params)) {
3138 status = PFVF_STATUS_FAILURE;
3139 goto out;
3140 }
3141
3142 /* Determine if the unicast filtering is acceptible by PF */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003143 if ((p_bulletin->valid_bitmap & BIT(VLAN_ADDR_FORCED)) &&
Yuval Mintz08feecd2016-05-11 16:36:20 +03003144 (params.type == QED_FILTER_VLAN ||
3145 params.type == QED_FILTER_MAC_VLAN)) {
3146 /* Once VLAN is forced or PVID is set, do not allow
3147 * to add/replace any further VLANs.
3148 */
3149 if (params.opcode == QED_FILTER_ADD ||
3150 params.opcode == QED_FILTER_REPLACE)
3151 status = PFVF_STATUS_FORCED;
3152 goto out;
3153 }
3154
Yuval Mintz1a635e42016-08-15 10:42:43 +03003155 if ((p_bulletin->valid_bitmap & BIT(MAC_ADDR_FORCED)) &&
Yuval Mintzeff16962016-05-11 16:36:21 +03003156 (params.type == QED_FILTER_MAC ||
3157 params.type == QED_FILTER_MAC_VLAN)) {
3158 if (!ether_addr_equal(p_bulletin->mac, params.mac) ||
3159 (params.opcode != QED_FILTER_ADD &&
3160 params.opcode != QED_FILTER_REPLACE))
3161 status = PFVF_STATUS_FORCED;
3162 goto out;
3163 }
3164
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003165 rc = qed_iov_chk_ucast(p_hwfn, vf->relative_vf_id, &params);
3166 if (rc) {
3167 status = PFVF_STATUS_FAILURE;
3168 goto out;
3169 }
3170
3171 rc = qed_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, &params,
3172 QED_SPQ_MODE_CB, NULL);
3173 if (rc)
3174 status = PFVF_STATUS_FAILURE;
3175
3176out:
3177 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER,
3178 sizeof(struct pfvf_def_resp_tlv), status);
3179}
3180
Yuval Mintz0b55e272016-05-11 16:36:15 +03003181static void qed_iov_vf_mbx_int_cleanup(struct qed_hwfn *p_hwfn,
3182 struct qed_ptt *p_ptt,
3183 struct qed_vf_info *vf)
3184{
3185 int i;
3186
3187 /* Reset the SBs */
3188 for (i = 0; i < vf->num_sbs; i++)
3189 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
3190 vf->igu_sbs[i],
3191 vf->opaque_fid, false);
3192
3193 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP,
3194 sizeof(struct pfvf_def_resp_tlv),
3195 PFVF_STATUS_SUCCESS);
3196}
3197
3198static void qed_iov_vf_mbx_close(struct qed_hwfn *p_hwfn,
3199 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
3200{
3201 u16 length = sizeof(struct pfvf_def_resp_tlv);
3202 u8 status = PFVF_STATUS_SUCCESS;
3203
3204 /* Disable Interrupts for VF */
3205 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
3206
3207 /* Reset Permission table */
3208 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
3209
3210 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE,
3211 length, status);
3212}
3213
3214static void qed_iov_vf_mbx_release(struct qed_hwfn *p_hwfn,
3215 struct qed_ptt *p_ptt,
3216 struct qed_vf_info *p_vf)
3217{
3218 u16 length = sizeof(struct pfvf_def_resp_tlv);
Yuval Mintz1fe614d2016-06-05 13:11:11 +03003219 u8 status = PFVF_STATUS_SUCCESS;
3220 int rc = 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003221
3222 qed_iov_vf_cleanup(p_hwfn, p_vf);
3223
Yuval Mintz1fe614d2016-06-05 13:11:11 +03003224 if (p_vf->state != VF_STOPPED && p_vf->state != VF_FREE) {
3225 /* Stopping the VF */
3226 rc = qed_sp_vf_stop(p_hwfn, p_vf->concrete_fid,
3227 p_vf->opaque_fid);
3228
3229 if (rc) {
3230 DP_ERR(p_hwfn, "qed_sp_vf_stop returned error %d\n",
3231 rc);
3232 status = PFVF_STATUS_FAILURE;
3233 }
3234
3235 p_vf->state = VF_STOPPED;
3236 }
3237
Yuval Mintz0b55e272016-05-11 16:36:15 +03003238 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE,
Yuval Mintz1fe614d2016-06-05 13:11:11 +03003239 length, status);
Yuval Mintz0b55e272016-05-11 16:36:15 +03003240}
3241
3242static int
3243qed_iov_vf_flr_poll_dorq(struct qed_hwfn *p_hwfn,
3244 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
3245{
3246 int cnt;
3247 u32 val;
3248
3249 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_vf->concrete_fid);
3250
3251 for (cnt = 0; cnt < 50; cnt++) {
3252 val = qed_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
3253 if (!val)
3254 break;
3255 msleep(20);
3256 }
3257 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
3258
3259 if (cnt == 50) {
3260 DP_ERR(p_hwfn,
3261 "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n",
3262 p_vf->abs_vf_id, val);
3263 return -EBUSY;
3264 }
3265
3266 return 0;
3267}
3268
3269static int
3270qed_iov_vf_flr_poll_pbf(struct qed_hwfn *p_hwfn,
3271 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
3272{
3273 u32 cons[MAX_NUM_VOQS], distance[MAX_NUM_VOQS];
3274 int i, cnt;
3275
3276 /* Read initial consumers & producers */
3277 for (i = 0; i < MAX_NUM_VOQS; i++) {
3278 u32 prod;
3279
3280 cons[i] = qed_rd(p_hwfn, p_ptt,
3281 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
3282 i * 0x40);
3283 prod = qed_rd(p_hwfn, p_ptt,
3284 PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 +
3285 i * 0x40);
3286 distance[i] = prod - cons[i];
3287 }
3288
3289 /* Wait for consumers to pass the producers */
3290 i = 0;
3291 for (cnt = 0; cnt < 50; cnt++) {
3292 for (; i < MAX_NUM_VOQS; i++) {
3293 u32 tmp;
3294
3295 tmp = qed_rd(p_hwfn, p_ptt,
3296 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
3297 i * 0x40);
3298 if (distance[i] > tmp - cons[i])
3299 break;
3300 }
3301
3302 if (i == MAX_NUM_VOQS)
3303 break;
3304
3305 msleep(20);
3306 }
3307
3308 if (cnt == 50) {
3309 DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n",
3310 p_vf->abs_vf_id, i);
3311 return -EBUSY;
3312 }
3313
3314 return 0;
3315}
3316
3317static int qed_iov_vf_flr_poll(struct qed_hwfn *p_hwfn,
3318 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
3319{
3320 int rc;
3321
3322 rc = qed_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt);
3323 if (rc)
3324 return rc;
3325
3326 rc = qed_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt);
3327 if (rc)
3328 return rc;
3329
3330 return 0;
3331}
3332
3333static int
3334qed_iov_execute_vf_flr_cleanup(struct qed_hwfn *p_hwfn,
3335 struct qed_ptt *p_ptt,
3336 u16 rel_vf_id, u32 *ack_vfs)
3337{
3338 struct qed_vf_info *p_vf;
3339 int rc = 0;
3340
3341 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
3342 if (!p_vf)
3343 return 0;
3344
3345 if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
3346 (1ULL << (rel_vf_id % 64))) {
3347 u16 vfid = p_vf->abs_vf_id;
3348
3349 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3350 "VF[%d] - Handling FLR\n", vfid);
3351
3352 qed_iov_vf_cleanup(p_hwfn, p_vf);
3353
3354 /* If VF isn't active, no need for anything but SW */
3355 if (!p_vf->b_init)
3356 goto cleanup;
3357
3358 rc = qed_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
3359 if (rc)
3360 goto cleanup;
3361
3362 rc = qed_final_cleanup(p_hwfn, p_ptt, vfid, true);
3363 if (rc) {
3364 DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid);
3365 return rc;
3366 }
3367
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003368 /* Workaround to make VF-PF channel ready, as FW
3369 * doesn't do that as a part of FLR.
3370 */
3371 REG_WR(p_hwfn,
3372 GTT_BAR0_MAP_REG_USDM_RAM +
3373 USTORM_VF_PF_CHANNEL_READY_OFFSET(vfid), 1);
3374
Yuval Mintz0b55e272016-05-11 16:36:15 +03003375 /* VF_STOPPED has to be set only after final cleanup
3376 * but prior to re-enabling the VF.
3377 */
3378 p_vf->state = VF_STOPPED;
3379
3380 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
3381 if (rc) {
3382 DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",
3383 vfid);
3384 return rc;
3385 }
3386cleanup:
3387 /* Mark VF for ack and clean pending state */
3388 if (p_vf->state == VF_RESET)
3389 p_vf->state = VF_STOPPED;
Yuval Mintz1a635e42016-08-15 10:42:43 +03003390 ack_vfs[vfid / 32] |= BIT((vfid % 32));
Yuval Mintz0b55e272016-05-11 16:36:15 +03003391 p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &=
3392 ~(1ULL << (rel_vf_id % 64));
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003393 p_vf->vf_mbx.b_pending_msg = false;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003394 }
3395
3396 return rc;
3397}
3398
Baoyou Xieba569472016-09-09 09:21:15 +08003399static int
3400qed_iov_vf_flr_cleanup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
Yuval Mintz0b55e272016-05-11 16:36:15 +03003401{
3402 u32 ack_vfs[VF_MAX_STATIC / 32];
3403 int rc = 0;
3404 u16 i;
3405
3406 memset(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
3407
3408 /* Since BRB <-> PRS interface can't be tested as part of the flr
3409 * polling due to HW limitations, simply sleep a bit. And since
3410 * there's no need to wait per-vf, do it before looping.
3411 */
3412 msleep(100);
3413
3414 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++)
3415 qed_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs);
3416
3417 rc = qed_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
3418 return rc;
3419}
3420
Mintz, Yuvalcccf6f52017-03-19 13:08:18 +02003421bool qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, u32 *p_disabled_vfs)
Yuval Mintz0b55e272016-05-11 16:36:15 +03003422{
Mintz, Yuvalcccf6f52017-03-19 13:08:18 +02003423 bool found = false;
3424 u16 i;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003425
3426 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "Marking FLR-ed VFs\n");
3427 for (i = 0; i < (VF_MAX_STATIC / 32); i++)
3428 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3429 "[%08x,...,%08x]: %08x\n",
3430 i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]);
3431
3432 if (!p_hwfn->cdev->p_iov_info) {
3433 DP_NOTICE(p_hwfn, "VF flr but no IOV\n");
Mintz, Yuvalcccf6f52017-03-19 13:08:18 +02003434 return false;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003435 }
3436
3437 /* Mark VFs */
3438 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++) {
3439 struct qed_vf_info *p_vf;
3440 u8 vfid;
3441
3442 p_vf = qed_iov_get_vf_info(p_hwfn, i, false);
3443 if (!p_vf)
3444 continue;
3445
3446 vfid = p_vf->abs_vf_id;
Yuval Mintz1a635e42016-08-15 10:42:43 +03003447 if (BIT((vfid % 32)) & p_disabled_vfs[vfid / 32]) {
Yuval Mintz0b55e272016-05-11 16:36:15 +03003448 u64 *p_flr = p_hwfn->pf_iov_info->pending_flr;
3449 u16 rel_vf_id = p_vf->relative_vf_id;
3450
3451 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3452 "VF[%d] [rel %d] got FLR-ed\n",
3453 vfid, rel_vf_id);
3454
3455 p_vf->state = VF_RESET;
3456
3457 /* No need to lock here, since pending_flr should
3458 * only change here and before ACKing MFw. Since
3459 * MFW will not trigger an additional attention for
3460 * VF flr until ACKs, we're safe.
3461 */
3462 p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
Mintz, Yuvalcccf6f52017-03-19 13:08:18 +02003463 found = true;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003464 }
3465 }
3466
3467 return found;
3468}
3469
Yuval Mintz73390ac2016-05-11 16:36:24 +03003470static void qed_iov_get_link(struct qed_hwfn *p_hwfn,
3471 u16 vfid,
3472 struct qed_mcp_link_params *p_params,
3473 struct qed_mcp_link_state *p_link,
3474 struct qed_mcp_link_capabilities *p_caps)
3475{
3476 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
3477 vfid,
3478 false);
3479 struct qed_bulletin_content *p_bulletin;
3480
3481 if (!p_vf)
3482 return;
3483
3484 p_bulletin = p_vf->bulletin.p_virt;
3485
3486 if (p_params)
3487 __qed_vf_get_link_params(p_hwfn, p_params, p_bulletin);
3488 if (p_link)
3489 __qed_vf_get_link_state(p_hwfn, p_link, p_bulletin);
3490 if (p_caps)
3491 __qed_vf_get_link_caps(p_hwfn, p_caps, p_bulletin);
3492}
3493
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003494static void qed_iov_process_mbx_req(struct qed_hwfn *p_hwfn,
3495 struct qed_ptt *p_ptt, int vfid)
3496{
3497 struct qed_iov_vf_mbx *mbx;
3498 struct qed_vf_info *p_vf;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003499
3500 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3501 if (!p_vf)
3502 return;
3503
3504 mbx = &p_vf->vf_mbx;
3505
3506 /* qed_iov_process_mbx_request */
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003507 if (!mbx->b_pending_msg) {
3508 DP_NOTICE(p_hwfn,
3509 "VF[%02x]: Trying to process mailbox message when none is pending\n",
3510 p_vf->abs_vf_id);
3511 return;
3512 }
3513 mbx->b_pending_msg = false;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003514
3515 mbx->first_tlv = mbx->req_virt->first_tlv;
3516
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003517 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3518 "VF[%02x]: Processing mailbox message [type %04x]\n",
3519 p_vf->abs_vf_id, mbx->first_tlv.tl.type);
3520
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003521 /* check if tlv type is known */
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003522 if (qed_iov_tlv_supported(mbx->first_tlv.tl.type) &&
3523 !p_vf->b_malicious) {
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03003524 switch (mbx->first_tlv.tl.type) {
3525 case CHANNEL_TLV_ACQUIRE:
3526 qed_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf);
3527 break;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003528 case CHANNEL_TLV_VPORT_START:
3529 qed_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf);
3530 break;
3531 case CHANNEL_TLV_VPORT_TEARDOWN:
3532 qed_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf);
3533 break;
3534 case CHANNEL_TLV_START_RXQ:
3535 qed_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf);
3536 break;
3537 case CHANNEL_TLV_START_TXQ:
3538 qed_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf);
3539 break;
3540 case CHANNEL_TLV_STOP_RXQS:
3541 qed_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf);
3542 break;
3543 case CHANNEL_TLV_STOP_TXQS:
3544 qed_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf);
3545 break;
Yuval Mintz17b235c2016-05-11 16:36:18 +03003546 case CHANNEL_TLV_UPDATE_RXQ:
3547 qed_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf);
3548 break;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003549 case CHANNEL_TLV_VPORT_UPDATE:
3550 qed_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf);
3551 break;
3552 case CHANNEL_TLV_UCAST_FILTER:
3553 qed_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf);
3554 break;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003555 case CHANNEL_TLV_CLOSE:
3556 qed_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf);
3557 break;
3558 case CHANNEL_TLV_INT_CLEANUP:
3559 qed_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf);
3560 break;
3561 case CHANNEL_TLV_RELEASE:
3562 qed_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
3563 break;
Chopra, Manisheaf3c0c2017-04-24 10:00:49 -07003564 case CHANNEL_TLV_UPDATE_TUNN_PARAM:
3565 qed_iov_vf_mbx_update_tunn_param(p_hwfn, p_ptt, p_vf);
3566 break;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03003567 }
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003568 } else if (qed_iov_tlv_supported(mbx->first_tlv.tl.type)) {
3569 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3570 "VF [%02x] - considered malicious; Ignoring TLV [%04x]\n",
3571 p_vf->abs_vf_id, mbx->first_tlv.tl.type);
3572
3573 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
3574 mbx->first_tlv.tl.type,
3575 sizeof(struct pfvf_def_resp_tlv),
3576 PFVF_STATUS_MALICIOUS);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003577 } else {
3578 /* unknown TLV - this may belong to a VF driver from the future
3579 * - a version written after this PF driver was written, which
3580 * supports features unknown as of yet. Too bad since we don't
3581 * support them. Or this may be because someone wrote a crappy
3582 * VF driver and is sending garbage over the channel.
3583 */
Yuval Mintz54fdd802016-06-05 13:11:16 +03003584 DP_NOTICE(p_hwfn,
3585 "VF[%02x]: unknown TLV. type %04x length %04x padding %08x reply address %llu\n",
3586 p_vf->abs_vf_id,
3587 mbx->first_tlv.tl.type,
3588 mbx->first_tlv.tl.length,
3589 mbx->first_tlv.padding, mbx->first_tlv.reply_address);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003590
Yuval Mintz54fdd802016-06-05 13:11:16 +03003591 /* Try replying in case reply address matches the acquisition's
3592 * posted address.
3593 */
3594 if (p_vf->acquire.first_tlv.reply_address &&
3595 (mbx->first_tlv.reply_address ==
3596 p_vf->acquire.first_tlv.reply_address)) {
3597 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
3598 mbx->first_tlv.tl.type,
3599 sizeof(struct pfvf_def_resp_tlv),
3600 PFVF_STATUS_NOT_SUPPORTED);
3601 } else {
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003602 DP_VERBOSE(p_hwfn,
3603 QED_MSG_IOV,
Yuval Mintz54fdd802016-06-05 13:11:16 +03003604 "VF[%02x]: Can't respond to TLV - no valid reply address\n",
3605 p_vf->abs_vf_id);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003606 }
3607 }
3608}
3609
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003610void qed_iov_pf_get_pending_events(struct qed_hwfn *p_hwfn, u64 *events)
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003611{
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003612 int i;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003613
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003614 memset(events, 0, sizeof(u64) * QED_VF_ARRAY_LENGTH);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003615
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003616 qed_for_each_vf(p_hwfn, i) {
3617 struct qed_vf_info *p_vf;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003618
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003619 p_vf = &p_hwfn->pf_iov_info->vfs_array[i];
3620 if (p_vf->vf_mbx.b_pending_msg)
3621 events[i / 64] |= 1ULL << (i % 64);
3622 }
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003623}
3624
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003625static struct qed_vf_info *qed_sriov_get_vf_from_absid(struct qed_hwfn *p_hwfn,
3626 u16 abs_vfid)
3627{
3628 u8 min = (u8) p_hwfn->cdev->p_iov_info->first_vf_in_pf;
3629
3630 if (!_qed_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min, false)) {
3631 DP_VERBOSE(p_hwfn,
3632 QED_MSG_IOV,
3633 "Got indication for VF [abs 0x%08x] that cannot be handled by PF\n",
3634 abs_vfid);
3635 return NULL;
3636 }
3637
3638 return &p_hwfn->pf_iov_info->vfs_array[(u8) abs_vfid - min];
3639}
3640
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003641static int qed_sriov_vfpf_msg(struct qed_hwfn *p_hwfn,
3642 u16 abs_vfid, struct regpair *vf_msg)
3643{
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003644 struct qed_vf_info *p_vf = qed_sriov_get_vf_from_absid(p_hwfn,
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003645 abs_vfid);
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003646
3647 if (!p_vf)
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003648 return 0;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003649
3650 /* List the physical address of the request so that handler
3651 * could later on copy the message from it.
3652 */
3653 p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo;
3654
3655 /* Mark the event and schedule the workqueue */
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003656 p_vf->vf_mbx.b_pending_msg = true;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003657 qed_schedule_iov(p_hwfn, QED_IOV_WQ_MSG_FLAG);
3658
3659 return 0;
3660}
3661
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003662static void qed_sriov_vfpf_malicious(struct qed_hwfn *p_hwfn,
3663 struct malicious_vf_eqe_data *p_data)
3664{
3665 struct qed_vf_info *p_vf;
3666
3667 p_vf = qed_sriov_get_vf_from_absid(p_hwfn, p_data->vf_id);
3668
3669 if (!p_vf)
3670 return;
3671
Mintz, Yuvale99a21c2017-03-19 13:08:19 +02003672 if (!p_vf->b_malicious) {
3673 DP_NOTICE(p_hwfn,
3674 "VF [%d] - Malicious behavior [%02x]\n",
3675 p_vf->abs_vf_id, p_data->err_id);
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003676
Mintz, Yuvale99a21c2017-03-19 13:08:19 +02003677 p_vf->b_malicious = true;
3678 } else {
3679 DP_INFO(p_hwfn,
3680 "VF [%d] - Malicious behavior [%02x]\n",
3681 p_vf->abs_vf_id, p_data->err_id);
3682 }
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003683}
3684
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003685int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn,
3686 u8 opcode, __le16 echo, union event_ring_data *data)
3687{
3688 switch (opcode) {
3689 case COMMON_EVENT_VF_PF_CHANNEL:
3690 return qed_sriov_vfpf_msg(p_hwfn, le16_to_cpu(echo),
3691 &data->vf_pf_channel.msg_addr);
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003692 case COMMON_EVENT_MALICIOUS_VF:
3693 qed_sriov_vfpf_malicious(p_hwfn, &data->malicious_vf);
3694 return 0;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003695 default:
3696 DP_INFO(p_hwfn->cdev, "Unknown sriov eqe event 0x%02x\n",
3697 opcode);
3698 return -EINVAL;
3699 }
3700}
3701
Yuval Mintz32a47e72016-05-11 16:36:12 +03003702u16 qed_iov_get_next_active_vf(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
3703{
3704 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
3705 u16 i;
3706
3707 if (!p_iov)
3708 goto out;
3709
3710 for (i = rel_vf_id; i < p_iov->total_vfs; i++)
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003711 if (qed_iov_is_valid_vfid(p_hwfn, rel_vf_id, true, false))
Yuval Mintz32a47e72016-05-11 16:36:12 +03003712 return i;
3713
3714out:
3715 return MAX_NUM_VFS;
3716}
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003717
3718static int qed_iov_copy_vf_msg(struct qed_hwfn *p_hwfn, struct qed_ptt *ptt,
3719 int vfid)
3720{
3721 struct qed_dmae_params params;
3722 struct qed_vf_info *vf_info;
3723
3724 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3725 if (!vf_info)
3726 return -EINVAL;
3727
3728 memset(&params, 0, sizeof(struct qed_dmae_params));
3729 params.flags = QED_DMAE_FLAG_VF_SRC | QED_DMAE_FLAG_COMPLETION_DST;
3730 params.src_vfid = vf_info->abs_vf_id;
3731
3732 if (qed_dmae_host2host(p_hwfn, ptt,
3733 vf_info->vf_mbx.pending_req,
3734 vf_info->vf_mbx.req_phys,
3735 sizeof(union vfpf_tlvs) / 4, &params)) {
3736 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3737 "Failed to copy message from VF 0x%02x\n", vfid);
3738
3739 return -EIO;
3740 }
3741
3742 return 0;
3743}
3744
Yuval Mintzeff16962016-05-11 16:36:21 +03003745static void qed_iov_bulletin_set_forced_mac(struct qed_hwfn *p_hwfn,
3746 u8 *mac, int vfid)
3747{
3748 struct qed_vf_info *vf_info;
3749 u64 feature;
3750
3751 vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3752 if (!vf_info) {
3753 DP_NOTICE(p_hwfn->cdev,
3754 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
3755 return;
3756 }
3757
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003758 if (vf_info->b_malicious) {
3759 DP_NOTICE(p_hwfn->cdev,
3760 "Can't set forced MAC to malicious VF [%d]\n", vfid);
3761 return;
3762 }
3763
Yuval Mintzeff16962016-05-11 16:36:21 +03003764 feature = 1 << MAC_ADDR_FORCED;
3765 memcpy(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
3766
3767 vf_info->bulletin.p_virt->valid_bitmap |= feature;
3768 /* Forced MAC will disable MAC_ADDR */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003769 vf_info->bulletin.p_virt->valid_bitmap &= ~BIT(VFPF_BULLETIN_MAC_ADDR);
Yuval Mintzeff16962016-05-11 16:36:21 +03003770
3771 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
3772}
3773
Baoyou Xieba569472016-09-09 09:21:15 +08003774static void qed_iov_bulletin_set_forced_vlan(struct qed_hwfn *p_hwfn,
3775 u16 pvid, int vfid)
Yuval Mintz08feecd2016-05-11 16:36:20 +03003776{
3777 struct qed_vf_info *vf_info;
3778 u64 feature;
3779
3780 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3781 if (!vf_info) {
3782 DP_NOTICE(p_hwfn->cdev,
3783 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
3784 return;
3785 }
3786
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003787 if (vf_info->b_malicious) {
3788 DP_NOTICE(p_hwfn->cdev,
3789 "Can't set forced vlan to malicious VF [%d]\n", vfid);
3790 return;
3791 }
3792
Yuval Mintz08feecd2016-05-11 16:36:20 +03003793 feature = 1 << VLAN_ADDR_FORCED;
3794 vf_info->bulletin.p_virt->pvid = pvid;
3795 if (pvid)
3796 vf_info->bulletin.p_virt->valid_bitmap |= feature;
3797 else
3798 vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
3799
3800 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
3801}
3802
Chopra, Manish97379f12017-04-24 10:00:48 -07003803void qed_iov_bulletin_set_udp_ports(struct qed_hwfn *p_hwfn,
3804 int vfid, u16 vxlan_port, u16 geneve_port)
3805{
3806 struct qed_vf_info *vf_info;
3807
3808 vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3809 if (!vf_info) {
3810 DP_NOTICE(p_hwfn->cdev,
3811 "Can not set udp ports, invalid vfid [%d]\n", vfid);
3812 return;
3813 }
3814
3815 if (vf_info->b_malicious) {
3816 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3817 "Can not set udp ports to malicious VF [%d]\n",
3818 vfid);
3819 return;
3820 }
3821
3822 vf_info->bulletin.p_virt->vxlan_udp_port = vxlan_port;
3823 vf_info->bulletin.p_virt->geneve_udp_port = geneve_port;
3824}
3825
Yuval Mintz6ddc7602016-05-11 16:36:23 +03003826static bool qed_iov_vf_has_vport_instance(struct qed_hwfn *p_hwfn, int vfid)
3827{
3828 struct qed_vf_info *p_vf_info;
3829
3830 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3831 if (!p_vf_info)
3832 return false;
3833
3834 return !!p_vf_info->vport_instance;
3835}
3836
Baoyou Xieba569472016-09-09 09:21:15 +08003837static bool qed_iov_is_vf_stopped(struct qed_hwfn *p_hwfn, int vfid)
Yuval Mintz0b55e272016-05-11 16:36:15 +03003838{
3839 struct qed_vf_info *p_vf_info;
3840
3841 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3842 if (!p_vf_info)
3843 return true;
3844
3845 return p_vf_info->state == VF_STOPPED;
3846}
3847
Yuval Mintz73390ac2016-05-11 16:36:24 +03003848static bool qed_iov_spoofchk_get(struct qed_hwfn *p_hwfn, int vfid)
3849{
3850 struct qed_vf_info *vf_info;
3851
3852 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3853 if (!vf_info)
3854 return false;
3855
3856 return vf_info->spoof_chk;
3857}
3858
Baoyou Xieba569472016-09-09 09:21:15 +08003859static int qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn, int vfid, bool val)
Yuval Mintz6ddc7602016-05-11 16:36:23 +03003860{
3861 struct qed_vf_info *vf;
3862 int rc = -EINVAL;
3863
3864 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
3865 DP_NOTICE(p_hwfn,
3866 "SR-IOV sanity check failed, can't set spoofchk\n");
3867 goto out;
3868 }
3869
3870 vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3871 if (!vf)
3872 goto out;
3873
3874 if (!qed_iov_vf_has_vport_instance(p_hwfn, vfid)) {
3875 /* After VF VPORT start PF will configure spoof check */
3876 vf->req_spoofchk_val = val;
3877 rc = 0;
3878 goto out;
3879 }
3880
3881 rc = __qed_iov_spoofchk_set(p_hwfn, vf, val);
3882
3883out:
3884 return rc;
3885}
3886
Yuval Mintzeff16962016-05-11 16:36:21 +03003887static u8 *qed_iov_bulletin_get_forced_mac(struct qed_hwfn *p_hwfn,
3888 u16 rel_vf_id)
3889{
3890 struct qed_vf_info *p_vf;
3891
3892 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3893 if (!p_vf || !p_vf->bulletin.p_virt)
3894 return NULL;
3895
Yuval Mintz1a635e42016-08-15 10:42:43 +03003896 if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED)))
Yuval Mintzeff16962016-05-11 16:36:21 +03003897 return NULL;
3898
3899 return p_vf->bulletin.p_virt->mac;
3900}
3901
Baoyou Xieba569472016-09-09 09:21:15 +08003902static u16
3903qed_iov_bulletin_get_forced_vlan(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
Yuval Mintz08feecd2016-05-11 16:36:20 +03003904{
3905 struct qed_vf_info *p_vf;
3906
3907 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3908 if (!p_vf || !p_vf->bulletin.p_virt)
3909 return 0;
3910
Yuval Mintz1a635e42016-08-15 10:42:43 +03003911 if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED)))
Yuval Mintz08feecd2016-05-11 16:36:20 +03003912 return 0;
3913
3914 return p_vf->bulletin.p_virt->pvid;
3915}
3916
Yuval Mintz733def62016-05-11 16:36:22 +03003917static int qed_iov_configure_tx_rate(struct qed_hwfn *p_hwfn,
3918 struct qed_ptt *p_ptt, int vfid, int val)
3919{
3920 struct qed_vf_info *vf;
3921 u8 abs_vp_id = 0;
3922 int rc;
3923
3924 vf = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3925 if (!vf)
3926 return -EINVAL;
3927
3928 rc = qed_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id);
3929 if (rc)
3930 return rc;
3931
3932 return qed_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val);
3933}
3934
Baoyou Xieba569472016-09-09 09:21:15 +08003935static int
3936qed_iov_configure_min_tx_rate(struct qed_dev *cdev, int vfid, u32 rate)
Yuval Mintz733def62016-05-11 16:36:22 +03003937{
3938 struct qed_vf_info *vf;
3939 u8 vport_id;
3940 int i;
3941
3942 for_each_hwfn(cdev, i) {
3943 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3944
3945 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
3946 DP_NOTICE(p_hwfn,
3947 "SR-IOV sanity check failed, can't set min rate\n");
3948 return -EINVAL;
3949 }
3950 }
3951
3952 vf = qed_iov_get_vf_info(QED_LEADING_HWFN(cdev), (u16)vfid, true);
3953 vport_id = vf->vport_id;
3954
3955 return qed_configure_vport_wfq(cdev, vport_id, rate);
3956}
3957
Yuval Mintz73390ac2016-05-11 16:36:24 +03003958static int qed_iov_get_vf_min_rate(struct qed_hwfn *p_hwfn, int vfid)
3959{
3960 struct qed_wfq_data *vf_vp_wfq;
3961 struct qed_vf_info *vf_info;
3962
3963 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3964 if (!vf_info)
3965 return 0;
3966
3967 vf_vp_wfq = &p_hwfn->qm_info.wfq_data[vf_info->vport_id];
3968
3969 if (vf_vp_wfq->configured)
3970 return vf_vp_wfq->min_speed;
3971 else
3972 return 0;
3973}
3974
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003975/**
3976 * qed_schedule_iov - schedules IOV task for VF and PF
3977 * @hwfn: hardware function pointer
3978 * @flag: IOV flag for VF/PF
3979 */
3980void qed_schedule_iov(struct qed_hwfn *hwfn, enum qed_iov_wq_flag flag)
3981{
3982 smp_mb__before_atomic();
3983 set_bit(flag, &hwfn->iov_task_flags);
3984 smp_mb__after_atomic();
3985 DP_VERBOSE(hwfn, QED_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
3986 queue_delayed_work(hwfn->iov_wq, &hwfn->iov_task, 0);
3987}
3988
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03003989void qed_vf_start_iov_wq(struct qed_dev *cdev)
3990{
3991 int i;
3992
3993 for_each_hwfn(cdev, i)
3994 queue_delayed_work(cdev->hwfns[i].iov_wq,
3995 &cdev->hwfns[i].iov_task, 0);
3996}
3997
Yuval Mintz0b55e272016-05-11 16:36:15 +03003998int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled)
3999{
4000 int i, j;
4001
4002 for_each_hwfn(cdev, i)
4003 if (cdev->hwfns[i].iov_wq)
4004 flush_workqueue(cdev->hwfns[i].iov_wq);
4005
4006 /* Mark VFs for disablement */
4007 qed_iov_set_vfs_to_disable(cdev, true);
4008
4009 if (cdev->p_iov_info && cdev->p_iov_info->num_vfs && pci_enabled)
4010 pci_disable_sriov(cdev->pdev);
4011
4012 for_each_hwfn(cdev, i) {
4013 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4014 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
4015
4016 /* Failure to acquire the ptt in 100g creates an odd error
4017 * where the first engine has already relased IOV.
4018 */
4019 if (!ptt) {
4020 DP_ERR(hwfn, "Failed to acquire ptt\n");
4021 return -EBUSY;
4022 }
4023
Yuval Mintz733def62016-05-11 16:36:22 +03004024 /* Clean WFQ db and configure equal weight for all vports */
4025 qed_clean_wfq_db(hwfn, ptt);
4026
Yuval Mintz0b55e272016-05-11 16:36:15 +03004027 qed_for_each_vf(hwfn, j) {
4028 int k;
4029
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004030 if (!qed_iov_is_valid_vfid(hwfn, j, true, false))
Yuval Mintz0b55e272016-05-11 16:36:15 +03004031 continue;
4032
4033 /* Wait until VF is disabled before releasing */
4034 for (k = 0; k < 100; k++) {
4035 if (!qed_iov_is_vf_stopped(hwfn, j))
4036 msleep(20);
4037 else
4038 break;
4039 }
4040
4041 if (k < 100)
4042 qed_iov_release_hw_for_vf(&cdev->hwfns[i],
4043 ptt, j);
4044 else
4045 DP_ERR(hwfn,
4046 "Timeout waiting for VF's FLR to end\n");
4047 }
4048
4049 qed_ptt_release(hwfn, ptt);
4050 }
4051
4052 qed_iov_set_vfs_to_disable(cdev, false);
4053
4054 return 0;
4055}
4056
Mintz, Yuval3da7a372016-11-29 16:47:06 +02004057static void qed_sriov_enable_qid_config(struct qed_hwfn *hwfn,
4058 u16 vfid,
4059 struct qed_iov_vf_init_params *params)
4060{
4061 u16 base, i;
4062
4063 /* Since we have an equal resource distribution per-VF, and we assume
4064 * PF has acquired the QED_PF_L2_QUE first queues, we start setting
4065 * sequentially from there.
4066 */
4067 base = FEAT_NUM(hwfn, QED_PF_L2_QUE) + vfid * params->num_queues;
4068
4069 params->rel_vf_id = vfid;
4070 for (i = 0; i < params->num_queues; i++) {
4071 params->req_rx_queue[i] = base + i;
4072 params->req_tx_queue[i] = base + i;
4073 }
4074}
4075
Yuval Mintz0b55e272016-05-11 16:36:15 +03004076static int qed_sriov_enable(struct qed_dev *cdev, int num)
4077{
Mintz, Yuval3da7a372016-11-29 16:47:06 +02004078 struct qed_iov_vf_init_params params;
Yuval Mintz0b55e272016-05-11 16:36:15 +03004079 int i, j, rc;
4080
4081 if (num >= RESC_NUM(&cdev->hwfns[0], QED_VPORT)) {
4082 DP_NOTICE(cdev, "Can start at most %d VFs\n",
4083 RESC_NUM(&cdev->hwfns[0], QED_VPORT) - 1);
4084 return -EINVAL;
4085 }
4086
Mintz, Yuval3da7a372016-11-29 16:47:06 +02004087 memset(&params, 0, sizeof(params));
4088
Yuval Mintz0b55e272016-05-11 16:36:15 +03004089 /* Initialize HW for VF access */
4090 for_each_hwfn(cdev, j) {
4091 struct qed_hwfn *hwfn = &cdev->hwfns[j];
4092 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
Mintz, Yuval5a1f9652016-10-31 07:14:26 +02004093
4094 /* Make sure not to use more than 16 queues per VF */
Mintz, Yuval3da7a372016-11-29 16:47:06 +02004095 params.num_queues = min_t(int,
4096 FEAT_NUM(hwfn, QED_VF_L2_QUE) / num,
4097 16);
Yuval Mintz0b55e272016-05-11 16:36:15 +03004098
4099 if (!ptt) {
4100 DP_ERR(hwfn, "Failed to acquire ptt\n");
4101 rc = -EBUSY;
4102 goto err;
4103 }
4104
Yuval Mintz0b55e272016-05-11 16:36:15 +03004105 for (i = 0; i < num; i++) {
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004106 if (!qed_iov_is_valid_vfid(hwfn, i, false, true))
Yuval Mintz0b55e272016-05-11 16:36:15 +03004107 continue;
4108
Mintz, Yuval3da7a372016-11-29 16:47:06 +02004109 qed_sriov_enable_qid_config(hwfn, i, &params);
4110 rc = qed_iov_init_hw_for_vf(hwfn, ptt, &params);
Yuval Mintz0b55e272016-05-11 16:36:15 +03004111 if (rc) {
4112 DP_ERR(cdev, "Failed to enable VF[%d]\n", i);
4113 qed_ptt_release(hwfn, ptt);
4114 goto err;
4115 }
4116 }
4117
4118 qed_ptt_release(hwfn, ptt);
4119 }
4120
4121 /* Enable SRIOV PCIe functions */
4122 rc = pci_enable_sriov(cdev->pdev, num);
4123 if (rc) {
4124 DP_ERR(cdev, "Failed to enable sriov [%d]\n", rc);
4125 goto err;
4126 }
4127
4128 return num;
4129
4130err:
4131 qed_sriov_disable(cdev, false);
4132 return rc;
4133}
4134
4135static int qed_sriov_configure(struct qed_dev *cdev, int num_vfs_param)
4136{
4137 if (!IS_QED_SRIOV(cdev)) {
4138 DP_VERBOSE(cdev, QED_MSG_IOV, "SR-IOV is not supported\n");
4139 return -EOPNOTSUPP;
4140 }
4141
4142 if (num_vfs_param)
4143 return qed_sriov_enable(cdev, num_vfs_param);
4144 else
4145 return qed_sriov_disable(cdev, true);
4146}
4147
Yuval Mintzeff16962016-05-11 16:36:21 +03004148static int qed_sriov_pf_set_mac(struct qed_dev *cdev, u8 *mac, int vfid)
4149{
4150 int i;
4151
4152 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
4153 DP_VERBOSE(cdev, QED_MSG_IOV,
4154 "Cannot set a VF MAC; Sriov is not enabled\n");
4155 return -EINVAL;
4156 }
4157
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004158 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
Yuval Mintzeff16962016-05-11 16:36:21 +03004159 DP_VERBOSE(cdev, QED_MSG_IOV,
4160 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
4161 return -EINVAL;
4162 }
4163
4164 for_each_hwfn(cdev, i) {
4165 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4166 struct qed_public_vf_info *vf_info;
4167
4168 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
4169 if (!vf_info)
4170 continue;
4171
4172 /* Set the forced MAC, and schedule the IOV task */
4173 ether_addr_copy(vf_info->forced_mac, mac);
4174 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
4175 }
4176
4177 return 0;
4178}
4179
Yuval Mintz08feecd2016-05-11 16:36:20 +03004180static int qed_sriov_pf_set_vlan(struct qed_dev *cdev, u16 vid, int vfid)
4181{
4182 int i;
4183
4184 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
4185 DP_VERBOSE(cdev, QED_MSG_IOV,
4186 "Cannot set a VF MAC; Sriov is not enabled\n");
4187 return -EINVAL;
4188 }
4189
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004190 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03004191 DP_VERBOSE(cdev, QED_MSG_IOV,
4192 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
4193 return -EINVAL;
4194 }
4195
4196 for_each_hwfn(cdev, i) {
4197 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4198 struct qed_public_vf_info *vf_info;
4199
4200 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
4201 if (!vf_info)
4202 continue;
4203
4204 /* Set the forced vlan, and schedule the IOV task */
4205 vf_info->forced_vlan = vid;
4206 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
4207 }
4208
4209 return 0;
4210}
4211
Yuval Mintz73390ac2016-05-11 16:36:24 +03004212static int qed_get_vf_config(struct qed_dev *cdev,
4213 int vf_id, struct ifla_vf_info *ivi)
4214{
4215 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
4216 struct qed_public_vf_info *vf_info;
4217 struct qed_mcp_link_state link;
4218 u32 tx_rate;
4219
4220 /* Sanitize request */
4221 if (IS_VF(cdev))
4222 return -EINVAL;
4223
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004224 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, false)) {
Yuval Mintz73390ac2016-05-11 16:36:24 +03004225 DP_VERBOSE(cdev, QED_MSG_IOV,
4226 "VF index [%d] isn't active\n", vf_id);
4227 return -EINVAL;
4228 }
4229
4230 vf_info = qed_iov_get_public_vf_info(hwfn, vf_id, true);
4231
4232 qed_iov_get_link(hwfn, vf_id, NULL, &link, NULL);
4233
4234 /* Fill information about VF */
4235 ivi->vf = vf_id;
4236
4237 if (is_valid_ether_addr(vf_info->forced_mac))
4238 ether_addr_copy(ivi->mac, vf_info->forced_mac);
4239 else
4240 ether_addr_copy(ivi->mac, vf_info->mac);
4241
4242 ivi->vlan = vf_info->forced_vlan;
4243 ivi->spoofchk = qed_iov_spoofchk_get(hwfn, vf_id);
4244 ivi->linkstate = vf_info->link_state;
4245 tx_rate = vf_info->tx_rate;
4246 ivi->max_tx_rate = tx_rate ? tx_rate : link.speed;
4247 ivi->min_tx_rate = qed_iov_get_vf_min_rate(hwfn, vf_id);
4248
4249 return 0;
4250}
4251
Yuval Mintz36558c32016-05-11 16:36:17 +03004252void qed_inform_vf_link_state(struct qed_hwfn *hwfn)
4253{
Mintz, Yuvale50728e2017-03-19 13:08:20 +02004254 struct qed_hwfn *lead_hwfn = QED_LEADING_HWFN(hwfn->cdev);
Yuval Mintz36558c32016-05-11 16:36:17 +03004255 struct qed_mcp_link_capabilities caps;
4256 struct qed_mcp_link_params params;
4257 struct qed_mcp_link_state link;
4258 int i;
4259
4260 if (!hwfn->pf_iov_info)
4261 return;
4262
4263 /* Update bulletin of all future possible VFs with link configuration */
4264 for (i = 0; i < hwfn->cdev->p_iov_info->total_vfs; i++) {
Yuval Mintz733def62016-05-11 16:36:22 +03004265 struct qed_public_vf_info *vf_info;
4266
4267 vf_info = qed_iov_get_public_vf_info(hwfn, i, false);
4268 if (!vf_info)
4269 continue;
4270
Mintz, Yuvale50728e2017-03-19 13:08:20 +02004271 /* Only hwfn0 is actually interested in the link speed.
4272 * But since only it would receive an MFW indication of link,
4273 * need to take configuration from it - otherwise things like
4274 * rate limiting for hwfn1 VF would not work.
4275 */
4276 memcpy(&params, qed_mcp_get_link_params(lead_hwfn),
4277 sizeof(params));
4278 memcpy(&link, qed_mcp_get_link_state(lead_hwfn), sizeof(link));
4279 memcpy(&caps, qed_mcp_get_link_capabilities(lead_hwfn),
Yuval Mintz36558c32016-05-11 16:36:17 +03004280 sizeof(caps));
4281
Yuval Mintz733def62016-05-11 16:36:22 +03004282 /* Modify link according to the VF's configured link state */
4283 switch (vf_info->link_state) {
4284 case IFLA_VF_LINK_STATE_DISABLE:
4285 link.link_up = false;
4286 break;
4287 case IFLA_VF_LINK_STATE_ENABLE:
4288 link.link_up = true;
4289 /* Set speed according to maximum supported by HW.
4290 * that is 40G for regular devices and 100G for CMT
4291 * mode devices.
4292 */
4293 link.speed = (hwfn->cdev->num_hwfns > 1) ?
4294 100000 : 40000;
4295 default:
4296 /* In auto mode pass PF link image to VF */
4297 break;
4298 }
4299
4300 if (link.link_up && vf_info->tx_rate) {
4301 struct qed_ptt *ptt;
4302 int rate;
4303
4304 rate = min_t(int, vf_info->tx_rate, link.speed);
4305
4306 ptt = qed_ptt_acquire(hwfn);
4307 if (!ptt) {
4308 DP_NOTICE(hwfn, "Failed to acquire PTT\n");
4309 return;
4310 }
4311
4312 if (!qed_iov_configure_tx_rate(hwfn, ptt, i, rate)) {
4313 vf_info->tx_rate = rate;
4314 link.speed = rate;
4315 }
4316
4317 qed_ptt_release(hwfn, ptt);
4318 }
4319
Yuval Mintz36558c32016-05-11 16:36:17 +03004320 qed_iov_set_link(hwfn, i, &params, &link, &caps);
4321 }
4322
4323 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
4324}
4325
Yuval Mintz733def62016-05-11 16:36:22 +03004326static int qed_set_vf_link_state(struct qed_dev *cdev,
4327 int vf_id, int link_state)
4328{
4329 int i;
4330
4331 /* Sanitize request */
4332 if (IS_VF(cdev))
4333 return -EINVAL;
4334
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004335 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, true)) {
Yuval Mintz733def62016-05-11 16:36:22 +03004336 DP_VERBOSE(cdev, QED_MSG_IOV,
4337 "VF index [%d] isn't active\n", vf_id);
4338 return -EINVAL;
4339 }
4340
4341 /* Handle configuration of link state */
4342 for_each_hwfn(cdev, i) {
4343 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4344 struct qed_public_vf_info *vf;
4345
4346 vf = qed_iov_get_public_vf_info(hwfn, vf_id, true);
4347 if (!vf)
4348 continue;
4349
4350 if (vf->link_state == link_state)
4351 continue;
4352
4353 vf->link_state = link_state;
4354 qed_inform_vf_link_state(&cdev->hwfns[i]);
4355 }
4356
4357 return 0;
4358}
4359
Yuval Mintz6ddc7602016-05-11 16:36:23 +03004360static int qed_spoof_configure(struct qed_dev *cdev, int vfid, bool val)
4361{
4362 int i, rc = -EINVAL;
4363
4364 for_each_hwfn(cdev, i) {
4365 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4366
4367 rc = qed_iov_spoofchk_set(p_hwfn, vfid, val);
4368 if (rc)
4369 break;
4370 }
4371
4372 return rc;
4373}
4374
Yuval Mintz733def62016-05-11 16:36:22 +03004375static int qed_configure_max_vf_rate(struct qed_dev *cdev, int vfid, int rate)
4376{
4377 int i;
4378
4379 for_each_hwfn(cdev, i) {
4380 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4381 struct qed_public_vf_info *vf;
4382
4383 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
4384 DP_NOTICE(p_hwfn,
4385 "SR-IOV sanity check failed, can't set tx rate\n");
4386 return -EINVAL;
4387 }
4388
4389 vf = qed_iov_get_public_vf_info(p_hwfn, vfid, true);
4390
4391 vf->tx_rate = rate;
4392
4393 qed_inform_vf_link_state(p_hwfn);
4394 }
4395
4396 return 0;
4397}
4398
4399static int qed_set_vf_rate(struct qed_dev *cdev,
4400 int vfid, u32 min_rate, u32 max_rate)
4401{
4402 int rc_min = 0, rc_max = 0;
4403
4404 if (max_rate)
4405 rc_max = qed_configure_max_vf_rate(cdev, vfid, max_rate);
4406
4407 if (min_rate)
4408 rc_min = qed_iov_configure_min_tx_rate(cdev, vfid, min_rate);
4409
4410 if (rc_max | rc_min)
4411 return -EINVAL;
4412
4413 return 0;
4414}
4415
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004416static int qed_set_vf_trust(struct qed_dev *cdev, int vfid, bool trust)
4417{
4418 int i;
4419
4420 for_each_hwfn(cdev, i) {
4421 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4422 struct qed_public_vf_info *vf;
4423
4424 if (!qed_iov_pf_sanity_check(hwfn, vfid)) {
4425 DP_NOTICE(hwfn,
4426 "SR-IOV sanity check failed, can't set trust\n");
4427 return -EINVAL;
4428 }
4429
4430 vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
4431
4432 if (vf->is_trusted_request == trust)
4433 return 0;
4434 vf->is_trusted_request = trust;
4435
4436 qed_schedule_iov(hwfn, QED_IOV_WQ_TRUST_FLAG);
4437 }
4438
4439 return 0;
4440}
4441
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004442static void qed_handle_vf_msg(struct qed_hwfn *hwfn)
4443{
4444 u64 events[QED_VF_ARRAY_LENGTH];
4445 struct qed_ptt *ptt;
4446 int i;
4447
4448 ptt = qed_ptt_acquire(hwfn);
4449 if (!ptt) {
4450 DP_VERBOSE(hwfn, QED_MSG_IOV,
4451 "Can't acquire PTT; re-scheduling\n");
4452 qed_schedule_iov(hwfn, QED_IOV_WQ_MSG_FLAG);
4453 return;
4454 }
4455
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02004456 qed_iov_pf_get_pending_events(hwfn, events);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004457
4458 DP_VERBOSE(hwfn, QED_MSG_IOV,
4459 "Event mask of VF events: 0x%llx 0x%llx 0x%llx\n",
4460 events[0], events[1], events[2]);
4461
4462 qed_for_each_vf(hwfn, i) {
4463 /* Skip VFs with no pending messages */
4464 if (!(events[i / 64] & (1ULL << (i % 64))))
4465 continue;
4466
4467 DP_VERBOSE(hwfn, QED_MSG_IOV,
4468 "Handling VF message from VF 0x%02x [Abs 0x%02x]\n",
4469 i, hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4470
4471 /* Copy VF's message to PF's request buffer for that VF */
4472 if (qed_iov_copy_vf_msg(hwfn, ptt, i))
4473 continue;
4474
4475 qed_iov_process_mbx_req(hwfn, ptt, i);
4476 }
4477
4478 qed_ptt_release(hwfn, ptt);
4479}
4480
Yuval Mintz08feecd2016-05-11 16:36:20 +03004481static void qed_handle_pf_set_vf_unicast(struct qed_hwfn *hwfn)
4482{
4483 int i;
4484
4485 qed_for_each_vf(hwfn, i) {
4486 struct qed_public_vf_info *info;
4487 bool update = false;
Yuval Mintzeff16962016-05-11 16:36:21 +03004488 u8 *mac;
Yuval Mintz08feecd2016-05-11 16:36:20 +03004489
4490 info = qed_iov_get_public_vf_info(hwfn, i, true);
4491 if (!info)
4492 continue;
4493
4494 /* Update data on bulletin board */
Yuval Mintzeff16962016-05-11 16:36:21 +03004495 mac = qed_iov_bulletin_get_forced_mac(hwfn, i);
4496 if (is_valid_ether_addr(info->forced_mac) &&
4497 (!mac || !ether_addr_equal(mac, info->forced_mac))) {
4498 DP_VERBOSE(hwfn,
4499 QED_MSG_IOV,
4500 "Handling PF setting of VF MAC to VF 0x%02x [Abs 0x%02x]\n",
4501 i,
4502 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4503
4504 /* Update bulletin board with forced MAC */
4505 qed_iov_bulletin_set_forced_mac(hwfn,
4506 info->forced_mac, i);
4507 update = true;
4508 }
Yuval Mintz08feecd2016-05-11 16:36:20 +03004509
4510 if (qed_iov_bulletin_get_forced_vlan(hwfn, i) ^
4511 info->forced_vlan) {
4512 DP_VERBOSE(hwfn,
4513 QED_MSG_IOV,
4514 "Handling PF setting of pvid [0x%04x] to VF 0x%02x [Abs 0x%02x]\n",
4515 info->forced_vlan,
4516 i,
4517 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4518 qed_iov_bulletin_set_forced_vlan(hwfn,
4519 info->forced_vlan, i);
4520 update = true;
4521 }
4522
4523 if (update)
4524 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
4525 }
4526}
4527
Yuval Mintz36558c32016-05-11 16:36:17 +03004528static void qed_handle_bulletin_post(struct qed_hwfn *hwfn)
4529{
4530 struct qed_ptt *ptt;
4531 int i;
4532
4533 ptt = qed_ptt_acquire(hwfn);
4534 if (!ptt) {
4535 DP_NOTICE(hwfn, "Failed allocating a ptt entry\n");
4536 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
4537 return;
4538 }
4539
4540 qed_for_each_vf(hwfn, i)
4541 qed_iov_post_vf_bulletin(hwfn, i, ptt);
4542
4543 qed_ptt_release(hwfn, ptt);
4544}
4545
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004546static void qed_iov_handle_trust_change(struct qed_hwfn *hwfn)
4547{
4548 struct qed_sp_vport_update_params params;
4549 struct qed_filter_accept_flags *flags;
4550 struct qed_public_vf_info *vf_info;
4551 struct qed_vf_info *vf;
4552 u8 mask;
4553 int i;
4554
4555 mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED;
4556 flags = &params.accept_flags;
4557
4558 qed_for_each_vf(hwfn, i) {
4559 /* Need to make sure current requested configuration didn't
4560 * flip so that we'll end up configuring something that's not
4561 * needed.
4562 */
4563 vf_info = qed_iov_get_public_vf_info(hwfn, i, true);
4564 if (vf_info->is_trusted_configured ==
4565 vf_info->is_trusted_request)
4566 continue;
4567 vf_info->is_trusted_configured = vf_info->is_trusted_request;
4568
4569 /* Validate that the VF has a configured vport */
4570 vf = qed_iov_get_vf_info(hwfn, i, true);
4571 if (!vf->vport_instance)
4572 continue;
4573
4574 memset(&params, 0, sizeof(params));
4575 params.opaque_fid = vf->opaque_fid;
4576 params.vport_id = vf->vport_id;
4577
4578 if (vf_info->rx_accept_mode & mask) {
4579 flags->update_rx_mode_config = 1;
4580 flags->rx_accept_filter = vf_info->rx_accept_mode;
4581 }
4582
4583 if (vf_info->tx_accept_mode & mask) {
4584 flags->update_tx_mode_config = 1;
4585 flags->tx_accept_filter = vf_info->tx_accept_mode;
4586 }
4587
4588 /* Remove if needed; Otherwise this would set the mask */
4589 if (!vf_info->is_trusted_configured) {
4590 flags->rx_accept_filter &= ~mask;
4591 flags->tx_accept_filter &= ~mask;
4592 }
4593
4594 if (flags->update_rx_mode_config ||
4595 flags->update_tx_mode_config)
4596 qed_sp_vport_update(hwfn, &params,
4597 QED_SPQ_MODE_EBLOCK, NULL);
4598 }
4599}
4600
Baoyou Xieba569472016-09-09 09:21:15 +08004601static void qed_iov_pf_task(struct work_struct *work)
4602
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004603{
4604 struct qed_hwfn *hwfn = container_of(work, struct qed_hwfn,
4605 iov_task.work);
Yuval Mintz0b55e272016-05-11 16:36:15 +03004606 int rc;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004607
4608 if (test_and_clear_bit(QED_IOV_WQ_STOP_WQ_FLAG, &hwfn->iov_task_flags))
4609 return;
4610
Yuval Mintz0b55e272016-05-11 16:36:15 +03004611 if (test_and_clear_bit(QED_IOV_WQ_FLR_FLAG, &hwfn->iov_task_flags)) {
4612 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
4613
4614 if (!ptt) {
4615 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
4616 return;
4617 }
4618
4619 rc = qed_iov_vf_flr_cleanup(hwfn, ptt);
4620 if (rc)
4621 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
4622
4623 qed_ptt_release(hwfn, ptt);
4624 }
4625
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004626 if (test_and_clear_bit(QED_IOV_WQ_MSG_FLAG, &hwfn->iov_task_flags))
4627 qed_handle_vf_msg(hwfn);
Yuval Mintz08feecd2016-05-11 16:36:20 +03004628
4629 if (test_and_clear_bit(QED_IOV_WQ_SET_UNICAST_FILTER_FLAG,
4630 &hwfn->iov_task_flags))
4631 qed_handle_pf_set_vf_unicast(hwfn);
4632
Yuval Mintz36558c32016-05-11 16:36:17 +03004633 if (test_and_clear_bit(QED_IOV_WQ_BULLETIN_UPDATE_FLAG,
4634 &hwfn->iov_task_flags))
4635 qed_handle_bulletin_post(hwfn);
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004636
4637 if (test_and_clear_bit(QED_IOV_WQ_TRUST_FLAG, &hwfn->iov_task_flags))
4638 qed_iov_handle_trust_change(hwfn);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004639}
4640
4641void qed_iov_wq_stop(struct qed_dev *cdev, bool schedule_first)
4642{
4643 int i;
4644
4645 for_each_hwfn(cdev, i) {
4646 if (!cdev->hwfns[i].iov_wq)
4647 continue;
4648
4649 if (schedule_first) {
4650 qed_schedule_iov(&cdev->hwfns[i],
4651 QED_IOV_WQ_STOP_WQ_FLAG);
4652 cancel_delayed_work_sync(&cdev->hwfns[i].iov_task);
4653 }
4654
4655 flush_workqueue(cdev->hwfns[i].iov_wq);
4656 destroy_workqueue(cdev->hwfns[i].iov_wq);
4657 }
4658}
4659
4660int qed_iov_wq_start(struct qed_dev *cdev)
4661{
4662 char name[NAME_SIZE];
4663 int i;
4664
4665 for_each_hwfn(cdev, i) {
4666 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4667
Yuval Mintz36558c32016-05-11 16:36:17 +03004668 /* PFs needs a dedicated workqueue only if they support IOV.
4669 * VFs always require one.
4670 */
4671 if (IS_PF(p_hwfn->cdev) && !IS_PF_SRIOV(p_hwfn))
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004672 continue;
4673
4674 snprintf(name, NAME_SIZE, "iov-%02x:%02x.%02x",
4675 cdev->pdev->bus->number,
4676 PCI_SLOT(cdev->pdev->devfn), p_hwfn->abs_pf_id);
4677
4678 p_hwfn->iov_wq = create_singlethread_workqueue(name);
4679 if (!p_hwfn->iov_wq) {
4680 DP_NOTICE(p_hwfn, "Cannot create iov workqueue\n");
4681 return -ENOMEM;
4682 }
4683
Yuval Mintz36558c32016-05-11 16:36:17 +03004684 if (IS_PF(cdev))
4685 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_pf_task);
4686 else
4687 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_vf_task);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004688 }
4689
4690 return 0;
4691}
Yuval Mintz0b55e272016-05-11 16:36:15 +03004692
4693const struct qed_iov_hv_ops qed_iov_ops_pass = {
4694 .configure = &qed_sriov_configure,
Yuval Mintzeff16962016-05-11 16:36:21 +03004695 .set_mac = &qed_sriov_pf_set_mac,
Yuval Mintz08feecd2016-05-11 16:36:20 +03004696 .set_vlan = &qed_sriov_pf_set_vlan,
Yuval Mintz73390ac2016-05-11 16:36:24 +03004697 .get_config = &qed_get_vf_config,
Yuval Mintz733def62016-05-11 16:36:22 +03004698 .set_link_state = &qed_set_vf_link_state,
Yuval Mintz6ddc7602016-05-11 16:36:23 +03004699 .set_spoof = &qed_spoof_configure,
Yuval Mintz733def62016-05-11 16:36:22 +03004700 .set_rate = &qed_set_vf_rate,
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004701 .set_trust = &qed_set_vf_trust,
Yuval Mintz0b55e272016-05-11 16:36:15 +03004702};