blob: 653be2292be02e76b5bf44c408f28e76d65ec015 [file] [log] [blame]
Yuval Mintze712d522015-10-26 11:02:27 +02001/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
Alexander Duyckf9f082a2016-06-16 12:22:57 -070027#include <net/udp_tunnel.h>
Yuval Mintze712d522015-10-26 11:02:27 +020028#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
Ram Amranicee9fbd2016-10-01 21:59:56 +030039#include <linux/qed/qede_roce.h>
Yuval Mintze712d522015-10-26 11:02:27 +020040#include "qede.h"
41
Yuval Mintz5abd7e922016-02-24 16:52:50 +020042static char version[] =
43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
Yuval Mintze712d522015-10-26 11:02:27 +020044
Yuval Mintz5abd7e922016-02-24 16:52:50 +020045MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
Yuval Mintze712d522015-10-26 11:02:27 +020046MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
Yuval Mintz0e7441d2016-02-24 16:52:45 +020056#define CHIP_NUM_57980S_10 0x1666
Yuval Mintze712d522015-10-26 11:02:27 +020057#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
Yuval Mintzfefb0202016-05-11 16:36:19 +030061#define CHIP_NUM_57980S_IOV 0x1664
Yuval Mintze712d522015-10-26 11:02:27 +020062
63#ifndef PCI_DEVICE_ID_NX2_57980E
64#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
65#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
66#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
67#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
68#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
69#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
Yuval Mintzfefb0202016-05-11 16:36:19 +030070#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
Yuval Mintze712d522015-10-26 11:02:27 +020071#endif
72
Yuval Mintzfefb0202016-05-11 16:36:19 +030073enum qede_pci_private {
74 QEDE_PRIVATE_PF,
75 QEDE_PRIVATE_VF
76};
77
Yuval Mintze712d522015-10-26 11:02:27 +020078static const struct pci_device_id qede_pci_tbl[] = {
Yuval Mintzfefb0202016-05-11 16:36:19 +030079 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
Arnd Bergmann14b84e82016-06-01 15:29:13 +020085#ifdef CONFIG_QED_SRIOV
Yuval Mintzfefb0202016-05-11 16:36:19 +030086 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
Arnd Bergmann14b84e82016-06-01 15:29:13 +020087#endif
Yuval Mintze712d522015-10-26 11:02:27 +020088 { 0 }
89};
90
91MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
92
93static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
94
95#define TX_TIMEOUT (5 * HZ)
96
97static void qede_remove(struct pci_dev *pdev);
Mintz, Yuval14d39642016-10-31 07:14:23 +020098static void qede_shutdown(struct pci_dev *pdev);
Yuval Mintz29502192015-10-26 11:02:29 +020099static int qede_alloc_rx_buffer(struct qede_dev *edev,
100 struct qede_rx_queue *rxq);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200101static void qede_link_update(void *dev, struct qed_link_output *link);
Yuval Mintze712d522015-10-26 11:02:27 +0200102
Yuval Mintzfefb0202016-05-11 16:36:19 +0300103#ifdef CONFIG_QED_SRIOV
Moshe Shemesh79aab092016-09-22 12:11:15 +0300104static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
105 __be16 vlan_proto)
Yuval Mintz08feecd2016-05-11 16:36:20 +0300106{
107 struct qede_dev *edev = netdev_priv(ndev);
108
109 if (vlan > 4095) {
110 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
111 return -EINVAL;
112 }
113
Moshe Shemesh79aab092016-09-22 12:11:15 +0300114 if (vlan_proto != htons(ETH_P_8021Q))
115 return -EPROTONOSUPPORT;
116
Yuval Mintz08feecd2016-05-11 16:36:20 +0300117 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
118 vlan, vf);
119
120 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
121}
122
Yuval Mintzeff16962016-05-11 16:36:21 +0300123static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
124{
125 struct qede_dev *edev = netdev_priv(ndev);
126
127 DP_VERBOSE(edev, QED_MSG_IOV,
128 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
129 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
130
131 if (!is_valid_ether_addr(mac)) {
132 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
133 return -EINVAL;
134 }
135
136 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
137}
138
Yuval Mintzfefb0202016-05-11 16:36:19 +0300139static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
140{
141 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
Yuval Mintz831bfb0e2016-05-11 16:36:25 +0300142 struct qed_dev_info *qed_info = &edev->dev_info.common;
143 int rc;
Yuval Mintzfefb0202016-05-11 16:36:19 +0300144
145 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
146
Yuval Mintz831bfb0e2016-05-11 16:36:25 +0300147 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
148
149 /* Enable/Disable Tx switching for PF */
150 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
151 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
152 struct qed_update_vport_params params;
153
154 memset(&params, 0, sizeof(params));
155 params.vport_id = 0;
156 params.update_tx_switching_flg = 1;
157 params.tx_switching_flg = num_vfs_param ? 1 : 0;
158 edev->ops->vport_update(edev->cdev, &params);
159 }
160
161 return rc;
Yuval Mintzfefb0202016-05-11 16:36:19 +0300162}
163#endif
164
Yuval Mintze712d522015-10-26 11:02:27 +0200165static struct pci_driver qede_pci_driver = {
166 .name = "qede",
167 .id_table = qede_pci_tbl,
168 .probe = qede_probe,
169 .remove = qede_remove,
Mintz, Yuval14d39642016-10-31 07:14:23 +0200170 .shutdown = qede_shutdown,
Yuval Mintzfefb0202016-05-11 16:36:19 +0300171#ifdef CONFIG_QED_SRIOV
172 .sriov_configure = qede_sriov_configure,
173#endif
Yuval Mintze712d522015-10-26 11:02:27 +0200174};
175
Yuval Mintzc3aaa402016-10-14 05:19:17 -0400176static void qede_force_mac(void *dev, u8 *mac, bool forced)
Yuval Mintzeff16962016-05-11 16:36:21 +0300177{
178 struct qede_dev *edev = dev;
179
Yuval Mintzc3aaa402016-10-14 05:19:17 -0400180 /* MAC hints take effect only if we haven't set one already */
181 if (is_valid_ether_addr(edev->ndev->dev_addr) && !forced)
182 return;
183
Yuval Mintzeff16962016-05-11 16:36:21 +0300184 ether_addr_copy(edev->ndev->dev_addr, mac);
185 ether_addr_copy(edev->primary_mac, mac);
186}
187
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200188static struct qed_eth_cb_ops qede_ll_ops = {
189 {
190 .link_update = qede_link_update,
191 },
Yuval Mintzeff16962016-05-11 16:36:21 +0300192 .force_mac = qede_force_mac,
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200193};
194
Yuval Mintz29502192015-10-26 11:02:29 +0200195static int qede_netdev_event(struct notifier_block *this, unsigned long event,
196 void *ptr)
197{
198 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
199 struct ethtool_drvinfo drvinfo;
200 struct qede_dev *edev;
201
Ram Amranicee9fbd2016-10-01 21:59:56 +0300202 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
Yuval Mintz29502192015-10-26 11:02:29 +0200203 goto done;
204
205 /* Check whether this is a qede device */
206 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
207 goto done;
208
209 memset(&drvinfo, 0, sizeof(drvinfo));
210 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
211 if (strcmp(drvinfo.driver, "qede"))
212 goto done;
213 edev = netdev_priv(ndev);
214
Ram Amranicee9fbd2016-10-01 21:59:56 +0300215 switch (event) {
216 case NETDEV_CHANGENAME:
217 /* Notify qed of the name change */
218 if (!edev->ops || !edev->ops->common)
219 goto done;
220 edev->ops->common->set_id(edev->cdev, edev->ndev->name, "qede");
221 break;
222 case NETDEV_CHANGEADDR:
223 edev = netdev_priv(ndev);
224 qede_roce_event_changeaddr(edev);
225 break;
226 }
Yuval Mintz29502192015-10-26 11:02:29 +0200227
228done:
229 return NOTIFY_DONE;
230}
231
232static struct notifier_block qede_netdev_notifier = {
233 .notifier_call = qede_netdev_event,
234};
235
Yuval Mintze712d522015-10-26 11:02:27 +0200236static
237int __init qede_init(void)
238{
239 int ret;
Yuval Mintze712d522015-10-26 11:02:27 +0200240
Yuval Mintz525ef5c2016-08-15 10:42:45 +0300241 pr_info("qede_init: %s\n", version);
Yuval Mintze712d522015-10-26 11:02:27 +0200242
Rahul Verma95114342016-04-10 12:42:59 +0300243 qed_ops = qed_get_eth_ops();
Yuval Mintze712d522015-10-26 11:02:27 +0200244 if (!qed_ops) {
245 pr_notice("Failed to get qed ethtool operations\n");
246 return -EINVAL;
247 }
248
Yuval Mintz29502192015-10-26 11:02:29 +0200249 /* Must register notifier before pci ops, since we might miss
250 * interface rename after pci probe and netdev registeration.
251 */
252 ret = register_netdevice_notifier(&qede_netdev_notifier);
253 if (ret) {
254 pr_notice("Failed to register netdevice_notifier\n");
255 qed_put_eth_ops();
256 return -EINVAL;
257 }
258
Yuval Mintze712d522015-10-26 11:02:27 +0200259 ret = pci_register_driver(&qede_pci_driver);
260 if (ret) {
261 pr_notice("Failed to register driver\n");
Yuval Mintz29502192015-10-26 11:02:29 +0200262 unregister_netdevice_notifier(&qede_netdev_notifier);
Yuval Mintze712d522015-10-26 11:02:27 +0200263 qed_put_eth_ops();
264 return -EINVAL;
265 }
266
267 return 0;
268}
269
270static void __exit qede_cleanup(void)
271{
Yuval Mintz525ef5c2016-08-15 10:42:45 +0300272 if (debug & QED_LOG_INFO_MASK)
273 pr_info("qede_cleanup called\n");
Yuval Mintze712d522015-10-26 11:02:27 +0200274
Yuval Mintz29502192015-10-26 11:02:29 +0200275 unregister_netdevice_notifier(&qede_netdev_notifier);
Yuval Mintze712d522015-10-26 11:02:27 +0200276 pci_unregister_driver(&qede_pci_driver);
277 qed_put_eth_ops();
278}
279
280module_init(qede_init);
281module_exit(qede_cleanup);
282
283/* -------------------------------------------------------------------------
Yuval Mintz29502192015-10-26 11:02:29 +0200284 * START OF FAST-PATH
285 * -------------------------------------------------------------------------
286 */
287
288/* Unmap the data and free skb */
289static int qede_free_tx_pkt(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300290 struct qede_tx_queue *txq, int *len)
Yuval Mintz29502192015-10-26 11:02:29 +0200291{
292 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
293 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
294 struct eth_tx_1st_bd *first_bd;
295 struct eth_tx_bd *tx_data_bd;
296 int bds_consumed = 0;
297 int nbds;
298 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
299 int i, split_bd_len = 0;
300
301 if (unlikely(!skb)) {
302 DP_ERR(edev,
303 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
304 idx, txq->sw_tx_cons, txq->sw_tx_prod);
305 return -1;
306 }
307
308 *len = skb->len;
309
310 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
311
312 bds_consumed++;
313
314 nbds = first_bd->data.nbds;
315
316 if (data_split) {
317 struct eth_tx_bd *split = (struct eth_tx_bd *)
318 qed_chain_consume(&txq->tx_pbl);
319 split_bd_len = BD_UNMAP_LEN(split);
320 bds_consumed++;
321 }
Manish Choprafabd5452016-10-21 04:43:45 -0400322 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
323 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +0200324
325 /* Unmap the data of the skb frags */
326 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
327 tx_data_bd = (struct eth_tx_bd *)
328 qed_chain_consume(&txq->tx_pbl);
329 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
330 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
331 }
332
333 while (bds_consumed++ < nbds)
334 qed_chain_consume(&txq->tx_pbl);
335
336 /* Free skb */
337 dev_kfree_skb_any(skb);
338 txq->sw_tx_ring[idx].skb = NULL;
339 txq->sw_tx_ring[idx].flags = 0;
340
341 return 0;
342}
343
344/* Unmap the data and free skb when mapping failed during start_xmit */
345static void qede_free_failed_tx_pkt(struct qede_dev *edev,
346 struct qede_tx_queue *txq,
347 struct eth_tx_1st_bd *first_bd,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300348 int nbd, bool data_split)
Yuval Mintz29502192015-10-26 11:02:29 +0200349{
350 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
351 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
352 struct eth_tx_bd *tx_data_bd;
353 int i, split_bd_len = 0;
354
355 /* Return prod to its position before this skb was handled */
356 qed_chain_set_prod(&txq->tx_pbl,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300357 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
Yuval Mintz29502192015-10-26 11:02:29 +0200358
359 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
360
361 if (data_split) {
362 struct eth_tx_bd *split = (struct eth_tx_bd *)
363 qed_chain_produce(&txq->tx_pbl);
364 split_bd_len = BD_UNMAP_LEN(split);
365 nbd--;
366 }
367
Manish Choprafabd5452016-10-21 04:43:45 -0400368 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
369 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +0200370
371 /* Unmap the data of the skb frags */
372 for (i = 0; i < nbd; i++) {
373 tx_data_bd = (struct eth_tx_bd *)
374 qed_chain_produce(&txq->tx_pbl);
375 if (tx_data_bd->nbytes)
376 dma_unmap_page(&edev->pdev->dev,
377 BD_UNMAP_ADDR(tx_data_bd),
378 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
379 }
380
381 /* Return again prod to its position before this skb was handled */
382 qed_chain_set_prod(&txq->tx_pbl,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300383 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
Yuval Mintz29502192015-10-26 11:02:29 +0200384
385 /* Free skb */
386 dev_kfree_skb_any(skb);
387 txq->sw_tx_ring[idx].skb = NULL;
388 txq->sw_tx_ring[idx].flags = 0;
389}
390
391static u32 qede_xmit_type(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300392 struct sk_buff *skb, int *ipv6_ext)
Yuval Mintz29502192015-10-26 11:02:29 +0200393{
394 u32 rc = XMIT_L4_CSUM;
395 __be16 l3_proto;
396
397 if (skb->ip_summed != CHECKSUM_PARTIAL)
398 return XMIT_PLAIN;
399
400 l3_proto = vlan_get_protocol(skb);
401 if (l3_proto == htons(ETH_P_IPV6) &&
402 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
403 *ipv6_ext = 1;
404
Manish Chopraa1502412016-10-14 05:19:18 -0400405 if (skb->encapsulation) {
Manish Chopra14db81d2016-04-14 01:38:33 -0400406 rc |= XMIT_ENC;
Manish Chopraa1502412016-10-14 05:19:18 -0400407 if (skb_is_gso(skb)) {
408 unsigned short gso_type = skb_shinfo(skb)->gso_type;
409
410 if ((gso_type & SKB_GSO_UDP_TUNNEL_CSUM) ||
411 (gso_type & SKB_GSO_GRE_CSUM))
412 rc |= XMIT_ENC_GSO_L4_CSUM;
413
414 rc |= XMIT_LSO;
415 return rc;
416 }
417 }
Manish Chopra14db81d2016-04-14 01:38:33 -0400418
Yuval Mintz29502192015-10-26 11:02:29 +0200419 if (skb_is_gso(skb))
420 rc |= XMIT_LSO;
421
422 return rc;
423}
424
425static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
426 struct eth_tx_2nd_bd *second_bd,
427 struct eth_tx_3rd_bd *third_bd)
428{
429 u8 l4_proto;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500430 u16 bd2_bits1 = 0, bd2_bits2 = 0;
Yuval Mintz29502192015-10-26 11:02:29 +0200431
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500432 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
Yuval Mintz29502192015-10-26 11:02:29 +0200433
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500434 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
Yuval Mintz29502192015-10-26 11:02:29 +0200435 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
436 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
437
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500438 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
Yuval Mintz29502192015-10-26 11:02:29 +0200439 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
440
441 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
442 l4_proto = ipv6_hdr(skb)->nexthdr;
443 else
444 l4_proto = ip_hdr(skb)->protocol;
445
446 if (l4_proto == IPPROTO_UDP)
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500447 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
Yuval Mintz29502192015-10-26 11:02:29 +0200448
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500449 if (third_bd)
Yuval Mintz29502192015-10-26 11:02:29 +0200450 third_bd->data.bitfields |=
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500451 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
452 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
453 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
Yuval Mintz29502192015-10-26 11:02:29 +0200454
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500455 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
Yuval Mintz29502192015-10-26 11:02:29 +0200456 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
457}
458
459static int map_frag_to_bd(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300460 skb_frag_t *frag, struct eth_tx_bd *bd)
Yuval Mintz29502192015-10-26 11:02:29 +0200461{
462 dma_addr_t mapping;
463
464 /* Map skb non-linear frag data for DMA */
465 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300466 skb_frag_size(frag), DMA_TO_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +0200467 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
468 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
469 return -ENOMEM;
470 }
471
472 /* Setup the data pointer of the frag data */
473 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
474
475 return 0;
476}
477
Manish Chopra14db81d2016-04-14 01:38:33 -0400478static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
479{
480 if (is_encap_pkt)
481 return (skb_inner_transport_header(skb) +
482 inner_tcp_hdrlen(skb) - skb->data);
483 else
484 return (skb_transport_header(skb) +
485 tcp_hdrlen(skb) - skb->data);
486}
487
Yuval Mintzb1199b12016-02-24 16:52:46 +0200488/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
489#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
490static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
491 u8 xmit_type)
492{
493 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
494
495 if (xmit_type & XMIT_LSO) {
496 int hlen;
497
Manish Chopra14db81d2016-04-14 01:38:33 -0400498 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
Yuval Mintzb1199b12016-02-24 16:52:46 +0200499
500 /* linear payload would require its own BD */
501 if (skb_headlen(skb) > hlen)
502 allowed_frags--;
503 }
504
505 return (skb_shinfo(skb)->nr_frags > allowed_frags);
506}
507#endif
508
Manish Chopra312e0672016-06-30 02:35:20 -0400509static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
510{
511 /* wmb makes sure that the BDs data is updated before updating the
512 * producer, otherwise FW may read old data from the BDs.
513 */
514 wmb();
515 barrier();
516 writel(txq->tx_db.raw, txq->doorbell_addr);
517
518 /* mmiowb is needed to synchronize doorbell writes from more than one
519 * processor. It guarantees that the write arrives to the device before
520 * the queue lock is released and another start_xmit is called (possibly
521 * on another CPU). Without this barrier, the next doorbell can bypass
522 * this doorbell. This is applicable to IA64/Altix systems.
523 */
524 mmiowb();
525}
526
Yuval Mintz29502192015-10-26 11:02:29 +0200527/* Main transmit function */
Yuval Mintz1a635e42016-08-15 10:42:43 +0300528static netdev_tx_t qede_start_xmit(struct sk_buff *skb,
529 struct net_device *ndev)
Yuval Mintz29502192015-10-26 11:02:29 +0200530{
531 struct qede_dev *edev = netdev_priv(ndev);
532 struct netdev_queue *netdev_txq;
533 struct qede_tx_queue *txq;
534 struct eth_tx_1st_bd *first_bd;
535 struct eth_tx_2nd_bd *second_bd = NULL;
536 struct eth_tx_3rd_bd *third_bd = NULL;
537 struct eth_tx_bd *tx_data_bd = NULL;
538 u16 txq_index;
539 u8 nbd = 0;
540 dma_addr_t mapping;
541 int rc, frag_idx = 0, ipv6_ext = 0;
542 u8 xmit_type;
543 u16 idx;
544 u16 hlen;
Dan Carpenter810810f2016-05-05 16:21:30 +0300545 bool data_split = false;
Yuval Mintz29502192015-10-26 11:02:29 +0200546
547 /* Get tx-queue context and netdev index */
548 txq_index = skb_get_queue_mapping(skb);
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -0400549 WARN_ON(txq_index >= QEDE_TSS_COUNT(edev));
Yuval Mintz29502192015-10-26 11:02:29 +0200550 txq = QEDE_TX_QUEUE(edev, txq_index);
551 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
552
Yuval Mintz1a635e42016-08-15 10:42:43 +0300553 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
Yuval Mintz29502192015-10-26 11:02:29 +0200554
555 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
556
Yuval Mintzb1199b12016-02-24 16:52:46 +0200557#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
558 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
559 if (skb_linearize(skb)) {
560 DP_NOTICE(edev,
561 "SKB linearization failed - silently dropping this SKB\n");
562 dev_kfree_skb_any(skb);
563 return NETDEV_TX_OK;
564 }
565 }
566#endif
567
Yuval Mintz29502192015-10-26 11:02:29 +0200568 /* Fill the entry in the SW ring and the BDs in the FW ring */
569 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
570 txq->sw_tx_ring[idx].skb = skb;
571 first_bd = (struct eth_tx_1st_bd *)
572 qed_chain_produce(&txq->tx_pbl);
573 memset(first_bd, 0, sizeof(*first_bd));
574 first_bd->data.bd_flags.bitfields =
575 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
576
577 /* Map skb linear data for DMA and set in the first BD */
578 mapping = dma_map_single(&edev->pdev->dev, skb->data,
579 skb_headlen(skb), DMA_TO_DEVICE);
580 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
581 DP_NOTICE(edev, "SKB mapping failed\n");
582 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
Manish Chopra312e0672016-06-30 02:35:20 -0400583 qede_update_tx_producer(txq);
Yuval Mintz29502192015-10-26 11:02:29 +0200584 return NETDEV_TX_OK;
585 }
586 nbd++;
587 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
588
589 /* In case there is IPv6 with extension headers or LSO we need 2nd and
590 * 3rd BDs.
591 */
592 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
593 second_bd = (struct eth_tx_2nd_bd *)
594 qed_chain_produce(&txq->tx_pbl);
595 memset(second_bd, 0, sizeof(*second_bd));
596
597 nbd++;
598 third_bd = (struct eth_tx_3rd_bd *)
599 qed_chain_produce(&txq->tx_pbl);
600 memset(third_bd, 0, sizeof(*third_bd));
601
602 nbd++;
603 /* We need to fill in additional data in second_bd... */
604 tx_data_bd = (struct eth_tx_bd *)second_bd;
605 }
606
607 if (skb_vlan_tag_present(skb)) {
608 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
609 first_bd->data.bd_flags.bitfields |=
610 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
611 }
612
613 /* Fill the parsing flags & params according to the requested offload */
614 if (xmit_type & XMIT_L4_CSUM) {
615 /* We don't re-calculate IP checksum as it is already done by
616 * the upper stack
617 */
618 first_bd->data.bd_flags.bitfields |=
619 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
620
Manish Chopra14db81d2016-04-14 01:38:33 -0400621 if (xmit_type & XMIT_ENC) {
622 first_bd->data.bd_flags.bitfields |=
623 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300624 first_bd->data.bitfields |=
625 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
Manish Chopra14db81d2016-04-14 01:38:33 -0400626 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500627
Yuval Mintzd8c2c7e2016-08-22 13:25:11 +0300628 /* Legacy FW had flipped behavior in regard to this bit -
629 * I.e., needed to set to prevent FW from touching encapsulated
630 * packets when it didn't need to.
631 */
632 if (unlikely(txq->is_legacy))
633 first_bd->data.bitfields ^=
634 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
635
Yuval Mintz29502192015-10-26 11:02:29 +0200636 /* If the packet is IPv6 with extension header, indicate that
637 * to FW and pass few params, since the device cracker doesn't
638 * support parsing IPv6 with extension header/s.
639 */
640 if (unlikely(ipv6_ext))
641 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
642 }
643
644 if (xmit_type & XMIT_LSO) {
645 first_bd->data.bd_flags.bitfields |=
646 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
647 third_bd->data.lso_mss =
648 cpu_to_le16(skb_shinfo(skb)->gso_size);
649
Manish Chopra14db81d2016-04-14 01:38:33 -0400650 if (unlikely(xmit_type & XMIT_ENC)) {
651 first_bd->data.bd_flags.bitfields |=
652 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
Manish Chopraa1502412016-10-14 05:19:18 -0400653
654 if (xmit_type & XMIT_ENC_GSO_L4_CSUM) {
655 u8 tmp = ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT;
656
657 first_bd->data.bd_flags.bitfields |= 1 << tmp;
658 }
Manish Chopra14db81d2016-04-14 01:38:33 -0400659 hlen = qede_get_skb_hlen(skb, true);
660 } else {
661 first_bd->data.bd_flags.bitfields |=
662 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
663 hlen = qede_get_skb_hlen(skb, false);
664 }
Yuval Mintz29502192015-10-26 11:02:29 +0200665
666 /* @@@TBD - if will not be removed need to check */
667 third_bd->data.bitfields |=
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500668 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
Yuval Mintz29502192015-10-26 11:02:29 +0200669
670 /* Make life easier for FW guys who can't deal with header and
671 * data on same BD. If we need to split, use the second bd...
672 */
673 if (unlikely(skb_headlen(skb) > hlen)) {
674 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
675 "TSO split header size is %d (%x:%x)\n",
676 first_bd->nbytes, first_bd->addr.hi,
677 first_bd->addr.lo);
678
679 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
680 le32_to_cpu(first_bd->addr.lo)) +
681 hlen;
682
683 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
684 le16_to_cpu(first_bd->nbytes) -
685 hlen);
686
687 /* this marks the BD as one that has no
688 * individual mapping
689 */
690 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
691
692 first_bd->nbytes = cpu_to_le16(hlen);
693
694 tx_data_bd = (struct eth_tx_bd *)third_bd;
695 data_split = true;
696 }
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300697 } else {
698 first_bd->data.bitfields |=
699 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
700 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
Yuval Mintz29502192015-10-26 11:02:29 +0200701 }
702
703 /* Handle fragmented skb */
704 /* special handle for frags inside 2nd and 3rd bds.. */
705 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
706 rc = map_frag_to_bd(edev,
707 &skb_shinfo(skb)->frags[frag_idx],
708 tx_data_bd);
709 if (rc) {
710 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
711 data_split);
Manish Chopra312e0672016-06-30 02:35:20 -0400712 qede_update_tx_producer(txq);
Yuval Mintz29502192015-10-26 11:02:29 +0200713 return NETDEV_TX_OK;
714 }
715
716 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
717 tx_data_bd = (struct eth_tx_bd *)third_bd;
718 else
719 tx_data_bd = NULL;
720
721 frag_idx++;
722 }
723
724 /* map last frags into 4th, 5th .... */
725 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
726 tx_data_bd = (struct eth_tx_bd *)
727 qed_chain_produce(&txq->tx_pbl);
728
729 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
730
731 rc = map_frag_to_bd(edev,
732 &skb_shinfo(skb)->frags[frag_idx],
733 tx_data_bd);
734 if (rc) {
735 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
736 data_split);
Manish Chopra312e0672016-06-30 02:35:20 -0400737 qede_update_tx_producer(txq);
Yuval Mintz29502192015-10-26 11:02:29 +0200738 return NETDEV_TX_OK;
739 }
740 }
741
742 /* update the first BD with the actual num BDs */
743 first_bd->data.nbds = nbd;
744
745 netdev_tx_sent_queue(netdev_txq, skb->len);
746
747 skb_tx_timestamp(skb);
748
749 /* Advance packet producer only before sending the packet since mapping
750 * of pages may fail.
751 */
752 txq->sw_tx_prod++;
753
754 /* 'next page' entries are counted in the producer value */
755 txq->tx_db.data.bd_prod =
756 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
757
Yuval Mintz039a3922016-08-16 18:40:18 +0300758 if (!skb->xmit_more || netif_xmit_stopped(netdev_txq))
Manish Chopra312e0672016-06-30 02:35:20 -0400759 qede_update_tx_producer(txq);
Yuval Mintz29502192015-10-26 11:02:29 +0200760
761 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
762 < (MAX_SKB_FRAGS + 1))) {
Yuval Mintz039a3922016-08-16 18:40:18 +0300763 if (skb->xmit_more)
764 qede_update_tx_producer(txq);
765
Yuval Mintz29502192015-10-26 11:02:29 +0200766 netif_tx_stop_queue(netdev_txq);
Sudarsana Reddy Kalluru68db9ec2016-08-16 10:51:02 -0400767 txq->stopped_cnt++;
Yuval Mintz29502192015-10-26 11:02:29 +0200768 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
769 "Stop queue was called\n");
770 /* paired memory barrier is in qede_tx_int(), we have to keep
771 * ordering of set_bit() in netif_tx_stop_queue() and read of
772 * fp->bd_tx_cons
773 */
774 smp_mb();
775
776 if (qed_chain_get_elem_left(&txq->tx_pbl)
777 >= (MAX_SKB_FRAGS + 1) &&
778 (edev->state == QEDE_STATE_OPEN)) {
779 netif_tx_wake_queue(netdev_txq);
780 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
781 "Wake queue was called\n");
782 }
783 }
784
785 return NETDEV_TX_OK;
786}
787
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400788int qede_txq_has_work(struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +0200789{
790 u16 hw_bd_cons;
791
792 /* Tell compiler that consumer and producer can change */
793 barrier();
794 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
795 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
796 return 0;
797
798 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
799}
800
Yuval Mintz1a635e42016-08-15 10:42:43 +0300801static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +0200802{
803 struct netdev_queue *netdev_txq;
804 u16 hw_bd_cons;
805 unsigned int pkts_compl = 0, bytes_compl = 0;
806 int rc;
807
808 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
809
810 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
811 barrier();
812
813 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
814 int len = 0;
815
816 rc = qede_free_tx_pkt(edev, txq, &len);
817 if (rc) {
818 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
819 hw_bd_cons,
820 qed_chain_get_cons_idx(&txq->tx_pbl));
821 break;
822 }
823
824 bytes_compl += len;
825 pkts_compl++;
826 txq->sw_tx_cons++;
Sudarsana Reddy Kalluru68db9ec2016-08-16 10:51:02 -0400827 txq->xmit_pkts++;
Yuval Mintz29502192015-10-26 11:02:29 +0200828 }
829
830 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
831
832 /* Need to make the tx_bd_cons update visible to start_xmit()
833 * before checking for netif_tx_queue_stopped(). Without the
834 * memory barrier, there is a small possibility that
835 * start_xmit() will miss it and cause the queue to be stopped
836 * forever.
837 * On the other hand we need an rmb() here to ensure the proper
838 * ordering of bit testing in the following
839 * netif_tx_queue_stopped(txq) call.
840 */
841 smp_mb();
842
843 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
844 /* Taking tx_lock is needed to prevent reenabling the queue
845 * while it's empty. This could have happen if rx_action() gets
846 * suspended in qede_tx_int() after the condition before
847 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
848 *
849 * stops the queue->sees fresh tx_bd_cons->releases the queue->
850 * sends some packets consuming the whole queue again->
851 * stops the queue
852 */
853
854 __netif_tx_lock(netdev_txq, smp_processor_id());
855
856 if ((netif_tx_queue_stopped(netdev_txq)) &&
857 (edev->state == QEDE_STATE_OPEN) &&
858 (qed_chain_get_elem_left(&txq->tx_pbl)
859 >= (MAX_SKB_FRAGS + 1))) {
860 netif_tx_wake_queue(netdev_txq);
861 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
862 "Wake queue was called\n");
863 }
864
865 __netif_tx_unlock(netdev_txq);
866 }
867
868 return 0;
869}
870
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400871bool qede_has_rx_work(struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +0200872{
873 u16 hw_comp_cons, sw_comp_cons;
874
875 /* Tell compiler that status block fields can change */
876 barrier();
877
878 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
879 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
880
881 return hw_comp_cons != sw_comp_cons;
882}
883
884static bool qede_has_tx_work(struct qede_fastpath *fp)
885{
886 u8 tc;
887
888 for (tc = 0; tc < fp->edev->num_tc; tc++)
889 if (qede_txq_has_work(&fp->txqs[tc]))
890 return true;
891 return false;
892}
893
Manish Chopraf86af2d2016-04-20 03:03:27 -0400894static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
895{
896 qed_chain_consume(&rxq->rx_bd_ring);
897 rxq->sw_rx_cons++;
898}
899
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500900/* This function reuses the buffer(from an offset) from
901 * consumer index to producer index in the bd ring
Yuval Mintz29502192015-10-26 11:02:29 +0200902 */
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500903static inline void qede_reuse_page(struct qede_dev *edev,
904 struct qede_rx_queue *rxq,
905 struct sw_rx_data *curr_cons)
Yuval Mintz29502192015-10-26 11:02:29 +0200906{
Yuval Mintz29502192015-10-26 11:02:29 +0200907 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500908 struct sw_rx_data *curr_prod;
909 dma_addr_t new_mapping;
Yuval Mintz29502192015-10-26 11:02:29 +0200910
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500911 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
912 *curr_prod = *curr_cons;
Yuval Mintz29502192015-10-26 11:02:29 +0200913
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500914 new_mapping = curr_prod->mapping + curr_prod->page_offset;
Yuval Mintz29502192015-10-26 11:02:29 +0200915
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500916 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
917 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
918
Yuval Mintz29502192015-10-26 11:02:29 +0200919 rxq->sw_rx_prod++;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500920 curr_cons->data = NULL;
921}
922
Manish Chopraf86af2d2016-04-20 03:03:27 -0400923/* In case of allocation failures reuse buffers
924 * from consumer index to produce buffers for firmware
925 */
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400926void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
927 struct qede_dev *edev, u8 count)
Manish Chopraf86af2d2016-04-20 03:03:27 -0400928{
929 struct sw_rx_data *curr_cons;
930
931 for (; count > 0; count--) {
932 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
933 qede_reuse_page(edev, rxq, curr_cons);
934 qede_rx_bd_ring_consume(rxq);
935 }
936}
937
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500938static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
939 struct qede_rx_queue *rxq,
940 struct sw_rx_data *curr_cons)
941{
942 /* Move to the next segment in the page */
943 curr_cons->page_offset += rxq->rx_buf_seg_size;
944
945 if (curr_cons->page_offset == PAGE_SIZE) {
Manish Chopraf86af2d2016-04-20 03:03:27 -0400946 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
947 /* Since we failed to allocate new buffer
948 * current buffer can be used again.
949 */
950 curr_cons->page_offset -= rxq->rx_buf_seg_size;
951
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500952 return -ENOMEM;
Manish Chopraf86af2d2016-04-20 03:03:27 -0400953 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500954
955 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
956 PAGE_SIZE, DMA_FROM_DEVICE);
957 } else {
958 /* Increment refcount of the page as we don't want
959 * network stack to take the ownership of the page
960 * which can be recycled multiple times by the driver.
961 */
Joonsoo Kim6d061f92016-05-19 17:10:46 -0700962 page_ref_inc(curr_cons->data);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500963 qede_reuse_page(edev, rxq, curr_cons);
964 }
965
966 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +0200967}
968
Sudarsana Reddy Kalluru837d4eb2016-10-21 04:43:41 -0400969void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +0200970{
971 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
972 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
973 struct eth_rx_prod_data rx_prods = {0};
974
975 /* Update producers */
976 rx_prods.bd_prod = cpu_to_le16(bd_prod);
977 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
978
979 /* Make sure that the BD and SGE data is updated before updating the
980 * producers since FW might read the BD/SGE right after the producer
981 * is updated.
982 */
983 wmb();
984
985 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
986 (u32 *)&rx_prods);
987
988 /* mmiowb is needed to synchronize doorbell writes from more than one
989 * processor. It guarantees that the write arrives to the device before
990 * the napi lock is released and another qede_poll is called (possibly
991 * on another CPU). Without this barrier, the next doorbell can bypass
992 * this doorbell. This is applicable to IA64/Altix systems.
993 */
994 mmiowb();
995}
996
997static u32 qede_get_rxhash(struct qede_dev *edev,
998 u8 bitfields,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300999 __le32 rss_hash, enum pkt_hash_types *rxhash_type)
Yuval Mintz29502192015-10-26 11:02:29 +02001000{
1001 enum rss_hash_type htype;
1002
1003 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
1004
1005 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
1006 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
1007 (htype == RSS_HASH_TYPE_IPV6)) ?
1008 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
1009 return le32_to_cpu(rss_hash);
1010 }
1011 *rxhash_type = PKT_HASH_TYPE_NONE;
1012 return 0;
1013}
1014
1015static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
1016{
1017 skb_checksum_none_assert(skb);
1018
1019 if (csum_flag & QEDE_CSUM_UNNECESSARY)
1020 skb->ip_summed = CHECKSUM_UNNECESSARY;
Manish Chopra14db81d2016-04-14 01:38:33 -04001021
1022 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
1023 skb->csum_level = 1;
Yuval Mintz29502192015-10-26 11:02:29 +02001024}
1025
1026static inline void qede_skb_receive(struct qede_dev *edev,
1027 struct qede_fastpath *fp,
Yuval Mintz1a635e42016-08-15 10:42:43 +03001028 struct sk_buff *skb, u16 vlan_tag)
Yuval Mintz29502192015-10-26 11:02:29 +02001029{
1030 if (vlan_tag)
Yuval Mintz1a635e42016-08-15 10:42:43 +03001031 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
Yuval Mintz29502192015-10-26 11:02:29 +02001032
1033 napi_gro_receive(&fp->napi, skb);
1034}
1035
Manish Chopra55482ed2016-03-04 12:35:06 -05001036static void qede_set_gro_params(struct qede_dev *edev,
1037 struct sk_buff *skb,
1038 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1039{
1040 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
1041
1042 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
1043 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
1044 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
1045 else
1046 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1047
1048 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
1049 cqe->header_len;
1050}
1051
1052static int qede_fill_frag_skb(struct qede_dev *edev,
1053 struct qede_rx_queue *rxq,
Yuval Mintz1a635e42016-08-15 10:42:43 +03001054 u8 tpa_agg_index, u16 len_on_bd)
Manish Chopra55482ed2016-03-04 12:35:06 -05001055{
1056 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
1057 NUM_RX_BDS_MAX];
1058 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
1059 struct sk_buff *skb = tpa_info->skb;
1060
Mintz, Yuval01e23012016-11-29 16:47:00 +02001061 if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
Manish Chopra55482ed2016-03-04 12:35:06 -05001062 goto out;
1063
1064 /* Add one frag and update the appropriate fields in the skb */
1065 skb_fill_page_desc(skb, tpa_info->frag_id++,
1066 current_bd->data, current_bd->page_offset,
1067 len_on_bd);
1068
1069 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
Manish Chopraf86af2d2016-04-20 03:03:27 -04001070 /* Incr page ref count to reuse on allocation failure
1071 * so that it doesn't get freed while freeing SKB.
1072 */
Joonsoo Kim0139aa72016-05-19 17:10:49 -07001073 page_ref_inc(current_bd->data);
Manish Chopra55482ed2016-03-04 12:35:06 -05001074 goto out;
1075 }
1076
1077 qed_chain_consume(&rxq->rx_bd_ring);
1078 rxq->sw_rx_cons++;
1079
1080 skb->data_len += len_on_bd;
1081 skb->truesize += rxq->rx_buf_seg_size;
1082 skb->len += len_on_bd;
1083
1084 return 0;
1085
1086out:
Mintz, Yuval01e23012016-11-29 16:47:00 +02001087 tpa_info->state = QEDE_AGG_STATE_ERROR;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001088 qede_recycle_rx_bd_ring(rxq, edev, 1);
Manish Chopra55482ed2016-03-04 12:35:06 -05001089 return -ENOMEM;
1090}
1091
1092static void qede_tpa_start(struct qede_dev *edev,
1093 struct qede_rx_queue *rxq,
1094 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1095{
1096 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1097 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
1098 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
Mintz, Yuval01e23012016-11-29 16:47:00 +02001099 struct sw_rx_data *replace_buf = &tpa_info->buffer;
1100 dma_addr_t mapping = tpa_info->buffer_mapping;
Manish Chopra55482ed2016-03-04 12:35:06 -05001101 struct sw_rx_data *sw_rx_data_cons;
1102 struct sw_rx_data *sw_rx_data_prod;
1103 enum pkt_hash_types rxhash_type;
1104 u32 rxhash;
1105
1106 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
1107 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1108
1109 /* Use pre-allocated replacement buffer - we can't release the agg.
1110 * start until its over and we don't want to risk allocation failing
1111 * here, so re-allocate when aggregation will be over.
1112 */
Manish Chopra09ec8e72016-05-18 07:43:57 -04001113 sw_rx_data_prod->mapping = replace_buf->mapping;
Manish Chopra55482ed2016-03-04 12:35:06 -05001114
1115 sw_rx_data_prod->data = replace_buf->data;
1116 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1117 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1118 sw_rx_data_prod->page_offset = replace_buf->page_offset;
1119
1120 rxq->sw_rx_prod++;
1121
1122 /* move partial skb from cons to pool (don't unmap yet)
1123 * save mapping, incase we drop the packet later on.
1124 */
Mintz, Yuval01e23012016-11-29 16:47:00 +02001125 tpa_info->buffer = *sw_rx_data_cons;
Manish Chopra55482ed2016-03-04 12:35:06 -05001126 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1127 le32_to_cpu(rx_bd_cons->addr.lo));
1128
Mintz, Yuval01e23012016-11-29 16:47:00 +02001129 tpa_info->buffer_mapping = mapping;
Manish Chopra55482ed2016-03-04 12:35:06 -05001130 rxq->sw_rx_cons++;
1131
1132 /* set tpa state to start only if we are able to allocate skb
1133 * for this aggregation, otherwise mark as error and aggregation will
1134 * be dropped
1135 */
1136 tpa_info->skb = netdev_alloc_skb(edev->ndev,
1137 le16_to_cpu(cqe->len_on_first_bd));
1138 if (unlikely(!tpa_info->skb)) {
Manish Chopraf86af2d2016-04-20 03:03:27 -04001139 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
Mintz, Yuval01e23012016-11-29 16:47:00 +02001140 tpa_info->state = QEDE_AGG_STATE_ERROR;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001141 goto cons_buf;
Manish Chopra55482ed2016-03-04 12:35:06 -05001142 }
1143
Manish Chopra55482ed2016-03-04 12:35:06 -05001144 /* Start filling in the aggregation info */
Mintz, Yuval01e23012016-11-29 16:47:00 +02001145 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
Manish Chopra55482ed2016-03-04 12:35:06 -05001146 tpa_info->frag_id = 0;
Mintz, Yuval01e23012016-11-29 16:47:00 +02001147 tpa_info->state = QEDE_AGG_STATE_START;
Manish Chopra55482ed2016-03-04 12:35:06 -05001148
1149 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1150 cqe->rss_hash, &rxhash_type);
1151 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
Mintz, Yuval01e23012016-11-29 16:47:00 +02001152
1153 /* Store some information from first CQE */
1154 tpa_info->start_cqe_placement_offset = cqe->placement_offset;
1155 tpa_info->start_cqe_bd_len = le16_to_cpu(cqe->len_on_first_bd);
Manish Chopra55482ed2016-03-04 12:35:06 -05001156 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1157 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
Mintz, Yuval01e23012016-11-29 16:47:00 +02001158 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
Manish Chopra55482ed2016-03-04 12:35:06 -05001159 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1160 else
1161 tpa_info->vlan_tag = 0;
1162
1163 /* This is needed in order to enable forwarding support */
1164 qede_set_gro_params(edev, tpa_info->skb, cqe);
1165
Manish Chopraf86af2d2016-04-20 03:03:27 -04001166cons_buf: /* We still need to handle bd_len_list to consume buffers */
Manish Chopra55482ed2016-03-04 12:35:06 -05001167 if (likely(cqe->ext_bd_len_list[0]))
1168 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1169 le16_to_cpu(cqe->ext_bd_len_list[0]));
1170
1171 if (unlikely(cqe->ext_bd_len_list[1])) {
1172 DP_ERR(edev,
1173 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
Mintz, Yuval01e23012016-11-29 16:47:00 +02001174 tpa_info->state = QEDE_AGG_STATE_ERROR;
Manish Chopra55482ed2016-03-04 12:35:06 -05001175 }
1176}
1177
Manish Chopra88f09bd2016-03-08 04:09:44 -05001178#ifdef CONFIG_INET
Manish Chopra55482ed2016-03-04 12:35:06 -05001179static void qede_gro_ip_csum(struct sk_buff *skb)
1180{
1181 const struct iphdr *iph = ip_hdr(skb);
1182 struct tcphdr *th;
1183
Manish Chopra55482ed2016-03-04 12:35:06 -05001184 skb_set_transport_header(skb, sizeof(struct iphdr));
1185 th = tcp_hdr(skb);
1186
1187 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1188 iph->saddr, iph->daddr, 0);
1189
1190 tcp_gro_complete(skb);
1191}
1192
1193static void qede_gro_ipv6_csum(struct sk_buff *skb)
1194{
1195 struct ipv6hdr *iph = ipv6_hdr(skb);
1196 struct tcphdr *th;
1197
Manish Chopra55482ed2016-03-04 12:35:06 -05001198 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1199 th = tcp_hdr(skb);
1200
1201 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1202 &iph->saddr, &iph->daddr, 0);
1203 tcp_gro_complete(skb);
1204}
Manish Chopra88f09bd2016-03-08 04:09:44 -05001205#endif
Manish Chopra55482ed2016-03-04 12:35:06 -05001206
1207static void qede_gro_receive(struct qede_dev *edev,
1208 struct qede_fastpath *fp,
1209 struct sk_buff *skb,
1210 u16 vlan_tag)
1211{
Manish Chopraee2fa8e2016-04-20 03:03:29 -04001212 /* FW can send a single MTU sized packet from gro flow
1213 * due to aggregation timeout/last segment etc. which
1214 * is not expected to be a gro packet. If a skb has zero
1215 * frags then simply push it in the stack as non gso skb.
1216 */
1217 if (unlikely(!skb->data_len)) {
1218 skb_shinfo(skb)->gso_type = 0;
1219 skb_shinfo(skb)->gso_size = 0;
1220 goto send_skb;
1221 }
1222
Manish Chopra88f09bd2016-03-08 04:09:44 -05001223#ifdef CONFIG_INET
Manish Chopra55482ed2016-03-04 12:35:06 -05001224 if (skb_shinfo(skb)->gso_size) {
Manish Chopraaad94c02016-04-20 03:03:28 -04001225 skb_set_network_header(skb, 0);
1226
Manish Chopra55482ed2016-03-04 12:35:06 -05001227 switch (skb->protocol) {
1228 case htons(ETH_P_IP):
1229 qede_gro_ip_csum(skb);
1230 break;
1231 case htons(ETH_P_IPV6):
1232 qede_gro_ipv6_csum(skb);
1233 break;
1234 default:
1235 DP_ERR(edev,
1236 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1237 ntohs(skb->protocol));
1238 }
1239 }
Manish Chopra88f09bd2016-03-08 04:09:44 -05001240#endif
Manish Chopraee2fa8e2016-04-20 03:03:29 -04001241
1242send_skb:
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001243 skb_record_rx_queue(skb, fp->rxq->rxq_id);
Manish Chopra55482ed2016-03-04 12:35:06 -05001244 qede_skb_receive(edev, fp, skb, vlan_tag);
1245}
1246
1247static inline void qede_tpa_cont(struct qede_dev *edev,
1248 struct qede_rx_queue *rxq,
1249 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1250{
1251 int i;
1252
1253 for (i = 0; cqe->len_list[i]; i++)
1254 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1255 le16_to_cpu(cqe->len_list[i]));
1256
1257 if (unlikely(i > 1))
1258 DP_ERR(edev,
1259 "Strange - TPA cont with more than a single len_list entry\n");
1260}
1261
1262static void qede_tpa_end(struct qede_dev *edev,
1263 struct qede_fastpath *fp,
1264 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1265{
1266 struct qede_rx_queue *rxq = fp->rxq;
1267 struct qede_agg_info *tpa_info;
1268 struct sk_buff *skb;
1269 int i;
1270
1271 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1272 skb = tpa_info->skb;
1273
1274 for (i = 0; cqe->len_list[i]; i++)
1275 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1276 le16_to_cpu(cqe->len_list[i]));
1277 if (unlikely(i > 1))
1278 DP_ERR(edev,
1279 "Strange - TPA emd with more than a single len_list entry\n");
1280
Mintz, Yuval01e23012016-11-29 16:47:00 +02001281 if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
Manish Chopra55482ed2016-03-04 12:35:06 -05001282 goto err;
1283
1284 /* Sanity */
1285 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1286 DP_ERR(edev,
1287 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1288 cqe->num_of_bds, tpa_info->frag_id);
1289 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1290 DP_ERR(edev,
1291 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1292 le16_to_cpu(cqe->total_packet_len), skb->len);
1293
1294 memcpy(skb->data,
Mintz, Yuval01e23012016-11-29 16:47:00 +02001295 page_address(tpa_info->buffer.data) +
1296 tpa_info->start_cqe_placement_offset +
1297 tpa_info->buffer.page_offset, tpa_info->start_cqe_bd_len);
Manish Chopra55482ed2016-03-04 12:35:06 -05001298
1299 /* Finalize the SKB */
1300 skb->protocol = eth_type_trans(skb, edev->ndev);
1301 skb->ip_summed = CHECKSUM_UNNECESSARY;
1302
1303 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1304 * to skb_shinfo(skb)->gso_segs
1305 */
1306 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1307
1308 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1309
Mintz, Yuval01e23012016-11-29 16:47:00 +02001310 tpa_info->state = QEDE_AGG_STATE_NONE;
Manish Chopra55482ed2016-03-04 12:35:06 -05001311
1312 return;
1313err:
Mintz, Yuval01e23012016-11-29 16:47:00 +02001314 tpa_info->state = QEDE_AGG_STATE_NONE;
Manish Chopra55482ed2016-03-04 12:35:06 -05001315 dev_kfree_skb_any(tpa_info->skb);
1316 tpa_info->skb = NULL;
1317}
1318
Manish Chopra14db81d2016-04-14 01:38:33 -04001319static bool qede_tunn_exist(u16 flag)
1320{
1321 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1322 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1323}
1324
1325static u8 qede_check_tunn_csum(u16 flag)
1326{
1327 u16 csum_flag = 0;
1328 u8 tcsum = 0;
1329
1330 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1331 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1332 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1333 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1334
1335 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1336 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1337 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1338 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1339 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1340 }
1341
1342 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1343 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1344 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1345 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1346
1347 if (csum_flag & flag)
1348 return QEDE_CSUM_ERROR;
1349
1350 return QEDE_CSUM_UNNECESSARY | tcsum;
1351}
1352
1353static u8 qede_check_notunn_csum(u16 flag)
Yuval Mintz29502192015-10-26 11:02:29 +02001354{
1355 u16 csum_flag = 0;
1356 u8 csum = 0;
1357
Manish Chopra14db81d2016-04-14 01:38:33 -04001358 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1359 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
Yuval Mintz29502192015-10-26 11:02:29 +02001360 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1361 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1362 csum = QEDE_CSUM_UNNECESSARY;
1363 }
1364
1365 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1366 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1367
1368 if (csum_flag & flag)
1369 return QEDE_CSUM_ERROR;
1370
1371 return csum;
1372}
1373
Manish Chopra14db81d2016-04-14 01:38:33 -04001374static u8 qede_check_csum(u16 flag)
1375{
1376 if (!qede_tunn_exist(flag))
1377 return qede_check_notunn_csum(flag);
1378 else
1379 return qede_check_tunn_csum(flag);
1380}
1381
Manish Choprac72a6122016-06-30 02:35:18 -04001382static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
1383 u16 flag)
1384{
1385 u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
1386
1387 if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
1388 ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
1389 (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
1390 PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
1391 return true;
1392
1393 return false;
1394}
1395
Yuval Mintz29502192015-10-26 11:02:29 +02001396static int qede_rx_int(struct qede_fastpath *fp, int budget)
1397{
1398 struct qede_dev *edev = fp->edev;
1399 struct qede_rx_queue *rxq = fp->rxq;
1400
1401 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1402 int rx_pkt = 0;
1403 u8 csum_flag;
1404
1405 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1406 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1407
1408 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1409 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1410 * read before it is written by FW, then FW writes CQE and SB, and then
1411 * the CPU reads the hw_comp_cons, it will use an old CQE.
1412 */
1413 rmb();
1414
1415 /* Loop to complete all indicated BDs */
1416 while (sw_comp_cons != hw_comp_cons) {
1417 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1418 enum pkt_hash_types rxhash_type;
1419 enum eth_rx_cqe_type cqe_type;
1420 struct sw_rx_data *sw_rx_data;
1421 union eth_rx_cqe *cqe;
1422 struct sk_buff *skb;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001423 struct page *data;
1424 __le16 flags;
Yuval Mintz29502192015-10-26 11:02:29 +02001425 u16 len, pad;
1426 u32 rx_hash;
Yuval Mintz29502192015-10-26 11:02:29 +02001427
1428 /* Get the CQE from the completion ring */
1429 cqe = (union eth_rx_cqe *)
1430 qed_chain_consume(&rxq->rx_comp_ring);
1431 cqe_type = cqe->fast_path_regular.type;
1432
1433 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1434 edev->ops->eth_cqe_completion(
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001435 edev->cdev, fp->id,
Yuval Mintz29502192015-10-26 11:02:29 +02001436 (struct eth_slow_path_rx_cqe *)cqe);
1437 goto next_cqe;
1438 }
1439
Manish Chopra55482ed2016-03-04 12:35:06 -05001440 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1441 switch (cqe_type) {
1442 case ETH_RX_CQE_TYPE_TPA_START:
1443 qede_tpa_start(edev, rxq,
1444 &cqe->fast_path_tpa_start);
1445 goto next_cqe;
1446 case ETH_RX_CQE_TYPE_TPA_CONT:
1447 qede_tpa_cont(edev, rxq,
1448 &cqe->fast_path_tpa_cont);
1449 goto next_cqe;
1450 case ETH_RX_CQE_TYPE_TPA_END:
1451 qede_tpa_end(edev, fp,
1452 &cqe->fast_path_tpa_end);
1453 goto next_rx_only;
1454 default:
1455 break;
1456 }
1457 }
1458
Yuval Mintz29502192015-10-26 11:02:29 +02001459 /* Get the data from the SW ring */
1460 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1461 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1462 data = sw_rx_data->data;
1463
1464 fp_cqe = &cqe->fast_path_regular;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001465 len = le16_to_cpu(fp_cqe->len_on_first_bd);
Yuval Mintz29502192015-10-26 11:02:29 +02001466 pad = fp_cqe->placement_offset;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001467 flags = cqe->fast_path_regular.pars_flags.flags;
Yuval Mintz29502192015-10-26 11:02:29 +02001468
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001469 /* If this is an error packet then drop it */
1470 parse_flag = le16_to_cpu(flags);
Yuval Mintz29502192015-10-26 11:02:29 +02001471
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001472 csum_flag = qede_check_csum(parse_flag);
1473 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
Manish Choprac72a6122016-06-30 02:35:18 -04001474 if (qede_pkt_is_ip_fragmented(&cqe->fast_path_regular,
1475 parse_flag)) {
1476 rxq->rx_ip_frags++;
1477 goto alloc_skb;
1478 }
1479
Yuval Mintz29502192015-10-26 11:02:29 +02001480 DP_NOTICE(edev,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001481 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1482 sw_comp_cons, parse_flag);
1483 rxq->rx_hw_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001484 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1485 goto next_cqe;
Yuval Mintz29502192015-10-26 11:02:29 +02001486 }
1487
Manish Choprac72a6122016-06-30 02:35:18 -04001488alloc_skb:
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001489 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1490 if (unlikely(!skb)) {
1491 DP_NOTICE(edev,
Yuval Mintz525ef5c2016-08-15 10:42:45 +03001492 "skb allocation failed, dropping incoming packet\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04001493 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001494 rxq->rx_alloc_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001495 goto next_cqe;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001496 }
Yuval Mintz29502192015-10-26 11:02:29 +02001497
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001498 /* Copy data into SKB */
Manish Chopra3d789992016-06-30 02:35:21 -04001499 if (len + pad <= edev->rx_copybreak) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001500 memcpy(skb_put(skb, len),
1501 page_address(data) + pad +
1502 sw_rx_data->page_offset, len);
1503 qede_reuse_page(edev, rxq, sw_rx_data);
1504 } else {
1505 struct skb_frag_struct *frag;
1506 unsigned int pull_len;
1507 unsigned char *va;
1508
1509 frag = &skb_shinfo(skb)->frags[0];
1510
1511 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1512 pad + sw_rx_data->page_offset,
1513 len, rxq->rx_buf_seg_size);
1514
1515 va = skb_frag_address(frag);
1516 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1517
1518 /* Align the pull_len to optimize memcpy */
1519 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1520
1521 skb_frag_size_sub(frag, pull_len);
1522 frag->page_offset += pull_len;
1523 skb->data_len -= pull_len;
1524 skb->tail += pull_len;
1525
1526 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1527 sw_rx_data))) {
1528 DP_ERR(edev, "Failed to allocate rx buffer\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04001529 /* Incr page ref count to reuse on allocation
1530 * failure so that it doesn't get freed while
1531 * freeing SKB.
1532 */
1533
Joonsoo Kim0139aa72016-05-19 17:10:49 -07001534 page_ref_inc(sw_rx_data->data);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001535 rxq->rx_alloc_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001536 qede_recycle_rx_bd_ring(rxq, edev,
1537 fp_cqe->bd_num);
1538 dev_kfree_skb_any(skb);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001539 goto next_cqe;
1540 }
1541 }
1542
Manish Chopraf86af2d2016-04-20 03:03:27 -04001543 qede_rx_bd_ring_consume(rxq);
1544
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001545 if (fp_cqe->bd_num != 1) {
1546 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1547 u8 num_frags;
1548
1549 pkt_len -= len;
1550
1551 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1552 num_frags--) {
1553 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1554 rxq->rx_buf_size : pkt_len;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001555 if (unlikely(!cur_size)) {
1556 DP_ERR(edev,
1557 "Still got %d BDs for mapping jumbo, but length became 0\n",
1558 num_frags);
1559 qede_recycle_rx_bd_ring(rxq, edev,
1560 num_frags);
1561 dev_kfree_skb_any(skb);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001562 goto next_cqe;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001563 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001564
Manish Chopraf86af2d2016-04-20 03:03:27 -04001565 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1566 qede_recycle_rx_bd_ring(rxq, edev,
1567 num_frags);
1568 dev_kfree_skb_any(skb);
1569 goto next_cqe;
1570 }
1571
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001572 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1573 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
Manish Chopraf86af2d2016-04-20 03:03:27 -04001574 qede_rx_bd_ring_consume(rxq);
1575
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001576 dma_unmap_page(&edev->pdev->dev,
1577 sw_rx_data->mapping,
1578 PAGE_SIZE, DMA_FROM_DEVICE);
1579
1580 skb_fill_page_desc(skb,
1581 skb_shinfo(skb)->nr_frags++,
1582 sw_rx_data->data, 0,
1583 cur_size);
1584
1585 skb->truesize += PAGE_SIZE;
1586 skb->data_len += cur_size;
1587 skb->len += cur_size;
1588 pkt_len -= cur_size;
1589 }
1590
Manish Chopraf86af2d2016-04-20 03:03:27 -04001591 if (unlikely(pkt_len))
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001592 DP_ERR(edev,
1593 "Mapped all BDs of jumbo, but still have %d bytes\n",
1594 pkt_len);
1595 }
Yuval Mintz29502192015-10-26 11:02:29 +02001596
1597 skb->protocol = eth_type_trans(skb, edev->ndev);
1598
1599 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
Yuval Mintz1a635e42016-08-15 10:42:43 +03001600 fp_cqe->rss_hash, &rxhash_type);
Yuval Mintz29502192015-10-26 11:02:29 +02001601
1602 skb_set_hash(skb, rx_hash, rxhash_type);
1603
1604 qede_set_skb_csum(skb, csum_flag);
1605
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001606 skb_record_rx_queue(skb, fp->rxq->rxq_id);
Yuval Mintz29502192015-10-26 11:02:29 +02001607
1608 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
Manish Chopra55482ed2016-03-04 12:35:06 -05001609next_rx_only:
Yuval Mintz29502192015-10-26 11:02:29 +02001610 rx_pkt++;
1611
1612next_cqe: /* don't consume bd rx buffer */
1613 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1614 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1615 /* CR TPA - revisit how to handle budget in TPA perhaps
1616 * increase on "end"
1617 */
1618 if (rx_pkt == budget)
1619 break;
1620 } /* repeat while sw_comp_cons != hw_comp_cons... */
1621
1622 /* Update producers */
1623 qede_update_rx_prod(edev, rxq);
1624
Sudarsana Reddy Kalluru68db9ec2016-08-16 10:51:02 -04001625 rxq->rcv_pkts += rx_pkt;
1626
Yuval Mintz29502192015-10-26 11:02:29 +02001627 return rx_pkt;
1628}
1629
1630static int qede_poll(struct napi_struct *napi, int budget)
1631{
Yuval Mintz29502192015-10-26 11:02:29 +02001632 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
Manish Choprac7741692016-06-30 02:35:19 -04001633 napi);
Yuval Mintz29502192015-10-26 11:02:29 +02001634 struct qede_dev *edev = fp->edev;
Manish Choprac7741692016-06-30 02:35:19 -04001635 int rx_work_done = 0;
1636 u8 tc;
Yuval Mintz29502192015-10-26 11:02:29 +02001637
Manish Choprac7741692016-06-30 02:35:19 -04001638 for (tc = 0; tc < edev->num_tc; tc++)
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001639 if (likely(fp->type & QEDE_FASTPATH_TX) &&
1640 qede_txq_has_work(&fp->txqs[tc]))
Manish Choprac7741692016-06-30 02:35:19 -04001641 qede_tx_int(edev, &fp->txqs[tc]);
Yuval Mintz29502192015-10-26 11:02:29 +02001642
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001643 rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) &&
1644 qede_has_rx_work(fp->rxq)) ?
Manish Choprac7741692016-06-30 02:35:19 -04001645 qede_rx_int(fp, budget) : 0;
1646 if (rx_work_done < budget) {
1647 qed_sb_update_sb_idx(fp->sb_info);
1648 /* *_has_*_work() reads the status block,
1649 * thus we need to ensure that status block indices
1650 * have been actually read (qed_sb_update_sb_idx)
1651 * prior to this check (*_has_*_work) so that
1652 * we won't write the "newer" value of the status block
1653 * to HW (if there was a DMA right after
1654 * qede_has_rx_work and if there is no rmb, the memory
1655 * reading (qed_sb_update_sb_idx) may be postponed
1656 * to right before *_ack_sb). In this case there
1657 * will never be another interrupt until there is
1658 * another update of the status block, while there
1659 * is still unhandled work.
1660 */
1661 rmb();
Yuval Mintz29502192015-10-26 11:02:29 +02001662
1663 /* Fall out from the NAPI loop if needed */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001664 if (!((likely(fp->type & QEDE_FASTPATH_RX) &&
1665 qede_has_rx_work(fp->rxq)) ||
1666 (likely(fp->type & QEDE_FASTPATH_TX) &&
1667 qede_has_tx_work(fp)))) {
Manish Choprac7741692016-06-30 02:35:19 -04001668 napi_complete(napi);
Yuval Mintz29502192015-10-26 11:02:29 +02001669
Manish Choprac7741692016-06-30 02:35:19 -04001670 /* Update and reenable interrupts */
1671 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1672 1 /*update*/);
1673 } else {
1674 rx_work_done = budget;
Yuval Mintz29502192015-10-26 11:02:29 +02001675 }
1676 }
1677
Manish Choprac7741692016-06-30 02:35:19 -04001678 return rx_work_done;
Yuval Mintz29502192015-10-26 11:02:29 +02001679}
1680
1681static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1682{
1683 struct qede_fastpath *fp = fp_cookie;
1684
1685 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1686
1687 napi_schedule_irqoff(&fp->napi);
1688 return IRQ_HANDLED;
1689}
1690
1691/* -------------------------------------------------------------------------
1692 * END OF FAST-PATH
1693 * -------------------------------------------------------------------------
1694 */
1695
1696static int qede_open(struct net_device *ndev);
1697static int qede_close(struct net_device *ndev);
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02001698static int qede_set_mac_addr(struct net_device *ndev, void *p);
1699static void qede_set_rx_mode(struct net_device *ndev);
1700static void qede_config_rx_mode(struct net_device *ndev);
1701
1702static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1703 enum qed_filter_xcast_params_type opcode,
1704 unsigned char mac[ETH_ALEN])
1705{
1706 struct qed_filter_params filter_cmd;
1707
1708 memset(&filter_cmd, 0, sizeof(filter_cmd));
1709 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1710 filter_cmd.filter.ucast.type = opcode;
1711 filter_cmd.filter.ucast.mac_valid = 1;
1712 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1713
1714 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1715}
1716
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001717static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1718 enum qed_filter_xcast_params_type opcode,
1719 u16 vid)
1720{
1721 struct qed_filter_params filter_cmd;
1722
1723 memset(&filter_cmd, 0, sizeof(filter_cmd));
1724 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1725 filter_cmd.filter.ucast.type = opcode;
1726 filter_cmd.filter.ucast.vlan_valid = 1;
1727 filter_cmd.filter.ucast.vlan = vid;
1728
1729 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1730}
1731
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001732void qede_fill_by_demand_stats(struct qede_dev *edev)
1733{
1734 struct qed_eth_stats stats;
1735
1736 edev->ops->get_vport_stats(edev->cdev, &stats);
1737 edev->stats.no_buff_discards = stats.no_buff_discards;
Sudarsana Reddy Kalluru1a5a3662016-08-16 10:51:01 -04001738 edev->stats.packet_too_big_discard = stats.packet_too_big_discard;
1739 edev->stats.ttl0_discard = stats.ttl0_discard;
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001740 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1741 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1742 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1743 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1744 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1745 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1746 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1747 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1748
1749 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1750 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1751 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1752 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1753 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1754 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1755 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1756 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1757 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1758 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1759 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1760 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1761
1762 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
Yuval Mintzd4967cf2016-04-22 08:41:01 +03001763 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1764 edev->stats.rx_128_to_255_byte_packets =
1765 stats.rx_128_to_255_byte_packets;
1766 edev->stats.rx_256_to_511_byte_packets =
1767 stats.rx_256_to_511_byte_packets;
1768 edev->stats.rx_512_to_1023_byte_packets =
1769 stats.rx_512_to_1023_byte_packets;
1770 edev->stats.rx_1024_to_1518_byte_packets =
1771 stats.rx_1024_to_1518_byte_packets;
1772 edev->stats.rx_1519_to_1522_byte_packets =
1773 stats.rx_1519_to_1522_byte_packets;
1774 edev->stats.rx_1519_to_2047_byte_packets =
1775 stats.rx_1519_to_2047_byte_packets;
1776 edev->stats.rx_2048_to_4095_byte_packets =
1777 stats.rx_2048_to_4095_byte_packets;
1778 edev->stats.rx_4096_to_9216_byte_packets =
1779 stats.rx_4096_to_9216_byte_packets;
1780 edev->stats.rx_9217_to_16383_byte_packets =
1781 stats.rx_9217_to_16383_byte_packets;
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001782 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1783 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1784 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1785 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1786 edev->stats.rx_align_errors = stats.rx_align_errors;
1787 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1788 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1789 edev->stats.rx_jabbers = stats.rx_jabbers;
1790 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1791 edev->stats.rx_fragments = stats.rx_fragments;
1792 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1793 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1794 edev->stats.tx_128_to_255_byte_packets =
1795 stats.tx_128_to_255_byte_packets;
1796 edev->stats.tx_256_to_511_byte_packets =
1797 stats.tx_256_to_511_byte_packets;
1798 edev->stats.tx_512_to_1023_byte_packets =
1799 stats.tx_512_to_1023_byte_packets;
1800 edev->stats.tx_1024_to_1518_byte_packets =
1801 stats.tx_1024_to_1518_byte_packets;
1802 edev->stats.tx_1519_to_2047_byte_packets =
1803 stats.tx_1519_to_2047_byte_packets;
1804 edev->stats.tx_2048_to_4095_byte_packets =
1805 stats.tx_2048_to_4095_byte_packets;
1806 edev->stats.tx_4096_to_9216_byte_packets =
1807 stats.tx_4096_to_9216_byte_packets;
1808 edev->stats.tx_9217_to_16383_byte_packets =
1809 stats.tx_9217_to_16383_byte_packets;
1810 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1811 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1812 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1813 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1814 edev->stats.brb_truncates = stats.brb_truncates;
1815 edev->stats.brb_discards = stats.brb_discards;
1816 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1817}
1818
Yuval Mintz1a635e42016-08-15 10:42:43 +03001819static
1820struct rtnl_link_stats64 *qede_get_stats64(struct net_device *dev,
1821 struct rtnl_link_stats64 *stats)
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001822{
1823 struct qede_dev *edev = netdev_priv(dev);
1824
1825 qede_fill_by_demand_stats(edev);
1826
1827 stats->rx_packets = edev->stats.rx_ucast_pkts +
1828 edev->stats.rx_mcast_pkts +
1829 edev->stats.rx_bcast_pkts;
1830 stats->tx_packets = edev->stats.tx_ucast_pkts +
1831 edev->stats.tx_mcast_pkts +
1832 edev->stats.tx_bcast_pkts;
1833
1834 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1835 edev->stats.rx_mcast_bytes +
1836 edev->stats.rx_bcast_bytes;
1837
1838 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1839 edev->stats.tx_mcast_bytes +
1840 edev->stats.tx_bcast_bytes;
1841
1842 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1843 stats->multicast = edev->stats.rx_mcast_pkts +
1844 edev->stats.rx_bcast_pkts;
1845
1846 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1847
1848 stats->collisions = edev->stats.tx_total_collisions;
1849 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1850 stats->rx_frame_errors = edev->stats.rx_align_errors;
1851
1852 return stats;
1853}
1854
Yuval Mintz733def62016-05-11 16:36:22 +03001855#ifdef CONFIG_QED_SRIOV
Yuval Mintz73390ac2016-05-11 16:36:24 +03001856static int qede_get_vf_config(struct net_device *dev, int vfidx,
1857 struct ifla_vf_info *ivi)
1858{
1859 struct qede_dev *edev = netdev_priv(dev);
1860
1861 if (!edev->ops)
1862 return -EINVAL;
1863
1864 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
1865}
1866
Yuval Mintz733def62016-05-11 16:36:22 +03001867static int qede_set_vf_rate(struct net_device *dev, int vfidx,
1868 int min_tx_rate, int max_tx_rate)
1869{
1870 struct qede_dev *edev = netdev_priv(dev);
1871
Yuval Mintzbe7b6d62016-05-26 11:01:17 +03001872 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
Yuval Mintz733def62016-05-11 16:36:22 +03001873 max_tx_rate);
1874}
1875
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001876static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
1877{
1878 struct qede_dev *edev = netdev_priv(dev);
1879
1880 if (!edev->ops)
1881 return -EINVAL;
1882
1883 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
1884}
1885
Yuval Mintz733def62016-05-11 16:36:22 +03001886static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
1887 int link_state)
1888{
1889 struct qede_dev *edev = netdev_priv(dev);
1890
1891 if (!edev->ops)
1892 return -EINVAL;
1893
1894 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
1895}
1896#endif
1897
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001898static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1899{
1900 struct qed_update_vport_params params;
1901 int rc;
1902
1903 /* Proceed only if action actually needs to be performed */
1904 if (edev->accept_any_vlan == action)
1905 return;
1906
1907 memset(&params, 0, sizeof(params));
1908
1909 params.vport_id = 0;
1910 params.accept_any_vlan = action;
1911 params.update_accept_any_vlan_flg = 1;
1912
1913 rc = edev->ops->vport_update(edev->cdev, &params);
1914 if (rc) {
1915 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1916 action ? "enable" : "disable");
1917 } else {
1918 DP_INFO(edev, "%s accept-any-vlan\n",
1919 action ? "enabled" : "disabled");
1920 edev->accept_any_vlan = action;
1921 }
1922}
1923
1924static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1925{
1926 struct qede_dev *edev = netdev_priv(dev);
1927 struct qede_vlan *vlan, *tmp;
1928 int rc;
1929
1930 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1931
1932 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1933 if (!vlan) {
1934 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1935 return -ENOMEM;
1936 }
1937 INIT_LIST_HEAD(&vlan->list);
1938 vlan->vid = vid;
1939 vlan->configured = false;
1940
1941 /* Verify vlan isn't already configured */
1942 list_for_each_entry(tmp, &edev->vlan_list, list) {
1943 if (tmp->vid == vlan->vid) {
1944 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1945 "vlan already configured\n");
1946 kfree(vlan);
1947 return -EEXIST;
1948 }
1949 }
1950
1951 /* If interface is down, cache this VLAN ID and return */
1952 if (edev->state != QEDE_STATE_OPEN) {
1953 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1954 "Interface is down, VLAN %d will be configured when interface is up\n",
1955 vid);
1956 if (vid != 0)
1957 edev->non_configured_vlans++;
1958 list_add(&vlan->list, &edev->vlan_list);
1959
1960 return 0;
1961 }
1962
1963 /* Check for the filter limit.
1964 * Note - vlan0 has a reserved filter and can be added without
1965 * worrying about quota
1966 */
1967 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1968 (vlan->vid == 0)) {
1969 rc = qede_set_ucast_rx_vlan(edev,
1970 QED_FILTER_XCAST_TYPE_ADD,
1971 vlan->vid);
1972 if (rc) {
1973 DP_ERR(edev, "Failed to configure VLAN %d\n",
1974 vlan->vid);
1975 kfree(vlan);
1976 return -EINVAL;
1977 }
1978 vlan->configured = true;
1979
1980 /* vlan0 filter isn't consuming out of our quota */
1981 if (vlan->vid != 0)
1982 edev->configured_vlans++;
1983 } else {
1984 /* Out of quota; Activate accept-any-VLAN mode */
1985 if (!edev->non_configured_vlans)
1986 qede_config_accept_any_vlan(edev, true);
1987
1988 edev->non_configured_vlans++;
1989 }
1990
1991 list_add(&vlan->list, &edev->vlan_list);
1992
1993 return 0;
1994}
1995
1996static void qede_del_vlan_from_list(struct qede_dev *edev,
1997 struct qede_vlan *vlan)
1998{
1999 /* vlan0 filter isn't consuming out of our quota */
2000 if (vlan->vid != 0) {
2001 if (vlan->configured)
2002 edev->configured_vlans--;
2003 else
2004 edev->non_configured_vlans--;
2005 }
2006
2007 list_del(&vlan->list);
2008 kfree(vlan);
2009}
2010
2011static int qede_configure_vlan_filters(struct qede_dev *edev)
2012{
2013 int rc = 0, real_rc = 0, accept_any_vlan = 0;
2014 struct qed_dev_eth_info *dev_info;
2015 struct qede_vlan *vlan = NULL;
2016
2017 if (list_empty(&edev->vlan_list))
2018 return 0;
2019
2020 dev_info = &edev->dev_info;
2021
2022 /* Configure non-configured vlans */
2023 list_for_each_entry(vlan, &edev->vlan_list, list) {
2024 if (vlan->configured)
2025 continue;
2026
2027 /* We have used all our credits, now enable accept_any_vlan */
2028 if ((vlan->vid != 0) &&
2029 (edev->configured_vlans == dev_info->num_vlan_filters)) {
2030 accept_any_vlan = 1;
2031 continue;
2032 }
2033
2034 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
2035
2036 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
2037 vlan->vid);
2038 if (rc) {
2039 DP_ERR(edev, "Failed to configure VLAN %u\n",
2040 vlan->vid);
2041 real_rc = rc;
2042 continue;
2043 }
2044
2045 vlan->configured = true;
2046 /* vlan0 filter doesn't consume our VLAN filter's quota */
2047 if (vlan->vid != 0) {
2048 edev->non_configured_vlans--;
2049 edev->configured_vlans++;
2050 }
2051 }
2052
2053 /* enable accept_any_vlan mode if we have more VLANs than credits,
2054 * or remove accept_any_vlan mode if we've actually removed
2055 * a non-configured vlan, and all remaining vlans are truly configured.
2056 */
2057
2058 if (accept_any_vlan)
2059 qede_config_accept_any_vlan(edev, true);
2060 else if (!edev->non_configured_vlans)
2061 qede_config_accept_any_vlan(edev, false);
2062
2063 return real_rc;
2064}
2065
2066static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
2067{
2068 struct qede_dev *edev = netdev_priv(dev);
2069 struct qede_vlan *vlan = NULL;
2070 int rc;
2071
2072 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
2073
2074 /* Find whether entry exists */
2075 list_for_each_entry(vlan, &edev->vlan_list, list)
2076 if (vlan->vid == vid)
2077 break;
2078
2079 if (!vlan || (vlan->vid != vid)) {
2080 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
2081 "Vlan isn't configured\n");
2082 return 0;
2083 }
2084
2085 if (edev->state != QEDE_STATE_OPEN) {
2086 /* As interface is already down, we don't have a VPORT
2087 * instance to remove vlan filter. So just update vlan list
2088 */
2089 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2090 "Interface is down, removing VLAN from list only\n");
2091 qede_del_vlan_from_list(edev, vlan);
2092 return 0;
2093 }
2094
2095 /* Remove vlan */
Yuval Mintzc524e2f52016-07-27 14:45:19 +03002096 if (vlan->configured) {
2097 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL,
2098 vid);
2099 if (rc) {
2100 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
2101 return -EINVAL;
2102 }
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002103 }
2104
2105 qede_del_vlan_from_list(edev, vlan);
2106
2107 /* We have removed a VLAN - try to see if we can
2108 * configure non-configured VLAN from the list.
2109 */
2110 rc = qede_configure_vlan_filters(edev);
2111
2112 return rc;
2113}
2114
2115static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
2116{
2117 struct qede_vlan *vlan = NULL;
2118
2119 if (list_empty(&edev->vlan_list))
2120 return;
2121
2122 list_for_each_entry(vlan, &edev->vlan_list, list) {
2123 if (!vlan->configured)
2124 continue;
2125
2126 vlan->configured = false;
2127
2128 /* vlan0 filter isn't consuming out of our quota */
2129 if (vlan->vid != 0) {
2130 edev->non_configured_vlans++;
2131 edev->configured_vlans--;
2132 }
2133
2134 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002135 "marked vlan %d as non-configured\n", vlan->vid);
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002136 }
2137
2138 edev->accept_any_vlan = false;
2139}
2140
Baoyou Xie94384512016-09-08 16:43:23 +08002141static int qede_set_features(struct net_device *dev, netdev_features_t features)
Yuval Mintzce2b8852016-05-26 11:01:18 +03002142{
2143 struct qede_dev *edev = netdev_priv(dev);
2144 netdev_features_t changes = features ^ dev->features;
2145 bool need_reload = false;
2146
2147 /* No action needed if hardware GRO is disabled during driver load */
2148 if (changes & NETIF_F_GRO) {
2149 if (dev->features & NETIF_F_GRO)
2150 need_reload = !edev->gro_disable;
2151 else
2152 need_reload = edev->gro_disable;
2153 }
2154
2155 if (need_reload && netif_running(edev->ndev)) {
2156 dev->features = features;
2157 qede_reload(edev, NULL, NULL);
2158 return 1;
2159 }
2160
2161 return 0;
2162}
2163
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002164static void qede_udp_tunnel_add(struct net_device *dev,
2165 struct udp_tunnel_info *ti)
Manish Choprab18e1702016-04-14 01:38:30 -04002166{
2167 struct qede_dev *edev = netdev_priv(dev);
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002168 u16 t_port = ntohs(ti->port);
Manish Choprab18e1702016-04-14 01:38:30 -04002169
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002170 switch (ti->type) {
2171 case UDP_TUNNEL_TYPE_VXLAN:
2172 if (edev->vxlan_dst_port)
2173 return;
2174
2175 edev->vxlan_dst_port = t_port;
2176
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002177 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d\n",
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002178 t_port);
2179
2180 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2181 break;
2182 case UDP_TUNNEL_TYPE_GENEVE:
2183 if (edev->geneve_dst_port)
2184 return;
2185
2186 edev->geneve_dst_port = t_port;
2187
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002188 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d\n",
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002189 t_port);
2190 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2191 break;
2192 default:
Manish Choprab18e1702016-04-14 01:38:30 -04002193 return;
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002194 }
Manish Choprab18e1702016-04-14 01:38:30 -04002195
Manish Choprab18e1702016-04-14 01:38:30 -04002196 schedule_delayed_work(&edev->sp_task, 0);
2197}
2198
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002199static void qede_udp_tunnel_del(struct net_device *dev,
2200 struct udp_tunnel_info *ti)
Manish Choprab18e1702016-04-14 01:38:30 -04002201{
2202 struct qede_dev *edev = netdev_priv(dev);
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002203 u16 t_port = ntohs(ti->port);
Manish Choprab18e1702016-04-14 01:38:30 -04002204
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002205 switch (ti->type) {
2206 case UDP_TUNNEL_TYPE_VXLAN:
2207 if (t_port != edev->vxlan_dst_port)
2208 return;
2209
2210 edev->vxlan_dst_port = 0;
2211
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002212 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d\n",
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002213 t_port);
2214
2215 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2216 break;
2217 case UDP_TUNNEL_TYPE_GENEVE:
2218 if (t_port != edev->geneve_dst_port)
2219 return;
2220
2221 edev->geneve_dst_port = 0;
2222
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002223 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d\n",
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002224 t_port);
2225 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2226 break;
2227 default:
Manish Choprab18e1702016-04-14 01:38:30 -04002228 return;
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002229 }
Manish Choprab18e1702016-04-14 01:38:30 -04002230
Manish Choprab18e1702016-04-14 01:38:30 -04002231 schedule_delayed_work(&edev->sp_task, 0);
2232}
Manish Chopra9a109dd2016-04-14 01:38:31 -04002233
Manish Chopra25695852016-10-14 05:19:19 -04002234/* 8B udp header + 8B base tunnel header + 32B option length */
2235#define QEDE_MAX_TUN_HDR_LEN 48
2236
2237static netdev_features_t qede_features_check(struct sk_buff *skb,
2238 struct net_device *dev,
2239 netdev_features_t features)
2240{
2241 if (skb->encapsulation) {
2242 u8 l4_proto = 0;
2243
2244 switch (vlan_get_protocol(skb)) {
2245 case htons(ETH_P_IP):
2246 l4_proto = ip_hdr(skb)->protocol;
2247 break;
2248 case htons(ETH_P_IPV6):
2249 l4_proto = ipv6_hdr(skb)->nexthdr;
2250 break;
2251 default:
2252 return features;
2253 }
2254
2255 /* Disable offloads for geneve tunnels, as HW can't parse
2256 * the geneve header which has option length greater than 32B.
2257 */
2258 if ((l4_proto == IPPROTO_UDP) &&
2259 ((skb_inner_mac_header(skb) -
2260 skb_transport_header(skb)) > QEDE_MAX_TUN_HDR_LEN))
2261 return features & ~(NETIF_F_CSUM_MASK |
2262 NETIF_F_GSO_MASK);
2263 }
2264
2265 return features;
2266}
2267
Yuval Mintz29502192015-10-26 11:02:29 +02002268static const struct net_device_ops qede_netdev_ops = {
2269 .ndo_open = qede_open,
2270 .ndo_stop = qede_close,
2271 .ndo_start_xmit = qede_start_xmit,
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002272 .ndo_set_rx_mode = qede_set_rx_mode,
2273 .ndo_set_mac_address = qede_set_mac_addr,
Yuval Mintz29502192015-10-26 11:02:29 +02002274 .ndo_validate_addr = eth_validate_addr,
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002275 .ndo_change_mtu = qede_change_mtu,
Yuval Mintz08feecd2016-05-11 16:36:20 +03002276#ifdef CONFIG_QED_SRIOV
Yuval Mintzeff16962016-05-11 16:36:21 +03002277 .ndo_set_vf_mac = qede_set_vf_mac,
Yuval Mintz08feecd2016-05-11 16:36:20 +03002278 .ndo_set_vf_vlan = qede_set_vf_vlan,
2279#endif
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002280 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2281 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
Yuval Mintzce2b8852016-05-26 11:01:18 +03002282 .ndo_set_features = qede_set_features,
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002283 .ndo_get_stats64 = qede_get_stats64,
Yuval Mintz733def62016-05-11 16:36:22 +03002284#ifdef CONFIG_QED_SRIOV
2285 .ndo_set_vf_link_state = qede_set_vf_link_state,
Yuval Mintz6ddc7602016-05-11 16:36:23 +03002286 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
Yuval Mintz73390ac2016-05-11 16:36:24 +03002287 .ndo_get_vf_config = qede_get_vf_config,
Yuval Mintz733def62016-05-11 16:36:22 +03002288 .ndo_set_vf_rate = qede_set_vf_rate,
2289#endif
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002290 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
2291 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
Manish Chopra25695852016-10-14 05:19:19 -04002292 .ndo_features_check = qede_features_check,
Yuval Mintz29502192015-10-26 11:02:29 +02002293};
2294
2295/* -------------------------------------------------------------------------
Yuval Mintze712d522015-10-26 11:02:27 +02002296 * START OF PROBE / REMOVE
2297 * -------------------------------------------------------------------------
2298 */
2299
2300static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2301 struct pci_dev *pdev,
2302 struct qed_dev_eth_info *info,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002303 u32 dp_module, u8 dp_level)
Yuval Mintze712d522015-10-26 11:02:27 +02002304{
2305 struct net_device *ndev;
2306 struct qede_dev *edev;
2307
2308 ndev = alloc_etherdev_mqs(sizeof(*edev),
Yuval Mintz1a635e42016-08-15 10:42:43 +03002309 info->num_queues, info->num_queues);
Yuval Mintze712d522015-10-26 11:02:27 +02002310 if (!ndev) {
2311 pr_err("etherdev allocation failed\n");
2312 return NULL;
2313 }
2314
2315 edev = netdev_priv(ndev);
2316 edev->ndev = ndev;
2317 edev->cdev = cdev;
2318 edev->pdev = pdev;
2319 edev->dp_module = dp_module;
2320 edev->dp_level = dp_level;
2321 edev->ops = qed_ops;
Yuval Mintz29502192015-10-26 11:02:29 +02002322 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2323 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
Yuval Mintze712d522015-10-26 11:02:27 +02002324
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002325 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
2326 info->num_queues, info->num_queues);
2327
Yuval Mintze712d522015-10-26 11:02:27 +02002328 SET_NETDEV_DEV(ndev, &pdev->dev);
2329
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002330 memset(&edev->stats, 0, sizeof(edev->stats));
Yuval Mintze712d522015-10-26 11:02:27 +02002331 memcpy(&edev->dev_info, info, sizeof(*info));
2332
2333 edev->num_tc = edev->dev_info.num_tc;
2334
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002335 INIT_LIST_HEAD(&edev->vlan_list);
2336
Yuval Mintze712d522015-10-26 11:02:27 +02002337 return edev;
2338}
2339
2340static void qede_init_ndev(struct qede_dev *edev)
2341{
2342 struct net_device *ndev = edev->ndev;
2343 struct pci_dev *pdev = edev->pdev;
2344 u32 hw_features;
2345
2346 pci_set_drvdata(pdev, ndev);
2347
2348 ndev->mem_start = edev->dev_info.common.pci_mem_start;
2349 ndev->base_addr = ndev->mem_start;
2350 ndev->mem_end = edev->dev_info.common.pci_mem_end;
2351 ndev->irq = edev->dev_info.common.pci_irq;
2352
2353 ndev->watchdog_timeo = TX_TIMEOUT;
2354
Yuval Mintz29502192015-10-26 11:02:29 +02002355 ndev->netdev_ops = &qede_netdev_ops;
2356
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002357 qede_set_ethtool_ops(ndev);
2358
Mintz, Yuval0183eb12016-10-31 22:26:53 +02002359 ndev->priv_flags |= IFF_UNICAST_FLT;
Yuval Mintz7b7e70f2016-10-14 05:19:20 -04002360
Yuval Mintze712d522015-10-26 11:02:27 +02002361 /* user-changeble features */
2362 hw_features = NETIF_F_GRO | NETIF_F_SG |
2363 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2364 NETIF_F_TSO | NETIF_F_TSO6;
2365
Manish Chopra14db81d2016-04-14 01:38:33 -04002366 /* Encap features*/
2367 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
Manish Chopraa1502412016-10-14 05:19:18 -04002368 NETIF_F_TSO_ECN | NETIF_F_GSO_UDP_TUNNEL_CSUM |
2369 NETIF_F_GSO_GRE_CSUM;
Manish Chopra14db81d2016-04-14 01:38:33 -04002370 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2371 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2372 NETIF_F_TSO6 | NETIF_F_GSO_GRE |
Manish Chopraa1502412016-10-14 05:19:18 -04002373 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM |
2374 NETIF_F_GSO_UDP_TUNNEL_CSUM |
2375 NETIF_F_GSO_GRE_CSUM;
Manish Chopra14db81d2016-04-14 01:38:33 -04002376
Yuval Mintze712d522015-10-26 11:02:27 +02002377 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2378 NETIF_F_HIGHDMA;
2379 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2380 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002381 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
Yuval Mintze712d522015-10-26 11:02:27 +02002382
2383 ndev->hw_features = hw_features;
2384
Jarod Wilsoncaff2a82016-10-17 15:54:08 -04002385 /* MTU range: 46 - 9600 */
2386 ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
2387 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
2388
Yuval Mintze712d522015-10-26 11:02:27 +02002389 /* Set network device HW mac */
2390 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +02002391
2392 ndev->mtu = edev->dev_info.common.mtu;
Yuval Mintze712d522015-10-26 11:02:27 +02002393}
2394
2395/* This function converts from 32b param to two params of level and module
2396 * Input 32b decoding:
2397 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2398 * 'happy' flow, e.g. memory allocation failed.
2399 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2400 * and provide important parameters.
2401 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2402 * module. VERBOSE prints are for tracking the specific flow in low level.
2403 *
2404 * Notice that the level should be that of the lowest required logs.
2405 */
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002406void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
Yuval Mintze712d522015-10-26 11:02:27 +02002407{
2408 *p_dp_level = QED_LEVEL_NOTICE;
2409 *p_dp_module = 0;
2410
2411 if (debug & QED_LOG_VERBOSE_MASK) {
2412 *p_dp_level = QED_LEVEL_VERBOSE;
2413 *p_dp_module = (debug & 0x3FFFFFFF);
2414 } else if (debug & QED_LOG_INFO_MASK) {
2415 *p_dp_level = QED_LEVEL_INFO;
2416 } else if (debug & QED_LOG_NOTICE_MASK) {
2417 *p_dp_level = QED_LEVEL_NOTICE;
2418 }
2419}
2420
Yuval Mintz29502192015-10-26 11:02:29 +02002421static void qede_free_fp_array(struct qede_dev *edev)
2422{
2423 if (edev->fp_array) {
2424 struct qede_fastpath *fp;
2425 int i;
2426
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002427 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02002428 fp = &edev->fp_array[i];
2429
2430 kfree(fp->sb_info);
2431 kfree(fp->rxq);
2432 kfree(fp->txqs);
2433 }
2434 kfree(edev->fp_array);
2435 }
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002436
2437 edev->num_queues = 0;
2438 edev->fp_num_tx = 0;
2439 edev->fp_num_rx = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02002440}
2441
2442static int qede_alloc_fp_array(struct qede_dev *edev)
2443{
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002444 u8 fp_combined, fp_rx = edev->fp_num_rx;
Yuval Mintz29502192015-10-26 11:02:29 +02002445 struct qede_fastpath *fp;
2446 int i;
2447
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002448 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
Yuval Mintz29502192015-10-26 11:02:29 +02002449 sizeof(*edev->fp_array), GFP_KERNEL);
2450 if (!edev->fp_array) {
2451 DP_NOTICE(edev, "fp array allocation failed\n");
2452 goto err;
2453 }
2454
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002455 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
2456
2457 /* Allocate the FP elements for Rx queues followed by combined and then
2458 * the Tx. This ordering should be maintained so that the respective
2459 * queues (Rx or Tx) will be together in the fastpath array and the
2460 * associated ids will be sequential.
2461 */
2462 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02002463 fp = &edev->fp_array[i];
2464
2465 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2466 if (!fp->sb_info) {
2467 DP_NOTICE(edev, "sb info struct allocation failed\n");
2468 goto err;
2469 }
2470
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002471 if (fp_rx) {
2472 fp->type = QEDE_FASTPATH_RX;
2473 fp_rx--;
2474 } else if (fp_combined) {
2475 fp->type = QEDE_FASTPATH_COMBINED;
2476 fp_combined--;
2477 } else {
2478 fp->type = QEDE_FASTPATH_TX;
Yuval Mintz29502192015-10-26 11:02:29 +02002479 }
2480
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002481 if (fp->type & QEDE_FASTPATH_TX) {
2482 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs),
2483 GFP_KERNEL);
2484 if (!fp->txqs) {
2485 DP_NOTICE(edev,
2486 "TXQ array allocation failed\n");
2487 goto err;
2488 }
2489 }
2490
2491 if (fp->type & QEDE_FASTPATH_RX) {
2492 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2493 if (!fp->rxq) {
2494 DP_NOTICE(edev,
2495 "RXQ struct allocation failed\n");
2496 goto err;
2497 }
Yuval Mintz29502192015-10-26 11:02:29 +02002498 }
2499 }
2500
2501 return 0;
2502err:
2503 qede_free_fp_array(edev);
2504 return -ENOMEM;
2505}
2506
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002507static void qede_sp_task(struct work_struct *work)
2508{
2509 struct qede_dev *edev = container_of(work, struct qede_dev,
2510 sp_task.work);
Manish Choprab18e1702016-04-14 01:38:30 -04002511 struct qed_dev *cdev = edev->cdev;
2512
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002513 mutex_lock(&edev->qede_lock);
2514
2515 if (edev->state == QEDE_STATE_OPEN) {
2516 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2517 qede_config_rx_mode(edev->ndev);
2518 }
2519
Manish Choprab18e1702016-04-14 01:38:30 -04002520 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2521 struct qed_tunn_params tunn_params;
2522
2523 memset(&tunn_params, 0, sizeof(tunn_params));
2524 tunn_params.update_vxlan_port = 1;
2525 tunn_params.vxlan_port = edev->vxlan_dst_port;
2526 qed_ops->tunn_config(cdev, &tunn_params);
2527 }
2528
Manish Chopra9a109dd2016-04-14 01:38:31 -04002529 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2530 struct qed_tunn_params tunn_params;
2531
2532 memset(&tunn_params, 0, sizeof(tunn_params));
2533 tunn_params.update_geneve_port = 1;
2534 tunn_params.geneve_port = edev->geneve_dst_port;
2535 qed_ops->tunn_config(cdev, &tunn_params);
2536 }
2537
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002538 mutex_unlock(&edev->qede_lock);
2539}
2540
Yuval Mintze712d522015-10-26 11:02:27 +02002541static void qede_update_pf_params(struct qed_dev *cdev)
2542{
2543 struct qed_pf_params pf_params;
2544
Sudarsana Reddy Kalluru8e0ddc02016-05-05 00:35:16 -04002545 /* 64 rx + 64 tx */
Yuval Mintze712d522015-10-26 11:02:27 +02002546 memset(&pf_params, 0, sizeof(struct qed_pf_params));
Sudarsana Reddy Kalluru8e0ddc02016-05-05 00:35:16 -04002547 pf_params.eth_pf_params.num_cons = 128;
Yuval Mintze712d522015-10-26 11:02:27 +02002548 qed_ops->common->update_pf_params(cdev, &pf_params);
2549}
2550
2551enum qede_probe_mode {
2552 QEDE_PROBE_NORMAL,
2553};
2554
2555static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002556 bool is_vf, enum qede_probe_mode mode)
Yuval Mintze712d522015-10-26 11:02:27 +02002557{
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002558 struct qed_probe_params probe_params;
Yuval Mintz1a635e42016-08-15 10:42:43 +03002559 struct qed_slowpath_params sp_params;
Yuval Mintze712d522015-10-26 11:02:27 +02002560 struct qed_dev_eth_info dev_info;
2561 struct qede_dev *edev;
2562 struct qed_dev *cdev;
2563 int rc;
2564
2565 if (unlikely(dp_level & QED_LEVEL_INFO))
2566 pr_notice("Starting qede probe\n");
2567
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002568 memset(&probe_params, 0, sizeof(probe_params));
2569 probe_params.protocol = QED_PROTOCOL_ETH;
2570 probe_params.dp_module = dp_module;
2571 probe_params.dp_level = dp_level;
2572 probe_params.is_vf = is_vf;
2573 cdev = qed_ops->common->probe(pdev, &probe_params);
Yuval Mintze712d522015-10-26 11:02:27 +02002574 if (!cdev) {
2575 rc = -ENODEV;
2576 goto err0;
2577 }
2578
2579 qede_update_pf_params(cdev);
2580
2581 /* Start the Slowpath-process */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002582 memset(&sp_params, 0, sizeof(sp_params));
2583 sp_params.int_mode = QED_INT_MODE_MSIX;
2584 sp_params.drv_major = QEDE_MAJOR_VERSION;
2585 sp_params.drv_minor = QEDE_MINOR_VERSION;
2586 sp_params.drv_rev = QEDE_REVISION_VERSION;
2587 sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
2588 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2589 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
Yuval Mintze712d522015-10-26 11:02:27 +02002590 if (rc) {
2591 pr_notice("Cannot start slowpath\n");
2592 goto err1;
2593 }
2594
2595 /* Learn information crucial for qede to progress */
2596 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2597 if (rc)
2598 goto err2;
2599
2600 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2601 dp_level);
2602 if (!edev) {
2603 rc = -ENOMEM;
2604 goto err2;
2605 }
2606
Yuval Mintzfefb0202016-05-11 16:36:19 +03002607 if (is_vf)
2608 edev->flags |= QEDE_FLAG_IS_VF;
2609
Yuval Mintze712d522015-10-26 11:02:27 +02002610 qede_init_ndev(edev);
2611
Ram Amranicee9fbd2016-10-01 21:59:56 +03002612 rc = qede_roce_dev_add(edev);
2613 if (rc)
2614 goto err3;
2615
Yuval Mintz29502192015-10-26 11:02:29 +02002616 rc = register_netdev(edev->ndev);
2617 if (rc) {
2618 DP_NOTICE(edev, "Cannot register net-device\n");
Ram Amranicee9fbd2016-10-01 21:59:56 +03002619 goto err4;
Yuval Mintz29502192015-10-26 11:02:29 +02002620 }
2621
Yuval Mintze712d522015-10-26 11:02:27 +02002622 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2623
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02002624 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2625
Sudarsana Reddy Kalluru489e45a2016-06-08 06:22:12 -04002626#ifdef CONFIG_DCB
Sudarsana Reddy Kalluru5fe118c2016-08-29 08:29:52 -04002627 if (!IS_VF(edev))
2628 qede_set_dcbnl_ops(edev->ndev);
Sudarsana Reddy Kalluru489e45a2016-06-08 06:22:12 -04002629#endif
2630
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002631 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2632 mutex_init(&edev->qede_lock);
Manish Chopra3d789992016-06-30 02:35:21 -04002633 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002634
Yuval Mintze712d522015-10-26 11:02:27 +02002635 DP_INFO(edev, "Ending successfully qede probe\n");
2636
2637 return 0;
2638
Ram Amranicee9fbd2016-10-01 21:59:56 +03002639err4:
2640 qede_roce_dev_remove(edev);
Yuval Mintz29502192015-10-26 11:02:29 +02002641err3:
2642 free_netdev(edev->ndev);
Yuval Mintze712d522015-10-26 11:02:27 +02002643err2:
2644 qed_ops->common->slowpath_stop(cdev);
2645err1:
2646 qed_ops->common->remove(cdev);
2647err0:
2648 return rc;
2649}
2650
2651static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2652{
Yuval Mintzfefb0202016-05-11 16:36:19 +03002653 bool is_vf = false;
Yuval Mintze712d522015-10-26 11:02:27 +02002654 u32 dp_module = 0;
2655 u8 dp_level = 0;
2656
Yuval Mintzfefb0202016-05-11 16:36:19 +03002657 switch ((enum qede_pci_private)id->driver_data) {
2658 case QEDE_PRIVATE_VF:
2659 if (debug & QED_LOG_VERBOSE_MASK)
2660 dev_err(&pdev->dev, "Probing a VF\n");
2661 is_vf = true;
2662 break;
2663 default:
2664 if (debug & QED_LOG_VERBOSE_MASK)
2665 dev_err(&pdev->dev, "Probing a PF\n");
2666 }
2667
Yuval Mintze712d522015-10-26 11:02:27 +02002668 qede_config_debug(debug, &dp_module, &dp_level);
2669
Yuval Mintzfefb0202016-05-11 16:36:19 +03002670 return __qede_probe(pdev, dp_module, dp_level, is_vf,
Yuval Mintze712d522015-10-26 11:02:27 +02002671 QEDE_PROBE_NORMAL);
2672}
2673
2674enum qede_remove_mode {
2675 QEDE_REMOVE_NORMAL,
2676};
2677
2678static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2679{
2680 struct net_device *ndev = pci_get_drvdata(pdev);
2681 struct qede_dev *edev = netdev_priv(ndev);
2682 struct qed_dev *cdev = edev->cdev;
2683
2684 DP_INFO(edev, "Starting qede_remove\n");
2685
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002686 cancel_delayed_work_sync(&edev->sp_task);
Ram Amranicee9fbd2016-10-01 21:59:56 +03002687
Yuval Mintz29502192015-10-26 11:02:29 +02002688 unregister_netdev(ndev);
2689
Ram Amranicee9fbd2016-10-01 21:59:56 +03002690 qede_roce_dev_remove(edev);
2691
Yuval Mintze712d522015-10-26 11:02:27 +02002692 edev->ops->common->set_power_state(cdev, PCI_D0);
2693
2694 pci_set_drvdata(pdev, NULL);
2695
2696 free_netdev(ndev);
2697
2698 /* Use global ops since we've freed edev */
2699 qed_ops->common->slowpath_stop(cdev);
Mintz, Yuval14d39642016-10-31 07:14:23 +02002700 if (system_state == SYSTEM_POWER_OFF)
2701 return;
Yuval Mintze712d522015-10-26 11:02:27 +02002702 qed_ops->common->remove(cdev);
2703
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002704 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
Yuval Mintze712d522015-10-26 11:02:27 +02002705}
2706
2707static void qede_remove(struct pci_dev *pdev)
2708{
2709 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2710}
Yuval Mintz29502192015-10-26 11:02:29 +02002711
Mintz, Yuval14d39642016-10-31 07:14:23 +02002712static void qede_shutdown(struct pci_dev *pdev)
2713{
2714 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2715}
2716
Yuval Mintz29502192015-10-26 11:02:29 +02002717/* -------------------------------------------------------------------------
2718 * START OF LOAD / UNLOAD
2719 * -------------------------------------------------------------------------
2720 */
2721
2722static int qede_set_num_queues(struct qede_dev *edev)
2723{
2724 int rc;
2725 u16 rss_num;
2726
2727 /* Setup queues according to possible resources*/
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002728 if (edev->req_queues)
2729 rss_num = edev->req_queues;
Sudarsana Kalluru8edf0492015-11-30 12:25:01 +02002730 else
2731 rss_num = netif_get_num_default_rss_queues() *
2732 edev->dev_info.common.num_hwfns;
Yuval Mintz29502192015-10-26 11:02:29 +02002733
2734 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2735
2736 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2737 if (rc > 0) {
2738 /* Managed to request interrupts for our queues */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002739 edev->num_queues = rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002740 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002741 QEDE_QUEUE_CNT(edev), rss_num);
Yuval Mintz29502192015-10-26 11:02:29 +02002742 rc = 0;
2743 }
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002744
2745 edev->fp_num_tx = edev->req_num_tx;
2746 edev->fp_num_rx = edev->req_num_rx;
2747
Yuval Mintz29502192015-10-26 11:02:29 +02002748 return rc;
2749}
2750
2751static void qede_free_mem_sb(struct qede_dev *edev,
2752 struct qed_sb_info *sb_info)
2753{
2754 if (sb_info->sb_virt)
2755 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2756 (void *)sb_info->sb_virt, sb_info->sb_phys);
2757}
2758
2759/* This function allocates fast-path status block memory */
2760static int qede_alloc_mem_sb(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002761 struct qed_sb_info *sb_info, u16 sb_id)
Yuval Mintz29502192015-10-26 11:02:29 +02002762{
2763 struct status_block *sb_virt;
2764 dma_addr_t sb_phys;
2765 int rc;
2766
2767 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002768 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
Yuval Mintz29502192015-10-26 11:02:29 +02002769 if (!sb_virt) {
2770 DP_ERR(edev, "Status block allocation failed\n");
2771 return -ENOMEM;
2772 }
2773
2774 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2775 sb_virt, sb_phys, sb_id,
2776 QED_SB_TYPE_L2_QUEUE);
2777 if (rc) {
2778 DP_ERR(edev, "Status block initialization failed\n");
2779 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2780 sb_virt, sb_phys);
2781 return rc;
2782 }
2783
2784 return 0;
2785}
2786
2787static void qede_free_rx_buffers(struct qede_dev *edev,
2788 struct qede_rx_queue *rxq)
2789{
2790 u16 i;
2791
2792 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2793 struct sw_rx_data *rx_buf;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002794 struct page *data;
Yuval Mintz29502192015-10-26 11:02:29 +02002795
2796 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2797 data = rx_buf->data;
2798
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002799 dma_unmap_page(&edev->pdev->dev,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002800 rx_buf->mapping, PAGE_SIZE, DMA_FROM_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +02002801
2802 rx_buf->data = NULL;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002803 __free_page(data);
Yuval Mintz29502192015-10-26 11:02:29 +02002804 }
2805}
2806
Yuval Mintz1a635e42016-08-15 10:42:43 +03002807static void qede_free_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
2808{
Manish Chopra55482ed2016-03-04 12:35:06 -05002809 int i;
2810
2811 if (edev->gro_disable)
2812 return;
2813
2814 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2815 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
Mintz, Yuval01e23012016-11-29 16:47:00 +02002816 struct sw_rx_data *replace_buf = &tpa_info->buffer;
Manish Chopra55482ed2016-03-04 12:35:06 -05002817
Manish Chopraf86af2d2016-04-20 03:03:27 -04002818 if (replace_buf->data) {
Manish Chopra55482ed2016-03-04 12:35:06 -05002819 dma_unmap_page(&edev->pdev->dev,
Manish Chopra09ec8e72016-05-18 07:43:57 -04002820 replace_buf->mapping,
Manish Chopra55482ed2016-03-04 12:35:06 -05002821 PAGE_SIZE, DMA_FROM_DEVICE);
2822 __free_page(replace_buf->data);
2823 }
2824 }
2825}
2826
Yuval Mintz1a635e42016-08-15 10:42:43 +03002827static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +02002828{
Manish Chopra55482ed2016-03-04 12:35:06 -05002829 qede_free_sge_mem(edev, rxq);
2830
Yuval Mintz29502192015-10-26 11:02:29 +02002831 /* Free rx buffers */
2832 qede_free_rx_buffers(edev, rxq);
2833
2834 /* Free the parallel SW ring */
2835 kfree(rxq->sw_rx_ring);
2836
2837 /* Free the real RQ ring used by FW */
2838 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2839 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2840}
2841
2842static int qede_alloc_rx_buffer(struct qede_dev *edev,
2843 struct qede_rx_queue *rxq)
2844{
2845 struct sw_rx_data *sw_rx_data;
2846 struct eth_rx_bd *rx_bd;
2847 dma_addr_t mapping;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002848 struct page *data;
Yuval Mintz29502192015-10-26 11:02:29 +02002849
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002850 data = alloc_pages(GFP_ATOMIC, 0);
Yuval Mintz29502192015-10-26 11:02:29 +02002851 if (unlikely(!data)) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002852 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
Yuval Mintz29502192015-10-26 11:02:29 +02002853 return -ENOMEM;
2854 }
2855
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002856 /* Map the entire page as it would be used
2857 * for multiple RX buffer segment size mapping.
2858 */
2859 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2860 PAGE_SIZE, DMA_FROM_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +02002861 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002862 __free_page(data);
Yuval Mintz29502192015-10-26 11:02:29 +02002863 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2864 return -ENOMEM;
2865 }
2866
2867 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002868 sw_rx_data->page_offset = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02002869 sw_rx_data->data = data;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002870 sw_rx_data->mapping = mapping;
Yuval Mintz29502192015-10-26 11:02:29 +02002871
2872 /* Advance PROD and get BD pointer */
2873 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2874 WARN_ON(!rx_bd);
2875 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2876 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2877
2878 rxq->sw_rx_prod++;
2879
2880 return 0;
2881}
2882
Yuval Mintz1a635e42016-08-15 10:42:43 +03002883static int qede_alloc_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
Manish Chopra55482ed2016-03-04 12:35:06 -05002884{
2885 dma_addr_t mapping;
2886 int i;
2887
2888 if (edev->gro_disable)
2889 return 0;
2890
2891 if (edev->ndev->mtu > PAGE_SIZE) {
2892 edev->gro_disable = 1;
2893 return 0;
2894 }
2895
2896 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2897 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
Mintz, Yuval01e23012016-11-29 16:47:00 +02002898 struct sw_rx_data *replace_buf = &tpa_info->buffer;
Manish Chopra55482ed2016-03-04 12:35:06 -05002899
2900 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2901 if (unlikely(!replace_buf->data)) {
2902 DP_NOTICE(edev,
2903 "Failed to allocate TPA skb pool [replacement buffer]\n");
2904 goto err;
2905 }
2906
2907 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
Mintz, Yuval95129252016-11-02 16:36:46 +02002908 PAGE_SIZE, DMA_FROM_DEVICE);
Manish Chopra55482ed2016-03-04 12:35:06 -05002909 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2910 DP_NOTICE(edev,
2911 "Failed to map TPA replacement buffer\n");
2912 goto err;
2913 }
2914
Manish Chopra09ec8e72016-05-18 07:43:57 -04002915 replace_buf->mapping = mapping;
Mintz, Yuval01e23012016-11-29 16:47:00 +02002916 tpa_info->buffer.page_offset = 0;
2917 tpa_info->buffer_mapping = mapping;
2918 tpa_info->state = QEDE_AGG_STATE_NONE;
Manish Chopra55482ed2016-03-04 12:35:06 -05002919 }
2920
2921 return 0;
2922err:
2923 qede_free_sge_mem(edev, rxq);
2924 edev->gro_disable = 1;
2925 return -ENOMEM;
2926}
2927
Yuval Mintz29502192015-10-26 11:02:29 +02002928/* This function allocates all memory needed per Rx queue */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002929static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +02002930{
Manish Chopraf86af2d2016-04-20 03:03:27 -04002931 int i, rc, size;
Yuval Mintz29502192015-10-26 11:02:29 +02002932
2933 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2934
Yuval Mintz1a635e42016-08-15 10:42:43 +03002935 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
2936
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002937 if (rxq->rx_buf_size > PAGE_SIZE)
2938 rxq->rx_buf_size = PAGE_SIZE;
2939
2940 /* Segment size to spilt a page in multiple equal parts */
2941 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
Yuval Mintz29502192015-10-26 11:02:29 +02002942
2943 /* Allocate the parallel driver ring for Rx buffers */
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002944 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
Yuval Mintz29502192015-10-26 11:02:29 +02002945 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2946 if (!rxq->sw_rx_ring) {
2947 DP_ERR(edev, "Rx buffers ring allocation failed\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04002948 rc = -ENOMEM;
Yuval Mintz29502192015-10-26 11:02:29 +02002949 goto err;
2950 }
2951
2952 /* Allocate FW Rx ring */
2953 rc = edev->ops->common->chain_alloc(edev->cdev,
2954 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2955 QED_CHAIN_MODE_NEXT_PTR,
Yuval Mintza91eb522016-06-03 14:35:32 +03002956 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002957 RX_RING_SIZE,
Yuval Mintz29502192015-10-26 11:02:29 +02002958 sizeof(struct eth_rx_bd),
2959 &rxq->rx_bd_ring);
2960
2961 if (rc)
2962 goto err;
2963
2964 /* Allocate FW completion ring */
2965 rc = edev->ops->common->chain_alloc(edev->cdev,
2966 QED_CHAIN_USE_TO_CONSUME,
2967 QED_CHAIN_MODE_PBL,
Yuval Mintza91eb522016-06-03 14:35:32 +03002968 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002969 RX_RING_SIZE,
Yuval Mintz29502192015-10-26 11:02:29 +02002970 sizeof(union eth_rx_cqe),
2971 &rxq->rx_comp_ring);
2972 if (rc)
2973 goto err;
2974
2975 /* Allocate buffers for the Rx ring */
2976 for (i = 0; i < rxq->num_rx_buffers; i++) {
2977 rc = qede_alloc_rx_buffer(edev, rxq);
Manish Chopraf86af2d2016-04-20 03:03:27 -04002978 if (rc) {
2979 DP_ERR(edev,
2980 "Rx buffers allocation failed at index %d\n", i);
2981 goto err;
2982 }
Yuval Mintz29502192015-10-26 11:02:29 +02002983 }
2984
Manish Chopraf86af2d2016-04-20 03:03:27 -04002985 rc = qede_alloc_sge_mem(edev, rxq);
Yuval Mintz29502192015-10-26 11:02:29 +02002986err:
Manish Chopraf86af2d2016-04-20 03:03:27 -04002987 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002988}
2989
Yuval Mintz1a635e42016-08-15 10:42:43 +03002990static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +02002991{
2992 /* Free the parallel SW ring */
2993 kfree(txq->sw_tx_ring);
2994
2995 /* Free the real RQ ring used by FW */
2996 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2997}
2998
2999/* This function allocates all memory needed per Tx queue */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003000static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +02003001{
3002 int size, rc;
3003 union eth_tx_bd_types *p_virt;
3004
3005 txq->num_tx_buffers = edev->q_num_tx_buffers;
3006
3007 /* Allocate the parallel driver ring for Tx buffers */
Mintz, Yuval087892d2016-10-29 17:04:35 +03003008 size = sizeof(*txq->sw_tx_ring) * TX_RING_SIZE;
Yuval Mintz29502192015-10-26 11:02:29 +02003009 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
3010 if (!txq->sw_tx_ring) {
3011 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
3012 goto err;
3013 }
3014
3015 rc = edev->ops->common->chain_alloc(edev->cdev,
3016 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
3017 QED_CHAIN_MODE_PBL,
Yuval Mintza91eb522016-06-03 14:35:32 +03003018 QED_CHAIN_CNT_TYPE_U16,
Mintz, Yuval087892d2016-10-29 17:04:35 +03003019 TX_RING_SIZE,
Yuval Mintza91eb522016-06-03 14:35:32 +03003020 sizeof(*p_virt), &txq->tx_pbl);
Yuval Mintz29502192015-10-26 11:02:29 +02003021 if (rc)
3022 goto err;
3023
3024 return 0;
3025
3026err:
3027 qede_free_mem_txq(edev, txq);
3028 return -ENOMEM;
3029}
3030
3031/* This function frees all memory of a single fp */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003032static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
Yuval Mintz29502192015-10-26 11:02:29 +02003033{
3034 int tc;
3035
3036 qede_free_mem_sb(edev, fp->sb_info);
3037
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003038 if (fp->type & QEDE_FASTPATH_RX)
3039 qede_free_mem_rxq(edev, fp->rxq);
Yuval Mintz29502192015-10-26 11:02:29 +02003040
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003041 if (fp->type & QEDE_FASTPATH_TX)
3042 for (tc = 0; tc < edev->num_tc; tc++)
3043 qede_free_mem_txq(edev, &fp->txqs[tc]);
Yuval Mintz29502192015-10-26 11:02:29 +02003044}
3045
3046/* This function allocates all memory needed for a single fp (i.e. an entity
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003047 * which contains status block, one rx queue and/or multiple per-TC tx queues.
Yuval Mintz29502192015-10-26 11:02:29 +02003048 */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003049static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
Yuval Mintz29502192015-10-26 11:02:29 +02003050{
3051 int rc, tc;
3052
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003053 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
Yuval Mintz29502192015-10-26 11:02:29 +02003054 if (rc)
3055 goto err;
3056
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003057 if (fp->type & QEDE_FASTPATH_RX) {
3058 rc = qede_alloc_mem_rxq(edev, fp->rxq);
Yuval Mintz29502192015-10-26 11:02:29 +02003059 if (rc)
3060 goto err;
3061 }
3062
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003063 if (fp->type & QEDE_FASTPATH_TX) {
3064 for (tc = 0; tc < edev->num_tc; tc++) {
3065 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
3066 if (rc)
3067 goto err;
3068 }
3069 }
3070
Yuval Mintz29502192015-10-26 11:02:29 +02003071 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +02003072err:
Manish Chopraf86af2d2016-04-20 03:03:27 -04003073 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003074}
3075
3076static void qede_free_mem_load(struct qede_dev *edev)
3077{
3078 int i;
3079
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003080 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003081 struct qede_fastpath *fp = &edev->fp_array[i];
3082
3083 qede_free_mem_fp(edev, fp);
3084 }
3085}
3086
3087/* This function allocates all qede memory at NIC load. */
3088static int qede_alloc_mem_load(struct qede_dev *edev)
3089{
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003090 int rc = 0, queue_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003091
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003092 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
3093 struct qede_fastpath *fp = &edev->fp_array[queue_id];
Yuval Mintz29502192015-10-26 11:02:29 +02003094
3095 rc = qede_alloc_mem_fp(edev, fp);
Manish Chopraf86af2d2016-04-20 03:03:27 -04003096 if (rc) {
Yuval Mintz29502192015-10-26 11:02:29 +02003097 DP_ERR(edev,
Manish Chopraf86af2d2016-04-20 03:03:27 -04003098 "Failed to allocate memory for fastpath - rss id = %d\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003099 queue_id);
Manish Chopraf86af2d2016-04-20 03:03:27 -04003100 qede_free_mem_load(edev);
3101 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003102 }
Yuval Mintz29502192015-10-26 11:02:29 +02003103 }
3104
3105 return 0;
3106}
3107
3108/* This function inits fp content and resets the SB, RXQ and TXQ structures */
3109static void qede_init_fp(struct qede_dev *edev)
3110{
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003111 int queue_id, rxq_index = 0, txq_index = 0, tc;
Yuval Mintz29502192015-10-26 11:02:29 +02003112 struct qede_fastpath *fp;
3113
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003114 for_each_queue(queue_id) {
3115 fp = &edev->fp_array[queue_id];
Yuval Mintz29502192015-10-26 11:02:29 +02003116
3117 fp->edev = edev;
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003118 fp->id = queue_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003119
3120 memset((void *)&fp->napi, 0, sizeof(fp->napi));
3121
3122 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
3123
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003124 if (fp->type & QEDE_FASTPATH_RX) {
3125 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
3126 fp->rxq->rxq_id = rxq_index++;
3127 }
Yuval Mintz29502192015-10-26 11:02:29 +02003128
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003129 if (fp->type & QEDE_FASTPATH_TX) {
3130 memset((void *)fp->txqs, 0,
3131 (edev->num_tc * sizeof(*fp->txqs)));
3132 for (tc = 0; tc < edev->num_tc; tc++) {
3133 fp->txqs[tc].index = txq_index +
3134 tc * QEDE_TSS_COUNT(edev);
3135 if (edev->dev_info.is_legacy)
3136 fp->txqs[tc].is_legacy = true;
3137 }
3138 txq_index++;
Yuval Mintz29502192015-10-26 11:02:29 +02003139 }
3140
3141 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003142 edev->ndev->name, queue_id);
Yuval Mintz29502192015-10-26 11:02:29 +02003143 }
Manish Chopra55482ed2016-03-04 12:35:06 -05003144
3145 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
Yuval Mintz29502192015-10-26 11:02:29 +02003146}
3147
3148static int qede_set_real_num_queues(struct qede_dev *edev)
3149{
3150 int rc = 0;
3151
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003152 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_COUNT(edev));
Yuval Mintz29502192015-10-26 11:02:29 +02003153 if (rc) {
3154 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
3155 return rc;
3156 }
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003157
3158 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
Yuval Mintz29502192015-10-26 11:02:29 +02003159 if (rc) {
3160 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
3161 return rc;
3162 }
3163
3164 return 0;
3165}
3166
3167static void qede_napi_disable_remove(struct qede_dev *edev)
3168{
3169 int i;
3170
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003171 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003172 napi_disable(&edev->fp_array[i].napi);
3173
3174 netif_napi_del(&edev->fp_array[i].napi);
3175 }
3176}
3177
3178static void qede_napi_add_enable(struct qede_dev *edev)
3179{
3180 int i;
3181
3182 /* Add NAPI objects */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003183 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003184 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
3185 qede_poll, NAPI_POLL_WEIGHT);
3186 napi_enable(&edev->fp_array[i].napi);
3187 }
3188}
3189
3190static void qede_sync_free_irqs(struct qede_dev *edev)
3191{
3192 int i;
3193
3194 for (i = 0; i < edev->int_info.used_cnt; i++) {
3195 if (edev->int_info.msix_cnt) {
3196 synchronize_irq(edev->int_info.msix[i].vector);
3197 free_irq(edev->int_info.msix[i].vector,
3198 &edev->fp_array[i]);
3199 } else {
3200 edev->ops->common->simd_handler_clean(edev->cdev, i);
3201 }
3202 }
3203
3204 edev->int_info.used_cnt = 0;
3205}
3206
3207static int qede_req_msix_irqs(struct qede_dev *edev)
3208{
3209 int i, rc;
3210
3211 /* Sanitize number of interrupts == number of prepared RSS queues */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003212 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
Yuval Mintz29502192015-10-26 11:02:29 +02003213 DP_ERR(edev,
3214 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003215 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
Yuval Mintz29502192015-10-26 11:02:29 +02003216 return -EINVAL;
3217 }
3218
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003219 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
Yuval Mintz29502192015-10-26 11:02:29 +02003220 rc = request_irq(edev->int_info.msix[i].vector,
3221 qede_msix_fp_int, 0, edev->fp_array[i].name,
3222 &edev->fp_array[i]);
3223 if (rc) {
3224 DP_ERR(edev, "Request fp %d irq failed\n", i);
3225 qede_sync_free_irqs(edev);
3226 return rc;
3227 }
3228 DP_VERBOSE(edev, NETIF_MSG_INTR,
3229 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
3230 edev->fp_array[i].name, i,
3231 &edev->fp_array[i]);
3232 edev->int_info.used_cnt++;
3233 }
3234
3235 return 0;
3236}
3237
3238static void qede_simd_fp_handler(void *cookie)
3239{
3240 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
3241
3242 napi_schedule_irqoff(&fp->napi);
3243}
3244
3245static int qede_setup_irqs(struct qede_dev *edev)
3246{
3247 int i, rc = 0;
3248
3249 /* Learn Interrupt configuration */
3250 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
3251 if (rc)
3252 return rc;
3253
3254 if (edev->int_info.msix_cnt) {
3255 rc = qede_req_msix_irqs(edev);
3256 if (rc)
3257 return rc;
3258 edev->ndev->irq = edev->int_info.msix[0].vector;
3259 } else {
3260 const struct qed_common_ops *ops;
3261
3262 /* qed should learn receive the RSS ids and callbacks */
3263 ops = edev->ops->common;
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003264 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
Yuval Mintz29502192015-10-26 11:02:29 +02003265 ops->simd_handler_config(edev->cdev,
3266 &edev->fp_array[i], i,
3267 qede_simd_fp_handler);
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003268 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
Yuval Mintz29502192015-10-26 11:02:29 +02003269 }
3270 return 0;
3271}
3272
3273static int qede_drain_txq(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +03003274 struct qede_tx_queue *txq, bool allow_drain)
Yuval Mintz29502192015-10-26 11:02:29 +02003275{
3276 int rc, cnt = 1000;
3277
3278 while (txq->sw_tx_cons != txq->sw_tx_prod) {
3279 if (!cnt) {
3280 if (allow_drain) {
3281 DP_NOTICE(edev,
3282 "Tx queue[%d] is stuck, requesting MCP to drain\n",
3283 txq->index);
3284 rc = edev->ops->common->drain(edev->cdev);
3285 if (rc)
3286 return rc;
3287 return qede_drain_txq(edev, txq, false);
3288 }
3289 DP_NOTICE(edev,
3290 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
3291 txq->index, txq->sw_tx_prod,
3292 txq->sw_tx_cons);
3293 return -ENODEV;
3294 }
3295 cnt--;
3296 usleep_range(1000, 2000);
3297 barrier();
3298 }
3299
3300 /* FW finished processing, wait for HW to transmit all tx packets */
3301 usleep_range(1000, 2000);
3302
3303 return 0;
3304}
3305
3306static int qede_stop_queues(struct qede_dev *edev)
3307{
3308 struct qed_update_vport_params vport_update_params;
3309 struct qed_dev *cdev = edev->cdev;
3310 int rc, tc, i;
3311
3312 /* Disable the vport */
3313 memset(&vport_update_params, 0, sizeof(vport_update_params));
3314 vport_update_params.vport_id = 0;
3315 vport_update_params.update_vport_active_flg = 1;
3316 vport_update_params.vport_active_flg = 0;
3317 vport_update_params.update_rss_flg = 0;
3318
3319 rc = edev->ops->vport_update(cdev, &vport_update_params);
3320 if (rc) {
3321 DP_ERR(edev, "Failed to update vport\n");
3322 return rc;
3323 }
3324
3325 /* Flush Tx queues. If needed, request drain from MCP */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003326 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003327 struct qede_fastpath *fp = &edev->fp_array[i];
3328
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003329 if (fp->type & QEDE_FASTPATH_TX) {
3330 for (tc = 0; tc < edev->num_tc; tc++) {
3331 struct qede_tx_queue *txq = &fp->txqs[tc];
Yuval Mintz29502192015-10-26 11:02:29 +02003332
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003333 rc = qede_drain_txq(edev, txq, true);
3334 if (rc)
3335 return rc;
3336 }
Yuval Mintz29502192015-10-26 11:02:29 +02003337 }
3338 }
3339
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003340 /* Stop all Queues in reverse order */
3341 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
Yuval Mintz29502192015-10-26 11:02:29 +02003342 struct qed_stop_rxq_params rx_params;
3343
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003344 /* Stop the Tx Queue(s) */
3345 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
3346 for (tc = 0; tc < edev->num_tc; tc++) {
3347 struct qed_stop_txq_params tx_params;
3348 u8 val;
Yuval Mintz29502192015-10-26 11:02:29 +02003349
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003350 tx_params.rss_id = i;
3351 val = edev->fp_array[i].txqs[tc].index;
3352 tx_params.tx_queue_id = val;
3353 rc = edev->ops->q_tx_stop(cdev, &tx_params);
3354 if (rc) {
3355 DP_ERR(edev, "Failed to stop TXQ #%d\n",
3356 tx_params.tx_queue_id);
3357 return rc;
3358 }
Yuval Mintz29502192015-10-26 11:02:29 +02003359 }
3360 }
3361
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003362 /* Stop the Rx Queue */
3363 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
3364 memset(&rx_params, 0, sizeof(rx_params));
3365 rx_params.rss_id = i;
3366 rx_params.rx_queue_id = edev->fp_array[i].rxq->rxq_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003367
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003368 rc = edev->ops->q_rx_stop(cdev, &rx_params);
3369 if (rc) {
3370 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3371 return rc;
3372 }
Yuval Mintz29502192015-10-26 11:02:29 +02003373 }
3374 }
3375
3376 /* Stop the vport */
3377 rc = edev->ops->vport_stop(cdev, 0);
3378 if (rc)
3379 DP_ERR(edev, "Failed to stop VPORT\n");
3380
3381 return rc;
3382}
3383
Yuval Mintza0d26d52016-06-19 15:18:13 +03003384static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
Yuval Mintz29502192015-10-26 11:02:29 +02003385{
3386 int rc, tc, i;
Manish Chopra088c8612016-03-04 12:35:05 -05003387 int vlan_removal_en = 1;
Yuval Mintz29502192015-10-26 11:02:29 +02003388 struct qed_dev *cdev = edev->cdev;
Yuval Mintz29502192015-10-26 11:02:29 +02003389 struct qed_update_vport_params vport_update_params;
3390 struct qed_queue_start_common_params q_params;
Yuval Mintzfefb0202016-05-11 16:36:19 +03003391 struct qed_dev_info *qed_info = &edev->dev_info.common;
Manish Chopra088c8612016-03-04 12:35:05 -05003392 struct qed_start_vport_params start = {0};
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003393 bool reset_rss_indir = false;
Yuval Mintz29502192015-10-26 11:02:29 +02003394
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003395 if (!edev->num_queues) {
Yuval Mintz29502192015-10-26 11:02:29 +02003396 DP_ERR(edev,
3397 "Cannot update V-VPORT as active as there are no Rx queues\n");
3398 return -EINVAL;
3399 }
3400
Manish Chopra55482ed2016-03-04 12:35:06 -05003401 start.gro_enable = !edev->gro_disable;
Manish Chopra088c8612016-03-04 12:35:05 -05003402 start.mtu = edev->ndev->mtu;
3403 start.vport_id = 0;
3404 start.drop_ttl0 = true;
3405 start.remove_inner_vlan = vlan_removal_en;
Yuval Mintz7f7a1442016-07-27 14:45:22 +03003406 start.clear_stats = clear_stats;
Manish Chopra088c8612016-03-04 12:35:05 -05003407
3408 rc = edev->ops->vport_start(cdev, &start);
Yuval Mintz29502192015-10-26 11:02:29 +02003409
3410 if (rc) {
3411 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3412 return rc;
3413 }
3414
3415 DP_VERBOSE(edev, NETIF_MSG_IFUP,
3416 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
Manish Chopra088c8612016-03-04 12:35:05 -05003417 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
Yuval Mintz29502192015-10-26 11:02:29 +02003418
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003419 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003420 struct qede_fastpath *fp = &edev->fp_array[i];
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003421 dma_addr_t p_phys_table;
3422 u32 page_cnt;
Yuval Mintz29502192015-10-26 11:02:29 +02003423
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003424 if (fp->type & QEDE_FASTPATH_RX) {
3425 struct qede_rx_queue *rxq = fp->rxq;
3426 __le16 *val;
Yuval Mintz29502192015-10-26 11:02:29 +02003427
3428 memset(&q_params, 0, sizeof(q_params));
3429 q_params.rss_id = i;
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003430 q_params.queue_id = rxq->rxq_id;
3431 q_params.vport_id = 0;
3432 q_params.sb = fp->sb_info->igu_sb_id;
3433 q_params.sb_idx = RX_PI;
3434
3435 p_phys_table =
3436 qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
3437 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
3438
3439 rc = edev->ops->q_rx_start(cdev, &q_params,
3440 rxq->rx_buf_size,
3441 rxq->rx_bd_ring.p_phys_addr,
3442 p_phys_table,
3443 page_cnt,
3444 &rxq->hw_rxq_prod_addr);
3445 if (rc) {
3446 DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
3447 rc);
3448 return rc;
3449 }
3450
3451 val = &fp->sb_info->sb_virt->pi_array[RX_PI];
3452 rxq->hw_cons_ptr = val;
3453
3454 qede_update_rx_prod(edev, rxq);
3455 }
3456
3457 if (!(fp->type & QEDE_FASTPATH_TX))
3458 continue;
3459
3460 for (tc = 0; tc < edev->num_tc; tc++) {
3461 struct qede_tx_queue *txq = &fp->txqs[tc];
3462
3463 p_phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
3464 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
3465
3466 memset(&q_params, 0, sizeof(q_params));
3467 q_params.rss_id = i;
3468 q_params.queue_id = txq->index;
Yuval Mintz29502192015-10-26 11:02:29 +02003469 q_params.vport_id = 0;
3470 q_params.sb = fp->sb_info->igu_sb_id;
3471 q_params.sb_idx = TX_PI(tc);
3472
3473 rc = edev->ops->q_tx_start(cdev, &q_params,
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003474 p_phys_table, page_cnt,
Yuval Mintz29502192015-10-26 11:02:29 +02003475 &txq->doorbell_addr);
3476 if (rc) {
3477 DP_ERR(edev, "Start TXQ #%d failed %d\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003478 txq->index, rc);
Yuval Mintz29502192015-10-26 11:02:29 +02003479 return rc;
3480 }
3481
3482 txq->hw_cons_ptr =
3483 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
3484 SET_FIELD(txq->tx_db.data.params,
3485 ETH_DB_DATA_DEST, DB_DEST_XCM);
3486 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3487 DB_AGG_CMD_SET);
3488 SET_FIELD(txq->tx_db.data.params,
3489 ETH_DB_DATA_AGG_VAL_SEL,
3490 DQ_XCM_ETH_TX_BD_PROD_CMD);
3491
3492 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3493 }
3494 }
3495
3496 /* Prepare and send the vport enable */
3497 memset(&vport_update_params, 0, sizeof(vport_update_params));
Manish Chopra088c8612016-03-04 12:35:05 -05003498 vport_update_params.vport_id = start.vport_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003499 vport_update_params.update_vport_active_flg = 1;
3500 vport_update_params.vport_active_flg = 1;
3501
Yuval Mintz831bfb0e2016-05-11 16:36:25 +03003502 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
3503 qed_info->tx_switching) {
3504 vport_update_params.update_tx_switching_flg = 1;
3505 vport_update_params.tx_switching_flg = 1;
3506 }
3507
Yuval Mintz29502192015-10-26 11:02:29 +02003508 /* Fill struct with RSS params */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003509 if (QEDE_RSS_COUNT(edev) > 1) {
Yuval Mintz29502192015-10-26 11:02:29 +02003510 vport_update_params.update_rss_flg = 1;
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003511
3512 /* Need to validate current RSS config uses valid entries */
3513 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3514 if (edev->rss_params.rss_ind_table[i] >=
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003515 QEDE_RSS_COUNT(edev)) {
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003516 reset_rss_indir = true;
3517 break;
3518 }
3519 }
3520
3521 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3522 reset_rss_indir) {
3523 u16 val;
3524
3525 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3526 u16 indir_val;
3527
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003528 val = QEDE_RSS_COUNT(edev);
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003529 indir_val = ethtool_rxfh_indir_default(i, val);
3530 edev->rss_params.rss_ind_table[i] = indir_val;
3531 }
3532 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3533 }
3534
3535 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3536 netdev_rss_key_fill(edev->rss_params.rss_key,
3537 sizeof(edev->rss_params.rss_key));
3538 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3539 }
3540
3541 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3542 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3543 QED_RSS_IPV6 |
3544 QED_RSS_IPV4_TCP |
3545 QED_RSS_IPV6_TCP;
3546 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3547 }
3548
3549 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3550 sizeof(vport_update_params.rss_params));
Yuval Mintz29502192015-10-26 11:02:29 +02003551 } else {
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003552 memset(&vport_update_params.rss_params, 0,
3553 sizeof(vport_update_params.rss_params));
Yuval Mintz29502192015-10-26 11:02:29 +02003554 }
Yuval Mintz29502192015-10-26 11:02:29 +02003555
3556 rc = edev->ops->vport_update(cdev, &vport_update_params);
3557 if (rc) {
3558 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3559 return rc;
3560 }
3561
3562 return 0;
3563}
3564
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003565static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3566 enum qed_filter_xcast_params_type opcode,
3567 unsigned char *mac, int num_macs)
3568{
3569 struct qed_filter_params filter_cmd;
3570 int i;
3571
3572 memset(&filter_cmd, 0, sizeof(filter_cmd));
3573 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3574 filter_cmd.filter.mcast.type = opcode;
3575 filter_cmd.filter.mcast.num = num_macs;
3576
3577 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3578 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3579
3580 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3581}
3582
Yuval Mintz29502192015-10-26 11:02:29 +02003583enum qede_unload_mode {
3584 QEDE_UNLOAD_NORMAL,
3585};
3586
3587static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3588{
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003589 struct qed_link_params link_params;
Yuval Mintz29502192015-10-26 11:02:29 +02003590 int rc;
3591
3592 DP_INFO(edev, "Starting qede unload\n");
3593
Ram Amranicee9fbd2016-10-01 21:59:56 +03003594 qede_roce_dev_event_close(edev);
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003595 mutex_lock(&edev->qede_lock);
3596 edev->state = QEDE_STATE_CLOSED;
3597
Yuval Mintz29502192015-10-26 11:02:29 +02003598 /* Close OS Tx */
3599 netif_tx_disable(edev->ndev);
3600 netif_carrier_off(edev->ndev);
3601
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003602 /* Reset the link */
3603 memset(&link_params, 0, sizeof(link_params));
3604 link_params.link_up = false;
3605 edev->ops->common->set_link(edev->cdev, &link_params);
Yuval Mintz29502192015-10-26 11:02:29 +02003606 rc = qede_stop_queues(edev);
3607 if (rc) {
3608 qede_sync_free_irqs(edev);
3609 goto out;
3610 }
3611
3612 DP_INFO(edev, "Stopped Queues\n");
3613
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003614 qede_vlan_mark_nonconfigured(edev);
Yuval Mintz29502192015-10-26 11:02:29 +02003615 edev->ops->fastpath_stop(edev->cdev);
3616
3617 /* Release the interrupts */
3618 qede_sync_free_irqs(edev);
3619 edev->ops->common->set_fp_int(edev->cdev, 0);
3620
3621 qede_napi_disable_remove(edev);
3622
3623 qede_free_mem_load(edev);
3624 qede_free_fp_array(edev);
3625
3626out:
3627 mutex_unlock(&edev->qede_lock);
3628 DP_INFO(edev, "Ending qede unload\n");
3629}
3630
3631enum qede_load_mode {
3632 QEDE_LOAD_NORMAL,
Yuval Mintza0d26d52016-06-19 15:18:13 +03003633 QEDE_LOAD_RELOAD,
Yuval Mintz29502192015-10-26 11:02:29 +02003634};
3635
3636static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3637{
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003638 struct qed_link_params link_params;
3639 struct qed_link_output link_output;
Yuval Mintz29502192015-10-26 11:02:29 +02003640 int rc;
3641
3642 DP_INFO(edev, "Starting qede load\n");
3643
3644 rc = qede_set_num_queues(edev);
3645 if (rc)
3646 goto err0;
3647
3648 rc = qede_alloc_fp_array(edev);
3649 if (rc)
3650 goto err0;
3651
3652 qede_init_fp(edev);
3653
3654 rc = qede_alloc_mem_load(edev);
3655 if (rc)
3656 goto err1;
3657 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003658 QEDE_QUEUE_CNT(edev), edev->num_tc);
Yuval Mintz29502192015-10-26 11:02:29 +02003659
3660 rc = qede_set_real_num_queues(edev);
3661 if (rc)
3662 goto err2;
3663
3664 qede_napi_add_enable(edev);
3665 DP_INFO(edev, "Napi added and enabled\n");
3666
3667 rc = qede_setup_irqs(edev);
3668 if (rc)
3669 goto err3;
3670 DP_INFO(edev, "Setup IRQs succeeded\n");
3671
Yuval Mintza0d26d52016-06-19 15:18:13 +03003672 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
Yuval Mintz29502192015-10-26 11:02:29 +02003673 if (rc)
3674 goto err4;
3675 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3676
3677 /* Add primary mac and set Rx filters */
3678 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3679
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003680 mutex_lock(&edev->qede_lock);
3681 edev->state = QEDE_STATE_OPEN;
3682 mutex_unlock(&edev->qede_lock);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003683
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003684 /* Program un-configured VLANs */
3685 qede_configure_vlan_filters(edev);
3686
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003687 /* Ask for link-up using current configuration */
3688 memset(&link_params, 0, sizeof(link_params));
3689 link_params.link_up = true;
3690 edev->ops->common->set_link(edev->cdev, &link_params);
3691
3692 /* Query whether link is already-up */
3693 memset(&link_output, 0, sizeof(link_output));
3694 edev->ops->common->get_link(edev->cdev, &link_output);
Ram Amranicee9fbd2016-10-01 21:59:56 +03003695 qede_roce_dev_event_open(edev);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003696 qede_link_update(edev, &link_output);
3697
Yuval Mintz29502192015-10-26 11:02:29 +02003698 DP_INFO(edev, "Ending successfully qede load\n");
3699
3700 return 0;
3701
3702err4:
3703 qede_sync_free_irqs(edev);
3704 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3705err3:
3706 qede_napi_disable_remove(edev);
3707err2:
3708 qede_free_mem_load(edev);
3709err1:
3710 edev->ops->common->set_fp_int(edev->cdev, 0);
3711 qede_free_fp_array(edev);
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003712 edev->num_queues = 0;
3713 edev->fp_num_tx = 0;
3714 edev->fp_num_rx = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02003715err0:
3716 return rc;
3717}
3718
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02003719void qede_reload(struct qede_dev *edev,
3720 void (*func)(struct qede_dev *, union qede_reload_args *),
3721 union qede_reload_args *args)
3722{
3723 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3724 /* Call function handler to update parameters
3725 * needed for function load.
3726 */
3727 if (func)
3728 func(edev, args);
3729
Yuval Mintza0d26d52016-06-19 15:18:13 +03003730 qede_load(edev, QEDE_LOAD_RELOAD);
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02003731
3732 mutex_lock(&edev->qede_lock);
3733 qede_config_rx_mode(edev->ndev);
3734 mutex_unlock(&edev->qede_lock);
3735}
3736
Yuval Mintz29502192015-10-26 11:02:29 +02003737/* called with rtnl_lock */
3738static int qede_open(struct net_device *ndev)
3739{
3740 struct qede_dev *edev = netdev_priv(ndev);
Manish Choprab18e1702016-04-14 01:38:30 -04003741 int rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003742
3743 netif_carrier_off(ndev);
3744
3745 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3746
Manish Choprab18e1702016-04-14 01:38:30 -04003747 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3748
3749 if (rc)
3750 return rc;
3751
Alexander Duyckf9f082a2016-06-16 12:22:57 -07003752 udp_tunnel_get_rx_info(ndev);
3753
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +02003754 edev->ops->common->update_drv_state(edev->cdev, true);
3755
Manish Choprab18e1702016-04-14 01:38:30 -04003756 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +02003757}
3758
3759static int qede_close(struct net_device *ndev)
3760{
3761 struct qede_dev *edev = netdev_priv(ndev);
3762
3763 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3764
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +02003765 edev->ops->common->update_drv_state(edev->cdev, false);
3766
Yuval Mintz29502192015-10-26 11:02:29 +02003767 return 0;
3768}
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003769
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003770static void qede_link_update(void *dev, struct qed_link_output *link)
3771{
3772 struct qede_dev *edev = dev;
3773
3774 if (!netif_running(edev->ndev)) {
3775 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3776 return;
3777 }
3778
3779 if (link->link_up) {
Yuval Mintz8e025ae2016-02-24 16:52:47 +02003780 if (!netif_carrier_ok(edev->ndev)) {
3781 DP_NOTICE(edev, "Link is up\n");
3782 netif_tx_start_all_queues(edev->ndev);
3783 netif_carrier_on(edev->ndev);
3784 }
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003785 } else {
Yuval Mintz8e025ae2016-02-24 16:52:47 +02003786 if (netif_carrier_ok(edev->ndev)) {
3787 DP_NOTICE(edev, "Link is down\n");
3788 netif_tx_disable(edev->ndev);
3789 netif_carrier_off(edev->ndev);
3790 }
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003791 }
3792}
3793
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003794static int qede_set_mac_addr(struct net_device *ndev, void *p)
3795{
3796 struct qede_dev *edev = netdev_priv(ndev);
3797 struct sockaddr *addr = p;
3798 int rc;
3799
3800 ASSERT_RTNL(); /* @@@TBD To be removed */
3801
3802 DP_INFO(edev, "Set_mac_addr called\n");
3803
3804 if (!is_valid_ether_addr(addr->sa_data)) {
3805 DP_NOTICE(edev, "The MAC address is not valid\n");
3806 return -EFAULT;
3807 }
3808
Yuval Mintzeff16962016-05-11 16:36:21 +03003809 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
3810 DP_NOTICE(edev, "qed prevents setting MAC\n");
3811 return -EINVAL;
3812 }
3813
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003814 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3815
3816 if (!netif_running(ndev)) {
3817 DP_NOTICE(edev, "The device is currently down\n");
3818 return 0;
3819 }
3820
3821 /* Remove the previous primary mac */
3822 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3823 edev->primary_mac);
3824 if (rc)
3825 return rc;
3826
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +02003827 edev->ops->common->update_mac(edev->cdev, addr->sa_data);
3828
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003829 /* Add MAC filter according to the new unicast HW MAC address */
3830 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3831 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3832 edev->primary_mac);
3833}
3834
3835static int
3836qede_configure_mcast_filtering(struct net_device *ndev,
3837 enum qed_filter_rx_mode_type *accept_flags)
3838{
3839 struct qede_dev *edev = netdev_priv(ndev);
3840 unsigned char *mc_macs, *temp;
3841 struct netdev_hw_addr *ha;
3842 int rc = 0, mc_count;
3843 size_t size;
3844
3845 size = 64 * ETH_ALEN;
3846
3847 mc_macs = kzalloc(size, GFP_KERNEL);
3848 if (!mc_macs) {
3849 DP_NOTICE(edev,
3850 "Failed to allocate memory for multicast MACs\n");
3851 rc = -ENOMEM;
3852 goto exit;
3853 }
3854
3855 temp = mc_macs;
3856
3857 /* Remove all previously configured MAC filters */
3858 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3859 mc_macs, 1);
3860 if (rc)
3861 goto exit;
3862
3863 netif_addr_lock_bh(ndev);
3864
3865 mc_count = netdev_mc_count(ndev);
3866 if (mc_count < 64) {
3867 netdev_for_each_mc_addr(ha, ndev) {
3868 ether_addr_copy(temp, ha->addr);
3869 temp += ETH_ALEN;
3870 }
3871 }
3872
3873 netif_addr_unlock_bh(ndev);
3874
3875 /* Check for all multicast @@@TBD resource allocation */
3876 if ((ndev->flags & IFF_ALLMULTI) ||
3877 (mc_count > 64)) {
3878 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3879 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3880 } else {
3881 /* Add all multicast MAC filters */
3882 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3883 mc_macs, mc_count);
3884 }
3885
3886exit:
3887 kfree(mc_macs);
3888 return rc;
3889}
3890
3891static void qede_set_rx_mode(struct net_device *ndev)
3892{
3893 struct qede_dev *edev = netdev_priv(ndev);
3894
3895 DP_INFO(edev, "qede_set_rx_mode called\n");
3896
3897 if (edev->state != QEDE_STATE_OPEN) {
3898 DP_INFO(edev,
3899 "qede_set_rx_mode called while interface is down\n");
3900 } else {
3901 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3902 schedule_delayed_work(&edev->sp_task, 0);
3903 }
3904}
3905
3906/* Must be called with qede_lock held */
3907static void qede_config_rx_mode(struct net_device *ndev)
3908{
3909 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3910 struct qede_dev *edev = netdev_priv(ndev);
3911 struct qed_filter_params rx_mode;
3912 unsigned char *uc_macs, *temp;
3913 struct netdev_hw_addr *ha;
3914 int rc, uc_count;
3915 size_t size;
3916
3917 netif_addr_lock_bh(ndev);
3918
3919 uc_count = netdev_uc_count(ndev);
3920 size = uc_count * ETH_ALEN;
3921
3922 uc_macs = kzalloc(size, GFP_ATOMIC);
3923 if (!uc_macs) {
3924 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3925 netif_addr_unlock_bh(ndev);
3926 return;
3927 }
3928
3929 temp = uc_macs;
3930 netdev_for_each_uc_addr(ha, ndev) {
3931 ether_addr_copy(temp, ha->addr);
3932 temp += ETH_ALEN;
3933 }
3934
3935 netif_addr_unlock_bh(ndev);
3936
3937 /* Configure the struct for the Rx mode */
3938 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3939 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3940
3941 /* Remove all previous unicast secondary macs and multicast macs
3942 * (configrue / leave the primary mac)
3943 */
3944 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3945 edev->primary_mac);
3946 if (rc)
3947 goto out;
3948
3949 /* Check for promiscuous */
3950 if ((ndev->flags & IFF_PROMISC) ||
Yuval Mintz7b7e70f2016-10-14 05:19:20 -04003951 (uc_count > edev->dev_info.num_mac_filters - 1)) {
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003952 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3953 } else {
3954 /* Add MAC filters according to the unicast secondary macs */
3955 int i;
3956
3957 temp = uc_macs;
3958 for (i = 0; i < uc_count; i++) {
3959 rc = qede_set_ucast_rx_mac(edev,
3960 QED_FILTER_XCAST_TYPE_ADD,
3961 temp);
3962 if (rc)
3963 goto out;
3964
3965 temp += ETH_ALEN;
3966 }
3967
3968 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3969 if (rc)
3970 goto out;
3971 }
3972
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003973 /* take care of VLAN mode */
3974 if (ndev->flags & IFF_PROMISC) {
3975 qede_config_accept_any_vlan(edev, true);
3976 } else if (!edev->non_configured_vlans) {
3977 /* It's possible that accept_any_vlan mode is set due to a
3978 * previous setting of IFF_PROMISC. If vlan credits are
3979 * sufficient, disable accept_any_vlan.
3980 */
3981 qede_config_accept_any_vlan(edev, false);
3982 }
3983
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003984 rx_mode.filter.accept_flags = accept_flags;
3985 edev->ops->filter_config(edev->cdev, &rx_mode);
3986out:
3987 kfree(uc_macs);
3988}