blob: 45de2aad283c3a731bc6b332ec6a43e242884e23 [file] [log] [blame]
Steve Sakomancc175572008-10-30 21:35:26 -07001/*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/platform_device.h>
Santosh Shilimkarb07682b2009-12-13 20:05:51 +010029#include <linux/i2c/twl.h>
Steve Sakomancc175572008-10-30 21:35:26 -070030#include <sound/core.h>
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/soc.h>
34#include <sound/soc-dapm.h>
35#include <sound/initval.h>
Peter Ujfalusic10b82c2008-11-24 13:49:35 +020036#include <sound/tlv.h>
Steve Sakomancc175572008-10-30 21:35:26 -070037
38#include "twl4030.h"
39
40/*
41 * twl4030 register cache & default register settings
42 */
43static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
44 0x00, /* this register not used */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030045 0x00, /* REG_CODEC_MODE (0x1) */
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +030046 0x00, /* REG_OPTION (0x2) */
Steve Sakomancc175572008-10-30 21:35:26 -070047 0x00, /* REG_UNKNOWN (0x3) */
48 0x00, /* REG_MICBIAS_CTL (0x4) */
Peter Ujfalusi979bb1f2010-05-26 11:38:16 +030049 0x00, /* REG_ANAMICL (0x5) */
Grazvydas Ignotas5920b452008-12-02 20:48:58 +020050 0x00, /* REG_ANAMICR (0x6) */
51 0x00, /* REG_AVADC_CTL (0x7) */
Steve Sakomancc175572008-10-30 21:35:26 -070052 0x00, /* REG_ADCMICSEL (0x8) */
53 0x00, /* REG_DIGMIXING (0x9) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030054 0x0f, /* REG_ATXL1PGA (0xA) */
55 0x0f, /* REG_ATXR1PGA (0xB) */
56 0x0f, /* REG_AVTXL2PGA (0xC) */
57 0x0f, /* REG_AVTXR2PGA (0xD) */
Peter Ujfalusic42a59e2010-02-09 15:24:04 +020058 0x00, /* REG_AUDIO_IF (0xE) */
Steve Sakomancc175572008-10-30 21:35:26 -070059 0x00, /* REG_VOICE_IF (0xF) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030060 0x3f, /* REG_ARXR1PGA (0x10) */
61 0x3f, /* REG_ARXL1PGA (0x11) */
62 0x3f, /* REG_ARXR2PGA (0x12) */
63 0x3f, /* REG_ARXL2PGA (0x13) */
64 0x25, /* REG_VRXPGA (0x14) */
Steve Sakomancc175572008-10-30 21:35:26 -070065 0x00, /* REG_VSTPGA (0x15) */
66 0x00, /* REG_VRX2ARXPGA (0x16) */
Peter Ujfalusic8124592010-01-28 15:57:04 +020067 0x00, /* REG_AVDAC_CTL (0x17) */
Steve Sakomancc175572008-10-30 21:35:26 -070068 0x00, /* REG_ARX2VTXPGA (0x18) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030069 0x32, /* REG_ARXL1_APGA_CTL (0x19) */
70 0x32, /* REG_ARXR1_APGA_CTL (0x1A) */
71 0x32, /* REG_ARXL2_APGA_CTL (0x1B) */
72 0x32, /* REG_ARXR2_APGA_CTL (0x1C) */
Steve Sakomancc175572008-10-30 21:35:26 -070073 0x00, /* REG_ATX2ARXPGA (0x1D) */
74 0x00, /* REG_BT_IF (0x1E) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030075 0x55, /* REG_BTPGA (0x1F) */
Steve Sakomancc175572008-10-30 21:35:26 -070076 0x00, /* REG_BTSTPGA (0x20) */
77 0x00, /* REG_EAR_CTL (0x21) */
Peter Ujfalusie47c7962010-02-17 09:49:54 +020078 0x00, /* REG_HS_SEL (0x22) */
79 0x00, /* REG_HS_GAIN_SET (0x23) */
Steve Sakomancc175572008-10-30 21:35:26 -070080 0x00, /* REG_HS_POPN_SET (0x24) */
81 0x00, /* REG_PREDL_CTL (0x25) */
82 0x00, /* REG_PREDR_CTL (0x26) */
83 0x00, /* REG_PRECKL_CTL (0x27) */
84 0x00, /* REG_PRECKR_CTL (0x28) */
85 0x00, /* REG_HFL_CTL (0x29) */
86 0x00, /* REG_HFR_CTL (0x2A) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030087 0x05, /* REG_ALC_CTL (0x2B) */
Steve Sakomancc175572008-10-30 21:35:26 -070088 0x00, /* REG_ALC_SET1 (0x2C) */
89 0x00, /* REG_ALC_SET2 (0x2D) */
90 0x00, /* REG_BOOST_CTL (0x2E) */
Peter Ujfalusif8d05bd2008-11-24 08:25:45 +020091 0x00, /* REG_SOFTVOL_CTL (0x2F) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030092 0x13, /* REG_DTMF_FREQSEL (0x30) */
Steve Sakomancc175572008-10-30 21:35:26 -070093 0x00, /* REG_DTMF_TONEXT1H (0x31) */
94 0x00, /* REG_DTMF_TONEXT1L (0x32) */
95 0x00, /* REG_DTMF_TONEXT2H (0x33) */
96 0x00, /* REG_DTMF_TONEXT2L (0x34) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030097 0x79, /* REG_DTMF_TONOFF (0x35) */
98 0x11, /* REG_DTMF_WANONOFF (0x36) */
Steve Sakomancc175572008-10-30 21:35:26 -070099 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
Peter Ujfalusic8124592010-01-28 15:57:04 +0200102 0x06, /* REG_APLL_CTL (0x3A) */
Steve Sakomancc175572008-10-30 21:35:26 -0700103 0x00, /* REG_DTMF_CTL (0x3B) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +0300104 0x44, /* REG_DTMF_PGA_CTL2 (0x3C) */
105 0x69, /* REG_DTMF_PGA_CTL1 (0x3D) */
Steve Sakomancc175572008-10-30 21:35:26 -0700106 0x00, /* REG_MISC_SET_1 (0x3E) */
107 0x00, /* REG_PCMBTMUX (0x3F) */
108 0x00, /* not used (0x40) */
109 0x00, /* not used (0x41) */
110 0x00, /* not used (0x42) */
111 0x00, /* REG_RX_PATH_SEL (0x43) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +0300112 0x32, /* REG_VDL_APGA_CTL (0x44) */
Steve Sakomancc175572008-10-30 21:35:26 -0700113 0x00, /* REG_VIBRA_CTL (0x45) */
114 0x00, /* REG_VIBRA_SET (0x46) */
115 0x00, /* REG_VIBRA_PWM_SET (0x47) */
116 0x00, /* REG_ANAMIC_GAIN (0x48) */
117 0x00, /* REG_MISC_SET_2 (0x49) */
Peter Ujfalusif3b5d302009-05-25 11:12:12 +0300118 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
Steve Sakomancc175572008-10-30 21:35:26 -0700119};
120
Peter Ujfalusi73939582009-01-29 14:57:50 +0200121/* codec private data */
122struct twl4030_priv {
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300123 struct snd_soc_codec codec;
124
Peter Ujfalusi73939582009-01-29 14:57:50 +0200125 unsigned int codec_powered;
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300126
127 /* reference counts of AIF/APLL users */
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200128 unsigned int apll_enabled;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +0200129
130 struct snd_pcm_substream *master_substream;
131 struct snd_pcm_substream *slave_substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +0300132
133 unsigned int configured;
134 unsigned int rate;
135 unsigned int sample_bits;
136 unsigned int channels;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300137
138 unsigned int sysclk;
139
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200140 /* Output (with associated amp) states */
141 u8 hsl_enabled, hsr_enabled;
142 u8 earpiece_enabled;
143 u8 predrivel_enabled, predriver_enabled;
144 u8 carkitl_enabled, carkitr_enabled;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200145};
146
Steve Sakomancc175572008-10-30 21:35:26 -0700147/*
148 * read twl4030 register cache
149 */
150static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
151 unsigned int reg)
152{
Takashi Iwaid08664f2009-06-04 09:58:18 +0200153 u8 *cache = codec->reg_cache;
Steve Sakomancc175572008-10-30 21:35:26 -0700154
Ian Molton91432e92009-01-17 17:44:23 +0000155 if (reg >= TWL4030_CACHEREGNUM)
156 return -EIO;
157
Steve Sakomancc175572008-10-30 21:35:26 -0700158 return cache[reg];
159}
160
161/*
162 * write twl4030 register cache
163 */
164static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
165 u8 reg, u8 value)
166{
167 u8 *cache = codec->reg_cache;
168
169 if (reg >= TWL4030_CACHEREGNUM)
170 return;
171 cache[reg] = value;
172}
173
174/*
175 * write to the twl4030 register space
176 */
177static int twl4030_write(struct snd_soc_codec *codec,
178 unsigned int reg, unsigned int value)
179{
Mark Brownb2c812e2010-04-14 15:35:19 +0900180 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200181 int write_to_reg = 0;
182
Steve Sakomancc175572008-10-30 21:35:26 -0700183 twl4030_write_reg_cache(codec, reg, value);
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200184 if (likely(reg < TWL4030_REG_SW_SHADOW)) {
185 /* Decide if the given register can be written */
186 switch (reg) {
187 case TWL4030_REG_EAR_CTL:
188 if (twl4030->earpiece_enabled)
189 write_to_reg = 1;
190 break;
191 case TWL4030_REG_PREDL_CTL:
192 if (twl4030->predrivel_enabled)
193 write_to_reg = 1;
194 break;
195 case TWL4030_REG_PREDR_CTL:
196 if (twl4030->predriver_enabled)
197 write_to_reg = 1;
198 break;
199 case TWL4030_REG_PRECKL_CTL:
200 if (twl4030->carkitl_enabled)
201 write_to_reg = 1;
202 break;
203 case TWL4030_REG_PRECKR_CTL:
204 if (twl4030->carkitr_enabled)
205 write_to_reg = 1;
206 break;
207 case TWL4030_REG_HS_GAIN_SET:
208 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
209 write_to_reg = 1;
210 break;
211 default:
212 /* All other register can be written */
213 write_to_reg = 1;
214 break;
215 }
216 if (write_to_reg)
217 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
218 value, reg);
219 }
220 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700221}
222
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200223static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
Steve Sakomancc175572008-10-30 21:35:26 -0700224{
Mark Brownb2c812e2010-04-14 15:35:19 +0900225 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300226 int mode;
Steve Sakomancc175572008-10-30 21:35:26 -0700227
Peter Ujfalusi73939582009-01-29 14:57:50 +0200228 if (enable == twl4030->codec_powered)
229 return;
230
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200231 if (enable)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300232 mode = twl4030_codec_enable_resource(TWL4030_CODEC_RES_POWER);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200233 else
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300234 mode = twl4030_codec_disable_resource(TWL4030_CODEC_RES_POWER);
Steve Sakomancc175572008-10-30 21:35:26 -0700235
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300236 if (mode >= 0) {
237 twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode);
238 twl4030->codec_powered = enable;
239 }
Steve Sakomancc175572008-10-30 21:35:26 -0700240
241 /* REVISIT: this delay is present in TI sample drivers */
242 /* but there seems to be no TRM requirement for it */
243 udelay(10);
244}
245
Peter Ujfalusi9fdcc0f2010-05-26 11:38:18 +0300246static inline void twl4030_check_defaults(struct snd_soc_codec *codec)
247{
248 int i, difference = 0;
249 u8 val;
250
251 dev_dbg(codec->dev, "Checking TWL audio default configuration\n");
252 for (i = 1; i <= TWL4030_REG_MISC_SET_2; i++) {
253 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &val, i);
254 if (val != twl4030_reg[i]) {
255 difference++;
256 dev_dbg(codec->dev,
257 "Reg 0x%02x: chip: 0x%02x driver: 0x%02x\n",
258 i, val, twl4030_reg[i]);
259 }
260 }
261 dev_dbg(codec->dev, "Found %d non maching registers. %s\n",
262 difference, difference ? "Not OK" : "OK");
263}
264
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300265static void twl4030_init_chip(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -0700266{
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300267 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
268 struct twl4030_setup_data *setup = socdev->codec_data;
269 struct snd_soc_codec *codec = socdev->card->codec;
270 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
271 u8 reg, byte;
272 int i = 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700273
Peter Ujfalusi9fdcc0f2010-05-26 11:38:18 +0300274 /* Check defaults, if instructed before anything else */
275 if (setup && setup->check_defaults)
276 twl4030_check_defaults(codec);
277
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300278 /* Refresh APLL_CTL register from HW */
Peter Ujfalusi9fdcc0f2010-05-26 11:38:18 +0300279 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300280 TWL4030_REG_APLL_CTL);
281 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, byte);
282
283 /* anti-pop when changing analog gain */
284 reg = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
285 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
286 reg | TWL4030_SMOOTH_ANAVOL_EN);
287
288 twl4030_write(codec, TWL4030_REG_OPTION,
289 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
290 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
291
Peter Ujfalusi3c36cc62010-05-26 11:38:19 +0300292 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
293 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
294
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300295 /* Machine dependent setup */
296 if (!setup)
297 return;
298
299 /* Configuration for headset ramp delay from setup data */
300 if (setup->sysclk != twl4030->sysclk)
301 dev_warn(codec->dev,
302 "Mismatch in APLL mclk: %u (configured: %u)\n",
303 setup->sysclk, twl4030->sysclk);
304
305 reg = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
306 reg &= ~TWL4030_RAMP_DELAY;
307 reg |= (setup->ramp_delay_value << 2);
308 twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, reg);
309
310 /* initiate offset cancellation */
311 twl4030_codec_enable(codec, 1);
312
313 reg = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
314 reg &= ~TWL4030_OFFSET_CNCL_SEL;
315 reg |= setup->offset_cncl_path;
316 twl4030_write(codec, TWL4030_REG_ANAMICL,
317 reg | TWL4030_CNCL_OFFSET_START);
318
319 /* wait for offset cancellation to complete */
320 do {
321 /* this takes a little while, so don't slam i2c */
322 udelay(2000);
323 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
324 TWL4030_REG_ANAMICL);
325 } while ((i++ < 100) &&
326 ((byte & TWL4030_CNCL_OFFSET_START) ==
327 TWL4030_CNCL_OFFSET_START));
328
329 /* Make sure that the reg_cache has the same value as the HW */
330 twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
331
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200332 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -0700333}
334
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200335static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
Peter Ujfalusi73939582009-01-29 14:57:50 +0200336{
Mark Brownb2c812e2010-04-14 15:35:19 +0900337 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300338 int status = -1;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200339
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300340 if (enable) {
341 twl4030->apll_enabled++;
342 if (twl4030->apll_enabled == 1)
343 status = twl4030_codec_enable_resource(
344 TWL4030_CODEC_RES_APLL);
345 } else {
346 twl4030->apll_enabled--;
347 if (!twl4030->apll_enabled)
348 status = twl4030_codec_disable_resource(
349 TWL4030_CODEC_RES_APLL);
350 }
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300351
352 if (status >= 0)
353 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
Peter Ujfalusi73939582009-01-29 14:57:50 +0200354}
355
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200356/* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900357static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
358 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
359 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
360 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
361 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
362};
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200363
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200364/* PreDrive Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900365static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
366 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
367 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
368 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
369 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
370};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200371
372/* PreDrive Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900373static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
374 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
375 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
376 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
377 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
378};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200379
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200380/* Headset Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900381static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
382 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
383 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
384 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
385};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200386
387/* Headset Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900388static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
389 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
390 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
391 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
392};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200393
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200394/* Carkit Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900395static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
396 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
397 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
398 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
399};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200400
401/* Carkit Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900402static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
403 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
404 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
405 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
406};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200407
Peter Ujfalusidf339802008-12-09 12:35:51 +0200408/* Handsfree Left */
409static const char *twl4030_handsfreel_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900410 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200411
412static const struct soc_enum twl4030_handsfreel_enum =
413 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
414 ARRAY_SIZE(twl4030_handsfreel_texts),
415 twl4030_handsfreel_texts);
416
417static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
418SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
419
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300420/* Handsfree Left virtual mute */
421static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
422 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0);
423
Peter Ujfalusidf339802008-12-09 12:35:51 +0200424/* Handsfree Right */
425static const char *twl4030_handsfreer_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900426 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200427
428static const struct soc_enum twl4030_handsfreer_enum =
429 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
430 ARRAY_SIZE(twl4030_handsfreer_texts),
431 twl4030_handsfreer_texts);
432
433static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
434SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
435
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300436/* Handsfree Right virtual mute */
437static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
438 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0);
439
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300440/* Vibra */
441/* Vibra audio path selection */
442static const char *twl4030_vibra_texts[] =
443 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
444
445static const struct soc_enum twl4030_vibra_enum =
446 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
447 ARRAY_SIZE(twl4030_vibra_texts),
448 twl4030_vibra_texts);
449
450static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
451SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
452
453/* Vibra path selection: local vibrator (PWM) or audio driven */
454static const char *twl4030_vibrapath_texts[] =
455 {"Local vibrator", "Audio"};
456
457static const struct soc_enum twl4030_vibrapath_enum =
458 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
459 ARRAY_SIZE(twl4030_vibrapath_texts),
460 twl4030_vibrapath_texts);
461
462static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
463SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
464
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200465/* Left analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900466static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300467 SOC_DAPM_SINGLE("Main Mic Capture Switch",
468 TWL4030_REG_ANAMICL, 0, 1, 0),
469 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
470 TWL4030_REG_ANAMICL, 1, 1, 0),
471 SOC_DAPM_SINGLE("AUXL Capture Switch",
472 TWL4030_REG_ANAMICL, 2, 1, 0),
473 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
474 TWL4030_REG_ANAMICL, 3, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900475};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200476
477/* Right analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900478static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300479 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
480 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900481};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200482
483/* TX1 L/R Analog/Digital microphone selection */
484static const char *twl4030_micpathtx1_texts[] =
485 {"Analog", "Digimic0"};
486
487static const struct soc_enum twl4030_micpathtx1_enum =
488 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
489 ARRAY_SIZE(twl4030_micpathtx1_texts),
490 twl4030_micpathtx1_texts);
491
492static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
493SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
494
495/* TX2 L/R Analog/Digital microphone selection */
496static const char *twl4030_micpathtx2_texts[] =
497 {"Analog", "Digimic1"};
498
499static const struct soc_enum twl4030_micpathtx2_enum =
500 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
501 ARRAY_SIZE(twl4030_micpathtx2_texts),
502 twl4030_micpathtx2_texts);
503
504static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
505SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
506
Peter Ujfalusi73939582009-01-29 14:57:50 +0200507/* Analog bypass for AudioR1 */
508static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
509 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
510
511/* Analog bypass for AudioL1 */
512static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
513 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
514
515/* Analog bypass for AudioR2 */
516static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
517 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
518
519/* Analog bypass for AudioL2 */
520static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
521 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
522
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500523/* Analog bypass for Voice */
524static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
525 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
526
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200527/* Digital bypass gain, 0 mutes the bypass */
528static const unsigned int twl4030_dapm_dbypass_tlv[] = {
529 TLV_DB_RANGE_HEAD(2),
530 0, 3, TLV_DB_SCALE_ITEM(-2400, 0, 1),
531 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
532};
533
534/* Digital bypass left (TX1L -> RX2L) */
535static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
536 SOC_DAPM_SINGLE_TLV("Volume",
537 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
538 twl4030_dapm_dbypass_tlv);
539
540/* Digital bypass right (TX1R -> RX2R) */
541static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
542 SOC_DAPM_SINGLE_TLV("Volume",
543 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
544 twl4030_dapm_dbypass_tlv);
545
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500546/*
547 * Voice Sidetone GAIN volume control:
548 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
549 */
550static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
551
552/* Digital bypass voice: sidetone (VUL -> VDL)*/
553static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
554 SOC_DAPM_SINGLE_TLV("Volume",
555 TWL4030_REG_VSTPGA, 0, 0x29, 0,
556 twl4030_dapm_dbypassv_tlv);
557
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200558static int micpath_event(struct snd_soc_dapm_widget *w,
559 struct snd_kcontrol *kcontrol, int event)
560{
561 struct soc_enum *e = (struct soc_enum *)w->kcontrols->private_value;
562 unsigned char adcmicsel, micbias_ctl;
563
564 adcmicsel = twl4030_read_reg_cache(w->codec, TWL4030_REG_ADCMICSEL);
565 micbias_ctl = twl4030_read_reg_cache(w->codec, TWL4030_REG_MICBIAS_CTL);
566 /* Prepare the bits for the given TX path:
567 * shift_l == 0: TX1 microphone path
568 * shift_l == 2: TX2 microphone path */
569 if (e->shift_l) {
570 /* TX2 microphone path */
571 if (adcmicsel & TWL4030_TX2IN_SEL)
572 micbias_ctl |= TWL4030_MICBIAS2_CTL; /* digimic */
573 else
574 micbias_ctl &= ~TWL4030_MICBIAS2_CTL;
575 } else {
576 /* TX1 microphone path */
577 if (adcmicsel & TWL4030_TX1IN_SEL)
578 micbias_ctl |= TWL4030_MICBIAS1_CTL; /* digimic */
579 else
580 micbias_ctl &= ~TWL4030_MICBIAS1_CTL;
581 }
582
583 twl4030_write(w->codec, TWL4030_REG_MICBIAS_CTL, micbias_ctl);
584
585 return 0;
586}
587
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300588/*
589 * Output PGA builder:
590 * Handle the muting and unmuting of the given output (turning off the
591 * amplifier associated with the output pin)
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200592 * On mute bypass the reg_cache and write 0 to the register
593 * On unmute: restore the register content from the reg_cache
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300594 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
595 */
596#define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
597static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
598 struct snd_kcontrol *kcontrol, int event) \
599{ \
Mark Brownb2c812e2010-04-14 15:35:19 +0900600 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300601 \
602 switch (event) { \
603 case SND_SOC_DAPM_POST_PMU: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200604 twl4030->pin_name##_enabled = 1; \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300605 twl4030_write(w->codec, reg, \
606 twl4030_read_reg_cache(w->codec, reg)); \
607 break; \
608 case SND_SOC_DAPM_POST_PMD: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200609 twl4030->pin_name##_enabled = 0; \
610 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
611 0, reg); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300612 break; \
613 } \
614 return 0; \
615}
616
617TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
618TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
619TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
620TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
621TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
622
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300623static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
Stanley.Miao49d92c72008-12-11 23:28:10 +0800624{
Stanley.Miao49d92c72008-12-11 23:28:10 +0800625 unsigned char hs_ctl;
626
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300627 hs_ctl = twl4030_read_reg_cache(codec, reg);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800628
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300629 if (ramp) {
630 /* HF ramp-up */
631 hs_ctl |= TWL4030_HF_CTL_REF_EN;
632 twl4030_write(codec, reg, hs_ctl);
633 udelay(10);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800634 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300635 twl4030_write(codec, reg, hs_ctl);
636 udelay(40);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800637 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
Stanley.Miao49d92c72008-12-11 23:28:10 +0800638 hs_ctl |= TWL4030_HF_CTL_HB_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300639 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800640 } else {
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300641 /* HF ramp-down */
642 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
643 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
644 twl4030_write(codec, reg, hs_ctl);
645 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
646 twl4030_write(codec, reg, hs_ctl);
647 udelay(40);
648 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
649 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800650 }
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300651}
Stanley.Miao49d92c72008-12-11 23:28:10 +0800652
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300653static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
654 struct snd_kcontrol *kcontrol, int event)
655{
656 switch (event) {
657 case SND_SOC_DAPM_POST_PMU:
658 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
659 break;
660 case SND_SOC_DAPM_POST_PMD:
661 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
662 break;
663 }
664 return 0;
665}
666
667static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
668 struct snd_kcontrol *kcontrol, int event)
669{
670 switch (event) {
671 case SND_SOC_DAPM_POST_PMU:
672 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
673 break;
674 case SND_SOC_DAPM_POST_PMD:
675 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
676 break;
677 }
Stanley.Miao49d92c72008-12-11 23:28:10 +0800678 return 0;
679}
680
Jari Vanhala86139a12009-10-29 11:58:09 +0200681static int vibramux_event(struct snd_soc_dapm_widget *w,
682 struct snd_kcontrol *kcontrol, int event)
683{
684 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
685 return 0;
686}
687
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200688static int apll_event(struct snd_soc_dapm_widget *w,
689 struct snd_kcontrol *kcontrol, int event)
690{
691 switch (event) {
692 case SND_SOC_DAPM_PRE_PMU:
693 twl4030_apll_enable(w->codec, 1);
694 break;
695 case SND_SOC_DAPM_POST_PMD:
696 twl4030_apll_enable(w->codec, 0);
697 break;
698 }
699 return 0;
700}
701
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300702static int aif_event(struct snd_soc_dapm_widget *w,
703 struct snd_kcontrol *kcontrol, int event)
704{
705 u8 audio_if;
706
707 audio_if = twl4030_read_reg_cache(w->codec, TWL4030_REG_AUDIO_IF);
708 switch (event) {
709 case SND_SOC_DAPM_PRE_PMU:
710 /* Enable AIF */
711 /* enable the PLL before we use it to clock the DAI */
712 twl4030_apll_enable(w->codec, 1);
713
714 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
715 audio_if | TWL4030_AIF_EN);
716 break;
717 case SND_SOC_DAPM_POST_PMD:
718 /* disable the DAI before we stop it's source PLL */
719 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
720 audio_if & ~TWL4030_AIF_EN);
721 twl4030_apll_enable(w->codec, 0);
722 break;
723 }
724 return 0;
725}
726
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300727static void headset_ramp(struct snd_soc_codec *codec, int ramp)
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200728{
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500729 struct snd_soc_device *socdev = codec->socdev;
730 struct twl4030_setup_data *setup = socdev->codec_data;
731
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200732 unsigned char hs_gain, hs_pop;
Mark Brownb2c812e2010-04-14 15:35:19 +0900733 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300734 /* Base values for ramp delay calculation: 2^19 - 2^26 */
735 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
736 8388608, 16777216, 33554432, 67108864};
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200737
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300738 hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET);
739 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200740
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500741 /* Enable external mute control, this dramatically reduces
742 * the pop-noise */
743 if (setup && setup->hs_extmute) {
744 if (setup->set_hs_extmute) {
745 setup->set_hs_extmute(1);
746 } else {
747 hs_pop |= TWL4030_EXTMUTE;
748 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
749 }
750 }
751
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300752 if (ramp) {
753 /* Headset ramp-up according to the TRM */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200754 hs_pop |= TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300755 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200756 /* Actually write to the register */
757 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
758 hs_gain,
759 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200760 hs_pop |= TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300761 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500762 /* Wait ramp delay time + 1, so the VMID can settle */
763 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
764 twl4030->sysclk) + 1);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300765 } else {
766 /* Headset ramp-down _not_ according to
767 * the TRM, but in a way that it is working */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200768 hs_pop &= ~TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300769 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
770 /* Wait ramp delay time + 1, so the VMID can settle */
771 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
772 twl4030->sysclk) + 1);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200773 /* Bypass the reg_cache to mute the headset */
Balaji T Kfc7b92f2009-12-13 21:23:33 +0100774 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200775 hs_gain & (~0x0f),
776 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300777
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200778 hs_pop &= ~TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300779 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
780 }
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500781
782 /* Disable external mute */
783 if (setup && setup->hs_extmute) {
784 if (setup->set_hs_extmute) {
785 setup->set_hs_extmute(0);
786 } else {
787 hs_pop &= ~TWL4030_EXTMUTE;
788 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
789 }
790 }
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300791}
792
793static int headsetlpga_event(struct snd_soc_dapm_widget *w,
794 struct snd_kcontrol *kcontrol, int event)
795{
Mark Brownb2c812e2010-04-14 15:35:19 +0900796 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300797
798 switch (event) {
799 case SND_SOC_DAPM_POST_PMU:
800 /* Do the ramp-up only once */
801 if (!twl4030->hsr_enabled)
802 headset_ramp(w->codec, 1);
803
804 twl4030->hsl_enabled = 1;
805 break;
806 case SND_SOC_DAPM_POST_PMD:
807 /* Do the ramp-down only if both headsetL/R is disabled */
808 if (!twl4030->hsr_enabled)
809 headset_ramp(w->codec, 0);
810
811 twl4030->hsl_enabled = 0;
812 break;
813 }
814 return 0;
815}
816
817static int headsetrpga_event(struct snd_soc_dapm_widget *w,
818 struct snd_kcontrol *kcontrol, int event)
819{
Mark Brownb2c812e2010-04-14 15:35:19 +0900820 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300821
822 switch (event) {
823 case SND_SOC_DAPM_POST_PMU:
824 /* Do the ramp-up only once */
825 if (!twl4030->hsl_enabled)
826 headset_ramp(w->codec, 1);
827
828 twl4030->hsr_enabled = 1;
829 break;
830 case SND_SOC_DAPM_POST_PMD:
831 /* Do the ramp-down only if both headsetL/R is disabled */
832 if (!twl4030->hsl_enabled)
833 headset_ramp(w->codec, 0);
834
835 twl4030->hsr_enabled = 0;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200836 break;
837 }
838 return 0;
839}
840
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200841/*
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200842 * Some of the gain controls in TWL (mostly those which are associated with
843 * the outputs) are implemented in an interesting way:
844 * 0x0 : Power down (mute)
845 * 0x1 : 6dB
846 * 0x2 : 0 dB
847 * 0x3 : -6 dB
848 * Inverting not going to help with these.
849 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
850 */
851#define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
852 xinvert, tlv_array) \
853{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
854 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
855 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
856 .tlv.p = (tlv_array), \
857 .info = snd_soc_info_volsw, \
858 .get = snd_soc_get_volsw_twl4030, \
859 .put = snd_soc_put_volsw_twl4030, \
860 .private_value = (unsigned long)&(struct soc_mixer_control) \
861 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
862 .max = xmax, .invert = xinvert} }
863#define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
864 xinvert, tlv_array) \
865{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
866 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
867 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
868 .tlv.p = (tlv_array), \
869 .info = snd_soc_info_volsw_2r, \
870 .get = snd_soc_get_volsw_r2_twl4030,\
871 .put = snd_soc_put_volsw_r2_twl4030, \
872 .private_value = (unsigned long)&(struct soc_mixer_control) \
873 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
Mark Brown64089b82008-12-08 19:17:58 +0000874 .rshift = xshift, .max = xmax, .invert = xinvert} }
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200875#define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
876 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
877 xinvert, tlv_array)
878
879static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
880 struct snd_ctl_elem_value *ucontrol)
881{
882 struct soc_mixer_control *mc =
883 (struct soc_mixer_control *)kcontrol->private_value;
884 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
885 unsigned int reg = mc->reg;
886 unsigned int shift = mc->shift;
887 unsigned int rshift = mc->rshift;
888 int max = mc->max;
889 int mask = (1 << fls(max)) - 1;
890
891 ucontrol->value.integer.value[0] =
892 (snd_soc_read(codec, reg) >> shift) & mask;
893 if (ucontrol->value.integer.value[0])
894 ucontrol->value.integer.value[0] =
895 max + 1 - ucontrol->value.integer.value[0];
896
897 if (shift != rshift) {
898 ucontrol->value.integer.value[1] =
899 (snd_soc_read(codec, reg) >> rshift) & mask;
900 if (ucontrol->value.integer.value[1])
901 ucontrol->value.integer.value[1] =
902 max + 1 - ucontrol->value.integer.value[1];
903 }
904
905 return 0;
906}
907
908static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
909 struct snd_ctl_elem_value *ucontrol)
910{
911 struct soc_mixer_control *mc =
912 (struct soc_mixer_control *)kcontrol->private_value;
913 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
914 unsigned int reg = mc->reg;
915 unsigned int shift = mc->shift;
916 unsigned int rshift = mc->rshift;
917 int max = mc->max;
918 int mask = (1 << fls(max)) - 1;
919 unsigned short val, val2, val_mask;
920
921 val = (ucontrol->value.integer.value[0] & mask);
922
923 val_mask = mask << shift;
924 if (val)
925 val = max + 1 - val;
926 val = val << shift;
927 if (shift != rshift) {
928 val2 = (ucontrol->value.integer.value[1] & mask);
929 val_mask |= mask << rshift;
930 if (val2)
931 val2 = max + 1 - val2;
932 val |= val2 << rshift;
933 }
934 return snd_soc_update_bits(codec, reg, val_mask, val);
935}
936
937static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
938 struct snd_ctl_elem_value *ucontrol)
939{
940 struct soc_mixer_control *mc =
941 (struct soc_mixer_control *)kcontrol->private_value;
942 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
943 unsigned int reg = mc->reg;
944 unsigned int reg2 = mc->rreg;
945 unsigned int shift = mc->shift;
946 int max = mc->max;
947 int mask = (1<<fls(max))-1;
948
949 ucontrol->value.integer.value[0] =
950 (snd_soc_read(codec, reg) >> shift) & mask;
951 ucontrol->value.integer.value[1] =
952 (snd_soc_read(codec, reg2) >> shift) & mask;
953
954 if (ucontrol->value.integer.value[0])
955 ucontrol->value.integer.value[0] =
956 max + 1 - ucontrol->value.integer.value[0];
957 if (ucontrol->value.integer.value[1])
958 ucontrol->value.integer.value[1] =
959 max + 1 - ucontrol->value.integer.value[1];
960
961 return 0;
962}
963
964static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
965 struct snd_ctl_elem_value *ucontrol)
966{
967 struct soc_mixer_control *mc =
968 (struct soc_mixer_control *)kcontrol->private_value;
969 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
970 unsigned int reg = mc->reg;
971 unsigned int reg2 = mc->rreg;
972 unsigned int shift = mc->shift;
973 int max = mc->max;
974 int mask = (1 << fls(max)) - 1;
975 int err;
976 unsigned short val, val2, val_mask;
977
978 val_mask = mask << shift;
979 val = (ucontrol->value.integer.value[0] & mask);
980 val2 = (ucontrol->value.integer.value[1] & mask);
981
982 if (val)
983 val = max + 1 - val;
984 if (val2)
985 val2 = max + 1 - val2;
986
987 val = val << shift;
988 val2 = val2 << shift;
989
990 err = snd_soc_update_bits(codec, reg, val_mask, val);
991 if (err < 0)
992 return err;
993
994 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
995 return err;
996}
997
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500998/* Codec operation modes */
999static const char *twl4030_op_modes_texts[] = {
1000 "Option 2 (voice/audio)", "Option 1 (audio)"
1001};
1002
1003static const struct soc_enum twl4030_op_modes_enum =
1004 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
1005 ARRAY_SIZE(twl4030_op_modes_texts),
1006 twl4030_op_modes_texts);
1007
Mark Brown423c2382009-06-20 13:54:02 +01001008static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001009 struct snd_ctl_elem_value *ucontrol)
1010{
1011 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
Mark Brownb2c812e2010-04-14 15:35:19 +09001012 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001013 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1014 unsigned short val;
1015 unsigned short mask, bitmask;
1016
1017 if (twl4030->configured) {
1018 printk(KERN_ERR "twl4030 operation mode cannot be "
1019 "changed on-the-fly\n");
1020 return -EBUSY;
1021 }
1022
1023 for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
1024 ;
1025 if (ucontrol->value.enumerated.item[0] > e->max - 1)
1026 return -EINVAL;
1027
1028 val = ucontrol->value.enumerated.item[0] << e->shift_l;
1029 mask = (bitmask - 1) << e->shift_l;
1030 if (e->shift_l != e->shift_r) {
1031 if (ucontrol->value.enumerated.item[1] > e->max - 1)
1032 return -EINVAL;
1033 val |= ucontrol->value.enumerated.item[1] << e->shift_r;
1034 mask |= (bitmask - 1) << e->shift_r;
1035 }
1036
1037 return snd_soc_update_bits(codec, e->reg, mask, val);
1038}
1039
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +02001040/*
Peter Ujfalusic10b82c2008-11-24 13:49:35 +02001041 * FGAIN volume control:
1042 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
1043 */
Peter Ujfalusid889a722008-12-01 10:03:46 +02001044static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
Peter Ujfalusic10b82c2008-11-24 13:49:35 +02001045
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +02001046/*
1047 * CGAIN volume control:
1048 * 0 dB to 12 dB in 6 dB steps
1049 * value 2 and 3 means 12 dB
1050 */
Peter Ujfalusid889a722008-12-01 10:03:46 +02001051static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
1052
1053/*
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001054 * Voice Downlink GAIN volume control:
1055 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
1056 */
1057static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
1058
1059/*
Peter Ujfalusid889a722008-12-01 10:03:46 +02001060 * Analog playback gain
1061 * -24 dB to 12 dB in 2 dB steps
1062 */
1063static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +02001064
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001065/*
Peter Ujfalusi42902392008-12-01 10:03:47 +02001066 * Gain controls tied to outputs
1067 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1068 */
1069static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1070
1071/*
Joonyoung Shim18cc8d82009-04-28 18:18:05 +09001072 * Gain control for earpiece amplifier
1073 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1074 */
1075static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1076
1077/*
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001078 * Capture gain after the ADCs
1079 * from 0 dB to 31 dB in 1 dB steps
1080 */
1081static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1082
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001083/*
1084 * Gain control for input amplifiers
1085 * 0 dB to 30 dB in 6 dB steps
1086 */
1087static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1088
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001089/* AVADC clock priority */
1090static const char *twl4030_avadc_clk_priority_texts[] = {
1091 "Voice high priority", "HiFi high priority"
1092};
1093
1094static const struct soc_enum twl4030_avadc_clk_priority_enum =
1095 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
1096 ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
1097 twl4030_avadc_clk_priority_texts);
1098
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001099static const char *twl4030_rampdelay_texts[] = {
1100 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1101 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1102 "3495/2581/1748 ms"
1103};
1104
1105static const struct soc_enum twl4030_rampdelay_enum =
1106 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1107 ARRAY_SIZE(twl4030_rampdelay_texts),
1108 twl4030_rampdelay_texts);
1109
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001110/* Vibra H-bridge direction mode */
1111static const char *twl4030_vibradirmode_texts[] = {
1112 "Vibra H-bridge direction", "Audio data MSB",
1113};
1114
1115static const struct soc_enum twl4030_vibradirmode_enum =
1116 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1117 ARRAY_SIZE(twl4030_vibradirmode_texts),
1118 twl4030_vibradirmode_texts);
1119
1120/* Vibra H-bridge direction */
1121static const char *twl4030_vibradir_texts[] = {
1122 "Positive polarity", "Negative polarity",
1123};
1124
1125static const struct soc_enum twl4030_vibradir_enum =
1126 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1127 ARRAY_SIZE(twl4030_vibradir_texts),
1128 twl4030_vibradir_texts);
1129
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001130/* Digimic Left and right swapping */
1131static const char *twl4030_digimicswap_texts[] = {
1132 "Not swapped", "Swapped",
1133};
1134
1135static const struct soc_enum twl4030_digimicswap_enum =
1136 SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1, 0,
1137 ARRAY_SIZE(twl4030_digimicswap_texts),
1138 twl4030_digimicswap_texts);
1139
Steve Sakomancc175572008-10-30 21:35:26 -07001140static const struct snd_kcontrol_new twl4030_snd_controls[] = {
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001141 /* Codec operation mode control */
1142 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1143 snd_soc_get_enum_double,
1144 snd_soc_put_twl4030_opmode_enum_double),
1145
Peter Ujfalusid889a722008-12-01 10:03:46 +02001146 /* Common playback gain controls */
1147 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1148 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1149 0, 0x3f, 0, digital_fine_tlv),
1150 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1151 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1152 0, 0x3f, 0, digital_fine_tlv),
1153
1154 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1155 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1156 6, 0x2, 0, digital_coarse_tlv),
1157 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1158 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1159 6, 0x2, 0, digital_coarse_tlv),
1160
1161 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1162 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1163 3, 0x12, 1, analog_tlv),
1164 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1165 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1166 3, 0x12, 1, analog_tlv),
Peter Ujfalusi44c55872008-12-09 08:45:44 +02001167 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1168 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1169 1, 1, 0),
1170 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1171 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1172 1, 1, 0),
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001173
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001174 /* Common voice downlink gain controls */
1175 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1176 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1177
1178 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1179 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1180
1181 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1182 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1183
Peter Ujfalusi42902392008-12-01 10:03:47 +02001184 /* Separate output gain controls */
1185 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
1186 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1187 4, 3, 0, output_tvl),
1188
1189 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
1190 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, output_tvl),
1191
1192 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
1193 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1194 4, 3, 0, output_tvl),
1195
1196 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
Joonyoung Shim18cc8d82009-04-28 18:18:05 +09001197 TWL4030_REG_EAR_CTL, 4, 3, 0, output_ear_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001198
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001199 /* Common capture gain controls */
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001200 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001201 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1202 0, 0x1f, 0, digital_capture_tlv),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001203 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1204 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1205 0, 0x1f, 0, digital_capture_tlv),
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001206
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001207 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001208 0, 3, 5, 0, input_gain_tlv),
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001209
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001210 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1211
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001212 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001213
1214 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1215 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001216
1217 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
Steve Sakomancc175572008-10-30 21:35:26 -07001218};
1219
Steve Sakomancc175572008-10-30 21:35:26 -07001220static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001221 /* Left channel inputs */
1222 SND_SOC_DAPM_INPUT("MAINMIC"),
1223 SND_SOC_DAPM_INPUT("HSMIC"),
1224 SND_SOC_DAPM_INPUT("AUXL"),
1225 SND_SOC_DAPM_INPUT("CARKITMIC"),
1226 /* Right channel inputs */
1227 SND_SOC_DAPM_INPUT("SUBMIC"),
1228 SND_SOC_DAPM_INPUT("AUXR"),
1229 /* Digital microphones (Stereo) */
1230 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1231 SND_SOC_DAPM_INPUT("DIGIMIC1"),
Steve Sakomancc175572008-10-30 21:35:26 -07001232
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001233 /* Outputs */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001234 SND_SOC_DAPM_OUTPUT("EARPIECE"),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001235 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1236 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001237 SND_SOC_DAPM_OUTPUT("HSOL"),
1238 SND_SOC_DAPM_OUTPUT("HSOR"),
Peter Ujfalusi6a1bee42008-12-10 12:51:46 +02001239 SND_SOC_DAPM_OUTPUT("CARKITL"),
1240 SND_SOC_DAPM_OUTPUT("CARKITR"),
Peter Ujfalusidf339802008-12-09 12:35:51 +02001241 SND_SOC_DAPM_OUTPUT("HFL"),
1242 SND_SOC_DAPM_OUTPUT("HFR"),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001243 SND_SOC_DAPM_OUTPUT("VIBRA"),
Steve Sakomancc175572008-10-30 21:35:26 -07001244
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001245 /* AIF and APLL clocks for running DAIs (including loopback) */
1246 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1247 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1248 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1249
Peter Ujfalusi53b50472008-12-09 08:45:43 +02001250 /* DACs */
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001251 SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001252 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001253 SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001254 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001255 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001256 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001257 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001258 SND_SOC_NOPM, 0, 0),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001259 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001260 SND_SOC_NOPM, 0, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001261
Peter Ujfalusi73939582009-01-29 14:57:50 +02001262 /* Analog bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001263 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1264 &twl4030_dapm_abypassr1_control),
1265 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1266 &twl4030_dapm_abypassl1_control),
1267 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1268 &twl4030_dapm_abypassr2_control),
1269 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1270 &twl4030_dapm_abypassl2_control),
1271 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1272 &twl4030_dapm_abypassv_control),
1273
1274 /* Master analog loopback switch */
1275 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1276 NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001277
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001278 /* Digital bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001279 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1280 &twl4030_dapm_dbypassl_control),
1281 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1282 &twl4030_dapm_dbypassr_control),
1283 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1284 &twl4030_dapm_dbypassv_control),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001285
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001286 /* Digital mixers, power control for the physical DACs */
1287 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1288 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1289 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1290 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1291 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1292 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1293 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1294 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1295 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1296 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1297
1298 /* Analog mixers, power control for the physical PGAs */
1299 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1300 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1301 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1302 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1303 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1304 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1305 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1306 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1307 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1308 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001309
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001310 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1311 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1312
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001313 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1314 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001315
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001316 /* Output MIXER controls */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001317 /* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001318 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1319 &twl4030_dapm_earpiece_controls[0],
1320 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001321 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1322 0, 0, NULL, 0, earpiecepga_event,
1323 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001324 /* PreDrivL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001325 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1326 &twl4030_dapm_predrivel_controls[0],
1327 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001328 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1329 0, 0, NULL, 0, predrivelpga_event,
1330 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001331 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1332 &twl4030_dapm_predriver_controls[0],
1333 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001334 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1335 0, 0, NULL, 0, predriverpga_event,
1336 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001337 /* HeadsetL/R */
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001338 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001339 &twl4030_dapm_hsol_controls[0],
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001340 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1341 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1342 0, 0, NULL, 0, headsetlpga_event,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001343 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1344 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1345 &twl4030_dapm_hsor_controls[0],
1346 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001347 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1348 0, 0, NULL, 0, headsetrpga_event,
1349 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001350 /* CarkitL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001351 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1352 &twl4030_dapm_carkitl_controls[0],
1353 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001354 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1355 0, 0, NULL, 0, carkitlpga_event,
1356 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001357 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1358 &twl4030_dapm_carkitr_controls[0],
1359 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001360 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1361 0, 0, NULL, 0, carkitrpga_event,
1362 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001363
1364 /* Output MUX controls */
Peter Ujfalusidf339802008-12-09 12:35:51 +02001365 /* HandsfreeL/R */
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001366 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1367 &twl4030_dapm_handsfreel_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001368 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001369 &twl4030_dapm_handsfreelmute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001370 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1371 0, 0, NULL, 0, handsfreelpga_event,
1372 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1373 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1374 &twl4030_dapm_handsfreer_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001375 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001376 &twl4030_dapm_handsfreermute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001377 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1378 0, 0, NULL, 0, handsfreerpga_event,
1379 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001380 /* Vibra */
Jari Vanhala86139a12009-10-29 11:58:09 +02001381 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1382 &twl4030_dapm_vibra_control, vibramux_event,
1383 SND_SOC_DAPM_PRE_PMU),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001384 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1385 &twl4030_dapm_vibrapath_control),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001386
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001387 /* Introducing four virtual ADC, since TWL4030 have four channel for
1388 capture */
1389 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1390 SND_SOC_NOPM, 0, 0),
1391 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1392 SND_SOC_NOPM, 0, 0),
1393 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1394 SND_SOC_NOPM, 0, 0),
1395 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1396 SND_SOC_NOPM, 0, 0),
1397
1398 /* Analog/Digital mic path selection.
1399 TX1 Left/Right: either analog Left/Right or Digimic0
1400 TX2 Left/Right: either analog Left/Right or Digimic1 */
1401 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1402 &twl4030_dapm_micpathtx1_control, micpath_event,
1403 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1404 SND_SOC_DAPM_POST_REG),
1405 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1406 &twl4030_dapm_micpathtx2_control, micpath_event,
1407 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1408 SND_SOC_DAPM_POST_REG),
1409
Joonyoung Shim97b80962009-05-11 20:36:08 +09001410 /* Analog input mixers for the capture amplifiers */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001411 SND_SOC_DAPM_MIXER("Analog Left",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001412 TWL4030_REG_ANAMICL, 4, 0,
1413 &twl4030_dapm_analoglmic_controls[0],
1414 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
Peter Ujfalusi90289352009-08-14 08:44:00 +03001415 SND_SOC_DAPM_MIXER("Analog Right",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001416 TWL4030_REG_ANAMICR, 4, 0,
1417 &twl4030_dapm_analogrmic_controls[0],
1418 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001419
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001420 SND_SOC_DAPM_PGA("ADC Physical Left",
1421 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1422 SND_SOC_DAPM_PGA("ADC Physical Right",
1423 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001424
1425 SND_SOC_DAPM_PGA("Digimic0 Enable",
1426 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0),
1427 SND_SOC_DAPM_PGA("Digimic1 Enable",
1428 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0),
1429
1430 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
1431 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
1432 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001433
Steve Sakomancc175572008-10-30 21:35:26 -07001434};
1435
1436static const struct snd_soc_dapm_route intercon[] = {
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001437 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1438 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1439 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1440 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1441 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001442
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001443 /* Supply for the digital part (APLL) */
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001444 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1445
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001446 {"Digital R1 Playback Mixer", NULL, "AIF Enable"},
1447 {"Digital L1 Playback Mixer", NULL, "AIF Enable"},
1448 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1449 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1450
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001451 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1452 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1453 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1454 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1455 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001456
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001457 /* Internal playback routings */
1458 /* Earpiece */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001459 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1460 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1461 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1462 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001463 {"Earpiece PGA", NULL, "Earpiece Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001464 /* PreDrivL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001465 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1466 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1467 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1468 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001469 {"PredriveL PGA", NULL, "PredriveL Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001470 /* PreDrivR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001471 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1472 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1473 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1474 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001475 {"PredriveR PGA", NULL, "PredriveR Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001476 /* HeadsetL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001477 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1478 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1479 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001480 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001481 /* HeadsetR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001482 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1483 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1484 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001485 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001486 /* CarkitL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001487 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1488 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1489 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001490 {"CarkitL PGA", NULL, "CarkitL Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001491 /* CarkitR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001492 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1493 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1494 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001495 {"CarkitR PGA", NULL, "CarkitR Mixer"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001496 /* HandsfreeL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001497 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1498 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1499 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1500 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001501 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1502 {"HandsfreeL PGA", NULL, "HandsfreeL"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001503 /* HandsfreeR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001504 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1505 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1506 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1507 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001508 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1509 {"HandsfreeR PGA", NULL, "HandsfreeR"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001510 /* Vibra */
1511 {"Vibra Mux", "AudioL1", "DAC Left1"},
1512 {"Vibra Mux", "AudioR1", "DAC Right1"},
1513 {"Vibra Mux", "AudioL2", "DAC Left2"},
1514 {"Vibra Mux", "AudioR2", "DAC Right2"},
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001515
Steve Sakomancc175572008-10-30 21:35:26 -07001516 /* outputs */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001517 /* Must be always connected (for AIF and APLL) */
1518 {"Virtual HiFi OUT", NULL, "Digital L1 Playback Mixer"},
1519 {"Virtual HiFi OUT", NULL, "Digital R1 Playback Mixer"},
1520 {"Virtual HiFi OUT", NULL, "Digital L2 Playback Mixer"},
1521 {"Virtual HiFi OUT", NULL, "Digital R2 Playback Mixer"},
1522 /* Must be always connected (for APLL) */
1523 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1524 /* Physical outputs */
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001525 {"EARPIECE", NULL, "Earpiece PGA"},
1526 {"PREDRIVEL", NULL, "PredriveL PGA"},
1527 {"PREDRIVER", NULL, "PredriveR PGA"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001528 {"HSOL", NULL, "HeadsetL PGA"},
1529 {"HSOR", NULL, "HeadsetR PGA"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001530 {"CARKITL", NULL, "CarkitL PGA"},
1531 {"CARKITR", NULL, "CarkitR PGA"},
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001532 {"HFL", NULL, "HandsfreeL PGA"},
1533 {"HFR", NULL, "HandsfreeR PGA"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001534 {"Vibra Route", "Audio", "Vibra Mux"},
1535 {"VIBRA", NULL, "Vibra Route"},
Steve Sakomancc175572008-10-30 21:35:26 -07001536
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001537 /* Capture path */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001538 /* Must be always connected (for AIF and APLL) */
1539 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1540 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1541 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1542 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1543 /* Physical inputs */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001544 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1545 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1546 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1547 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001548
Peter Ujfalusi90289352009-08-14 08:44:00 +03001549 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1550 {"Analog Right", "AUXR Capture Switch", "AUXR"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001551
Peter Ujfalusi90289352009-08-14 08:44:00 +03001552 {"ADC Physical Left", NULL, "Analog Left"},
1553 {"ADC Physical Right", NULL, "Analog Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001554
1555 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1556 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1557
1558 /* TX1 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001559 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001560 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1561 /* TX1 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001562 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001563 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1564 /* TX2 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001565 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001566 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1567 /* TX2 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001568 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001569 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1570
1571 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1572 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1573 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1574 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1575
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001576 {"ADC Virtual Left1", NULL, "AIF Enable"},
1577 {"ADC Virtual Right1", NULL, "AIF Enable"},
1578 {"ADC Virtual Left2", NULL, "AIF Enable"},
1579 {"ADC Virtual Right2", NULL, "AIF Enable"},
1580
Peter Ujfalusi73939582009-01-29 14:57:50 +02001581 /* Analog bypass routes */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001582 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1583 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1584 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1585 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1586 {"Voice Analog Loopback", "Switch", "Analog Left"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001587
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001588 /* Supply for the Analog loopbacks */
1589 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1590 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1591 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1592 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1593 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1594
Peter Ujfalusi73939582009-01-29 14:57:50 +02001595 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1596 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1597 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1598 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001599 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001600
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001601 /* Digital bypass routes */
1602 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1603 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001604 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001605
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001606 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1607 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1608 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001609
Steve Sakomancc175572008-10-30 21:35:26 -07001610};
1611
1612static int twl4030_add_widgets(struct snd_soc_codec *codec)
1613{
1614 snd_soc_dapm_new_controls(codec, twl4030_dapm_widgets,
1615 ARRAY_SIZE(twl4030_dapm_widgets));
1616
1617 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
1618
Steve Sakomancc175572008-10-30 21:35:26 -07001619 return 0;
1620}
1621
Steve Sakomancc175572008-10-30 21:35:26 -07001622static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1623 enum snd_soc_bias_level level)
1624{
1625 switch (level) {
1626 case SND_SOC_BIAS_ON:
Steve Sakomancc175572008-10-30 21:35:26 -07001627 break;
1628 case SND_SOC_BIAS_PREPARE:
Steve Sakomancc175572008-10-30 21:35:26 -07001629 break;
1630 case SND_SOC_BIAS_STANDBY:
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001631 if (codec->bias_level == SND_SOC_BIAS_OFF)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +03001632 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001633 break;
1634 case SND_SOC_BIAS_OFF:
Peter Ujfalusicbd2db12010-05-26 11:38:15 +03001635 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001636 break;
1637 }
1638 codec->bias_level = level;
1639
1640 return 0;
1641}
1642
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001643static void twl4030_constraints(struct twl4030_priv *twl4030,
1644 struct snd_pcm_substream *mst_substream)
1645{
1646 struct snd_pcm_substream *slv_substream;
1647
1648 /* Pick the stream, which need to be constrained */
1649 if (mst_substream == twl4030->master_substream)
1650 slv_substream = twl4030->slave_substream;
1651 else if (mst_substream == twl4030->slave_substream)
1652 slv_substream = twl4030->master_substream;
1653 else /* This should not happen.. */
1654 return;
1655
1656 /* Set the constraints according to the already configured stream */
1657 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1658 SNDRV_PCM_HW_PARAM_RATE,
1659 twl4030->rate,
1660 twl4030->rate);
1661
1662 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1663 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1664 twl4030->sample_bits,
1665 twl4030->sample_bits);
1666
1667 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1668 SNDRV_PCM_HW_PARAM_CHANNELS,
1669 twl4030->channels,
1670 twl4030->channels);
1671}
1672
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001673/* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1674 * capture has to be enabled/disabled. */
1675static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1676 int enable)
1677{
1678 u8 reg, mask;
1679
1680 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1681
1682 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1683 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1684 else
1685 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1686
1687 if (enable)
1688 reg |= mask;
1689 else
1690 reg &= ~mask;
1691
1692 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1693}
1694
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001695static int twl4030_startup(struct snd_pcm_substream *substream,
1696 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001697{
1698 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1699 struct snd_soc_device *socdev = rtd->socdev;
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001700 struct snd_soc_codec *codec = socdev->card->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001701 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001702
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001703 if (twl4030->master_substream) {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001704 twl4030->slave_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001705 /* The DAI has one configuration for playback and capture, so
1706 * if the DAI has been already configured then constrain this
1707 * substream to match it. */
1708 if (twl4030->configured)
1709 twl4030_constraints(twl4030, twl4030->master_substream);
1710 } else {
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001711 if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
1712 TWL4030_OPTION_1)) {
1713 /* In option2 4 channel is not supported, set the
1714 * constraint for the first stream for channels, the
1715 * second stream will 'inherit' this cosntraint */
1716 snd_pcm_hw_constraint_minmax(substream->runtime,
1717 SNDRV_PCM_HW_PARAM_CHANNELS,
1718 2, 2);
1719 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001720 twl4030->master_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001721 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001722
1723 return 0;
1724}
1725
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001726static void twl4030_shutdown(struct snd_pcm_substream *substream,
1727 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001728{
1729 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1730 struct snd_soc_device *socdev = rtd->socdev;
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001731 struct snd_soc_codec *codec = socdev->card->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001732 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001733
1734 if (twl4030->master_substream == substream)
1735 twl4030->master_substream = twl4030->slave_substream;
1736
1737 twl4030->slave_substream = NULL;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001738
1739 /* If all streams are closed, or the remaining stream has not yet
1740 * been configured than set the DAI as not configured. */
1741 if (!twl4030->master_substream)
1742 twl4030->configured = 0;
1743 else if (!twl4030->master_substream->runtime->channels)
1744 twl4030->configured = 0;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001745
1746 /* If the closing substream had 4 channel, do the necessary cleanup */
1747 if (substream->runtime->channels == 4)
1748 twl4030_tdm_enable(codec, substream->stream, 0);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001749}
1750
Steve Sakomancc175572008-10-30 21:35:26 -07001751static int twl4030_hw_params(struct snd_pcm_substream *substream,
Mark Browndee89c42008-11-18 22:11:38 +00001752 struct snd_pcm_hw_params *params,
1753 struct snd_soc_dai *dai)
Steve Sakomancc175572008-10-30 21:35:26 -07001754{
1755 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1756 struct snd_soc_device *socdev = rtd->socdev;
Mark Brown6627a652009-01-23 22:55:23 +00001757 struct snd_soc_codec *codec = socdev->card->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001758 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001759 u8 mode, old_mode, format, old_format;
1760
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001761 /* If the substream has 4 channel, do the necessary setup */
1762 if (params_channels(params) == 4) {
Peter Ujfalusieaf1ac82009-06-01 14:06:40 +03001763 format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1764 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
1765
1766 /* Safety check: are we in the correct operating mode and
1767 * the interface is in TDM mode? */
1768 if ((mode & TWL4030_OPTION_1) &&
1769 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001770 twl4030_tdm_enable(codec, substream->stream, 1);
1771 else
1772 return -EINVAL;
1773 }
1774
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001775 if (twl4030->configured)
1776 /* Ignoring hw_params for already configured DAI */
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001777 return 0;
1778
Steve Sakomancc175572008-10-30 21:35:26 -07001779 /* bit rate */
1780 old_mode = twl4030_read_reg_cache(codec,
1781 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1782 mode = old_mode & ~TWL4030_APLL_RATE;
1783
1784 switch (params_rate(params)) {
1785 case 8000:
1786 mode |= TWL4030_APLL_RATE_8000;
1787 break;
1788 case 11025:
1789 mode |= TWL4030_APLL_RATE_11025;
1790 break;
1791 case 12000:
1792 mode |= TWL4030_APLL_RATE_12000;
1793 break;
1794 case 16000:
1795 mode |= TWL4030_APLL_RATE_16000;
1796 break;
1797 case 22050:
1798 mode |= TWL4030_APLL_RATE_22050;
1799 break;
1800 case 24000:
1801 mode |= TWL4030_APLL_RATE_24000;
1802 break;
1803 case 32000:
1804 mode |= TWL4030_APLL_RATE_32000;
1805 break;
1806 case 44100:
1807 mode |= TWL4030_APLL_RATE_44100;
1808 break;
1809 case 48000:
1810 mode |= TWL4030_APLL_RATE_48000;
1811 break;
Peter Ujfalusi103f2112009-04-03 14:39:05 +03001812 case 96000:
1813 mode |= TWL4030_APLL_RATE_96000;
1814 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001815 default:
1816 printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
1817 params_rate(params));
1818 return -EINVAL;
1819 }
1820
Steve Sakomancc175572008-10-30 21:35:26 -07001821 /* sample size */
1822 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1823 format = old_format;
1824 format &= ~TWL4030_DATA_WIDTH;
1825 switch (params_format(params)) {
1826 case SNDRV_PCM_FORMAT_S16_LE:
1827 format |= TWL4030_DATA_WIDTH_16S_16W;
1828 break;
1829 case SNDRV_PCM_FORMAT_S24_LE:
1830 format |= TWL4030_DATA_WIDTH_32S_24W;
1831 break;
1832 default:
1833 printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
1834 params_format(params));
1835 return -EINVAL;
1836 }
1837
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001838 if (format != old_format || mode != old_mode) {
1839 if (twl4030->codec_powered) {
1840 /*
1841 * If the codec is powered, than we need to toggle the
1842 * codec power.
1843 */
1844 twl4030_codec_enable(codec, 0);
1845 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1846 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1847 twl4030_codec_enable(codec, 1);
1848 } else {
1849 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1850 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1851 }
Steve Sakomancc175572008-10-30 21:35:26 -07001852 }
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001853
1854 /* Store the important parameters for the DAI configuration and set
1855 * the DAI as configured */
1856 twl4030->configured = 1;
1857 twl4030->rate = params_rate(params);
1858 twl4030->sample_bits = hw_param_interval(params,
1859 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1860 twl4030->channels = params_channels(params);
1861
1862 /* If both playback and capture streams are open, and one of them
1863 * is setting the hw parameters right now (since we are here), set
1864 * constraints to the other stream to match the current one. */
1865 if (twl4030->slave_substream)
1866 twl4030_constraints(twl4030, substream);
1867
Steve Sakomancc175572008-10-30 21:35:26 -07001868 return 0;
1869}
1870
1871static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1872 int clk_id, unsigned int freq, int dir)
1873{
1874 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001875 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001876
1877 switch (freq) {
1878 case 19200000:
Steve Sakomancc175572008-10-30 21:35:26 -07001879 case 26000000:
Steve Sakomancc175572008-10-30 21:35:26 -07001880 case 38400000:
Steve Sakomancc175572008-10-30 21:35:26 -07001881 break;
1882 default:
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001883 dev_err(codec->dev, "Unsupported APLL mclk: %u\n", freq);
Steve Sakomancc175572008-10-30 21:35:26 -07001884 return -EINVAL;
1885 }
1886
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001887 if ((freq / 1000) != twl4030->sysclk) {
1888 dev_err(codec->dev,
1889 "Mismatch in APLL mclk: %u (configured: %u)\n",
1890 freq, twl4030->sysclk * 1000);
1891 return -EINVAL;
1892 }
Steve Sakomancc175572008-10-30 21:35:26 -07001893
1894 return 0;
1895}
1896
1897static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
1898 unsigned int fmt)
1899{
1900 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001901 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001902 u8 old_format, format;
1903
1904 /* get format */
1905 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1906 format = old_format;
1907
1908 /* set master/slave audio interface */
1909 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1910 case SND_SOC_DAIFMT_CBM_CFM:
1911 format &= ~(TWL4030_AIF_SLAVE_EN);
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001912 format &= ~(TWL4030_CLK256FS_EN);
Steve Sakomancc175572008-10-30 21:35:26 -07001913 break;
1914 case SND_SOC_DAIFMT_CBS_CFS:
Steve Sakomancc175572008-10-30 21:35:26 -07001915 format |= TWL4030_AIF_SLAVE_EN;
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001916 format |= TWL4030_CLK256FS_EN;
Steve Sakomancc175572008-10-30 21:35:26 -07001917 break;
1918 default:
1919 return -EINVAL;
1920 }
1921
1922 /* interface format */
1923 format &= ~TWL4030_AIF_FORMAT;
1924 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1925 case SND_SOC_DAIFMT_I2S:
1926 format |= TWL4030_AIF_FORMAT_CODEC;
1927 break;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001928 case SND_SOC_DAIFMT_DSP_A:
1929 format |= TWL4030_AIF_FORMAT_TDM;
1930 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001931 default:
1932 return -EINVAL;
1933 }
1934
1935 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001936 if (twl4030->codec_powered) {
1937 /*
1938 * If the codec is powered, than we need to toggle the
1939 * codec power.
1940 */
1941 twl4030_codec_enable(codec, 0);
1942 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1943 twl4030_codec_enable(codec, 1);
1944 } else {
1945 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1946 }
Steve Sakomancc175572008-10-30 21:35:26 -07001947 }
1948
1949 return 0;
1950}
1951
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001952static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1953{
1954 struct snd_soc_codec *codec = dai->codec;
1955 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1956
1957 if (tristate)
1958 reg |= TWL4030_AIF_TRI_EN;
1959 else
1960 reg &= ~TWL4030_AIF_TRI_EN;
1961
1962 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1963}
1964
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001965/* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1966 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1967static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
1968 int enable)
1969{
1970 u8 reg, mask;
1971
1972 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1973
1974 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1975 mask = TWL4030_ARXL1_VRX_EN;
1976 else
1977 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1978
1979 if (enable)
1980 reg |= mask;
1981 else
1982 reg &= ~mask;
1983
1984 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1985}
1986
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001987static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1988 struct snd_soc_dai *dai)
1989{
1990 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1991 struct snd_soc_device *socdev = rtd->socdev;
1992 struct snd_soc_codec *codec = socdev->card->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001993 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001994 u8 mode;
1995
1996 /* If the system master clock is not 26MHz, the voice PCM interface is
1997 * not avilable.
1998 */
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001999 if (twl4030->sysclk != 26000) {
2000 dev_err(codec->dev, "The board is configured for %u Hz, while"
2001 "the Voice interface needs 26MHz APLL mclk\n",
2002 twl4030->sysclk * 1000);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002003 return -EINVAL;
2004 }
2005
2006 /* If the codec mode is not option2, the voice PCM interface is not
2007 * avilable.
2008 */
2009 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
2010 & TWL4030_OPT_MODE;
2011
2012 if (mode != TWL4030_OPTION_2) {
2013 printk(KERN_ERR "TWL4030 voice startup: "
2014 "the codec mode is not option2\n");
2015 return -EINVAL;
2016 }
2017
2018 return 0;
2019}
2020
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002021static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
2022 struct snd_soc_dai *dai)
2023{
2024 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2025 struct snd_soc_device *socdev = rtd->socdev;
2026 struct snd_soc_codec *codec = socdev->card->codec;
2027
2028 /* Enable voice digital filters */
2029 twl4030_voice_enable(codec, substream->stream, 0);
2030}
2031
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002032static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
2033 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2034{
2035 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2036 struct snd_soc_device *socdev = rtd->socdev;
2037 struct snd_soc_codec *codec = socdev->card->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002038 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002039 u8 old_mode, mode;
2040
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002041 /* Enable voice digital filters */
2042 twl4030_voice_enable(codec, substream->stream, 1);
2043
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002044 /* bit rate */
2045 old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
2046 & ~(TWL4030_CODECPDZ);
2047 mode = old_mode;
2048
2049 switch (params_rate(params)) {
2050 case 8000:
2051 mode &= ~(TWL4030_SEL_16K);
2052 break;
2053 case 16000:
2054 mode |= TWL4030_SEL_16K;
2055 break;
2056 default:
2057 printk(KERN_ERR "TWL4030 voice hw params: unknown rate %d\n",
2058 params_rate(params));
2059 return -EINVAL;
2060 }
2061
2062 if (mode != old_mode) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002063 if (twl4030->codec_powered) {
2064 /*
2065 * If the codec is powered, than we need to toggle the
2066 * codec power.
2067 */
2068 twl4030_codec_enable(codec, 0);
2069 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2070 twl4030_codec_enable(codec, 1);
2071 } else {
2072 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2073 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002074 }
2075
2076 return 0;
2077}
2078
2079static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
2080 int clk_id, unsigned int freq, int dir)
2081{
2082 struct snd_soc_codec *codec = codec_dai->codec;
Takashi Iwaid4a8ca22010-04-20 08:20:31 +02002083 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002084
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002085 if (freq != 26000000) {
2086 dev_err(codec->dev, "Unsupported APLL mclk: %u, the Voice"
2087 "interface needs 26MHz APLL mclk\n", freq);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002088 return -EINVAL;
2089 }
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002090 if ((freq / 1000) != twl4030->sysclk) {
2091 dev_err(codec->dev,
2092 "Mismatch in APLL mclk: %u (configured: %u)\n",
2093 freq, twl4030->sysclk * 1000);
2094 return -EINVAL;
2095 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002096 return 0;
2097}
2098
2099static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
2100 unsigned int fmt)
2101{
2102 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002103 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002104 u8 old_format, format;
2105
2106 /* get format */
2107 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2108 format = old_format;
2109
2110 /* set master/slave audio interface */
2111 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
Lopez Cruz, Misaelc2643012009-06-19 03:23:42 -05002112 case SND_SOC_DAIFMT_CBM_CFM:
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002113 format &= ~(TWL4030_VIF_SLAVE_EN);
2114 break;
2115 case SND_SOC_DAIFMT_CBS_CFS:
2116 format |= TWL4030_VIF_SLAVE_EN;
2117 break;
2118 default:
2119 return -EINVAL;
2120 }
2121
2122 /* clock inversion */
2123 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2124 case SND_SOC_DAIFMT_IB_NF:
2125 format &= ~(TWL4030_VIF_FORMAT);
2126 break;
2127 case SND_SOC_DAIFMT_NB_IF:
2128 format |= TWL4030_VIF_FORMAT;
2129 break;
2130 default:
2131 return -EINVAL;
2132 }
2133
2134 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002135 if (twl4030->codec_powered) {
2136 /*
2137 * If the codec is powered, than we need to toggle the
2138 * codec power.
2139 */
2140 twl4030_codec_enable(codec, 0);
2141 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2142 twl4030_codec_enable(codec, 1);
2143 } else {
2144 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2145 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002146 }
2147
2148 return 0;
2149}
2150
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002151static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2152{
2153 struct snd_soc_codec *codec = dai->codec;
2154 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2155
2156 if (tristate)
2157 reg |= TWL4030_VIF_TRI_EN;
2158 else
2159 reg &= ~TWL4030_VIF_TRI_EN;
2160
2161 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2162}
2163
Jarkko Nikulabbba9442008-11-12 17:05:41 +02002164#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
Steve Sakomancc175572008-10-30 21:35:26 -07002165#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
2166
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002167static struct snd_soc_dai_ops twl4030_dai_ops = {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02002168 .startup = twl4030_startup,
2169 .shutdown = twl4030_shutdown,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002170 .hw_params = twl4030_hw_params,
2171 .set_sysclk = twl4030_set_dai_sysclk,
2172 .set_fmt = twl4030_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002173 .set_tristate = twl4030_set_tristate,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002174};
2175
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002176static struct snd_soc_dai_ops twl4030_dai_voice_ops = {
2177 .startup = twl4030_voice_startup,
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002178 .shutdown = twl4030_voice_shutdown,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002179 .hw_params = twl4030_voice_hw_params,
2180 .set_sysclk = twl4030_voice_set_dai_sysclk,
2181 .set_fmt = twl4030_voice_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002182 .set_tristate = twl4030_voice_set_tristate,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002183};
2184
2185struct snd_soc_dai twl4030_dai[] = {
2186{
Steve Sakomancc175572008-10-30 21:35:26 -07002187 .name = "twl4030",
2188 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002189 .stream_name = "HiFi Playback",
Steve Sakomancc175572008-10-30 21:35:26 -07002190 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002191 .channels_max = 4,
Peter Ujfalusi31ad0f32009-03-27 10:39:07 +02002192 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
Steve Sakomancc175572008-10-30 21:35:26 -07002193 .formats = TWL4030_FORMATS,},
2194 .capture = {
2195 .stream_name = "Capture",
2196 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002197 .channels_max = 4,
Steve Sakomancc175572008-10-30 21:35:26 -07002198 .rates = TWL4030_RATES,
2199 .formats = TWL4030_FORMATS,},
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002200 .ops = &twl4030_dai_ops,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002201},
2202{
2203 .name = "twl4030 Voice",
2204 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002205 .stream_name = "Voice Playback",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002206 .channels_min = 1,
2207 .channels_max = 1,
2208 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2209 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2210 .capture = {
2211 .stream_name = "Capture",
2212 .channels_min = 1,
2213 .channels_max = 2,
2214 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2215 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2216 .ops = &twl4030_dai_voice_ops,
2217},
Steve Sakomancc175572008-10-30 21:35:26 -07002218};
2219EXPORT_SYMBOL_GPL(twl4030_dai);
2220
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002221static int twl4030_soc_suspend(struct platform_device *pdev, pm_message_t state)
Steve Sakomancc175572008-10-30 21:35:26 -07002222{
2223 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002224 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002225
2226 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2227
2228 return 0;
2229}
2230
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002231static int twl4030_soc_resume(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -07002232{
2233 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002234 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002235
2236 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
Steve Sakomancc175572008-10-30 21:35:26 -07002237 return 0;
2238}
2239
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002240static struct snd_soc_codec *twl4030_codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002241
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002242static int twl4030_soc_probe(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -07002243{
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002244 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002245 struct snd_soc_codec *codec;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002246 int ret;
Steve Sakomancc175572008-10-30 21:35:26 -07002247
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002248 BUG_ON(!twl4030_codec);
Steve Sakomancc175572008-10-30 21:35:26 -07002249
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002250 codec = twl4030_codec;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002251 socdev->card->codec = codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002252
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +03002253 twl4030_init_chip(pdev);
Peter Ujfalusi9da28c72009-05-22 10:13:15 +03002254
Steve Sakomancc175572008-10-30 21:35:26 -07002255 /* register pcms */
2256 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
2257 if (ret < 0) {
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002258 dev_err(&pdev->dev, "failed to create pcms\n");
2259 return ret;
Steve Sakomancc175572008-10-30 21:35:26 -07002260 }
2261
Ian Molton3e8e1952009-01-09 00:23:21 +00002262 snd_soc_add_controls(codec, twl4030_snd_controls,
2263 ARRAY_SIZE(twl4030_snd_controls));
Steve Sakomancc175572008-10-30 21:35:26 -07002264 twl4030_add_widgets(codec);
2265
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002266 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -07002267}
2268
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002269static int twl4030_soc_remove(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -07002270{
2271 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002272 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002273
Peter Ujfalusi73939582009-01-29 14:57:50 +02002274 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
Peter Ujfalusic6d1662b2009-01-08 15:52:43 +02002275 snd_soc_free_pcms(socdev);
2276 snd_soc_dapm_free(socdev);
Steve Sakomancc175572008-10-30 21:35:26 -07002277
2278 return 0;
2279}
2280
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002281static int __devinit twl4030_codec_probe(struct platform_device *pdev)
2282{
2283 struct twl4030_codec_audio_data *pdata = pdev->dev.platform_data;
2284 struct snd_soc_codec *codec;
2285 struct twl4030_priv *twl4030;
2286 int ret;
2287
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002288 if (!pdata) {
2289 dev_err(&pdev->dev, "platform_data is missing\n");
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002290 return -EINVAL;
2291 }
2292
2293 twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
2294 if (twl4030 == NULL) {
2295 dev_err(&pdev->dev, "Can not allocate memroy\n");
2296 return -ENOMEM;
2297 }
2298
2299 codec = &twl4030->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09002300 snd_soc_codec_set_drvdata(codec, twl4030);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002301 codec->dev = &pdev->dev;
2302 twl4030_dai[0].dev = &pdev->dev;
2303 twl4030_dai[1].dev = &pdev->dev;
2304
2305 mutex_init(&codec->mutex);
2306 INIT_LIST_HEAD(&codec->dapm_widgets);
2307 INIT_LIST_HEAD(&codec->dapm_paths);
2308
2309 codec->name = "twl4030";
2310 codec->owner = THIS_MODULE;
2311 codec->read = twl4030_read_reg_cache;
2312 codec->write = twl4030_write;
2313 codec->set_bias_level = twl4030_set_bias_level;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002314 codec->idle_bias_off = 1;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002315 codec->dai = twl4030_dai;
Peter Ujfalusifd63df22010-01-13 12:37:49 +02002316 codec->num_dai = ARRAY_SIZE(twl4030_dai);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002317 codec->reg_cache_size = sizeof(twl4030_reg);
2318 codec->reg_cache = kmemdup(twl4030_reg, sizeof(twl4030_reg),
2319 GFP_KERNEL);
2320 if (codec->reg_cache == NULL) {
2321 ret = -ENOMEM;
2322 goto error_cache;
2323 }
2324
2325 platform_set_drvdata(pdev, twl4030);
2326 twl4030_codec = codec;
2327
2328 /* Set the defaults, and power up the codec */
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002329 twl4030->sysclk = twl4030_codec_get_mclk() / 1000;
Peter Ujfalusib3f5a272009-11-02 14:34:54 +02002330 codec->bias_level = SND_SOC_BIAS_OFF;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002331
2332 ret = snd_soc_register_codec(codec);
2333 if (ret != 0) {
2334 dev_err(codec->dev, "Failed to register codec: %d\n", ret);
2335 goto error_codec;
2336 }
2337
2338 ret = snd_soc_register_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
2339 if (ret != 0) {
2340 dev_err(codec->dev, "Failed to register DAIs: %d\n", ret);
2341 snd_soc_unregister_codec(codec);
2342 goto error_codec;
2343 }
2344
2345 return 0;
2346
2347error_codec:
Peter Ujfalusicbd2db12010-05-26 11:38:15 +03002348 twl4030_codec_enable(codec, 0);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002349 kfree(codec->reg_cache);
2350error_cache:
2351 kfree(twl4030);
2352 return ret;
2353}
2354
2355static int __devexit twl4030_codec_remove(struct platform_device *pdev)
2356{
2357 struct twl4030_priv *twl4030 = platform_get_drvdata(pdev);
2358
Peter Ujfalusicb672862010-02-04 09:10:10 +02002359 snd_soc_unregister_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
2360 snd_soc_unregister_codec(&twl4030->codec);
2361 kfree(twl4030->codec.reg_cache);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002362 kfree(twl4030);
2363
2364 twl4030_codec = NULL;
2365 return 0;
2366}
2367
2368MODULE_ALIAS("platform:twl4030_codec_audio");
2369
2370static struct platform_driver twl4030_codec_driver = {
2371 .probe = twl4030_codec_probe,
2372 .remove = __devexit_p(twl4030_codec_remove),
2373 .driver = {
2374 .name = "twl4030_codec_audio",
2375 .owner = THIS_MODULE,
2376 },
Steve Sakomancc175572008-10-30 21:35:26 -07002377};
Steve Sakomancc175572008-10-30 21:35:26 -07002378
Takashi Iwai24e07db2008-12-10 07:40:24 +01002379static int __init twl4030_modinit(void)
Mark Brown64089b82008-12-08 19:17:58 +00002380{
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002381 return platform_driver_register(&twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002382}
Takashi Iwai24e07db2008-12-10 07:40:24 +01002383module_init(twl4030_modinit);
Mark Brown64089b82008-12-08 19:17:58 +00002384
2385static void __exit twl4030_exit(void)
2386{
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002387 platform_driver_unregister(&twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002388}
2389module_exit(twl4030_exit);
2390
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002391struct snd_soc_codec_device soc_codec_dev_twl4030 = {
2392 .probe = twl4030_soc_probe,
2393 .remove = twl4030_soc_remove,
2394 .suspend = twl4030_soc_suspend,
2395 .resume = twl4030_soc_resume,
2396};
2397EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030);
2398
Steve Sakomancc175572008-10-30 21:35:26 -07002399MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2400MODULE_AUTHOR("Steve Sakoman");
2401MODULE_LICENSE("GPL");