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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Eran Ben Elisha37e92a92017-11-13 10:11:27 +0200150 MLX5_CMD_OP_SET_PP_RATE_LIMIT = 0x780,
Saeed Mahameed74862162016-06-09 15:11:34 +0300151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300203 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300204 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
205 MLX5_CMD_OP_QUERY_RQ = 0x90b,
206 MLX5_CMD_OP_CREATE_RMP = 0x90c,
207 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
208 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
209 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300210 MLX5_CMD_OP_CREATE_TIS = 0x912,
211 MLX5_CMD_OP_MODIFY_TIS = 0x913,
212 MLX5_CMD_OP_DESTROY_TIS = 0x914,
213 MLX5_CMD_OP_QUERY_TIS = 0x915,
214 MLX5_CMD_OP_CREATE_RQT = 0x916,
215 MLX5_CMD_OP_MODIFY_RQT = 0x917,
216 MLX5_CMD_OP_DESTROY_RQT = 0x918,
217 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200218 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300219 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
220 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
221 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
222 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
223 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
224 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
225 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
226 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200227 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000228 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
229 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
230 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300231 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300232 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
233 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200234 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
235 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300236 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
237 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
238 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
239 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
240 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300241 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300242};
243
244struct mlx5_ifc_flow_table_fields_supported_bits {
245 u8 outer_dmac[0x1];
246 u8 outer_smac[0x1];
247 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300248 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300249 u8 outer_first_prio[0x1];
250 u8 outer_first_cfi[0x1];
251 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300252 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300253 u8 outer_second_prio[0x1];
254 u8 outer_second_cfi[0x1];
255 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200256 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300257 u8 outer_sip[0x1];
258 u8 outer_dip[0x1];
259 u8 outer_frag[0x1];
260 u8 outer_ip_protocol[0x1];
261 u8 outer_ip_ecn[0x1];
262 u8 outer_ip_dscp[0x1];
263 u8 outer_udp_sport[0x1];
264 u8 outer_udp_dport[0x1];
265 u8 outer_tcp_sport[0x1];
266 u8 outer_tcp_dport[0x1];
267 u8 outer_tcp_flags[0x1];
268 u8 outer_gre_protocol[0x1];
269 u8 outer_gre_key[0x1];
270 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200271 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300272 u8 source_eswitch_port[0x1];
273
274 u8 inner_dmac[0x1];
275 u8 inner_smac[0x1];
276 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300277 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300278 u8 inner_first_prio[0x1];
279 u8 inner_first_cfi[0x1];
280 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200281 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300282 u8 inner_second_prio[0x1];
283 u8 inner_second_cfi[0x1];
284 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200285 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300286 u8 inner_sip[0x1];
287 u8 inner_dip[0x1];
288 u8 inner_frag[0x1];
289 u8 inner_ip_protocol[0x1];
290 u8 inner_ip_ecn[0x1];
291 u8 inner_ip_dscp[0x1];
292 u8 inner_udp_sport[0x1];
293 u8 inner_udp_dport[0x1];
294 u8 inner_tcp_sport[0x1];
295 u8 inner_tcp_dport[0x1];
296 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200297 u8 reserved_at_37[0x9];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300298 u8 reserved_at_40[0x1a];
299 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300300
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300301 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300302};
303
304struct mlx5_ifc_flow_table_prop_layout_bits {
305 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000306 u8 reserved_at_1[0x1];
307 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200308 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200309 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200310 u8 identified_miss_table_mode[0x1];
311 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300312 u8 encap[0x1];
313 u8 decap[0x1];
314 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300315
Matan Barakb4ff3a32016-02-09 14:57:42 +0200316 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200318 u8 log_max_modify_header_context[0x8];
319 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320 u8 max_ft_level[0x8];
321
Matan Barakb4ff3a32016-02-09 14:57:42 +0200322 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200325 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300326
Matan Barakb4ff3a32016-02-09 14:57:42 +0200327 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200328 u8 log_max_destination[0x8];
329
Raed Salem16f1c5b2017-07-30 11:02:51 +0300330 u8 log_max_flow_counter[0x8];
331 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300332 u8 log_max_flow[0x8];
333
Matan Barakb4ff3a32016-02-09 14:57:42 +0200334 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300335
336 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
337
338 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
339};
340
341struct mlx5_ifc_odp_per_transport_service_cap_bits {
342 u8 send[0x1];
343 u8 receive[0x1];
344 u8 write[0x1];
345 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200346 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300347 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200348 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300349};
350
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200351struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200352 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200353
354 u8 ipv4[0x20];
355};
356
357struct mlx5_ifc_ipv6_layout_bits {
358 u8 ipv6[16][0x8];
359};
360
361union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
362 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
363 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200364 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200365};
366
Saeed Mahameede2816822015-05-28 22:28:40 +0300367struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
368 u8 smac_47_16[0x20];
369
370 u8 smac_15_0[0x10];
371 u8 ethertype[0x10];
372
373 u8 dmac_47_16[0x20];
374
375 u8 dmac_15_0[0x10];
376 u8 first_prio[0x3];
377 u8 first_cfi[0x1];
378 u8 first_vid[0xc];
379
380 u8 ip_protocol[0x8];
381 u8 ip_dscp[0x6];
382 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300383 u8 cvlan_tag[0x1];
384 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300385 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300386 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300387 u8 tcp_flags[0x9];
388
389 u8 tcp_sport[0x10];
390 u8 tcp_dport[0x10];
391
Or Gerlitza8ade552017-06-07 17:49:56 +0300392 u8 reserved_at_c0[0x18];
393 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300394
395 u8 udp_sport[0x10];
396 u8 udp_dport[0x10];
397
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200398 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300399
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200400 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300401};
402
403struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300404 u8 reserved_at_0[0x8];
405 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300406
Matan Barakb4ff3a32016-02-09 14:57:42 +0200407 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300408 u8 source_port[0x10];
409
410 u8 outer_second_prio[0x3];
411 u8 outer_second_cfi[0x1];
412 u8 outer_second_vid[0xc];
413 u8 inner_second_prio[0x3];
414 u8 inner_second_cfi[0x1];
415 u8 inner_second_vid[0xc];
416
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300417 u8 outer_second_cvlan_tag[0x1];
418 u8 inner_second_cvlan_tag[0x1];
419 u8 outer_second_svlan_tag[0x1];
420 u8 inner_second_svlan_tag[0x1];
421 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300422 u8 gre_protocol[0x10];
423
424 u8 gre_key_h[0x18];
425 u8 gre_key_l[0x8];
426
427 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200428 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300429
Matan Barakb4ff3a32016-02-09 14:57:42 +0200430 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300431
Matan Barakb4ff3a32016-02-09 14:57:42 +0200432 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300433 u8 outer_ipv6_flow_label[0x14];
434
Matan Barakb4ff3a32016-02-09 14:57:42 +0200435 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300436 u8 inner_ipv6_flow_label[0x14];
437
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300438 u8 reserved_at_120[0x28];
439 u8 bth_dst_qp[0x18];
440 u8 reserved_at_160[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300441};
442
443struct mlx5_ifc_cmd_pas_bits {
444 u8 pa_h[0x20];
445
446 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200447 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300448};
449
450struct mlx5_ifc_uint64_bits {
451 u8 hi[0x20];
452
453 u8 lo[0x20];
454};
455
456enum {
457 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
458 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
459 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
460 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
461 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
462 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
463 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
464 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
465 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
466 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
467};
468
469struct mlx5_ifc_ads_bits {
470 u8 fl[0x1];
471 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200472 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300473 u8 pkey_index[0x10];
474
Matan Barakb4ff3a32016-02-09 14:57:42 +0200475 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300476 u8 grh[0x1];
477 u8 mlid[0x7];
478 u8 rlid[0x10];
479
480 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200483 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300484 u8 stat_rate[0x4];
485 u8 hop_limit[0x8];
486
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 tclass[0x8];
489 u8 flow_label[0x14];
490
491 u8 rgid_rip[16][0x8];
492
Matan Barakb4ff3a32016-02-09 14:57:42 +0200493 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300494 u8 f_dscp[0x1];
495 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200496 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300497 u8 f_eth_prio[0x1];
498 u8 ecn[0x2];
499 u8 dscp[0x6];
500 u8 udp_sport[0x10];
501
502 u8 dei_cfi[0x1];
503 u8 eth_prio[0x3];
504 u8 sl[0x4];
505 u8 port[0x8];
506 u8 rmac_47_32[0x10];
507
508 u8 rmac_31_0[0x20];
509};
510
511struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200512 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300513 u8 nic_rx_multi_path_tirs_fts[0x1];
514 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
515 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300516
517 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
518
Matan Barakb4ff3a32016-02-09 14:57:42 +0200519 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
522
523 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
524
Matan Barakb4ff3a32016-02-09 14:57:42 +0200525 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300526
527 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
528
Matan Barakb4ff3a32016-02-09 14:57:42 +0200529 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300530};
531
Saeed Mahameed495716b2015-12-01 18:03:19 +0200532struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200533 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200534
535 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
536
537 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
538
539 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
540
Matan Barakb4ff3a32016-02-09 14:57:42 +0200541 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200542};
543
Saeed Mahameedd6666752015-12-01 18:03:22 +0200544struct mlx5_ifc_e_switch_cap_bits {
545 u8 vport_svlan_strip[0x1];
546 u8 vport_cvlan_strip[0x1];
547 u8 vport_svlan_insert[0x1];
548 u8 vport_cvlan_insert_if_not_exist[0x1];
549 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300550 u8 reserved_at_5[0x19];
551 u8 nic_vport_node_guid_modify[0x1];
552 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200553
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300554 u8 vxlan_encap_decap[0x1];
555 u8 nvgre_encap_decap[0x1];
556 u8 reserved_at_22[0x9];
557 u8 log_max_encap_headers[0x5];
558 u8 reserved_2b[0x6];
559 u8 max_encap_header_size[0xa];
560
561 u8 reserved_40[0x7c0];
562
Saeed Mahameedd6666752015-12-01 18:03:22 +0200563};
564
Saeed Mahameed74862162016-06-09 15:11:34 +0300565struct mlx5_ifc_qos_cap_bits {
566 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300567 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200568 u8 esw_bw_share[0x1];
569 u8 esw_rate_limit[0x1];
570 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300571
572 u8 reserved_at_20[0x20];
573
Saeed Mahameed74862162016-06-09 15:11:34 +0300574 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300575
Saeed Mahameed74862162016-06-09 15:11:34 +0300576 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300577
578 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300579 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300580
581 u8 esw_element_type[0x10];
582 u8 esw_tsar_type[0x10];
583
584 u8 reserved_at_c0[0x10];
585 u8 max_qos_para_vport[0x10];
586
587 u8 max_tsar_bw_share[0x20];
588
589 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300590};
591
Saeed Mahameede2816822015-05-28 22:28:40 +0300592struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
593 u8 csum_cap[0x1];
594 u8 vlan_cap[0x1];
595 u8 lro_cap[0x1];
596 u8 lro_psh_flag[0x1];
597 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200598 u8 reserved_at_5[0x2];
599 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200600 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200601 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300602 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200603 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300604 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300605 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300606 u8 reg_umr_sq[0x1];
607 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300608 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300609 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200610 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300611 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300612 u8 tunnel_stateless_vxlan[0x1];
613
Ilan Tayari547eede2017-04-18 16:04:28 +0300614 u8 swp[0x1];
615 u8 swp_csum[0x1];
616 u8 swp_lso[0x1];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300617 u8 reserved_at_23[0x1b];
618 u8 max_geneve_opt_len[0x1];
619 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300620
Matan Barakb4ff3a32016-02-09 14:57:42 +0200621 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300622 u8 lro_min_mss_size[0x10];
623
Matan Barakb4ff3a32016-02-09 14:57:42 +0200624 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300625
626 u8 lro_timer_supported_periods[4][0x20];
627
Matan Barakb4ff3a32016-02-09 14:57:42 +0200628 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300629};
630
631struct mlx5_ifc_roce_cap_bits {
632 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200633 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300634
Matan Barakb4ff3a32016-02-09 14:57:42 +0200635 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300636
Matan Barakb4ff3a32016-02-09 14:57:42 +0200637 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300638 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200639 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300640 u8 roce_version[0x8];
641
Matan Barakb4ff3a32016-02-09 14:57:42 +0200642 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300643 u8 r_roce_dest_udp_port[0x10];
644
645 u8 r_roce_max_src_udp_port[0x10];
646 u8 r_roce_min_src_udp_port[0x10];
647
Matan Barakb4ff3a32016-02-09 14:57:42 +0200648 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300649 u8 roce_address_table_size[0x10];
650
Matan Barakb4ff3a32016-02-09 14:57:42 +0200651 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300652};
653
654enum {
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
656 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
657 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
658 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
659 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
660 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
661 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
662 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
663 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
664};
665
666enum {
667 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
668 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
669 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
670 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
671 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
672 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
673 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
674 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
675 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
676};
677
678struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200679 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300680
Or Gerlitzbd108382017-05-28 15:24:17 +0300681 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200682 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300683 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300684
Matan Barakb4ff3a32016-02-09 14:57:42 +0200685 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300686
Matan Barakb4ff3a32016-02-09 14:57:42 +0200687 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300688
Matan Barakb4ff3a32016-02-09 14:57:42 +0200689 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200690 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300691
Matan Barakb4ff3a32016-02-09 14:57:42 +0200692 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200693 u8 atomic_size_qp[0x10];
694
Matan Barakb4ff3a32016-02-09 14:57:42 +0200695 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300696 u8 atomic_size_dc[0x10];
697
Matan Barakb4ff3a32016-02-09 14:57:42 +0200698 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300699};
700
701struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200702 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300703
704 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200705 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300706
Matan Barakb4ff3a32016-02-09 14:57:42 +0200707 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300708
709 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
710
711 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
712
713 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
714
Matan Barakb4ff3a32016-02-09 14:57:42 +0200715 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300716};
717
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200718struct mlx5_ifc_calc_op {
719 u8 reserved_at_0[0x10];
720 u8 reserved_at_10[0x9];
721 u8 op_swap_endianness[0x1];
722 u8 op_min[0x1];
723 u8 op_xor[0x1];
724 u8 op_or[0x1];
725 u8 op_and[0x1];
726 u8 op_max[0x1];
727 u8 op_add[0x1];
728};
729
730struct mlx5_ifc_vector_calc_cap_bits {
731 u8 calc_matrix[0x1];
732 u8 reserved_at_1[0x1f];
733 u8 reserved_at_20[0x8];
734 u8 max_vec_count[0x8];
735 u8 reserved_at_30[0xd];
736 u8 max_chunk_size[0x3];
737 struct mlx5_ifc_calc_op calc0;
738 struct mlx5_ifc_calc_op calc1;
739 struct mlx5_ifc_calc_op calc2;
740 struct mlx5_ifc_calc_op calc3;
741
742 u8 reserved_at_e0[0x720];
743};
744
Saeed Mahameede2816822015-05-28 22:28:40 +0300745enum {
746 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
747 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300748 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc87082017-10-17 18:01:13 +0300749 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300750};
751
752enum {
753 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
754 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
755};
756
757enum {
758 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
759 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
760 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
761 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
762 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
763};
764
765enum {
766 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
767 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
768 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
769 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
770 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
771 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
772};
773
774enum {
775 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
776 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
777};
778
779enum {
780 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
781 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
782 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
783};
784
785enum {
786 MLX5_CAP_PORT_TYPE_IB = 0x0,
787 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300788};
789
Max Gurtovoy1410a902017-05-28 10:53:10 +0300790enum {
791 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
792 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
793 MLX5_CAP_UMR_FENCE_NONE = 0x2,
794};
795
Eli Cohenb7755162014-10-02 12:19:44 +0300796struct mlx5_ifc_cmd_hca_cap_bits {
Or Gerlitz40817cd2017-06-25 12:38:45 +0300797 u8 reserved_at_0[0x30];
798 u8 vhca_id[0x10];
799
800 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +0300801
802 u8 log_max_srq_sz[0x8];
803 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200804 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300805 u8 log_max_qp[0x5];
806
Matan Barakb4ff3a32016-02-09 14:57:42 +0200807 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300808 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200809 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300810
Matan Barakb4ff3a32016-02-09 14:57:42 +0200811 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300812 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200813 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300814 u8 log_max_cq[0x5];
815
816 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200817 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300818 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200819 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300820 u8 log_max_eq[0x4];
821
822 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200823 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300824 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200825 u8 force_teardown[0x1];
826 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300827 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200828 u8 umr_extended_translation_offset[0x1];
829 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300830 u8 log_max_klm_list_size[0x6];
831
Matan Barakb4ff3a32016-02-09 14:57:42 +0200832 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300833 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200834 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300835 u8 log_max_ra_res_dc[0x6];
836
Matan Barakb4ff3a32016-02-09 14:57:42 +0200837 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300838 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200839 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300840 u8 log_max_ra_res_qp[0x6];
841
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200842 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300843 u8 cc_query_allowed[0x1];
844 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200845 u8 start_pad[0x1];
846 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500847 u8 reserved_at_165[0xa];
848 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300849 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300850
Saeed Mahameede2816822015-05-28 22:28:40 +0300851 u8 out_of_seq_cnt[0x1];
852 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300853 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300854 u8 reserved_at_183[0x1];
855 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300856 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300857 u8 max_qp_cnt[0xa];
858 u8 pkey_table_size[0x10];
859
Saeed Mahameede2816822015-05-28 22:28:40 +0300860 u8 vport_group_manager[0x1];
861 u8 vhca_group_manager[0x1];
862 u8 ib_virt[0x1];
863 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200864 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300865 u8 ets[0x1];
866 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200867 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300868 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200869 u8 mcam_reg[0x1];
870 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300871 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200872 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300873 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300874 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200875 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300876 u8 disable_link_up[0x1];
877 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300878 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300879 u8 num_ports[0x8];
880
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300881 u8 reserved_at_1c0[0x1];
882 u8 pps[0x1];
883 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300884 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300885 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200886 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300887 u8 reserved_at_1d0[0x1];
888 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300889 u8 general_notification_event[0x1];
890 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200891 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200892 u8 rol_s[0x1];
893 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300894 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200895 u8 wol_s[0x1];
896 u8 wol_g[0x1];
897 u8 wol_a[0x1];
898 u8 wol_b[0x1];
899 u8 wol_m[0x1];
900 u8 wol_u[0x1];
901 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300902
903 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300904 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300905 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300906
Saeed Mahameede2816822015-05-28 22:28:40 +0300907 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300908 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300909 u8 reserved_at_202[0x1];
910 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200911 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300912 u8 reserved_at_205[0x5];
913 u8 umr_fence[0x2];
914 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300915 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300916 u8 cmdif_checksum[0x2];
917 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300918 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300919 u8 wq_signature[0x1];
920 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300921 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300922 u8 sho[0x1];
923 u8 tph[0x1];
924 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300925 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300926 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300927 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300928 u8 roce[0x1];
929 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300930 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300931
932 u8 cq_oi[0x1];
933 u8 cq_resize[0x1];
934 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300935 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300936 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300937 u8 pg[0x1];
938 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300939 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300940 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300941 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300942 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300943 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300944 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200945 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300946 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200947 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300948 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300949 u8 qkv[0x1];
950 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200951 u8 set_deth_sqpn[0x1];
952 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300953 u8 xrc[0x1];
954 u8 ud[0x1];
955 u8 uc[0x1];
956 u8 rc[0x1];
957
Eli Cohena6d51b62017-01-03 23:55:23 +0200958 u8 uar_4k[0x1];
959 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300960 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300961 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300962 u8 log_pg_sz[0x8];
963
964 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200965 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300966 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300967 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300968 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300969
970 u8 reserved_at_270[0xb];
971 u8 lag_master[0x1];
972 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300973
Tariq Toukane1c9c622016-04-11 23:10:21 +0300974 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300975 u8 max_wqe_sz_sq[0x10];
976
Tariq Toukane1c9c622016-04-11 23:10:21 +0300977 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300978 u8 max_wqe_sz_rq[0x10];
979
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300980 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300981 u8 max_wqe_sz_sq_dc[0x10];
982
Tariq Toukane1c9c622016-04-11 23:10:21 +0300983 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300984 u8 max_qp_mcg[0x19];
985
Tariq Toukane1c9c622016-04-11 23:10:21 +0300986 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300987 u8 log_max_mcg[0x8];
988
Tariq Toukane1c9c622016-04-11 23:10:21 +0300989 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300990 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300991 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300992 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300993 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300994 u8 log_max_xrcd[0x5];
995
Amir Vadaia351a1b02016-07-14 10:32:38 +0300996 u8 reserved_at_340[0x8];
997 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300998 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +0300999
Eli Cohenb7755162014-10-02 12:19:44 +03001000
Tariq Toukane1c9c622016-04-11 23:10:21 +03001001 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001002 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001003 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001004 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001005 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001006 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001007 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001008 u8 log_max_tis[0x5];
1009
Saeed Mahameede2816822015-05-28 22:28:40 +03001010 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001011 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001012 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001013 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001014 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001015 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001016 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001017 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001018 u8 log_max_tis_per_sq[0x5];
1019
Tariq Toukane1c9c622016-04-11 23:10:21 +03001020 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001021 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001022 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001023 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001024 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001025 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001026 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001027 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001028
Or Gerlitz40817cd2017-06-25 12:38:45 +03001029 u8 hairpin[0x1];
1030 u8 reserved_at_3c1[0x2];
1031 u8 log_max_hairpin_queues[0x5];
1032 u8 reserved_at_3c8[0x3];
1033 u8 log_max_hairpin_wq_data_sz[0x5];
1034 u8 reserved_at_3d0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +03001035 u8 log_max_wq_sz[0x5];
1036
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001037 u8 nic_vport_change_event[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03001038 u8 disable_local_lb[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001039 u8 reserved_at_3e2[0x1];
1040 u8 log_min_hairpin_wq_data_sz[0x5];
1041 u8 reserved_at_3e8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001042 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001043 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001044 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001045 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001046 u8 log_max_current_uc_list[0x5];
1047
Tariq Toukane1c9c622016-04-11 23:10:21 +03001048 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001049
Tariq Toukane1c9c622016-04-11 23:10:21 +03001050 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001051 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001052 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001053 u8 log_uar_page_sz[0x10];
1054
Tariq Toukane1c9c622016-04-11 23:10:21 +03001055 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001056 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001057 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001058
Eli Cohena6d51b62017-01-03 23:55:23 +02001059 u8 reserved_at_500[0x20];
1060 u8 num_of_uars_per_page[0x20];
1061 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001062
Guy Levi0ff8e792017-10-19 08:25:51 +03001063 u8 reserved_at_580[0x3d];
1064 u8 cqe_128_always[0x1];
1065 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001066 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001067
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001068 u8 cqe_compression_timeout[0x10];
1069 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001070
Saeed Mahameed74862162016-06-09 15:11:34 +03001071 u8 reserved_at_5e0[0x10];
1072 u8 tag_matching[0x1];
1073 u8 rndv_offload_rc[0x1];
1074 u8 rndv_offload_dc[0x1];
1075 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001076 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001077 u8 log_max_xrq[0x5];
1078
Max Gurtovoy7b135582017-01-02 11:37:38 +02001079 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001080};
1081
Saeed Mahameed81848732015-12-01 18:03:20 +02001082enum mlx5_flow_destination_type {
1083 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1084 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1085 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001086
1087 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001088};
1089
1090struct mlx5_ifc_dest_format_struct_bits {
1091 u8 destination_type[0x8];
1092 u8 destination_id[0x18];
1093
Matan Barakb4ff3a32016-02-09 14:57:42 +02001094 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001095};
1096
Amir Vadai9dc0b282016-05-13 12:55:39 +00001097struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001098 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001099
1100 u8 reserved_at_20[0x20];
1101};
1102
1103union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1104 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1105 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1106 u8 reserved_at_0[0x40];
1107};
1108
Saeed Mahameede2816822015-05-28 22:28:40 +03001109struct mlx5_ifc_fte_match_param_bits {
1110 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1111
1112 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1113
1114 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1115
Matan Barakb4ff3a32016-02-09 14:57:42 +02001116 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001117};
1118
1119enum {
1120 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1121 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1122 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1123 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1124 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1125};
1126
1127struct mlx5_ifc_rx_hash_field_select_bits {
1128 u8 l3_prot_type[0x1];
1129 u8 l4_prot_type[0x1];
1130 u8 selected_fields[0x1e];
1131};
1132
1133enum {
1134 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1135 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1136};
1137
1138enum {
1139 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1140 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1141};
1142
1143struct mlx5_ifc_wq_bits {
1144 u8 wq_type[0x4];
1145 u8 wq_signature[0x1];
1146 u8 end_padding_mode[0x2];
1147 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001148 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001149
1150 u8 hds_skip_first_sge[0x1];
1151 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001152 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001153 u8 page_offset[0x5];
1154 u8 lwm[0x10];
1155
Matan Barakb4ff3a32016-02-09 14:57:42 +02001156 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001157 u8 pd[0x18];
1158
Matan Barakb4ff3a32016-02-09 14:57:42 +02001159 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001160 u8 uar_page[0x18];
1161
1162 u8 dbr_addr[0x40];
1163
1164 u8 hw_counter[0x20];
1165
1166 u8 sw_counter[0x20];
1167
Matan Barakb4ff3a32016-02-09 14:57:42 +02001168 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001169 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001170 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001171 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001172 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001173 u8 log_wq_sz[0x5];
1174
Or Gerlitz40817cd2017-06-25 12:38:45 +03001175 u8 reserved_at_120[0xb];
1176 u8 log_hairpin_data_sz[0x5];
1177 u8 reserved_at_130[0x5];
1178
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001179 u8 log_wqe_num_of_strides[0x3];
1180 u8 two_byte_shift_en[0x1];
1181 u8 reserved_at_139[0x4];
1182 u8 log_wqe_stride_size[0x3];
1183
1184 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001185
1186 struct mlx5_ifc_cmd_pas_bits pas[0];
1187};
1188
1189struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001190 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001191 u8 rq_num[0x18];
1192};
1193
1194struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001195 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001196 u8 mac_addr_47_32[0x10];
1197
1198 u8 mac_addr_31_0[0x20];
1199};
1200
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001201struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001202 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001203 u8 vlan[0x0c];
1204
Matan Barakb4ff3a32016-02-09 14:57:42 +02001205 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001206};
1207
Saeed Mahameede2816822015-05-28 22:28:40 +03001208struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001209 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001210
1211 u8 min_time_between_cnps[0x20];
1212
Matan Barakb4ff3a32016-02-09 14:57:42 +02001213 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001214 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001215 u8 reserved_at_d8[0x4];
1216 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001217 u8 cnp_802p_prio[0x3];
1218
Matan Barakb4ff3a32016-02-09 14:57:42 +02001219 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001220};
1221
1222struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001223 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001224
Matan Barakb4ff3a32016-02-09 14:57:42 +02001225 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001226 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001227 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001228 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001229 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001230
Matan Barakb4ff3a32016-02-09 14:57:42 +02001231 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001232
1233 u8 rpg_time_reset[0x20];
1234
1235 u8 rpg_byte_reset[0x20];
1236
1237 u8 rpg_threshold[0x20];
1238
1239 u8 rpg_max_rate[0x20];
1240
1241 u8 rpg_ai_rate[0x20];
1242
1243 u8 rpg_hai_rate[0x20];
1244
1245 u8 rpg_gd[0x20];
1246
1247 u8 rpg_min_dec_fac[0x20];
1248
1249 u8 rpg_min_rate[0x20];
1250
Matan Barakb4ff3a32016-02-09 14:57:42 +02001251 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001252
1253 u8 rate_to_set_on_first_cnp[0x20];
1254
1255 u8 dce_tcp_g[0x20];
1256
1257 u8 dce_tcp_rtt[0x20];
1258
1259 u8 rate_reduce_monitor_period[0x20];
1260
Matan Barakb4ff3a32016-02-09 14:57:42 +02001261 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001262
1263 u8 initial_alpha_value[0x20];
1264
Matan Barakb4ff3a32016-02-09 14:57:42 +02001265 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001266};
1267
1268struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001269 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001270
1271 u8 rppp_max_rps[0x20];
1272
1273 u8 rpg_time_reset[0x20];
1274
1275 u8 rpg_byte_reset[0x20];
1276
1277 u8 rpg_threshold[0x20];
1278
1279 u8 rpg_max_rate[0x20];
1280
1281 u8 rpg_ai_rate[0x20];
1282
1283 u8 rpg_hai_rate[0x20];
1284
1285 u8 rpg_gd[0x20];
1286
1287 u8 rpg_min_dec_fac[0x20];
1288
1289 u8 rpg_min_rate[0x20];
1290
Matan Barakb4ff3a32016-02-09 14:57:42 +02001291 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001292};
1293
1294enum {
1295 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1296 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1297 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1298};
1299
1300struct mlx5_ifc_resize_field_select_bits {
1301 u8 resize_field_select[0x20];
1302};
1303
1304enum {
1305 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1306 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1307 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1308 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1309};
1310
1311struct mlx5_ifc_modify_field_select_bits {
1312 u8 modify_field_select[0x20];
1313};
1314
1315struct mlx5_ifc_field_select_r_roce_np_bits {
1316 u8 field_select_r_roce_np[0x20];
1317};
1318
1319struct mlx5_ifc_field_select_r_roce_rp_bits {
1320 u8 field_select_r_roce_rp[0x20];
1321};
1322
1323enum {
1324 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1325 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1326 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1327 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1328 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1329 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1330 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1331 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1332 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1333 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1334};
1335
1336struct mlx5_ifc_field_select_802_1qau_rp_bits {
1337 u8 field_select_8021qaurp[0x20];
1338};
1339
1340struct mlx5_ifc_phys_layer_cntrs_bits {
1341 u8 time_since_last_clear_high[0x20];
1342
1343 u8 time_since_last_clear_low[0x20];
1344
1345 u8 symbol_errors_high[0x20];
1346
1347 u8 symbol_errors_low[0x20];
1348
1349 u8 sync_headers_errors_high[0x20];
1350
1351 u8 sync_headers_errors_low[0x20];
1352
1353 u8 edpl_bip_errors_lane0_high[0x20];
1354
1355 u8 edpl_bip_errors_lane0_low[0x20];
1356
1357 u8 edpl_bip_errors_lane1_high[0x20];
1358
1359 u8 edpl_bip_errors_lane1_low[0x20];
1360
1361 u8 edpl_bip_errors_lane2_high[0x20];
1362
1363 u8 edpl_bip_errors_lane2_low[0x20];
1364
1365 u8 edpl_bip_errors_lane3_high[0x20];
1366
1367 u8 edpl_bip_errors_lane3_low[0x20];
1368
1369 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1370
1371 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1372
1373 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1374
1375 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1376
1377 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1378
1379 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1380
1381 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1382
1383 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1384
1385 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1386
1387 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1388
1389 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1390
1391 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1392
1393 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1394
1395 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1396
1397 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1398
1399 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1400
1401 u8 rs_fec_corrected_blocks_high[0x20];
1402
1403 u8 rs_fec_corrected_blocks_low[0x20];
1404
1405 u8 rs_fec_uncorrectable_blocks_high[0x20];
1406
1407 u8 rs_fec_uncorrectable_blocks_low[0x20];
1408
1409 u8 rs_fec_no_errors_blocks_high[0x20];
1410
1411 u8 rs_fec_no_errors_blocks_low[0x20];
1412
1413 u8 rs_fec_single_error_blocks_high[0x20];
1414
1415 u8 rs_fec_single_error_blocks_low[0x20];
1416
1417 u8 rs_fec_corrected_symbols_total_high[0x20];
1418
1419 u8 rs_fec_corrected_symbols_total_low[0x20];
1420
1421 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1422
1423 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1424
1425 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1426
1427 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1428
1429 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1430
1431 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1432
1433 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1434
1435 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1436
1437 u8 link_down_events[0x20];
1438
1439 u8 successful_recovery_events[0x20];
1440
Matan Barakb4ff3a32016-02-09 14:57:42 +02001441 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001442};
1443
Gal Pressmand8dc0502016-09-27 17:04:51 +03001444struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1445 u8 time_since_last_clear_high[0x20];
1446
1447 u8 time_since_last_clear_low[0x20];
1448
1449 u8 phy_received_bits_high[0x20];
1450
1451 u8 phy_received_bits_low[0x20];
1452
1453 u8 phy_symbol_errors_high[0x20];
1454
1455 u8 phy_symbol_errors_low[0x20];
1456
1457 u8 phy_corrected_bits_high[0x20];
1458
1459 u8 phy_corrected_bits_low[0x20];
1460
1461 u8 phy_corrected_bits_lane0_high[0x20];
1462
1463 u8 phy_corrected_bits_lane0_low[0x20];
1464
1465 u8 phy_corrected_bits_lane1_high[0x20];
1466
1467 u8 phy_corrected_bits_lane1_low[0x20];
1468
1469 u8 phy_corrected_bits_lane2_high[0x20];
1470
1471 u8 phy_corrected_bits_lane2_low[0x20];
1472
1473 u8 phy_corrected_bits_lane3_high[0x20];
1474
1475 u8 phy_corrected_bits_lane3_low[0x20];
1476
1477 u8 reserved_at_200[0x5c0];
1478};
1479
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001480struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1481 u8 symbol_error_counter[0x10];
1482
1483 u8 link_error_recovery_counter[0x8];
1484
1485 u8 link_downed_counter[0x8];
1486
1487 u8 port_rcv_errors[0x10];
1488
1489 u8 port_rcv_remote_physical_errors[0x10];
1490
1491 u8 port_rcv_switch_relay_errors[0x10];
1492
1493 u8 port_xmit_discards[0x10];
1494
1495 u8 port_xmit_constraint_errors[0x8];
1496
1497 u8 port_rcv_constraint_errors[0x8];
1498
1499 u8 reserved_at_70[0x8];
1500
1501 u8 link_overrun_errors[0x8];
1502
1503 u8 reserved_at_80[0x10];
1504
1505 u8 vl_15_dropped[0x10];
1506
Tim Wright133bea02017-05-01 17:30:08 +01001507 u8 reserved_at_a0[0x80];
1508
1509 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001510};
1511
Saeed Mahameede2816822015-05-28 22:28:40 +03001512struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1513 u8 transmit_queue_high[0x20];
1514
1515 u8 transmit_queue_low[0x20];
1516
Matan Barakb4ff3a32016-02-09 14:57:42 +02001517 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001518};
1519
1520struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1521 u8 rx_octets_high[0x20];
1522
1523 u8 rx_octets_low[0x20];
1524
Matan Barakb4ff3a32016-02-09 14:57:42 +02001525 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001526
1527 u8 rx_frames_high[0x20];
1528
1529 u8 rx_frames_low[0x20];
1530
1531 u8 tx_octets_high[0x20];
1532
1533 u8 tx_octets_low[0x20];
1534
Matan Barakb4ff3a32016-02-09 14:57:42 +02001535 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001536
1537 u8 tx_frames_high[0x20];
1538
1539 u8 tx_frames_low[0x20];
1540
1541 u8 rx_pause_high[0x20];
1542
1543 u8 rx_pause_low[0x20];
1544
1545 u8 rx_pause_duration_high[0x20];
1546
1547 u8 rx_pause_duration_low[0x20];
1548
1549 u8 tx_pause_high[0x20];
1550
1551 u8 tx_pause_low[0x20];
1552
1553 u8 tx_pause_duration_high[0x20];
1554
1555 u8 tx_pause_duration_low[0x20];
1556
1557 u8 rx_pause_transition_high[0x20];
1558
1559 u8 rx_pause_transition_low[0x20];
1560
Matan Barakb4ff3a32016-02-09 14:57:42 +02001561 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001562};
1563
1564struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1565 u8 port_transmit_wait_high[0x20];
1566
1567 u8 port_transmit_wait_low[0x20];
1568
Gal Pressman2dba0792017-06-18 14:56:45 +03001569 u8 reserved_at_40[0x100];
1570
1571 u8 rx_buffer_almost_full_high[0x20];
1572
1573 u8 rx_buffer_almost_full_low[0x20];
1574
1575 u8 rx_buffer_full_high[0x20];
1576
1577 u8 rx_buffer_full_low[0x20];
1578
1579 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001580};
1581
1582struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1583 u8 dot3stats_alignment_errors_high[0x20];
1584
1585 u8 dot3stats_alignment_errors_low[0x20];
1586
1587 u8 dot3stats_fcs_errors_high[0x20];
1588
1589 u8 dot3stats_fcs_errors_low[0x20];
1590
1591 u8 dot3stats_single_collision_frames_high[0x20];
1592
1593 u8 dot3stats_single_collision_frames_low[0x20];
1594
1595 u8 dot3stats_multiple_collision_frames_high[0x20];
1596
1597 u8 dot3stats_multiple_collision_frames_low[0x20];
1598
1599 u8 dot3stats_sqe_test_errors_high[0x20];
1600
1601 u8 dot3stats_sqe_test_errors_low[0x20];
1602
1603 u8 dot3stats_deferred_transmissions_high[0x20];
1604
1605 u8 dot3stats_deferred_transmissions_low[0x20];
1606
1607 u8 dot3stats_late_collisions_high[0x20];
1608
1609 u8 dot3stats_late_collisions_low[0x20];
1610
1611 u8 dot3stats_excessive_collisions_high[0x20];
1612
1613 u8 dot3stats_excessive_collisions_low[0x20];
1614
1615 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1616
1617 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1618
1619 u8 dot3stats_carrier_sense_errors_high[0x20];
1620
1621 u8 dot3stats_carrier_sense_errors_low[0x20];
1622
1623 u8 dot3stats_frame_too_longs_high[0x20];
1624
1625 u8 dot3stats_frame_too_longs_low[0x20];
1626
1627 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1628
1629 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1630
1631 u8 dot3stats_symbol_errors_high[0x20];
1632
1633 u8 dot3stats_symbol_errors_low[0x20];
1634
1635 u8 dot3control_in_unknown_opcodes_high[0x20];
1636
1637 u8 dot3control_in_unknown_opcodes_low[0x20];
1638
1639 u8 dot3in_pause_frames_high[0x20];
1640
1641 u8 dot3in_pause_frames_low[0x20];
1642
1643 u8 dot3out_pause_frames_high[0x20];
1644
1645 u8 dot3out_pause_frames_low[0x20];
1646
Matan Barakb4ff3a32016-02-09 14:57:42 +02001647 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001648};
1649
1650struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1651 u8 ether_stats_drop_events_high[0x20];
1652
1653 u8 ether_stats_drop_events_low[0x20];
1654
1655 u8 ether_stats_octets_high[0x20];
1656
1657 u8 ether_stats_octets_low[0x20];
1658
1659 u8 ether_stats_pkts_high[0x20];
1660
1661 u8 ether_stats_pkts_low[0x20];
1662
1663 u8 ether_stats_broadcast_pkts_high[0x20];
1664
1665 u8 ether_stats_broadcast_pkts_low[0x20];
1666
1667 u8 ether_stats_multicast_pkts_high[0x20];
1668
1669 u8 ether_stats_multicast_pkts_low[0x20];
1670
1671 u8 ether_stats_crc_align_errors_high[0x20];
1672
1673 u8 ether_stats_crc_align_errors_low[0x20];
1674
1675 u8 ether_stats_undersize_pkts_high[0x20];
1676
1677 u8 ether_stats_undersize_pkts_low[0x20];
1678
1679 u8 ether_stats_oversize_pkts_high[0x20];
1680
1681 u8 ether_stats_oversize_pkts_low[0x20];
1682
1683 u8 ether_stats_fragments_high[0x20];
1684
1685 u8 ether_stats_fragments_low[0x20];
1686
1687 u8 ether_stats_jabbers_high[0x20];
1688
1689 u8 ether_stats_jabbers_low[0x20];
1690
1691 u8 ether_stats_collisions_high[0x20];
1692
1693 u8 ether_stats_collisions_low[0x20];
1694
1695 u8 ether_stats_pkts64octets_high[0x20];
1696
1697 u8 ether_stats_pkts64octets_low[0x20];
1698
1699 u8 ether_stats_pkts65to127octets_high[0x20];
1700
1701 u8 ether_stats_pkts65to127octets_low[0x20];
1702
1703 u8 ether_stats_pkts128to255octets_high[0x20];
1704
1705 u8 ether_stats_pkts128to255octets_low[0x20];
1706
1707 u8 ether_stats_pkts256to511octets_high[0x20];
1708
1709 u8 ether_stats_pkts256to511octets_low[0x20];
1710
1711 u8 ether_stats_pkts512to1023octets_high[0x20];
1712
1713 u8 ether_stats_pkts512to1023octets_low[0x20];
1714
1715 u8 ether_stats_pkts1024to1518octets_high[0x20];
1716
1717 u8 ether_stats_pkts1024to1518octets_low[0x20];
1718
1719 u8 ether_stats_pkts1519to2047octets_high[0x20];
1720
1721 u8 ether_stats_pkts1519to2047octets_low[0x20];
1722
1723 u8 ether_stats_pkts2048to4095octets_high[0x20];
1724
1725 u8 ether_stats_pkts2048to4095octets_low[0x20];
1726
1727 u8 ether_stats_pkts4096to8191octets_high[0x20];
1728
1729 u8 ether_stats_pkts4096to8191octets_low[0x20];
1730
1731 u8 ether_stats_pkts8192to10239octets_high[0x20];
1732
1733 u8 ether_stats_pkts8192to10239octets_low[0x20];
1734
Matan Barakb4ff3a32016-02-09 14:57:42 +02001735 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001736};
1737
1738struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1739 u8 if_in_octets_high[0x20];
1740
1741 u8 if_in_octets_low[0x20];
1742
1743 u8 if_in_ucast_pkts_high[0x20];
1744
1745 u8 if_in_ucast_pkts_low[0x20];
1746
1747 u8 if_in_discards_high[0x20];
1748
1749 u8 if_in_discards_low[0x20];
1750
1751 u8 if_in_errors_high[0x20];
1752
1753 u8 if_in_errors_low[0x20];
1754
1755 u8 if_in_unknown_protos_high[0x20];
1756
1757 u8 if_in_unknown_protos_low[0x20];
1758
1759 u8 if_out_octets_high[0x20];
1760
1761 u8 if_out_octets_low[0x20];
1762
1763 u8 if_out_ucast_pkts_high[0x20];
1764
1765 u8 if_out_ucast_pkts_low[0x20];
1766
1767 u8 if_out_discards_high[0x20];
1768
1769 u8 if_out_discards_low[0x20];
1770
1771 u8 if_out_errors_high[0x20];
1772
1773 u8 if_out_errors_low[0x20];
1774
1775 u8 if_in_multicast_pkts_high[0x20];
1776
1777 u8 if_in_multicast_pkts_low[0x20];
1778
1779 u8 if_in_broadcast_pkts_high[0x20];
1780
1781 u8 if_in_broadcast_pkts_low[0x20];
1782
1783 u8 if_out_multicast_pkts_high[0x20];
1784
1785 u8 if_out_multicast_pkts_low[0x20];
1786
1787 u8 if_out_broadcast_pkts_high[0x20];
1788
1789 u8 if_out_broadcast_pkts_low[0x20];
1790
Matan Barakb4ff3a32016-02-09 14:57:42 +02001791 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001792};
1793
1794struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1795 u8 a_frames_transmitted_ok_high[0x20];
1796
1797 u8 a_frames_transmitted_ok_low[0x20];
1798
1799 u8 a_frames_received_ok_high[0x20];
1800
1801 u8 a_frames_received_ok_low[0x20];
1802
1803 u8 a_frame_check_sequence_errors_high[0x20];
1804
1805 u8 a_frame_check_sequence_errors_low[0x20];
1806
1807 u8 a_alignment_errors_high[0x20];
1808
1809 u8 a_alignment_errors_low[0x20];
1810
1811 u8 a_octets_transmitted_ok_high[0x20];
1812
1813 u8 a_octets_transmitted_ok_low[0x20];
1814
1815 u8 a_octets_received_ok_high[0x20];
1816
1817 u8 a_octets_received_ok_low[0x20];
1818
1819 u8 a_multicast_frames_xmitted_ok_high[0x20];
1820
1821 u8 a_multicast_frames_xmitted_ok_low[0x20];
1822
1823 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1824
1825 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1826
1827 u8 a_multicast_frames_received_ok_high[0x20];
1828
1829 u8 a_multicast_frames_received_ok_low[0x20];
1830
1831 u8 a_broadcast_frames_received_ok_high[0x20];
1832
1833 u8 a_broadcast_frames_received_ok_low[0x20];
1834
1835 u8 a_in_range_length_errors_high[0x20];
1836
1837 u8 a_in_range_length_errors_low[0x20];
1838
1839 u8 a_out_of_range_length_field_high[0x20];
1840
1841 u8 a_out_of_range_length_field_low[0x20];
1842
1843 u8 a_frame_too_long_errors_high[0x20];
1844
1845 u8 a_frame_too_long_errors_low[0x20];
1846
1847 u8 a_symbol_error_during_carrier_high[0x20];
1848
1849 u8 a_symbol_error_during_carrier_low[0x20];
1850
1851 u8 a_mac_control_frames_transmitted_high[0x20];
1852
1853 u8 a_mac_control_frames_transmitted_low[0x20];
1854
1855 u8 a_mac_control_frames_received_high[0x20];
1856
1857 u8 a_mac_control_frames_received_low[0x20];
1858
1859 u8 a_unsupported_opcodes_received_high[0x20];
1860
1861 u8 a_unsupported_opcodes_received_low[0x20];
1862
1863 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1864
1865 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1866
1867 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1868
1869 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1870
Matan Barakb4ff3a32016-02-09 14:57:42 +02001871 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001872};
1873
Gal Pressman8ed1a632016-11-17 13:46:01 +02001874struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1875 u8 life_time_counter_high[0x20];
1876
1877 u8 life_time_counter_low[0x20];
1878
1879 u8 rx_errors[0x20];
1880
1881 u8 tx_errors[0x20];
1882
1883 u8 l0_to_recovery_eieos[0x20];
1884
1885 u8 l0_to_recovery_ts[0x20];
1886
1887 u8 l0_to_recovery_framing[0x20];
1888
1889 u8 l0_to_recovery_retrain[0x20];
1890
1891 u8 crc_error_dllp[0x20];
1892
1893 u8 crc_error_tlp[0x20];
1894
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001895 u8 tx_overflow_buffer_pkt_high[0x20];
1896
1897 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001898
1899 u8 outbound_stalled_reads[0x20];
1900
1901 u8 outbound_stalled_writes[0x20];
1902
1903 u8 outbound_stalled_reads_events[0x20];
1904
1905 u8 outbound_stalled_writes_events[0x20];
1906
1907 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001908};
1909
Saeed Mahameede2816822015-05-28 22:28:40 +03001910struct mlx5_ifc_cmd_inter_comp_event_bits {
1911 u8 command_completion_vector[0x20];
1912
Matan Barakb4ff3a32016-02-09 14:57:42 +02001913 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001914};
1915
1916struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001917 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001918 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001919 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001920 u8 vl[0x4];
1921
Matan Barakb4ff3a32016-02-09 14:57:42 +02001922 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001923};
1924
1925struct mlx5_ifc_db_bf_congestion_event_bits {
1926 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001927 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001928 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001929 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001930
Matan Barakb4ff3a32016-02-09 14:57:42 +02001931 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001932};
1933
1934struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001935 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001936
1937 u8 gpio_event_hi[0x20];
1938
1939 u8 gpio_event_lo[0x20];
1940
Matan Barakb4ff3a32016-02-09 14:57:42 +02001941 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001942};
1943
1944struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001945 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001946
1947 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001948 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001949
Matan Barakb4ff3a32016-02-09 14:57:42 +02001950 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001951};
1952
1953struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001954 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001955};
1956
1957enum {
1958 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1959 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1960};
1961
1962struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001963 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001964 u8 cqn[0x18];
1965
Matan Barakb4ff3a32016-02-09 14:57:42 +02001966 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001967
Matan Barakb4ff3a32016-02-09 14:57:42 +02001968 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001969 u8 syndrome[0x8];
1970
Matan Barakb4ff3a32016-02-09 14:57:42 +02001971 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001972};
1973
1974struct mlx5_ifc_rdma_page_fault_event_bits {
1975 u8 bytes_committed[0x20];
1976
1977 u8 r_key[0x20];
1978
Matan Barakb4ff3a32016-02-09 14:57:42 +02001979 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001980 u8 packet_len[0x10];
1981
1982 u8 rdma_op_len[0x20];
1983
1984 u8 rdma_va[0x40];
1985
Matan Barakb4ff3a32016-02-09 14:57:42 +02001986 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001987 u8 rdma[0x1];
1988 u8 write[0x1];
1989 u8 requestor[0x1];
1990 u8 qp_number[0x18];
1991};
1992
1993struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1994 u8 bytes_committed[0x20];
1995
Matan Barakb4ff3a32016-02-09 14:57:42 +02001996 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001997 u8 wqe_index[0x10];
1998
Matan Barakb4ff3a32016-02-09 14:57:42 +02001999 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002000 u8 len[0x10];
2001
Matan Barakb4ff3a32016-02-09 14:57:42 +02002002 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002003
Matan Barakb4ff3a32016-02-09 14:57:42 +02002004 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002005 u8 rdma[0x1];
2006 u8 write_read[0x1];
2007 u8 requestor[0x1];
2008 u8 qpn[0x18];
2009};
2010
2011struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002012 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002013
2014 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002015 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002016
Matan Barakb4ff3a32016-02-09 14:57:42 +02002017 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002018 u8 qpn_rqn_sqn[0x18];
2019};
2020
2021struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002022 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002023
Matan Barakb4ff3a32016-02-09 14:57:42 +02002024 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002025 u8 dct_number[0x18];
2026};
2027
2028struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002029 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002030
Matan Barakb4ff3a32016-02-09 14:57:42 +02002031 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002032 u8 cq_number[0x18];
2033};
2034
2035enum {
2036 MLX5_QPC_STATE_RST = 0x0,
2037 MLX5_QPC_STATE_INIT = 0x1,
2038 MLX5_QPC_STATE_RTR = 0x2,
2039 MLX5_QPC_STATE_RTS = 0x3,
2040 MLX5_QPC_STATE_SQER = 0x4,
2041 MLX5_QPC_STATE_ERR = 0x6,
2042 MLX5_QPC_STATE_SQD = 0x7,
2043 MLX5_QPC_STATE_SUSPENDED = 0x9,
2044};
2045
2046enum {
2047 MLX5_QPC_ST_RC = 0x0,
2048 MLX5_QPC_ST_UC = 0x1,
2049 MLX5_QPC_ST_UD = 0x2,
2050 MLX5_QPC_ST_XRC = 0x3,
2051 MLX5_QPC_ST_DCI = 0x5,
2052 MLX5_QPC_ST_QP0 = 0x7,
2053 MLX5_QPC_ST_QP1 = 0x8,
2054 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2055 MLX5_QPC_ST_REG_UMR = 0xc,
2056};
2057
2058enum {
2059 MLX5_QPC_PM_STATE_ARMED = 0x0,
2060 MLX5_QPC_PM_STATE_REARM = 0x1,
2061 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2062 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2063};
2064
2065enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002066 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2067};
2068
2069enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002070 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2071 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2072};
2073
2074enum {
2075 MLX5_QPC_MTU_256_BYTES = 0x1,
2076 MLX5_QPC_MTU_512_BYTES = 0x2,
2077 MLX5_QPC_MTU_1K_BYTES = 0x3,
2078 MLX5_QPC_MTU_2K_BYTES = 0x4,
2079 MLX5_QPC_MTU_4K_BYTES = 0x5,
2080 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2081};
2082
2083enum {
2084 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2085 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2086 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2087 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2088 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2089 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2090 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2091 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2092};
2093
2094enum {
2095 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2096 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2097 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2098};
2099
2100enum {
2101 MLX5_QPC_CS_RES_DISABLE = 0x0,
2102 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2103 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2104};
2105
2106struct mlx5_ifc_qpc_bits {
2107 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002108 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002109 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002110 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002111 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002112 u8 reserved_at_15[0x3];
2113 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002114 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002115 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002116
2117 u8 wq_signature[0x1];
2118 u8 block_lb_mc[0x1];
2119 u8 atomic_like_write_en[0x1];
2120 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002121 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002122 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002123 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002124 u8 pd[0x18];
2125
2126 u8 mtu[0x3];
2127 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002128 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002129 u8 log_rq_size[0x4];
2130 u8 log_rq_stride[0x3];
2131 u8 no_sq[0x1];
2132 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002133 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002134 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002135 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002136
2137 u8 counter_set_id[0x8];
2138 u8 uar_page[0x18];
2139
Matan Barakb4ff3a32016-02-09 14:57:42 +02002140 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002141 u8 user_index[0x18];
2142
Matan Barakb4ff3a32016-02-09 14:57:42 +02002143 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002144 u8 log_page_size[0x5];
2145 u8 remote_qpn[0x18];
2146
2147 struct mlx5_ifc_ads_bits primary_address_path;
2148
2149 struct mlx5_ifc_ads_bits secondary_address_path;
2150
2151 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002152 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002153 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002154 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002155 u8 retry_count[0x3];
2156 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002157 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002158 u8 fre[0x1];
2159 u8 cur_rnr_retry[0x3];
2160 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002161 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002162
Matan Barakb4ff3a32016-02-09 14:57:42 +02002163 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002164
Matan Barakb4ff3a32016-02-09 14:57:42 +02002165 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002166 u8 next_send_psn[0x18];
2167
Matan Barakb4ff3a32016-02-09 14:57:42 +02002168 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002169 u8 cqn_snd[0x18];
2170
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002171 u8 reserved_at_400[0x8];
2172 u8 deth_sqpn[0x18];
2173
2174 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002175
Matan Barakb4ff3a32016-02-09 14:57:42 +02002176 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002177 u8 last_acked_psn[0x18];
2178
Matan Barakb4ff3a32016-02-09 14:57:42 +02002179 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002180 u8 ssn[0x18];
2181
Matan Barakb4ff3a32016-02-09 14:57:42 +02002182 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002183 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002184 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002185 u8 atomic_mode[0x4];
2186 u8 rre[0x1];
2187 u8 rwe[0x1];
2188 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002189 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002190 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002191 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002192 u8 cd_slave_receive[0x1];
2193 u8 cd_slave_send[0x1];
2194 u8 cd_master[0x1];
2195
Matan Barakb4ff3a32016-02-09 14:57:42 +02002196 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002197 u8 min_rnr_nak[0x5];
2198 u8 next_rcv_psn[0x18];
2199
Matan Barakb4ff3a32016-02-09 14:57:42 +02002200 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002201 u8 xrcd[0x18];
2202
Matan Barakb4ff3a32016-02-09 14:57:42 +02002203 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002204 u8 cqn_rcv[0x18];
2205
2206 u8 dbr_addr[0x40];
2207
2208 u8 q_key[0x20];
2209
Matan Barakb4ff3a32016-02-09 14:57:42 +02002210 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002211 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002212 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002213
Matan Barakb4ff3a32016-02-09 14:57:42 +02002214 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002215 u8 rmsn[0x18];
2216
2217 u8 hw_sq_wqebb_counter[0x10];
2218 u8 sw_sq_wqebb_counter[0x10];
2219
2220 u8 hw_rq_counter[0x20];
2221
2222 u8 sw_rq_counter[0x20];
2223
Matan Barakb4ff3a32016-02-09 14:57:42 +02002224 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002225
Matan Barakb4ff3a32016-02-09 14:57:42 +02002226 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002227 u8 cgs[0x1];
2228 u8 cs_req[0x8];
2229 u8 cs_res[0x8];
2230
2231 u8 dc_access_key[0x40];
2232
Matan Barakb4ff3a32016-02-09 14:57:42 +02002233 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002234};
2235
2236struct mlx5_ifc_roce_addr_layout_bits {
2237 u8 source_l3_address[16][0x8];
2238
Matan Barakb4ff3a32016-02-09 14:57:42 +02002239 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002240 u8 vlan_valid[0x1];
2241 u8 vlan_id[0xc];
2242 u8 source_mac_47_32[0x10];
2243
2244 u8 source_mac_31_0[0x20];
2245
Matan Barakb4ff3a32016-02-09 14:57:42 +02002246 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002247 u8 roce_l3_type[0x4];
2248 u8 roce_version[0x8];
2249
Matan Barakb4ff3a32016-02-09 14:57:42 +02002250 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002251};
2252
2253union mlx5_ifc_hca_cap_union_bits {
2254 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2255 struct mlx5_ifc_odp_cap_bits odp_cap;
2256 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2257 struct mlx5_ifc_roce_cap_bits roce_cap;
2258 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2259 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002260 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002261 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002262 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002263 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002264 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002265 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002266};
2267
2268enum {
2269 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2270 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2271 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002272 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002273 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2274 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002275 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002276};
2277
2278struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002279 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002280
2281 u8 group_id[0x20];
2282
Matan Barakb4ff3a32016-02-09 14:57:42 +02002283 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002284 u8 flow_tag[0x18];
2285
Matan Barakb4ff3a32016-02-09 14:57:42 +02002286 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002287 u8 action[0x10];
2288
Matan Barakb4ff3a32016-02-09 14:57:42 +02002289 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002290 u8 destination_list_size[0x18];
2291
Amir Vadai9dc0b282016-05-13 12:55:39 +00002292 u8 reserved_at_a0[0x8];
2293 u8 flow_counter_list_size[0x18];
2294
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002295 u8 encap_id[0x20];
2296
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002297 u8 modify_header_id[0x20];
2298
2299 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002300
2301 struct mlx5_ifc_fte_match_param_bits match_value;
2302
Matan Barakb4ff3a32016-02-09 14:57:42 +02002303 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002304
Amir Vadai9dc0b282016-05-13 12:55:39 +00002305 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002306};
2307
2308enum {
2309 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2310 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2311};
2312
2313struct mlx5_ifc_xrc_srqc_bits {
2314 u8 state[0x4];
2315 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002316 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002317
2318 u8 wq_signature[0x1];
2319 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002320 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002321 u8 rlky[0x1];
2322 u8 basic_cyclic_rcv_wqe[0x1];
2323 u8 log_rq_stride[0x3];
2324 u8 xrcd[0x18];
2325
2326 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002327 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002328 u8 cqn[0x18];
2329
Matan Barakb4ff3a32016-02-09 14:57:42 +02002330 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002331
2332 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002333 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002334 u8 log_page_size[0x6];
2335 u8 user_index[0x18];
2336
Matan Barakb4ff3a32016-02-09 14:57:42 +02002337 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002338
Matan Barakb4ff3a32016-02-09 14:57:42 +02002339 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002340 u8 pd[0x18];
2341
2342 u8 lwm[0x10];
2343 u8 wqe_cnt[0x10];
2344
Matan Barakb4ff3a32016-02-09 14:57:42 +02002345 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002346
2347 u8 db_record_addr_h[0x20];
2348
2349 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002350 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002351
Matan Barakb4ff3a32016-02-09 14:57:42 +02002352 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002353};
2354
2355struct mlx5_ifc_traffic_counter_bits {
2356 u8 packets[0x40];
2357
2358 u8 octets[0x40];
2359};
2360
2361struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002362 u8 strict_lag_tx_port_affinity[0x1];
2363 u8 reserved_at_1[0x3];
2364 u8 lag_tx_port_affinity[0x04];
2365
2366 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002367 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002368 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002369
Matan Barakb4ff3a32016-02-09 14:57:42 +02002370 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002371
Matan Barakb4ff3a32016-02-09 14:57:42 +02002372 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002373 u8 transport_domain[0x18];
2374
Erez Shitrit500a3d02017-04-13 06:36:51 +03002375 u8 reserved_at_140[0x8];
2376 u8 underlay_qpn[0x18];
2377 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002378};
2379
2380enum {
2381 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2382 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2383};
2384
2385enum {
2386 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2387 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2388};
2389
2390enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002391 MLX5_RX_HASH_FN_NONE = 0x0,
2392 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2393 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002394};
2395
2396enum {
2397 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2398 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2399};
2400
2401struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002402 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002403
2404 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002405 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002406
Matan Barakb4ff3a32016-02-09 14:57:42 +02002407 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002408
Matan Barakb4ff3a32016-02-09 14:57:42 +02002409 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002410 u8 lro_timeout_period_usecs[0x10];
2411 u8 lro_enable_mask[0x4];
2412 u8 lro_max_ip_payload_size[0x8];
2413
Matan Barakb4ff3a32016-02-09 14:57:42 +02002414 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002415
Matan Barakb4ff3a32016-02-09 14:57:42 +02002416 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002417 u8 inline_rqn[0x18];
2418
2419 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002420 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002421 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002422 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002423 u8 indirect_table[0x18];
2424
2425 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002426 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002427 u8 self_lb_block[0x2];
2428 u8 transport_domain[0x18];
2429
2430 u8 rx_hash_toeplitz_key[10][0x20];
2431
2432 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2433
2434 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2435
Matan Barakb4ff3a32016-02-09 14:57:42 +02002436 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002437};
2438
2439enum {
2440 MLX5_SRQC_STATE_GOOD = 0x0,
2441 MLX5_SRQC_STATE_ERROR = 0x1,
2442};
2443
2444struct mlx5_ifc_srqc_bits {
2445 u8 state[0x4];
2446 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002447 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002448
2449 u8 wq_signature[0x1];
2450 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002451 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002452 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002453 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002454 u8 log_rq_stride[0x3];
2455 u8 xrcd[0x18];
2456
2457 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002458 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002459 u8 cqn[0x18];
2460
Matan Barakb4ff3a32016-02-09 14:57:42 +02002461 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002462
Matan Barakb4ff3a32016-02-09 14:57:42 +02002463 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002464 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002465 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002466
Matan Barakb4ff3a32016-02-09 14:57:42 +02002467 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002468
Matan Barakb4ff3a32016-02-09 14:57:42 +02002469 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002470 u8 pd[0x18];
2471
2472 u8 lwm[0x10];
2473 u8 wqe_cnt[0x10];
2474
Matan Barakb4ff3a32016-02-09 14:57:42 +02002475 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002476
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002477 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002478
Matan Barakb4ff3a32016-02-09 14:57:42 +02002479 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002480};
2481
2482enum {
2483 MLX5_SQC_STATE_RST = 0x0,
2484 MLX5_SQC_STATE_RDY = 0x1,
2485 MLX5_SQC_STATE_ERR = 0x3,
2486};
2487
2488struct mlx5_ifc_sqc_bits {
2489 u8 rlky[0x1];
2490 u8 cd_master[0x1];
2491 u8 fre[0x1];
2492 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002493 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002494 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002495 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002496 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002497 u8 allow_swp[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002498 u8 hairpin[0x1];
2499 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002500
Matan Barakb4ff3a32016-02-09 14:57:42 +02002501 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002502 u8 user_index[0x18];
2503
Matan Barakb4ff3a32016-02-09 14:57:42 +02002504 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002505 u8 cqn[0x18];
2506
Or Gerlitz40817cd2017-06-25 12:38:45 +03002507 u8 reserved_at_60[0x8];
2508 u8 hairpin_peer_rq[0x18];
2509
2510 u8 reserved_at_80[0x10];
2511 u8 hairpin_peer_vhca[0x10];
2512
2513 u8 reserved_at_a0[0x50];
Saeed Mahameede2816822015-05-28 22:28:40 +03002514
Saeed Mahameed74862162016-06-09 15:11:34 +03002515 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002516 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002517 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002518
Matan Barakb4ff3a32016-02-09 14:57:42 +02002519 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002520
Matan Barakb4ff3a32016-02-09 14:57:42 +02002521 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002522 u8 tis_num_0[0x18];
2523
2524 struct mlx5_ifc_wq_bits wq;
2525};
2526
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002527enum {
2528 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2529 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2530 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2531 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2532};
2533
2534struct mlx5_ifc_scheduling_context_bits {
2535 u8 element_type[0x8];
2536 u8 reserved_at_8[0x18];
2537
2538 u8 element_attributes[0x20];
2539
2540 u8 parent_element_id[0x20];
2541
2542 u8 reserved_at_60[0x40];
2543
2544 u8 bw_share[0x20];
2545
2546 u8 max_average_bw[0x20];
2547
2548 u8 reserved_at_e0[0x120];
2549};
2550
Saeed Mahameede2816822015-05-28 22:28:40 +03002551struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002552 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002553
Matan Barakb4ff3a32016-02-09 14:57:42 +02002554 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002555 u8 rqt_max_size[0x10];
2556
Matan Barakb4ff3a32016-02-09 14:57:42 +02002557 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002558 u8 rqt_actual_size[0x10];
2559
Matan Barakb4ff3a32016-02-09 14:57:42 +02002560 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002561
2562 struct mlx5_ifc_rq_num_bits rq_num[0];
2563};
2564
2565enum {
2566 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2567 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2568};
2569
2570enum {
2571 MLX5_RQC_STATE_RST = 0x0,
2572 MLX5_RQC_STATE_RDY = 0x1,
2573 MLX5_RQC_STATE_ERR = 0x3,
2574};
2575
2576struct mlx5_ifc_rqc_bits {
2577 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002578 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002579 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002580 u8 vsd[0x1];
2581 u8 mem_rq_type[0x4];
2582 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002583 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002584 u8 flush_in_error_en[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002585 u8 hairpin[0x1];
2586 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002587
Matan Barakb4ff3a32016-02-09 14:57:42 +02002588 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002589 u8 user_index[0x18];
2590
Matan Barakb4ff3a32016-02-09 14:57:42 +02002591 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002592 u8 cqn[0x18];
2593
2594 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002595 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002596
Matan Barakb4ff3a32016-02-09 14:57:42 +02002597 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002598 u8 rmpn[0x18];
2599
Or Gerlitz40817cd2017-06-25 12:38:45 +03002600 u8 reserved_at_a0[0x8];
2601 u8 hairpin_peer_sq[0x18];
2602
2603 u8 reserved_at_c0[0x10];
2604 u8 hairpin_peer_vhca[0x10];
2605
2606 u8 reserved_at_e0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002607
2608 struct mlx5_ifc_wq_bits wq;
2609};
2610
2611enum {
2612 MLX5_RMPC_STATE_RDY = 0x1,
2613 MLX5_RMPC_STATE_ERR = 0x3,
2614};
2615
2616struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002617 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002618 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002619 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002620
2621 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002622 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002623
Matan Barakb4ff3a32016-02-09 14:57:42 +02002624 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002625
2626 struct mlx5_ifc_wq_bits wq;
2627};
2628
Saeed Mahameede2816822015-05-28 22:28:40 +03002629struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002630 u8 reserved_at_0[0x5];
2631 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002632 u8 reserved_at_8[0x15];
2633 u8 disable_mc_local_lb[0x1];
2634 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002635 u8 roce_en[0x1];
2636
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002637 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002638 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002639 u8 event_on_mtu[0x1];
2640 u8 event_on_promisc_change[0x1];
2641 u8 event_on_vlan_change[0x1];
2642 u8 event_on_mc_address_change[0x1];
2643 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002644
Matan Barakb4ff3a32016-02-09 14:57:42 +02002645 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002646
2647 u8 mtu[0x10];
2648
Achiad Shochat9efa7522015-12-23 18:47:20 +02002649 u8 system_image_guid[0x40];
2650 u8 port_guid[0x40];
2651 u8 node_guid[0x40];
2652
Matan Barakb4ff3a32016-02-09 14:57:42 +02002653 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002654 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002655 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002656
2657 u8 promisc_uc[0x1];
2658 u8 promisc_mc[0x1];
2659 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002660 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002661 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002662 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002663 u8 allowed_list_size[0xc];
2664
2665 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2666
Matan Barakb4ff3a32016-02-09 14:57:42 +02002667 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002668
2669 u8 current_uc_mac_address[0][0x40];
2670};
2671
2672enum {
2673 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2674 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2675 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002676 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002677};
2678
2679struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002680 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002681 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002682 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002683 u8 small_fence_on_rdma_read_response[0x1];
2684 u8 umr_en[0x1];
2685 u8 a[0x1];
2686 u8 rw[0x1];
2687 u8 rr[0x1];
2688 u8 lw[0x1];
2689 u8 lr[0x1];
2690 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002691 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002692
2693 u8 qpn[0x18];
2694 u8 mkey_7_0[0x8];
2695
Matan Barakb4ff3a32016-02-09 14:57:42 +02002696 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002697
2698 u8 length64[0x1];
2699 u8 bsf_en[0x1];
2700 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002701 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002702 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002703 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002704 u8 en_rinval[0x1];
2705 u8 pd[0x18];
2706
2707 u8 start_addr[0x40];
2708
2709 u8 len[0x40];
2710
2711 u8 bsf_octword_size[0x20];
2712
Matan Barakb4ff3a32016-02-09 14:57:42 +02002713 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002714
2715 u8 translations_octword_size[0x20];
2716
Matan Barakb4ff3a32016-02-09 14:57:42 +02002717 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002718 u8 log_page_size[0x5];
2719
Matan Barakb4ff3a32016-02-09 14:57:42 +02002720 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002721};
2722
2723struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002724 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002725 u8 pkey[0x10];
2726};
2727
2728struct mlx5_ifc_array128_auto_bits {
2729 u8 array128_auto[16][0x8];
2730};
2731
2732struct mlx5_ifc_hca_vport_context_bits {
2733 u8 field_select[0x20];
2734
Matan Barakb4ff3a32016-02-09 14:57:42 +02002735 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002736
2737 u8 sm_virt_aware[0x1];
2738 u8 has_smi[0x1];
2739 u8 has_raw[0x1];
2740 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002741 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002742 u8 port_physical_state[0x4];
2743 u8 vport_state_policy[0x4];
2744 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002745 u8 vport_state[0x4];
2746
Matan Barakb4ff3a32016-02-09 14:57:42 +02002747 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002748
2749 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002750
2751 u8 port_guid[0x40];
2752
2753 u8 node_guid[0x40];
2754
2755 u8 cap_mask1[0x20];
2756
2757 u8 cap_mask1_field_select[0x20];
2758
2759 u8 cap_mask2[0x20];
2760
2761 u8 cap_mask2_field_select[0x20];
2762
Matan Barakb4ff3a32016-02-09 14:57:42 +02002763 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002764
2765 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002766 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002767 u8 init_type_reply[0x4];
2768 u8 lmc[0x3];
2769 u8 subnet_timeout[0x5];
2770
2771 u8 sm_lid[0x10];
2772 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002773 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002774
2775 u8 qkey_violation_counter[0x10];
2776 u8 pkey_violation_counter[0x10];
2777
Matan Barakb4ff3a32016-02-09 14:57:42 +02002778 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002779};
2780
Saeed Mahameedd6666752015-12-01 18:03:22 +02002781struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002782 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002783 u8 vport_svlan_strip[0x1];
2784 u8 vport_cvlan_strip[0x1];
2785 u8 vport_svlan_insert[0x1];
2786 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002787 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002788
Matan Barakb4ff3a32016-02-09 14:57:42 +02002789 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002790
2791 u8 svlan_cfi[0x1];
2792 u8 svlan_pcp[0x3];
2793 u8 svlan_id[0xc];
2794 u8 cvlan_cfi[0x1];
2795 u8 cvlan_pcp[0x3];
2796 u8 cvlan_id[0xc];
2797
Matan Barakb4ff3a32016-02-09 14:57:42 +02002798 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002799};
2800
Saeed Mahameede2816822015-05-28 22:28:40 +03002801enum {
2802 MLX5_EQC_STATUS_OK = 0x0,
2803 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2804};
2805
2806enum {
2807 MLX5_EQC_ST_ARMED = 0x9,
2808 MLX5_EQC_ST_FIRED = 0xa,
2809};
2810
2811struct mlx5_ifc_eqc_bits {
2812 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002813 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002814 u8 ec[0x1];
2815 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002816 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002817 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002818 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002819
Matan Barakb4ff3a32016-02-09 14:57:42 +02002820 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002821
Matan Barakb4ff3a32016-02-09 14:57:42 +02002822 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002823 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002824 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002825
Matan Barakb4ff3a32016-02-09 14:57:42 +02002826 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002827 u8 log_eq_size[0x5];
2828 u8 uar_page[0x18];
2829
Matan Barakb4ff3a32016-02-09 14:57:42 +02002830 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002831
Matan Barakb4ff3a32016-02-09 14:57:42 +02002832 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002833 u8 intr[0x8];
2834
Matan Barakb4ff3a32016-02-09 14:57:42 +02002835 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002836 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002837 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002838
Matan Barakb4ff3a32016-02-09 14:57:42 +02002839 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002840
Matan Barakb4ff3a32016-02-09 14:57:42 +02002841 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002842 u8 consumer_counter[0x18];
2843
Matan Barakb4ff3a32016-02-09 14:57:42 +02002844 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002845 u8 producer_counter[0x18];
2846
Matan Barakb4ff3a32016-02-09 14:57:42 +02002847 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002848};
2849
2850enum {
2851 MLX5_DCTC_STATE_ACTIVE = 0x0,
2852 MLX5_DCTC_STATE_DRAINING = 0x1,
2853 MLX5_DCTC_STATE_DRAINED = 0x2,
2854};
2855
2856enum {
2857 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2858 MLX5_DCTC_CS_RES_NA = 0x1,
2859 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2860};
2861
2862enum {
2863 MLX5_DCTC_MTU_256_BYTES = 0x1,
2864 MLX5_DCTC_MTU_512_BYTES = 0x2,
2865 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2866 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2867 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2868};
2869
2870struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002871 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002872 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002873 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002874
Matan Barakb4ff3a32016-02-09 14:57:42 +02002875 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002876 u8 user_index[0x18];
2877
Matan Barakb4ff3a32016-02-09 14:57:42 +02002878 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002879 u8 cqn[0x18];
2880
2881 u8 counter_set_id[0x8];
2882 u8 atomic_mode[0x4];
2883 u8 rre[0x1];
2884 u8 rwe[0x1];
2885 u8 rae[0x1];
2886 u8 atomic_like_write_en[0x1];
2887 u8 latency_sensitive[0x1];
2888 u8 rlky[0x1];
2889 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002890 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002891
Matan Barakb4ff3a32016-02-09 14:57:42 +02002892 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002893 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002894 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002895 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002896 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002897
Matan Barakb4ff3a32016-02-09 14:57:42 +02002898 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002899 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002900
Matan Barakb4ff3a32016-02-09 14:57:42 +02002901 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002902 u8 pd[0x18];
2903
2904 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002905 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002906 u8 flow_label[0x14];
2907
2908 u8 dc_access_key[0x40];
2909
Matan Barakb4ff3a32016-02-09 14:57:42 +02002910 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002911 u8 mtu[0x3];
2912 u8 port[0x8];
2913 u8 pkey_index[0x10];
2914
Matan Barakb4ff3a32016-02-09 14:57:42 +02002915 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002916 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002917 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002918 u8 hop_limit[0x8];
2919
2920 u8 dc_access_key_violation_count[0x20];
2921
Matan Barakb4ff3a32016-02-09 14:57:42 +02002922 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002923 u8 dei_cfi[0x1];
2924 u8 eth_prio[0x3];
2925 u8 ecn[0x2];
2926 u8 dscp[0x6];
2927
Matan Barakb4ff3a32016-02-09 14:57:42 +02002928 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002929};
2930
2931enum {
2932 MLX5_CQC_STATUS_OK = 0x0,
2933 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2934 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2935};
2936
2937enum {
2938 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2939 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2940};
2941
2942enum {
2943 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2944 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2945 MLX5_CQC_ST_FIRED = 0xa,
2946};
2947
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002948enum {
2949 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2950 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002951 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002952};
2953
Saeed Mahameede2816822015-05-28 22:28:40 +03002954struct mlx5_ifc_cqc_bits {
2955 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002956 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002957 u8 cqe_sz[0x3];
2958 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002959 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002960 u8 scqe_break_moderation_en[0x1];
2961 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002962 u8 cq_period_mode[0x2];
2963 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002964 u8 mini_cqe_res_format[0x2];
2965 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002966 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002967
Matan Barakb4ff3a32016-02-09 14:57:42 +02002968 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002969
Matan Barakb4ff3a32016-02-09 14:57:42 +02002970 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002971 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002972 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002973
Matan Barakb4ff3a32016-02-09 14:57:42 +02002974 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002975 u8 log_cq_size[0x5];
2976 u8 uar_page[0x18];
2977
Matan Barakb4ff3a32016-02-09 14:57:42 +02002978 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002979 u8 cq_period[0xc];
2980 u8 cq_max_count[0x10];
2981
Matan Barakb4ff3a32016-02-09 14:57:42 +02002982 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002983 u8 c_eqn[0x8];
2984
Matan Barakb4ff3a32016-02-09 14:57:42 +02002985 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002986 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002987 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002988
Matan Barakb4ff3a32016-02-09 14:57:42 +02002989 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002990
Matan Barakb4ff3a32016-02-09 14:57:42 +02002991 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002992 u8 last_notified_index[0x18];
2993
Matan Barakb4ff3a32016-02-09 14:57:42 +02002994 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002995 u8 last_solicit_index[0x18];
2996
Matan Barakb4ff3a32016-02-09 14:57:42 +02002997 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002998 u8 consumer_counter[0x18];
2999
Matan Barakb4ff3a32016-02-09 14:57:42 +02003000 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003001 u8 producer_counter[0x18];
3002
Matan Barakb4ff3a32016-02-09 14:57:42 +02003003 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003004
3005 u8 dbr_addr[0x40];
3006};
3007
3008union mlx5_ifc_cong_control_roce_ecn_auto_bits {
3009 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
3010 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
3011 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003012 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03003013};
3014
3015struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003016 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003017
Matan Barakb4ff3a32016-02-09 14:57:42 +02003018 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03003019 u8 ieee_vendor_id[0x18];
3020
Matan Barakb4ff3a32016-02-09 14:57:42 +02003021 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003022 u8 vsd_vendor_id[0x10];
3023
3024 u8 vsd[208][0x8];
3025
3026 u8 vsd_contd_psid[16][0x8];
3027};
3028
Saeed Mahameed74862162016-06-09 15:11:34 +03003029enum {
3030 MLX5_XRQC_STATE_GOOD = 0x0,
3031 MLX5_XRQC_STATE_ERROR = 0x1,
3032};
3033
3034enum {
3035 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3036 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3037};
3038
3039enum {
3040 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3041};
3042
3043struct mlx5_ifc_tag_matching_topology_context_bits {
3044 u8 log_matching_list_sz[0x4];
3045 u8 reserved_at_4[0xc];
3046 u8 append_next_index[0x10];
3047
3048 u8 sw_phase_cnt[0x10];
3049 u8 hw_phase_cnt[0x10];
3050
3051 u8 reserved_at_40[0x40];
3052};
3053
3054struct mlx5_ifc_xrqc_bits {
3055 u8 state[0x4];
3056 u8 rlkey[0x1];
3057 u8 reserved_at_5[0xf];
3058 u8 topology[0x4];
3059 u8 reserved_at_18[0x4];
3060 u8 offload[0x4];
3061
3062 u8 reserved_at_20[0x8];
3063 u8 user_index[0x18];
3064
3065 u8 reserved_at_40[0x8];
3066 u8 cqn[0x18];
3067
3068 u8 reserved_at_60[0xa0];
3069
3070 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3071
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003072 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003073
3074 struct mlx5_ifc_wq_bits wq;
3075};
3076
Saeed Mahameede2816822015-05-28 22:28:40 +03003077union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3078 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3079 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003080 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003081};
3082
3083union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3084 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3085 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3086 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003087 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003088};
3089
3090union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3091 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3092 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3093 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3094 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3095 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3096 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3097 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003098 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003099 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003100 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003101 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003102};
3103
Gal Pressman8ed1a632016-11-17 13:46:01 +02003104union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3105 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3106 u8 reserved_at_0[0x7c0];
3107};
3108
Saeed Mahameede2816822015-05-28 22:28:40 +03003109union mlx5_ifc_event_auto_bits {
3110 struct mlx5_ifc_comp_event_bits comp_event;
3111 struct mlx5_ifc_dct_events_bits dct_events;
3112 struct mlx5_ifc_qp_events_bits qp_events;
3113 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3114 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3115 struct mlx5_ifc_cq_error_bits cq_error;
3116 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3117 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3118 struct mlx5_ifc_gpio_event_bits gpio_event;
3119 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3120 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3121 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003122 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003123};
3124
3125struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003126 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003127
3128 u8 assert_existptr[0x20];
3129
3130 u8 assert_callra[0x20];
3131
Matan Barakb4ff3a32016-02-09 14:57:42 +02003132 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003133
3134 u8 fw_version[0x20];
3135
3136 u8 hw_id[0x20];
3137
Matan Barakb4ff3a32016-02-09 14:57:42 +02003138 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003139
3140 u8 irisc_index[0x8];
3141 u8 synd[0x8];
3142 u8 ext_synd[0x10];
3143};
3144
3145struct mlx5_ifc_register_loopback_control_bits {
3146 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003147 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003148 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003149 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003150
Matan Barakb4ff3a32016-02-09 14:57:42 +02003151 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003152};
3153
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003154struct mlx5_ifc_vport_tc_element_bits {
3155 u8 traffic_class[0x4];
3156 u8 reserved_at_4[0xc];
3157 u8 vport_number[0x10];
3158};
3159
3160struct mlx5_ifc_vport_element_bits {
3161 u8 reserved_at_0[0x10];
3162 u8 vport_number[0x10];
3163};
3164
3165enum {
3166 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3167 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3168 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3169};
3170
3171struct mlx5_ifc_tsar_element_bits {
3172 u8 reserved_at_0[0x8];
3173 u8 tsar_type[0x8];
3174 u8 reserved_at_10[0x10];
3175};
3176
Majd Dibbiny8812c242017-02-09 14:20:12 +02003177enum {
3178 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3179 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3180};
3181
Saeed Mahameede2816822015-05-28 22:28:40 +03003182struct mlx5_ifc_teardown_hca_out_bits {
3183 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003184 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003185
3186 u8 syndrome[0x20];
3187
Majd Dibbiny8812c242017-02-09 14:20:12 +02003188 u8 reserved_at_40[0x3f];
3189
3190 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003191};
3192
3193enum {
3194 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003195 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003196};
3197
3198struct mlx5_ifc_teardown_hca_in_bits {
3199 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003200 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003201
Matan Barakb4ff3a32016-02-09 14:57:42 +02003202 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003203 u8 op_mod[0x10];
3204
Matan Barakb4ff3a32016-02-09 14:57:42 +02003205 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003206 u8 profile[0x10];
3207
Matan Barakb4ff3a32016-02-09 14:57:42 +02003208 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003209};
3210
3211struct mlx5_ifc_sqerr2rts_qp_out_bits {
3212 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003213 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003214
3215 u8 syndrome[0x20];
3216
Matan Barakb4ff3a32016-02-09 14:57:42 +02003217 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003218};
3219
3220struct mlx5_ifc_sqerr2rts_qp_in_bits {
3221 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003222 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003223
Matan Barakb4ff3a32016-02-09 14:57:42 +02003224 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003225 u8 op_mod[0x10];
3226
Matan Barakb4ff3a32016-02-09 14:57:42 +02003227 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003228 u8 qpn[0x18];
3229
Matan Barakb4ff3a32016-02-09 14:57:42 +02003230 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003231
3232 u8 opt_param_mask[0x20];
3233
Matan Barakb4ff3a32016-02-09 14:57:42 +02003234 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003235
3236 struct mlx5_ifc_qpc_bits qpc;
3237
Matan Barakb4ff3a32016-02-09 14:57:42 +02003238 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003239};
3240
3241struct mlx5_ifc_sqd2rts_qp_out_bits {
3242 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003243 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003244
3245 u8 syndrome[0x20];
3246
Matan Barakb4ff3a32016-02-09 14:57:42 +02003247 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003248};
3249
3250struct mlx5_ifc_sqd2rts_qp_in_bits {
3251 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003252 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003253
Matan Barakb4ff3a32016-02-09 14:57:42 +02003254 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003255 u8 op_mod[0x10];
3256
Matan Barakb4ff3a32016-02-09 14:57:42 +02003257 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003258 u8 qpn[0x18];
3259
Matan Barakb4ff3a32016-02-09 14:57:42 +02003260 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003261
3262 u8 opt_param_mask[0x20];
3263
Matan Barakb4ff3a32016-02-09 14:57:42 +02003264 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003265
3266 struct mlx5_ifc_qpc_bits qpc;
3267
Matan Barakb4ff3a32016-02-09 14:57:42 +02003268 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003269};
3270
3271struct mlx5_ifc_set_roce_address_out_bits {
3272 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003273 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003274
3275 u8 syndrome[0x20];
3276
Matan Barakb4ff3a32016-02-09 14:57:42 +02003277 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003278};
3279
3280struct mlx5_ifc_set_roce_address_in_bits {
3281 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003282 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003283
Matan Barakb4ff3a32016-02-09 14:57:42 +02003284 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003285 u8 op_mod[0x10];
3286
3287 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003288 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003289
Matan Barakb4ff3a32016-02-09 14:57:42 +02003290 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003291
3292 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3293};
3294
3295struct mlx5_ifc_set_mad_demux_out_bits {
3296 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003297 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003298
3299 u8 syndrome[0x20];
3300
Matan Barakb4ff3a32016-02-09 14:57:42 +02003301 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003302};
3303
3304enum {
3305 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3306 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3307};
3308
3309struct mlx5_ifc_set_mad_demux_in_bits {
3310 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003311 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003312
Matan Barakb4ff3a32016-02-09 14:57:42 +02003313 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003314 u8 op_mod[0x10];
3315
Matan Barakb4ff3a32016-02-09 14:57:42 +02003316 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003317
Matan Barakb4ff3a32016-02-09 14:57:42 +02003318 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003319 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003320 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003321};
3322
3323struct mlx5_ifc_set_l2_table_entry_out_bits {
3324 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003325 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003326
3327 u8 syndrome[0x20];
3328
Matan Barakb4ff3a32016-02-09 14:57:42 +02003329 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003330};
3331
3332struct mlx5_ifc_set_l2_table_entry_in_bits {
3333 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003334 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003335
Matan Barakb4ff3a32016-02-09 14:57:42 +02003336 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003337 u8 op_mod[0x10];
3338
Matan Barakb4ff3a32016-02-09 14:57:42 +02003339 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003340
Matan Barakb4ff3a32016-02-09 14:57:42 +02003341 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003342 u8 table_index[0x18];
3343
Matan Barakb4ff3a32016-02-09 14:57:42 +02003344 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003345
Matan Barakb4ff3a32016-02-09 14:57:42 +02003346 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003347 u8 vlan_valid[0x1];
3348 u8 vlan[0xc];
3349
3350 struct mlx5_ifc_mac_address_layout_bits mac_address;
3351
Matan Barakb4ff3a32016-02-09 14:57:42 +02003352 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003353};
3354
3355struct mlx5_ifc_set_issi_out_bits {
3356 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003357 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003358
3359 u8 syndrome[0x20];
3360
Matan Barakb4ff3a32016-02-09 14:57:42 +02003361 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003362};
3363
3364struct mlx5_ifc_set_issi_in_bits {
3365 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003366 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003367
Matan Barakb4ff3a32016-02-09 14:57:42 +02003368 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003369 u8 op_mod[0x10];
3370
Matan Barakb4ff3a32016-02-09 14:57:42 +02003371 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003372 u8 current_issi[0x10];
3373
Matan Barakb4ff3a32016-02-09 14:57:42 +02003374 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003375};
3376
3377struct mlx5_ifc_set_hca_cap_out_bits {
3378 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003379 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003380
3381 u8 syndrome[0x20];
3382
Matan Barakb4ff3a32016-02-09 14:57:42 +02003383 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003384};
3385
3386struct mlx5_ifc_set_hca_cap_in_bits {
3387 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003388 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003389
Matan Barakb4ff3a32016-02-09 14:57:42 +02003390 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003391 u8 op_mod[0x10];
3392
Matan Barakb4ff3a32016-02-09 14:57:42 +02003393 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003394
Saeed Mahameede2816822015-05-28 22:28:40 +03003395 union mlx5_ifc_hca_cap_union_bits capability;
3396};
3397
Maor Gottlieb26a81452015-12-10 17:12:39 +02003398enum {
3399 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3400 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3401 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3402 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3403};
3404
Saeed Mahameede2816822015-05-28 22:28:40 +03003405struct mlx5_ifc_set_fte_out_bits {
3406 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003407 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003408
3409 u8 syndrome[0x20];
3410
Matan Barakb4ff3a32016-02-09 14:57:42 +02003411 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003412};
3413
3414struct mlx5_ifc_set_fte_in_bits {
3415 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003416 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003417
Matan Barakb4ff3a32016-02-09 14:57:42 +02003418 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003419 u8 op_mod[0x10];
3420
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003421 u8 other_vport[0x1];
3422 u8 reserved_at_41[0xf];
3423 u8 vport_number[0x10];
3424
3425 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003426
3427 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003428 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003429
Matan Barakb4ff3a32016-02-09 14:57:42 +02003430 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003431 u8 table_id[0x18];
3432
Matan Barakb4ff3a32016-02-09 14:57:42 +02003433 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003434 u8 modify_enable_mask[0x8];
3435
Matan Barakb4ff3a32016-02-09 14:57:42 +02003436 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003437
3438 u8 flow_index[0x20];
3439
Matan Barakb4ff3a32016-02-09 14:57:42 +02003440 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003441
3442 struct mlx5_ifc_flow_context_bits flow_context;
3443};
3444
3445struct mlx5_ifc_rts2rts_qp_out_bits {
3446 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003447 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003448
3449 u8 syndrome[0x20];
3450
Matan Barakb4ff3a32016-02-09 14:57:42 +02003451 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003452};
3453
3454struct mlx5_ifc_rts2rts_qp_in_bits {
3455 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003456 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003457
Matan Barakb4ff3a32016-02-09 14:57:42 +02003458 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003459 u8 op_mod[0x10];
3460
Matan Barakb4ff3a32016-02-09 14:57:42 +02003461 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003462 u8 qpn[0x18];
3463
Matan Barakb4ff3a32016-02-09 14:57:42 +02003464 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003465
3466 u8 opt_param_mask[0x20];
3467
Matan Barakb4ff3a32016-02-09 14:57:42 +02003468 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003469
3470 struct mlx5_ifc_qpc_bits qpc;
3471
Matan Barakb4ff3a32016-02-09 14:57:42 +02003472 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003473};
3474
3475struct mlx5_ifc_rtr2rts_qp_out_bits {
3476 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003477 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003478
3479 u8 syndrome[0x20];
3480
Matan Barakb4ff3a32016-02-09 14:57:42 +02003481 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003482};
3483
3484struct mlx5_ifc_rtr2rts_qp_in_bits {
3485 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003486 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003487
Matan Barakb4ff3a32016-02-09 14:57:42 +02003488 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003489 u8 op_mod[0x10];
3490
Matan Barakb4ff3a32016-02-09 14:57:42 +02003491 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003492 u8 qpn[0x18];
3493
Matan Barakb4ff3a32016-02-09 14:57:42 +02003494 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003495
3496 u8 opt_param_mask[0x20];
3497
Matan Barakb4ff3a32016-02-09 14:57:42 +02003498 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003499
3500 struct mlx5_ifc_qpc_bits qpc;
3501
Matan Barakb4ff3a32016-02-09 14:57:42 +02003502 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003503};
3504
3505struct mlx5_ifc_rst2init_qp_out_bits {
3506 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003507 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003508
3509 u8 syndrome[0x20];
3510
Matan Barakb4ff3a32016-02-09 14:57:42 +02003511 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003512};
3513
3514struct mlx5_ifc_rst2init_qp_in_bits {
3515 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003516 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003517
Matan Barakb4ff3a32016-02-09 14:57:42 +02003518 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003519 u8 op_mod[0x10];
3520
Matan Barakb4ff3a32016-02-09 14:57:42 +02003521 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003522 u8 qpn[0x18];
3523
Matan Barakb4ff3a32016-02-09 14:57:42 +02003524 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003525
3526 u8 opt_param_mask[0x20];
3527
Matan Barakb4ff3a32016-02-09 14:57:42 +02003528 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003529
3530 struct mlx5_ifc_qpc_bits qpc;
3531
Matan Barakb4ff3a32016-02-09 14:57:42 +02003532 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003533};
3534
Saeed Mahameed74862162016-06-09 15:11:34 +03003535struct mlx5_ifc_query_xrq_out_bits {
3536 u8 status[0x8];
3537 u8 reserved_at_8[0x18];
3538
3539 u8 syndrome[0x20];
3540
3541 u8 reserved_at_40[0x40];
3542
3543 struct mlx5_ifc_xrqc_bits xrq_context;
3544};
3545
3546struct mlx5_ifc_query_xrq_in_bits {
3547 u8 opcode[0x10];
3548 u8 reserved_at_10[0x10];
3549
3550 u8 reserved_at_20[0x10];
3551 u8 op_mod[0x10];
3552
3553 u8 reserved_at_40[0x8];
3554 u8 xrqn[0x18];
3555
3556 u8 reserved_at_60[0x20];
3557};
3558
Saeed Mahameede2816822015-05-28 22:28:40 +03003559struct mlx5_ifc_query_xrc_srq_out_bits {
3560 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003561 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003562
3563 u8 syndrome[0x20];
3564
Matan Barakb4ff3a32016-02-09 14:57:42 +02003565 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003566
3567 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3568
Matan Barakb4ff3a32016-02-09 14:57:42 +02003569 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003570
3571 u8 pas[0][0x40];
3572};
3573
3574struct mlx5_ifc_query_xrc_srq_in_bits {
3575 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003576 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003577
Matan Barakb4ff3a32016-02-09 14:57:42 +02003578 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003579 u8 op_mod[0x10];
3580
Matan Barakb4ff3a32016-02-09 14:57:42 +02003581 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003582 u8 xrc_srqn[0x18];
3583
Matan Barakb4ff3a32016-02-09 14:57:42 +02003584 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003585};
3586
3587enum {
3588 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3589 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3590};
3591
3592struct mlx5_ifc_query_vport_state_out_bits {
3593 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003594 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003595
3596 u8 syndrome[0x20];
3597
Matan Barakb4ff3a32016-02-09 14:57:42 +02003598 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003599
Matan Barakb4ff3a32016-02-09 14:57:42 +02003600 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003601 u8 admin_state[0x4];
3602 u8 state[0x4];
3603};
3604
3605enum {
3606 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003607 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003608};
3609
3610struct mlx5_ifc_query_vport_state_in_bits {
3611 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003612 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003613
Matan Barakb4ff3a32016-02-09 14:57:42 +02003614 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003615 u8 op_mod[0x10];
3616
3617 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003618 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003619 u8 vport_number[0x10];
3620
Matan Barakb4ff3a32016-02-09 14:57:42 +02003621 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003622};
3623
3624struct mlx5_ifc_query_vport_counter_out_bits {
3625 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003626 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003627
3628 u8 syndrome[0x20];
3629
Matan Barakb4ff3a32016-02-09 14:57:42 +02003630 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003631
3632 struct mlx5_ifc_traffic_counter_bits received_errors;
3633
3634 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3635
3636 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3637
3638 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3639
3640 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3641
3642 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3643
3644 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3645
3646 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3647
3648 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3649
3650 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3651
3652 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3653
3654 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3655
Matan Barakb4ff3a32016-02-09 14:57:42 +02003656 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003657};
3658
3659enum {
3660 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3661};
3662
3663struct mlx5_ifc_query_vport_counter_in_bits {
3664 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003665 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003666
Matan Barakb4ff3a32016-02-09 14:57:42 +02003667 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003668 u8 op_mod[0x10];
3669
3670 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003671 u8 reserved_at_41[0xb];
3672 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003673 u8 vport_number[0x10];
3674
Matan Barakb4ff3a32016-02-09 14:57:42 +02003675 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003676
3677 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003678 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003679
Matan Barakb4ff3a32016-02-09 14:57:42 +02003680 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003681};
3682
3683struct mlx5_ifc_query_tis_out_bits {
3684 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003685 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003686
3687 u8 syndrome[0x20];
3688
Matan Barakb4ff3a32016-02-09 14:57:42 +02003689 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003690
3691 struct mlx5_ifc_tisc_bits tis_context;
3692};
3693
3694struct mlx5_ifc_query_tis_in_bits {
3695 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003696 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003697
Matan Barakb4ff3a32016-02-09 14:57:42 +02003698 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003699 u8 op_mod[0x10];
3700
Matan Barakb4ff3a32016-02-09 14:57:42 +02003701 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003702 u8 tisn[0x18];
3703
Matan Barakb4ff3a32016-02-09 14:57:42 +02003704 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003705};
3706
3707struct mlx5_ifc_query_tir_out_bits {
3708 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003709 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003710
3711 u8 syndrome[0x20];
3712
Matan Barakb4ff3a32016-02-09 14:57:42 +02003713 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003714
3715 struct mlx5_ifc_tirc_bits tir_context;
3716};
3717
3718struct mlx5_ifc_query_tir_in_bits {
3719 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003720 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003721
Matan Barakb4ff3a32016-02-09 14:57:42 +02003722 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003723 u8 op_mod[0x10];
3724
Matan Barakb4ff3a32016-02-09 14:57:42 +02003725 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003726 u8 tirn[0x18];
3727
Matan Barakb4ff3a32016-02-09 14:57:42 +02003728 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003729};
3730
3731struct mlx5_ifc_query_srq_out_bits {
3732 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003733 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003734
3735 u8 syndrome[0x20];
3736
Matan Barakb4ff3a32016-02-09 14:57:42 +02003737 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003738
3739 struct mlx5_ifc_srqc_bits srq_context_entry;
3740
Matan Barakb4ff3a32016-02-09 14:57:42 +02003741 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003742
3743 u8 pas[0][0x40];
3744};
3745
3746struct mlx5_ifc_query_srq_in_bits {
3747 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003748 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003749
Matan Barakb4ff3a32016-02-09 14:57:42 +02003750 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003751 u8 op_mod[0x10];
3752
Matan Barakb4ff3a32016-02-09 14:57:42 +02003753 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003754 u8 srqn[0x18];
3755
Matan Barakb4ff3a32016-02-09 14:57:42 +02003756 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003757};
3758
3759struct mlx5_ifc_query_sq_out_bits {
3760 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003761 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003762
3763 u8 syndrome[0x20];
3764
Matan Barakb4ff3a32016-02-09 14:57:42 +02003765 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003766
3767 struct mlx5_ifc_sqc_bits sq_context;
3768};
3769
3770struct mlx5_ifc_query_sq_in_bits {
3771 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003772 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003773
Matan Barakb4ff3a32016-02-09 14:57:42 +02003774 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003775 u8 op_mod[0x10];
3776
Matan Barakb4ff3a32016-02-09 14:57:42 +02003777 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003778 u8 sqn[0x18];
3779
Matan Barakb4ff3a32016-02-09 14:57:42 +02003780 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003781};
3782
3783struct mlx5_ifc_query_special_contexts_out_bits {
3784 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003785 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003786
3787 u8 syndrome[0x20];
3788
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003789 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003790
3791 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003792
3793 u8 null_mkey[0x20];
3794
3795 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003796};
3797
3798struct mlx5_ifc_query_special_contexts_in_bits {
3799 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003800 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003801
Matan Barakb4ff3a32016-02-09 14:57:42 +02003802 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003803 u8 op_mod[0x10];
3804
Matan Barakb4ff3a32016-02-09 14:57:42 +02003805 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003806};
3807
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003808struct mlx5_ifc_query_scheduling_element_out_bits {
3809 u8 opcode[0x10];
3810 u8 reserved_at_10[0x10];
3811
3812 u8 reserved_at_20[0x10];
3813 u8 op_mod[0x10];
3814
3815 u8 reserved_at_40[0xc0];
3816
3817 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3818
3819 u8 reserved_at_300[0x100];
3820};
3821
3822enum {
3823 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3824};
3825
3826struct mlx5_ifc_query_scheduling_element_in_bits {
3827 u8 opcode[0x10];
3828 u8 reserved_at_10[0x10];
3829
3830 u8 reserved_at_20[0x10];
3831 u8 op_mod[0x10];
3832
3833 u8 scheduling_hierarchy[0x8];
3834 u8 reserved_at_48[0x18];
3835
3836 u8 scheduling_element_id[0x20];
3837
3838 u8 reserved_at_80[0x180];
3839};
3840
Saeed Mahameede2816822015-05-28 22:28:40 +03003841struct mlx5_ifc_query_rqt_out_bits {
3842 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003843 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003844
3845 u8 syndrome[0x20];
3846
Matan Barakb4ff3a32016-02-09 14:57:42 +02003847 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003848
3849 struct mlx5_ifc_rqtc_bits rqt_context;
3850};
3851
3852struct mlx5_ifc_query_rqt_in_bits {
3853 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003854 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003855
Matan Barakb4ff3a32016-02-09 14:57:42 +02003856 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003857 u8 op_mod[0x10];
3858
Matan Barakb4ff3a32016-02-09 14:57:42 +02003859 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003860 u8 rqtn[0x18];
3861
Matan Barakb4ff3a32016-02-09 14:57:42 +02003862 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003863};
3864
3865struct mlx5_ifc_query_rq_out_bits {
3866 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003867 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003868
3869 u8 syndrome[0x20];
3870
Matan Barakb4ff3a32016-02-09 14:57:42 +02003871 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003872
3873 struct mlx5_ifc_rqc_bits rq_context;
3874};
3875
3876struct mlx5_ifc_query_rq_in_bits {
3877 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003878 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003879
Matan Barakb4ff3a32016-02-09 14:57:42 +02003880 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003881 u8 op_mod[0x10];
3882
Matan Barakb4ff3a32016-02-09 14:57:42 +02003883 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003884 u8 rqn[0x18];
3885
Matan Barakb4ff3a32016-02-09 14:57:42 +02003886 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003887};
3888
3889struct mlx5_ifc_query_roce_address_out_bits {
3890 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003891 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003892
3893 u8 syndrome[0x20];
3894
Matan Barakb4ff3a32016-02-09 14:57:42 +02003895 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003896
3897 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3898};
3899
3900struct mlx5_ifc_query_roce_address_in_bits {
3901 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003902 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003903
Matan Barakb4ff3a32016-02-09 14:57:42 +02003904 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003905 u8 op_mod[0x10];
3906
3907 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003908 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003909
Matan Barakb4ff3a32016-02-09 14:57:42 +02003910 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003911};
3912
3913struct mlx5_ifc_query_rmp_out_bits {
3914 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003915 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003916
3917 u8 syndrome[0x20];
3918
Matan Barakb4ff3a32016-02-09 14:57:42 +02003919 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003920
3921 struct mlx5_ifc_rmpc_bits rmp_context;
3922};
3923
3924struct mlx5_ifc_query_rmp_in_bits {
3925 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003926 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003927
Matan Barakb4ff3a32016-02-09 14:57:42 +02003928 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003929 u8 op_mod[0x10];
3930
Matan Barakb4ff3a32016-02-09 14:57:42 +02003931 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003932 u8 rmpn[0x18];
3933
Matan Barakb4ff3a32016-02-09 14:57:42 +02003934 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003935};
3936
3937struct mlx5_ifc_query_qp_out_bits {
3938 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003939 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003940
3941 u8 syndrome[0x20];
3942
Matan Barakb4ff3a32016-02-09 14:57:42 +02003943 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003944
3945 u8 opt_param_mask[0x20];
3946
Matan Barakb4ff3a32016-02-09 14:57:42 +02003947 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003948
3949 struct mlx5_ifc_qpc_bits qpc;
3950
Matan Barakb4ff3a32016-02-09 14:57:42 +02003951 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003952
3953 u8 pas[0][0x40];
3954};
3955
3956struct mlx5_ifc_query_qp_in_bits {
3957 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003958 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003959
Matan Barakb4ff3a32016-02-09 14:57:42 +02003960 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003961 u8 op_mod[0x10];
3962
Matan Barakb4ff3a32016-02-09 14:57:42 +02003963 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003964 u8 qpn[0x18];
3965
Matan Barakb4ff3a32016-02-09 14:57:42 +02003966 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003967};
3968
3969struct mlx5_ifc_query_q_counter_out_bits {
3970 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003971 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003972
3973 u8 syndrome[0x20];
3974
Matan Barakb4ff3a32016-02-09 14:57:42 +02003975 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003976
3977 u8 rx_write_requests[0x20];
3978
Matan Barakb4ff3a32016-02-09 14:57:42 +02003979 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003980
3981 u8 rx_read_requests[0x20];
3982
Matan Barakb4ff3a32016-02-09 14:57:42 +02003983 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003984
3985 u8 rx_atomic_requests[0x20];
3986
Matan Barakb4ff3a32016-02-09 14:57:42 +02003987 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003988
3989 u8 rx_dct_connect[0x20];
3990
Matan Barakb4ff3a32016-02-09 14:57:42 +02003991 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003992
3993 u8 out_of_buffer[0x20];
3994
Matan Barakb4ff3a32016-02-09 14:57:42 +02003995 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003996
3997 u8 out_of_sequence[0x20];
3998
Saeed Mahameed74862162016-06-09 15:11:34 +03003999 u8 reserved_at_1e0[0x20];
4000
4001 u8 duplicate_request[0x20];
4002
4003 u8 reserved_at_220[0x20];
4004
4005 u8 rnr_nak_retry_err[0x20];
4006
4007 u8 reserved_at_260[0x20];
4008
4009 u8 packet_seq_err[0x20];
4010
4011 u8 reserved_at_2a0[0x20];
4012
4013 u8 implied_nak_seq_err[0x20];
4014
4015 u8 reserved_at_2e0[0x20];
4016
4017 u8 local_ack_timeout_err[0x20];
4018
Parav Pandit58dcb602017-06-19 07:19:37 +03004019 u8 reserved_at_320[0xa0];
4020
4021 u8 resp_local_length_error[0x20];
4022
4023 u8 req_local_length_error[0x20];
4024
4025 u8 resp_local_qp_error[0x20];
4026
4027 u8 local_operation_error[0x20];
4028
4029 u8 resp_local_protection[0x20];
4030
4031 u8 req_local_protection[0x20];
4032
4033 u8 resp_cqe_error[0x20];
4034
4035 u8 req_cqe_error[0x20];
4036
4037 u8 req_mw_binding[0x20];
4038
4039 u8 req_bad_response[0x20];
4040
4041 u8 req_remote_invalid_request[0x20];
4042
4043 u8 resp_remote_invalid_request[0x20];
4044
4045 u8 req_remote_access_errors[0x20];
4046
4047 u8 resp_remote_access_errors[0x20];
4048
4049 u8 req_remote_operation_errors[0x20];
4050
4051 u8 req_transport_retries_exceeded[0x20];
4052
4053 u8 cq_overflow[0x20];
4054
4055 u8 resp_cqe_flush_error[0x20];
4056
4057 u8 req_cqe_flush_error[0x20];
4058
4059 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004060};
4061
4062struct mlx5_ifc_query_q_counter_in_bits {
4063 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004064 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004065
Matan Barakb4ff3a32016-02-09 14:57:42 +02004066 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004067 u8 op_mod[0x10];
4068
Matan Barakb4ff3a32016-02-09 14:57:42 +02004069 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004070
4071 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004072 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004073
Matan Barakb4ff3a32016-02-09 14:57:42 +02004074 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004075 u8 counter_set_id[0x8];
4076};
4077
4078struct mlx5_ifc_query_pages_out_bits {
4079 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004080 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004081
4082 u8 syndrome[0x20];
4083
Matan Barakb4ff3a32016-02-09 14:57:42 +02004084 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004085 u8 function_id[0x10];
4086
4087 u8 num_pages[0x20];
4088};
4089
4090enum {
4091 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4092 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4093 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4094};
4095
4096struct mlx5_ifc_query_pages_in_bits {
4097 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004098 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004099
Matan Barakb4ff3a32016-02-09 14:57:42 +02004100 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004101 u8 op_mod[0x10];
4102
Matan Barakb4ff3a32016-02-09 14:57:42 +02004103 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004104 u8 function_id[0x10];
4105
Matan Barakb4ff3a32016-02-09 14:57:42 +02004106 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004107};
4108
4109struct mlx5_ifc_query_nic_vport_context_out_bits {
4110 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004111 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004112
4113 u8 syndrome[0x20];
4114
Matan Barakb4ff3a32016-02-09 14:57:42 +02004115 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004116
4117 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4118};
4119
4120struct mlx5_ifc_query_nic_vport_context_in_bits {
4121 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004122 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004123
Matan Barakb4ff3a32016-02-09 14:57:42 +02004124 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004125 u8 op_mod[0x10];
4126
4127 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004128 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004129 u8 vport_number[0x10];
4130
Matan Barakb4ff3a32016-02-09 14:57:42 +02004131 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004132 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004133 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004134};
4135
4136struct mlx5_ifc_query_mkey_out_bits {
4137 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004138 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004139
4140 u8 syndrome[0x20];
4141
Matan Barakb4ff3a32016-02-09 14:57:42 +02004142 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004143
4144 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4145
Matan Barakb4ff3a32016-02-09 14:57:42 +02004146 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004147
4148 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4149
4150 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4151};
4152
4153struct mlx5_ifc_query_mkey_in_bits {
4154 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004155 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004156
Matan Barakb4ff3a32016-02-09 14:57:42 +02004157 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004158 u8 op_mod[0x10];
4159
Matan Barakb4ff3a32016-02-09 14:57:42 +02004160 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004161 u8 mkey_index[0x18];
4162
4163 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004164 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004165};
4166
4167struct mlx5_ifc_query_mad_demux_out_bits {
4168 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004169 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004170
4171 u8 syndrome[0x20];
4172
Matan Barakb4ff3a32016-02-09 14:57:42 +02004173 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004174
4175 u8 mad_dumux_parameters_block[0x20];
4176};
4177
4178struct mlx5_ifc_query_mad_demux_in_bits {
4179 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004180 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004181
Matan Barakb4ff3a32016-02-09 14:57:42 +02004182 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004183 u8 op_mod[0x10];
4184
Matan Barakb4ff3a32016-02-09 14:57:42 +02004185 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004186};
4187
4188struct mlx5_ifc_query_l2_table_entry_out_bits {
4189 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004190 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004191
4192 u8 syndrome[0x20];
4193
Matan Barakb4ff3a32016-02-09 14:57:42 +02004194 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004195
Matan Barakb4ff3a32016-02-09 14:57:42 +02004196 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004197 u8 vlan_valid[0x1];
4198 u8 vlan[0xc];
4199
4200 struct mlx5_ifc_mac_address_layout_bits mac_address;
4201
Matan Barakb4ff3a32016-02-09 14:57:42 +02004202 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004203};
4204
4205struct mlx5_ifc_query_l2_table_entry_in_bits {
4206 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004207 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004208
Matan Barakb4ff3a32016-02-09 14:57:42 +02004209 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004210 u8 op_mod[0x10];
4211
Matan Barakb4ff3a32016-02-09 14:57:42 +02004212 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004213
Matan Barakb4ff3a32016-02-09 14:57:42 +02004214 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004215 u8 table_index[0x18];
4216
Matan Barakb4ff3a32016-02-09 14:57:42 +02004217 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004218};
4219
4220struct mlx5_ifc_query_issi_out_bits {
4221 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004222 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004223
4224 u8 syndrome[0x20];
4225
Matan Barakb4ff3a32016-02-09 14:57:42 +02004226 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004227 u8 current_issi[0x10];
4228
Matan Barakb4ff3a32016-02-09 14:57:42 +02004229 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004230
Matan Barakb4ff3a32016-02-09 14:57:42 +02004231 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004232 u8 supported_issi_dw0[0x20];
4233};
4234
4235struct mlx5_ifc_query_issi_in_bits {
4236 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004237 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004238
Matan Barakb4ff3a32016-02-09 14:57:42 +02004239 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004240 u8 op_mod[0x10];
4241
Matan Barakb4ff3a32016-02-09 14:57:42 +02004242 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004243};
4244
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004245struct mlx5_ifc_set_driver_version_out_bits {
4246 u8 status[0x8];
4247 u8 reserved_0[0x18];
4248
4249 u8 syndrome[0x20];
4250 u8 reserved_1[0x40];
4251};
4252
4253struct mlx5_ifc_set_driver_version_in_bits {
4254 u8 opcode[0x10];
4255 u8 reserved_0[0x10];
4256
4257 u8 reserved_1[0x10];
4258 u8 op_mod[0x10];
4259
4260 u8 reserved_2[0x40];
4261 u8 driver_version[64][0x8];
4262};
4263
Saeed Mahameede2816822015-05-28 22:28:40 +03004264struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4265 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004266 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004267
4268 u8 syndrome[0x20];
4269
Matan Barakb4ff3a32016-02-09 14:57:42 +02004270 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004271
4272 struct mlx5_ifc_pkey_bits pkey[0];
4273};
4274
4275struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4276 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004277 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004278
Matan Barakb4ff3a32016-02-09 14:57:42 +02004279 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004280 u8 op_mod[0x10];
4281
4282 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004283 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004284 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004285 u8 vport_number[0x10];
4286
Matan Barakb4ff3a32016-02-09 14:57:42 +02004287 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004288 u8 pkey_index[0x10];
4289};
4290
Eli Coheneff901d2016-03-11 22:58:42 +02004291enum {
4292 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4293 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4294 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4295};
4296
Saeed Mahameede2816822015-05-28 22:28:40 +03004297struct mlx5_ifc_query_hca_vport_gid_out_bits {
4298 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004299 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004300
4301 u8 syndrome[0x20];
4302
Matan Barakb4ff3a32016-02-09 14:57:42 +02004303 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004304
4305 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004306 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004307
4308 struct mlx5_ifc_array128_auto_bits gid[0];
4309};
4310
4311struct mlx5_ifc_query_hca_vport_gid_in_bits {
4312 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004313 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004314
Matan Barakb4ff3a32016-02-09 14:57:42 +02004315 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004316 u8 op_mod[0x10];
4317
4318 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004319 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004320 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004321 u8 vport_number[0x10];
4322
Matan Barakb4ff3a32016-02-09 14:57:42 +02004323 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004324 u8 gid_index[0x10];
4325};
4326
4327struct mlx5_ifc_query_hca_vport_context_out_bits {
4328 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004329 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004330
4331 u8 syndrome[0x20];
4332
Matan Barakb4ff3a32016-02-09 14:57:42 +02004333 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004334
4335 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4336};
4337
4338struct mlx5_ifc_query_hca_vport_context_in_bits {
4339 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004340 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004341
Matan Barakb4ff3a32016-02-09 14:57:42 +02004342 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004343 u8 op_mod[0x10];
4344
4345 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004346 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004347 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004348 u8 vport_number[0x10];
4349
Matan Barakb4ff3a32016-02-09 14:57:42 +02004350 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004351};
4352
4353struct mlx5_ifc_query_hca_cap_out_bits {
4354 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004355 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004356
4357 u8 syndrome[0x20];
4358
Matan Barakb4ff3a32016-02-09 14:57:42 +02004359 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004360
4361 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004362};
4363
4364struct mlx5_ifc_query_hca_cap_in_bits {
4365 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004366 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004367
Matan Barakb4ff3a32016-02-09 14:57:42 +02004368 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004369 u8 op_mod[0x10];
4370
Matan Barakb4ff3a32016-02-09 14:57:42 +02004371 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004372};
4373
Saeed Mahameede2816822015-05-28 22:28:40 +03004374struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004375 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004376 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004377
4378 u8 syndrome[0x20];
4379
Matan Barakb4ff3a32016-02-09 14:57:42 +02004380 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004381
Matan Barakb4ff3a32016-02-09 14:57:42 +02004382 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004383 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004384 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004385 u8 log_size[0x8];
4386
Matan Barakb4ff3a32016-02-09 14:57:42 +02004387 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004388};
4389
Saeed Mahameede2816822015-05-28 22:28:40 +03004390struct mlx5_ifc_query_flow_table_in_bits {
4391 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004392 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004393
Matan Barakb4ff3a32016-02-09 14:57:42 +02004394 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004395 u8 op_mod[0x10];
4396
Matan Barakb4ff3a32016-02-09 14:57:42 +02004397 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004398
4399 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004400 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004401
Matan Barakb4ff3a32016-02-09 14:57:42 +02004402 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004403 u8 table_id[0x18];
4404
Matan Barakb4ff3a32016-02-09 14:57:42 +02004405 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004406};
4407
4408struct mlx5_ifc_query_fte_out_bits {
4409 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004410 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004411
4412 u8 syndrome[0x20];
4413
Matan Barakb4ff3a32016-02-09 14:57:42 +02004414 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004415
4416 struct mlx5_ifc_flow_context_bits flow_context;
4417};
4418
4419struct mlx5_ifc_query_fte_in_bits {
4420 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004421 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004422
Matan Barakb4ff3a32016-02-09 14:57:42 +02004423 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004424 u8 op_mod[0x10];
4425
Matan Barakb4ff3a32016-02-09 14:57:42 +02004426 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004427
4428 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004429 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004430
Matan Barakb4ff3a32016-02-09 14:57:42 +02004431 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004432 u8 table_id[0x18];
4433
Matan Barakb4ff3a32016-02-09 14:57:42 +02004434 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004435
4436 u8 flow_index[0x20];
4437
Matan Barakb4ff3a32016-02-09 14:57:42 +02004438 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004439};
4440
4441enum {
4442 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4443 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4444 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4445};
4446
4447struct mlx5_ifc_query_flow_group_out_bits {
4448 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004449 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004450
4451 u8 syndrome[0x20];
4452
Matan Barakb4ff3a32016-02-09 14:57:42 +02004453 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004454
4455 u8 start_flow_index[0x20];
4456
Matan Barakb4ff3a32016-02-09 14:57:42 +02004457 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004458
4459 u8 end_flow_index[0x20];
4460
Matan Barakb4ff3a32016-02-09 14:57:42 +02004461 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004462
Matan Barakb4ff3a32016-02-09 14:57:42 +02004463 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004464 u8 match_criteria_enable[0x8];
4465
4466 struct mlx5_ifc_fte_match_param_bits match_criteria;
4467
Matan Barakb4ff3a32016-02-09 14:57:42 +02004468 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004469};
4470
4471struct mlx5_ifc_query_flow_group_in_bits {
4472 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004473 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004474
Matan Barakb4ff3a32016-02-09 14:57:42 +02004475 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004476 u8 op_mod[0x10];
4477
Matan Barakb4ff3a32016-02-09 14:57:42 +02004478 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004479
4480 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004481 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004482
Matan Barakb4ff3a32016-02-09 14:57:42 +02004483 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004484 u8 table_id[0x18];
4485
4486 u8 group_id[0x20];
4487
Matan Barakb4ff3a32016-02-09 14:57:42 +02004488 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004489};
4490
Amir Vadai9dc0b282016-05-13 12:55:39 +00004491struct mlx5_ifc_query_flow_counter_out_bits {
4492 u8 status[0x8];
4493 u8 reserved_at_8[0x18];
4494
4495 u8 syndrome[0x20];
4496
4497 u8 reserved_at_40[0x40];
4498
4499 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4500};
4501
4502struct mlx5_ifc_query_flow_counter_in_bits {
4503 u8 opcode[0x10];
4504 u8 reserved_at_10[0x10];
4505
4506 u8 reserved_at_20[0x10];
4507 u8 op_mod[0x10];
4508
4509 u8 reserved_at_40[0x80];
4510
4511 u8 clear[0x1];
4512 u8 reserved_at_c1[0xf];
4513 u8 num_of_counters[0x10];
4514
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004515 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004516};
4517
Saeed Mahameedd6666752015-12-01 18:03:22 +02004518struct mlx5_ifc_query_esw_vport_context_out_bits {
4519 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004520 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004521
4522 u8 syndrome[0x20];
4523
Matan Barakb4ff3a32016-02-09 14:57:42 +02004524 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004525
4526 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4527};
4528
4529struct mlx5_ifc_query_esw_vport_context_in_bits {
4530 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004531 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004532
Matan Barakb4ff3a32016-02-09 14:57:42 +02004533 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004534 u8 op_mod[0x10];
4535
4536 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004537 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004538 u8 vport_number[0x10];
4539
Matan Barakb4ff3a32016-02-09 14:57:42 +02004540 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004541};
4542
4543struct mlx5_ifc_modify_esw_vport_context_out_bits {
4544 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004545 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004546
4547 u8 syndrome[0x20];
4548
Matan Barakb4ff3a32016-02-09 14:57:42 +02004549 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004550};
4551
4552struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004553 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004554 u8 vport_cvlan_insert[0x1];
4555 u8 vport_svlan_insert[0x1];
4556 u8 vport_cvlan_strip[0x1];
4557 u8 vport_svlan_strip[0x1];
4558};
4559
4560struct mlx5_ifc_modify_esw_vport_context_in_bits {
4561 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004562 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004563
Matan Barakb4ff3a32016-02-09 14:57:42 +02004564 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004565 u8 op_mod[0x10];
4566
4567 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004568 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004569 u8 vport_number[0x10];
4570
4571 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4572
4573 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4574};
4575
Saeed Mahameede2816822015-05-28 22:28:40 +03004576struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004577 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004578 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004579
4580 u8 syndrome[0x20];
4581
Matan Barakb4ff3a32016-02-09 14:57:42 +02004582 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004583
4584 struct mlx5_ifc_eqc_bits eq_context_entry;
4585
Matan Barakb4ff3a32016-02-09 14:57:42 +02004586 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004587
4588 u8 event_bitmask[0x40];
4589
Matan Barakb4ff3a32016-02-09 14:57:42 +02004590 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004591
4592 u8 pas[0][0x40];
4593};
4594
4595struct mlx5_ifc_query_eq_in_bits {
4596 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004597 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004598
Matan Barakb4ff3a32016-02-09 14:57:42 +02004599 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004600 u8 op_mod[0x10];
4601
Matan Barakb4ff3a32016-02-09 14:57:42 +02004602 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004603 u8 eq_number[0x8];
4604
Matan Barakb4ff3a32016-02-09 14:57:42 +02004605 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004606};
4607
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004608struct mlx5_ifc_encap_header_in_bits {
4609 u8 reserved_at_0[0x5];
4610 u8 header_type[0x3];
4611 u8 reserved_at_8[0xe];
4612 u8 encap_header_size[0xa];
4613
4614 u8 reserved_at_20[0x10];
4615 u8 encap_header[2][0x8];
4616
4617 u8 more_encap_header[0][0x8];
4618};
4619
4620struct mlx5_ifc_query_encap_header_out_bits {
4621 u8 status[0x8];
4622 u8 reserved_at_8[0x18];
4623
4624 u8 syndrome[0x20];
4625
4626 u8 reserved_at_40[0xa0];
4627
4628 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4629};
4630
4631struct mlx5_ifc_query_encap_header_in_bits {
4632 u8 opcode[0x10];
4633 u8 reserved_at_10[0x10];
4634
4635 u8 reserved_at_20[0x10];
4636 u8 op_mod[0x10];
4637
4638 u8 encap_id[0x20];
4639
4640 u8 reserved_at_60[0xa0];
4641};
4642
4643struct mlx5_ifc_alloc_encap_header_out_bits {
4644 u8 status[0x8];
4645 u8 reserved_at_8[0x18];
4646
4647 u8 syndrome[0x20];
4648
4649 u8 encap_id[0x20];
4650
4651 u8 reserved_at_60[0x20];
4652};
4653
4654struct mlx5_ifc_alloc_encap_header_in_bits {
4655 u8 opcode[0x10];
4656 u8 reserved_at_10[0x10];
4657
4658 u8 reserved_at_20[0x10];
4659 u8 op_mod[0x10];
4660
4661 u8 reserved_at_40[0xa0];
4662
4663 struct mlx5_ifc_encap_header_in_bits encap_header;
4664};
4665
4666struct mlx5_ifc_dealloc_encap_header_out_bits {
4667 u8 status[0x8];
4668 u8 reserved_at_8[0x18];
4669
4670 u8 syndrome[0x20];
4671
4672 u8 reserved_at_40[0x40];
4673};
4674
4675struct mlx5_ifc_dealloc_encap_header_in_bits {
4676 u8 opcode[0x10];
4677 u8 reserved_at_10[0x10];
4678
4679 u8 reserved_20[0x10];
4680 u8 op_mod[0x10];
4681
4682 u8 encap_id[0x20];
4683
4684 u8 reserved_60[0x20];
4685};
4686
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004687struct mlx5_ifc_set_action_in_bits {
4688 u8 action_type[0x4];
4689 u8 field[0xc];
4690 u8 reserved_at_10[0x3];
4691 u8 offset[0x5];
4692 u8 reserved_at_18[0x3];
4693 u8 length[0x5];
4694
4695 u8 data[0x20];
4696};
4697
4698struct mlx5_ifc_add_action_in_bits {
4699 u8 action_type[0x4];
4700 u8 field[0xc];
4701 u8 reserved_at_10[0x10];
4702
4703 u8 data[0x20];
4704};
4705
4706union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4707 struct mlx5_ifc_set_action_in_bits set_action_in;
4708 struct mlx5_ifc_add_action_in_bits add_action_in;
4709 u8 reserved_at_0[0x40];
4710};
4711
4712enum {
4713 MLX5_ACTION_TYPE_SET = 0x1,
4714 MLX5_ACTION_TYPE_ADD = 0x2,
4715};
4716
4717enum {
4718 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4719 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4720 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4721 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4722 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4723 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4724 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4725 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4726 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4727 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4728 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4729 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4730 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4731 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4732 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4733 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4734 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4735 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4736 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4737 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4738 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4739 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004740 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004741};
4742
4743struct mlx5_ifc_alloc_modify_header_context_out_bits {
4744 u8 status[0x8];
4745 u8 reserved_at_8[0x18];
4746
4747 u8 syndrome[0x20];
4748
4749 u8 modify_header_id[0x20];
4750
4751 u8 reserved_at_60[0x20];
4752};
4753
4754struct mlx5_ifc_alloc_modify_header_context_in_bits {
4755 u8 opcode[0x10];
4756 u8 reserved_at_10[0x10];
4757
4758 u8 reserved_at_20[0x10];
4759 u8 op_mod[0x10];
4760
4761 u8 reserved_at_40[0x20];
4762
4763 u8 table_type[0x8];
4764 u8 reserved_at_68[0x10];
4765 u8 num_of_actions[0x8];
4766
4767 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4768};
4769
4770struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4771 u8 status[0x8];
4772 u8 reserved_at_8[0x18];
4773
4774 u8 syndrome[0x20];
4775
4776 u8 reserved_at_40[0x40];
4777};
4778
4779struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4780 u8 opcode[0x10];
4781 u8 reserved_at_10[0x10];
4782
4783 u8 reserved_at_20[0x10];
4784 u8 op_mod[0x10];
4785
4786 u8 modify_header_id[0x20];
4787
4788 u8 reserved_at_60[0x20];
4789};
4790
Saeed Mahameede2816822015-05-28 22:28:40 +03004791struct mlx5_ifc_query_dct_out_bits {
4792 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004793 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004794
4795 u8 syndrome[0x20];
4796
Matan Barakb4ff3a32016-02-09 14:57:42 +02004797 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004798
4799 struct mlx5_ifc_dctc_bits dct_context_entry;
4800
Matan Barakb4ff3a32016-02-09 14:57:42 +02004801 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004802};
4803
4804struct mlx5_ifc_query_dct_in_bits {
4805 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004806 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004807
Matan Barakb4ff3a32016-02-09 14:57:42 +02004808 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004809 u8 op_mod[0x10];
4810
Matan Barakb4ff3a32016-02-09 14:57:42 +02004811 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004812 u8 dctn[0x18];
4813
Matan Barakb4ff3a32016-02-09 14:57:42 +02004814 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004815};
4816
4817struct mlx5_ifc_query_cq_out_bits {
4818 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004819 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004820
4821 u8 syndrome[0x20];
4822
Matan Barakb4ff3a32016-02-09 14:57:42 +02004823 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004824
4825 struct mlx5_ifc_cqc_bits cq_context;
4826
Matan Barakb4ff3a32016-02-09 14:57:42 +02004827 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004828
4829 u8 pas[0][0x40];
4830};
4831
4832struct mlx5_ifc_query_cq_in_bits {
4833 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004834 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004835
Matan Barakb4ff3a32016-02-09 14:57:42 +02004836 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004837 u8 op_mod[0x10];
4838
Matan Barakb4ff3a32016-02-09 14:57:42 +02004839 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004840 u8 cqn[0x18];
4841
Matan Barakb4ff3a32016-02-09 14:57:42 +02004842 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004843};
4844
4845struct mlx5_ifc_query_cong_status_out_bits {
4846 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004847 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004848
4849 u8 syndrome[0x20];
4850
Matan Barakb4ff3a32016-02-09 14:57:42 +02004851 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004852
4853 u8 enable[0x1];
4854 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004855 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004856};
4857
4858struct mlx5_ifc_query_cong_status_in_bits {
4859 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004860 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004861
Matan Barakb4ff3a32016-02-09 14:57:42 +02004862 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004863 u8 op_mod[0x10];
4864
Matan Barakb4ff3a32016-02-09 14:57:42 +02004865 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004866 u8 priority[0x4];
4867 u8 cong_protocol[0x4];
4868
Matan Barakb4ff3a32016-02-09 14:57:42 +02004869 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004870};
4871
4872struct mlx5_ifc_query_cong_statistics_out_bits {
4873 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004874 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004875
4876 u8 syndrome[0x20];
4877
Matan Barakb4ff3a32016-02-09 14:57:42 +02004878 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004879
Parav Pandite1f24a72017-04-16 07:29:29 +03004880 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004881
4882 u8 sum_flows[0x20];
4883
Parav Pandite1f24a72017-04-16 07:29:29 +03004884 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004885
Parav Pandite1f24a72017-04-16 07:29:29 +03004886 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004887
Parav Pandite1f24a72017-04-16 07:29:29 +03004888 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004889
Parav Pandite1f24a72017-04-16 07:29:29 +03004890 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004891
Matan Barakb4ff3a32016-02-09 14:57:42 +02004892 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004893
4894 u8 time_stamp_high[0x20];
4895
4896 u8 time_stamp_low[0x20];
4897
4898 u8 accumulators_period[0x20];
4899
Parav Pandite1f24a72017-04-16 07:29:29 +03004900 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004901
Parav Pandite1f24a72017-04-16 07:29:29 +03004902 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004903
Parav Pandite1f24a72017-04-16 07:29:29 +03004904 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004905
Parav Pandite1f24a72017-04-16 07:29:29 +03004906 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004907
Matan Barakb4ff3a32016-02-09 14:57:42 +02004908 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004909};
4910
4911struct mlx5_ifc_query_cong_statistics_in_bits {
4912 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004913 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004914
Matan Barakb4ff3a32016-02-09 14:57:42 +02004915 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004916 u8 op_mod[0x10];
4917
4918 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004919 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004920
Matan Barakb4ff3a32016-02-09 14:57:42 +02004921 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004922};
4923
4924struct mlx5_ifc_query_cong_params_out_bits {
4925 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004926 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004927
4928 u8 syndrome[0x20];
4929
Matan Barakb4ff3a32016-02-09 14:57:42 +02004930 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004931
4932 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4933};
4934
4935struct mlx5_ifc_query_cong_params_in_bits {
4936 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004937 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004938
Matan Barakb4ff3a32016-02-09 14:57:42 +02004939 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004940 u8 op_mod[0x10];
4941
Matan Barakb4ff3a32016-02-09 14:57:42 +02004942 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004943 u8 cong_protocol[0x4];
4944
Matan Barakb4ff3a32016-02-09 14:57:42 +02004945 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004946};
4947
4948struct mlx5_ifc_query_adapter_out_bits {
4949 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004950 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004951
4952 u8 syndrome[0x20];
4953
Matan Barakb4ff3a32016-02-09 14:57:42 +02004954 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004955
4956 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4957};
4958
4959struct mlx5_ifc_query_adapter_in_bits {
4960 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004961 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004962
Matan Barakb4ff3a32016-02-09 14:57:42 +02004963 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004964 u8 op_mod[0x10];
4965
Matan Barakb4ff3a32016-02-09 14:57:42 +02004966 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004967};
4968
4969struct mlx5_ifc_qp_2rst_out_bits {
4970 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004971 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004972
4973 u8 syndrome[0x20];
4974
Matan Barakb4ff3a32016-02-09 14:57:42 +02004975 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004976};
4977
4978struct mlx5_ifc_qp_2rst_in_bits {
4979 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004980 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004981
Matan Barakb4ff3a32016-02-09 14:57:42 +02004982 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004983 u8 op_mod[0x10];
4984
Matan Barakb4ff3a32016-02-09 14:57:42 +02004985 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004986 u8 qpn[0x18];
4987
Matan Barakb4ff3a32016-02-09 14:57:42 +02004988 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004989};
4990
4991struct mlx5_ifc_qp_2err_out_bits {
4992 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004993 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004994
4995 u8 syndrome[0x20];
4996
Matan Barakb4ff3a32016-02-09 14:57:42 +02004997 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004998};
4999
5000struct mlx5_ifc_qp_2err_in_bits {
5001 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005002 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005003
Matan Barakb4ff3a32016-02-09 14:57:42 +02005004 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005005 u8 op_mod[0x10];
5006
Matan Barakb4ff3a32016-02-09 14:57:42 +02005007 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005008 u8 qpn[0x18];
5009
Matan Barakb4ff3a32016-02-09 14:57:42 +02005010 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005011};
5012
5013struct mlx5_ifc_page_fault_resume_out_bits {
5014 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005015 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005016
5017 u8 syndrome[0x20];
5018
Matan Barakb4ff3a32016-02-09 14:57:42 +02005019 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005020};
5021
5022struct mlx5_ifc_page_fault_resume_in_bits {
5023 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005024 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005025
Matan Barakb4ff3a32016-02-09 14:57:42 +02005026 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005027 u8 op_mod[0x10];
5028
5029 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005030 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005031 u8 page_fault_type[0x3];
5032 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005033
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005034 u8 reserved_at_60[0x8];
5035 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005036};
5037
5038struct mlx5_ifc_nop_out_bits {
5039 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005040 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005041
5042 u8 syndrome[0x20];
5043
Matan Barakb4ff3a32016-02-09 14:57:42 +02005044 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005045};
5046
5047struct mlx5_ifc_nop_in_bits {
5048 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005049 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005050
Matan Barakb4ff3a32016-02-09 14:57:42 +02005051 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005052 u8 op_mod[0x10];
5053
Matan Barakb4ff3a32016-02-09 14:57:42 +02005054 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005055};
5056
5057struct mlx5_ifc_modify_vport_state_out_bits {
5058 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005059 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005060
5061 u8 syndrome[0x20];
5062
Matan Barakb4ff3a32016-02-09 14:57:42 +02005063 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005064};
5065
5066struct mlx5_ifc_modify_vport_state_in_bits {
5067 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005068 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005069
Matan Barakb4ff3a32016-02-09 14:57:42 +02005070 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005071 u8 op_mod[0x10];
5072
5073 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005074 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005075 u8 vport_number[0x10];
5076
Matan Barakb4ff3a32016-02-09 14:57:42 +02005077 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005078 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005079 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005080};
5081
5082struct mlx5_ifc_modify_tis_out_bits {
5083 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005084 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005085
5086 u8 syndrome[0x20];
5087
Matan Barakb4ff3a32016-02-09 14:57:42 +02005088 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005089};
5090
majd@mellanox.com75850d02016-01-14 19:13:06 +02005091struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005092 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005093
Aviv Heller84df61e2016-05-10 13:47:50 +03005094 u8 reserved_at_20[0x1d];
5095 u8 lag_tx_port_affinity[0x1];
5096 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005097 u8 prio[0x1];
5098};
5099
Saeed Mahameede2816822015-05-28 22:28:40 +03005100struct mlx5_ifc_modify_tis_in_bits {
5101 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005102 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005103
Matan Barakb4ff3a32016-02-09 14:57:42 +02005104 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005105 u8 op_mod[0x10];
5106
Matan Barakb4ff3a32016-02-09 14:57:42 +02005107 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005108 u8 tisn[0x18];
5109
Matan Barakb4ff3a32016-02-09 14:57:42 +02005110 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005111
majd@mellanox.com75850d02016-01-14 19:13:06 +02005112 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005113
Matan Barakb4ff3a32016-02-09 14:57:42 +02005114 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005115
5116 struct mlx5_ifc_tisc_bits ctx;
5117};
5118
Achiad Shochatd9eea402015-08-04 14:05:42 +03005119struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005120 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005121
Matan Barakb4ff3a32016-02-09 14:57:42 +02005122 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005123 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005124 u8 reserved_at_3c[0x1];
5125 u8 hash[0x1];
5126 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005127 u8 lro[0x1];
5128};
5129
Saeed Mahameede2816822015-05-28 22:28:40 +03005130struct mlx5_ifc_modify_tir_out_bits {
5131 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005132 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005133
5134 u8 syndrome[0x20];
5135
Matan Barakb4ff3a32016-02-09 14:57:42 +02005136 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005137};
5138
5139struct mlx5_ifc_modify_tir_in_bits {
5140 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005141 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005142
Matan Barakb4ff3a32016-02-09 14:57:42 +02005143 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005144 u8 op_mod[0x10];
5145
Matan Barakb4ff3a32016-02-09 14:57:42 +02005146 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005147 u8 tirn[0x18];
5148
Matan Barakb4ff3a32016-02-09 14:57:42 +02005149 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005150
Achiad Shochatd9eea402015-08-04 14:05:42 +03005151 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005152
Matan Barakb4ff3a32016-02-09 14:57:42 +02005153 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005154
5155 struct mlx5_ifc_tirc_bits ctx;
5156};
5157
5158struct mlx5_ifc_modify_sq_out_bits {
5159 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005160 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005161
5162 u8 syndrome[0x20];
5163
Matan Barakb4ff3a32016-02-09 14:57:42 +02005164 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005165};
5166
5167struct mlx5_ifc_modify_sq_in_bits {
5168 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005169 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005170
Matan Barakb4ff3a32016-02-09 14:57:42 +02005171 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005172 u8 op_mod[0x10];
5173
5174 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005175 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005176 u8 sqn[0x18];
5177
Matan Barakb4ff3a32016-02-09 14:57:42 +02005178 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005179
5180 u8 modify_bitmask[0x40];
5181
Matan Barakb4ff3a32016-02-09 14:57:42 +02005182 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005183
5184 struct mlx5_ifc_sqc_bits ctx;
5185};
5186
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005187struct mlx5_ifc_modify_scheduling_element_out_bits {
5188 u8 status[0x8];
5189 u8 reserved_at_8[0x18];
5190
5191 u8 syndrome[0x20];
5192
5193 u8 reserved_at_40[0x1c0];
5194};
5195
5196enum {
5197 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5198 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5199};
5200
5201struct mlx5_ifc_modify_scheduling_element_in_bits {
5202 u8 opcode[0x10];
5203 u8 reserved_at_10[0x10];
5204
5205 u8 reserved_at_20[0x10];
5206 u8 op_mod[0x10];
5207
5208 u8 scheduling_hierarchy[0x8];
5209 u8 reserved_at_48[0x18];
5210
5211 u8 scheduling_element_id[0x20];
5212
5213 u8 reserved_at_80[0x20];
5214
5215 u8 modify_bitmask[0x20];
5216
5217 u8 reserved_at_c0[0x40];
5218
5219 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5220
5221 u8 reserved_at_300[0x100];
5222};
5223
Saeed Mahameede2816822015-05-28 22:28:40 +03005224struct mlx5_ifc_modify_rqt_out_bits {
5225 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005226 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005227
5228 u8 syndrome[0x20];
5229
Matan Barakb4ff3a32016-02-09 14:57:42 +02005230 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005231};
5232
Achiad Shochat5c503682015-08-04 14:05:43 +03005233struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005234 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005235
Matan Barakb4ff3a32016-02-09 14:57:42 +02005236 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005237 u8 rqn_list[0x1];
5238};
5239
Saeed Mahameede2816822015-05-28 22:28:40 +03005240struct mlx5_ifc_modify_rqt_in_bits {
5241 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005242 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005243
Matan Barakb4ff3a32016-02-09 14:57:42 +02005244 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005245 u8 op_mod[0x10];
5246
Matan Barakb4ff3a32016-02-09 14:57:42 +02005247 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005248 u8 rqtn[0x18];
5249
Matan Barakb4ff3a32016-02-09 14:57:42 +02005250 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005251
Achiad Shochat5c503682015-08-04 14:05:43 +03005252 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005253
Matan Barakb4ff3a32016-02-09 14:57:42 +02005254 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005255
5256 struct mlx5_ifc_rqtc_bits ctx;
5257};
5258
5259struct mlx5_ifc_modify_rq_out_bits {
5260 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005261 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005262
5263 u8 syndrome[0x20];
5264
Matan Barakb4ff3a32016-02-09 14:57:42 +02005265 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005266};
5267
Alex Vesker83b502a2016-08-04 17:32:02 +03005268enum {
5269 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005270 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005271 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005272};
5273
Saeed Mahameede2816822015-05-28 22:28:40 +03005274struct mlx5_ifc_modify_rq_in_bits {
5275 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005276 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005277
Matan Barakb4ff3a32016-02-09 14:57:42 +02005278 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005279 u8 op_mod[0x10];
5280
5281 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005282 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005283 u8 rqn[0x18];
5284
Matan Barakb4ff3a32016-02-09 14:57:42 +02005285 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005286
5287 u8 modify_bitmask[0x40];
5288
Matan Barakb4ff3a32016-02-09 14:57:42 +02005289 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005290
5291 struct mlx5_ifc_rqc_bits ctx;
5292};
5293
5294struct mlx5_ifc_modify_rmp_out_bits {
5295 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005296 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005297
5298 u8 syndrome[0x20];
5299
Matan Barakb4ff3a32016-02-09 14:57:42 +02005300 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005301};
5302
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005303struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005304 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005305
Matan Barakb4ff3a32016-02-09 14:57:42 +02005306 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005307 u8 lwm[0x1];
5308};
5309
Saeed Mahameede2816822015-05-28 22:28:40 +03005310struct mlx5_ifc_modify_rmp_in_bits {
5311 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005312 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005313
Matan Barakb4ff3a32016-02-09 14:57:42 +02005314 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005315 u8 op_mod[0x10];
5316
5317 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005318 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005319 u8 rmpn[0x18];
5320
Matan Barakb4ff3a32016-02-09 14:57:42 +02005321 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005322
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005323 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005324
Matan Barakb4ff3a32016-02-09 14:57:42 +02005325 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005326
5327 struct mlx5_ifc_rmpc_bits ctx;
5328};
5329
5330struct mlx5_ifc_modify_nic_vport_context_out_bits {
5331 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005332 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005333
5334 u8 syndrome[0x20];
5335
Matan Barakb4ff3a32016-02-09 14:57:42 +02005336 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005337};
5338
5339struct mlx5_ifc_modify_nic_vport_field_select_bits {
Huy Nguyenbded7472017-05-30 09:42:53 +03005340 u8 reserved_at_0[0x14];
5341 u8 disable_uc_local_lb[0x1];
5342 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005343 u8 node_guid[0x1];
5344 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005345 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005346 u8 mtu[0x1];
5347 u8 change_event[0x1];
5348 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005349 u8 permanent_address[0x1];
5350 u8 addresses_list[0x1];
5351 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005352 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005353};
5354
5355struct mlx5_ifc_modify_nic_vport_context_in_bits {
5356 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005357 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005358
Matan Barakb4ff3a32016-02-09 14:57:42 +02005359 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005360 u8 op_mod[0x10];
5361
5362 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005363 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005364 u8 vport_number[0x10];
5365
5366 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5367
Matan Barakb4ff3a32016-02-09 14:57:42 +02005368 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005369
5370 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5371};
5372
5373struct mlx5_ifc_modify_hca_vport_context_out_bits {
5374 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005375 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005376
5377 u8 syndrome[0x20];
5378
Matan Barakb4ff3a32016-02-09 14:57:42 +02005379 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005380};
5381
5382struct mlx5_ifc_modify_hca_vport_context_in_bits {
5383 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005384 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005385
Matan Barakb4ff3a32016-02-09 14:57:42 +02005386 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005387 u8 op_mod[0x10];
5388
5389 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005390 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005391 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005392 u8 vport_number[0x10];
5393
Matan Barakb4ff3a32016-02-09 14:57:42 +02005394 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005395
5396 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5397};
5398
5399struct mlx5_ifc_modify_cq_out_bits {
5400 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005401 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005402
5403 u8 syndrome[0x20];
5404
Matan Barakb4ff3a32016-02-09 14:57:42 +02005405 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005406};
5407
5408enum {
5409 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5410 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5411};
5412
5413struct mlx5_ifc_modify_cq_in_bits {
5414 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005415 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005416
Matan Barakb4ff3a32016-02-09 14:57:42 +02005417 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005418 u8 op_mod[0x10];
5419
Matan Barakb4ff3a32016-02-09 14:57:42 +02005420 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005421 u8 cqn[0x18];
5422
5423 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5424
5425 struct mlx5_ifc_cqc_bits cq_context;
5426
Matan Barakb4ff3a32016-02-09 14:57:42 +02005427 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005428
5429 u8 pas[0][0x40];
5430};
5431
5432struct mlx5_ifc_modify_cong_status_out_bits {
5433 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005434 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005435
5436 u8 syndrome[0x20];
5437
Matan Barakb4ff3a32016-02-09 14:57:42 +02005438 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005439};
5440
5441struct mlx5_ifc_modify_cong_status_in_bits {
5442 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005443 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005444
Matan Barakb4ff3a32016-02-09 14:57:42 +02005445 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005446 u8 op_mod[0x10];
5447
Matan Barakb4ff3a32016-02-09 14:57:42 +02005448 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005449 u8 priority[0x4];
5450 u8 cong_protocol[0x4];
5451
5452 u8 enable[0x1];
5453 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005454 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005455};
5456
5457struct mlx5_ifc_modify_cong_params_out_bits {
5458 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005459 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005460
5461 u8 syndrome[0x20];
5462
Matan Barakb4ff3a32016-02-09 14:57:42 +02005463 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005464};
5465
5466struct mlx5_ifc_modify_cong_params_in_bits {
5467 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005468 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005469
Matan Barakb4ff3a32016-02-09 14:57:42 +02005470 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005471 u8 op_mod[0x10];
5472
Matan Barakb4ff3a32016-02-09 14:57:42 +02005473 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005474 u8 cong_protocol[0x4];
5475
5476 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5477
Matan Barakb4ff3a32016-02-09 14:57:42 +02005478 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005479
5480 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5481};
5482
5483struct mlx5_ifc_manage_pages_out_bits {
5484 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005485 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005486
5487 u8 syndrome[0x20];
5488
5489 u8 output_num_entries[0x20];
5490
Matan Barakb4ff3a32016-02-09 14:57:42 +02005491 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005492
5493 u8 pas[0][0x40];
5494};
5495
5496enum {
5497 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5498 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5499 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5500};
5501
5502struct mlx5_ifc_manage_pages_in_bits {
5503 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005504 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005505
Matan Barakb4ff3a32016-02-09 14:57:42 +02005506 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005507 u8 op_mod[0x10];
5508
Matan Barakb4ff3a32016-02-09 14:57:42 +02005509 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005510 u8 function_id[0x10];
5511
5512 u8 input_num_entries[0x20];
5513
5514 u8 pas[0][0x40];
5515};
5516
5517struct mlx5_ifc_mad_ifc_out_bits {
5518 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005519 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005520
5521 u8 syndrome[0x20];
5522
Matan Barakb4ff3a32016-02-09 14:57:42 +02005523 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005524
5525 u8 response_mad_packet[256][0x8];
5526};
5527
5528struct mlx5_ifc_mad_ifc_in_bits {
5529 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005530 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005531
Matan Barakb4ff3a32016-02-09 14:57:42 +02005532 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005533 u8 op_mod[0x10];
5534
5535 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005536 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005537 u8 port[0x8];
5538
Matan Barakb4ff3a32016-02-09 14:57:42 +02005539 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005540
5541 u8 mad[256][0x8];
5542};
5543
5544struct mlx5_ifc_init_hca_out_bits {
5545 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005546 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005547
5548 u8 syndrome[0x20];
5549
Matan Barakb4ff3a32016-02-09 14:57:42 +02005550 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005551};
5552
5553struct mlx5_ifc_init_hca_in_bits {
5554 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005555 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005556
Matan Barakb4ff3a32016-02-09 14:57:42 +02005557 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005558 u8 op_mod[0x10];
5559
Matan Barakb4ff3a32016-02-09 14:57:42 +02005560 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005561};
5562
5563struct mlx5_ifc_init2rtr_qp_out_bits {
5564 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005565 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005566
5567 u8 syndrome[0x20];
5568
Matan Barakb4ff3a32016-02-09 14:57:42 +02005569 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005570};
5571
5572struct mlx5_ifc_init2rtr_qp_in_bits {
5573 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005574 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005575
Matan Barakb4ff3a32016-02-09 14:57:42 +02005576 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005577 u8 op_mod[0x10];
5578
Matan Barakb4ff3a32016-02-09 14:57:42 +02005579 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005580 u8 qpn[0x18];
5581
Matan Barakb4ff3a32016-02-09 14:57:42 +02005582 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005583
5584 u8 opt_param_mask[0x20];
5585
Matan Barakb4ff3a32016-02-09 14:57:42 +02005586 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005587
5588 struct mlx5_ifc_qpc_bits qpc;
5589
Matan Barakb4ff3a32016-02-09 14:57:42 +02005590 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005591};
5592
5593struct mlx5_ifc_init2init_qp_out_bits {
5594 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005595 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005596
5597 u8 syndrome[0x20];
5598
Matan Barakb4ff3a32016-02-09 14:57:42 +02005599 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005600};
5601
5602struct mlx5_ifc_init2init_qp_in_bits {
5603 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005604 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005605
Matan Barakb4ff3a32016-02-09 14:57:42 +02005606 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005607 u8 op_mod[0x10];
5608
Matan Barakb4ff3a32016-02-09 14:57:42 +02005609 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005610 u8 qpn[0x18];
5611
Matan Barakb4ff3a32016-02-09 14:57:42 +02005612 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005613
5614 u8 opt_param_mask[0x20];
5615
Matan Barakb4ff3a32016-02-09 14:57:42 +02005616 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005617
5618 struct mlx5_ifc_qpc_bits qpc;
5619
Matan Barakb4ff3a32016-02-09 14:57:42 +02005620 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005621};
5622
5623struct mlx5_ifc_get_dropped_packet_log_out_bits {
5624 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005625 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005626
5627 u8 syndrome[0x20];
5628
Matan Barakb4ff3a32016-02-09 14:57:42 +02005629 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005630
5631 u8 packet_headers_log[128][0x8];
5632
5633 u8 packet_syndrome[64][0x8];
5634};
5635
5636struct mlx5_ifc_get_dropped_packet_log_in_bits {
5637 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005638 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005639
Matan Barakb4ff3a32016-02-09 14:57:42 +02005640 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005641 u8 op_mod[0x10];
5642
Matan Barakb4ff3a32016-02-09 14:57:42 +02005643 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005644};
5645
5646struct mlx5_ifc_gen_eqe_in_bits {
5647 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005648 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005649
Matan Barakb4ff3a32016-02-09 14:57:42 +02005650 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005651 u8 op_mod[0x10];
5652
Matan Barakb4ff3a32016-02-09 14:57:42 +02005653 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005654 u8 eq_number[0x8];
5655
Matan Barakb4ff3a32016-02-09 14:57:42 +02005656 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005657
5658 u8 eqe[64][0x8];
5659};
5660
5661struct mlx5_ifc_gen_eq_out_bits {
5662 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005663 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005664
5665 u8 syndrome[0x20];
5666
Matan Barakb4ff3a32016-02-09 14:57:42 +02005667 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005668};
5669
5670struct mlx5_ifc_enable_hca_out_bits {
5671 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005672 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005673
5674 u8 syndrome[0x20];
5675
Matan Barakb4ff3a32016-02-09 14:57:42 +02005676 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005677};
5678
5679struct mlx5_ifc_enable_hca_in_bits {
5680 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005681 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005682
Matan Barakb4ff3a32016-02-09 14:57:42 +02005683 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005684 u8 op_mod[0x10];
5685
Matan Barakb4ff3a32016-02-09 14:57:42 +02005686 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005687 u8 function_id[0x10];
5688
Matan Barakb4ff3a32016-02-09 14:57:42 +02005689 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005690};
5691
5692struct mlx5_ifc_drain_dct_out_bits {
5693 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005694 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005695
5696 u8 syndrome[0x20];
5697
Matan Barakb4ff3a32016-02-09 14:57:42 +02005698 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005699};
5700
5701struct mlx5_ifc_drain_dct_in_bits {
5702 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005703 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005704
Matan Barakb4ff3a32016-02-09 14:57:42 +02005705 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005706 u8 op_mod[0x10];
5707
Matan Barakb4ff3a32016-02-09 14:57:42 +02005708 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005709 u8 dctn[0x18];
5710
Matan Barakb4ff3a32016-02-09 14:57:42 +02005711 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005712};
5713
5714struct mlx5_ifc_disable_hca_out_bits {
5715 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005716 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005717
5718 u8 syndrome[0x20];
5719
Matan Barakb4ff3a32016-02-09 14:57:42 +02005720 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005721};
5722
5723struct mlx5_ifc_disable_hca_in_bits {
5724 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005725 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005726
Matan Barakb4ff3a32016-02-09 14:57:42 +02005727 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005728 u8 op_mod[0x10];
5729
Matan Barakb4ff3a32016-02-09 14:57:42 +02005730 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005731 u8 function_id[0x10];
5732
Matan Barakb4ff3a32016-02-09 14:57:42 +02005733 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005734};
5735
5736struct mlx5_ifc_detach_from_mcg_out_bits {
5737 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005738 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005739
5740 u8 syndrome[0x20];
5741
Matan Barakb4ff3a32016-02-09 14:57:42 +02005742 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005743};
5744
5745struct mlx5_ifc_detach_from_mcg_in_bits {
5746 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005747 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005748
Matan Barakb4ff3a32016-02-09 14:57:42 +02005749 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005750 u8 op_mod[0x10];
5751
Matan Barakb4ff3a32016-02-09 14:57:42 +02005752 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005753 u8 qpn[0x18];
5754
Matan Barakb4ff3a32016-02-09 14:57:42 +02005755 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005756
5757 u8 multicast_gid[16][0x8];
5758};
5759
Saeed Mahameed74862162016-06-09 15:11:34 +03005760struct mlx5_ifc_destroy_xrq_out_bits {
5761 u8 status[0x8];
5762 u8 reserved_at_8[0x18];
5763
5764 u8 syndrome[0x20];
5765
5766 u8 reserved_at_40[0x40];
5767};
5768
5769struct mlx5_ifc_destroy_xrq_in_bits {
5770 u8 opcode[0x10];
5771 u8 reserved_at_10[0x10];
5772
5773 u8 reserved_at_20[0x10];
5774 u8 op_mod[0x10];
5775
5776 u8 reserved_at_40[0x8];
5777 u8 xrqn[0x18];
5778
5779 u8 reserved_at_60[0x20];
5780};
5781
Saeed Mahameede2816822015-05-28 22:28:40 +03005782struct mlx5_ifc_destroy_xrc_srq_out_bits {
5783 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005784 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005785
5786 u8 syndrome[0x20];
5787
Matan Barakb4ff3a32016-02-09 14:57:42 +02005788 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005789};
5790
5791struct mlx5_ifc_destroy_xrc_srq_in_bits {
5792 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005793 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005794
Matan Barakb4ff3a32016-02-09 14:57:42 +02005795 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005796 u8 op_mod[0x10];
5797
Matan Barakb4ff3a32016-02-09 14:57:42 +02005798 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005799 u8 xrc_srqn[0x18];
5800
Matan Barakb4ff3a32016-02-09 14:57:42 +02005801 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005802};
5803
5804struct mlx5_ifc_destroy_tis_out_bits {
5805 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005806 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005807
5808 u8 syndrome[0x20];
5809
Matan Barakb4ff3a32016-02-09 14:57:42 +02005810 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005811};
5812
5813struct mlx5_ifc_destroy_tis_in_bits {
5814 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005815 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005816
Matan Barakb4ff3a32016-02-09 14:57:42 +02005817 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005818 u8 op_mod[0x10];
5819
Matan Barakb4ff3a32016-02-09 14:57:42 +02005820 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005821 u8 tisn[0x18];
5822
Matan Barakb4ff3a32016-02-09 14:57:42 +02005823 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005824};
5825
5826struct mlx5_ifc_destroy_tir_out_bits {
5827 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005828 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005829
5830 u8 syndrome[0x20];
5831
Matan Barakb4ff3a32016-02-09 14:57:42 +02005832 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005833};
5834
5835struct mlx5_ifc_destroy_tir_in_bits {
5836 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005837 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005838
Matan Barakb4ff3a32016-02-09 14:57:42 +02005839 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005840 u8 op_mod[0x10];
5841
Matan Barakb4ff3a32016-02-09 14:57:42 +02005842 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005843 u8 tirn[0x18];
5844
Matan Barakb4ff3a32016-02-09 14:57:42 +02005845 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005846};
5847
5848struct mlx5_ifc_destroy_srq_out_bits {
5849 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005850 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005851
5852 u8 syndrome[0x20];
5853
Matan Barakb4ff3a32016-02-09 14:57:42 +02005854 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005855};
5856
5857struct mlx5_ifc_destroy_srq_in_bits {
5858 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005859 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005860
Matan Barakb4ff3a32016-02-09 14:57:42 +02005861 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005862 u8 op_mod[0x10];
5863
Matan Barakb4ff3a32016-02-09 14:57:42 +02005864 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005865 u8 srqn[0x18];
5866
Matan Barakb4ff3a32016-02-09 14:57:42 +02005867 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005868};
5869
5870struct mlx5_ifc_destroy_sq_out_bits {
5871 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005872 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005873
5874 u8 syndrome[0x20];
5875
Matan Barakb4ff3a32016-02-09 14:57:42 +02005876 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005877};
5878
5879struct mlx5_ifc_destroy_sq_in_bits {
5880 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005881 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005882
Matan Barakb4ff3a32016-02-09 14:57:42 +02005883 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005884 u8 op_mod[0x10];
5885
Matan Barakb4ff3a32016-02-09 14:57:42 +02005886 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005887 u8 sqn[0x18];
5888
Matan Barakb4ff3a32016-02-09 14:57:42 +02005889 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005890};
5891
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005892struct mlx5_ifc_destroy_scheduling_element_out_bits {
5893 u8 status[0x8];
5894 u8 reserved_at_8[0x18];
5895
5896 u8 syndrome[0x20];
5897
5898 u8 reserved_at_40[0x1c0];
5899};
5900
5901struct mlx5_ifc_destroy_scheduling_element_in_bits {
5902 u8 opcode[0x10];
5903 u8 reserved_at_10[0x10];
5904
5905 u8 reserved_at_20[0x10];
5906 u8 op_mod[0x10];
5907
5908 u8 scheduling_hierarchy[0x8];
5909 u8 reserved_at_48[0x18];
5910
5911 u8 scheduling_element_id[0x20];
5912
5913 u8 reserved_at_80[0x180];
5914};
5915
Saeed Mahameede2816822015-05-28 22:28:40 +03005916struct mlx5_ifc_destroy_rqt_out_bits {
5917 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005918 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005919
5920 u8 syndrome[0x20];
5921
Matan Barakb4ff3a32016-02-09 14:57:42 +02005922 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005923};
5924
5925struct mlx5_ifc_destroy_rqt_in_bits {
5926 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005927 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005928
Matan Barakb4ff3a32016-02-09 14:57:42 +02005929 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005930 u8 op_mod[0x10];
5931
Matan Barakb4ff3a32016-02-09 14:57:42 +02005932 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005933 u8 rqtn[0x18];
5934
Matan Barakb4ff3a32016-02-09 14:57:42 +02005935 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005936};
5937
5938struct mlx5_ifc_destroy_rq_out_bits {
5939 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005940 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005941
5942 u8 syndrome[0x20];
5943
Matan Barakb4ff3a32016-02-09 14:57:42 +02005944 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005945};
5946
5947struct mlx5_ifc_destroy_rq_in_bits {
5948 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005949 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005950
Matan Barakb4ff3a32016-02-09 14:57:42 +02005951 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005952 u8 op_mod[0x10];
5953
Matan Barakb4ff3a32016-02-09 14:57:42 +02005954 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005955 u8 rqn[0x18];
5956
Matan Barakb4ff3a32016-02-09 14:57:42 +02005957 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005958};
5959
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03005960struct mlx5_ifc_set_delay_drop_params_in_bits {
5961 u8 opcode[0x10];
5962 u8 reserved_at_10[0x10];
5963
5964 u8 reserved_at_20[0x10];
5965 u8 op_mod[0x10];
5966
5967 u8 reserved_at_40[0x20];
5968
5969 u8 reserved_at_60[0x10];
5970 u8 delay_drop_timeout[0x10];
5971};
5972
5973struct mlx5_ifc_set_delay_drop_params_out_bits {
5974 u8 status[0x8];
5975 u8 reserved_at_8[0x18];
5976
5977 u8 syndrome[0x20];
5978
5979 u8 reserved_at_40[0x40];
5980};
5981
Saeed Mahameede2816822015-05-28 22:28:40 +03005982struct mlx5_ifc_destroy_rmp_out_bits {
5983 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005984 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005985
5986 u8 syndrome[0x20];
5987
Matan Barakb4ff3a32016-02-09 14:57:42 +02005988 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005989};
5990
5991struct mlx5_ifc_destroy_rmp_in_bits {
5992 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005993 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005994
Matan Barakb4ff3a32016-02-09 14:57:42 +02005995 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005996 u8 op_mod[0x10];
5997
Matan Barakb4ff3a32016-02-09 14:57:42 +02005998 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005999 u8 rmpn[0x18];
6000
Matan Barakb4ff3a32016-02-09 14:57:42 +02006001 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006002};
6003
6004struct mlx5_ifc_destroy_qp_out_bits {
6005 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006006 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006007
6008 u8 syndrome[0x20];
6009
Matan Barakb4ff3a32016-02-09 14:57:42 +02006010 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006011};
6012
6013struct mlx5_ifc_destroy_qp_in_bits {
6014 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006015 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006016
Matan Barakb4ff3a32016-02-09 14:57:42 +02006017 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006018 u8 op_mod[0x10];
6019
Matan Barakb4ff3a32016-02-09 14:57:42 +02006020 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006021 u8 qpn[0x18];
6022
Matan Barakb4ff3a32016-02-09 14:57:42 +02006023 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006024};
6025
6026struct mlx5_ifc_destroy_psv_out_bits {
6027 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006028 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006029
6030 u8 syndrome[0x20];
6031
Matan Barakb4ff3a32016-02-09 14:57:42 +02006032 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006033};
6034
6035struct mlx5_ifc_destroy_psv_in_bits {
6036 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006037 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006038
Matan Barakb4ff3a32016-02-09 14:57:42 +02006039 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006040 u8 op_mod[0x10];
6041
Matan Barakb4ff3a32016-02-09 14:57:42 +02006042 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006043 u8 psvn[0x18];
6044
Matan Barakb4ff3a32016-02-09 14:57:42 +02006045 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006046};
6047
6048struct mlx5_ifc_destroy_mkey_out_bits {
6049 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006050 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006051
6052 u8 syndrome[0x20];
6053
Matan Barakb4ff3a32016-02-09 14:57:42 +02006054 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006055};
6056
6057struct mlx5_ifc_destroy_mkey_in_bits {
6058 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006059 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006060
Matan Barakb4ff3a32016-02-09 14:57:42 +02006061 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006062 u8 op_mod[0x10];
6063
Matan Barakb4ff3a32016-02-09 14:57:42 +02006064 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006065 u8 mkey_index[0x18];
6066
Matan Barakb4ff3a32016-02-09 14:57:42 +02006067 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006068};
6069
6070struct mlx5_ifc_destroy_flow_table_out_bits {
6071 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006072 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006073
6074 u8 syndrome[0x20];
6075
Matan Barakb4ff3a32016-02-09 14:57:42 +02006076 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006077};
6078
6079struct mlx5_ifc_destroy_flow_table_in_bits {
6080 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006081 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006082
Matan Barakb4ff3a32016-02-09 14:57:42 +02006083 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006084 u8 op_mod[0x10];
6085
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006086 u8 other_vport[0x1];
6087 u8 reserved_at_41[0xf];
6088 u8 vport_number[0x10];
6089
6090 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006091
6092 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006093 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006094
Matan Barakb4ff3a32016-02-09 14:57:42 +02006095 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006096 u8 table_id[0x18];
6097
Matan Barakb4ff3a32016-02-09 14:57:42 +02006098 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006099};
6100
6101struct mlx5_ifc_destroy_flow_group_out_bits {
6102 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006103 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006104
6105 u8 syndrome[0x20];
6106
Matan Barakb4ff3a32016-02-09 14:57:42 +02006107 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006108};
6109
6110struct mlx5_ifc_destroy_flow_group_in_bits {
6111 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006112 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006113
Matan Barakb4ff3a32016-02-09 14:57:42 +02006114 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006115 u8 op_mod[0x10];
6116
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006117 u8 other_vport[0x1];
6118 u8 reserved_at_41[0xf];
6119 u8 vport_number[0x10];
6120
6121 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006122
6123 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006124 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006125
Matan Barakb4ff3a32016-02-09 14:57:42 +02006126 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006127 u8 table_id[0x18];
6128
6129 u8 group_id[0x20];
6130
Matan Barakb4ff3a32016-02-09 14:57:42 +02006131 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006132};
6133
6134struct mlx5_ifc_destroy_eq_out_bits {
6135 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006136 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006137
6138 u8 syndrome[0x20];
6139
Matan Barakb4ff3a32016-02-09 14:57:42 +02006140 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006141};
6142
6143struct mlx5_ifc_destroy_eq_in_bits {
6144 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006145 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006146
Matan Barakb4ff3a32016-02-09 14:57:42 +02006147 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006148 u8 op_mod[0x10];
6149
Matan Barakb4ff3a32016-02-09 14:57:42 +02006150 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006151 u8 eq_number[0x8];
6152
Matan Barakb4ff3a32016-02-09 14:57:42 +02006153 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006154};
6155
6156struct mlx5_ifc_destroy_dct_out_bits {
6157 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006158 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006159
6160 u8 syndrome[0x20];
6161
Matan Barakb4ff3a32016-02-09 14:57:42 +02006162 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006163};
6164
6165struct mlx5_ifc_destroy_dct_in_bits {
6166 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006167 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006168
Matan Barakb4ff3a32016-02-09 14:57:42 +02006169 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006170 u8 op_mod[0x10];
6171
Matan Barakb4ff3a32016-02-09 14:57:42 +02006172 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006173 u8 dctn[0x18];
6174
Matan Barakb4ff3a32016-02-09 14:57:42 +02006175 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006176};
6177
6178struct mlx5_ifc_destroy_cq_out_bits {
6179 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006180 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006181
6182 u8 syndrome[0x20];
6183
Matan Barakb4ff3a32016-02-09 14:57:42 +02006184 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006185};
6186
6187struct mlx5_ifc_destroy_cq_in_bits {
6188 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006189 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006190
Matan Barakb4ff3a32016-02-09 14:57:42 +02006191 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006192 u8 op_mod[0x10];
6193
Matan Barakb4ff3a32016-02-09 14:57:42 +02006194 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006195 u8 cqn[0x18];
6196
Matan Barakb4ff3a32016-02-09 14:57:42 +02006197 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006198};
6199
6200struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6201 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006202 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006203
6204 u8 syndrome[0x20];
6205
Matan Barakb4ff3a32016-02-09 14:57:42 +02006206 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006207};
6208
6209struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6210 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006211 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006212
Matan Barakb4ff3a32016-02-09 14:57:42 +02006213 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006214 u8 op_mod[0x10];
6215
Matan Barakb4ff3a32016-02-09 14:57:42 +02006216 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006217
Matan Barakb4ff3a32016-02-09 14:57:42 +02006218 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006219 u8 vxlan_udp_port[0x10];
6220};
6221
6222struct mlx5_ifc_delete_l2_table_entry_out_bits {
6223 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006224 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006225
6226 u8 syndrome[0x20];
6227
Matan Barakb4ff3a32016-02-09 14:57:42 +02006228 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006229};
6230
6231struct mlx5_ifc_delete_l2_table_entry_in_bits {
6232 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006233 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006234
Matan Barakb4ff3a32016-02-09 14:57:42 +02006235 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006236 u8 op_mod[0x10];
6237
Matan Barakb4ff3a32016-02-09 14:57:42 +02006238 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006239
Matan Barakb4ff3a32016-02-09 14:57:42 +02006240 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006241 u8 table_index[0x18];
6242
Matan Barakb4ff3a32016-02-09 14:57:42 +02006243 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006244};
6245
6246struct mlx5_ifc_delete_fte_out_bits {
6247 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006248 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006249
6250 u8 syndrome[0x20];
6251
Matan Barakb4ff3a32016-02-09 14:57:42 +02006252 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006253};
6254
6255struct mlx5_ifc_delete_fte_in_bits {
6256 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006257 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006258
Matan Barakb4ff3a32016-02-09 14:57:42 +02006259 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006260 u8 op_mod[0x10];
6261
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006262 u8 other_vport[0x1];
6263 u8 reserved_at_41[0xf];
6264 u8 vport_number[0x10];
6265
6266 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006267
6268 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006269 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006270
Matan Barakb4ff3a32016-02-09 14:57:42 +02006271 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006272 u8 table_id[0x18];
6273
Matan Barakb4ff3a32016-02-09 14:57:42 +02006274 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006275
6276 u8 flow_index[0x20];
6277
Matan Barakb4ff3a32016-02-09 14:57:42 +02006278 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006279};
6280
6281struct mlx5_ifc_dealloc_xrcd_out_bits {
6282 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006283 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006284
6285 u8 syndrome[0x20];
6286
Matan Barakb4ff3a32016-02-09 14:57:42 +02006287 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006288};
6289
6290struct mlx5_ifc_dealloc_xrcd_in_bits {
6291 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006292 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006293
Matan Barakb4ff3a32016-02-09 14:57:42 +02006294 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006295 u8 op_mod[0x10];
6296
Matan Barakb4ff3a32016-02-09 14:57:42 +02006297 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006298 u8 xrcd[0x18];
6299
Matan Barakb4ff3a32016-02-09 14:57:42 +02006300 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006301};
6302
6303struct mlx5_ifc_dealloc_uar_out_bits {
6304 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006305 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006306
6307 u8 syndrome[0x20];
6308
Matan Barakb4ff3a32016-02-09 14:57:42 +02006309 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006310};
6311
6312struct mlx5_ifc_dealloc_uar_in_bits {
6313 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006314 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006315
Matan Barakb4ff3a32016-02-09 14:57:42 +02006316 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006317 u8 op_mod[0x10];
6318
Matan Barakb4ff3a32016-02-09 14:57:42 +02006319 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006320 u8 uar[0x18];
6321
Matan Barakb4ff3a32016-02-09 14:57:42 +02006322 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006323};
6324
6325struct mlx5_ifc_dealloc_transport_domain_out_bits {
6326 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006327 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006328
6329 u8 syndrome[0x20];
6330
Matan Barakb4ff3a32016-02-09 14:57:42 +02006331 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006332};
6333
6334struct mlx5_ifc_dealloc_transport_domain_in_bits {
6335 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006336 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006337
Matan Barakb4ff3a32016-02-09 14:57:42 +02006338 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006339 u8 op_mod[0x10];
6340
Matan Barakb4ff3a32016-02-09 14:57:42 +02006341 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006342 u8 transport_domain[0x18];
6343
Matan Barakb4ff3a32016-02-09 14:57:42 +02006344 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006345};
6346
6347struct mlx5_ifc_dealloc_q_counter_out_bits {
6348 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006349 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006350
6351 u8 syndrome[0x20];
6352
Matan Barakb4ff3a32016-02-09 14:57:42 +02006353 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006354};
6355
6356struct mlx5_ifc_dealloc_q_counter_in_bits {
6357 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006358 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006359
Matan Barakb4ff3a32016-02-09 14:57:42 +02006360 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006361 u8 op_mod[0x10];
6362
Matan Barakb4ff3a32016-02-09 14:57:42 +02006363 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006364 u8 counter_set_id[0x8];
6365
Matan Barakb4ff3a32016-02-09 14:57:42 +02006366 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006367};
6368
6369struct mlx5_ifc_dealloc_pd_out_bits {
6370 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006371 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006372
6373 u8 syndrome[0x20];
6374
Matan Barakb4ff3a32016-02-09 14:57:42 +02006375 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006376};
6377
6378struct mlx5_ifc_dealloc_pd_in_bits {
6379 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006380 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006381
Matan Barakb4ff3a32016-02-09 14:57:42 +02006382 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006383 u8 op_mod[0x10];
6384
Matan Barakb4ff3a32016-02-09 14:57:42 +02006385 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006386 u8 pd[0x18];
6387
Matan Barakb4ff3a32016-02-09 14:57:42 +02006388 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006389};
6390
Amir Vadai9dc0b282016-05-13 12:55:39 +00006391struct mlx5_ifc_dealloc_flow_counter_out_bits {
6392 u8 status[0x8];
6393 u8 reserved_at_8[0x18];
6394
6395 u8 syndrome[0x20];
6396
6397 u8 reserved_at_40[0x40];
6398};
6399
6400struct mlx5_ifc_dealloc_flow_counter_in_bits {
6401 u8 opcode[0x10];
6402 u8 reserved_at_10[0x10];
6403
6404 u8 reserved_at_20[0x10];
6405 u8 op_mod[0x10];
6406
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006407 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006408
6409 u8 reserved_at_60[0x20];
6410};
6411
Saeed Mahameed74862162016-06-09 15:11:34 +03006412struct mlx5_ifc_create_xrq_out_bits {
6413 u8 status[0x8];
6414 u8 reserved_at_8[0x18];
6415
6416 u8 syndrome[0x20];
6417
6418 u8 reserved_at_40[0x8];
6419 u8 xrqn[0x18];
6420
6421 u8 reserved_at_60[0x20];
6422};
6423
6424struct mlx5_ifc_create_xrq_in_bits {
6425 u8 opcode[0x10];
6426 u8 reserved_at_10[0x10];
6427
6428 u8 reserved_at_20[0x10];
6429 u8 op_mod[0x10];
6430
6431 u8 reserved_at_40[0x40];
6432
6433 struct mlx5_ifc_xrqc_bits xrq_context;
6434};
6435
Saeed Mahameede2816822015-05-28 22:28:40 +03006436struct mlx5_ifc_create_xrc_srq_out_bits {
6437 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006438 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006439
6440 u8 syndrome[0x20];
6441
Matan Barakb4ff3a32016-02-09 14:57:42 +02006442 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006443 u8 xrc_srqn[0x18];
6444
Matan Barakb4ff3a32016-02-09 14:57:42 +02006445 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006446};
6447
6448struct mlx5_ifc_create_xrc_srq_in_bits {
6449 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006450 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006451
Matan Barakb4ff3a32016-02-09 14:57:42 +02006452 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006453 u8 op_mod[0x10];
6454
Matan Barakb4ff3a32016-02-09 14:57:42 +02006455 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006456
6457 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6458
Matan Barakb4ff3a32016-02-09 14:57:42 +02006459 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006460
6461 u8 pas[0][0x40];
6462};
6463
6464struct mlx5_ifc_create_tis_out_bits {
6465 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006466 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006467
6468 u8 syndrome[0x20];
6469
Matan Barakb4ff3a32016-02-09 14:57:42 +02006470 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006471 u8 tisn[0x18];
6472
Matan Barakb4ff3a32016-02-09 14:57:42 +02006473 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006474};
6475
6476struct mlx5_ifc_create_tis_in_bits {
6477 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006478 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006479
Matan Barakb4ff3a32016-02-09 14:57:42 +02006480 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006481 u8 op_mod[0x10];
6482
Matan Barakb4ff3a32016-02-09 14:57:42 +02006483 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006484
6485 struct mlx5_ifc_tisc_bits ctx;
6486};
6487
6488struct mlx5_ifc_create_tir_out_bits {
6489 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006490 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006491
6492 u8 syndrome[0x20];
6493
Matan Barakb4ff3a32016-02-09 14:57:42 +02006494 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006495 u8 tirn[0x18];
6496
Matan Barakb4ff3a32016-02-09 14:57:42 +02006497 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006498};
6499
6500struct mlx5_ifc_create_tir_in_bits {
6501 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006502 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006503
Matan Barakb4ff3a32016-02-09 14:57:42 +02006504 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006505 u8 op_mod[0x10];
6506
Matan Barakb4ff3a32016-02-09 14:57:42 +02006507 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006508
6509 struct mlx5_ifc_tirc_bits ctx;
6510};
6511
6512struct mlx5_ifc_create_srq_out_bits {
6513 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006514 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006515
6516 u8 syndrome[0x20];
6517
Matan Barakb4ff3a32016-02-09 14:57:42 +02006518 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006519 u8 srqn[0x18];
6520
Matan Barakb4ff3a32016-02-09 14:57:42 +02006521 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006522};
6523
6524struct mlx5_ifc_create_srq_in_bits {
6525 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006526 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006527
Matan Barakb4ff3a32016-02-09 14:57:42 +02006528 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006529 u8 op_mod[0x10];
6530
Matan Barakb4ff3a32016-02-09 14:57:42 +02006531 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006532
6533 struct mlx5_ifc_srqc_bits srq_context_entry;
6534
Matan Barakb4ff3a32016-02-09 14:57:42 +02006535 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006536
6537 u8 pas[0][0x40];
6538};
6539
6540struct mlx5_ifc_create_sq_out_bits {
6541 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006542 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006543
6544 u8 syndrome[0x20];
6545
Matan Barakb4ff3a32016-02-09 14:57:42 +02006546 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006547 u8 sqn[0x18];
6548
Matan Barakb4ff3a32016-02-09 14:57:42 +02006549 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006550};
6551
6552struct mlx5_ifc_create_sq_in_bits {
6553 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006554 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006555
Matan Barakb4ff3a32016-02-09 14:57:42 +02006556 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006557 u8 op_mod[0x10];
6558
Matan Barakb4ff3a32016-02-09 14:57:42 +02006559 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006560
6561 struct mlx5_ifc_sqc_bits ctx;
6562};
6563
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006564struct mlx5_ifc_create_scheduling_element_out_bits {
6565 u8 status[0x8];
6566 u8 reserved_at_8[0x18];
6567
6568 u8 syndrome[0x20];
6569
6570 u8 reserved_at_40[0x40];
6571
6572 u8 scheduling_element_id[0x20];
6573
6574 u8 reserved_at_a0[0x160];
6575};
6576
6577struct mlx5_ifc_create_scheduling_element_in_bits {
6578 u8 opcode[0x10];
6579 u8 reserved_at_10[0x10];
6580
6581 u8 reserved_at_20[0x10];
6582 u8 op_mod[0x10];
6583
6584 u8 scheduling_hierarchy[0x8];
6585 u8 reserved_at_48[0x18];
6586
6587 u8 reserved_at_60[0xa0];
6588
6589 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6590
6591 u8 reserved_at_300[0x100];
6592};
6593
Saeed Mahameede2816822015-05-28 22:28:40 +03006594struct mlx5_ifc_create_rqt_out_bits {
6595 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006596 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006597
6598 u8 syndrome[0x20];
6599
Matan Barakb4ff3a32016-02-09 14:57:42 +02006600 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006601 u8 rqtn[0x18];
6602
Matan Barakb4ff3a32016-02-09 14:57:42 +02006603 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006604};
6605
6606struct mlx5_ifc_create_rqt_in_bits {
6607 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006608 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006609
Matan Barakb4ff3a32016-02-09 14:57:42 +02006610 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006611 u8 op_mod[0x10];
6612
Matan Barakb4ff3a32016-02-09 14:57:42 +02006613 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006614
6615 struct mlx5_ifc_rqtc_bits rqt_context;
6616};
6617
6618struct mlx5_ifc_create_rq_out_bits {
6619 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006620 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006621
6622 u8 syndrome[0x20];
6623
Matan Barakb4ff3a32016-02-09 14:57:42 +02006624 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006625 u8 rqn[0x18];
6626
Matan Barakb4ff3a32016-02-09 14:57:42 +02006627 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006628};
6629
6630struct mlx5_ifc_create_rq_in_bits {
6631 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006632 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006633
Matan Barakb4ff3a32016-02-09 14:57:42 +02006634 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006635 u8 op_mod[0x10];
6636
Matan Barakb4ff3a32016-02-09 14:57:42 +02006637 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006638
6639 struct mlx5_ifc_rqc_bits ctx;
6640};
6641
6642struct mlx5_ifc_create_rmp_out_bits {
6643 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006644 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006645
6646 u8 syndrome[0x20];
6647
Matan Barakb4ff3a32016-02-09 14:57:42 +02006648 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006649 u8 rmpn[0x18];
6650
Matan Barakb4ff3a32016-02-09 14:57:42 +02006651 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006652};
6653
6654struct mlx5_ifc_create_rmp_in_bits {
6655 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006656 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006657
Matan Barakb4ff3a32016-02-09 14:57:42 +02006658 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006659 u8 op_mod[0x10];
6660
Matan Barakb4ff3a32016-02-09 14:57:42 +02006661 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006662
6663 struct mlx5_ifc_rmpc_bits ctx;
6664};
6665
6666struct mlx5_ifc_create_qp_out_bits {
6667 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006668 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006669
6670 u8 syndrome[0x20];
6671
Matan Barakb4ff3a32016-02-09 14:57:42 +02006672 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006673 u8 qpn[0x18];
6674
Matan Barakb4ff3a32016-02-09 14:57:42 +02006675 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006676};
6677
6678struct mlx5_ifc_create_qp_in_bits {
6679 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006680 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006681
Matan Barakb4ff3a32016-02-09 14:57:42 +02006682 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006683 u8 op_mod[0x10];
6684
Matan Barakb4ff3a32016-02-09 14:57:42 +02006685 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006686
6687 u8 opt_param_mask[0x20];
6688
Matan Barakb4ff3a32016-02-09 14:57:42 +02006689 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006690
6691 struct mlx5_ifc_qpc_bits qpc;
6692
Matan Barakb4ff3a32016-02-09 14:57:42 +02006693 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006694
6695 u8 pas[0][0x40];
6696};
6697
6698struct mlx5_ifc_create_psv_out_bits {
6699 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006700 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006701
6702 u8 syndrome[0x20];
6703
Matan Barakb4ff3a32016-02-09 14:57:42 +02006704 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006705
Matan Barakb4ff3a32016-02-09 14:57:42 +02006706 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006707 u8 psv0_index[0x18];
6708
Matan Barakb4ff3a32016-02-09 14:57:42 +02006709 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006710 u8 psv1_index[0x18];
6711
Matan Barakb4ff3a32016-02-09 14:57:42 +02006712 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006713 u8 psv2_index[0x18];
6714
Matan Barakb4ff3a32016-02-09 14:57:42 +02006715 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006716 u8 psv3_index[0x18];
6717};
6718
6719struct mlx5_ifc_create_psv_in_bits {
6720 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006721 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006722
Matan Barakb4ff3a32016-02-09 14:57:42 +02006723 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006724 u8 op_mod[0x10];
6725
6726 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006727 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006728 u8 pd[0x18];
6729
Matan Barakb4ff3a32016-02-09 14:57:42 +02006730 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006731};
6732
6733struct mlx5_ifc_create_mkey_out_bits {
6734 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006735 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006736
6737 u8 syndrome[0x20];
6738
Matan Barakb4ff3a32016-02-09 14:57:42 +02006739 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006740 u8 mkey_index[0x18];
6741
Matan Barakb4ff3a32016-02-09 14:57:42 +02006742 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006743};
6744
6745struct mlx5_ifc_create_mkey_in_bits {
6746 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006747 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006748
Matan Barakb4ff3a32016-02-09 14:57:42 +02006749 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006750 u8 op_mod[0x10];
6751
Matan Barakb4ff3a32016-02-09 14:57:42 +02006752 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006753
6754 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006755 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006756
6757 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6758
Matan Barakb4ff3a32016-02-09 14:57:42 +02006759 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006760
6761 u8 translations_octword_actual_size[0x20];
6762
Matan Barakb4ff3a32016-02-09 14:57:42 +02006763 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006764
6765 u8 klm_pas_mtt[0][0x20];
6766};
6767
6768struct mlx5_ifc_create_flow_table_out_bits {
6769 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006770 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006771
6772 u8 syndrome[0x20];
6773
Matan Barakb4ff3a32016-02-09 14:57:42 +02006774 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006775 u8 table_id[0x18];
6776
Matan Barakb4ff3a32016-02-09 14:57:42 +02006777 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006778};
6779
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006780struct mlx5_ifc_flow_table_context_bits {
6781 u8 encap_en[0x1];
6782 u8 decap_en[0x1];
6783 u8 reserved_at_2[0x2];
6784 u8 table_miss_action[0x4];
6785 u8 level[0x8];
6786 u8 reserved_at_10[0x8];
6787 u8 log_size[0x8];
6788
6789 u8 reserved_at_20[0x8];
6790 u8 table_miss_id[0x18];
6791
6792 u8 reserved_at_40[0x8];
6793 u8 lag_master_next_table_id[0x18];
6794
6795 u8 reserved_at_60[0xe0];
6796};
6797
Saeed Mahameede2816822015-05-28 22:28:40 +03006798struct mlx5_ifc_create_flow_table_in_bits {
6799 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006800 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006801
Matan Barakb4ff3a32016-02-09 14:57:42 +02006802 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006803 u8 op_mod[0x10];
6804
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006805 u8 other_vport[0x1];
6806 u8 reserved_at_41[0xf];
6807 u8 vport_number[0x10];
6808
6809 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006810
6811 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006812 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006813
Matan Barakb4ff3a32016-02-09 14:57:42 +02006814 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006815
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006816 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006817};
6818
6819struct mlx5_ifc_create_flow_group_out_bits {
6820 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006821 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006822
6823 u8 syndrome[0x20];
6824
Matan Barakb4ff3a32016-02-09 14:57:42 +02006825 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006826 u8 group_id[0x18];
6827
Matan Barakb4ff3a32016-02-09 14:57:42 +02006828 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006829};
6830
6831enum {
6832 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6833 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6834 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6835};
6836
6837struct mlx5_ifc_create_flow_group_in_bits {
6838 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006839 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006840
Matan Barakb4ff3a32016-02-09 14:57:42 +02006841 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006842 u8 op_mod[0x10];
6843
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006844 u8 other_vport[0x1];
6845 u8 reserved_at_41[0xf];
6846 u8 vport_number[0x10];
6847
6848 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006849
6850 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006851 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006852
Matan Barakb4ff3a32016-02-09 14:57:42 +02006853 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006854 u8 table_id[0x18];
6855
Matan Barakb4ff3a32016-02-09 14:57:42 +02006856 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006857
6858 u8 start_flow_index[0x20];
6859
Matan Barakb4ff3a32016-02-09 14:57:42 +02006860 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006861
6862 u8 end_flow_index[0x20];
6863
Matan Barakb4ff3a32016-02-09 14:57:42 +02006864 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006865
Matan Barakb4ff3a32016-02-09 14:57:42 +02006866 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006867 u8 match_criteria_enable[0x8];
6868
6869 struct mlx5_ifc_fte_match_param_bits match_criteria;
6870
Matan Barakb4ff3a32016-02-09 14:57:42 +02006871 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006872};
6873
6874struct mlx5_ifc_create_eq_out_bits {
6875 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006876 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006877
6878 u8 syndrome[0x20];
6879
Matan Barakb4ff3a32016-02-09 14:57:42 +02006880 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006881 u8 eq_number[0x8];
6882
Matan Barakb4ff3a32016-02-09 14:57:42 +02006883 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006884};
6885
6886struct mlx5_ifc_create_eq_in_bits {
6887 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006888 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006889
Matan Barakb4ff3a32016-02-09 14:57:42 +02006890 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006891 u8 op_mod[0x10];
6892
Matan Barakb4ff3a32016-02-09 14:57:42 +02006893 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006894
6895 struct mlx5_ifc_eqc_bits eq_context_entry;
6896
Matan Barakb4ff3a32016-02-09 14:57:42 +02006897 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006898
6899 u8 event_bitmask[0x40];
6900
Matan Barakb4ff3a32016-02-09 14:57:42 +02006901 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006902
6903 u8 pas[0][0x40];
6904};
6905
6906struct mlx5_ifc_create_dct_out_bits {
6907 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006908 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006909
6910 u8 syndrome[0x20];
6911
Matan Barakb4ff3a32016-02-09 14:57:42 +02006912 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006913 u8 dctn[0x18];
6914
Matan Barakb4ff3a32016-02-09 14:57:42 +02006915 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006916};
6917
6918struct mlx5_ifc_create_dct_in_bits {
6919 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006920 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006921
Matan Barakb4ff3a32016-02-09 14:57:42 +02006922 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006923 u8 op_mod[0x10];
6924
Matan Barakb4ff3a32016-02-09 14:57:42 +02006925 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006926
6927 struct mlx5_ifc_dctc_bits dct_context_entry;
6928
Matan Barakb4ff3a32016-02-09 14:57:42 +02006929 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006930};
6931
6932struct mlx5_ifc_create_cq_out_bits {
6933 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006934 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006935
6936 u8 syndrome[0x20];
6937
Matan Barakb4ff3a32016-02-09 14:57:42 +02006938 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006939 u8 cqn[0x18];
6940
Matan Barakb4ff3a32016-02-09 14:57:42 +02006941 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006942};
6943
6944struct mlx5_ifc_create_cq_in_bits {
6945 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006946 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006947
Matan Barakb4ff3a32016-02-09 14:57:42 +02006948 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006949 u8 op_mod[0x10];
6950
Matan Barakb4ff3a32016-02-09 14:57:42 +02006951 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006952
6953 struct mlx5_ifc_cqc_bits cq_context;
6954
Matan Barakb4ff3a32016-02-09 14:57:42 +02006955 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006956
6957 u8 pas[0][0x40];
6958};
6959
6960struct mlx5_ifc_config_int_moderation_out_bits {
6961 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006962 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006963
6964 u8 syndrome[0x20];
6965
Matan Barakb4ff3a32016-02-09 14:57:42 +02006966 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006967 u8 min_delay[0xc];
6968 u8 int_vector[0x10];
6969
Matan Barakb4ff3a32016-02-09 14:57:42 +02006970 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006971};
6972
6973enum {
6974 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6975 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6976};
6977
6978struct mlx5_ifc_config_int_moderation_in_bits {
6979 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006980 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006981
Matan Barakb4ff3a32016-02-09 14:57:42 +02006982 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006983 u8 op_mod[0x10];
6984
Matan Barakb4ff3a32016-02-09 14:57:42 +02006985 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006986 u8 min_delay[0xc];
6987 u8 int_vector[0x10];
6988
Matan Barakb4ff3a32016-02-09 14:57:42 +02006989 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006990};
6991
6992struct mlx5_ifc_attach_to_mcg_out_bits {
6993 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006994 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006995
6996 u8 syndrome[0x20];
6997
Matan Barakb4ff3a32016-02-09 14:57:42 +02006998 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006999};
7000
7001struct mlx5_ifc_attach_to_mcg_in_bits {
7002 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007003 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007004
Matan Barakb4ff3a32016-02-09 14:57:42 +02007005 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007006 u8 op_mod[0x10];
7007
Matan Barakb4ff3a32016-02-09 14:57:42 +02007008 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007009 u8 qpn[0x18];
7010
Matan Barakb4ff3a32016-02-09 14:57:42 +02007011 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007012
7013 u8 multicast_gid[16][0x8];
7014};
7015
Saeed Mahameed74862162016-06-09 15:11:34 +03007016struct mlx5_ifc_arm_xrq_out_bits {
7017 u8 status[0x8];
7018 u8 reserved_at_8[0x18];
7019
7020 u8 syndrome[0x20];
7021
7022 u8 reserved_at_40[0x40];
7023};
7024
7025struct mlx5_ifc_arm_xrq_in_bits {
7026 u8 opcode[0x10];
7027 u8 reserved_at_10[0x10];
7028
7029 u8 reserved_at_20[0x10];
7030 u8 op_mod[0x10];
7031
7032 u8 reserved_at_40[0x8];
7033 u8 xrqn[0x18];
7034
7035 u8 reserved_at_60[0x10];
7036 u8 lwm[0x10];
7037};
7038
Saeed Mahameede2816822015-05-28 22:28:40 +03007039struct mlx5_ifc_arm_xrc_srq_out_bits {
7040 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007041 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007042
7043 u8 syndrome[0x20];
7044
Matan Barakb4ff3a32016-02-09 14:57:42 +02007045 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007046};
7047
7048enum {
7049 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7050};
7051
7052struct mlx5_ifc_arm_xrc_srq_in_bits {
7053 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007054 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007055
Matan Barakb4ff3a32016-02-09 14:57:42 +02007056 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007057 u8 op_mod[0x10];
7058
Matan Barakb4ff3a32016-02-09 14:57:42 +02007059 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007060 u8 xrc_srqn[0x18];
7061
Matan Barakb4ff3a32016-02-09 14:57:42 +02007062 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007063 u8 lwm[0x10];
7064};
7065
7066struct mlx5_ifc_arm_rq_out_bits {
7067 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007068 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007069
7070 u8 syndrome[0x20];
7071
Matan Barakb4ff3a32016-02-09 14:57:42 +02007072 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007073};
7074
7075enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007076 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7077 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007078};
7079
7080struct mlx5_ifc_arm_rq_in_bits {
7081 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007082 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007083
Matan Barakb4ff3a32016-02-09 14:57:42 +02007084 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007085 u8 op_mod[0x10];
7086
Matan Barakb4ff3a32016-02-09 14:57:42 +02007087 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007088 u8 srq_number[0x18];
7089
Matan Barakb4ff3a32016-02-09 14:57:42 +02007090 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007091 u8 lwm[0x10];
7092};
7093
7094struct mlx5_ifc_arm_dct_out_bits {
7095 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007096 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007097
7098 u8 syndrome[0x20];
7099
Matan Barakb4ff3a32016-02-09 14:57:42 +02007100 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007101};
7102
7103struct mlx5_ifc_arm_dct_in_bits {
7104 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007105 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007106
Matan Barakb4ff3a32016-02-09 14:57:42 +02007107 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007108 u8 op_mod[0x10];
7109
Matan Barakb4ff3a32016-02-09 14:57:42 +02007110 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007111 u8 dct_number[0x18];
7112
Matan Barakb4ff3a32016-02-09 14:57:42 +02007113 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007114};
7115
7116struct mlx5_ifc_alloc_xrcd_out_bits {
7117 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007118 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007119
7120 u8 syndrome[0x20];
7121
Matan Barakb4ff3a32016-02-09 14:57:42 +02007122 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007123 u8 xrcd[0x18];
7124
Matan Barakb4ff3a32016-02-09 14:57:42 +02007125 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007126};
7127
7128struct mlx5_ifc_alloc_xrcd_in_bits {
7129 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007130 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007131
Matan Barakb4ff3a32016-02-09 14:57:42 +02007132 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007133 u8 op_mod[0x10];
7134
Matan Barakb4ff3a32016-02-09 14:57:42 +02007135 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007136};
7137
7138struct mlx5_ifc_alloc_uar_out_bits {
7139 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007140 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007141
7142 u8 syndrome[0x20];
7143
Matan Barakb4ff3a32016-02-09 14:57:42 +02007144 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007145 u8 uar[0x18];
7146
Matan Barakb4ff3a32016-02-09 14:57:42 +02007147 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007148};
7149
7150struct mlx5_ifc_alloc_uar_in_bits {
7151 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007152 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007153
Matan Barakb4ff3a32016-02-09 14:57:42 +02007154 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007155 u8 op_mod[0x10];
7156
Matan Barakb4ff3a32016-02-09 14:57:42 +02007157 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007158};
7159
7160struct mlx5_ifc_alloc_transport_domain_out_bits {
7161 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007162 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007163
7164 u8 syndrome[0x20];
7165
Matan Barakb4ff3a32016-02-09 14:57:42 +02007166 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007167 u8 transport_domain[0x18];
7168
Matan Barakb4ff3a32016-02-09 14:57:42 +02007169 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007170};
7171
7172struct mlx5_ifc_alloc_transport_domain_in_bits {
7173 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007174 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007175
Matan Barakb4ff3a32016-02-09 14:57:42 +02007176 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007177 u8 op_mod[0x10];
7178
Matan Barakb4ff3a32016-02-09 14:57:42 +02007179 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007180};
7181
7182struct mlx5_ifc_alloc_q_counter_out_bits {
7183 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007184 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007185
7186 u8 syndrome[0x20];
7187
Matan Barakb4ff3a32016-02-09 14:57:42 +02007188 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007189 u8 counter_set_id[0x8];
7190
Matan Barakb4ff3a32016-02-09 14:57:42 +02007191 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007192};
7193
7194struct mlx5_ifc_alloc_q_counter_in_bits {
7195 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007196 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007197
Matan Barakb4ff3a32016-02-09 14:57:42 +02007198 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007199 u8 op_mod[0x10];
7200
Matan Barakb4ff3a32016-02-09 14:57:42 +02007201 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007202};
7203
7204struct mlx5_ifc_alloc_pd_out_bits {
7205 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007206 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007207
7208 u8 syndrome[0x20];
7209
Matan Barakb4ff3a32016-02-09 14:57:42 +02007210 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007211 u8 pd[0x18];
7212
Matan Barakb4ff3a32016-02-09 14:57:42 +02007213 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007214};
7215
7216struct mlx5_ifc_alloc_pd_in_bits {
7217 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007218 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007219
Matan Barakb4ff3a32016-02-09 14:57:42 +02007220 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007221 u8 op_mod[0x10];
7222
Matan Barakb4ff3a32016-02-09 14:57:42 +02007223 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007224};
7225
Amir Vadai9dc0b282016-05-13 12:55:39 +00007226struct mlx5_ifc_alloc_flow_counter_out_bits {
7227 u8 status[0x8];
7228 u8 reserved_at_8[0x18];
7229
7230 u8 syndrome[0x20];
7231
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007232 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007233
7234 u8 reserved_at_60[0x20];
7235};
7236
7237struct mlx5_ifc_alloc_flow_counter_in_bits {
7238 u8 opcode[0x10];
7239 u8 reserved_at_10[0x10];
7240
7241 u8 reserved_at_20[0x10];
7242 u8 op_mod[0x10];
7243
7244 u8 reserved_at_40[0x40];
7245};
7246
Saeed Mahameede2816822015-05-28 22:28:40 +03007247struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7248 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007249 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007250
7251 u8 syndrome[0x20];
7252
Matan Barakb4ff3a32016-02-09 14:57:42 +02007253 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007254};
7255
7256struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7257 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007258 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007259
Matan Barakb4ff3a32016-02-09 14:57:42 +02007260 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007261 u8 op_mod[0x10];
7262
Matan Barakb4ff3a32016-02-09 14:57:42 +02007263 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007264
Matan Barakb4ff3a32016-02-09 14:57:42 +02007265 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007266 u8 vxlan_udp_port[0x10];
7267};
7268
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007269struct mlx5_ifc_set_pp_rate_limit_out_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007270 u8 status[0x8];
7271 u8 reserved_at_8[0x18];
7272
7273 u8 syndrome[0x20];
7274
7275 u8 reserved_at_40[0x40];
7276};
7277
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007278struct mlx5_ifc_set_pp_rate_limit_in_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007279 u8 opcode[0x10];
7280 u8 reserved_at_10[0x10];
7281
7282 u8 reserved_at_20[0x10];
7283 u8 op_mod[0x10];
7284
7285 u8 reserved_at_40[0x10];
7286 u8 rate_limit_index[0x10];
7287
7288 u8 reserved_at_60[0x20];
7289
7290 u8 rate_limit[0x20];
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007291
7292 u8 reserved_at_a0[0x160];
Saeed Mahameed74862162016-06-09 15:11:34 +03007293};
7294
Saeed Mahameede2816822015-05-28 22:28:40 +03007295struct mlx5_ifc_access_register_out_bits {
7296 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007297 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007298
7299 u8 syndrome[0x20];
7300
Matan Barakb4ff3a32016-02-09 14:57:42 +02007301 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007302
7303 u8 register_data[0][0x20];
7304};
7305
7306enum {
7307 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7308 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7309};
7310
7311struct mlx5_ifc_access_register_in_bits {
7312 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007313 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007314
Matan Barakb4ff3a32016-02-09 14:57:42 +02007315 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007316 u8 op_mod[0x10];
7317
Matan Barakb4ff3a32016-02-09 14:57:42 +02007318 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007319 u8 register_id[0x10];
7320
7321 u8 argument[0x20];
7322
7323 u8 register_data[0][0x20];
7324};
7325
7326struct mlx5_ifc_sltp_reg_bits {
7327 u8 status[0x4];
7328 u8 version[0x4];
7329 u8 local_port[0x8];
7330 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007331 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007332 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007333 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007334
Matan Barakb4ff3a32016-02-09 14:57:42 +02007335 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007336
Matan Barakb4ff3a32016-02-09 14:57:42 +02007337 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007338 u8 polarity[0x1];
7339 u8 ob_tap0[0x8];
7340 u8 ob_tap1[0x8];
7341 u8 ob_tap2[0x8];
7342
Matan Barakb4ff3a32016-02-09 14:57:42 +02007343 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007344 u8 ob_preemp_mode[0x4];
7345 u8 ob_reg[0x8];
7346 u8 ob_bias[0x8];
7347
Matan Barakb4ff3a32016-02-09 14:57:42 +02007348 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007349};
7350
7351struct mlx5_ifc_slrg_reg_bits {
7352 u8 status[0x4];
7353 u8 version[0x4];
7354 u8 local_port[0x8];
7355 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007356 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007357 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007358 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007359
7360 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007361 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007362 u8 grade_lane_speed[0x4];
7363
7364 u8 grade_version[0x8];
7365 u8 grade[0x18];
7366
Matan Barakb4ff3a32016-02-09 14:57:42 +02007367 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007368 u8 height_grade_type[0x4];
7369 u8 height_grade[0x18];
7370
7371 u8 height_dz[0x10];
7372 u8 height_dv[0x10];
7373
Matan Barakb4ff3a32016-02-09 14:57:42 +02007374 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007375 u8 height_sigma[0x10];
7376
Matan Barakb4ff3a32016-02-09 14:57:42 +02007377 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007378
Matan Barakb4ff3a32016-02-09 14:57:42 +02007379 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007380 u8 phase_grade_type[0x4];
7381 u8 phase_grade[0x18];
7382
Matan Barakb4ff3a32016-02-09 14:57:42 +02007383 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007384 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007385 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007386 u8 phase_eo_neg[0x8];
7387
7388 u8 ffe_set_tested[0x10];
7389 u8 test_errors_per_lane[0x10];
7390};
7391
7392struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007393 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007394 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007395 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007396
Matan Barakb4ff3a32016-02-09 14:57:42 +02007397 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007398 u8 vl_hw_cap[0x4];
7399
Matan Barakb4ff3a32016-02-09 14:57:42 +02007400 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007401 u8 vl_admin[0x4];
7402
Matan Barakb4ff3a32016-02-09 14:57:42 +02007403 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007404 u8 vl_operational[0x4];
7405};
7406
7407struct mlx5_ifc_pude_reg_bits {
7408 u8 swid[0x8];
7409 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007410 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007411 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007412 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007413 u8 oper_status[0x4];
7414
Matan Barakb4ff3a32016-02-09 14:57:42 +02007415 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007416};
7417
7418struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007419 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007420 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007421 u8 an_disable_cap[0x1];
7422 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007423 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007424 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007425 u8 proto_mask[0x3];
7426
Saeed Mahameed74862162016-06-09 15:11:34 +03007427 u8 an_status[0x4];
7428 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007429
7430 u8 eth_proto_capability[0x20];
7431
7432 u8 ib_link_width_capability[0x10];
7433 u8 ib_proto_capability[0x10];
7434
Matan Barakb4ff3a32016-02-09 14:57:42 +02007435 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007436
7437 u8 eth_proto_admin[0x20];
7438
7439 u8 ib_link_width_admin[0x10];
7440 u8 ib_proto_admin[0x10];
7441
Matan Barakb4ff3a32016-02-09 14:57:42 +02007442 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007443
7444 u8 eth_proto_oper[0x20];
7445
7446 u8 ib_link_width_oper[0x10];
7447 u8 ib_proto_oper[0x10];
7448
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007449 u8 reserved_at_160[0x1c];
7450 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007451
7452 u8 eth_proto_lp_advertise[0x20];
7453
Matan Barakb4ff3a32016-02-09 14:57:42 +02007454 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007455};
7456
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007457struct mlx5_ifc_mlcr_reg_bits {
7458 u8 reserved_at_0[0x8];
7459 u8 local_port[0x8];
7460 u8 reserved_at_10[0x20];
7461
7462 u8 beacon_duration[0x10];
7463 u8 reserved_at_40[0x10];
7464
7465 u8 beacon_remain[0x10];
7466};
7467
Saeed Mahameede2816822015-05-28 22:28:40 +03007468struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007469 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007470
7471 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007472 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007473 u8 repetitions_mode[0x4];
7474 u8 num_of_repetitions[0x8];
7475
7476 u8 grade_version[0x8];
7477 u8 height_grade_type[0x4];
7478 u8 phase_grade_type[0x4];
7479 u8 height_grade_weight[0x8];
7480 u8 phase_grade_weight[0x8];
7481
7482 u8 gisim_measure_bits[0x10];
7483 u8 adaptive_tap_measure_bits[0x10];
7484
7485 u8 ber_bath_high_error_threshold[0x10];
7486 u8 ber_bath_mid_error_threshold[0x10];
7487
7488 u8 ber_bath_low_error_threshold[0x10];
7489 u8 one_ratio_high_threshold[0x10];
7490
7491 u8 one_ratio_high_mid_threshold[0x10];
7492 u8 one_ratio_low_mid_threshold[0x10];
7493
7494 u8 one_ratio_low_threshold[0x10];
7495 u8 ndeo_error_threshold[0x10];
7496
7497 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007498 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007499 u8 mix90_phase_for_voltage_bath[0x8];
7500
7501 u8 mixer_offset_start[0x10];
7502 u8 mixer_offset_end[0x10];
7503
Matan Barakb4ff3a32016-02-09 14:57:42 +02007504 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007505 u8 ber_test_time[0xb];
7506};
7507
7508struct mlx5_ifc_pspa_reg_bits {
7509 u8 swid[0x8];
7510 u8 local_port[0x8];
7511 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007512 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007513
Matan Barakb4ff3a32016-02-09 14:57:42 +02007514 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007515};
7516
7517struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007518 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007519 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007520 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007521 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007522 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007523 u8 mode[0x2];
7524
Matan Barakb4ff3a32016-02-09 14:57:42 +02007525 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007526
Matan Barakb4ff3a32016-02-09 14:57:42 +02007527 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007528 u8 min_threshold[0x10];
7529
Matan Barakb4ff3a32016-02-09 14:57:42 +02007530 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007531 u8 max_threshold[0x10];
7532
Matan Barakb4ff3a32016-02-09 14:57:42 +02007533 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007534 u8 mark_probability_denominator[0x10];
7535
Matan Barakb4ff3a32016-02-09 14:57:42 +02007536 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007537};
7538
7539struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007540 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007541 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007542 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007543
Matan Barakb4ff3a32016-02-09 14:57:42 +02007544 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007545
Matan Barakb4ff3a32016-02-09 14:57:42 +02007546 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007547 u8 wrps_admin[0x4];
7548
Matan Barakb4ff3a32016-02-09 14:57:42 +02007549 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007550 u8 wrps_status[0x4];
7551
Matan Barakb4ff3a32016-02-09 14:57:42 +02007552 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007553 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007554 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007555 u8 down_threshold[0x8];
7556
Matan Barakb4ff3a32016-02-09 14:57:42 +02007557 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007558
Matan Barakb4ff3a32016-02-09 14:57:42 +02007559 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007560 u8 srps_admin[0x4];
7561
Matan Barakb4ff3a32016-02-09 14:57:42 +02007562 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007563 u8 srps_status[0x4];
7564
Matan Barakb4ff3a32016-02-09 14:57:42 +02007565 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007566};
7567
7568struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007569 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007570 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007571 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007572
Matan Barakb4ff3a32016-02-09 14:57:42 +02007573 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007574 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007575 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007576 u8 lb_en[0x8];
7577};
7578
7579struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007580 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007581 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007582 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007583
Matan Barakb4ff3a32016-02-09 14:57:42 +02007584 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007585
7586 u8 port_profile_mode[0x8];
7587 u8 static_port_profile[0x8];
7588 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007589 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007590
7591 u8 retransmission_active[0x8];
7592 u8 fec_mode_active[0x18];
7593
Matan Barakb4ff3a32016-02-09 14:57:42 +02007594 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007595};
7596
7597struct mlx5_ifc_ppcnt_reg_bits {
7598 u8 swid[0x8];
7599 u8 local_port[0x8];
7600 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007601 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007602 u8 grp[0x6];
7603
7604 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007605 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007606 u8 prio_tc[0x3];
7607
7608 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7609};
7610
Gal Pressman8ed1a632016-11-17 13:46:01 +02007611struct mlx5_ifc_mpcnt_reg_bits {
7612 u8 reserved_at_0[0x8];
7613 u8 pcie_index[0x8];
7614 u8 reserved_at_10[0xa];
7615 u8 grp[0x6];
7616
7617 u8 clr[0x1];
7618 u8 reserved_at_21[0x1f];
7619
7620 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7621};
7622
Saeed Mahameede2816822015-05-28 22:28:40 +03007623struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007624 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007625 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007626 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007627 u8 local_port[0x8];
7628 u8 mac_47_32[0x10];
7629
7630 u8 mac_31_0[0x20];
7631
Matan Barakb4ff3a32016-02-09 14:57:42 +02007632 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007633};
7634
7635struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007636 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007637 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007638 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007639
7640 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007641 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007642
7643 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007644 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007645
7646 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007647 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007648};
7649
7650struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007651 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007652 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007653 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007654
Matan Barakb4ff3a32016-02-09 14:57:42 +02007655 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007656 u8 attenuation_5g[0x8];
7657
Matan Barakb4ff3a32016-02-09 14:57:42 +02007658 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007659 u8 attenuation_7g[0x8];
7660
Matan Barakb4ff3a32016-02-09 14:57:42 +02007661 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007662 u8 attenuation_12g[0x8];
7663};
7664
7665struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007666 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007667 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007668 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007669 u8 module_status[0x4];
7670
Matan Barakb4ff3a32016-02-09 14:57:42 +02007671 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007672};
7673
7674struct mlx5_ifc_pmpc_reg_bits {
7675 u8 module_state_updated[32][0x8];
7676};
7677
7678struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007679 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007680 u8 mlpn_status[0x4];
7681 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007682 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007683
7684 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007685 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007686};
7687
7688struct mlx5_ifc_pmlp_reg_bits {
7689 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007690 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007691 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007692 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007693 u8 width[0x8];
7694
7695 u8 lane0_module_mapping[0x20];
7696
7697 u8 lane1_module_mapping[0x20];
7698
7699 u8 lane2_module_mapping[0x20];
7700
7701 u8 lane3_module_mapping[0x20];
7702
Matan Barakb4ff3a32016-02-09 14:57:42 +02007703 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007704};
7705
7706struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007707 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007708 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007709 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007710 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007711 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007712 u8 oper_status[0x4];
7713
7714 u8 ase[0x1];
7715 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007716 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007717 u8 e[0x2];
7718
Matan Barakb4ff3a32016-02-09 14:57:42 +02007719 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007720};
7721
7722struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007723 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007724 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007725 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007726 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007727 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007728
Matan Barakb4ff3a32016-02-09 14:57:42 +02007729 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007730 u8 lane_speed[0x10];
7731
Matan Barakb4ff3a32016-02-09 14:57:42 +02007732 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007733 u8 lpbf[0x1];
7734 u8 fec_mode_policy[0x8];
7735
7736 u8 retransmission_capability[0x8];
7737 u8 fec_mode_capability[0x18];
7738
7739 u8 retransmission_support_admin[0x8];
7740 u8 fec_mode_support_admin[0x18];
7741
7742 u8 retransmission_request_admin[0x8];
7743 u8 fec_mode_request_admin[0x18];
7744
Matan Barakb4ff3a32016-02-09 14:57:42 +02007745 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007746};
7747
7748struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007749 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007750 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007751 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007752 u8 ib_port[0x8];
7753
Matan Barakb4ff3a32016-02-09 14:57:42 +02007754 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007755};
7756
7757struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007758 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007759 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007760 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007761 u8 lbf_mode[0x3];
7762
Matan Barakb4ff3a32016-02-09 14:57:42 +02007763 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007764};
7765
7766struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007767 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007768 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007769 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007770
7771 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007772 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007773 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007774 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007775};
7776
7777struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007778 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007779 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007780 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007781
Matan Barakb4ff3a32016-02-09 14:57:42 +02007782 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007783
7784 u8 port_filter[8][0x20];
7785
7786 u8 port_filter_update_en[8][0x20];
7787};
7788
7789struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007790 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007791 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007792 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007793
7794 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007795 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007796 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007797 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007798 u8 prio_mask_rx[0x8];
7799
7800 u8 pptx[0x1];
7801 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007802 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007803 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007804 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007805
7806 u8 pprx[0x1];
7807 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007808 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007809 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007810 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007811
Matan Barakb4ff3a32016-02-09 14:57:42 +02007812 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007813};
7814
7815struct mlx5_ifc_pelc_reg_bits {
7816 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007817 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007818 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007819 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007820
7821 u8 op_admin[0x8];
7822 u8 op_capability[0x8];
7823 u8 op_request[0x8];
7824 u8 op_active[0x8];
7825
7826 u8 admin[0x40];
7827
7828 u8 capability[0x40];
7829
7830 u8 request[0x40];
7831
7832 u8 active[0x40];
7833
Matan Barakb4ff3a32016-02-09 14:57:42 +02007834 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007835};
7836
7837struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007838 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007839 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007840 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007841
Matan Barakb4ff3a32016-02-09 14:57:42 +02007842 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007843 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007844 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007845
Matan Barakb4ff3a32016-02-09 14:57:42 +02007846 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007847 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007848 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007849 u8 error_type[0x8];
7850};
7851
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007852struct mlx5_ifc_pcam_enhanced_features_bits {
Gal Pressman2dba0792017-06-18 14:56:45 +03007853 u8 reserved_at_0[0x7b];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007854
Gal Pressman2dba0792017-06-18 14:56:45 +03007855 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007856 u8 ptys_connector_type[0x1];
7857 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007858 u8 ppcnt_discard_group[0x1];
7859 u8 ppcnt_statistical_group[0x1];
7860};
7861
7862struct mlx5_ifc_pcam_reg_bits {
7863 u8 reserved_at_0[0x8];
7864 u8 feature_group[0x8];
7865 u8 reserved_at_10[0x8];
7866 u8 access_reg_group[0x8];
7867
7868 u8 reserved_at_20[0x20];
7869
7870 union {
7871 u8 reserved_at_0[0x80];
7872 } port_access_reg_cap_mask;
7873
7874 u8 reserved_at_c0[0x80];
7875
7876 union {
7877 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7878 u8 reserved_at_0[0x80];
7879 } feature_cap_mask;
7880
7881 u8 reserved_at_1c0[0xc0];
7882};
7883
7884struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03007885 u8 reserved_at_0[0x7b];
7886 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03007887 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007888 u8 mtpps_enh_out_per_adj[0x1];
7889 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007890 u8 pcie_performance_group[0x1];
7891};
7892
Or Gerlitz0ab87742017-06-11 15:25:38 +03007893struct mlx5_ifc_mcam_access_reg_bits {
7894 u8 reserved_at_0[0x1c];
7895 u8 mcda[0x1];
7896 u8 mcc[0x1];
7897 u8 mcqi[0x1];
7898 u8 reserved_at_1f[0x1];
7899
7900 u8 regs_95_to_64[0x20];
7901 u8 regs_63_to_32[0x20];
7902 u8 regs_31_to_0[0x20];
7903};
7904
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007905struct mlx5_ifc_mcam_reg_bits {
7906 u8 reserved_at_0[0x8];
7907 u8 feature_group[0x8];
7908 u8 reserved_at_10[0x8];
7909 u8 access_reg_group[0x8];
7910
7911 u8 reserved_at_20[0x20];
7912
7913 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007914 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007915 u8 reserved_at_0[0x80];
7916 } mng_access_reg_cap_mask;
7917
7918 u8 reserved_at_c0[0x80];
7919
7920 union {
7921 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7922 u8 reserved_at_0[0x80];
7923 } mng_feature_cap_mask;
7924
7925 u8 reserved_at_1c0[0x80];
7926};
7927
Huy Nguyenc02762e2017-07-18 16:03:17 -05007928struct mlx5_ifc_qcam_access_reg_cap_mask {
7929 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
7930 u8 qpdpm[0x1];
7931 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
7932 u8 qdpm[0x1];
7933 u8 qpts[0x1];
7934 u8 qcap[0x1];
7935 u8 qcam_access_reg_cap_mask_0[0x1];
7936};
7937
7938struct mlx5_ifc_qcam_qos_feature_cap_mask {
7939 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
7940 u8 qpts_trust_both[0x1];
7941};
7942
7943struct mlx5_ifc_qcam_reg_bits {
7944 u8 reserved_at_0[0x8];
7945 u8 feature_group[0x8];
7946 u8 reserved_at_10[0x8];
7947 u8 access_reg_group[0x8];
7948 u8 reserved_at_20[0x20];
7949
7950 union {
7951 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
7952 u8 reserved_at_0[0x80];
7953 } qos_access_reg_cap_mask;
7954
7955 u8 reserved_at_c0[0x80];
7956
7957 union {
7958 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
7959 u8 reserved_at_0[0x80];
7960 } qos_feature_cap_mask;
7961
7962 u8 reserved_at_1c0[0x80];
7963};
7964
Saeed Mahameede2816822015-05-28 22:28:40 +03007965struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007966 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007967 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007968 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007969
7970 u8 port_capability_mask[4][0x20];
7971};
7972
7973struct mlx5_ifc_paos_reg_bits {
7974 u8 swid[0x8];
7975 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007976 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007977 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007978 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007979 u8 oper_status[0x4];
7980
7981 u8 ase[0x1];
7982 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007983 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007984 u8 e[0x2];
7985
Matan Barakb4ff3a32016-02-09 14:57:42 +02007986 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007987};
7988
7989struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007990 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007991 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007992 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007993 u8 opamp_group_type[0x4];
7994
7995 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007996 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007997 u8 num_of_indices[0xc];
7998
7999 u8 index_data[18][0x10];
8000};
8001
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008002struct mlx5_ifc_pcmr_reg_bits {
8003 u8 reserved_at_0[0x8];
8004 u8 local_port[0x8];
8005 u8 reserved_at_10[0x2e];
8006 u8 fcs_cap[0x1];
8007 u8 reserved_at_3f[0x1f];
8008 u8 fcs_chk[0x1];
8009 u8 reserved_at_5f[0x1];
8010};
8011
Saeed Mahameede2816822015-05-28 22:28:40 +03008012struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008013 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008014 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008015 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008016 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008017 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008018 u8 module[0x8];
8019};
8020
8021struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008022 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008023 u8 lossy[0x1];
8024 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008025 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008026 u8 size[0xc];
8027
8028 u8 xoff_threshold[0x10];
8029 u8 xon_threshold[0x10];
8030};
8031
8032struct mlx5_ifc_set_node_in_bits {
8033 u8 node_description[64][0x8];
8034};
8035
8036struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008037 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008038 u8 power_settings_level[0x8];
8039
Matan Barakb4ff3a32016-02-09 14:57:42 +02008040 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008041};
8042
8043struct mlx5_ifc_register_host_endianness_bits {
8044 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008045 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008046
Matan Barakb4ff3a32016-02-09 14:57:42 +02008047 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008048};
8049
8050struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008051 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008052
8053 u8 mkey[0x20];
8054
8055 u8 addressh_63_32[0x20];
8056
8057 u8 addressl_31_0[0x20];
8058};
8059
8060struct mlx5_ifc_ud_adrs_vector_bits {
8061 u8 dc_key[0x40];
8062
8063 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008064 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008065 u8 destination_qp_dct[0x18];
8066
8067 u8 static_rate[0x4];
8068 u8 sl_eth_prio[0x4];
8069 u8 fl[0x1];
8070 u8 mlid[0x7];
8071 u8 rlid_udp_sport[0x10];
8072
Matan Barakb4ff3a32016-02-09 14:57:42 +02008073 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008074
8075 u8 rmac_47_16[0x20];
8076
8077 u8 rmac_15_0[0x10];
8078 u8 tclass[0x8];
8079 u8 hop_limit[0x8];
8080
Matan Barakb4ff3a32016-02-09 14:57:42 +02008081 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008082 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008083 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008084 u8 src_addr_index[0x8];
8085 u8 flow_label[0x14];
8086
8087 u8 rgid_rip[16][0x8];
8088};
8089
8090struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008091 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008092 u8 function_id[0x10];
8093
8094 u8 num_pages[0x20];
8095
Matan Barakb4ff3a32016-02-09 14:57:42 +02008096 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008097};
8098
8099struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008100 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008101 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008102 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008103 u8 event_sub_type[0x8];
8104
Matan Barakb4ff3a32016-02-09 14:57:42 +02008105 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008106
8107 union mlx5_ifc_event_auto_bits event_data;
8108
Matan Barakb4ff3a32016-02-09 14:57:42 +02008109 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008110 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008111 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008112 u8 owner[0x1];
8113};
8114
8115enum {
8116 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8117};
8118
8119struct mlx5_ifc_cmd_queue_entry_bits {
8120 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008121 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008122
8123 u8 input_length[0x20];
8124
8125 u8 input_mailbox_pointer_63_32[0x20];
8126
8127 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008128 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008129
8130 u8 command_input_inline_data[16][0x8];
8131
8132 u8 command_output_inline_data[16][0x8];
8133
8134 u8 output_mailbox_pointer_63_32[0x20];
8135
8136 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008137 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008138
8139 u8 output_length[0x20];
8140
8141 u8 token[0x8];
8142 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008143 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008144 u8 status[0x7];
8145 u8 ownership[0x1];
8146};
8147
8148struct mlx5_ifc_cmd_out_bits {
8149 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008150 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008151
8152 u8 syndrome[0x20];
8153
8154 u8 command_output[0x20];
8155};
8156
8157struct mlx5_ifc_cmd_in_bits {
8158 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008159 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008160
Matan Barakb4ff3a32016-02-09 14:57:42 +02008161 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008162 u8 op_mod[0x10];
8163
8164 u8 command[0][0x20];
8165};
8166
8167struct mlx5_ifc_cmd_if_box_bits {
8168 u8 mailbox_data[512][0x8];
8169
Matan Barakb4ff3a32016-02-09 14:57:42 +02008170 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008171
8172 u8 next_pointer_63_32[0x20];
8173
8174 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008175 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008176
8177 u8 block_number[0x20];
8178
Matan Barakb4ff3a32016-02-09 14:57:42 +02008179 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008180 u8 token[0x8];
8181 u8 ctrl_signature[0x8];
8182 u8 signature[0x8];
8183};
8184
8185struct mlx5_ifc_mtt_bits {
8186 u8 ptag_63_32[0x20];
8187
8188 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008189 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008190 u8 wr_en[0x1];
8191 u8 rd_en[0x1];
8192};
8193
Tariq Toukan928cfe82016-02-22 18:17:29 +02008194struct mlx5_ifc_query_wol_rol_out_bits {
8195 u8 status[0x8];
8196 u8 reserved_at_8[0x18];
8197
8198 u8 syndrome[0x20];
8199
8200 u8 reserved_at_40[0x10];
8201 u8 rol_mode[0x8];
8202 u8 wol_mode[0x8];
8203
8204 u8 reserved_at_60[0x20];
8205};
8206
8207struct mlx5_ifc_query_wol_rol_in_bits {
8208 u8 opcode[0x10];
8209 u8 reserved_at_10[0x10];
8210
8211 u8 reserved_at_20[0x10];
8212 u8 op_mod[0x10];
8213
8214 u8 reserved_at_40[0x40];
8215};
8216
8217struct mlx5_ifc_set_wol_rol_out_bits {
8218 u8 status[0x8];
8219 u8 reserved_at_8[0x18];
8220
8221 u8 syndrome[0x20];
8222
8223 u8 reserved_at_40[0x40];
8224};
8225
8226struct mlx5_ifc_set_wol_rol_in_bits {
8227 u8 opcode[0x10];
8228 u8 reserved_at_10[0x10];
8229
8230 u8 reserved_at_20[0x10];
8231 u8 op_mod[0x10];
8232
8233 u8 rol_mode_valid[0x1];
8234 u8 wol_mode_valid[0x1];
8235 u8 reserved_at_42[0xe];
8236 u8 rol_mode[0x8];
8237 u8 wol_mode[0x8];
8238
8239 u8 reserved_at_60[0x20];
8240};
8241
Saeed Mahameede2816822015-05-28 22:28:40 +03008242enum {
8243 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8244 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8245 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8246};
8247
8248enum {
8249 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8250 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8251 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8252};
8253
8254enum {
8255 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8256 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8257 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8258 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8259 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8260 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8261 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8262 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8263 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8264 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8265 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8266};
8267
8268struct mlx5_ifc_initial_seg_bits {
8269 u8 fw_rev_minor[0x10];
8270 u8 fw_rev_major[0x10];
8271
8272 u8 cmd_interface_rev[0x10];
8273 u8 fw_rev_subminor[0x10];
8274
Matan Barakb4ff3a32016-02-09 14:57:42 +02008275 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008276
8277 u8 cmdq_phy_addr_63_32[0x20];
8278
8279 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008280 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008281 u8 nic_interface[0x2];
8282 u8 log_cmdq_size[0x4];
8283 u8 log_cmdq_stride[0x4];
8284
8285 u8 command_doorbell_vector[0x20];
8286
Matan Barakb4ff3a32016-02-09 14:57:42 +02008287 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008288
8289 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008290 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008291 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008292 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008293
8294 struct mlx5_ifc_health_buffer_bits health_buffer;
8295
8296 u8 no_dram_nic_offset[0x20];
8297
Matan Barakb4ff3a32016-02-09 14:57:42 +02008298 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008299
Matan Barakb4ff3a32016-02-09 14:57:42 +02008300 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008301 u8 clear_int[0x1];
8302
8303 u8 health_syndrome[0x8];
8304 u8 health_counter[0x18];
8305
Matan Barakb4ff3a32016-02-09 14:57:42 +02008306 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008307};
8308
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008309struct mlx5_ifc_mtpps_reg_bits {
8310 u8 reserved_at_0[0xc];
8311 u8 cap_number_of_pps_pins[0x4];
8312 u8 reserved_at_10[0x4];
8313 u8 cap_max_num_of_pps_in_pins[0x4];
8314 u8 reserved_at_18[0x4];
8315 u8 cap_max_num_of_pps_out_pins[0x4];
8316
8317 u8 reserved_at_20[0x24];
8318 u8 cap_pin_3_mode[0x4];
8319 u8 reserved_at_48[0x4];
8320 u8 cap_pin_2_mode[0x4];
8321 u8 reserved_at_50[0x4];
8322 u8 cap_pin_1_mode[0x4];
8323 u8 reserved_at_58[0x4];
8324 u8 cap_pin_0_mode[0x4];
8325
8326 u8 reserved_at_60[0x4];
8327 u8 cap_pin_7_mode[0x4];
8328 u8 reserved_at_68[0x4];
8329 u8 cap_pin_6_mode[0x4];
8330 u8 reserved_at_70[0x4];
8331 u8 cap_pin_5_mode[0x4];
8332 u8 reserved_at_78[0x4];
8333 u8 cap_pin_4_mode[0x4];
8334
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008335 u8 field_select[0x20];
8336 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008337
8338 u8 enable[0x1];
8339 u8 reserved_at_101[0xb];
8340 u8 pattern[0x4];
8341 u8 reserved_at_110[0x4];
8342 u8 pin_mode[0x4];
8343 u8 pin[0x8];
8344
8345 u8 reserved_at_120[0x20];
8346
8347 u8 time_stamp[0x40];
8348
8349 u8 out_pulse_duration[0x10];
8350 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008351 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008352
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008353 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008354};
8355
8356struct mlx5_ifc_mtppse_reg_bits {
8357 u8 reserved_at_0[0x18];
8358 u8 pin[0x8];
8359 u8 event_arm[0x1];
8360 u8 reserved_at_21[0x1b];
8361 u8 event_generation_mode[0x4];
8362 u8 reserved_at_40[0x40];
8363};
8364
Or Gerlitz47176282017-04-18 13:35:39 +03008365struct mlx5_ifc_mcqi_cap_bits {
8366 u8 supported_info_bitmask[0x20];
8367
8368 u8 component_size[0x20];
8369
8370 u8 max_component_size[0x20];
8371
8372 u8 log_mcda_word_size[0x4];
8373 u8 reserved_at_64[0xc];
8374 u8 mcda_max_write_size[0x10];
8375
8376 u8 rd_en[0x1];
8377 u8 reserved_at_81[0x1];
8378 u8 match_chip_id[0x1];
8379 u8 match_psid[0x1];
8380 u8 check_user_timestamp[0x1];
8381 u8 match_base_guid_mac[0x1];
8382 u8 reserved_at_86[0x1a];
8383};
8384
8385struct mlx5_ifc_mcqi_reg_bits {
8386 u8 read_pending_component[0x1];
8387 u8 reserved_at_1[0xf];
8388 u8 component_index[0x10];
8389
8390 u8 reserved_at_20[0x20];
8391
8392 u8 reserved_at_40[0x1b];
8393 u8 info_type[0x5];
8394
8395 u8 info_size[0x20];
8396
8397 u8 offset[0x20];
8398
8399 u8 reserved_at_a0[0x10];
8400 u8 data_size[0x10];
8401
8402 u8 data[0][0x20];
8403};
8404
8405struct mlx5_ifc_mcc_reg_bits {
8406 u8 reserved_at_0[0x4];
8407 u8 time_elapsed_since_last_cmd[0xc];
8408 u8 reserved_at_10[0x8];
8409 u8 instruction[0x8];
8410
8411 u8 reserved_at_20[0x10];
8412 u8 component_index[0x10];
8413
8414 u8 reserved_at_40[0x8];
8415 u8 update_handle[0x18];
8416
8417 u8 handle_owner_type[0x4];
8418 u8 handle_owner_host_id[0x4];
8419 u8 reserved_at_68[0x1];
8420 u8 control_progress[0x7];
8421 u8 error_code[0x8];
8422 u8 reserved_at_78[0x4];
8423 u8 control_state[0x4];
8424
8425 u8 component_size[0x20];
8426
8427 u8 reserved_at_a0[0x60];
8428};
8429
8430struct mlx5_ifc_mcda_reg_bits {
8431 u8 reserved_at_0[0x8];
8432 u8 update_handle[0x18];
8433
8434 u8 offset[0x20];
8435
8436 u8 reserved_at_40[0x10];
8437 u8 size[0x10];
8438
8439 u8 reserved_at_60[0x20];
8440
8441 u8 data[0][0x20];
8442};
8443
Saeed Mahameede2816822015-05-28 22:28:40 +03008444union mlx5_ifc_ports_control_registers_document_bits {
8445 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8446 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8447 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8448 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8449 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8450 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8451 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8452 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8453 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8454 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8455 struct mlx5_ifc_paos_reg_bits paos_reg;
8456 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8457 struct mlx5_ifc_peir_reg_bits peir_reg;
8458 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8459 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008460 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008461 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8462 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8463 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8464 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8465 struct mlx5_ifc_plib_reg_bits plib_reg;
8466 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8467 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8468 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8469 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8470 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8471 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8472 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8473 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8474 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8475 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008476 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008477 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8478 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8479 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8480 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8481 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8482 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8483 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008484 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008485 struct mlx5_ifc_pude_reg_bits pude_reg;
8486 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8487 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8488 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008489 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8490 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008491 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008492 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8493 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008494 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8495 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8496 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008497 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008498};
8499
8500union mlx5_ifc_debug_enhancements_document_bits {
8501 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008502 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008503};
8504
8505union mlx5_ifc_uplink_pci_interface_document_bits {
8506 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008507 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008508};
8509
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008510struct mlx5_ifc_set_flow_table_root_out_bits {
8511 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008512 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008513
8514 u8 syndrome[0x20];
8515
Matan Barakb4ff3a32016-02-09 14:57:42 +02008516 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008517};
8518
8519struct mlx5_ifc_set_flow_table_root_in_bits {
8520 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008521 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008522
Matan Barakb4ff3a32016-02-09 14:57:42 +02008523 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008524 u8 op_mod[0x10];
8525
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008526 u8 other_vport[0x1];
8527 u8 reserved_at_41[0xf];
8528 u8 vport_number[0x10];
8529
8530 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008531
8532 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008533 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008534
Matan Barakb4ff3a32016-02-09 14:57:42 +02008535 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008536 u8 table_id[0x18];
8537
Erez Shitrit500a3d02017-04-13 06:36:51 +03008538 u8 reserved_at_c0[0x8];
8539 u8 underlay_qpn[0x18];
8540 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008541};
8542
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008543enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008544 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8545 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008546};
8547
8548struct mlx5_ifc_modify_flow_table_out_bits {
8549 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008550 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008551
8552 u8 syndrome[0x20];
8553
Matan Barakb4ff3a32016-02-09 14:57:42 +02008554 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008555};
8556
8557struct mlx5_ifc_modify_flow_table_in_bits {
8558 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008559 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008560
Matan Barakb4ff3a32016-02-09 14:57:42 +02008561 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008562 u8 op_mod[0x10];
8563
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008564 u8 other_vport[0x1];
8565 u8 reserved_at_41[0xf];
8566 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008567
Matan Barakb4ff3a32016-02-09 14:57:42 +02008568 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008569 u8 modify_field_select[0x10];
8570
8571 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008572 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008573
Matan Barakb4ff3a32016-02-09 14:57:42 +02008574 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008575 u8 table_id[0x18];
8576
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008577 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008578};
8579
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008580struct mlx5_ifc_ets_tcn_config_reg_bits {
8581 u8 g[0x1];
8582 u8 b[0x1];
8583 u8 r[0x1];
8584 u8 reserved_at_3[0x9];
8585 u8 group[0x4];
8586 u8 reserved_at_10[0x9];
8587 u8 bw_allocation[0x7];
8588
8589 u8 reserved_at_20[0xc];
8590 u8 max_bw_units[0x4];
8591 u8 reserved_at_30[0x8];
8592 u8 max_bw_value[0x8];
8593};
8594
8595struct mlx5_ifc_ets_global_config_reg_bits {
8596 u8 reserved_at_0[0x2];
8597 u8 r[0x1];
8598 u8 reserved_at_3[0x1d];
8599
8600 u8 reserved_at_20[0xc];
8601 u8 max_bw_units[0x4];
8602 u8 reserved_at_30[0x8];
8603 u8 max_bw_value[0x8];
8604};
8605
8606struct mlx5_ifc_qetc_reg_bits {
8607 u8 reserved_at_0[0x8];
8608 u8 port_number[0x8];
8609 u8 reserved_at_10[0x30];
8610
8611 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8612 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8613};
8614
Huy Nguyen415a64a2017-07-18 16:08:46 -05008615struct mlx5_ifc_qpdpm_dscp_reg_bits {
8616 u8 e[0x1];
8617 u8 reserved_at_01[0x0b];
8618 u8 prio[0x04];
8619};
8620
8621struct mlx5_ifc_qpdpm_reg_bits {
8622 u8 reserved_at_0[0x8];
8623 u8 local_port[0x8];
8624 u8 reserved_at_10[0x10];
8625 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8626};
8627
8628struct mlx5_ifc_qpts_reg_bits {
8629 u8 reserved_at_0[0x8];
8630 u8 local_port[0x8];
8631 u8 reserved_at_10[0x2d];
8632 u8 trust_state[0x3];
8633};
8634
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008635struct mlx5_ifc_qtct_reg_bits {
8636 u8 reserved_at_0[0x8];
8637 u8 port_number[0x8];
8638 u8 reserved_at_10[0xd];
8639 u8 prio[0x3];
8640
8641 u8 reserved_at_20[0x1d];
8642 u8 tclass[0x3];
8643};
8644
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008645struct mlx5_ifc_mcia_reg_bits {
8646 u8 l[0x1];
8647 u8 reserved_at_1[0x7];
8648 u8 module[0x8];
8649 u8 reserved_at_10[0x8];
8650 u8 status[0x8];
8651
8652 u8 i2c_device_address[0x8];
8653 u8 page_number[0x8];
8654 u8 device_address[0x10];
8655
8656 u8 reserved_at_40[0x10];
8657 u8 size[0x10];
8658
8659 u8 reserved_at_60[0x20];
8660
8661 u8 dword_0[0x20];
8662 u8 dword_1[0x20];
8663 u8 dword_2[0x20];
8664 u8 dword_3[0x20];
8665 u8 dword_4[0x20];
8666 u8 dword_5[0x20];
8667 u8 dword_6[0x20];
8668 u8 dword_7[0x20];
8669 u8 dword_8[0x20];
8670 u8 dword_9[0x20];
8671 u8 dword_10[0x20];
8672 u8 dword_11[0x20];
8673};
8674
Saeed Mahameed74862162016-06-09 15:11:34 +03008675struct mlx5_ifc_dcbx_param_bits {
8676 u8 dcbx_cee_cap[0x1];
8677 u8 dcbx_ieee_cap[0x1];
8678 u8 dcbx_standby_cap[0x1];
8679 u8 reserved_at_0[0x5];
8680 u8 port_number[0x8];
8681 u8 reserved_at_10[0xa];
8682 u8 max_application_table_size[6];
8683 u8 reserved_at_20[0x15];
8684 u8 version_oper[0x3];
8685 u8 reserved_at_38[5];
8686 u8 version_admin[0x3];
8687 u8 willing_admin[0x1];
8688 u8 reserved_at_41[0x3];
8689 u8 pfc_cap_oper[0x4];
8690 u8 reserved_at_48[0x4];
8691 u8 pfc_cap_admin[0x4];
8692 u8 reserved_at_50[0x4];
8693 u8 num_of_tc_oper[0x4];
8694 u8 reserved_at_58[0x4];
8695 u8 num_of_tc_admin[0x4];
8696 u8 remote_willing[0x1];
8697 u8 reserved_at_61[3];
8698 u8 remote_pfc_cap[4];
8699 u8 reserved_at_68[0x14];
8700 u8 remote_num_of_tc[0x4];
8701 u8 reserved_at_80[0x18];
8702 u8 error[0x8];
8703 u8 reserved_at_a0[0x160];
8704};
Aviv Heller84df61e2016-05-10 13:47:50 +03008705
8706struct mlx5_ifc_lagc_bits {
8707 u8 reserved_at_0[0x1d];
8708 u8 lag_state[0x3];
8709
8710 u8 reserved_at_20[0x14];
8711 u8 tx_remap_affinity_2[0x4];
8712 u8 reserved_at_38[0x4];
8713 u8 tx_remap_affinity_1[0x4];
8714};
8715
8716struct mlx5_ifc_create_lag_out_bits {
8717 u8 status[0x8];
8718 u8 reserved_at_8[0x18];
8719
8720 u8 syndrome[0x20];
8721
8722 u8 reserved_at_40[0x40];
8723};
8724
8725struct mlx5_ifc_create_lag_in_bits {
8726 u8 opcode[0x10];
8727 u8 reserved_at_10[0x10];
8728
8729 u8 reserved_at_20[0x10];
8730 u8 op_mod[0x10];
8731
8732 struct mlx5_ifc_lagc_bits ctx;
8733};
8734
8735struct mlx5_ifc_modify_lag_out_bits {
8736 u8 status[0x8];
8737 u8 reserved_at_8[0x18];
8738
8739 u8 syndrome[0x20];
8740
8741 u8 reserved_at_40[0x40];
8742};
8743
8744struct mlx5_ifc_modify_lag_in_bits {
8745 u8 opcode[0x10];
8746 u8 reserved_at_10[0x10];
8747
8748 u8 reserved_at_20[0x10];
8749 u8 op_mod[0x10];
8750
8751 u8 reserved_at_40[0x20];
8752 u8 field_select[0x20];
8753
8754 struct mlx5_ifc_lagc_bits ctx;
8755};
8756
8757struct mlx5_ifc_query_lag_out_bits {
8758 u8 status[0x8];
8759 u8 reserved_at_8[0x18];
8760
8761 u8 syndrome[0x20];
8762
8763 u8 reserved_at_40[0x40];
8764
8765 struct mlx5_ifc_lagc_bits ctx;
8766};
8767
8768struct mlx5_ifc_query_lag_in_bits {
8769 u8 opcode[0x10];
8770 u8 reserved_at_10[0x10];
8771
8772 u8 reserved_at_20[0x10];
8773 u8 op_mod[0x10];
8774
8775 u8 reserved_at_40[0x40];
8776};
8777
8778struct mlx5_ifc_destroy_lag_out_bits {
8779 u8 status[0x8];
8780 u8 reserved_at_8[0x18];
8781
8782 u8 syndrome[0x20];
8783
8784 u8 reserved_at_40[0x40];
8785};
8786
8787struct mlx5_ifc_destroy_lag_in_bits {
8788 u8 opcode[0x10];
8789 u8 reserved_at_10[0x10];
8790
8791 u8 reserved_at_20[0x10];
8792 u8 op_mod[0x10];
8793
8794 u8 reserved_at_40[0x40];
8795};
8796
8797struct mlx5_ifc_create_vport_lag_out_bits {
8798 u8 status[0x8];
8799 u8 reserved_at_8[0x18];
8800
8801 u8 syndrome[0x20];
8802
8803 u8 reserved_at_40[0x40];
8804};
8805
8806struct mlx5_ifc_create_vport_lag_in_bits {
8807 u8 opcode[0x10];
8808 u8 reserved_at_10[0x10];
8809
8810 u8 reserved_at_20[0x10];
8811 u8 op_mod[0x10];
8812
8813 u8 reserved_at_40[0x40];
8814};
8815
8816struct mlx5_ifc_destroy_vport_lag_out_bits {
8817 u8 status[0x8];
8818 u8 reserved_at_8[0x18];
8819
8820 u8 syndrome[0x20];
8821
8822 u8 reserved_at_40[0x40];
8823};
8824
8825struct mlx5_ifc_destroy_vport_lag_in_bits {
8826 u8 opcode[0x10];
8827 u8 reserved_at_10[0x10];
8828
8829 u8 reserved_at_20[0x10];
8830 u8 op_mod[0x10];
8831
8832 u8 reserved_at_40[0x40];
8833};
8834
Eli Cohend29b7962014-10-02 12:19:43 +03008835#endif /* MLX5_IFC_H */