blob: a4d19d0b6c53d11996d7106322cd4fc5ac21b69e [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Michal Kazioredb82362013-07-05 16:15:14 +030018#include "core.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030019#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
Kalle Valoa9bf0502013-09-03 11:43:55 +030023#include "trace.h"
Michal Kazioraa5b4fb2014-07-23 12:20:33 +020024#include "mac.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030025
26#include <linux/log2.h>
27
Michal Kaziorc5450702015-01-24 12:14:48 +020028#define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
29#define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
Kalle Valo5e3dd152013-06-12 20:52:10 +030030
31/* when under memory pressure rx ring refill may fail and needs a retry */
32#define HTT_RX_RING_REFILL_RETRY_MS 50
33
Michal Kaziorf6dc2092013-09-26 10:12:22 +030034static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +020035static void ath10k_htt_txrx_compl_task(unsigned long ptr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +030036
Michal Kaziorc5450702015-01-24 12:14:48 +020037static struct sk_buff *
38ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr)
39{
40 struct ath10k_skb_rxcb *rxcb;
41
42 hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
43 if (rxcb->paddr == paddr)
44 return ATH10K_RXCB_SKB(rxcb);
45
46 WARN_ON_ONCE(1);
47 return NULL;
48}
49
Kalle Valo5e3dd152013-06-12 20:52:10 +030050static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
51{
52 struct sk_buff *skb;
Michal Kaziorc5450702015-01-24 12:14:48 +020053 struct ath10k_skb_rxcb *rxcb;
54 struct hlist_node *n;
Kalle Valo5e3dd152013-06-12 20:52:10 +030055 int i;
56
Michal Kaziorc5450702015-01-24 12:14:48 +020057 if (htt->rx_ring.in_ord_rx) {
58 hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
59 skb = ATH10K_RXCB_SKB(rxcb);
60 dma_unmap_single(htt->ar->dev, rxcb->paddr,
61 skb->len + skb_tailroom(skb),
62 DMA_FROM_DEVICE);
63 hash_del(&rxcb->hlist);
64 dev_kfree_skb_any(skb);
65 }
66 } else {
67 for (i = 0; i < htt->rx_ring.size; i++) {
68 skb = htt->rx_ring.netbufs_ring[i];
69 if (!skb)
70 continue;
71
72 rxcb = ATH10K_SKB_RXCB(skb);
73 dma_unmap_single(htt->ar->dev, rxcb->paddr,
74 skb->len + skb_tailroom(skb),
75 DMA_FROM_DEVICE);
76 dev_kfree_skb_any(skb);
77 }
Kalle Valo5e3dd152013-06-12 20:52:10 +030078 }
79
80 htt->rx_ring.fill_cnt = 0;
Michal Kaziorc5450702015-01-24 12:14:48 +020081 hash_init(htt->rx_ring.skb_table);
82 memset(htt->rx_ring.netbufs_ring, 0,
83 htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
Kalle Valo5e3dd152013-06-12 20:52:10 +030084}
85
86static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
87{
88 struct htt_rx_desc *rx_desc;
Michal Kaziorc5450702015-01-24 12:14:48 +020089 struct ath10k_skb_rxcb *rxcb;
Kalle Valo5e3dd152013-06-12 20:52:10 +030090 struct sk_buff *skb;
91 dma_addr_t paddr;
92 int ret = 0, idx;
93
Michal Kaziorc5450702015-01-24 12:14:48 +020094 /* The Full Rx Reorder firmware has no way of telling the host
95 * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
96 * To keep things simple make sure ring is always half empty. This
97 * guarantees there'll be no replenishment overruns possible.
98 */
99 BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
100
Kalle Valo8cc7f262014-09-14 12:50:39 +0300101 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300102 while (num > 0) {
103 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
104 if (!skb) {
105 ret = -ENOMEM;
106 goto fail;
107 }
108
109 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
110 skb_pull(skb,
111 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
112 skb->data);
113
114 /* Clear rx_desc attention word before posting to Rx ring */
115 rx_desc = (struct htt_rx_desc *)skb->data;
116 rx_desc->attention.flags = __cpu_to_le32(0);
117
118 paddr = dma_map_single(htt->ar->dev, skb->data,
119 skb->len + skb_tailroom(skb),
120 DMA_FROM_DEVICE);
121
122 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
123 dev_kfree_skb_any(skb);
124 ret = -ENOMEM;
125 goto fail;
126 }
127
Michal Kaziorc5450702015-01-24 12:14:48 +0200128 rxcb = ATH10K_SKB_RXCB(skb);
129 rxcb->paddr = paddr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300130 htt->rx_ring.netbufs_ring[idx] = skb;
131 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
132 htt->rx_ring.fill_cnt++;
133
Michal Kaziorc5450702015-01-24 12:14:48 +0200134 if (htt->rx_ring.in_ord_rx) {
135 hash_add(htt->rx_ring.skb_table,
136 &ATH10K_SKB_RXCB(skb)->hlist,
137 (u32)paddr);
138 }
139
Kalle Valo5e3dd152013-06-12 20:52:10 +0300140 num--;
141 idx++;
142 idx &= htt->rx_ring.size_mask;
143 }
144
145fail:
Vasanthakumar Thiagarajan5de6dfc2015-01-09 22:49:46 +0530146 /*
147 * Make sure the rx buffer is updated before available buffer
148 * index to avoid any potential rx ring corruption.
149 */
150 mb();
Kalle Valo8cc7f262014-09-14 12:50:39 +0300151 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300152 return ret;
153}
154
155static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
156{
157 lockdep_assert_held(&htt->rx_ring.lock);
158 return __ath10k_htt_rx_ring_fill_n(htt, num);
159}
160
161static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
162{
Michal Kazior6e712d42013-09-24 10:18:36 +0200163 int ret, num_deficit, num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300164
Michal Kazior6e712d42013-09-24 10:18:36 +0200165 /* Refilling the whole RX ring buffer proves to be a bad idea. The
166 * reason is RX may take up significant amount of CPU cycles and starve
167 * other tasks, e.g. TX on an ethernet device while acting as a bridge
168 * with ath10k wlan interface. This ended up with very poor performance
169 * once CPU the host system was overwhelmed with RX on ath10k.
170 *
171 * By limiting the number of refills the replenishing occurs
172 * progressively. This in turns makes use of the fact tasklets are
173 * processed in FIFO order. This means actual RX processing can starve
174 * out refilling. If there's not enough buffers on RX ring FW will not
175 * report RX until it is refilled with enough buffers. This
176 * automatically balances load wrt to CPU power.
177 *
178 * This probably comes at a cost of lower maximum throughput but
Ben Greear3eafdfd2015-02-15 16:50:39 +0200179 * improves the average and stability. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300180 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6e712d42013-09-24 10:18:36 +0200181 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
182 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
183 num_deficit -= num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300184 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
185 if (ret == -ENOMEM) {
186 /*
187 * Failed to fill it to the desired level -
188 * we'll start a timer and try again next time.
189 * As long as enough buffers are left in the ring for
190 * another A-MPDU rx, no special recovery is needed.
191 */
192 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
193 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
Michal Kazior6e712d42013-09-24 10:18:36 +0200194 } else if (num_deficit > 0) {
195 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300196 }
197 spin_unlock_bh(&htt->rx_ring.lock);
198}
199
200static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
201{
202 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
Kalle Valoaf762c02014-09-14 12:50:17 +0300203
Kalle Valo5e3dd152013-06-12 20:52:10 +0300204 ath10k_htt_rx_msdu_buff_replenish(htt);
205}
206
Michal Kaziorc5450702015-01-24 12:14:48 +0200207int ath10k_htt_rx_ring_refill(struct ath10k *ar)
Michal Kazior3e841fd2014-05-14 16:23:31 +0300208{
Michal Kaziorc5450702015-01-24 12:14:48 +0200209 struct ath10k_htt *htt = &ar->htt;
210 int ret;
Michal Kazior3e841fd2014-05-14 16:23:31 +0300211
Michal Kaziorc5450702015-01-24 12:14:48 +0200212 spin_lock_bh(&htt->rx_ring.lock);
213 ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
214 htt->rx_ring.fill_cnt));
215 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior3e841fd2014-05-14 16:23:31 +0300216
Michal Kaziorc5450702015-01-24 12:14:48 +0200217 if (ret)
218 ath10k_htt_rx_ring_free(htt);
219
220 return ret;
Michal Kazior3e841fd2014-05-14 16:23:31 +0300221}
222
Michal Kazior95bf21f2014-05-16 17:15:39 +0300223void ath10k_htt_rx_free(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300224{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300225 del_timer_sync(&htt->rx_ring.refill_retry_timer);
Michal Kazior6e712d42013-09-24 10:18:36 +0200226 tasklet_kill(&htt->rx_replenish_task);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200227 tasklet_kill(&htt->txrx_compl_task);
228
229 skb_queue_purge(&htt->tx_compl_q);
230 skb_queue_purge(&htt->rx_compl_q);
Michal Kaziorc5450702015-01-24 12:14:48 +0200231 skb_queue_purge(&htt->rx_in_ord_compl_q);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300232
Michal Kaziorc5450702015-01-24 12:14:48 +0200233 ath10k_htt_rx_ring_free(htt);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300234
235 dma_free_coherent(htt->ar->dev,
236 (htt->rx_ring.size *
237 sizeof(htt->rx_ring.paddrs_ring)),
238 htt->rx_ring.paddrs_ring,
239 htt->rx_ring.base_paddr);
240
241 dma_free_coherent(htt->ar->dev,
242 sizeof(*htt->rx_ring.alloc_idx.vaddr),
243 htt->rx_ring.alloc_idx.vaddr,
244 htt->rx_ring.alloc_idx.paddr);
245
246 kfree(htt->rx_ring.netbufs_ring);
247}
248
249static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
250{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200251 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300252 int idx;
253 struct sk_buff *msdu;
254
Michal Kazior45967082014-02-27 18:50:05 +0200255 lockdep_assert_held(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300256
Michal Kazior8d60ee82014-02-27 18:50:05 +0200257 if (htt->rx_ring.fill_cnt == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200258 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
Michal Kazior8d60ee82014-02-27 18:50:05 +0200259 return NULL;
260 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300261
262 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
263 msdu = htt->rx_ring.netbufs_ring[idx];
Michal Kazior3e841fd2014-05-14 16:23:31 +0300264 htt->rx_ring.netbufs_ring[idx] = NULL;
Michal Kaziorc5450702015-01-24 12:14:48 +0200265 htt->rx_ring.paddrs_ring[idx] = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300266
267 idx++;
268 idx &= htt->rx_ring.size_mask;
269 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
270 htt->rx_ring.fill_cnt--;
271
Michal Kazior4de02802014-10-23 17:04:23 +0300272 dma_unmap_single(htt->ar->dev,
Michal Kazior8582bf32015-01-24 12:14:47 +0200273 ATH10K_SKB_RXCB(msdu)->paddr,
Michal Kazior4de02802014-10-23 17:04:23 +0300274 msdu->len + skb_tailroom(msdu),
275 DMA_FROM_DEVICE);
276 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
277 msdu->data, msdu->len + skb_tailroom(msdu));
Michal Kazior4de02802014-10-23 17:04:23 +0300278
Kalle Valo5e3dd152013-06-12 20:52:10 +0300279 return msdu;
280}
281
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100282/* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300283static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
284 u8 **fw_desc, int *fw_desc_len,
Michal Kaziorf0e27702014-11-18 09:24:49 +0200285 struct sk_buff_head *amsdu)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300286{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200287 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300288 int msdu_len, msdu_chaining = 0;
Michal Kazior9aa505d2014-11-18 09:24:47 +0200289 struct sk_buff *msdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300290 struct htt_rx_desc *rx_desc;
291
Michal Kazior45967082014-02-27 18:50:05 +0200292 lockdep_assert_held(&htt->rx_ring.lock);
293
Michal Kazior9aa505d2014-11-18 09:24:47 +0200294 for (;;) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300295 int last_msdu, msdu_len_invalid, msdu_chained;
296
Michal Kazior9aa505d2014-11-18 09:24:47 +0200297 msdu = ath10k_htt_rx_netbuf_pop(htt);
298 if (!msdu) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200299 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200300 return -ENOENT;
Michal Kazior9aa505d2014-11-18 09:24:47 +0200301 }
302
303 __skb_queue_tail(amsdu, msdu);
304
Kalle Valo5e3dd152013-06-12 20:52:10 +0300305 rx_desc = (struct htt_rx_desc *)msdu->data;
306
307 /* FIXME: we must report msdu payload since this is what caller
308 * expects now */
309 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
310 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
311
312 /*
313 * Sanity check - confirm the HW is finished filling in the
314 * rx data.
315 * If the HW and SW are working correctly, then it's guaranteed
316 * that the HW's MAC DMA is done before this point in the SW.
317 * To prevent the case that we handle a stale Rx descriptor,
318 * just assert for now until we have a way to recover.
319 */
320 if (!(__le32_to_cpu(rx_desc->attention.flags)
321 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200322 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200323 return -EIO;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300324 }
325
326 /*
327 * Copy the FW rx descriptor for this MSDU from the rx
328 * indication message into the MSDU's netbuf. HL uses the
329 * same rx indication message definition as LL, and simply
330 * appends new info (fields from the HW rx desc, and the
331 * MSDU payload itself). So, the offset into the rx
332 * indication message only has to account for the standard
333 * offset of the per-MSDU FW rx desc info within the
334 * message, and how many bytes of the per-MSDU FW rx desc
335 * info have already been consumed. (And the endianness of
336 * the host, since for a big-endian host, the rx ind
337 * message contents, including the per-MSDU rx desc bytes,
338 * were byteswapped during upload.)
339 */
340 if (*fw_desc_len > 0) {
341 rx_desc->fw_desc.info0 = **fw_desc;
342 /*
343 * The target is expected to only provide the basic
344 * per-MSDU rx descriptors. Just to be sure, verify
345 * that the target has not attached extension data
346 * (e.g. LRO flow ID).
347 */
348
349 /* or more, if there's extension data */
350 (*fw_desc)++;
351 (*fw_desc_len)--;
352 } else {
353 /*
354 * When an oversized AMSDU happened, FW will lost
355 * some of MSDU status - in this case, the FW
356 * descriptors provided will be less than the
357 * actual MSDUs inside this MPDU. Mark the FW
358 * descriptors so that it will still deliver to
359 * upper stack, if no CRC error for this MPDU.
360 *
361 * FIX THIS - the FW descriptors are actually for
362 * MSDUs in the end of this A-MSDU instead of the
363 * beginning.
364 */
365 rx_desc->fw_desc.info0 = 0;
366 }
367
368 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
369 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
370 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
371 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
372 RX_MSDU_START_INFO0_MSDU_LENGTH);
373 msdu_chained = rx_desc->frag_info.ring2_more_count;
374
375 if (msdu_len_invalid)
376 msdu_len = 0;
377
378 skb_trim(msdu, 0);
379 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
380 msdu_len -= msdu->len;
381
Michal Kazior9aa505d2014-11-18 09:24:47 +0200382 /* Note: Chained buffers do not contain rx descriptor */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300383 while (msdu_chained--) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200384 msdu = ath10k_htt_rx_netbuf_pop(htt);
385 if (!msdu) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200386 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200387 return -ENOENT;
Michal Kaziorb30595a2014-10-23 17:04:24 +0300388 }
389
Michal Kazior9aa505d2014-11-18 09:24:47 +0200390 __skb_queue_tail(amsdu, msdu);
391 skb_trim(msdu, 0);
392 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
393 msdu_len -= msdu->len;
Michal Kaziorede9c8e2014-05-14 16:23:31 +0300394 msdu_chaining = 1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300395 }
396
Kalle Valo5e3dd152013-06-12 20:52:10 +0300397 last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
398 RX_MSDU_END_INFO0_LAST_MSDU;
399
Michal Kaziorb04e2042014-10-23 17:04:27 +0300400 trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
Rajkumar Manoharana0883cf2014-10-03 08:02:47 +0300401 sizeof(*rx_desc) - sizeof(u32));
Michal Kazior9aa505d2014-11-18 09:24:47 +0200402
403 if (last_msdu)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300404 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300405 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300406
Michal Kazior9aa505d2014-11-18 09:24:47 +0200407 if (skb_queue_empty(amsdu))
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100408 msdu_chaining = -1;
409
Kalle Valo5e3dd152013-06-12 20:52:10 +0300410 /*
411 * Don't refill the ring yet.
412 *
413 * First, the elements popped here are still in use - it is not
414 * safe to overwrite them until the matching call to
415 * mpdu_desc_list_next. Second, for efficiency it is preferable to
416 * refill the rx ring with 1 PPDU's worth of rx buffers (something
417 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
418 * (something like 3 buffers). Consequently, we'll rely on the txrx
419 * SW to tell us when it is done pulling all the PPDU's rx buffers
420 * out of the rx ring, and then refill it just once.
421 */
422
423 return msdu_chaining;
424}
425
Michal Kazior6e712d42013-09-24 10:18:36 +0200426static void ath10k_htt_rx_replenish_task(unsigned long ptr)
427{
428 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
Kalle Valoaf762c02014-09-14 12:50:17 +0300429
Michal Kazior6e712d42013-09-24 10:18:36 +0200430 ath10k_htt_rx_msdu_buff_replenish(htt);
431}
432
Michal Kaziorc5450702015-01-24 12:14:48 +0200433static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
434 u32 paddr)
435{
436 struct ath10k *ar = htt->ar;
437 struct ath10k_skb_rxcb *rxcb;
438 struct sk_buff *msdu;
439
440 lockdep_assert_held(&htt->rx_ring.lock);
441
442 msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
443 if (!msdu)
444 return NULL;
445
446 rxcb = ATH10K_SKB_RXCB(msdu);
447 hash_del(&rxcb->hlist);
448 htt->rx_ring.fill_cnt--;
449
450 dma_unmap_single(htt->ar->dev, rxcb->paddr,
451 msdu->len + skb_tailroom(msdu),
452 DMA_FROM_DEVICE);
453 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
454 msdu->data, msdu->len + skb_tailroom(msdu));
455
456 return msdu;
457}
458
459static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt,
460 struct htt_rx_in_ord_ind *ev,
461 struct sk_buff_head *list)
462{
463 struct ath10k *ar = htt->ar;
464 struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs;
465 struct htt_rx_desc *rxd;
466 struct sk_buff *msdu;
467 int msdu_count;
468 bool is_offload;
469 u32 paddr;
470
471 lockdep_assert_held(&htt->rx_ring.lock);
472
473 msdu_count = __le16_to_cpu(ev->msdu_count);
474 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
475
476 while (msdu_count--) {
477 paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
478
479 msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
480 if (!msdu) {
481 __skb_queue_purge(list);
482 return -ENOENT;
483 }
484
485 __skb_queue_tail(list, msdu);
486
487 if (!is_offload) {
488 rxd = (void *)msdu->data;
489
490 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
491
492 skb_put(msdu, sizeof(*rxd));
493 skb_pull(msdu, sizeof(*rxd));
494 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
495
496 if (!(__le32_to_cpu(rxd->attention.flags) &
497 RX_ATTENTION_FLAGS_MSDU_DONE)) {
498 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
499 return -EIO;
500 }
501 }
502
503 msdu_desc++;
504 }
505
506 return 0;
507}
508
Michal Kazior95bf21f2014-05-16 17:15:39 +0300509int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300510{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200511 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300512 dma_addr_t paddr;
513 void *vaddr;
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300514 size_t size;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300515 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
516
Michal Kazior51fc7d72014-10-23 17:04:24 +0300517 htt->rx_confused = false;
518
Michal Kaziorfe2407a2014-11-27 11:12:43 +0100519 /* XXX: The fill level could be changed during runtime in response to
520 * the host processing latency. Is this really worth it?
521 */
522 htt->rx_ring.size = HTT_RX_RING_SIZE;
523 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
524 htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL;
525
Kalle Valo5e3dd152013-06-12 20:52:10 +0300526 if (!is_power_of_2(htt->rx_ring.size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200527 ath10k_warn(ar, "htt rx ring size is not power of 2\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300528 return -EINVAL;
529 }
530
Kalle Valo5e3dd152013-06-12 20:52:10 +0300531 htt->rx_ring.netbufs_ring =
Michal Kazior3e841fd2014-05-14 16:23:31 +0300532 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300533 GFP_KERNEL);
534 if (!htt->rx_ring.netbufs_ring)
535 goto err_netbuf;
536
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300537 size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
538
539 vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_DMA);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300540 if (!vaddr)
541 goto err_dma_ring;
542
543 htt->rx_ring.paddrs_ring = vaddr;
544 htt->rx_ring.base_paddr = paddr;
545
546 vaddr = dma_alloc_coherent(htt->ar->dev,
547 sizeof(*htt->rx_ring.alloc_idx.vaddr),
548 &paddr, GFP_DMA);
549 if (!vaddr)
550 goto err_dma_idx;
551
552 htt->rx_ring.alloc_idx.vaddr = vaddr;
553 htt->rx_ring.alloc_idx.paddr = paddr;
Michal Kaziorc5450702015-01-24 12:14:48 +0200554 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300555 *htt->rx_ring.alloc_idx.vaddr = 0;
556
557 /* Initialize the Rx refill retry timer */
558 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
559
560 spin_lock_init(&htt->rx_ring.lock);
561
562 htt->rx_ring.fill_cnt = 0;
Michal Kaziorc5450702015-01-24 12:14:48 +0200563 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
564 hash_init(htt->rx_ring.skb_table);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300565
Michal Kazior6e712d42013-09-24 10:18:36 +0200566 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
567 (unsigned long)htt);
568
Michal Kazior6c5151a2014-02-27 18:50:04 +0200569 skb_queue_head_init(&htt->tx_compl_q);
570 skb_queue_head_init(&htt->rx_compl_q);
Michal Kaziorc5450702015-01-24 12:14:48 +0200571 skb_queue_head_init(&htt->rx_in_ord_compl_q);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200572
573 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
574 (unsigned long)htt);
575
Michal Kazior7aa7a722014-08-25 12:09:38 +0200576 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300577 htt->rx_ring.size, htt->rx_ring.fill_level);
578 return 0;
579
Kalle Valo5e3dd152013-06-12 20:52:10 +0300580err_dma_idx:
581 dma_free_coherent(htt->ar->dev,
582 (htt->rx_ring.size *
583 sizeof(htt->rx_ring.paddrs_ring)),
584 htt->rx_ring.paddrs_ring,
585 htt->rx_ring.base_paddr);
586err_dma_ring:
587 kfree(htt->rx_ring.netbufs_ring);
588err_netbuf:
589 return -ENOMEM;
590}
591
Michal Kazior7aa7a722014-08-25 12:09:38 +0200592static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
593 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300594{
595 switch (type) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300596 case HTT_RX_MPDU_ENCRYPT_NONE:
597 return 0;
Michal Kazior890d3b22014-10-23 17:04:22 +0300598 case HTT_RX_MPDU_ENCRYPT_WEP40:
599 case HTT_RX_MPDU_ENCRYPT_WEP104:
600 return IEEE80211_WEP_IV_LEN;
601 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
602 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
603 return IEEE80211_TKIP_IV_LEN;
604 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
605 return IEEE80211_CCMP_HDR_LEN;
606 case HTT_RX_MPDU_ENCRYPT_WEP128:
607 case HTT_RX_MPDU_ENCRYPT_WAPI:
608 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300609 }
610
Michal Kazior890d3b22014-10-23 17:04:22 +0300611 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300612 return 0;
613}
614
Michal Kazior890d3b22014-10-23 17:04:22 +0300615#define MICHAEL_MIC_LEN 8
616
Michal Kazior7aa7a722014-08-25 12:09:38 +0200617static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
618 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300619{
620 switch (type) {
621 case HTT_RX_MPDU_ENCRYPT_NONE:
Michal Kazior890d3b22014-10-23 17:04:22 +0300622 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300623 case HTT_RX_MPDU_ENCRYPT_WEP40:
624 case HTT_RX_MPDU_ENCRYPT_WEP104:
Michal Kazior890d3b22014-10-23 17:04:22 +0300625 return IEEE80211_WEP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300626 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
627 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
Michal Kazior890d3b22014-10-23 17:04:22 +0300628 return IEEE80211_TKIP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300629 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
Michal Kazior890d3b22014-10-23 17:04:22 +0300630 return IEEE80211_CCMP_MIC_LEN;
631 case HTT_RX_MPDU_ENCRYPT_WEP128:
632 case HTT_RX_MPDU_ENCRYPT_WAPI:
633 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300634 }
635
Michal Kazior890d3b22014-10-23 17:04:22 +0300636 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300637 return 0;
638}
639
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300640struct amsdu_subframe_hdr {
641 u8 dst[ETH_ALEN];
642 u8 src[ETH_ALEN];
643 __be16 len;
644} __packed;
645
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100646static const u8 rx_legacy_rate_idx[] = {
647 3, /* 0x00 - 11Mbps */
648 2, /* 0x01 - 5.5Mbps */
649 1, /* 0x02 - 2Mbps */
650 0, /* 0x03 - 1Mbps */
651 3, /* 0x04 - 11Mbps */
652 2, /* 0x05 - 5.5Mbps */
653 1, /* 0x06 - 2Mbps */
654 0, /* 0x07 - 1Mbps */
655 10, /* 0x08 - 48Mbps */
656 8, /* 0x09 - 24Mbps */
657 6, /* 0x0A - 12Mbps */
658 4, /* 0x0B - 6Mbps */
659 11, /* 0x0C - 54Mbps */
660 9, /* 0x0D - 36Mbps */
661 7, /* 0x0E - 18Mbps */
662 5, /* 0x0F - 9Mbps */
663};
664
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100665static void ath10k_htt_rx_h_rates(struct ath10k *ar,
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200666 struct ieee80211_rx_status *status,
667 struct htt_rx_desc *rxd)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100668{
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200669 enum ieee80211_band band;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100670 u8 cck, rate, rate_idx, bw, sgi, mcs, nss;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100671 u8 preamble = 0;
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200672 u32 info1, info2, info3;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100673
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200674 /* Band value can't be set as undefined but freq can be 0 - use that to
675 * determine whether band is provided.
676 *
677 * FIXME: Perhaps this can go away if CCK rate reporting is a little
678 * reworked?
679 */
680 if (!status->freq)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100681 return;
682
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200683 band = status->band;
684 info1 = __le32_to_cpu(rxd->ppdu_start.info1);
685 info2 = __le32_to_cpu(rxd->ppdu_start.info2);
686 info3 = __le32_to_cpu(rxd->ppdu_start.info3);
687
688 preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100689
690 switch (preamble) {
691 case HTT_RX_LEGACY:
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200692 cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
693 rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100694 rate_idx = 0;
695
696 if (rate < 0x08 || rate > 0x0F)
697 break;
698
699 switch (band) {
700 case IEEE80211_BAND_2GHZ:
701 if (cck)
702 rate &= ~BIT(3);
703 rate_idx = rx_legacy_rate_idx[rate];
704 break;
705 case IEEE80211_BAND_5GHZ:
706 rate_idx = rx_legacy_rate_idx[rate];
707 /* We are using same rate table registering
708 HW - ath10k_rates[]. In case of 5GHz skip
709 CCK rates, so -4 here */
710 rate_idx -= 4;
711 break;
712 default:
713 break;
714 }
715
716 status->rate_idx = rate_idx;
717 break;
718 case HTT_RX_HT:
719 case HTT_RX_HT_WITH_TXBF:
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200720 /* HT-SIG - Table 20-11 in info2 and info3 */
721 mcs = info2 & 0x1F;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100722 nss = mcs >> 3;
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200723 bw = (info2 >> 7) & 1;
724 sgi = (info3 >> 7) & 1;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100725
726 status->rate_idx = mcs;
727 status->flag |= RX_FLAG_HT;
728 if (sgi)
729 status->flag |= RX_FLAG_SHORT_GI;
730 if (bw)
731 status->flag |= RX_FLAG_40MHZ;
732 break;
733 case HTT_RX_VHT:
734 case HTT_RX_VHT_WITH_TXBF:
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200735 /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100736 TODO check this */
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200737 mcs = (info3 >> 4) & 0x0F;
738 nss = ((info2 >> 10) & 0x07) + 1;
739 bw = info2 & 3;
740 sgi = info3 & 1;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100741
742 status->rate_idx = mcs;
743 status->vht_nss = nss;
744
745 if (sgi)
746 status->flag |= RX_FLAG_SHORT_GI;
747
748 switch (bw) {
749 /* 20MHZ */
750 case 0:
751 break;
752 /* 40MHZ */
753 case 1:
754 status->flag |= RX_FLAG_40MHZ;
755 break;
756 /* 80MHZ */
757 case 2:
758 status->vht_flag |= RX_VHT_FLAG_80MHZ;
759 }
760
761 status->flag |= RX_FLAG_VHT;
762 break;
763 default:
764 break;
765 }
766}
767
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100768static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
769 struct ieee80211_rx_status *status)
770{
771 struct ieee80211_channel *ch;
772
773 spin_lock_bh(&ar->data_lock);
774 ch = ar->scan_channel;
775 if (!ch)
776 ch = ar->rx_channel;
777 spin_unlock_bh(&ar->data_lock);
778
779 if (!ch)
780 return false;
781
782 status->band = ch->band;
783 status->freq = ch->center_freq;
784
785 return true;
786}
787
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200788static void ath10k_htt_rx_h_signal(struct ath10k *ar,
789 struct ieee80211_rx_status *status,
790 struct htt_rx_desc *rxd)
791{
792 /* FIXME: Get real NF */
793 status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
794 rxd->ppdu_start.rssi_comb;
795 status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
796}
797
798static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
799 struct ieee80211_rx_status *status,
800 struct htt_rx_desc *rxd)
801{
802 /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
803 * means all prior MSDUs in a PPDU are reported to mac80211 without the
804 * TSF. Is it worth holding frames until end of PPDU is known?
805 *
806 * FIXME: Can we get/compute 64bit TSF?
807 */
Michal Kazior3ec79e32015-01-24 12:14:48 +0200808 status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp);
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200809 status->flag |= RX_FLAG_MACTIME_END;
810}
811
812static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
813 struct sk_buff_head *amsdu,
814 struct ieee80211_rx_status *status)
815{
816 struct sk_buff *first;
817 struct htt_rx_desc *rxd;
818 bool is_first_ppdu;
819 bool is_last_ppdu;
820
821 if (skb_queue_empty(amsdu))
822 return;
823
824 first = skb_peek(amsdu);
825 rxd = (void *)first->data - sizeof(*rxd);
826
827 is_first_ppdu = !!(rxd->attention.flags &
828 __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
829 is_last_ppdu = !!(rxd->attention.flags &
830 __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
831
832 if (is_first_ppdu) {
833 /* New PPDU starts so clear out the old per-PPDU status. */
834 status->freq = 0;
835 status->rate_idx = 0;
836 status->vht_nss = 0;
837 status->vht_flag &= ~RX_VHT_FLAG_80MHZ;
838 status->flag &= ~(RX_FLAG_HT |
839 RX_FLAG_VHT |
840 RX_FLAG_SHORT_GI |
841 RX_FLAG_40MHZ |
842 RX_FLAG_MACTIME_END);
843 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
844
845 ath10k_htt_rx_h_signal(ar, status, rxd);
846 ath10k_htt_rx_h_channel(ar, status);
847 ath10k_htt_rx_h_rates(ar, status, rxd);
848 }
849
850 if (is_last_ppdu)
851 ath10k_htt_rx_h_mactime(ar, status, rxd);
852}
853
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300854static const char * const tid_to_ac[] = {
855 "BE",
856 "BK",
857 "BK",
858 "BE",
859 "VI",
860 "VI",
861 "VO",
862 "VO",
863};
864
865static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
866{
867 u8 *qc;
868 int tid;
869
870 if (!ieee80211_is_data_qos(hdr->frame_control))
871 return "";
872
873 qc = ieee80211_get_qos_ctl(hdr);
874 tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
875 if (tid < 8)
876 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
877 else
878 snprintf(out, size, "tid %d", tid);
879
880 return out;
881}
882
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100883static void ath10k_process_rx(struct ath10k *ar,
884 struct ieee80211_rx_status *rx_status,
885 struct sk_buff *skb)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100886{
887 struct ieee80211_rx_status *status;
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300888 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
889 char tid[32];
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100890
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100891 status = IEEE80211_SKB_RXCB(skb);
892 *status = *rx_status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100893
Michal Kazior7aa7a722014-08-25 12:09:38 +0200894 ath10k_dbg(ar, ATH10K_DBG_DATA,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300895 "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100896 skb,
897 skb->len,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300898 ieee80211_get_SA(hdr),
899 ath10k_get_tid(hdr, tid, sizeof(tid)),
900 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
901 "mcast" : "ucast",
902 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100903 status->flag == 0 ? "legacy" : "",
904 status->flag & RX_FLAG_HT ? "ht" : "",
905 status->flag & RX_FLAG_VHT ? "vht" : "",
906 status->flag & RX_FLAG_40MHZ ? "40" : "",
907 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
908 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
909 status->rate_idx,
910 status->vht_nss,
911 status->freq,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100912 status->band, status->flag,
Janusz Dziedzic78433f92014-03-24 21:23:21 +0100913 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300914 !!(status->flag & RX_FLAG_MMIC_ERROR),
915 !!(status->flag & RX_FLAG_AMSDU_MORE));
Michal Kazior7aa7a722014-08-25 12:09:38 +0200916 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100917 skb->data, skb->len);
Rajkumar Manoharan5ce8e7f2014-11-05 19:14:31 +0530918 trace_ath10k_rx_hdr(ar, skb->data, skb->len);
919 trace_ath10k_rx_payload(ar, skb->data, skb->len);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100920
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100921 ieee80211_rx(ar->hw, skb);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100922}
923
Michal Kaziord960c362014-02-25 09:29:57 +0200924static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr)
925{
926 /* nwifi header is padded to 4 bytes. this fixes 4addr rx */
927 return round_up(ieee80211_hdrlen(hdr->frame_control), 4);
928}
929
Michal Kazior581c25f2014-11-18 09:24:48 +0200930static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
931 struct sk_buff *msdu,
932 struct ieee80211_rx_status *status,
933 enum htt_rx_mpdu_encrypt_type enctype,
934 bool is_decrypted)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300935{
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300936 struct ieee80211_hdr *hdr;
Michal Kazior581c25f2014-11-18 09:24:48 +0200937 struct htt_rx_desc *rxd;
938 size_t hdr_len;
939 size_t crypto_len;
940 bool is_first;
941 bool is_last;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300942
Michal Kazior581c25f2014-11-18 09:24:48 +0200943 rxd = (void *)msdu->data - sizeof(*rxd);
944 is_first = !!(rxd->msdu_end.info0 &
945 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
946 is_last = !!(rxd->msdu_end.info0 &
947 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
Michal Kazior9aa505d2014-11-18 09:24:47 +0200948
Michal Kazior581c25f2014-11-18 09:24:48 +0200949 /* Delivered decapped frame:
950 * [802.11 header]
951 * [crypto param] <-- can be trimmed if !fcs_err &&
952 * !decrypt_err && !peer_idx_invalid
953 * [amsdu header] <-- only if A-MSDU
954 * [rfc1042/llc]
955 * [payload]
956 * [FCS] <-- at end, needs to be trimmed
957 */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300958
Michal Kazior581c25f2014-11-18 09:24:48 +0200959 /* This probably shouldn't happen but warn just in case */
960 if (unlikely(WARN_ON_ONCE(!is_first)))
961 return;
962
963 /* This probably shouldn't happen but warn just in case */
964 if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
965 return;
966
967 skb_trim(msdu, msdu->len - FCS_LEN);
968
969 /* In most cases this will be true for sniffed frames. It makes sense
970 * to deliver them as-is without stripping the crypto param. This would
971 * also make sense for software based decryption (which is not
972 * implemented in ath10k).
973 *
974 * If there's no error then the frame is decrypted. At least that is
975 * the case for frames that come in via fragmented rx indication.
976 */
977 if (!is_decrypted)
978 return;
979
980 /* The payload is decrypted so strip crypto params. Start from tail
981 * since hdr is used to compute some stuff.
982 */
983
984 hdr = (void *)msdu->data;
985
986 /* Tail */
987 skb_trim(msdu, msdu->len - ath10k_htt_rx_crypto_tail_len(ar, enctype));
988
989 /* MMIC */
990 if (!ieee80211_has_morefrags(hdr->frame_control) &&
991 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
992 skb_trim(msdu, msdu->len - 8);
993
994 /* Head */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300995 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +0200996 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300997
Michal Kazior581c25f2014-11-18 09:24:48 +0200998 memmove((void *)msdu->data + crypto_len,
999 (void *)msdu->data, hdr_len);
1000 skb_pull(msdu, crypto_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001001}
1002
Michal Kazior581c25f2014-11-18 09:24:48 +02001003static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
1004 struct sk_buff *msdu,
1005 struct ieee80211_rx_status *status,
1006 const u8 first_hdr[64])
Kalle Valo5e3dd152013-06-12 20:52:10 +03001007{
Kalle Valo5e3dd152013-06-12 20:52:10 +03001008 struct ieee80211_hdr *hdr;
Michal Kazior581c25f2014-11-18 09:24:48 +02001009 size_t hdr_len;
1010 u8 da[ETH_ALEN];
1011 u8 sa[ETH_ALEN];
Kalle Valo5e3dd152013-06-12 20:52:10 +03001012
Michal Kazior581c25f2014-11-18 09:24:48 +02001013 /* Delivered decapped frame:
1014 * [nwifi 802.11 header] <-- replaced with 802.11 hdr
1015 * [rfc1042/llc]
1016 *
1017 * Note: The nwifi header doesn't have QoS Control and is
1018 * (always?) a 3addr frame.
1019 *
1020 * Note2: There's no A-MSDU subframe header. Even if it's part
1021 * of an A-MSDU.
1022 */
1023
1024 /* pull decapped header and copy SA & DA */
1025 hdr = (struct ieee80211_hdr *)msdu->data;
1026 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
1027 ether_addr_copy(da, ieee80211_get_DA(hdr));
1028 ether_addr_copy(sa, ieee80211_get_SA(hdr));
1029 skb_pull(msdu, hdr_len);
1030
1031 /* push original 802.11 header */
1032 hdr = (struct ieee80211_hdr *)first_hdr;
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001033 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +02001034 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001035
Michal Kazior581c25f2014-11-18 09:24:48 +02001036 /* original 802.11 header has a different DA and in
1037 * case of 4addr it may also have different SA
1038 */
1039 hdr = (struct ieee80211_hdr *)msdu->data;
1040 ether_addr_copy(ieee80211_get_DA(hdr), da);
1041 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1042}
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001043
Michal Kazior581c25f2014-11-18 09:24:48 +02001044static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
1045 struct sk_buff *msdu,
1046 enum htt_rx_mpdu_encrypt_type enctype)
1047{
1048 struct ieee80211_hdr *hdr;
1049 struct htt_rx_desc *rxd;
1050 size_t hdr_len, crypto_len;
1051 void *rfc1042;
1052 bool is_first, is_last, is_amsdu;
Michal Kazior784f69d2013-09-26 10:12:23 +03001053
Michal Kazior581c25f2014-11-18 09:24:48 +02001054 rxd = (void *)msdu->data - sizeof(*rxd);
1055 hdr = (void *)rxd->rx_hdr_status;
1056
1057 is_first = !!(rxd->msdu_end.info0 &
1058 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
1059 is_last = !!(rxd->msdu_end.info0 &
1060 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
1061 is_amsdu = !(is_first && is_last);
1062
1063 rfc1042 = hdr;
1064
1065 if (is_first) {
Michal Kazior784f69d2013-09-26 10:12:23 +03001066 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +02001067 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001068
Michal Kazior581c25f2014-11-18 09:24:48 +02001069 rfc1042 += round_up(hdr_len, 4) +
1070 round_up(crypto_len, 4);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001071 }
1072
Michal Kazior581c25f2014-11-18 09:24:48 +02001073 if (is_amsdu)
1074 rfc1042 += sizeof(struct amsdu_subframe_hdr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001075
Michal Kazior581c25f2014-11-18 09:24:48 +02001076 return rfc1042;
1077}
1078
1079static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
1080 struct sk_buff *msdu,
1081 struct ieee80211_rx_status *status,
1082 const u8 first_hdr[64],
1083 enum htt_rx_mpdu_encrypt_type enctype)
1084{
1085 struct ieee80211_hdr *hdr;
1086 struct ethhdr *eth;
1087 size_t hdr_len;
1088 void *rfc1042;
1089 u8 da[ETH_ALEN];
1090 u8 sa[ETH_ALEN];
1091
1092 /* Delivered decapped frame:
1093 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
1094 * [payload]
1095 */
1096
1097 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
1098 if (WARN_ON_ONCE(!rfc1042))
1099 return;
1100
1101 /* pull decapped header and copy SA & DA */
1102 eth = (struct ethhdr *)msdu->data;
1103 ether_addr_copy(da, eth->h_dest);
1104 ether_addr_copy(sa, eth->h_source);
1105 skb_pull(msdu, sizeof(struct ethhdr));
1106
1107 /* push rfc1042/llc/snap */
1108 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
1109 sizeof(struct rfc1042_hdr));
1110
1111 /* push original 802.11 header */
1112 hdr = (struct ieee80211_hdr *)first_hdr;
1113 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1114 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1115
1116 /* original 802.11 header has a different DA and in
1117 * case of 4addr it may also have different SA
1118 */
1119 hdr = (struct ieee80211_hdr *)msdu->data;
1120 ether_addr_copy(ieee80211_get_DA(hdr), da);
1121 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1122}
1123
1124static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
1125 struct sk_buff *msdu,
1126 struct ieee80211_rx_status *status,
1127 const u8 first_hdr[64])
1128{
1129 struct ieee80211_hdr *hdr;
1130 size_t hdr_len;
1131
1132 /* Delivered decapped frame:
1133 * [amsdu header] <-- replaced with 802.11 hdr
1134 * [rfc1042/llc]
1135 * [payload]
1136 */
1137
1138 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr));
1139
1140 hdr = (struct ieee80211_hdr *)first_hdr;
1141 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1142 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1143}
1144
1145static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
1146 struct sk_buff *msdu,
1147 struct ieee80211_rx_status *status,
1148 u8 first_hdr[64],
1149 enum htt_rx_mpdu_encrypt_type enctype,
1150 bool is_decrypted)
1151{
1152 struct htt_rx_desc *rxd;
1153 enum rx_msdu_decap_format decap;
1154 struct ieee80211_hdr *hdr;
1155
1156 /* First msdu's decapped header:
1157 * [802.11 header] <-- padded to 4 bytes long
1158 * [crypto param] <-- padded to 4 bytes long
1159 * [amsdu header] <-- only if A-MSDU
1160 * [rfc1042/llc]
1161 *
1162 * Other (2nd, 3rd, ..) msdu's decapped header:
1163 * [amsdu header] <-- only if A-MSDU
1164 * [rfc1042/llc]
1165 */
1166
1167 rxd = (void *)msdu->data - sizeof(*rxd);
1168 hdr = (void *)rxd->rx_hdr_status;
1169 decap = MS(__le32_to_cpu(rxd->msdu_start.info1),
1170 RX_MSDU_START_INFO1_DECAP_FORMAT);
1171
1172 switch (decap) {
1173 case RX_MSDU_DECAP_RAW:
1174 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
1175 is_decrypted);
1176 break;
1177 case RX_MSDU_DECAP_NATIVE_WIFI:
1178 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr);
1179 break;
1180 case RX_MSDU_DECAP_ETHERNET2_DIX:
1181 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
1182 break;
1183 case RX_MSDU_DECAP_8023_SNAP_LLC:
1184 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr);
1185 break;
1186 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001187}
1188
Michal Kazior605f81a2013-07-31 10:47:56 +02001189static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1190{
1191 struct htt_rx_desc *rxd;
1192 u32 flags, info;
1193 bool is_ip4, is_ip6;
1194 bool is_tcp, is_udp;
1195 bool ip_csum_ok, tcpudp_csum_ok;
1196
1197 rxd = (void *)skb->data - sizeof(*rxd);
1198 flags = __le32_to_cpu(rxd->attention.flags);
1199 info = __le32_to_cpu(rxd->msdu_start.info1);
1200
1201 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1202 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1203 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1204 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1205 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1206 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1207
1208 if (!is_ip4 && !is_ip6)
1209 return CHECKSUM_NONE;
1210 if (!is_tcp && !is_udp)
1211 return CHECKSUM_NONE;
1212 if (!ip_csum_ok)
1213 return CHECKSUM_NONE;
1214 if (!tcpudp_csum_ok)
1215 return CHECKSUM_NONE;
1216
1217 return CHECKSUM_UNNECESSARY;
1218}
1219
Michal Kazior581c25f2014-11-18 09:24:48 +02001220static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
1221{
1222 msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
1223}
1224
1225static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
1226 struct sk_buff_head *amsdu,
1227 struct ieee80211_rx_status *status)
1228{
1229 struct sk_buff *first;
1230 struct sk_buff *last;
1231 struct sk_buff *msdu;
1232 struct htt_rx_desc *rxd;
1233 struct ieee80211_hdr *hdr;
1234 enum htt_rx_mpdu_encrypt_type enctype;
1235 u8 first_hdr[64];
1236 u8 *qos;
1237 size_t hdr_len;
1238 bool has_fcs_err;
1239 bool has_crypto_err;
1240 bool has_tkip_err;
1241 bool has_peer_idx_invalid;
1242 bool is_decrypted;
1243 u32 attention;
1244
1245 if (skb_queue_empty(amsdu))
1246 return;
1247
1248 first = skb_peek(amsdu);
1249 rxd = (void *)first->data - sizeof(*rxd);
1250
1251 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1252 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
1253
1254 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
1255 * decapped header. It'll be used for undecapping of each MSDU.
1256 */
1257 hdr = (void *)rxd->rx_hdr_status;
1258 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1259 memcpy(first_hdr, hdr, hdr_len);
1260
1261 /* Each A-MSDU subframe will use the original header as the base and be
1262 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
1263 */
1264 hdr = (void *)first_hdr;
1265 qos = ieee80211_get_qos_ctl(hdr);
1266 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1267
1268 /* Some attention flags are valid only in the last MSDU. */
1269 last = skb_peek_tail(amsdu);
1270 rxd = (void *)last->data - sizeof(*rxd);
1271 attention = __le32_to_cpu(rxd->attention.flags);
1272
1273 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
1274 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
1275 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1276 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
1277
1278 /* Note: If hardware captures an encrypted frame that it can't decrypt,
1279 * e.g. due to fcs error, missing peer or invalid key data it will
1280 * report the frame as raw.
1281 */
1282 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
1283 !has_fcs_err &&
1284 !has_crypto_err &&
1285 !has_peer_idx_invalid);
1286
1287 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
1288 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
1289 RX_FLAG_MMIC_ERROR |
1290 RX_FLAG_DECRYPTED |
1291 RX_FLAG_IV_STRIPPED |
1292 RX_FLAG_MMIC_STRIPPED);
1293
1294 if (has_fcs_err)
1295 status->flag |= RX_FLAG_FAILED_FCS_CRC;
1296
1297 if (has_tkip_err)
1298 status->flag |= RX_FLAG_MMIC_ERROR;
1299
1300 if (is_decrypted)
1301 status->flag |= RX_FLAG_DECRYPTED |
1302 RX_FLAG_IV_STRIPPED |
1303 RX_FLAG_MMIC_STRIPPED;
1304
1305 skb_queue_walk(amsdu, msdu) {
1306 ath10k_htt_rx_h_csum_offload(msdu);
1307 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
1308 is_decrypted);
1309
1310 /* Undecapping involves copying the original 802.11 header back
1311 * to sk_buff. If frame is protected and hardware has decrypted
1312 * it then remove the protected bit.
1313 */
1314 if (!is_decrypted)
1315 continue;
1316
1317 hdr = (void *)msdu->data;
1318 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
1319 }
1320}
1321
1322static void ath10k_htt_rx_h_deliver(struct ath10k *ar,
1323 struct sk_buff_head *amsdu,
1324 struct ieee80211_rx_status *status)
1325{
1326 struct sk_buff *msdu;
1327
1328 while ((msdu = __skb_dequeue(amsdu))) {
1329 /* Setup per-MSDU flags */
1330 if (skb_queue_empty(amsdu))
1331 status->flag &= ~RX_FLAG_AMSDU_MORE;
1332 else
1333 status->flag |= RX_FLAG_AMSDU_MORE;
1334
1335 ath10k_process_rx(ar, status, msdu);
1336 }
1337}
1338
Michal Kazior9aa505d2014-11-18 09:24:47 +02001339static int ath10k_unchain_msdu(struct sk_buff_head *amsdu)
Ben Greearbfa35362014-03-03 14:07:09 -08001340{
Michal Kazior9aa505d2014-11-18 09:24:47 +02001341 struct sk_buff *skb, *first;
Ben Greearbfa35362014-03-03 14:07:09 -08001342 int space;
1343 int total_len = 0;
1344
1345 /* TODO: Might could optimize this by using
1346 * skb_try_coalesce or similar method to
1347 * decrease copying, or maybe get mac80211 to
1348 * provide a way to just receive a list of
1349 * skb?
1350 */
1351
Michal Kazior9aa505d2014-11-18 09:24:47 +02001352 first = __skb_dequeue(amsdu);
Ben Greearbfa35362014-03-03 14:07:09 -08001353
1354 /* Allocate total length all at once. */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001355 skb_queue_walk(amsdu, skb)
1356 total_len += skb->len;
Ben Greearbfa35362014-03-03 14:07:09 -08001357
Michal Kazior9aa505d2014-11-18 09:24:47 +02001358 space = total_len - skb_tailroom(first);
Ben Greearbfa35362014-03-03 14:07:09 -08001359 if ((space > 0) &&
Michal Kazior9aa505d2014-11-18 09:24:47 +02001360 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
Ben Greearbfa35362014-03-03 14:07:09 -08001361 /* TODO: bump some rx-oom error stat */
1362 /* put it back together so we can free the
1363 * whole list at once.
1364 */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001365 __skb_queue_head(amsdu, first);
Ben Greearbfa35362014-03-03 14:07:09 -08001366 return -1;
1367 }
1368
1369 /* Walk list again, copying contents into
1370 * msdu_head
1371 */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001372 while ((skb = __skb_dequeue(amsdu))) {
1373 skb_copy_from_linear_data(skb, skb_put(first, skb->len),
1374 skb->len);
1375 dev_kfree_skb_any(skb);
Ben Greearbfa35362014-03-03 14:07:09 -08001376 }
1377
Michal Kazior9aa505d2014-11-18 09:24:47 +02001378 __skb_queue_head(amsdu, first);
Ben Greearbfa35362014-03-03 14:07:09 -08001379 return 0;
1380}
1381
Michal Kazior581c25f2014-11-18 09:24:48 +02001382static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
1383 struct sk_buff_head *amsdu,
1384 bool chained)
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001385{
Michal Kazior581c25f2014-11-18 09:24:48 +02001386 struct sk_buff *first;
1387 struct htt_rx_desc *rxd;
1388 enum rx_msdu_decap_format decap;
Michal Kazior7aa7a722014-08-25 12:09:38 +02001389
Michal Kazior581c25f2014-11-18 09:24:48 +02001390 first = skb_peek(amsdu);
1391 rxd = (void *)first->data - sizeof(*rxd);
1392 decap = MS(__le32_to_cpu(rxd->msdu_start.info1),
1393 RX_MSDU_START_INFO1_DECAP_FORMAT);
1394
1395 if (!chained)
1396 return;
1397
1398 /* FIXME: Current unchaining logic can only handle simple case of raw
1399 * msdu chaining. If decapping is other than raw the chaining may be
1400 * more complex and this isn't handled by the current code. Don't even
1401 * try re-constructing such frames - it'll be pretty much garbage.
1402 */
1403 if (decap != RX_MSDU_DECAP_RAW ||
1404 skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
1405 __skb_queue_purge(amsdu);
1406 return;
1407 }
1408
1409 ath10k_unchain_msdu(amsdu);
1410}
1411
1412static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
1413 struct sk_buff_head *amsdu,
1414 struct ieee80211_rx_status *rx_status)
1415{
1416 struct sk_buff *msdu;
1417 struct htt_rx_desc *rxd;
Michal Kaziord67d0a02014-11-24 15:34:08 +01001418 bool is_mgmt;
1419 bool has_fcs_err;
Michal Kazior581c25f2014-11-18 09:24:48 +02001420
1421 msdu = skb_peek(amsdu);
1422 rxd = (void *)msdu->data - sizeof(*rxd);
1423
1424 /* FIXME: It might be a good idea to do some fuzzy-testing to drop
1425 * invalid/dangerous frames.
1426 */
1427
1428 if (!rx_status->freq) {
1429 ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001430 return false;
1431 }
1432
Michal Kaziord67d0a02014-11-24 15:34:08 +01001433 is_mgmt = !!(rxd->attention.flags &
1434 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
1435 has_fcs_err = !!(rxd->attention.flags &
1436 __cpu_to_le32(RX_ATTENTION_FLAGS_FCS_ERR));
1437
Michal Kazior581c25f2014-11-18 09:24:48 +02001438 /* Management frames are handled via WMI events. The pros of such
1439 * approach is that channel is explicitly provided in WMI events
1440 * whereas HTT doesn't provide channel information for Rxed frames.
Michal Kaziord67d0a02014-11-24 15:34:08 +01001441 *
1442 * However some firmware revisions don't report corrupted frames via
1443 * WMI so don't drop them.
Michal Kazior581c25f2014-11-18 09:24:48 +02001444 */
Michal Kaziord67d0a02014-11-24 15:34:08 +01001445 if (is_mgmt && !has_fcs_err) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001446 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001447 return false;
1448 }
1449
Michal Kazior581c25f2014-11-18 09:24:48 +02001450 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
1451 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001452 return false;
1453 }
1454
1455 return true;
1456}
1457
Michal Kazior581c25f2014-11-18 09:24:48 +02001458static void ath10k_htt_rx_h_filter(struct ath10k *ar,
1459 struct sk_buff_head *amsdu,
1460 struct ieee80211_rx_status *rx_status)
1461{
1462 if (skb_queue_empty(amsdu))
1463 return;
1464
1465 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
1466 return;
1467
1468 __skb_queue_purge(amsdu);
1469}
1470
Kalle Valo5e3dd152013-06-12 20:52:10 +03001471static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1472 struct htt_rx_indication *rx)
1473{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001474 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001475 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001476 struct htt_rx_indication_mpdu_range *mpdu_ranges;
Michal Kazior9aa505d2014-11-18 09:24:47 +02001477 struct sk_buff_head amsdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001478 int num_mpdu_ranges;
1479 int fw_desc_len;
1480 u8 *fw_desc;
Michal Kaziord5406902014-11-18 09:24:47 +02001481 int i, ret, mpdu_count = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001482
Michal Kazior45967082014-02-27 18:50:05 +02001483 lockdep_assert_held(&htt->rx_ring.lock);
1484
Michal Kaziore0bd7512014-11-18 09:24:48 +02001485 if (htt->rx_confused)
1486 return;
1487
Kalle Valo5e3dd152013-06-12 20:52:10 +03001488 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1489 fw_desc = (u8 *)&rx->fw_desc;
1490
1491 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1492 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1493 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1494
Michal Kazior7aa7a722014-08-25 12:09:38 +02001495 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001496 rx, sizeof(*rx) +
1497 (sizeof(struct htt_rx_indication_mpdu_range) *
1498 num_mpdu_ranges));
1499
Michal Kaziord5406902014-11-18 09:24:47 +02001500 for (i = 0; i < num_mpdu_ranges; i++)
1501 mpdu_count += mpdu_ranges[i].mpdu_count;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001502
Michal Kaziord5406902014-11-18 09:24:47 +02001503 while (mpdu_count--) {
Michal Kaziord5406902014-11-18 09:24:47 +02001504 __skb_queue_head_init(&amsdu);
1505 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc,
Michal Kaziorf0e27702014-11-18 09:24:49 +02001506 &fw_desc_len, &amsdu);
Michal Kaziord5406902014-11-18 09:24:47 +02001507 if (ret < 0) {
Michal Kaziore0bd7512014-11-18 09:24:48 +02001508 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
Michal Kaziord5406902014-11-18 09:24:47 +02001509 __skb_queue_purge(&amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +02001510 /* FIXME: It's probably a good idea to reboot the
1511 * device instead of leaving it inoperable.
1512 */
1513 htt->rx_confused = true;
1514 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001515 }
Michal Kaziord5406902014-11-18 09:24:47 +02001516
Michal Kaziorb9fd8a82014-11-18 09:24:49 +02001517 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status);
Michal Kazior581c25f2014-11-18 09:24:48 +02001518 ath10k_htt_rx_h_unchain(ar, &amsdu, ret > 0);
1519 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
1520 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
1521 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001522 }
1523
Michal Kazior6e712d42013-09-24 10:18:36 +02001524 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001525}
1526
1527static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
Kalle Valo5b07e072014-09-14 12:50:06 +03001528 struct htt_rx_fragment_indication *frag)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001529{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001530 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001531 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Michal Kazior9aa505d2014-11-18 09:24:47 +02001532 struct sk_buff_head amsdu;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001533 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001534 u8 *fw_desc;
Michal Kazior581c25f2014-11-18 09:24:48 +02001535 int fw_desc_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001536
1537 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1538 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1539
Michal Kazior9aa505d2014-11-18 09:24:47 +02001540 __skb_queue_head_init(&amsdu);
Michal Kazior45967082014-02-27 18:50:05 +02001541
1542 spin_lock_bh(&htt->rx_ring.lock);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001543 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
Michal Kaziorf0e27702014-11-18 09:24:49 +02001544 &amsdu);
Michal Kazior45967082014-02-27 18:50:05 +02001545 spin_unlock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001546
Michal Kazior686687c2014-10-23 17:04:24 +03001547 tasklet_schedule(&htt->rx_replenish_task);
1548
Michal Kazior7aa7a722014-08-25 12:09:38 +02001549 ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001550
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001551 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001552 ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001553 ret);
Michal Kazior9aa505d2014-11-18 09:24:47 +02001554 __skb_queue_purge(&amsdu);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001555 return;
1556 }
1557
Michal Kazior9aa505d2014-11-18 09:24:47 +02001558 if (skb_queue_len(&amsdu) != 1) {
1559 ath10k_warn(ar, "failed to pop frag amsdu: too many msdus\n");
1560 __skb_queue_purge(&amsdu);
1561 return;
1562 }
1563
Michal Kazior89a5a312014-11-18 09:24:49 +02001564 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status);
Michal Kazior581c25f2014-11-18 09:24:48 +02001565 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
1566 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
1567 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001568
Kalle Valo5e3dd152013-06-12 20:52:10 +03001569 if (fw_desc_len > 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001570 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001571 "expecting more fragmented rx in one indication %d\n",
1572 fw_desc_len);
1573 }
1574}
1575
Michal Kazior6c5151a2014-02-27 18:50:04 +02001576static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
1577 struct sk_buff *skb)
1578{
1579 struct ath10k_htt *htt = &ar->htt;
1580 struct htt_resp *resp = (struct htt_resp *)skb->data;
1581 struct htt_tx_done tx_done = {};
1582 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1583 __le16 msdu_id;
1584 int i;
1585
Michal Kazior45967082014-02-27 18:50:05 +02001586 lockdep_assert_held(&htt->tx_lock);
1587
Michal Kazior6c5151a2014-02-27 18:50:04 +02001588 switch (status) {
1589 case HTT_DATA_TX_STATUS_NO_ACK:
1590 tx_done.no_ack = true;
1591 break;
1592 case HTT_DATA_TX_STATUS_OK:
1593 break;
1594 case HTT_DATA_TX_STATUS_DISCARD:
1595 case HTT_DATA_TX_STATUS_POSTPONE:
1596 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1597 tx_done.discard = true;
1598 break;
1599 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001600 ath10k_warn(ar, "unhandled tx completion status %d\n", status);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001601 tx_done.discard = true;
1602 break;
1603 }
1604
Michal Kazior7aa7a722014-08-25 12:09:38 +02001605 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
Michal Kazior6c5151a2014-02-27 18:50:04 +02001606 resp->data_tx_completion.num_msdus);
1607
1608 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1609 msdu_id = resp->data_tx_completion.msdus[i];
1610 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1611 ath10k_txrx_tx_unref(htt, &tx_done);
1612 }
1613}
1614
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001615static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
1616{
1617 struct htt_rx_addba *ev = &resp->rx_addba;
1618 struct ath10k_peer *peer;
1619 struct ath10k_vif *arvif;
1620 u16 info0, tid, peer_id;
1621
1622 info0 = __le16_to_cpu(ev->info0);
1623 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1624 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1625
Michal Kazior7aa7a722014-08-25 12:09:38 +02001626 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001627 "htt rx addba tid %hu peer_id %hu size %hhu\n",
1628 tid, peer_id, ev->window_size);
1629
1630 spin_lock_bh(&ar->data_lock);
1631 peer = ath10k_peer_find_by_id(ar, peer_id);
1632 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001633 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001634 peer_id);
1635 spin_unlock_bh(&ar->data_lock);
1636 return;
1637 }
1638
1639 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1640 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001641 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001642 peer->vdev_id);
1643 spin_unlock_bh(&ar->data_lock);
1644 return;
1645 }
1646
Michal Kazior7aa7a722014-08-25 12:09:38 +02001647 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001648 "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
1649 peer->addr, tid, ev->window_size);
1650
1651 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1652 spin_unlock_bh(&ar->data_lock);
1653}
1654
1655static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
1656{
1657 struct htt_rx_delba *ev = &resp->rx_delba;
1658 struct ath10k_peer *peer;
1659 struct ath10k_vif *arvif;
1660 u16 info0, tid, peer_id;
1661
1662 info0 = __le16_to_cpu(ev->info0);
1663 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1664 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1665
Michal Kazior7aa7a722014-08-25 12:09:38 +02001666 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001667 "htt rx delba tid %hu peer_id %hu\n",
1668 tid, peer_id);
1669
1670 spin_lock_bh(&ar->data_lock);
1671 peer = ath10k_peer_find_by_id(ar, peer_id);
1672 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001673 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001674 peer_id);
1675 spin_unlock_bh(&ar->data_lock);
1676 return;
1677 }
1678
1679 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1680 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001681 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001682 peer->vdev_id);
1683 spin_unlock_bh(&ar->data_lock);
1684 return;
1685 }
1686
Michal Kazior7aa7a722014-08-25 12:09:38 +02001687 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001688 "htt rx stop rx ba session sta %pM tid %hu\n",
1689 peer->addr, tid);
1690
1691 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1692 spin_unlock_bh(&ar->data_lock);
1693}
1694
Michal Kaziorc5450702015-01-24 12:14:48 +02001695static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list,
1696 struct sk_buff_head *amsdu)
1697{
1698 struct sk_buff *msdu;
1699 struct htt_rx_desc *rxd;
1700
1701 if (skb_queue_empty(list))
1702 return -ENOBUFS;
1703
1704 if (WARN_ON(!skb_queue_empty(amsdu)))
1705 return -EINVAL;
1706
1707 while ((msdu = __skb_dequeue(list))) {
1708 __skb_queue_tail(amsdu, msdu);
1709
1710 rxd = (void *)msdu->data - sizeof(*rxd);
1711 if (rxd->msdu_end.info0 &
1712 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
1713 break;
1714 }
1715
1716 msdu = skb_peek_tail(amsdu);
1717 rxd = (void *)msdu->data - sizeof(*rxd);
1718 if (!(rxd->msdu_end.info0 &
1719 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
1720 skb_queue_splice_init(amsdu, list);
1721 return -EAGAIN;
1722 }
1723
1724 return 0;
1725}
1726
1727static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
1728 struct sk_buff *skb)
1729{
1730 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1731
1732 if (!ieee80211_has_protected(hdr->frame_control))
1733 return;
1734
1735 /* Offloaded frames are already decrypted but firmware insists they are
1736 * protected in the 802.11 header. Strip the flag. Otherwise mac80211
1737 * will drop the frame.
1738 */
1739
1740 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
1741 status->flag |= RX_FLAG_DECRYPTED |
1742 RX_FLAG_IV_STRIPPED |
1743 RX_FLAG_MMIC_STRIPPED;
1744}
1745
1746static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
1747 struct sk_buff_head *list)
1748{
1749 struct ath10k_htt *htt = &ar->htt;
1750 struct ieee80211_rx_status *status = &htt->rx_status;
1751 struct htt_rx_offload_msdu *rx;
1752 struct sk_buff *msdu;
1753 size_t offset;
1754
1755 while ((msdu = __skb_dequeue(list))) {
1756 /* Offloaded frames don't have Rx descriptor. Instead they have
1757 * a short meta information header.
1758 */
1759
1760 rx = (void *)msdu->data;
1761
1762 skb_put(msdu, sizeof(*rx));
1763 skb_pull(msdu, sizeof(*rx));
1764
1765 if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
1766 ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
1767 dev_kfree_skb_any(msdu);
1768 continue;
1769 }
1770
1771 skb_put(msdu, __le16_to_cpu(rx->msdu_len));
1772
1773 /* Offloaded rx header length isn't multiple of 2 nor 4 so the
1774 * actual payload is unaligned. Align the frame. Otherwise
1775 * mac80211 complains. This shouldn't reduce performance much
1776 * because these offloaded frames are rare.
1777 */
1778 offset = 4 - ((unsigned long)msdu->data & 3);
1779 skb_put(msdu, offset);
1780 memmove(msdu->data + offset, msdu->data, msdu->len);
1781 skb_pull(msdu, offset);
1782
1783 /* FIXME: The frame is NWifi. Re-construct QoS Control
1784 * if possible later.
1785 */
1786
1787 memset(status, 0, sizeof(*status));
1788 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
1789
1790 ath10k_htt_rx_h_rx_offload_prot(status, msdu);
1791 ath10k_htt_rx_h_channel(ar, status);
1792 ath10k_process_rx(ar, status, msdu);
1793 }
1794}
1795
1796static void ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
1797{
1798 struct ath10k_htt *htt = &ar->htt;
1799 struct htt_resp *resp = (void *)skb->data;
1800 struct ieee80211_rx_status *status = &htt->rx_status;
1801 struct sk_buff_head list;
1802 struct sk_buff_head amsdu;
1803 u16 peer_id;
1804 u16 msdu_count;
1805 u8 vdev_id;
1806 u8 tid;
1807 bool offload;
1808 bool frag;
1809 int ret;
1810
1811 lockdep_assert_held(&htt->rx_ring.lock);
1812
1813 if (htt->rx_confused)
1814 return;
1815
1816 skb_pull(skb, sizeof(resp->hdr));
1817 skb_pull(skb, sizeof(resp->rx_in_ord_ind));
1818
1819 peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
1820 msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
1821 vdev_id = resp->rx_in_ord_ind.vdev_id;
1822 tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
1823 offload = !!(resp->rx_in_ord_ind.info &
1824 HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
1825 frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
1826
1827 ath10k_dbg(ar, ATH10K_DBG_HTT,
1828 "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
1829 vdev_id, peer_id, tid, offload, frag, msdu_count);
1830
1831 if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) {
1832 ath10k_warn(ar, "dropping invalid in order rx indication\n");
1833 return;
1834 }
1835
1836 /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
1837 * extracted and processed.
1838 */
1839 __skb_queue_head_init(&list);
1840 ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list);
1841 if (ret < 0) {
1842 ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
1843 htt->rx_confused = true;
1844 return;
1845 }
1846
1847 /* Offloaded frames are very different and need to be handled
1848 * separately.
1849 */
1850 if (offload)
1851 ath10k_htt_rx_h_rx_offload(ar, &list);
1852
1853 while (!skb_queue_empty(&list)) {
1854 __skb_queue_head_init(&amsdu);
1855 ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu);
1856 switch (ret) {
1857 case 0:
1858 /* Note: The in-order indication may report interleaved
1859 * frames from different PPDUs meaning reported rx rate
1860 * to mac80211 isn't accurate/reliable. It's still
1861 * better to report something than nothing though. This
1862 * should still give an idea about rx rate to the user.
1863 */
1864 ath10k_htt_rx_h_ppdu(ar, &amsdu, status);
1865 ath10k_htt_rx_h_filter(ar, &amsdu, status);
1866 ath10k_htt_rx_h_mpdu(ar, &amsdu, status);
1867 ath10k_htt_rx_h_deliver(ar, &amsdu, status);
1868 break;
1869 case -EAGAIN:
1870 /* fall through */
1871 default:
1872 /* Should not happen. */
1873 ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
1874 htt->rx_confused = true;
1875 __skb_queue_purge(&list);
1876 return;
1877 }
1878 }
1879
1880 tasklet_schedule(&htt->rx_replenish_task);
1881}
1882
Kalle Valo5e3dd152013-06-12 20:52:10 +03001883void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
1884{
Michal Kazioredb82362013-07-05 16:15:14 +03001885 struct ath10k_htt *htt = &ar->htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001886 struct htt_resp *resp = (struct htt_resp *)skb->data;
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02001887 enum htt_t2h_msg_type type;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001888
1889 /* confirm alignment */
1890 if (!IS_ALIGNED((unsigned long)skb->data, 4))
Michal Kazior7aa7a722014-08-25 12:09:38 +02001891 ath10k_warn(ar, "unaligned htt message, expect trouble\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001892
Michal Kazior7aa7a722014-08-25 12:09:38 +02001893 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001894 resp->hdr.msg_type);
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02001895
1896 if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
1897 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
1898 resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
1899 dev_kfree_skb_any(skb);
1900 return;
1901 }
1902 type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
1903
1904 switch (type) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001905 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
1906 htt->target_version_major = resp->ver_resp.major;
1907 htt->target_version_minor = resp->ver_resp.minor;
1908 complete(&htt->target_version_received);
1909 break;
1910 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001911 case HTT_T2H_MSG_TYPE_RX_IND:
Michal Kazior45967082014-02-27 18:50:05 +02001912 spin_lock_bh(&htt->rx_ring.lock);
1913 __skb_queue_tail(&htt->rx_compl_q, skb);
1914 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001915 tasklet_schedule(&htt->txrx_compl_task);
1916 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001917 case HTT_T2H_MSG_TYPE_PEER_MAP: {
1918 struct htt_peer_map_event ev = {
1919 .vdev_id = resp->peer_map.vdev_id,
1920 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
1921 };
1922 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
1923 ath10k_peer_map_event(htt, &ev);
1924 break;
1925 }
1926 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
1927 struct htt_peer_unmap_event ev = {
1928 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
1929 };
1930 ath10k_peer_unmap_event(htt, &ev);
1931 break;
1932 }
1933 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
1934 struct htt_tx_done tx_done = {};
1935 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
1936
1937 tx_done.msdu_id =
1938 __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
1939
1940 switch (status) {
1941 case HTT_MGMT_TX_STATUS_OK:
1942 break;
1943 case HTT_MGMT_TX_STATUS_RETRY:
1944 tx_done.no_ack = true;
1945 break;
1946 case HTT_MGMT_TX_STATUS_DROP:
1947 tx_done.discard = true;
1948 break;
1949 }
1950
Michal Kazior6c5151a2014-02-27 18:50:04 +02001951 spin_lock_bh(&htt->tx_lock);
Michal Kazior0a89f8a2013-09-18 14:43:20 +02001952 ath10k_txrx_tx_unref(htt, &tx_done);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001953 spin_unlock_bh(&htt->tx_lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001954 break;
1955 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001956 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
1957 spin_lock_bh(&htt->tx_lock);
1958 __skb_queue_tail(&htt->tx_compl_q, skb);
1959 spin_unlock_bh(&htt->tx_lock);
1960 tasklet_schedule(&htt->txrx_compl_task);
1961 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001962 case HTT_T2H_MSG_TYPE_SEC_IND: {
1963 struct ath10k *ar = htt->ar;
1964 struct htt_security_indication *ev = &resp->security_indication;
1965
Michal Kazior7aa7a722014-08-25 12:09:38 +02001966 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001967 "sec ind peer_id %d unicast %d type %d\n",
1968 __le16_to_cpu(ev->peer_id),
1969 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
1970 MS(ev->flags, HTT_SECURITY_TYPE));
1971 complete(&ar->install_key_done);
1972 break;
1973 }
1974 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001975 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001976 skb->data, skb->len);
1977 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
1978 break;
1979 }
1980 case HTT_T2H_MSG_TYPE_TEST:
Kalle Valo5e3dd152013-06-12 20:52:10 +03001981 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001982 case HTT_T2H_MSG_TYPE_STATS_CONF:
Michal Kaziord35a6c12014-09-02 11:00:21 +03001983 trace_ath10k_htt_stats(ar, skb->data, skb->len);
Kalle Valoa9bf0502013-09-03 11:43:55 +03001984 break;
1985 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
Michal Kazior708b9bd2014-07-21 20:52:59 +03001986 /* Firmware can return tx frames if it's unable to fully
1987 * process them and suspects host may be able to fix it. ath10k
1988 * sends all tx frames as already inspected so this shouldn't
1989 * happen unless fw has a bug.
1990 */
Michal Kazior7aa7a722014-08-25 12:09:38 +02001991 ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
Michal Kazior708b9bd2014-07-21 20:52:59 +03001992 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001993 case HTT_T2H_MSG_TYPE_RX_ADDBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001994 ath10k_htt_rx_addba(ar, resp);
1995 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001996 case HTT_T2H_MSG_TYPE_RX_DELBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001997 ath10k_htt_rx_delba(ar, resp);
1998 break;
Rajkumar Manoharanbfdd7932014-10-03 08:02:40 +03001999 case HTT_T2H_MSG_TYPE_PKTLOG: {
2000 struct ath10k_pktlog_hdr *hdr =
2001 (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload;
2002
2003 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
2004 sizeof(*hdr) +
2005 __le16_to_cpu(hdr->size));
2006 break;
2007 }
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02002008 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
2009 /* Ignore this event because mac80211 takes care of Rx
2010 * aggregation reordering.
2011 */
2012 break;
2013 }
Michal Kaziorc5450702015-01-24 12:14:48 +02002014 case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
2015 spin_lock_bh(&htt->rx_ring.lock);
2016 __skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
2017 spin_unlock_bh(&htt->rx_ring.lock);
2018 tasklet_schedule(&htt->txrx_compl_task);
2019 return;
2020 }
2021 case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND:
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02002022 break;
2023 case HTT_T2H_MSG_TYPE_CHAN_CHANGE:
Michal Kaziorc5450702015-01-24 12:14:48 +02002024 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002025 default:
Michal Kazior2358a542014-10-02 13:32:55 +02002026 ath10k_warn(ar, "htt event (%d) not handled\n",
2027 resp->hdr.msg_type);
Michal Kazior7aa7a722014-08-25 12:09:38 +02002028 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03002029 skb->data, skb->len);
2030 break;
2031 };
2032
2033 /* Free the indication buffer */
2034 dev_kfree_skb_any(skb);
2035}
Michal Kazior6c5151a2014-02-27 18:50:04 +02002036
2037static void ath10k_htt_txrx_compl_task(unsigned long ptr)
2038{
2039 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
Michal Kaziorc5450702015-01-24 12:14:48 +02002040 struct ath10k *ar = htt->ar;
Michal Kazior6c5151a2014-02-27 18:50:04 +02002041 struct htt_resp *resp;
2042 struct sk_buff *skb;
2043
Michal Kazior45967082014-02-27 18:50:05 +02002044 spin_lock_bh(&htt->tx_lock);
2045 while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02002046 ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
2047 dev_kfree_skb_any(skb);
2048 }
Michal Kazior45967082014-02-27 18:50:05 +02002049 spin_unlock_bh(&htt->tx_lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002050
Michal Kazior45967082014-02-27 18:50:05 +02002051 spin_lock_bh(&htt->rx_ring.lock);
2052 while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02002053 resp = (struct htt_resp *)skb->data;
2054 ath10k_htt_rx_handler(htt, &resp->rx_ind);
2055 dev_kfree_skb_any(skb);
2056 }
Michal Kaziorc5450702015-01-24 12:14:48 +02002057
2058 while ((skb = __skb_dequeue(&htt->rx_in_ord_compl_q))) {
2059 ath10k_htt_rx_in_ord_ind(ar, skb);
2060 dev_kfree_skb_any(skb);
2061 }
Michal Kazior45967082014-02-27 18:50:05 +02002062 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002063}