blob: 332abc751c18146f48aad0450fb218df3fa500cf [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Michal Kazioredb82362013-07-05 16:15:14 +030018#include "core.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030019#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
Kalle Valoa9bf0502013-09-03 11:43:55 +030023#include "trace.h"
Michal Kazioraa5b4fb2014-07-23 12:20:33 +020024#include "mac.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030025
26#include <linux/log2.h>
27
28/* slightly larger than one large A-MPDU */
29#define HTT_RX_RING_SIZE_MIN 128
30
31/* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
32#define HTT_RX_RING_SIZE_MAX 2048
33
34#define HTT_RX_AVG_FRM_BYTES 1000
35
36/* ms, very conservative */
37#define HTT_RX_HOST_LATENCY_MAX_MS 20
38
39/* ms, conservative */
40#define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
41
42/* when under memory pressure rx ring refill may fail and needs a retry */
43#define HTT_RX_RING_REFILL_RETRY_MS 50
44
Michal Kaziorf6dc2092013-09-26 10:12:22 +030045static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +020046static void ath10k_htt_txrx_compl_task(unsigned long ptr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +030047
Kalle Valo5e3dd152013-06-12 20:52:10 +030048static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
49{
50 int size;
51
52 /*
53 * It is expected that the host CPU will typically be able to
54 * service the rx indication from one A-MPDU before the rx
55 * indication from the subsequent A-MPDU happens, roughly 1-2 ms
56 * later. However, the rx ring should be sized very conservatively,
57 * to accomodate the worst reasonable delay before the host CPU
58 * services a rx indication interrupt.
59 *
60 * The rx ring need not be kept full of empty buffers. In theory,
61 * the htt host SW can dynamically track the low-water mark in the
62 * rx ring, and dynamically adjust the level to which the rx ring
63 * is filled with empty buffers, to dynamically meet the desired
64 * low-water mark.
65 *
66 * In contrast, it's difficult to resize the rx ring itself, once
67 * it's in use. Thus, the ring itself should be sized very
68 * conservatively, while the degree to which the ring is filled
69 * with empty buffers should be sized moderately conservatively.
70 */
71
72 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
73 size =
74 htt->max_throughput_mbps +
75 1000 /
76 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
77
78 if (size < HTT_RX_RING_SIZE_MIN)
79 size = HTT_RX_RING_SIZE_MIN;
80
81 if (size > HTT_RX_RING_SIZE_MAX)
82 size = HTT_RX_RING_SIZE_MAX;
83
84 size = roundup_pow_of_two(size);
85
86 return size;
87}
88
89static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
90{
91 int size;
92
93 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
94 size =
95 htt->max_throughput_mbps *
96 1000 /
97 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
98
99 /*
100 * Make sure the fill level is at least 1 less than the ring size.
101 * Leaving 1 element empty allows the SW to easily distinguish
102 * between a full ring vs. an empty ring.
103 */
104 if (size >= htt->rx_ring.size)
105 size = htt->rx_ring.size - 1;
106
107 return size;
108}
109
110static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
111{
112 struct sk_buff *skb;
113 struct ath10k_skb_cb *cb;
114 int i;
115
116 for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
117 skb = htt->rx_ring.netbufs_ring[i];
118 cb = ATH10K_SKB_CB(skb);
119 dma_unmap_single(htt->ar->dev, cb->paddr,
120 skb->len + skb_tailroom(skb),
121 DMA_FROM_DEVICE);
122 dev_kfree_skb_any(skb);
123 }
124
125 htt->rx_ring.fill_cnt = 0;
126}
127
128static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
129{
130 struct htt_rx_desc *rx_desc;
131 struct sk_buff *skb;
132 dma_addr_t paddr;
133 int ret = 0, idx;
134
Kalle Valo8cc7f262014-09-14 12:50:39 +0300135 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300136 while (num > 0) {
137 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
138 if (!skb) {
139 ret = -ENOMEM;
140 goto fail;
141 }
142
143 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
144 skb_pull(skb,
145 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
146 skb->data);
147
148 /* Clear rx_desc attention word before posting to Rx ring */
149 rx_desc = (struct htt_rx_desc *)skb->data;
150 rx_desc->attention.flags = __cpu_to_le32(0);
151
152 paddr = dma_map_single(htt->ar->dev, skb->data,
153 skb->len + skb_tailroom(skb),
154 DMA_FROM_DEVICE);
155
156 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
157 dev_kfree_skb_any(skb);
158 ret = -ENOMEM;
159 goto fail;
160 }
161
162 ATH10K_SKB_CB(skb)->paddr = paddr;
163 htt->rx_ring.netbufs_ring[idx] = skb;
164 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
165 htt->rx_ring.fill_cnt++;
166
167 num--;
168 idx++;
169 idx &= htt->rx_ring.size_mask;
170 }
171
172fail:
Kalle Valo8cc7f262014-09-14 12:50:39 +0300173 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300174 return ret;
175}
176
177static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
178{
179 lockdep_assert_held(&htt->rx_ring.lock);
180 return __ath10k_htt_rx_ring_fill_n(htt, num);
181}
182
183static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
184{
Michal Kazior6e712d42013-09-24 10:18:36 +0200185 int ret, num_deficit, num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300186
Michal Kazior6e712d42013-09-24 10:18:36 +0200187 /* Refilling the whole RX ring buffer proves to be a bad idea. The
188 * reason is RX may take up significant amount of CPU cycles and starve
189 * other tasks, e.g. TX on an ethernet device while acting as a bridge
190 * with ath10k wlan interface. This ended up with very poor performance
191 * once CPU the host system was overwhelmed with RX on ath10k.
192 *
193 * By limiting the number of refills the replenishing occurs
194 * progressively. This in turns makes use of the fact tasklets are
195 * processed in FIFO order. This means actual RX processing can starve
196 * out refilling. If there's not enough buffers on RX ring FW will not
197 * report RX until it is refilled with enough buffers. This
198 * automatically balances load wrt to CPU power.
199 *
200 * This probably comes at a cost of lower maximum throughput but
201 * improves the avarage and stability. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300202 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6e712d42013-09-24 10:18:36 +0200203 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
204 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
205 num_deficit -= num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300206 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
207 if (ret == -ENOMEM) {
208 /*
209 * Failed to fill it to the desired level -
210 * we'll start a timer and try again next time.
211 * As long as enough buffers are left in the ring for
212 * another A-MPDU rx, no special recovery is needed.
213 */
214 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
215 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
Michal Kazior6e712d42013-09-24 10:18:36 +0200216 } else if (num_deficit > 0) {
217 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300218 }
219 spin_unlock_bh(&htt->rx_ring.lock);
220}
221
222static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
223{
224 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
Kalle Valoaf762c02014-09-14 12:50:17 +0300225
Kalle Valo5e3dd152013-06-12 20:52:10 +0300226 ath10k_htt_rx_msdu_buff_replenish(htt);
227}
228
Michal Kazior3e841fd2014-05-14 16:23:31 +0300229static void ath10k_htt_rx_ring_clean_up(struct ath10k_htt *htt)
230{
231 struct sk_buff *skb;
232 int i;
233
234 for (i = 0; i < htt->rx_ring.size; i++) {
235 skb = htt->rx_ring.netbufs_ring[i];
236 if (!skb)
237 continue;
238
239 dma_unmap_single(htt->ar->dev, ATH10K_SKB_CB(skb)->paddr,
240 skb->len + skb_tailroom(skb),
241 DMA_FROM_DEVICE);
242 dev_kfree_skb_any(skb);
243 htt->rx_ring.netbufs_ring[i] = NULL;
244 }
245}
246
Michal Kazior95bf21f2014-05-16 17:15:39 +0300247void ath10k_htt_rx_free(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300248{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300249 del_timer_sync(&htt->rx_ring.refill_retry_timer);
Michal Kazior6e712d42013-09-24 10:18:36 +0200250 tasklet_kill(&htt->rx_replenish_task);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200251 tasklet_kill(&htt->txrx_compl_task);
252
253 skb_queue_purge(&htt->tx_compl_q);
254 skb_queue_purge(&htt->rx_compl_q);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300255
Michal Kazior3e841fd2014-05-14 16:23:31 +0300256 ath10k_htt_rx_ring_clean_up(htt);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300257
258 dma_free_coherent(htt->ar->dev,
259 (htt->rx_ring.size *
260 sizeof(htt->rx_ring.paddrs_ring)),
261 htt->rx_ring.paddrs_ring,
262 htt->rx_ring.base_paddr);
263
264 dma_free_coherent(htt->ar->dev,
265 sizeof(*htt->rx_ring.alloc_idx.vaddr),
266 htt->rx_ring.alloc_idx.vaddr,
267 htt->rx_ring.alloc_idx.paddr);
268
269 kfree(htt->rx_ring.netbufs_ring);
270}
271
272static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
273{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200274 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300275 int idx;
276 struct sk_buff *msdu;
277
Michal Kazior45967082014-02-27 18:50:05 +0200278 lockdep_assert_held(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300279
Michal Kazior8d60ee82014-02-27 18:50:05 +0200280 if (htt->rx_ring.fill_cnt == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200281 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
Michal Kazior8d60ee82014-02-27 18:50:05 +0200282 return NULL;
283 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300284
285 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
286 msdu = htt->rx_ring.netbufs_ring[idx];
Michal Kazior3e841fd2014-05-14 16:23:31 +0300287 htt->rx_ring.netbufs_ring[idx] = NULL;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300288
289 idx++;
290 idx &= htt->rx_ring.size_mask;
291 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
292 htt->rx_ring.fill_cnt--;
293
Michal Kazior4de02802014-10-23 17:04:23 +0300294 dma_unmap_single(htt->ar->dev,
295 ATH10K_SKB_CB(msdu)->paddr,
296 msdu->len + skb_tailroom(msdu),
297 DMA_FROM_DEVICE);
298 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
299 msdu->data, msdu->len + skb_tailroom(msdu));
Michal Kazior4de02802014-10-23 17:04:23 +0300300
Kalle Valo5e3dd152013-06-12 20:52:10 +0300301 return msdu;
302}
303
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100304/* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300305static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
306 u8 **fw_desc, int *fw_desc_len,
Michal Kaziorf0e27702014-11-18 09:24:49 +0200307 struct sk_buff_head *amsdu)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300308{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200309 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300310 int msdu_len, msdu_chaining = 0;
Michal Kazior9aa505d2014-11-18 09:24:47 +0200311 struct sk_buff *msdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300312 struct htt_rx_desc *rx_desc;
313
Michal Kazior45967082014-02-27 18:50:05 +0200314 lockdep_assert_held(&htt->rx_ring.lock);
315
Michal Kazior9aa505d2014-11-18 09:24:47 +0200316 for (;;) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300317 int last_msdu, msdu_len_invalid, msdu_chained;
318
Michal Kazior9aa505d2014-11-18 09:24:47 +0200319 msdu = ath10k_htt_rx_netbuf_pop(htt);
320 if (!msdu) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200321 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200322 return -ENOENT;
Michal Kazior9aa505d2014-11-18 09:24:47 +0200323 }
324
325 __skb_queue_tail(amsdu, msdu);
326
Kalle Valo5e3dd152013-06-12 20:52:10 +0300327 rx_desc = (struct htt_rx_desc *)msdu->data;
328
329 /* FIXME: we must report msdu payload since this is what caller
330 * expects now */
331 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
332 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
333
334 /*
335 * Sanity check - confirm the HW is finished filling in the
336 * rx data.
337 * If the HW and SW are working correctly, then it's guaranteed
338 * that the HW's MAC DMA is done before this point in the SW.
339 * To prevent the case that we handle a stale Rx descriptor,
340 * just assert for now until we have a way to recover.
341 */
342 if (!(__le32_to_cpu(rx_desc->attention.flags)
343 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200344 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200345 return -EIO;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300346 }
347
348 /*
349 * Copy the FW rx descriptor for this MSDU from the rx
350 * indication message into the MSDU's netbuf. HL uses the
351 * same rx indication message definition as LL, and simply
352 * appends new info (fields from the HW rx desc, and the
353 * MSDU payload itself). So, the offset into the rx
354 * indication message only has to account for the standard
355 * offset of the per-MSDU FW rx desc info within the
356 * message, and how many bytes of the per-MSDU FW rx desc
357 * info have already been consumed. (And the endianness of
358 * the host, since for a big-endian host, the rx ind
359 * message contents, including the per-MSDU rx desc bytes,
360 * were byteswapped during upload.)
361 */
362 if (*fw_desc_len > 0) {
363 rx_desc->fw_desc.info0 = **fw_desc;
364 /*
365 * The target is expected to only provide the basic
366 * per-MSDU rx descriptors. Just to be sure, verify
367 * that the target has not attached extension data
368 * (e.g. LRO flow ID).
369 */
370
371 /* or more, if there's extension data */
372 (*fw_desc)++;
373 (*fw_desc_len)--;
374 } else {
375 /*
376 * When an oversized AMSDU happened, FW will lost
377 * some of MSDU status - in this case, the FW
378 * descriptors provided will be less than the
379 * actual MSDUs inside this MPDU. Mark the FW
380 * descriptors so that it will still deliver to
381 * upper stack, if no CRC error for this MPDU.
382 *
383 * FIX THIS - the FW descriptors are actually for
384 * MSDUs in the end of this A-MSDU instead of the
385 * beginning.
386 */
387 rx_desc->fw_desc.info0 = 0;
388 }
389
390 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
391 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
392 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
393 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
394 RX_MSDU_START_INFO0_MSDU_LENGTH);
395 msdu_chained = rx_desc->frag_info.ring2_more_count;
396
397 if (msdu_len_invalid)
398 msdu_len = 0;
399
400 skb_trim(msdu, 0);
401 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
402 msdu_len -= msdu->len;
403
Michal Kazior9aa505d2014-11-18 09:24:47 +0200404 /* Note: Chained buffers do not contain rx descriptor */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300405 while (msdu_chained--) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200406 msdu = ath10k_htt_rx_netbuf_pop(htt);
407 if (!msdu) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200408 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200409 return -ENOENT;
Michal Kaziorb30595a2014-10-23 17:04:24 +0300410 }
411
Michal Kazior9aa505d2014-11-18 09:24:47 +0200412 __skb_queue_tail(amsdu, msdu);
413 skb_trim(msdu, 0);
414 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
415 msdu_len -= msdu->len;
Michal Kaziorede9c8e2014-05-14 16:23:31 +0300416 msdu_chaining = 1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300417 }
418
Kalle Valo5e3dd152013-06-12 20:52:10 +0300419 last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
420 RX_MSDU_END_INFO0_LAST_MSDU;
421
Michal Kaziorb04e2042014-10-23 17:04:27 +0300422 trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
Rajkumar Manoharana0883cf2014-10-03 08:02:47 +0300423 sizeof(*rx_desc) - sizeof(u32));
Michal Kazior9aa505d2014-11-18 09:24:47 +0200424
425 if (last_msdu)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300426 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300427 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300428
Michal Kazior9aa505d2014-11-18 09:24:47 +0200429 if (skb_queue_empty(amsdu))
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100430 msdu_chaining = -1;
431
Kalle Valo5e3dd152013-06-12 20:52:10 +0300432 /*
433 * Don't refill the ring yet.
434 *
435 * First, the elements popped here are still in use - it is not
436 * safe to overwrite them until the matching call to
437 * mpdu_desc_list_next. Second, for efficiency it is preferable to
438 * refill the rx ring with 1 PPDU's worth of rx buffers (something
439 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
440 * (something like 3 buffers). Consequently, we'll rely on the txrx
441 * SW to tell us when it is done pulling all the PPDU's rx buffers
442 * out of the rx ring, and then refill it just once.
443 */
444
445 return msdu_chaining;
446}
447
Michal Kazior6e712d42013-09-24 10:18:36 +0200448static void ath10k_htt_rx_replenish_task(unsigned long ptr)
449{
450 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
Kalle Valoaf762c02014-09-14 12:50:17 +0300451
Michal Kazior6e712d42013-09-24 10:18:36 +0200452 ath10k_htt_rx_msdu_buff_replenish(htt);
453}
454
Michal Kazior95bf21f2014-05-16 17:15:39 +0300455int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300456{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200457 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300458 dma_addr_t paddr;
459 void *vaddr;
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300460 size_t size;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300461 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
462
Michal Kazior51fc7d72014-10-23 17:04:24 +0300463 htt->rx_confused = false;
464
Kalle Valo5e3dd152013-06-12 20:52:10 +0300465 htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
466 if (!is_power_of_2(htt->rx_ring.size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200467 ath10k_warn(ar, "htt rx ring size is not power of 2\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300468 return -EINVAL;
469 }
470
471 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
472
473 /*
474 * Set the initial value for the level to which the rx ring
475 * should be filled, based on the max throughput and the
476 * worst likely latency for the host to fill the rx ring
477 * with new buffers. In theory, this fill level can be
478 * dynamically adjusted from the initial value set here, to
479 * reflect the actual host latency rather than a
480 * conservative assumption about the host latency.
481 */
482 htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
483
484 htt->rx_ring.netbufs_ring =
Michal Kazior3e841fd2014-05-14 16:23:31 +0300485 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300486 GFP_KERNEL);
487 if (!htt->rx_ring.netbufs_ring)
488 goto err_netbuf;
489
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300490 size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
491
492 vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_DMA);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300493 if (!vaddr)
494 goto err_dma_ring;
495
496 htt->rx_ring.paddrs_ring = vaddr;
497 htt->rx_ring.base_paddr = paddr;
498
499 vaddr = dma_alloc_coherent(htt->ar->dev,
500 sizeof(*htt->rx_ring.alloc_idx.vaddr),
501 &paddr, GFP_DMA);
502 if (!vaddr)
503 goto err_dma_idx;
504
505 htt->rx_ring.alloc_idx.vaddr = vaddr;
506 htt->rx_ring.alloc_idx.paddr = paddr;
507 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
508 *htt->rx_ring.alloc_idx.vaddr = 0;
509
510 /* Initialize the Rx refill retry timer */
511 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
512
513 spin_lock_init(&htt->rx_ring.lock);
514
515 htt->rx_ring.fill_cnt = 0;
516 if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
517 goto err_fill_ring;
518
Michal Kazior6e712d42013-09-24 10:18:36 +0200519 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
520 (unsigned long)htt);
521
Michal Kazior6c5151a2014-02-27 18:50:04 +0200522 skb_queue_head_init(&htt->tx_compl_q);
523 skb_queue_head_init(&htt->rx_compl_q);
524
525 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
526 (unsigned long)htt);
527
Michal Kazior7aa7a722014-08-25 12:09:38 +0200528 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300529 htt->rx_ring.size, htt->rx_ring.fill_level);
530 return 0;
531
532err_fill_ring:
533 ath10k_htt_rx_ring_free(htt);
534 dma_free_coherent(htt->ar->dev,
535 sizeof(*htt->rx_ring.alloc_idx.vaddr),
536 htt->rx_ring.alloc_idx.vaddr,
537 htt->rx_ring.alloc_idx.paddr);
538err_dma_idx:
539 dma_free_coherent(htt->ar->dev,
540 (htt->rx_ring.size *
541 sizeof(htt->rx_ring.paddrs_ring)),
542 htt->rx_ring.paddrs_ring,
543 htt->rx_ring.base_paddr);
544err_dma_ring:
545 kfree(htt->rx_ring.netbufs_ring);
546err_netbuf:
547 return -ENOMEM;
548}
549
Michal Kazior7aa7a722014-08-25 12:09:38 +0200550static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
551 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300552{
553 switch (type) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300554 case HTT_RX_MPDU_ENCRYPT_NONE:
555 return 0;
Michal Kazior890d3b22014-10-23 17:04:22 +0300556 case HTT_RX_MPDU_ENCRYPT_WEP40:
557 case HTT_RX_MPDU_ENCRYPT_WEP104:
558 return IEEE80211_WEP_IV_LEN;
559 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
560 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
561 return IEEE80211_TKIP_IV_LEN;
562 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
563 return IEEE80211_CCMP_HDR_LEN;
564 case HTT_RX_MPDU_ENCRYPT_WEP128:
565 case HTT_RX_MPDU_ENCRYPT_WAPI:
566 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300567 }
568
Michal Kazior890d3b22014-10-23 17:04:22 +0300569 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300570 return 0;
571}
572
Michal Kazior890d3b22014-10-23 17:04:22 +0300573#define MICHAEL_MIC_LEN 8
574
Michal Kazior7aa7a722014-08-25 12:09:38 +0200575static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
576 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300577{
578 switch (type) {
579 case HTT_RX_MPDU_ENCRYPT_NONE:
Michal Kazior890d3b22014-10-23 17:04:22 +0300580 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300581 case HTT_RX_MPDU_ENCRYPT_WEP40:
582 case HTT_RX_MPDU_ENCRYPT_WEP104:
Michal Kazior890d3b22014-10-23 17:04:22 +0300583 return IEEE80211_WEP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300584 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
585 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
Michal Kazior890d3b22014-10-23 17:04:22 +0300586 return IEEE80211_TKIP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300587 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
Michal Kazior890d3b22014-10-23 17:04:22 +0300588 return IEEE80211_CCMP_MIC_LEN;
589 case HTT_RX_MPDU_ENCRYPT_WEP128:
590 case HTT_RX_MPDU_ENCRYPT_WAPI:
591 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300592 }
593
Michal Kazior890d3b22014-10-23 17:04:22 +0300594 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300595 return 0;
596}
597
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300598struct rfc1042_hdr {
599 u8 llc_dsap;
600 u8 llc_ssap;
601 u8 llc_ctrl;
602 u8 snap_oui[3];
603 __be16 snap_type;
604} __packed;
605
606struct amsdu_subframe_hdr {
607 u8 dst[ETH_ALEN];
608 u8 src[ETH_ALEN];
609 __be16 len;
610} __packed;
611
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100612static const u8 rx_legacy_rate_idx[] = {
613 3, /* 0x00 - 11Mbps */
614 2, /* 0x01 - 5.5Mbps */
615 1, /* 0x02 - 2Mbps */
616 0, /* 0x03 - 1Mbps */
617 3, /* 0x04 - 11Mbps */
618 2, /* 0x05 - 5.5Mbps */
619 1, /* 0x06 - 2Mbps */
620 0, /* 0x07 - 1Mbps */
621 10, /* 0x08 - 48Mbps */
622 8, /* 0x09 - 24Mbps */
623 6, /* 0x0A - 12Mbps */
624 4, /* 0x0B - 6Mbps */
625 11, /* 0x0C - 54Mbps */
626 9, /* 0x0D - 36Mbps */
627 7, /* 0x0E - 18Mbps */
628 5, /* 0x0F - 9Mbps */
629};
630
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100631static void ath10k_htt_rx_h_rates(struct ath10k *ar,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100632 enum ieee80211_band band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100633 u8 info0, u32 info1, u32 info2,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100634 struct ieee80211_rx_status *status)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100635{
636 u8 cck, rate, rate_idx, bw, sgi, mcs, nss;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100637 u8 preamble = 0;
638
639 /* Check if valid fields */
640 if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID))
641 return;
642
643 preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE);
644
645 switch (preamble) {
646 case HTT_RX_LEGACY:
647 cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK;
648 rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE);
649 rate_idx = 0;
650
651 if (rate < 0x08 || rate > 0x0F)
652 break;
653
654 switch (band) {
655 case IEEE80211_BAND_2GHZ:
656 if (cck)
657 rate &= ~BIT(3);
658 rate_idx = rx_legacy_rate_idx[rate];
659 break;
660 case IEEE80211_BAND_5GHZ:
661 rate_idx = rx_legacy_rate_idx[rate];
662 /* We are using same rate table registering
663 HW - ath10k_rates[]. In case of 5GHz skip
664 CCK rates, so -4 here */
665 rate_idx -= 4;
666 break;
667 default:
668 break;
669 }
670
671 status->rate_idx = rate_idx;
672 break;
673 case HTT_RX_HT:
674 case HTT_RX_HT_WITH_TXBF:
675 /* HT-SIG - Table 20-11 in info1 and info2 */
676 mcs = info1 & 0x1F;
677 nss = mcs >> 3;
678 bw = (info1 >> 7) & 1;
679 sgi = (info2 >> 7) & 1;
680
681 status->rate_idx = mcs;
682 status->flag |= RX_FLAG_HT;
683 if (sgi)
684 status->flag |= RX_FLAG_SHORT_GI;
685 if (bw)
686 status->flag |= RX_FLAG_40MHZ;
687 break;
688 case HTT_RX_VHT:
689 case HTT_RX_VHT_WITH_TXBF:
690 /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
691 TODO check this */
692 mcs = (info2 >> 4) & 0x0F;
693 nss = ((info1 >> 10) & 0x07) + 1;
694 bw = info1 & 3;
695 sgi = info2 & 1;
696
697 status->rate_idx = mcs;
698 status->vht_nss = nss;
699
700 if (sgi)
701 status->flag |= RX_FLAG_SHORT_GI;
702
703 switch (bw) {
704 /* 20MHZ */
705 case 0:
706 break;
707 /* 40MHZ */
708 case 1:
709 status->flag |= RX_FLAG_40MHZ;
710 break;
711 /* 80MHZ */
712 case 2:
713 status->vht_flag |= RX_VHT_FLAG_80MHZ;
714 }
715
716 status->flag |= RX_FLAG_VHT;
717 break;
718 default:
719 break;
720 }
721}
722
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100723static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
724 struct ieee80211_rx_status *status)
725{
726 struct ieee80211_channel *ch;
727
728 spin_lock_bh(&ar->data_lock);
729 ch = ar->scan_channel;
730 if (!ch)
731 ch = ar->rx_channel;
732 spin_unlock_bh(&ar->data_lock);
733
734 if (!ch)
735 return false;
736
737 status->band = ch->band;
738 status->freq = ch->center_freq;
739
740 return true;
741}
742
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300743static const char * const tid_to_ac[] = {
744 "BE",
745 "BK",
746 "BK",
747 "BE",
748 "VI",
749 "VI",
750 "VO",
751 "VO",
752};
753
754static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
755{
756 u8 *qc;
757 int tid;
758
759 if (!ieee80211_is_data_qos(hdr->frame_control))
760 return "";
761
762 qc = ieee80211_get_qos_ctl(hdr);
763 tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
764 if (tid < 8)
765 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
766 else
767 snprintf(out, size, "tid %d", tid);
768
769 return out;
770}
771
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100772static void ath10k_process_rx(struct ath10k *ar,
773 struct ieee80211_rx_status *rx_status,
774 struct sk_buff *skb)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100775{
776 struct ieee80211_rx_status *status;
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300777 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
778 char tid[32];
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100779
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100780 status = IEEE80211_SKB_RXCB(skb);
781 *status = *rx_status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100782
Michal Kazior7aa7a722014-08-25 12:09:38 +0200783 ath10k_dbg(ar, ATH10K_DBG_DATA,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300784 "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100785 skb,
786 skb->len,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300787 ieee80211_get_SA(hdr),
788 ath10k_get_tid(hdr, tid, sizeof(tid)),
789 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
790 "mcast" : "ucast",
791 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100792 status->flag == 0 ? "legacy" : "",
793 status->flag & RX_FLAG_HT ? "ht" : "",
794 status->flag & RX_FLAG_VHT ? "vht" : "",
795 status->flag & RX_FLAG_40MHZ ? "40" : "",
796 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
797 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
798 status->rate_idx,
799 status->vht_nss,
800 status->freq,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100801 status->band, status->flag,
Janusz Dziedzic78433f92014-03-24 21:23:21 +0100802 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300803 !!(status->flag & RX_FLAG_MMIC_ERROR),
804 !!(status->flag & RX_FLAG_AMSDU_MORE));
Michal Kazior7aa7a722014-08-25 12:09:38 +0200805 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100806 skb->data, skb->len);
Rajkumar Manoharan5ce8e7f2014-11-05 19:14:31 +0530807 trace_ath10k_rx_hdr(ar, skb->data, skb->len);
808 trace_ath10k_rx_payload(ar, skb->data, skb->len);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100809
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100810 ieee80211_rx(ar->hw, skb);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100811}
812
Michal Kaziord960c362014-02-25 09:29:57 +0200813static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr)
814{
815 /* nwifi header is padded to 4 bytes. this fixes 4addr rx */
816 return round_up(ieee80211_hdrlen(hdr->frame_control), 4);
817}
818
Michal Kazior581c25f2014-11-18 09:24:48 +0200819static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
820 struct sk_buff *msdu,
821 struct ieee80211_rx_status *status,
822 enum htt_rx_mpdu_encrypt_type enctype,
823 bool is_decrypted)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300824{
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300825 struct ieee80211_hdr *hdr;
Michal Kazior581c25f2014-11-18 09:24:48 +0200826 struct htt_rx_desc *rxd;
827 size_t hdr_len;
828 size_t crypto_len;
829 bool is_first;
830 bool is_last;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300831
Michal Kazior581c25f2014-11-18 09:24:48 +0200832 rxd = (void *)msdu->data - sizeof(*rxd);
833 is_first = !!(rxd->msdu_end.info0 &
834 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
835 is_last = !!(rxd->msdu_end.info0 &
836 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
Michal Kazior9aa505d2014-11-18 09:24:47 +0200837
Michal Kazior581c25f2014-11-18 09:24:48 +0200838 /* Delivered decapped frame:
839 * [802.11 header]
840 * [crypto param] <-- can be trimmed if !fcs_err &&
841 * !decrypt_err && !peer_idx_invalid
842 * [amsdu header] <-- only if A-MSDU
843 * [rfc1042/llc]
844 * [payload]
845 * [FCS] <-- at end, needs to be trimmed
846 */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300847
Michal Kazior581c25f2014-11-18 09:24:48 +0200848 /* This probably shouldn't happen but warn just in case */
849 if (unlikely(WARN_ON_ONCE(!is_first)))
850 return;
851
852 /* This probably shouldn't happen but warn just in case */
853 if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
854 return;
855
856 skb_trim(msdu, msdu->len - FCS_LEN);
857
858 /* In most cases this will be true for sniffed frames. It makes sense
859 * to deliver them as-is without stripping the crypto param. This would
860 * also make sense for software based decryption (which is not
861 * implemented in ath10k).
862 *
863 * If there's no error then the frame is decrypted. At least that is
864 * the case for frames that come in via fragmented rx indication.
865 */
866 if (!is_decrypted)
867 return;
868
869 /* The payload is decrypted so strip crypto params. Start from tail
870 * since hdr is used to compute some stuff.
871 */
872
873 hdr = (void *)msdu->data;
874
875 /* Tail */
876 skb_trim(msdu, msdu->len - ath10k_htt_rx_crypto_tail_len(ar, enctype));
877
878 /* MMIC */
879 if (!ieee80211_has_morefrags(hdr->frame_control) &&
880 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
881 skb_trim(msdu, msdu->len - 8);
882
883 /* Head */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300884 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +0200885 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300886
Michal Kazior581c25f2014-11-18 09:24:48 +0200887 memmove((void *)msdu->data + crypto_len,
888 (void *)msdu->data, hdr_len);
889 skb_pull(msdu, crypto_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300890}
891
Michal Kazior581c25f2014-11-18 09:24:48 +0200892static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
893 struct sk_buff *msdu,
894 struct ieee80211_rx_status *status,
895 const u8 first_hdr[64])
Kalle Valo5e3dd152013-06-12 20:52:10 +0300896{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300897 struct ieee80211_hdr *hdr;
Michal Kazior581c25f2014-11-18 09:24:48 +0200898 size_t hdr_len;
899 u8 da[ETH_ALEN];
900 u8 sa[ETH_ALEN];
Kalle Valo5e3dd152013-06-12 20:52:10 +0300901
Michal Kazior581c25f2014-11-18 09:24:48 +0200902 /* Delivered decapped frame:
903 * [nwifi 802.11 header] <-- replaced with 802.11 hdr
904 * [rfc1042/llc]
905 *
906 * Note: The nwifi header doesn't have QoS Control and is
907 * (always?) a 3addr frame.
908 *
909 * Note2: There's no A-MSDU subframe header. Even if it's part
910 * of an A-MSDU.
911 */
912
913 /* pull decapped header and copy SA & DA */
914 hdr = (struct ieee80211_hdr *)msdu->data;
915 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
916 ether_addr_copy(da, ieee80211_get_DA(hdr));
917 ether_addr_copy(sa, ieee80211_get_SA(hdr));
918 skb_pull(msdu, hdr_len);
919
920 /* push original 802.11 header */
921 hdr = (struct ieee80211_hdr *)first_hdr;
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300922 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +0200923 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300924
Michal Kazior581c25f2014-11-18 09:24:48 +0200925 /* original 802.11 header has a different DA and in
926 * case of 4addr it may also have different SA
927 */
928 hdr = (struct ieee80211_hdr *)msdu->data;
929 ether_addr_copy(ieee80211_get_DA(hdr), da);
930 ether_addr_copy(ieee80211_get_SA(hdr), sa);
931}
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300932
Michal Kazior581c25f2014-11-18 09:24:48 +0200933static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
934 struct sk_buff *msdu,
935 enum htt_rx_mpdu_encrypt_type enctype)
936{
937 struct ieee80211_hdr *hdr;
938 struct htt_rx_desc *rxd;
939 size_t hdr_len, crypto_len;
940 void *rfc1042;
941 bool is_first, is_last, is_amsdu;
Michal Kazior784f69d2013-09-26 10:12:23 +0300942
Michal Kazior581c25f2014-11-18 09:24:48 +0200943 rxd = (void *)msdu->data - sizeof(*rxd);
944 hdr = (void *)rxd->rx_hdr_status;
945
946 is_first = !!(rxd->msdu_end.info0 &
947 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
948 is_last = !!(rxd->msdu_end.info0 &
949 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
950 is_amsdu = !(is_first && is_last);
951
952 rfc1042 = hdr;
953
954 if (is_first) {
Michal Kazior784f69d2013-09-26 10:12:23 +0300955 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +0200956 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300957
Michal Kazior581c25f2014-11-18 09:24:48 +0200958 rfc1042 += round_up(hdr_len, 4) +
959 round_up(crypto_len, 4);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300960 }
961
Michal Kazior581c25f2014-11-18 09:24:48 +0200962 if (is_amsdu)
963 rfc1042 += sizeof(struct amsdu_subframe_hdr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300964
Michal Kazior581c25f2014-11-18 09:24:48 +0200965 return rfc1042;
966}
967
968static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
969 struct sk_buff *msdu,
970 struct ieee80211_rx_status *status,
971 const u8 first_hdr[64],
972 enum htt_rx_mpdu_encrypt_type enctype)
973{
974 struct ieee80211_hdr *hdr;
975 struct ethhdr *eth;
976 size_t hdr_len;
977 void *rfc1042;
978 u8 da[ETH_ALEN];
979 u8 sa[ETH_ALEN];
980
981 /* Delivered decapped frame:
982 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
983 * [payload]
984 */
985
986 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
987 if (WARN_ON_ONCE(!rfc1042))
988 return;
989
990 /* pull decapped header and copy SA & DA */
991 eth = (struct ethhdr *)msdu->data;
992 ether_addr_copy(da, eth->h_dest);
993 ether_addr_copy(sa, eth->h_source);
994 skb_pull(msdu, sizeof(struct ethhdr));
995
996 /* push rfc1042/llc/snap */
997 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
998 sizeof(struct rfc1042_hdr));
999
1000 /* push original 802.11 header */
1001 hdr = (struct ieee80211_hdr *)first_hdr;
1002 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1003 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1004
1005 /* original 802.11 header has a different DA and in
1006 * case of 4addr it may also have different SA
1007 */
1008 hdr = (struct ieee80211_hdr *)msdu->data;
1009 ether_addr_copy(ieee80211_get_DA(hdr), da);
1010 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1011}
1012
1013static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
1014 struct sk_buff *msdu,
1015 struct ieee80211_rx_status *status,
1016 const u8 first_hdr[64])
1017{
1018 struct ieee80211_hdr *hdr;
1019 size_t hdr_len;
1020
1021 /* Delivered decapped frame:
1022 * [amsdu header] <-- replaced with 802.11 hdr
1023 * [rfc1042/llc]
1024 * [payload]
1025 */
1026
1027 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr));
1028
1029 hdr = (struct ieee80211_hdr *)first_hdr;
1030 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1031 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1032}
1033
1034static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
1035 struct sk_buff *msdu,
1036 struct ieee80211_rx_status *status,
1037 u8 first_hdr[64],
1038 enum htt_rx_mpdu_encrypt_type enctype,
1039 bool is_decrypted)
1040{
1041 struct htt_rx_desc *rxd;
1042 enum rx_msdu_decap_format decap;
1043 struct ieee80211_hdr *hdr;
1044
1045 /* First msdu's decapped header:
1046 * [802.11 header] <-- padded to 4 bytes long
1047 * [crypto param] <-- padded to 4 bytes long
1048 * [amsdu header] <-- only if A-MSDU
1049 * [rfc1042/llc]
1050 *
1051 * Other (2nd, 3rd, ..) msdu's decapped header:
1052 * [amsdu header] <-- only if A-MSDU
1053 * [rfc1042/llc]
1054 */
1055
1056 rxd = (void *)msdu->data - sizeof(*rxd);
1057 hdr = (void *)rxd->rx_hdr_status;
1058 decap = MS(__le32_to_cpu(rxd->msdu_start.info1),
1059 RX_MSDU_START_INFO1_DECAP_FORMAT);
1060
1061 switch (decap) {
1062 case RX_MSDU_DECAP_RAW:
1063 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
1064 is_decrypted);
1065 break;
1066 case RX_MSDU_DECAP_NATIVE_WIFI:
1067 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr);
1068 break;
1069 case RX_MSDU_DECAP_ETHERNET2_DIX:
1070 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
1071 break;
1072 case RX_MSDU_DECAP_8023_SNAP_LLC:
1073 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr);
1074 break;
1075 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001076}
1077
Michal Kazior605f81a2013-07-31 10:47:56 +02001078static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1079{
1080 struct htt_rx_desc *rxd;
1081 u32 flags, info;
1082 bool is_ip4, is_ip6;
1083 bool is_tcp, is_udp;
1084 bool ip_csum_ok, tcpudp_csum_ok;
1085
1086 rxd = (void *)skb->data - sizeof(*rxd);
1087 flags = __le32_to_cpu(rxd->attention.flags);
1088 info = __le32_to_cpu(rxd->msdu_start.info1);
1089
1090 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1091 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1092 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1093 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1094 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1095 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1096
1097 if (!is_ip4 && !is_ip6)
1098 return CHECKSUM_NONE;
1099 if (!is_tcp && !is_udp)
1100 return CHECKSUM_NONE;
1101 if (!ip_csum_ok)
1102 return CHECKSUM_NONE;
1103 if (!tcpudp_csum_ok)
1104 return CHECKSUM_NONE;
1105
1106 return CHECKSUM_UNNECESSARY;
1107}
1108
Michal Kazior581c25f2014-11-18 09:24:48 +02001109static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
1110{
1111 msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
1112}
1113
1114static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
1115 struct sk_buff_head *amsdu,
1116 struct ieee80211_rx_status *status)
1117{
1118 struct sk_buff *first;
1119 struct sk_buff *last;
1120 struct sk_buff *msdu;
1121 struct htt_rx_desc *rxd;
1122 struct ieee80211_hdr *hdr;
1123 enum htt_rx_mpdu_encrypt_type enctype;
1124 u8 first_hdr[64];
1125 u8 *qos;
1126 size_t hdr_len;
1127 bool has_fcs_err;
1128 bool has_crypto_err;
1129 bool has_tkip_err;
1130 bool has_peer_idx_invalid;
1131 bool is_decrypted;
1132 u32 attention;
1133
1134 if (skb_queue_empty(amsdu))
1135 return;
1136
1137 first = skb_peek(amsdu);
1138 rxd = (void *)first->data - sizeof(*rxd);
1139
1140 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1141 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
1142
1143 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
1144 * decapped header. It'll be used for undecapping of each MSDU.
1145 */
1146 hdr = (void *)rxd->rx_hdr_status;
1147 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1148 memcpy(first_hdr, hdr, hdr_len);
1149
1150 /* Each A-MSDU subframe will use the original header as the base and be
1151 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
1152 */
1153 hdr = (void *)first_hdr;
1154 qos = ieee80211_get_qos_ctl(hdr);
1155 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1156
1157 /* Some attention flags are valid only in the last MSDU. */
1158 last = skb_peek_tail(amsdu);
1159 rxd = (void *)last->data - sizeof(*rxd);
1160 attention = __le32_to_cpu(rxd->attention.flags);
1161
1162 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
1163 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
1164 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1165 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
1166
1167 /* Note: If hardware captures an encrypted frame that it can't decrypt,
1168 * e.g. due to fcs error, missing peer or invalid key data it will
1169 * report the frame as raw.
1170 */
1171 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
1172 !has_fcs_err &&
1173 !has_crypto_err &&
1174 !has_peer_idx_invalid);
1175
1176 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
1177 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
1178 RX_FLAG_MMIC_ERROR |
1179 RX_FLAG_DECRYPTED |
1180 RX_FLAG_IV_STRIPPED |
1181 RX_FLAG_MMIC_STRIPPED);
1182
1183 if (has_fcs_err)
1184 status->flag |= RX_FLAG_FAILED_FCS_CRC;
1185
1186 if (has_tkip_err)
1187 status->flag |= RX_FLAG_MMIC_ERROR;
1188
1189 if (is_decrypted)
1190 status->flag |= RX_FLAG_DECRYPTED |
1191 RX_FLAG_IV_STRIPPED |
1192 RX_FLAG_MMIC_STRIPPED;
1193
1194 skb_queue_walk(amsdu, msdu) {
1195 ath10k_htt_rx_h_csum_offload(msdu);
1196 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
1197 is_decrypted);
1198
1199 /* Undecapping involves copying the original 802.11 header back
1200 * to sk_buff. If frame is protected and hardware has decrypted
1201 * it then remove the protected bit.
1202 */
1203 if (!is_decrypted)
1204 continue;
1205
1206 hdr = (void *)msdu->data;
1207 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
1208 }
1209}
1210
1211static void ath10k_htt_rx_h_deliver(struct ath10k *ar,
1212 struct sk_buff_head *amsdu,
1213 struct ieee80211_rx_status *status)
1214{
1215 struct sk_buff *msdu;
1216
1217 while ((msdu = __skb_dequeue(amsdu))) {
1218 /* Setup per-MSDU flags */
1219 if (skb_queue_empty(amsdu))
1220 status->flag &= ~RX_FLAG_AMSDU_MORE;
1221 else
1222 status->flag |= RX_FLAG_AMSDU_MORE;
1223
1224 ath10k_process_rx(ar, status, msdu);
1225 }
1226}
1227
Michal Kazior9aa505d2014-11-18 09:24:47 +02001228static int ath10k_unchain_msdu(struct sk_buff_head *amsdu)
Ben Greearbfa35362014-03-03 14:07:09 -08001229{
Michal Kazior9aa505d2014-11-18 09:24:47 +02001230 struct sk_buff *skb, *first;
Ben Greearbfa35362014-03-03 14:07:09 -08001231 int space;
1232 int total_len = 0;
1233
1234 /* TODO: Might could optimize this by using
1235 * skb_try_coalesce or similar method to
1236 * decrease copying, or maybe get mac80211 to
1237 * provide a way to just receive a list of
1238 * skb?
1239 */
1240
Michal Kazior9aa505d2014-11-18 09:24:47 +02001241 first = __skb_dequeue(amsdu);
Ben Greearbfa35362014-03-03 14:07:09 -08001242
1243 /* Allocate total length all at once. */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001244 skb_queue_walk(amsdu, skb)
1245 total_len += skb->len;
Ben Greearbfa35362014-03-03 14:07:09 -08001246
Michal Kazior9aa505d2014-11-18 09:24:47 +02001247 space = total_len - skb_tailroom(first);
Ben Greearbfa35362014-03-03 14:07:09 -08001248 if ((space > 0) &&
Michal Kazior9aa505d2014-11-18 09:24:47 +02001249 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
Ben Greearbfa35362014-03-03 14:07:09 -08001250 /* TODO: bump some rx-oom error stat */
1251 /* put it back together so we can free the
1252 * whole list at once.
1253 */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001254 __skb_queue_head(amsdu, first);
Ben Greearbfa35362014-03-03 14:07:09 -08001255 return -1;
1256 }
1257
1258 /* Walk list again, copying contents into
1259 * msdu_head
1260 */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001261 while ((skb = __skb_dequeue(amsdu))) {
1262 skb_copy_from_linear_data(skb, skb_put(first, skb->len),
1263 skb->len);
1264 dev_kfree_skb_any(skb);
Ben Greearbfa35362014-03-03 14:07:09 -08001265 }
1266
Michal Kazior9aa505d2014-11-18 09:24:47 +02001267 __skb_queue_head(amsdu, first);
Ben Greearbfa35362014-03-03 14:07:09 -08001268 return 0;
1269}
1270
Michal Kazior581c25f2014-11-18 09:24:48 +02001271static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
1272 struct sk_buff_head *amsdu,
1273 bool chained)
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001274{
Michal Kazior581c25f2014-11-18 09:24:48 +02001275 struct sk_buff *first;
1276 struct htt_rx_desc *rxd;
1277 enum rx_msdu_decap_format decap;
Michal Kazior7aa7a722014-08-25 12:09:38 +02001278
Michal Kazior581c25f2014-11-18 09:24:48 +02001279 first = skb_peek(amsdu);
1280 rxd = (void *)first->data - sizeof(*rxd);
1281 decap = MS(__le32_to_cpu(rxd->msdu_start.info1),
1282 RX_MSDU_START_INFO1_DECAP_FORMAT);
1283
1284 if (!chained)
1285 return;
1286
1287 /* FIXME: Current unchaining logic can only handle simple case of raw
1288 * msdu chaining. If decapping is other than raw the chaining may be
1289 * more complex and this isn't handled by the current code. Don't even
1290 * try re-constructing such frames - it'll be pretty much garbage.
1291 */
1292 if (decap != RX_MSDU_DECAP_RAW ||
1293 skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
1294 __skb_queue_purge(amsdu);
1295 return;
1296 }
1297
1298 ath10k_unchain_msdu(amsdu);
1299}
1300
1301static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
1302 struct sk_buff_head *amsdu,
1303 struct ieee80211_rx_status *rx_status)
1304{
1305 struct sk_buff *msdu;
1306 struct htt_rx_desc *rxd;
1307
1308 msdu = skb_peek(amsdu);
1309 rxd = (void *)msdu->data - sizeof(*rxd);
1310
1311 /* FIXME: It might be a good idea to do some fuzzy-testing to drop
1312 * invalid/dangerous frames.
1313 */
1314
1315 if (!rx_status->freq) {
1316 ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001317 return false;
1318 }
1319
Michal Kazior581c25f2014-11-18 09:24:48 +02001320 /* Management frames are handled via WMI events. The pros of such
1321 * approach is that channel is explicitly provided in WMI events
1322 * whereas HTT doesn't provide channel information for Rxed frames.
1323 */
1324 if (rxd->attention.flags &
1325 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001326 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001327 return false;
1328 }
1329
Michal Kazior581c25f2014-11-18 09:24:48 +02001330 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
1331 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001332 return false;
1333 }
1334
1335 return true;
1336}
1337
Michal Kazior581c25f2014-11-18 09:24:48 +02001338static void ath10k_htt_rx_h_filter(struct ath10k *ar,
1339 struct sk_buff_head *amsdu,
1340 struct ieee80211_rx_status *rx_status)
1341{
1342 if (skb_queue_empty(amsdu))
1343 return;
1344
1345 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
1346 return;
1347
1348 __skb_queue_purge(amsdu);
1349}
1350
Kalle Valo5e3dd152013-06-12 20:52:10 +03001351static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1352 struct htt_rx_indication *rx)
1353{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001354 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001355 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001356 struct htt_rx_indication_mpdu_range *mpdu_ranges;
Michal Kazior9aa505d2014-11-18 09:24:47 +02001357 struct sk_buff_head amsdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001358 int num_mpdu_ranges;
1359 int fw_desc_len;
1360 u8 *fw_desc;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001361 bool channel_set;
Michal Kaziord5406902014-11-18 09:24:47 +02001362 int i, ret, mpdu_count = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001363
Michal Kazior45967082014-02-27 18:50:05 +02001364 lockdep_assert_held(&htt->rx_ring.lock);
1365
Michal Kaziore0bd7512014-11-18 09:24:48 +02001366 if (htt->rx_confused)
1367 return;
1368
Kalle Valo5e3dd152013-06-12 20:52:10 +03001369 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1370 fw_desc = (u8 *)&rx->fw_desc;
1371
1372 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1373 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1374 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1375
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001376 /* Fill this once, while this is per-ppdu */
Janusz Dziedzic22891882014-03-24 21:24:58 +01001377 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_START_VALID) {
1378 memset(rx_status, 0, sizeof(*rx_status));
1379 rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
1380 rx->ppdu.combined_rssi;
1381 }
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001382
1383 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_END_VALID) {
1384 /* TSF available only in 32-bit */
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001385 rx_status->mactime = __le32_to_cpu(rx->ppdu.tsf) & 0xffffffff;
1386 rx_status->flag |= RX_FLAG_MACTIME_END;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001387 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001388
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001389 channel_set = ath10k_htt_rx_h_channel(htt->ar, rx_status);
Janusz Dziedzic36653f02014-03-24 21:23:18 +01001390
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001391 if (channel_set) {
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001392 ath10k_htt_rx_h_rates(htt->ar, rx_status->band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001393 rx->ppdu.info0,
1394 __le32_to_cpu(rx->ppdu.info1),
1395 __le32_to_cpu(rx->ppdu.info2),
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001396 rx_status);
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001397 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001398
Michal Kazior7aa7a722014-08-25 12:09:38 +02001399 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001400 rx, sizeof(*rx) +
1401 (sizeof(struct htt_rx_indication_mpdu_range) *
1402 num_mpdu_ranges));
1403
Michal Kaziord5406902014-11-18 09:24:47 +02001404 for (i = 0; i < num_mpdu_ranges; i++)
1405 mpdu_count += mpdu_ranges[i].mpdu_count;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001406
Michal Kaziord5406902014-11-18 09:24:47 +02001407 while (mpdu_count--) {
Michal Kaziord5406902014-11-18 09:24:47 +02001408 __skb_queue_head_init(&amsdu);
1409 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc,
Michal Kaziorf0e27702014-11-18 09:24:49 +02001410 &fw_desc_len, &amsdu);
Michal Kaziord5406902014-11-18 09:24:47 +02001411 if (ret < 0) {
Michal Kaziore0bd7512014-11-18 09:24:48 +02001412 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
Michal Kaziord5406902014-11-18 09:24:47 +02001413 __skb_queue_purge(&amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +02001414 /* FIXME: It's probably a good idea to reboot the
1415 * device instead of leaving it inoperable.
1416 */
1417 htt->rx_confused = true;
1418 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001419 }
Michal Kaziord5406902014-11-18 09:24:47 +02001420
Michal Kazior581c25f2014-11-18 09:24:48 +02001421 ath10k_htt_rx_h_unchain(ar, &amsdu, ret > 0);
1422 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
1423 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
1424 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001425 }
1426
Michal Kazior6e712d42013-09-24 10:18:36 +02001427 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001428}
1429
1430static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
Kalle Valo5b07e072014-09-14 12:50:06 +03001431 struct htt_rx_fragment_indication *frag)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001432{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001433 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001434 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Michal Kazior9aa505d2014-11-18 09:24:47 +02001435 struct sk_buff_head amsdu;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001436 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001437 u8 *fw_desc;
Michal Kazior581c25f2014-11-18 09:24:48 +02001438 int fw_desc_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001439
1440 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1441 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1442
Michal Kazior9aa505d2014-11-18 09:24:47 +02001443 __skb_queue_head_init(&amsdu);
Michal Kazior45967082014-02-27 18:50:05 +02001444
1445 spin_lock_bh(&htt->rx_ring.lock);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001446 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
Michal Kaziorf0e27702014-11-18 09:24:49 +02001447 &amsdu);
Michal Kazior45967082014-02-27 18:50:05 +02001448 spin_unlock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001449
Michal Kazior686687c2014-10-23 17:04:24 +03001450 tasklet_schedule(&htt->rx_replenish_task);
1451
Michal Kazior7aa7a722014-08-25 12:09:38 +02001452 ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001453
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001454 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001455 ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001456 ret);
Michal Kazior9aa505d2014-11-18 09:24:47 +02001457 __skb_queue_purge(&amsdu);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001458 return;
1459 }
1460
Michal Kazior9aa505d2014-11-18 09:24:47 +02001461 if (skb_queue_len(&amsdu) != 1) {
1462 ath10k_warn(ar, "failed to pop frag amsdu: too many msdus\n");
1463 __skb_queue_purge(&amsdu);
1464 return;
1465 }
1466
Kalle Valo5e3dd152013-06-12 20:52:10 +03001467 /* FIXME: implement signal strength */
Ben Greear4b81d172014-05-26 12:46:04 +03001468 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001469
Michal Kazior581c25f2014-11-18 09:24:48 +02001470 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
1471 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
1472 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001473
Kalle Valo5e3dd152013-06-12 20:52:10 +03001474 if (fw_desc_len > 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001475 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001476 "expecting more fragmented rx in one indication %d\n",
1477 fw_desc_len);
1478 }
1479}
1480
Michal Kazior6c5151a2014-02-27 18:50:04 +02001481static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
1482 struct sk_buff *skb)
1483{
1484 struct ath10k_htt *htt = &ar->htt;
1485 struct htt_resp *resp = (struct htt_resp *)skb->data;
1486 struct htt_tx_done tx_done = {};
1487 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1488 __le16 msdu_id;
1489 int i;
1490
Michal Kazior45967082014-02-27 18:50:05 +02001491 lockdep_assert_held(&htt->tx_lock);
1492
Michal Kazior6c5151a2014-02-27 18:50:04 +02001493 switch (status) {
1494 case HTT_DATA_TX_STATUS_NO_ACK:
1495 tx_done.no_ack = true;
1496 break;
1497 case HTT_DATA_TX_STATUS_OK:
1498 break;
1499 case HTT_DATA_TX_STATUS_DISCARD:
1500 case HTT_DATA_TX_STATUS_POSTPONE:
1501 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1502 tx_done.discard = true;
1503 break;
1504 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001505 ath10k_warn(ar, "unhandled tx completion status %d\n", status);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001506 tx_done.discard = true;
1507 break;
1508 }
1509
Michal Kazior7aa7a722014-08-25 12:09:38 +02001510 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
Michal Kazior6c5151a2014-02-27 18:50:04 +02001511 resp->data_tx_completion.num_msdus);
1512
1513 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1514 msdu_id = resp->data_tx_completion.msdus[i];
1515 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1516 ath10k_txrx_tx_unref(htt, &tx_done);
1517 }
1518}
1519
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001520static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
1521{
1522 struct htt_rx_addba *ev = &resp->rx_addba;
1523 struct ath10k_peer *peer;
1524 struct ath10k_vif *arvif;
1525 u16 info0, tid, peer_id;
1526
1527 info0 = __le16_to_cpu(ev->info0);
1528 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1529 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1530
Michal Kazior7aa7a722014-08-25 12:09:38 +02001531 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001532 "htt rx addba tid %hu peer_id %hu size %hhu\n",
1533 tid, peer_id, ev->window_size);
1534
1535 spin_lock_bh(&ar->data_lock);
1536 peer = ath10k_peer_find_by_id(ar, peer_id);
1537 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001538 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001539 peer_id);
1540 spin_unlock_bh(&ar->data_lock);
1541 return;
1542 }
1543
1544 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1545 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001546 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001547 peer->vdev_id);
1548 spin_unlock_bh(&ar->data_lock);
1549 return;
1550 }
1551
Michal Kazior7aa7a722014-08-25 12:09:38 +02001552 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001553 "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
1554 peer->addr, tid, ev->window_size);
1555
1556 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1557 spin_unlock_bh(&ar->data_lock);
1558}
1559
1560static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
1561{
1562 struct htt_rx_delba *ev = &resp->rx_delba;
1563 struct ath10k_peer *peer;
1564 struct ath10k_vif *arvif;
1565 u16 info0, tid, peer_id;
1566
1567 info0 = __le16_to_cpu(ev->info0);
1568 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1569 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1570
Michal Kazior7aa7a722014-08-25 12:09:38 +02001571 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001572 "htt rx delba tid %hu peer_id %hu\n",
1573 tid, peer_id);
1574
1575 spin_lock_bh(&ar->data_lock);
1576 peer = ath10k_peer_find_by_id(ar, peer_id);
1577 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001578 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001579 peer_id);
1580 spin_unlock_bh(&ar->data_lock);
1581 return;
1582 }
1583
1584 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1585 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001586 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001587 peer->vdev_id);
1588 spin_unlock_bh(&ar->data_lock);
1589 return;
1590 }
1591
Michal Kazior7aa7a722014-08-25 12:09:38 +02001592 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001593 "htt rx stop rx ba session sta %pM tid %hu\n",
1594 peer->addr, tid);
1595
1596 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1597 spin_unlock_bh(&ar->data_lock);
1598}
1599
Kalle Valo5e3dd152013-06-12 20:52:10 +03001600void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
1601{
Michal Kazioredb82362013-07-05 16:15:14 +03001602 struct ath10k_htt *htt = &ar->htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001603 struct htt_resp *resp = (struct htt_resp *)skb->data;
1604
1605 /* confirm alignment */
1606 if (!IS_ALIGNED((unsigned long)skb->data, 4))
Michal Kazior7aa7a722014-08-25 12:09:38 +02001607 ath10k_warn(ar, "unaligned htt message, expect trouble\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001608
Michal Kazior7aa7a722014-08-25 12:09:38 +02001609 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001610 resp->hdr.msg_type);
1611 switch (resp->hdr.msg_type) {
1612 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
1613 htt->target_version_major = resp->ver_resp.major;
1614 htt->target_version_minor = resp->ver_resp.minor;
1615 complete(&htt->target_version_received);
1616 break;
1617 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001618 case HTT_T2H_MSG_TYPE_RX_IND:
Michal Kazior45967082014-02-27 18:50:05 +02001619 spin_lock_bh(&htt->rx_ring.lock);
1620 __skb_queue_tail(&htt->rx_compl_q, skb);
1621 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001622 tasklet_schedule(&htt->txrx_compl_task);
1623 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001624 case HTT_T2H_MSG_TYPE_PEER_MAP: {
1625 struct htt_peer_map_event ev = {
1626 .vdev_id = resp->peer_map.vdev_id,
1627 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
1628 };
1629 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
1630 ath10k_peer_map_event(htt, &ev);
1631 break;
1632 }
1633 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
1634 struct htt_peer_unmap_event ev = {
1635 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
1636 };
1637 ath10k_peer_unmap_event(htt, &ev);
1638 break;
1639 }
1640 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
1641 struct htt_tx_done tx_done = {};
1642 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
1643
1644 tx_done.msdu_id =
1645 __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
1646
1647 switch (status) {
1648 case HTT_MGMT_TX_STATUS_OK:
1649 break;
1650 case HTT_MGMT_TX_STATUS_RETRY:
1651 tx_done.no_ack = true;
1652 break;
1653 case HTT_MGMT_TX_STATUS_DROP:
1654 tx_done.discard = true;
1655 break;
1656 }
1657
Michal Kazior6c5151a2014-02-27 18:50:04 +02001658 spin_lock_bh(&htt->tx_lock);
Michal Kazior0a89f8a2013-09-18 14:43:20 +02001659 ath10k_txrx_tx_unref(htt, &tx_done);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001660 spin_unlock_bh(&htt->tx_lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001661 break;
1662 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001663 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
1664 spin_lock_bh(&htt->tx_lock);
1665 __skb_queue_tail(&htt->tx_compl_q, skb);
1666 spin_unlock_bh(&htt->tx_lock);
1667 tasklet_schedule(&htt->txrx_compl_task);
1668 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001669 case HTT_T2H_MSG_TYPE_SEC_IND: {
1670 struct ath10k *ar = htt->ar;
1671 struct htt_security_indication *ev = &resp->security_indication;
1672
Michal Kazior7aa7a722014-08-25 12:09:38 +02001673 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001674 "sec ind peer_id %d unicast %d type %d\n",
1675 __le16_to_cpu(ev->peer_id),
1676 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
1677 MS(ev->flags, HTT_SECURITY_TYPE));
1678 complete(&ar->install_key_done);
1679 break;
1680 }
1681 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001682 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001683 skb->data, skb->len);
1684 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
1685 break;
1686 }
1687 case HTT_T2H_MSG_TYPE_TEST:
1688 /* FIX THIS */
1689 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001690 case HTT_T2H_MSG_TYPE_STATS_CONF:
Michal Kaziord35a6c12014-09-02 11:00:21 +03001691 trace_ath10k_htt_stats(ar, skb->data, skb->len);
Kalle Valoa9bf0502013-09-03 11:43:55 +03001692 break;
1693 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
Michal Kazior708b9bd2014-07-21 20:52:59 +03001694 /* Firmware can return tx frames if it's unable to fully
1695 * process them and suspects host may be able to fix it. ath10k
1696 * sends all tx frames as already inspected so this shouldn't
1697 * happen unless fw has a bug.
1698 */
Michal Kazior7aa7a722014-08-25 12:09:38 +02001699 ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
Michal Kazior708b9bd2014-07-21 20:52:59 +03001700 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001701 case HTT_T2H_MSG_TYPE_RX_ADDBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001702 ath10k_htt_rx_addba(ar, resp);
1703 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001704 case HTT_T2H_MSG_TYPE_RX_DELBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001705 ath10k_htt_rx_delba(ar, resp);
1706 break;
Rajkumar Manoharanbfdd7932014-10-03 08:02:40 +03001707 case HTT_T2H_MSG_TYPE_PKTLOG: {
1708 struct ath10k_pktlog_hdr *hdr =
1709 (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload;
1710
1711 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
1712 sizeof(*hdr) +
1713 __le16_to_cpu(hdr->size));
1714 break;
1715 }
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001716 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
1717 /* Ignore this event because mac80211 takes care of Rx
1718 * aggregation reordering.
1719 */
1720 break;
1721 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001722 default:
Michal Kazior2358a542014-10-02 13:32:55 +02001723 ath10k_warn(ar, "htt event (%d) not handled\n",
1724 resp->hdr.msg_type);
Michal Kazior7aa7a722014-08-25 12:09:38 +02001725 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001726 skb->data, skb->len);
1727 break;
1728 };
1729
1730 /* Free the indication buffer */
1731 dev_kfree_skb_any(skb);
1732}
Michal Kazior6c5151a2014-02-27 18:50:04 +02001733
1734static void ath10k_htt_txrx_compl_task(unsigned long ptr)
1735{
1736 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
1737 struct htt_resp *resp;
1738 struct sk_buff *skb;
1739
Michal Kazior45967082014-02-27 18:50:05 +02001740 spin_lock_bh(&htt->tx_lock);
1741 while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001742 ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
1743 dev_kfree_skb_any(skb);
1744 }
Michal Kazior45967082014-02-27 18:50:05 +02001745 spin_unlock_bh(&htt->tx_lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001746
Michal Kazior45967082014-02-27 18:50:05 +02001747 spin_lock_bh(&htt->rx_ring.lock);
1748 while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001749 resp = (struct htt_resp *)skb->data;
1750 ath10k_htt_rx_handler(htt, &resp->rx_ind);
1751 dev_kfree_skb_any(skb);
1752 }
Michal Kazior45967082014-02-27 18:50:05 +02001753 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001754}