blob: 3820317d9a4255ced9cc9619a8608b2c8bd6b619 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010051#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020052#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020053#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020054#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020055#include <net/switchdev.h>
56#include <generated/utsrelease.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020059
60#include "spectrum.h"
61#include "core.h"
62#include "reg.h"
63#include "port.h"
64#include "trap.h"
65#include "txheader.h"
66
67static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
68static const char mlxsw_sp_driver_version[] = "1.0";
69
70/* tx_hdr_version
71 * Tx header version.
72 * Must be set to 1.
73 */
74MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
75
76/* tx_hdr_ctl
77 * Packet control type.
78 * 0 - Ethernet control (e.g. EMADs, LACP)
79 * 1 - Ethernet data
80 */
81MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
82
83/* tx_hdr_proto
84 * Packet protocol type. Must be set to 1 (Ethernet).
85 */
86MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
87
88/* tx_hdr_rx_is_router
89 * Packet is sent from the router. Valid for data packets only.
90 */
91MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
92
93/* tx_hdr_fid_valid
94 * Indicates if the 'fid' field is valid and should be used for
95 * forwarding lookup. Valid for data packets only.
96 */
97MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
98
99/* tx_hdr_swid
100 * Switch partition ID. Must be set to 0.
101 */
102MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
103
104/* tx_hdr_control_tclass
105 * Indicates if the packet should use the control TClass and not one
106 * of the data TClasses.
107 */
108MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
109
110/* tx_hdr_etclass
111 * Egress TClass to be used on the egress device on the egress port.
112 */
113MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
114
115/* tx_hdr_port_mid
116 * Destination local port for unicast packets.
117 * Destination multicast ID for multicast packets.
118 *
119 * Control packets are directed to a specific egress port, while data
120 * packets are transmitted through the CPU port (0) into the switch partition,
121 * where forwarding rules are applied.
122 */
123MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
124
125/* tx_hdr_fid
126 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
127 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
128 * Valid for data packets only.
129 */
130MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
131
132/* tx_hdr_type
133 * 0 - Data packets
134 * 6 - Control packets
135 */
136MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
137
Yotam Gigi763b4b72016-07-21 12:03:17 +0200138static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
139
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200140static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
141 const struct mlxsw_tx_info *tx_info)
142{
143 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
144
145 memset(txhdr, 0, MLXSW_TXHDR_LEN);
146
147 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
148 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
149 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
150 mlxsw_tx_hdr_swid_set(txhdr, 0);
151 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
152 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
153 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
154}
155
156static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
157{
158 char spad_pl[MLXSW_REG_SPAD_LEN];
159 int err;
160
161 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
162 if (err)
163 return err;
164 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
165 return 0;
166}
167
Yotam Gigi763b4b72016-07-21 12:03:17 +0200168static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
169{
170 struct mlxsw_resources *resources;
171 int i;
172
173 resources = mlxsw_core_resources_get(mlxsw_sp->core);
174 if (!resources->max_span_valid)
175 return -EIO;
176
177 mlxsw_sp->span.entries_count = resources->max_span;
178 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
179 sizeof(struct mlxsw_sp_span_entry),
180 GFP_KERNEL);
181 if (!mlxsw_sp->span.entries)
182 return -ENOMEM;
183
184 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
185 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
186
187 return 0;
188}
189
190static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
191{
192 int i;
193
194 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
195 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
196
197 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
198 }
199 kfree(mlxsw_sp->span.entries);
200}
201
202static struct mlxsw_sp_span_entry *
203mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
204{
205 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
206 struct mlxsw_sp_span_entry *span_entry;
207 char mpat_pl[MLXSW_REG_MPAT_LEN];
208 u8 local_port = port->local_port;
209 int index;
210 int i;
211 int err;
212
213 /* find a free entry to use */
214 index = -1;
215 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
216 if (!mlxsw_sp->span.entries[i].used) {
217 index = i;
218 span_entry = &mlxsw_sp->span.entries[i];
219 break;
220 }
221 }
222 if (index < 0)
223 return NULL;
224
225 /* create a new port analayzer entry for local_port */
226 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
227 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
228 if (err)
229 return NULL;
230
231 span_entry->used = true;
232 span_entry->id = index;
233 span_entry->ref_count = 0;
234 span_entry->local_port = local_port;
235 return span_entry;
236}
237
238static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
239 struct mlxsw_sp_span_entry *span_entry)
240{
241 u8 local_port = span_entry->local_port;
242 char mpat_pl[MLXSW_REG_MPAT_LEN];
243 int pa_id = span_entry->id;
244
245 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
246 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
247 span_entry->used = false;
248}
249
250struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
251{
252 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
253 int i;
254
255 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
256 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
257
258 if (curr->used && curr->local_port == port->local_port)
259 return curr;
260 }
261 return NULL;
262}
263
264struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
265{
266 struct mlxsw_sp_span_entry *span_entry;
267
268 span_entry = mlxsw_sp_span_entry_find(port);
269 if (span_entry) {
270 span_entry->ref_count++;
271 return span_entry;
272 }
273
274 return mlxsw_sp_span_entry_create(port);
275}
276
277static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
278 struct mlxsw_sp_span_entry *span_entry)
279{
280 if (--span_entry->ref_count == 0)
281 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
282 return 0;
283}
284
285static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
286{
287 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
288 struct mlxsw_sp_span_inspected_port *p;
289 int i;
290
291 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
292 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
293
294 list_for_each_entry(p, &curr->bound_ports_list, list)
295 if (p->local_port == port->local_port &&
296 p->type == MLXSW_SP_SPAN_EGRESS)
297 return true;
298 }
299
300 return false;
301}
302
303static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
304{
305 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
306}
307
308static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
309{
310 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
311 char sbib_pl[MLXSW_REG_SBIB_LEN];
312 int err;
313
314 /* If port is egress mirrored, the shared buffer size should be
315 * updated according to the mtu value
316 */
317 if (mlxsw_sp_span_is_egress_mirror(port)) {
318 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
319 mlxsw_sp_span_mtu_to_buffsize(mtu));
320 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
321 if (err) {
322 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
323 return err;
324 }
325 }
326
327 return 0;
328}
329
330static struct mlxsw_sp_span_inspected_port *
331mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
332 struct mlxsw_sp_span_entry *span_entry)
333{
334 struct mlxsw_sp_span_inspected_port *p;
335
336 list_for_each_entry(p, &span_entry->bound_ports_list, list)
337 if (port->local_port == p->local_port)
338 return p;
339 return NULL;
340}
341
342static int
343mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
344 struct mlxsw_sp_span_entry *span_entry,
345 enum mlxsw_sp_span_type type)
346{
347 struct mlxsw_sp_span_inspected_port *inspected_port;
348 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
349 char mpar_pl[MLXSW_REG_MPAR_LEN];
350 char sbib_pl[MLXSW_REG_SBIB_LEN];
351 int pa_id = span_entry->id;
352 int err;
353
354 /* if it is an egress SPAN, bind a shared buffer to it */
355 if (type == MLXSW_SP_SPAN_EGRESS) {
356 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
357 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
358 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
359 if (err) {
360 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
361 return err;
362 }
363 }
364
365 /* bind the port to the SPAN entry */
366 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, true, pa_id);
367 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
368 if (err)
369 goto err_mpar_reg_write;
370
371 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
372 if (!inspected_port) {
373 err = -ENOMEM;
374 goto err_inspected_port_alloc;
375 }
376 inspected_port->local_port = port->local_port;
377 inspected_port->type = type;
378 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
379
380 return 0;
381
382err_mpar_reg_write:
383err_inspected_port_alloc:
384 if (type == MLXSW_SP_SPAN_EGRESS) {
385 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
386 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
387 }
388 return err;
389}
390
391static void
392mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
393 struct mlxsw_sp_span_entry *span_entry,
394 enum mlxsw_sp_span_type type)
395{
396 struct mlxsw_sp_span_inspected_port *inspected_port;
397 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
398 char mpar_pl[MLXSW_REG_MPAR_LEN];
399 char sbib_pl[MLXSW_REG_SBIB_LEN];
400 int pa_id = span_entry->id;
401
402 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
403 if (!inspected_port)
404 return;
405
406 /* remove the inspected port */
407 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, false, pa_id);
408 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
409
410 /* remove the SBIB buffer if it was egress SPAN */
411 if (type == MLXSW_SP_SPAN_EGRESS) {
412 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
413 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
414 }
415
416 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
417
418 list_del(&inspected_port->list);
419 kfree(inspected_port);
420}
421
422static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
423 struct mlxsw_sp_port *to,
424 enum mlxsw_sp_span_type type)
425{
426 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
427 struct mlxsw_sp_span_entry *span_entry;
428 int err;
429
430 span_entry = mlxsw_sp_span_entry_get(to);
431 if (!span_entry)
432 return -ENOENT;
433
434 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
435 span_entry->id);
436
437 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
438 if (err)
439 goto err_port_bind;
440
441 return 0;
442
443err_port_bind:
444 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
445 return err;
446}
447
448static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
449 struct mlxsw_sp_port *to,
450 enum mlxsw_sp_span_type type)
451{
452 struct mlxsw_sp_span_entry *span_entry;
453
454 span_entry = mlxsw_sp_span_entry_find(to);
455 if (!span_entry) {
456 netdev_err(from->dev, "no span entry found\n");
457 return;
458 }
459
460 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
461 span_entry->id);
462 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
463}
464
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200465static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
466 bool is_up)
467{
468 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
469 char paos_pl[MLXSW_REG_PAOS_LEN];
470
471 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
472 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
473 MLXSW_PORT_ADMIN_STATUS_DOWN);
474 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
475}
476
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200477static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
478 unsigned char *addr)
479{
480 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
481 char ppad_pl[MLXSW_REG_PPAD_LEN];
482
483 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
484 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
485 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
486}
487
488static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
489{
490 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
491 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
492
493 ether_addr_copy(addr, mlxsw_sp->base_mac);
494 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
495 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
496}
497
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200498static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
499{
500 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
501 char pmtu_pl[MLXSW_REG_PMTU_LEN];
502 int max_mtu;
503 int err;
504
505 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
506 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
507 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
508 if (err)
509 return err;
510 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
511
512 if (mtu > max_mtu)
513 return -EINVAL;
514
515 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
516 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
517}
518
Ido Schimmelbe945352016-06-09 09:51:39 +0200519static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
520 u8 swid)
521{
522 char pspa_pl[MLXSW_REG_PSPA_LEN];
523
524 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
525 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
526}
527
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200528static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
529{
530 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200531
Ido Schimmelbe945352016-06-09 09:51:39 +0200532 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
533 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200534}
535
536static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
537 bool enable)
538{
539 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
540 char svpe_pl[MLXSW_REG_SVPE_LEN];
541
542 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
543 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
544}
545
546int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
547 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
548 u16 vid)
549{
550 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
551 char svfa_pl[MLXSW_REG_SVFA_LEN];
552
553 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
554 fid, vid);
555 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
556}
557
Ido Schimmel584d73d2016-08-24 12:00:26 +0200558int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
559 u16 vid_begin, u16 vid_end,
560 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200561{
562 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
563 char *spvmlr_pl;
564 int err;
565
566 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
567 if (!spvmlr_pl)
568 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200569 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
570 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200571 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
572 kfree(spvmlr_pl);
573 return err;
574}
575
Ido Schimmel584d73d2016-08-24 12:00:26 +0200576static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
577 u16 vid, bool learn_enable)
578{
579 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
580 learn_enable);
581}
582
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200583static int
584mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
585{
586 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
587 char sspr_pl[MLXSW_REG_SSPR_LEN];
588
589 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
590 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
591}
592
Ido Schimmeld664b412016-06-09 09:51:40 +0200593static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
594 u8 local_port, u8 *p_module,
595 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200596{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200597 char pmlp_pl[MLXSW_REG_PMLP_LEN];
598 int err;
599
Ido Schimmel558c2d52016-02-26 17:32:29 +0100600 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200601 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
602 if (err)
603 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100604 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
605 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200606 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200607 return 0;
608}
609
Ido Schimmel18f1e702016-02-26 17:32:31 +0100610static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
611 u8 module, u8 width, u8 lane)
612{
613 char pmlp_pl[MLXSW_REG_PMLP_LEN];
614 int i;
615
616 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
617 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
618 for (i = 0; i < width; i++) {
619 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
620 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
621 }
622
623 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
624}
625
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100626static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
627{
628 char pmlp_pl[MLXSW_REG_PMLP_LEN];
629
630 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
631 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
632 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
633}
634
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200635static int mlxsw_sp_port_open(struct net_device *dev)
636{
637 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
638 int err;
639
640 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
641 if (err)
642 return err;
643 netif_start_queue(dev);
644 return 0;
645}
646
647static int mlxsw_sp_port_stop(struct net_device *dev)
648{
649 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
650
651 netif_stop_queue(dev);
652 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
653}
654
655static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
656 struct net_device *dev)
657{
658 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
659 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
660 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
661 const struct mlxsw_tx_info tx_info = {
662 .local_port = mlxsw_sp_port->local_port,
663 .is_emad = false,
664 };
665 u64 len;
666 int err;
667
Jiri Pirko307c2432016-04-08 19:11:22 +0200668 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200669 return NETDEV_TX_BUSY;
670
671 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
672 struct sk_buff *skb_orig = skb;
673
674 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
675 if (!skb) {
676 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
677 dev_kfree_skb_any(skb_orig);
678 return NETDEV_TX_OK;
679 }
680 }
681
682 if (eth_skb_pad(skb)) {
683 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
684 return NETDEV_TX_OK;
685 }
686
687 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200688 /* TX header is consumed by HW on the way so we shouldn't count its
689 * bytes as being sent.
690 */
691 len = skb->len - MLXSW_TXHDR_LEN;
692
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200693 /* Due to a race we might fail here because of a full queue. In that
694 * unlikely case we simply drop the packet.
695 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200696 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200697
698 if (!err) {
699 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
700 u64_stats_update_begin(&pcpu_stats->syncp);
701 pcpu_stats->tx_packets++;
702 pcpu_stats->tx_bytes += len;
703 u64_stats_update_end(&pcpu_stats->syncp);
704 } else {
705 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
706 dev_kfree_skb_any(skb);
707 }
708 return NETDEV_TX_OK;
709}
710
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100711static void mlxsw_sp_set_rx_mode(struct net_device *dev)
712{
713}
714
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200715static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
716{
717 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
718 struct sockaddr *addr = p;
719 int err;
720
721 if (!is_valid_ether_addr(addr->sa_data))
722 return -EADDRNOTAVAIL;
723
724 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
725 if (err)
726 return err;
727 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
728 return 0;
729}
730
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200731static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200732 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200733{
734 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
735
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200736 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
737 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200738
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200739 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200740 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200741 pg_size + delay, pg_size);
742 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200743 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200744}
745
746int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200747 u8 *prio_tc, bool pause_en,
748 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200749{
750 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200751 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
752 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200753 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200754 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200755
756 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
757 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
758 if (err)
759 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200760
761 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
762 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200763 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200764
765 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
766 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200767 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200768 configure = true;
769 break;
770 }
771 }
772
773 if (!configure)
774 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200775 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200776 }
777
Ido Schimmelff6551e2016-04-06 17:10:03 +0200778 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
779}
780
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200781static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200782 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200783{
784 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
785 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200786 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200787 u8 *prio_tc;
788
789 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200790 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200791
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200792 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200793 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200794}
795
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200796static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
797{
798 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200799 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200800 int err;
801
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200802 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200803 if (err)
804 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200805 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
806 if (err)
807 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200808 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
809 if (err)
810 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200811 dev->mtu = mtu;
812 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200813
814err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200815 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
816err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200817 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200818 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200819}
820
821static struct rtnl_link_stats64 *
822mlxsw_sp_port_get_stats64(struct net_device *dev,
823 struct rtnl_link_stats64 *stats)
824{
825 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
826 struct mlxsw_sp_port_pcpu_stats *p;
827 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
828 u32 tx_dropped = 0;
829 unsigned int start;
830 int i;
831
832 for_each_possible_cpu(i) {
833 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
834 do {
835 start = u64_stats_fetch_begin_irq(&p->syncp);
836 rx_packets = p->rx_packets;
837 rx_bytes = p->rx_bytes;
838 tx_packets = p->tx_packets;
839 tx_bytes = p->tx_bytes;
840 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
841
842 stats->rx_packets += rx_packets;
843 stats->rx_bytes += rx_bytes;
844 stats->tx_packets += tx_packets;
845 stats->tx_bytes += tx_bytes;
846 /* tx_dropped is u32, updated without syncp protection. */
847 tx_dropped += p->tx_dropped;
848 }
849 stats->tx_dropped = tx_dropped;
850 return stats;
851}
852
853int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
854 u16 vid_end, bool is_member, bool untagged)
855{
856 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
857 char *spvm_pl;
858 int err;
859
860 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
861 if (!spvm_pl)
862 return -ENOMEM;
863
864 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
865 vid_end, is_member, untagged);
866 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
867 kfree(spvm_pl);
868 return err;
869}
870
871static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
872{
873 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
874 u16 vid, last_visited_vid;
875 int err;
876
877 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
878 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
879 vid);
880 if (err) {
881 last_visited_vid = vid;
882 goto err_port_vid_to_fid_set;
883 }
884 }
885
886 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
887 if (err) {
888 last_visited_vid = VLAN_N_VID;
889 goto err_port_vid_to_fid_set;
890 }
891
892 return 0;
893
894err_port_vid_to_fid_set:
895 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
896 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
897 vid);
898 return err;
899}
900
901static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
902{
903 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
904 u16 vid;
905 int err;
906
907 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
908 if (err)
909 return err;
910
911 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
912 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
913 vid, vid);
914 if (err)
915 return err;
916 }
917
918 return 0;
919}
920
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100921static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +0200922mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100923{
924 struct mlxsw_sp_port *mlxsw_sp_vport;
925
926 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
927 if (!mlxsw_sp_vport)
928 return NULL;
929
930 /* dev will be set correctly after the VLAN device is linked
931 * with the real device. In case of bridge SELF invocation, dev
932 * will remain as is.
933 */
934 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
935 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
936 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
937 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +0100938 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
939 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +0200940 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100941
942 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
943
944 return mlxsw_sp_vport;
945}
946
947static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
948{
949 list_del(&mlxsw_sp_vport->vport.list);
950 kfree(mlxsw_sp_vport);
951}
952
Ido Schimmel05978482016-08-17 16:39:30 +0200953static int mlxsw_sp_port_add_vid(struct net_device *dev,
954 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200955{
956 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100957 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +0200958 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200959 int err;
960
961 /* VLAN 0 is added to HW filter when device goes up, but it is
962 * reserved in our case, so simply return.
963 */
964 if (!vid)
965 return 0;
966
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200967 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200968 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200969
Ido Schimmel0355b592016-06-20 23:04:13 +0200970 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200971 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +0200972 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200973
974 /* When adding the first VLAN interface on a bridged port we need to
975 * transition all the active 802.1Q bridge VLANs to use explicit
976 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
977 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100978 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200979 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200980 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100981 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200982 }
983
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100984 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200985 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200986 goto err_port_vid_learning_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200987
Ido Schimmel52697a92016-07-02 11:00:09 +0200988 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200989 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200990 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200991
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200992 return 0;
993
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200994err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100995 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200996err_port_vid_learning_set:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100997 if (list_is_singular(&mlxsw_sp_port->vports_list))
998 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
999err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001000 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001001 return err;
1002}
1003
Ido Schimmel32d863f2016-07-02 11:00:10 +02001004static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1005 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001006{
1007 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001008 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001009 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001010
1011 /* VLAN 0 is removed from HW filter when device goes down, but
1012 * it is reserved in our case, so simply return.
1013 */
1014 if (!vid)
1015 return 0;
1016
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001017 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001018 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001019 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001020
Ido Schimmel7a355832016-08-17 16:39:28 +02001021 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001022
Ido Schimmel7a355832016-08-17 16:39:28 +02001023 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001024
Ido Schimmel1c800752016-06-20 23:04:20 +02001025 /* Drop FID reference. If this was the last reference the
1026 * resources will be freed.
1027 */
1028 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1029 if (f && !WARN_ON(!f->leave))
1030 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001031
1032 /* When removing the last VLAN interface on a bridged port we need to
1033 * transition all active 802.1Q bridge VLANs to use VID to FID
1034 * mappings and set port's mode to VLAN mode.
1035 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001036 if (list_is_singular(&mlxsw_sp_port->vports_list))
1037 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001038
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001039 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1040
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001041 return 0;
1042}
1043
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001044static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1045 size_t len)
1046{
1047 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001048 u8 module = mlxsw_sp_port->mapping.module;
1049 u8 width = mlxsw_sp_port->mapping.width;
1050 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001051 int err;
1052
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001053 if (!mlxsw_sp_port->split)
1054 err = snprintf(name, len, "p%d", module + 1);
1055 else
1056 err = snprintf(name, len, "p%ds%d", module + 1,
1057 lane / width);
1058
1059 if (err >= len)
1060 return -EINVAL;
1061
1062 return 0;
1063}
1064
Yotam Gigi763b4b72016-07-21 12:03:17 +02001065static struct mlxsw_sp_port_mall_tc_entry *
1066mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1067 unsigned long cookie) {
1068 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1069
1070 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1071 if (mall_tc_entry->cookie == cookie)
1072 return mall_tc_entry;
1073
1074 return NULL;
1075}
1076
1077static int
1078mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1079 struct tc_cls_matchall_offload *cls,
1080 const struct tc_action *a,
1081 bool ingress)
1082{
1083 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1084 struct net *net = dev_net(mlxsw_sp_port->dev);
1085 enum mlxsw_sp_span_type span_type;
1086 struct mlxsw_sp_port *to_port;
1087 struct net_device *to_dev;
1088 int ifindex;
1089 int err;
1090
1091 ifindex = tcf_mirred_ifindex(a);
1092 to_dev = __dev_get_by_index(net, ifindex);
1093 if (!to_dev) {
1094 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1095 return -EINVAL;
1096 }
1097
1098 if (!mlxsw_sp_port_dev_check(to_dev)) {
1099 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1100 return -ENOTSUPP;
1101 }
1102 to_port = netdev_priv(to_dev);
1103
1104 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1105 if (!mall_tc_entry)
1106 return -ENOMEM;
1107
1108 mall_tc_entry->cookie = cls->cookie;
1109 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1110 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1111 mall_tc_entry->mirror.ingress = ingress;
1112 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1113
1114 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1115 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1116 if (err)
1117 goto err_mirror_add;
1118 return 0;
1119
1120err_mirror_add:
1121 list_del(&mall_tc_entry->list);
1122 kfree(mall_tc_entry);
1123 return err;
1124}
1125
1126static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1127 __be16 protocol,
1128 struct tc_cls_matchall_offload *cls,
1129 bool ingress)
1130{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001131 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001132 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001133 int err;
1134
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001135 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001136 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1137 return -ENOTSUPP;
1138 }
1139
WANG Cong22dc13c2016-08-13 22:35:00 -07001140 tcf_exts_to_list(cls->exts, &actions);
1141 list_for_each_entry(a, &actions, list) {
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001142 if (!is_tcf_mirred_mirror(a) || protocol != htons(ETH_P_ALL))
1143 return -ENOTSUPP;
1144
Yotam Gigi763b4b72016-07-21 12:03:17 +02001145 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1146 a, ingress);
1147 if (err)
1148 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001149 }
1150
1151 return 0;
1152}
1153
1154static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1155 struct tc_cls_matchall_offload *cls)
1156{
1157 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1158 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1159 enum mlxsw_sp_span_type span_type;
1160 struct mlxsw_sp_port *to_port;
1161
1162 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1163 cls->cookie);
1164 if (!mall_tc_entry) {
1165 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1166 return;
1167 }
1168
1169 switch (mall_tc_entry->type) {
1170 case MLXSW_SP_PORT_MALL_MIRROR:
1171 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1172 span_type = mall_tc_entry->mirror.ingress ?
1173 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1174
1175 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1176 break;
1177 default:
1178 WARN_ON(1);
1179 }
1180
1181 list_del(&mall_tc_entry->list);
1182 kfree(mall_tc_entry);
1183}
1184
1185static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1186 __be16 proto, struct tc_to_netdev *tc)
1187{
1188 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1189 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1190
1191 if (tc->type == TC_SETUP_MATCHALL) {
1192 switch (tc->cls_mall->command) {
1193 case TC_CLSMATCHALL_REPLACE:
1194 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1195 proto,
1196 tc->cls_mall,
1197 ingress);
1198 case TC_CLSMATCHALL_DESTROY:
1199 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1200 tc->cls_mall);
1201 return 0;
1202 default:
1203 return -EINVAL;
1204 }
1205 }
1206
1207 return -ENOTSUPP;
1208}
1209
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001210static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1211 .ndo_open = mlxsw_sp_port_open,
1212 .ndo_stop = mlxsw_sp_port_stop,
1213 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001214 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001215 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001216 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1217 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1218 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
1219 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1220 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001221 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1222 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001223 .ndo_fdb_add = switchdev_port_fdb_add,
1224 .ndo_fdb_del = switchdev_port_fdb_del,
1225 .ndo_fdb_dump = switchdev_port_fdb_dump,
1226 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1227 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1228 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001229 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001230};
1231
1232static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1233 struct ethtool_drvinfo *drvinfo)
1234{
1235 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1236 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1237
1238 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1239 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1240 sizeof(drvinfo->version));
1241 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1242 "%d.%d.%d",
1243 mlxsw_sp->bus_info->fw_rev.major,
1244 mlxsw_sp->bus_info->fw_rev.minor,
1245 mlxsw_sp->bus_info->fw_rev.subminor);
1246 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1247 sizeof(drvinfo->bus_info));
1248}
1249
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001250static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1251 struct ethtool_pauseparam *pause)
1252{
1253 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1254
1255 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1256 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1257}
1258
1259static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1260 struct ethtool_pauseparam *pause)
1261{
1262 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1263
1264 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1265 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1266 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1267
1268 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1269 pfcc_pl);
1270}
1271
1272static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1273 struct ethtool_pauseparam *pause)
1274{
1275 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1276 bool pause_en = pause->tx_pause || pause->rx_pause;
1277 int err;
1278
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001279 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1280 netdev_err(dev, "PFC already enabled on port\n");
1281 return -EINVAL;
1282 }
1283
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001284 if (pause->autoneg) {
1285 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1286 return -EINVAL;
1287 }
1288
1289 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1290 if (err) {
1291 netdev_err(dev, "Failed to configure port's headroom\n");
1292 return err;
1293 }
1294
1295 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1296 if (err) {
1297 netdev_err(dev, "Failed to set PAUSE parameters\n");
1298 goto err_port_pause_configure;
1299 }
1300
1301 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1302 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1303
1304 return 0;
1305
1306err_port_pause_configure:
1307 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1308 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1309 return err;
1310}
1311
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001312struct mlxsw_sp_port_hw_stats {
1313 char str[ETH_GSTRING_LEN];
1314 u64 (*getter)(char *payload);
1315};
1316
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001317static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001318 {
1319 .str = "a_frames_transmitted_ok",
1320 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1321 },
1322 {
1323 .str = "a_frames_received_ok",
1324 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1325 },
1326 {
1327 .str = "a_frame_check_sequence_errors",
1328 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1329 },
1330 {
1331 .str = "a_alignment_errors",
1332 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1333 },
1334 {
1335 .str = "a_octets_transmitted_ok",
1336 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1337 },
1338 {
1339 .str = "a_octets_received_ok",
1340 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1341 },
1342 {
1343 .str = "a_multicast_frames_xmitted_ok",
1344 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1345 },
1346 {
1347 .str = "a_broadcast_frames_xmitted_ok",
1348 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1349 },
1350 {
1351 .str = "a_multicast_frames_received_ok",
1352 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1353 },
1354 {
1355 .str = "a_broadcast_frames_received_ok",
1356 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1357 },
1358 {
1359 .str = "a_in_range_length_errors",
1360 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1361 },
1362 {
1363 .str = "a_out_of_range_length_field",
1364 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1365 },
1366 {
1367 .str = "a_frame_too_long_errors",
1368 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1369 },
1370 {
1371 .str = "a_symbol_error_during_carrier",
1372 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1373 },
1374 {
1375 .str = "a_mac_control_frames_transmitted",
1376 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1377 },
1378 {
1379 .str = "a_mac_control_frames_received",
1380 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1381 },
1382 {
1383 .str = "a_unsupported_opcodes_received",
1384 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1385 },
1386 {
1387 .str = "a_pause_mac_ctrl_frames_received",
1388 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1389 },
1390 {
1391 .str = "a_pause_mac_ctrl_frames_xmitted",
1392 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1393 },
1394};
1395
1396#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1397
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001398static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1399 {
1400 .str = "rx_octets_prio",
1401 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1402 },
1403 {
1404 .str = "rx_frames_prio",
1405 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1406 },
1407 {
1408 .str = "tx_octets_prio",
1409 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1410 },
1411 {
1412 .str = "tx_frames_prio",
1413 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1414 },
1415 {
1416 .str = "rx_pause_prio",
1417 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1418 },
1419 {
1420 .str = "rx_pause_duration_prio",
1421 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1422 },
1423 {
1424 .str = "tx_pause_prio",
1425 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1426 },
1427 {
1428 .str = "tx_pause_duration_prio",
1429 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1430 },
1431};
1432
1433#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1434
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001435static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
1436{
1437 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1438
1439 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1440}
1441
1442static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1443 {
1444 .str = "tc_transmit_queue_tc",
1445 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1446 },
1447 {
1448 .str = "tc_no_buffer_discard_uc_tc",
1449 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1450 },
1451};
1452
1453#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1454
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001455#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001456 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1457 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001458 IEEE_8021QAZ_MAX_TCS)
1459
1460static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1461{
1462 int i;
1463
1464 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1465 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1466 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1467 *p += ETH_GSTRING_LEN;
1468 }
1469}
1470
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001471static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1472{
1473 int i;
1474
1475 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1476 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1477 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1478 *p += ETH_GSTRING_LEN;
1479 }
1480}
1481
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001482static void mlxsw_sp_port_get_strings(struct net_device *dev,
1483 u32 stringset, u8 *data)
1484{
1485 u8 *p = data;
1486 int i;
1487
1488 switch (stringset) {
1489 case ETH_SS_STATS:
1490 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1491 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1492 ETH_GSTRING_LEN);
1493 p += ETH_GSTRING_LEN;
1494 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001495
1496 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1497 mlxsw_sp_port_get_prio_strings(&p, i);
1498
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001499 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1500 mlxsw_sp_port_get_tc_strings(&p, i);
1501
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001502 break;
1503 }
1504}
1505
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001506static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1507 enum ethtool_phys_id_state state)
1508{
1509 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1510 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1511 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1512 bool active;
1513
1514 switch (state) {
1515 case ETHTOOL_ID_ACTIVE:
1516 active = true;
1517 break;
1518 case ETHTOOL_ID_INACTIVE:
1519 active = false;
1520 break;
1521 default:
1522 return -EOPNOTSUPP;
1523 }
1524
1525 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1526 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1527}
1528
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001529static int
1530mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1531 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1532{
1533 switch (grp) {
1534 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1535 *p_hw_stats = mlxsw_sp_port_hw_stats;
1536 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1537 break;
1538 case MLXSW_REG_PPCNT_PRIO_CNT:
1539 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1540 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1541 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001542 case MLXSW_REG_PPCNT_TC_CNT:
1543 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1544 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1545 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001546 default:
1547 WARN_ON(1);
1548 return -ENOTSUPP;
1549 }
1550 return 0;
1551}
1552
1553static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1554 enum mlxsw_reg_ppcnt_grp grp, int prio,
1555 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001556{
1557 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1558 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001559 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001560 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001561 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001562 int err;
1563
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001564 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1565 if (err)
1566 return;
1567 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001568 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001569 for (i = 0; i < len; i++)
1570 data[data_index + i] = !err ? hw_stats[i].getter(ppcnt_pl) : 0;
1571}
1572
1573static void mlxsw_sp_port_get_stats(struct net_device *dev,
1574 struct ethtool_stats *stats, u64 *data)
1575{
1576 int i, data_index = 0;
1577
1578 /* IEEE 802.3 Counters */
1579 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1580 data, data_index);
1581 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1582
1583 /* Per-Priority Counters */
1584 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1585 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1586 data, data_index);
1587 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1588 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001589
1590 /* Per-TC Counters */
1591 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1592 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1593 data, data_index);
1594 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1595 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001596}
1597
1598static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1599{
1600 switch (sset) {
1601 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001602 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001603 default:
1604 return -EOPNOTSUPP;
1605 }
1606}
1607
1608struct mlxsw_sp_port_link_mode {
1609 u32 mask;
1610 u32 supported;
1611 u32 advertised;
1612 u32 speed;
1613};
1614
1615static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1616 {
1617 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1618 .supported = SUPPORTED_100baseT_Full,
1619 .advertised = ADVERTISED_100baseT_Full,
1620 .speed = 100,
1621 },
1622 {
1623 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
1624 .speed = 100,
1625 },
1626 {
1627 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1628 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1629 .supported = SUPPORTED_1000baseKX_Full,
1630 .advertised = ADVERTISED_1000baseKX_Full,
1631 .speed = 1000,
1632 },
1633 {
1634 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1635 .supported = SUPPORTED_10000baseT_Full,
1636 .advertised = ADVERTISED_10000baseT_Full,
1637 .speed = 10000,
1638 },
1639 {
1640 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1641 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1642 .supported = SUPPORTED_10000baseKX4_Full,
1643 .advertised = ADVERTISED_10000baseKX4_Full,
1644 .speed = 10000,
1645 },
1646 {
1647 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1648 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1649 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1650 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1651 .supported = SUPPORTED_10000baseKR_Full,
1652 .advertised = ADVERTISED_10000baseKR_Full,
1653 .speed = 10000,
1654 },
1655 {
1656 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1657 .supported = SUPPORTED_20000baseKR2_Full,
1658 .advertised = ADVERTISED_20000baseKR2_Full,
1659 .speed = 20000,
1660 },
1661 {
1662 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1663 .supported = SUPPORTED_40000baseCR4_Full,
1664 .advertised = ADVERTISED_40000baseCR4_Full,
1665 .speed = 40000,
1666 },
1667 {
1668 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1669 .supported = SUPPORTED_40000baseKR4_Full,
1670 .advertised = ADVERTISED_40000baseKR4_Full,
1671 .speed = 40000,
1672 },
1673 {
1674 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1675 .supported = SUPPORTED_40000baseSR4_Full,
1676 .advertised = ADVERTISED_40000baseSR4_Full,
1677 .speed = 40000,
1678 },
1679 {
1680 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1681 .supported = SUPPORTED_40000baseLR4_Full,
1682 .advertised = ADVERTISED_40000baseLR4_Full,
1683 .speed = 40000,
1684 },
1685 {
1686 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
1687 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
1688 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1689 .speed = 25000,
1690 },
1691 {
1692 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
1693 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
1694 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1695 .speed = 50000,
1696 },
1697 {
1698 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1699 .supported = SUPPORTED_56000baseKR4_Full,
1700 .advertised = ADVERTISED_56000baseKR4_Full,
1701 .speed = 56000,
1702 },
1703 {
1704 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
1705 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1706 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1707 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1708 .speed = 100000,
1709 },
1710};
1711
1712#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1713
1714static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
1715{
1716 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1717 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1718 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1719 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1720 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1721 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1722 return SUPPORTED_FIBRE;
1723
1724 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1725 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1726 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1727 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1728 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1729 return SUPPORTED_Backplane;
1730 return 0;
1731}
1732
1733static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1734{
1735 u32 modes = 0;
1736 int i;
1737
1738 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1739 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1740 modes |= mlxsw_sp_port_link_mode[i].supported;
1741 }
1742 return modes;
1743}
1744
1745static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1746{
1747 u32 modes = 0;
1748 int i;
1749
1750 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1751 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1752 modes |= mlxsw_sp_port_link_mode[i].advertised;
1753 }
1754 return modes;
1755}
1756
1757static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1758 struct ethtool_cmd *cmd)
1759{
1760 u32 speed = SPEED_UNKNOWN;
1761 u8 duplex = DUPLEX_UNKNOWN;
1762 int i;
1763
1764 if (!carrier_ok)
1765 goto out;
1766
1767 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1768 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1769 speed = mlxsw_sp_port_link_mode[i].speed;
1770 duplex = DUPLEX_FULL;
1771 break;
1772 }
1773 }
1774out:
1775 ethtool_cmd_speed_set(cmd, speed);
1776 cmd->duplex = duplex;
1777}
1778
1779static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1780{
1781 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1782 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1783 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1784 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1785 return PORT_FIBRE;
1786
1787 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1788 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1789 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1790 return PORT_DA;
1791
1792 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1793 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1794 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1795 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1796 return PORT_NONE;
1797
1798 return PORT_OTHER;
1799}
1800
1801static int mlxsw_sp_port_get_settings(struct net_device *dev,
1802 struct ethtool_cmd *cmd)
1803{
1804 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1805 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1806 char ptys_pl[MLXSW_REG_PTYS_LEN];
1807 u32 eth_proto_cap;
1808 u32 eth_proto_admin;
1809 u32 eth_proto_oper;
1810 int err;
1811
1812 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1813 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1814 if (err) {
1815 netdev_err(dev, "Failed to get proto");
1816 return err;
1817 }
1818 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap,
1819 &eth_proto_admin, &eth_proto_oper);
1820
1821 cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1822 mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
Ido Schimmelc3f15762016-07-15 11:14:59 +02001823 SUPPORTED_Pause | SUPPORTED_Asym_Pause |
1824 SUPPORTED_Autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001825 cmd->advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1826 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1827 eth_proto_oper, cmd);
1828
1829 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1830 cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
1831 cmd->lp_advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_oper);
1832
1833 cmd->transceiver = XCVR_INTERNAL;
1834 return 0;
1835}
1836
1837static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1838{
1839 u32 ptys_proto = 0;
1840 int i;
1841
1842 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1843 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1844 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1845 }
1846 return ptys_proto;
1847}
1848
1849static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1850{
1851 u32 ptys_proto = 0;
1852 int i;
1853
1854 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1855 if (speed == mlxsw_sp_port_link_mode[i].speed)
1856 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1857 }
1858 return ptys_proto;
1859}
1860
Ido Schimmel18f1e702016-02-26 17:32:31 +01001861static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1862{
1863 u32 ptys_proto = 0;
1864 int i;
1865
1866 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1867 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1868 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1869 }
1870 return ptys_proto;
1871}
1872
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001873static int mlxsw_sp_port_set_settings(struct net_device *dev,
1874 struct ethtool_cmd *cmd)
1875{
1876 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1877 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1878 char ptys_pl[MLXSW_REG_PTYS_LEN];
1879 u32 speed;
1880 u32 eth_proto_new;
1881 u32 eth_proto_cap;
1882 u32 eth_proto_admin;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001883 int err;
1884
1885 speed = ethtool_cmd_speed(cmd);
1886
1887 eth_proto_new = cmd->autoneg == AUTONEG_ENABLE ?
1888 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1889 mlxsw_sp_to_ptys_speed(speed);
1890
1891 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1892 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1893 if (err) {
1894 netdev_err(dev, "Failed to get proto");
1895 return err;
1896 }
1897 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin, NULL);
1898
1899 eth_proto_new = eth_proto_new & eth_proto_cap;
1900 if (!eth_proto_new) {
1901 netdev_err(dev, "Not supported proto admin requested");
1902 return -EINVAL;
1903 }
1904 if (eth_proto_new == eth_proto_admin)
1905 return 0;
1906
1907 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1908 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1909 if (err) {
1910 netdev_err(dev, "Failed to set proto admin");
1911 return err;
1912 }
1913
Ido Schimmel6277d462016-07-15 11:14:58 +02001914 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001915 return 0;
1916
1917 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1918 if (err) {
1919 netdev_err(dev, "Failed to set admin status");
1920 return err;
1921 }
1922
1923 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1924 if (err) {
1925 netdev_err(dev, "Failed to set admin status");
1926 return err;
1927 }
1928
1929 return 0;
1930}
1931
1932static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1933 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
1934 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001935 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
1936 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001937 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001938 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001939 .get_ethtool_stats = mlxsw_sp_port_get_stats,
1940 .get_sset_count = mlxsw_sp_port_get_sset_count,
1941 .get_settings = mlxsw_sp_port_get_settings,
1942 .set_settings = mlxsw_sp_port_set_settings,
1943};
1944
Ido Schimmel18f1e702016-02-26 17:32:31 +01001945static int
1946mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
1947{
1948 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1949 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
1950 char ptys_pl[MLXSW_REG_PTYS_LEN];
1951 u32 eth_proto_admin;
1952
1953 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
1954 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
1955 eth_proto_admin);
1956 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1957}
1958
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001959int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
1960 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
1961 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02001962{
1963 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1964 char qeec_pl[MLXSW_REG_QEEC_LEN];
1965
1966 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1967 next_index);
1968 mlxsw_reg_qeec_de_set(qeec_pl, true);
1969 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
1970 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
1971 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1972}
1973
Ido Schimmelcc7cf512016-04-06 17:10:11 +02001974int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
1975 enum mlxsw_reg_qeec_hr hr, u8 index,
1976 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02001977{
1978 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1979 char qeec_pl[MLXSW_REG_QEEC_LEN];
1980
1981 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1982 next_index);
1983 mlxsw_reg_qeec_mase_set(qeec_pl, true);
1984 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
1985 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1986}
1987
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001988int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
1989 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02001990{
1991 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1992 char qtct_pl[MLXSW_REG_QTCT_LEN];
1993
1994 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
1995 tclass);
1996 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
1997}
1998
1999static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2000{
2001 int err, i;
2002
2003 /* Setup the elements hierarcy, so that each TC is linked to
2004 * one subgroup, which are all member in the same group.
2005 */
2006 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2007 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2008 0);
2009 if (err)
2010 return err;
2011 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2012 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2013 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2014 0, false, 0);
2015 if (err)
2016 return err;
2017 }
2018 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2019 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2020 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2021 false, 0);
2022 if (err)
2023 return err;
2024 }
2025
2026 /* Make sure the max shaper is disabled in all hierarcies that
2027 * support it.
2028 */
2029 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2030 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2031 MLXSW_REG_QEEC_MAS_DIS);
2032 if (err)
2033 return err;
2034 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2035 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2036 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2037 i, 0,
2038 MLXSW_REG_QEEC_MAS_DIS);
2039 if (err)
2040 return err;
2041 }
2042 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2043 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2044 MLXSW_REG_QEEC_HIERARCY_TC,
2045 i, i,
2046 MLXSW_REG_QEEC_MAS_DIS);
2047 if (err)
2048 return err;
2049 }
2050
2051 /* Map all priorities to traffic class 0. */
2052 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2053 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2054 if (err)
2055 return err;
2056 }
2057
2058 return 0;
2059}
2060
Ido Schimmel05978482016-08-17 16:39:30 +02002061static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2062{
2063 mlxsw_sp_port->pvid = 1;
2064
2065 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2066}
2067
2068static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2069{
2070 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2071}
2072
Ido Schimmelbe945352016-06-09 09:51:39 +02002073static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
Ido Schimmeld664b412016-06-09 09:51:40 +02002074 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002075{
2076 struct mlxsw_sp_port *mlxsw_sp_port;
2077 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002078 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002079 int err;
2080
2081 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2082 if (!dev)
2083 return -ENOMEM;
2084 mlxsw_sp_port = netdev_priv(dev);
2085 mlxsw_sp_port->dev = dev;
2086 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2087 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002088 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002089 mlxsw_sp_port->mapping.module = module;
2090 mlxsw_sp_port->mapping.width = width;
2091 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002092 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2093 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2094 if (!mlxsw_sp_port->active_vlans) {
2095 err = -ENOMEM;
2096 goto err_port_active_vlans_alloc;
2097 }
Elad Razfc1273a2016-01-06 13:01:11 +01002098 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2099 if (!mlxsw_sp_port->untagged_vlans) {
2100 err = -ENOMEM;
2101 goto err_port_untagged_vlans_alloc;
2102 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002103 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002104 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002105
2106 mlxsw_sp_port->pcpu_stats =
2107 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2108 if (!mlxsw_sp_port->pcpu_stats) {
2109 err = -ENOMEM;
2110 goto err_alloc_stats;
2111 }
2112
2113 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2114 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2115
2116 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2117 if (err) {
2118 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2119 mlxsw_sp_port->local_port);
2120 goto err_dev_addr_init;
2121 }
2122
2123 netif_carrier_off(dev);
2124
2125 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002126 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2127 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002128
2129 /* Each packet needs to have a Tx header (metadata) on top all other
2130 * headers.
2131 */
2132 dev->hard_header_len += MLXSW_TXHDR_LEN;
2133
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002134 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2135 if (err) {
2136 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2137 mlxsw_sp_port->local_port);
2138 goto err_port_system_port_mapping_set;
2139 }
2140
2141 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2142 if (err) {
2143 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2144 mlxsw_sp_port->local_port);
2145 goto err_port_swid_set;
2146 }
2147
Ido Schimmel18f1e702016-02-26 17:32:31 +01002148 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2149 if (err) {
2150 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2151 mlxsw_sp_port->local_port);
2152 goto err_port_speed_by_width_set;
2153 }
2154
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002155 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2156 if (err) {
2157 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2158 mlxsw_sp_port->local_port);
2159 goto err_port_mtu_set;
2160 }
2161
2162 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2163 if (err)
2164 goto err_port_admin_status_set;
2165
2166 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2167 if (err) {
2168 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2169 mlxsw_sp_port->local_port);
2170 goto err_port_buffers_init;
2171 }
2172
Ido Schimmel90183b92016-04-06 17:10:08 +02002173 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2174 if (err) {
2175 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2176 mlxsw_sp_port->local_port);
2177 goto err_port_ets_init;
2178 }
2179
Ido Schimmelf00817d2016-04-06 17:10:09 +02002180 /* ETS and buffers must be initialized before DCB. */
2181 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2182 if (err) {
2183 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2184 mlxsw_sp_port->local_port);
2185 goto err_port_dcb_init;
2186 }
2187
Ido Schimmel05978482016-08-17 16:39:30 +02002188 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2189 if (err) {
2190 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2191 mlxsw_sp_port->local_port);
2192 goto err_port_pvid_vport_create;
2193 }
2194
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002195 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002196 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002197 err = register_netdev(dev);
2198 if (err) {
2199 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2200 mlxsw_sp_port->local_port);
2201 goto err_register_netdev;
2202 }
2203
Jiri Pirko932762b2016-04-08 19:11:21 +02002204 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
2205 mlxsw_sp_port->local_port, dev,
2206 mlxsw_sp_port->split, module);
2207 if (err) {
2208 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2209 mlxsw_sp_port->local_port);
2210 goto err_core_port_init;
2211 }
Jiri Pirkoc4745502016-02-26 17:32:26 +01002212
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002213 return 0;
2214
Jiri Pirko932762b2016-04-08 19:11:21 +02002215err_core_port_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002216 unregister_netdev(dev);
2217err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002218 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002219 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002220 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2221err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002222 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002223err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002224err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002225err_port_buffers_init:
2226err_port_admin_status_set:
2227err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002228err_port_speed_by_width_set:
Ido Schimmel05832722016-08-17 16:39:35 +02002229 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002230err_port_swid_set:
2231err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002232err_dev_addr_init:
2233 free_percpu(mlxsw_sp_port->pcpu_stats);
2234err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002235 kfree(mlxsw_sp_port->untagged_vlans);
2236err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002237 kfree(mlxsw_sp_port->active_vlans);
2238err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002239 free_netdev(dev);
2240 return err;
2241}
2242
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002243static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2244{
2245 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2246
2247 if (!mlxsw_sp_port)
2248 return;
Jiri Pirko932762b2016-04-08 19:11:21 +02002249 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002250 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002251 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002252 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002253 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002254 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002255 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2256 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002257 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01002258 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002259 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002260 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002261 free_netdev(mlxsw_sp_port->dev);
2262}
2263
2264static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2265{
2266 int i;
2267
2268 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2269 mlxsw_sp_port_remove(mlxsw_sp, i);
2270 kfree(mlxsw_sp->ports);
2271}
2272
2273static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2274{
Ido Schimmeld664b412016-06-09 09:51:40 +02002275 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002276 size_t alloc_size;
2277 int i;
2278 int err;
2279
2280 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2281 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2282 if (!mlxsw_sp->ports)
2283 return -ENOMEM;
2284
2285 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002286 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002287 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002288 if (err)
2289 goto err_port_module_info_get;
2290 if (!width)
2291 continue;
2292 mlxsw_sp->port_to_module[i] = module;
Ido Schimmeld664b412016-06-09 09:51:40 +02002293 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
2294 lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002295 if (err)
2296 goto err_port_create;
2297 }
2298 return 0;
2299
2300err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002301err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002302 for (i--; i >= 1; i--)
2303 mlxsw_sp_port_remove(mlxsw_sp, i);
2304 kfree(mlxsw_sp->ports);
2305 return err;
2306}
2307
Ido Schimmel18f1e702016-02-26 17:32:31 +01002308static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2309{
2310 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2311
2312 return local_port - offset;
2313}
2314
Ido Schimmelbe945352016-06-09 09:51:39 +02002315static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2316 u8 module, unsigned int count)
2317{
2318 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2319 int err, i;
2320
2321 for (i = 0; i < count; i++) {
2322 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2323 width, i * width);
2324 if (err)
2325 goto err_port_module_map;
2326 }
2327
2328 for (i = 0; i < count; i++) {
2329 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2330 if (err)
2331 goto err_port_swid_set;
2332 }
2333
2334 for (i = 0; i < count; i++) {
2335 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002336 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002337 if (err)
2338 goto err_port_create;
2339 }
2340
2341 return 0;
2342
2343err_port_create:
2344 for (i--; i >= 0; i--)
2345 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2346 i = count;
2347err_port_swid_set:
2348 for (i--; i >= 0; i--)
2349 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2350 MLXSW_PORT_SWID_DISABLED_PORT);
2351 i = count;
2352err_port_module_map:
2353 for (i--; i >= 0; i--)
2354 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2355 return err;
2356}
2357
2358static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2359 u8 base_port, unsigned int count)
2360{
2361 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2362 int i;
2363
2364 /* Split by four means we need to re-create two ports, otherwise
2365 * only one.
2366 */
2367 count = count / 2;
2368
2369 for (i = 0; i < count; i++) {
2370 local_port = base_port + i * 2;
2371 module = mlxsw_sp->port_to_module[local_port];
2372
2373 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2374 0);
2375 }
2376
2377 for (i = 0; i < count; i++)
2378 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2379
2380 for (i = 0; i < count; i++) {
2381 local_port = base_port + i * 2;
2382 module = mlxsw_sp->port_to_module[local_port];
2383
2384 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002385 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002386 }
2387}
2388
Jiri Pirkob2f10572016-04-08 19:11:23 +02002389static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2390 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002391{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002392 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002393 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002394 u8 module, cur_width, base_port;
2395 int i;
2396 int err;
2397
2398 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2399 if (!mlxsw_sp_port) {
2400 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2401 local_port);
2402 return -EINVAL;
2403 }
2404
Ido Schimmeld664b412016-06-09 09:51:40 +02002405 module = mlxsw_sp_port->mapping.module;
2406 cur_width = mlxsw_sp_port->mapping.width;
2407
Ido Schimmel18f1e702016-02-26 17:32:31 +01002408 if (count != 2 && count != 4) {
2409 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2410 return -EINVAL;
2411 }
2412
Ido Schimmel18f1e702016-02-26 17:32:31 +01002413 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2414 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2415 return -EINVAL;
2416 }
2417
2418 /* Make sure we have enough slave (even) ports for the split. */
2419 if (count == 2) {
2420 base_port = local_port;
2421 if (mlxsw_sp->ports[base_port + 1]) {
2422 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2423 return -EINVAL;
2424 }
2425 } else {
2426 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2427 if (mlxsw_sp->ports[base_port + 1] ||
2428 mlxsw_sp->ports[base_port + 3]) {
2429 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2430 return -EINVAL;
2431 }
2432 }
2433
2434 for (i = 0; i < count; i++)
2435 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2436
Ido Schimmelbe945352016-06-09 09:51:39 +02002437 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2438 if (err) {
2439 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2440 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002441 }
2442
2443 return 0;
2444
Ido Schimmelbe945352016-06-09 09:51:39 +02002445err_port_split_create:
2446 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002447 return err;
2448}
2449
Jiri Pirkob2f10572016-04-08 19:11:23 +02002450static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002451{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002452 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002453 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002454 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002455 unsigned int count;
2456 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002457
2458 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2459 if (!mlxsw_sp_port) {
2460 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2461 local_port);
2462 return -EINVAL;
2463 }
2464
2465 if (!mlxsw_sp_port->split) {
2466 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2467 return -EINVAL;
2468 }
2469
Ido Schimmeld664b412016-06-09 09:51:40 +02002470 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002471 count = cur_width == 1 ? 4 : 2;
2472
2473 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2474
2475 /* Determine which ports to remove. */
2476 if (count == 2 && local_port >= base_port + 2)
2477 base_port = base_port + 2;
2478
2479 for (i = 0; i < count; i++)
2480 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2481
Ido Schimmelbe945352016-06-09 09:51:39 +02002482 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002483
2484 return 0;
2485}
2486
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002487static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2488 char *pude_pl, void *priv)
2489{
2490 struct mlxsw_sp *mlxsw_sp = priv;
2491 struct mlxsw_sp_port *mlxsw_sp_port;
2492 enum mlxsw_reg_pude_oper_status status;
2493 u8 local_port;
2494
2495 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2496 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002497 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002498 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002499
2500 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2501 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2502 netdev_info(mlxsw_sp_port->dev, "link up\n");
2503 netif_carrier_on(mlxsw_sp_port->dev);
2504 } else {
2505 netdev_info(mlxsw_sp_port->dev, "link down\n");
2506 netif_carrier_off(mlxsw_sp_port->dev);
2507 }
2508}
2509
2510static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2511 .func = mlxsw_sp_pude_event_func,
2512 .trap_id = MLXSW_TRAP_ID_PUDE,
2513};
2514
2515static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2516 enum mlxsw_event_trap_id trap_id)
2517{
2518 struct mlxsw_event_listener *el;
2519 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2520 int err;
2521
2522 switch (trap_id) {
2523 case MLXSW_TRAP_ID_PUDE:
2524 el = &mlxsw_sp_pude_event;
2525 break;
2526 }
2527 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2528 if (err)
2529 return err;
2530
2531 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2532 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2533 if (err)
2534 goto err_event_trap_set;
2535
2536 return 0;
2537
2538err_event_trap_set:
2539 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2540 return err;
2541}
2542
2543static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2544 enum mlxsw_event_trap_id trap_id)
2545{
2546 struct mlxsw_event_listener *el;
2547
2548 switch (trap_id) {
2549 case MLXSW_TRAP_ID_PUDE:
2550 el = &mlxsw_sp_pude_event;
2551 break;
2552 }
2553 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2554}
2555
2556static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2557 void *priv)
2558{
2559 struct mlxsw_sp *mlxsw_sp = priv;
2560 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2561 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2562
2563 if (unlikely(!mlxsw_sp_port)) {
2564 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2565 local_port);
2566 return;
2567 }
2568
2569 skb->dev = mlxsw_sp_port->dev;
2570
2571 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2572 u64_stats_update_begin(&pcpu_stats->syncp);
2573 pcpu_stats->rx_packets++;
2574 pcpu_stats->rx_bytes += skb->len;
2575 u64_stats_update_end(&pcpu_stats->syncp);
2576
2577 skb->protocol = eth_type_trans(skb, skb->dev);
2578 netif_receive_skb(skb);
2579}
2580
2581static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
2582 {
2583 .func = mlxsw_sp_rx_listener_func,
2584 .local_port = MLXSW_PORT_DONT_CARE,
2585 .trap_id = MLXSW_TRAP_ID_FDB_MC,
2586 },
2587 /* Traps for specific L2 packet types, not trapped as FDB MC */
2588 {
2589 .func = mlxsw_sp_rx_listener_func,
2590 .local_port = MLXSW_PORT_DONT_CARE,
2591 .trap_id = MLXSW_TRAP_ID_STP,
2592 },
2593 {
2594 .func = mlxsw_sp_rx_listener_func,
2595 .local_port = MLXSW_PORT_DONT_CARE,
2596 .trap_id = MLXSW_TRAP_ID_LACP,
2597 },
2598 {
2599 .func = mlxsw_sp_rx_listener_func,
2600 .local_port = MLXSW_PORT_DONT_CARE,
2601 .trap_id = MLXSW_TRAP_ID_EAPOL,
2602 },
2603 {
2604 .func = mlxsw_sp_rx_listener_func,
2605 .local_port = MLXSW_PORT_DONT_CARE,
2606 .trap_id = MLXSW_TRAP_ID_LLDP,
2607 },
2608 {
2609 .func = mlxsw_sp_rx_listener_func,
2610 .local_port = MLXSW_PORT_DONT_CARE,
2611 .trap_id = MLXSW_TRAP_ID_MMRP,
2612 },
2613 {
2614 .func = mlxsw_sp_rx_listener_func,
2615 .local_port = MLXSW_PORT_DONT_CARE,
2616 .trap_id = MLXSW_TRAP_ID_MVRP,
2617 },
2618 {
2619 .func = mlxsw_sp_rx_listener_func,
2620 .local_port = MLXSW_PORT_DONT_CARE,
2621 .trap_id = MLXSW_TRAP_ID_RPVST,
2622 },
2623 {
2624 .func = mlxsw_sp_rx_listener_func,
2625 .local_port = MLXSW_PORT_DONT_CARE,
2626 .trap_id = MLXSW_TRAP_ID_DHCP,
2627 },
2628 {
2629 .func = mlxsw_sp_rx_listener_func,
2630 .local_port = MLXSW_PORT_DONT_CARE,
2631 .trap_id = MLXSW_TRAP_ID_IGMP_QUERY,
2632 },
2633 {
2634 .func = mlxsw_sp_rx_listener_func,
2635 .local_port = MLXSW_PORT_DONT_CARE,
2636 .trap_id = MLXSW_TRAP_ID_IGMP_V1_REPORT,
2637 },
2638 {
2639 .func = mlxsw_sp_rx_listener_func,
2640 .local_port = MLXSW_PORT_DONT_CARE,
2641 .trap_id = MLXSW_TRAP_ID_IGMP_V2_REPORT,
2642 },
2643 {
2644 .func = mlxsw_sp_rx_listener_func,
2645 .local_port = MLXSW_PORT_DONT_CARE,
2646 .trap_id = MLXSW_TRAP_ID_IGMP_V2_LEAVE,
2647 },
2648 {
2649 .func = mlxsw_sp_rx_listener_func,
2650 .local_port = MLXSW_PORT_DONT_CARE,
2651 .trap_id = MLXSW_TRAP_ID_IGMP_V3_REPORT,
2652 },
Jiri Pirko7b27ce72016-07-02 11:00:20 +02002653 {
2654 .func = mlxsw_sp_rx_listener_func,
2655 .local_port = MLXSW_PORT_DONT_CARE,
2656 .trap_id = MLXSW_TRAP_ID_ARPBC,
2657 },
2658 {
2659 .func = mlxsw_sp_rx_listener_func,
2660 .local_port = MLXSW_PORT_DONT_CARE,
2661 .trap_id = MLXSW_TRAP_ID_ARPUC,
2662 },
2663 {
2664 .func = mlxsw_sp_rx_listener_func,
2665 .local_port = MLXSW_PORT_DONT_CARE,
Elad Razc20b8012016-08-17 16:39:32 +02002666 .trap_id = MLXSW_TRAP_ID_MTUERROR,
2667 },
2668 {
2669 .func = mlxsw_sp_rx_listener_func,
2670 .local_port = MLXSW_PORT_DONT_CARE,
2671 .trap_id = MLXSW_TRAP_ID_TTLERROR,
2672 },
2673 {
2674 .func = mlxsw_sp_rx_listener_func,
2675 .local_port = MLXSW_PORT_DONT_CARE,
Ido Schimmela94a6142016-08-17 16:39:33 +02002676 .trap_id = MLXSW_TRAP_ID_LBERROR,
2677 },
2678 {
2679 .func = mlxsw_sp_rx_listener_func,
2680 .local_port = MLXSW_PORT_DONT_CARE,
Elad Razc20b8012016-08-17 16:39:32 +02002681 .trap_id = MLXSW_TRAP_ID_OSPF,
2682 },
2683 {
2684 .func = mlxsw_sp_rx_listener_func,
2685 .local_port = MLXSW_PORT_DONT_CARE,
Jiri Pirko7b27ce72016-07-02 11:00:20 +02002686 .trap_id = MLXSW_TRAP_ID_IP2ME,
2687 },
2688 {
2689 .func = mlxsw_sp_rx_listener_func,
2690 .local_port = MLXSW_PORT_DONT_CARE,
2691 .trap_id = MLXSW_TRAP_ID_RTR_INGRESS0,
2692 },
2693 {
2694 .func = mlxsw_sp_rx_listener_func,
2695 .local_port = MLXSW_PORT_DONT_CARE,
2696 .trap_id = MLXSW_TRAP_ID_HOST_MISS_IPV4,
2697 },
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002698};
2699
2700static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2701{
2702 char htgt_pl[MLXSW_REG_HTGT_LEN];
2703 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2704 int i;
2705 int err;
2706
2707 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2708 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2709 if (err)
2710 return err;
2711
2712 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2713 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2714 if (err)
2715 return err;
2716
2717 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2718 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2719 &mlxsw_sp_rx_listener[i],
2720 mlxsw_sp);
2721 if (err)
2722 goto err_rx_listener_register;
2723
2724 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,
2725 mlxsw_sp_rx_listener[i].trap_id);
2726 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2727 if (err)
2728 goto err_rx_trap_set;
2729 }
2730 return 0;
2731
2732err_rx_trap_set:
2733 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2734 &mlxsw_sp_rx_listener[i],
2735 mlxsw_sp);
2736err_rx_listener_register:
2737 for (i--; i >= 0; i--) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002738 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002739 mlxsw_sp_rx_listener[i].trap_id);
2740 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2741
2742 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2743 &mlxsw_sp_rx_listener[i],
2744 mlxsw_sp);
2745 }
2746 return err;
2747}
2748
2749static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2750{
2751 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2752 int i;
2753
2754 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002755 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002756 mlxsw_sp_rx_listener[i].trap_id);
2757 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2758
2759 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2760 &mlxsw_sp_rx_listener[i],
2761 mlxsw_sp);
2762 }
2763}
2764
2765static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2766 enum mlxsw_reg_sfgc_type type,
2767 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2768{
2769 enum mlxsw_flood_table_type table_type;
2770 enum mlxsw_sp_flood_table flood_table;
2771 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2772
Ido Schimmel19ae6122015-12-15 16:03:39 +01002773 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002774 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002775 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002776 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002777
2778 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2779 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2780 else
2781 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002782
2783 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2784 flood_table);
2785 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2786}
2787
2788static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2789{
2790 int type, err;
2791
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002792 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2793 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2794 continue;
2795
2796 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2797 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2798 if (err)
2799 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002800
2801 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2802 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2803 if (err)
2804 return err;
2805 }
2806
2807 return 0;
2808}
2809
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002810static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2811{
2812 char slcr_pl[MLXSW_REG_SLCR_LEN];
2813
2814 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2815 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2816 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2817 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2818 MLXSW_REG_SLCR_LAG_HASH_SIP |
2819 MLXSW_REG_SLCR_LAG_HASH_DIP |
2820 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2821 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2822 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
2823 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2824}
2825
Jiri Pirkob2f10572016-04-08 19:11:23 +02002826static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002827 const struct mlxsw_bus_info *mlxsw_bus_info)
2828{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002829 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002830 int err;
2831
2832 mlxsw_sp->core = mlxsw_core;
2833 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02002834 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002835 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01002836 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002837
2838 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2839 if (err) {
2840 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2841 return err;
2842 }
2843
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002844 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2845 if (err) {
2846 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002847 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002848 }
2849
2850 err = mlxsw_sp_traps_init(mlxsw_sp);
2851 if (err) {
2852 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2853 goto err_rx_listener_register;
2854 }
2855
2856 err = mlxsw_sp_flood_init(mlxsw_sp);
2857 if (err) {
2858 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2859 goto err_flood_init;
2860 }
2861
2862 err = mlxsw_sp_buffers_init(mlxsw_sp);
2863 if (err) {
2864 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2865 goto err_buffers_init;
2866 }
2867
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002868 err = mlxsw_sp_lag_init(mlxsw_sp);
2869 if (err) {
2870 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2871 goto err_lag_init;
2872 }
2873
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002874 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2875 if (err) {
2876 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2877 goto err_switchdev_init;
2878 }
2879
Ido Schimmel464dce12016-07-02 11:00:15 +02002880 err = mlxsw_sp_router_init(mlxsw_sp);
2881 if (err) {
2882 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2883 goto err_router_init;
2884 }
2885
Yotam Gigi763b4b72016-07-21 12:03:17 +02002886 err = mlxsw_sp_span_init(mlxsw_sp);
2887 if (err) {
2888 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
2889 goto err_span_init;
2890 }
2891
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002892 err = mlxsw_sp_ports_create(mlxsw_sp);
2893 if (err) {
2894 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2895 goto err_ports_create;
2896 }
2897
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002898 return 0;
2899
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002900err_ports_create:
Yotam Gigi763b4b72016-07-21 12:03:17 +02002901 mlxsw_sp_span_fini(mlxsw_sp);
2902err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02002903 mlxsw_sp_router_fini(mlxsw_sp);
2904err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002905 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002906err_switchdev_init:
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002907err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02002908 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002909err_buffers_init:
2910err_flood_init:
2911 mlxsw_sp_traps_fini(mlxsw_sp);
2912err_rx_listener_register:
2913 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002914 return err;
2915}
2916
Jiri Pirkob2f10572016-04-08 19:11:23 +02002917static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002918{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002919 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002920 int i;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002921
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002922 mlxsw_sp_ports_remove(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002923 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02002924 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002925 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02002926 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002927 mlxsw_sp_traps_fini(mlxsw_sp);
2928 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002929 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02002930 WARN_ON(!list_empty(&mlxsw_sp->fids));
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002931 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
2932 WARN_ON_ONCE(mlxsw_sp->rifs[i]);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002933}
2934
2935static struct mlxsw_config_profile mlxsw_sp_config_profile = {
2936 .used_max_vepa_channels = 1,
2937 .max_vepa_channels = 0,
2938 .used_max_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002939 .max_lag = MLXSW_SP_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002940 .used_max_port_per_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002941 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002942 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01002943 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002944 .used_max_pgt = 1,
2945 .max_pgt = 0,
2946 .used_max_system_port = 1,
2947 .max_system_port = 64,
2948 .used_max_vlan_groups = 1,
2949 .max_vlan_groups = 127,
2950 .used_max_regions = 1,
2951 .max_regions = 400,
2952 .used_flood_tables = 1,
2953 .used_flood_mode = 1,
2954 .flood_mode = 3,
2955 .max_fid_offset_flood_tables = 2,
2956 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01002957 .max_fid_flood_tables = 2,
2958 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002959 .used_max_ib_mc = 1,
2960 .max_ib_mc = 0,
2961 .used_max_pkey = 1,
2962 .max_pkey = 0,
Jiri Pirkoc6022422016-07-05 11:27:46 +02002963 .used_kvd_sizes = 1,
2964 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
2965 .kvd_hash_single_size = MLXSW_SP_KVD_HASH_SINGLE_SIZE,
2966 .kvd_hash_double_size = MLXSW_SP_KVD_HASH_DOUBLE_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002967 .swid_config = {
2968 {
2969 .used_type = 1,
2970 .type = MLXSW_PORT_SWID_TYPE_ETH,
2971 }
2972 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02002973 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002974};
2975
2976static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko2d0ed392016-04-14 18:19:30 +02002977 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
2978 .owner = THIS_MODULE,
2979 .priv_size = sizeof(struct mlxsw_sp),
2980 .init = mlxsw_sp_init,
2981 .fini = mlxsw_sp_fini,
2982 .port_split = mlxsw_sp_port_split,
2983 .port_unsplit = mlxsw_sp_port_unsplit,
2984 .sb_pool_get = mlxsw_sp_sb_pool_get,
2985 .sb_pool_set = mlxsw_sp_sb_pool_set,
2986 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
2987 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
2988 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
2989 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
2990 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
2991 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
2992 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
2993 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
2994 .txhdr_construct = mlxsw_sp_txhdr_construct,
2995 .txhdr_len = MLXSW_TXHDR_LEN,
2996 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002997};
2998
Jiri Pirko7ce856a2016-07-04 08:23:12 +02002999static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
3000{
3001 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3002}
3003
3004static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3005{
3006 struct net_device *lower_dev;
3007 struct list_head *iter;
3008
3009 if (mlxsw_sp_port_dev_check(dev))
3010 return netdev_priv(dev);
3011
3012 netdev_for_each_all_lower_dev(dev, lower_dev, iter) {
3013 if (mlxsw_sp_port_dev_check(lower_dev))
3014 return netdev_priv(lower_dev);
3015 }
3016 return NULL;
3017}
3018
3019static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3020{
3021 struct mlxsw_sp_port *mlxsw_sp_port;
3022
3023 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3024 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3025}
3026
3027static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3028{
3029 struct net_device *lower_dev;
3030 struct list_head *iter;
3031
3032 if (mlxsw_sp_port_dev_check(dev))
3033 return netdev_priv(dev);
3034
3035 netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) {
3036 if (mlxsw_sp_port_dev_check(lower_dev))
3037 return netdev_priv(lower_dev);
3038 }
3039 return NULL;
3040}
3041
3042struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3043{
3044 struct mlxsw_sp_port *mlxsw_sp_port;
3045
3046 rcu_read_lock();
3047 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3048 if (mlxsw_sp_port)
3049 dev_hold(mlxsw_sp_port->dev);
3050 rcu_read_unlock();
3051 return mlxsw_sp_port;
3052}
3053
3054void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3055{
3056 dev_put(mlxsw_sp_port->dev);
3057}
3058
Ido Schimmel99724c12016-07-04 08:23:14 +02003059static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3060 unsigned long event)
3061{
3062 switch (event) {
3063 case NETDEV_UP:
3064 if (!r)
3065 return true;
3066 r->ref_count++;
3067 return false;
3068 case NETDEV_DOWN:
3069 if (r && --r->ref_count == 0)
3070 return true;
3071 /* It is possible we already removed the RIF ourselves
3072 * if it was assigned to a netdev that is now a bridge
3073 * or LAG slave.
3074 */
3075 return false;
3076 }
3077
3078 return false;
3079}
3080
3081static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3082{
3083 int i;
3084
3085 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
3086 if (!mlxsw_sp->rifs[i])
3087 return i;
3088
3089 return MLXSW_SP_RIF_MAX;
3090}
3091
3092static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3093 bool *p_lagged, u16 *p_system_port)
3094{
3095 u8 local_port = mlxsw_sp_vport->local_port;
3096
3097 *p_lagged = mlxsw_sp_vport->lagged;
3098 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3099}
3100
3101static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3102 struct net_device *l3_dev, u16 rif,
3103 bool create)
3104{
3105 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3106 bool lagged = mlxsw_sp_vport->lagged;
3107 char ritr_pl[MLXSW_REG_RITR_LEN];
3108 u16 system_port;
3109
3110 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3111 l3_dev->mtu, l3_dev->dev_addr);
3112
3113 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3114 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3115 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3116
3117 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3118}
3119
3120static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3121
3122static struct mlxsw_sp_fid *
3123mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3124{
3125 struct mlxsw_sp_fid *f;
3126
3127 f = kzalloc(sizeof(*f), GFP_KERNEL);
3128 if (!f)
3129 return NULL;
3130
3131 f->leave = mlxsw_sp_vport_rif_sp_leave;
3132 f->ref_count = 0;
3133 f->dev = l3_dev;
3134 f->fid = fid;
3135
3136 return f;
3137}
3138
3139static struct mlxsw_sp_rif *
3140mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3141{
3142 struct mlxsw_sp_rif *r;
3143
3144 r = kzalloc(sizeof(*r), GFP_KERNEL);
3145 if (!r)
3146 return NULL;
3147
3148 ether_addr_copy(r->addr, l3_dev->dev_addr);
3149 r->mtu = l3_dev->mtu;
3150 r->ref_count = 1;
3151 r->dev = l3_dev;
3152 r->rif = rif;
3153 r->f = f;
3154
3155 return r;
3156}
3157
3158static struct mlxsw_sp_rif *
3159mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3160 struct net_device *l3_dev)
3161{
3162 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3163 struct mlxsw_sp_fid *f;
3164 struct mlxsw_sp_rif *r;
3165 u16 fid, rif;
3166 int err;
3167
3168 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3169 if (rif == MLXSW_SP_RIF_MAX)
3170 return ERR_PTR(-ERANGE);
3171
3172 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3173 if (err)
3174 return ERR_PTR(err);
3175
3176 fid = mlxsw_sp_rif_sp_to_fid(rif);
3177 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3178 if (err)
3179 goto err_rif_fdb_op;
3180
3181 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3182 if (!f) {
3183 err = -ENOMEM;
3184 goto err_rfid_alloc;
3185 }
3186
3187 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3188 if (!r) {
3189 err = -ENOMEM;
3190 goto err_rif_alloc;
3191 }
3192
3193 f->r = r;
3194 mlxsw_sp->rifs[rif] = r;
3195
3196 return r;
3197
3198err_rif_alloc:
3199 kfree(f);
3200err_rfid_alloc:
3201 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3202err_rif_fdb_op:
3203 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3204 return ERR_PTR(err);
3205}
3206
3207static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3208 struct mlxsw_sp_rif *r)
3209{
3210 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3211 struct net_device *l3_dev = r->dev;
3212 struct mlxsw_sp_fid *f = r->f;
3213 u16 fid = f->fid;
3214 u16 rif = r->rif;
3215
3216 mlxsw_sp->rifs[rif] = NULL;
3217 f->r = NULL;
3218
3219 kfree(r);
3220
3221 kfree(f);
3222
3223 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3224
3225 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3226}
3227
3228static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3229 struct net_device *l3_dev)
3230{
3231 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3232 struct mlxsw_sp_rif *r;
3233
3234 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3235 if (!r) {
3236 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3237 if (IS_ERR(r))
3238 return PTR_ERR(r);
3239 }
3240
3241 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3242 r->f->ref_count++;
3243
3244 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3245
3246 return 0;
3247}
3248
3249static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3250{
3251 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3252
3253 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3254
3255 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3256 if (--f->ref_count == 0)
3257 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3258}
3259
3260static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3261 struct net_device *port_dev,
3262 unsigned long event, u16 vid)
3263{
3264 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3265 struct mlxsw_sp_port *mlxsw_sp_vport;
3266
3267 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3268 if (WARN_ON(!mlxsw_sp_vport))
3269 return -EINVAL;
3270
3271 switch (event) {
3272 case NETDEV_UP:
3273 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3274 case NETDEV_DOWN:
3275 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3276 break;
3277 }
3278
3279 return 0;
3280}
3281
3282static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3283 unsigned long event)
3284{
3285 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3286 return 0;
3287
3288 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3289}
3290
3291static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3292 struct net_device *lag_dev,
3293 unsigned long event, u16 vid)
3294{
3295 struct net_device *port_dev;
3296 struct list_head *iter;
3297 int err;
3298
3299 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3300 if (mlxsw_sp_port_dev_check(port_dev)) {
3301 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3302 event, vid);
3303 if (err)
3304 return err;
3305 }
3306 }
3307
3308 return 0;
3309}
3310
3311static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3312 unsigned long event)
3313{
3314 if (netif_is_bridge_port(lag_dev))
3315 return 0;
3316
3317 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3318}
3319
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003320static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3321 struct net_device *l3_dev)
3322{
3323 u16 fid;
3324
3325 if (is_vlan_dev(l3_dev))
3326 fid = vlan_dev_vlan_id(l3_dev);
3327 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3328 fid = 1;
3329 else
3330 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3331
3332 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3333}
3334
3335static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3336{
3337 if (mlxsw_sp_fid_is_vfid(fid))
3338 return MLXSW_REG_RITR_FID_IF;
3339 else
3340 return MLXSW_REG_RITR_VLAN_IF;
3341}
3342
3343static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3344 struct net_device *l3_dev,
3345 u16 fid, u16 rif,
3346 bool create)
3347{
3348 enum mlxsw_reg_ritr_if_type rif_type;
3349 char ritr_pl[MLXSW_REG_RITR_LEN];
3350
3351 rif_type = mlxsw_sp_rif_type_get(fid);
3352 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3353 l3_dev->dev_addr);
3354 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3355
3356 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3357}
3358
3359static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3360 struct net_device *l3_dev,
3361 struct mlxsw_sp_fid *f)
3362{
3363 struct mlxsw_sp_rif *r;
3364 u16 rif;
3365 int err;
3366
3367 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3368 if (rif == MLXSW_SP_RIF_MAX)
3369 return -ERANGE;
3370
3371 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3372 if (err)
3373 return err;
3374
3375 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3376 if (err)
3377 goto err_rif_fdb_op;
3378
3379 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3380 if (!r) {
3381 err = -ENOMEM;
3382 goto err_rif_alloc;
3383 }
3384
3385 f->r = r;
3386 mlxsw_sp->rifs[rif] = r;
3387
3388 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3389
3390 return 0;
3391
3392err_rif_alloc:
3393 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3394err_rif_fdb_op:
3395 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3396 return err;
3397}
3398
3399void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3400 struct mlxsw_sp_rif *r)
3401{
3402 struct net_device *l3_dev = r->dev;
3403 struct mlxsw_sp_fid *f = r->f;
3404 u16 rif = r->rif;
3405
3406 mlxsw_sp->rifs[rif] = NULL;
3407 f->r = NULL;
3408
3409 kfree(r);
3410
3411 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3412
3413 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3414
3415 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3416}
3417
3418static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3419 struct net_device *br_dev,
3420 unsigned long event)
3421{
3422 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3423 struct mlxsw_sp_fid *f;
3424
3425 /* FID can either be an actual FID if the L3 device is the
3426 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3427 * L3 device is a VLAN-unaware bridge and we get a vFID.
3428 */
3429 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3430 if (WARN_ON(!f))
3431 return -EINVAL;
3432
3433 switch (event) {
3434 case NETDEV_UP:
3435 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3436 case NETDEV_DOWN:
3437 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3438 break;
3439 }
3440
3441 return 0;
3442}
3443
Ido Schimmel99724c12016-07-04 08:23:14 +02003444static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3445 unsigned long event)
3446{
3447 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003448 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003449 u16 vid = vlan_dev_vlan_id(vlan_dev);
3450
3451 if (mlxsw_sp_port_dev_check(real_dev))
3452 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3453 vid);
3454 else if (netif_is_lag_master(real_dev))
3455 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3456 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003457 else if (netif_is_bridge_master(real_dev) &&
3458 mlxsw_sp->master_bridge.dev == real_dev)
3459 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3460 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003461
3462 return 0;
3463}
3464
3465static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3466 unsigned long event, void *ptr)
3467{
3468 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3469 struct net_device *dev = ifa->ifa_dev->dev;
3470 struct mlxsw_sp *mlxsw_sp;
3471 struct mlxsw_sp_rif *r;
3472 int err = 0;
3473
3474 mlxsw_sp = mlxsw_sp_lower_get(dev);
3475 if (!mlxsw_sp)
3476 goto out;
3477
3478 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3479 if (!mlxsw_sp_rif_should_config(r, event))
3480 goto out;
3481
3482 if (mlxsw_sp_port_dev_check(dev))
3483 err = mlxsw_sp_inetaddr_port_event(dev, event);
3484 else if (netif_is_lag_master(dev))
3485 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003486 else if (netif_is_bridge_master(dev))
3487 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003488 else if (is_vlan_dev(dev))
3489 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3490
3491out:
3492 return notifier_from_errno(err);
3493}
3494
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003495static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3496 const char *mac, int mtu)
3497{
3498 char ritr_pl[MLXSW_REG_RITR_LEN];
3499 int err;
3500
3501 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3502 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3503 if (err)
3504 return err;
3505
3506 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3507 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3508 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3509 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3510}
3511
3512static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3513{
3514 struct mlxsw_sp *mlxsw_sp;
3515 struct mlxsw_sp_rif *r;
3516 int err;
3517
3518 mlxsw_sp = mlxsw_sp_lower_get(dev);
3519 if (!mlxsw_sp)
3520 return 0;
3521
3522 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3523 if (!r)
3524 return 0;
3525
3526 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3527 if (err)
3528 return err;
3529
3530 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3531 if (err)
3532 goto err_rif_edit;
3533
3534 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3535 if (err)
3536 goto err_rif_fdb_op;
3537
3538 ether_addr_copy(r->addr, dev->dev_addr);
3539 r->mtu = dev->mtu;
3540
3541 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3542
3543 return 0;
3544
3545err_rif_fdb_op:
3546 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3547err_rif_edit:
3548 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3549 return err;
3550}
3551
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003552static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3553 u16 fid)
3554{
3555 if (mlxsw_sp_fid_is_vfid(fid))
3556 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3557 else
3558 return test_bit(fid, lag_port->active_vlans);
3559}
3560
3561static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3562 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003563{
3564 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003565 u8 local_port = mlxsw_sp_port->local_port;
3566 u16 lag_id = mlxsw_sp_port->lag_id;
3567 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003568
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003569 if (!mlxsw_sp_port->lagged)
3570 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003571
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003572 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3573 struct mlxsw_sp_port *lag_port;
3574
3575 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3576 if (!lag_port || lag_port->local_port == local_port)
3577 continue;
3578 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3579 count++;
3580 }
3581
3582 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003583}
3584
3585static int
3586mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3587 u16 fid)
3588{
3589 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3590 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3591
3592 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3593 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3594 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3595 mlxsw_sp_port->local_port);
3596
Ido Schimmel22305372016-06-20 23:04:21 +02003597 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3598 mlxsw_sp_port->local_port, fid);
3599
Ido Schimmel039c49a2016-01-27 15:20:18 +01003600 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3601}
3602
3603static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003604mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3605 u16 fid)
3606{
3607 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3608 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3609
3610 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3611 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3612 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3613
Ido Schimmel22305372016-06-20 23:04:21 +02003614 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3615 mlxsw_sp_port->lag_id, fid);
3616
Ido Schimmel039c49a2016-01-27 15:20:18 +01003617 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3618}
3619
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003620int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003621{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003622 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3623 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003624
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003625 if (mlxsw_sp_port->lagged)
3626 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003627 fid);
3628 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003629 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003630}
3631
Ido Schimmel701b1862016-07-04 08:23:16 +02003632static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3633{
3634 struct mlxsw_sp_fid *f, *tmp;
3635
3636 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3637 if (--f->ref_count == 0)
3638 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3639 else
3640 WARN_ON_ONCE(1);
3641}
3642
Ido Schimmel7117a572016-06-20 23:04:06 +02003643static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3644 struct net_device *br_dev)
3645{
3646 return !mlxsw_sp->master_bridge.dev ||
3647 mlxsw_sp->master_bridge.dev == br_dev;
3648}
3649
3650static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3651 struct net_device *br_dev)
3652{
3653 mlxsw_sp->master_bridge.dev = br_dev;
3654 mlxsw_sp->master_bridge.ref_count++;
3655}
3656
3657static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3658{
Ido Schimmel701b1862016-07-04 08:23:16 +02003659 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003660 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003661 /* It's possible upper VLAN devices are still holding
3662 * references to underlying FIDs. Drop the reference
3663 * and release the resources if it was the last one.
3664 * If it wasn't, then something bad happened.
3665 */
3666 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3667 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003668}
3669
3670static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3671 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003672{
3673 struct net_device *dev = mlxsw_sp_port->dev;
3674 int err;
3675
3676 /* When port is not bridged untagged packets are tagged with
3677 * PVID=VID=1, thereby creating an implicit VLAN interface in
3678 * the device. Remove it and let bridge code take care of its
3679 * own VLANs.
3680 */
3681 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003682 if (err)
3683 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003684
Ido Schimmel7117a572016-06-20 23:04:06 +02003685 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3686
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003687 mlxsw_sp_port->learning = 1;
3688 mlxsw_sp_port->learning_sync = 1;
3689 mlxsw_sp_port->uc_flood = 1;
3690 mlxsw_sp_port->bridged = 1;
3691
3692 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003693}
3694
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003695static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003696{
3697 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003698
Ido Schimmel28a01d22016-02-18 11:30:02 +01003699 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3700
Ido Schimmel7117a572016-06-20 23:04:06 +02003701 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3702
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003703 mlxsw_sp_port->learning = 0;
3704 mlxsw_sp_port->learning_sync = 0;
3705 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003706 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003707
3708 /* Add implicit VLAN interface in the device, so that untagged
3709 * packets will be classified to the default vFID.
3710 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003711 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003712}
3713
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003714static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003715{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003716 char sldr_pl[MLXSW_REG_SLDR_LEN];
3717
3718 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3719 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3720}
3721
3722static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3723{
3724 char sldr_pl[MLXSW_REG_SLDR_LEN];
3725
3726 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3727 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3728}
3729
3730static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3731 u16 lag_id, u8 port_index)
3732{
3733 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3734 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3735
3736 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3737 lag_id, port_index);
3738 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3739}
3740
3741static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3742 u16 lag_id)
3743{
3744 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3745 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3746
3747 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3748 lag_id);
3749 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3750}
3751
3752static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3753 u16 lag_id)
3754{
3755 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3756 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3757
3758 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3759 lag_id);
3760 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3761}
3762
3763static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3764 u16 lag_id)
3765{
3766 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3767 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3768
3769 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3770 lag_id);
3771 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3772}
3773
3774static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3775 struct net_device *lag_dev,
3776 u16 *p_lag_id)
3777{
3778 struct mlxsw_sp_upper *lag;
3779 int free_lag_id = -1;
3780 int i;
3781
3782 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
3783 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3784 if (lag->ref_count) {
3785 if (lag->dev == lag_dev) {
3786 *p_lag_id = i;
3787 return 0;
3788 }
3789 } else if (free_lag_id < 0) {
3790 free_lag_id = i;
3791 }
3792 }
3793 if (free_lag_id < 0)
3794 return -EBUSY;
3795 *p_lag_id = free_lag_id;
3796 return 0;
3797}
3798
3799static bool
3800mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3801 struct net_device *lag_dev,
3802 struct netdev_lag_upper_info *lag_upper_info)
3803{
3804 u16 lag_id;
3805
3806 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3807 return false;
3808 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3809 return false;
3810 return true;
3811}
3812
3813static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3814 u16 lag_id, u8 *p_port_index)
3815{
3816 int i;
3817
3818 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3819 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3820 *p_port_index = i;
3821 return 0;
3822 }
3823 }
3824 return -EBUSY;
3825}
3826
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003827static void
3828mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3829 u16 lag_id)
3830{
3831 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003832 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003833
3834 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3835 if (WARN_ON(!mlxsw_sp_vport))
3836 return;
3837
Ido Schimmel11943ff2016-07-02 11:00:12 +02003838 /* If vPort is assigned a RIF, then leave it since it's no
3839 * longer valid.
3840 */
3841 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3842 if (f)
3843 f->leave(mlxsw_sp_vport);
3844
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003845 mlxsw_sp_vport->lag_id = lag_id;
3846 mlxsw_sp_vport->lagged = 1;
3847}
3848
3849static void
3850mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3851{
3852 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003853 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003854
3855 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3856 if (WARN_ON(!mlxsw_sp_vport))
3857 return;
3858
Ido Schimmel11943ff2016-07-02 11:00:12 +02003859 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3860 if (f)
3861 f->leave(mlxsw_sp_vport);
3862
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003863 mlxsw_sp_vport->lagged = 0;
3864}
3865
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003866static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3867 struct net_device *lag_dev)
3868{
3869 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3870 struct mlxsw_sp_upper *lag;
3871 u16 lag_id;
3872 u8 port_index;
3873 int err;
3874
3875 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
3876 if (err)
3877 return err;
3878 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3879 if (!lag->ref_count) {
3880 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
3881 if (err)
3882 return err;
3883 lag->dev = lag_dev;
3884 }
3885
3886 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
3887 if (err)
3888 return err;
3889 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
3890 if (err)
3891 goto err_col_port_add;
3892 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
3893 if (err)
3894 goto err_col_port_enable;
3895
3896 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
3897 mlxsw_sp_port->local_port);
3898 mlxsw_sp_port->lag_id = lag_id;
3899 mlxsw_sp_port->lagged = 1;
3900 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003901
3902 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
3903
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003904 return 0;
3905
Ido Schimmel51554db2016-05-06 22:18:39 +02003906err_col_port_enable:
3907 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003908err_col_port_add:
3909 if (!lag->ref_count)
3910 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003911 return err;
3912}
3913
Ido Schimmel82e6db02016-06-20 23:04:04 +02003914static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
3915 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003916{
3917 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003918 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02003919 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003920
3921 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003922 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003923 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3924 WARN_ON(lag->ref_count == 0);
3925
Ido Schimmel82e6db02016-06-20 23:04:04 +02003926 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
3927 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003928
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003929 if (mlxsw_sp_port->bridged) {
3930 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003931 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003932 }
3933
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003934 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003935 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003936
3937 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
3938 mlxsw_sp_port->local_port);
3939 mlxsw_sp_port->lagged = 0;
3940 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003941
3942 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003943}
3944
Jiri Pirko74581202015-12-03 12:12:30 +01003945static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3946 u16 lag_id)
3947{
3948 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3949 char sldr_pl[MLXSW_REG_SLDR_LEN];
3950
3951 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
3952 mlxsw_sp_port->local_port);
3953 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3954}
3955
3956static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3957 u16 lag_id)
3958{
3959 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3960 char sldr_pl[MLXSW_REG_SLDR_LEN];
3961
3962 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
3963 mlxsw_sp_port->local_port);
3964 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3965}
3966
3967static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
3968 bool lag_tx_enabled)
3969{
3970 if (lag_tx_enabled)
3971 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
3972 mlxsw_sp_port->lag_id);
3973 else
3974 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
3975 mlxsw_sp_port->lag_id);
3976}
3977
3978static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
3979 struct netdev_lag_lower_state_info *info)
3980{
3981 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
3982}
3983
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003984static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
3985 struct net_device *vlan_dev)
3986{
3987 struct mlxsw_sp_port *mlxsw_sp_vport;
3988 u16 vid = vlan_dev_vlan_id(vlan_dev);
3989
3990 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02003991 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003992 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003993
3994 mlxsw_sp_vport->dev = vlan_dev;
3995
3996 return 0;
3997}
3998
Ido Schimmel82e6db02016-06-20 23:04:04 +02003999static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4000 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004001{
4002 struct mlxsw_sp_port *mlxsw_sp_vport;
4003 u16 vid = vlan_dev_vlan_id(vlan_dev);
4004
4005 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004006 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02004007 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004008
4009 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004010}
4011
Jiri Pirko74581202015-12-03 12:12:30 +01004012static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4013 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004014{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004015 struct netdev_notifier_changeupper_info *info;
4016 struct mlxsw_sp_port *mlxsw_sp_port;
4017 struct net_device *upper_dev;
4018 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004019 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004020
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004021 mlxsw_sp_port = netdev_priv(dev);
4022 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4023 info = ptr;
4024
4025 switch (event) {
4026 case NETDEV_PRECHANGEUPPER:
4027 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004028 if (!is_vlan_dev(upper_dev) &&
4029 !netif_is_lag_master(upper_dev) &&
4030 !netif_is_bridge_master(upper_dev))
4031 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004032 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004033 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004034 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004035 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004036 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004037 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004038 if (netif_is_lag_master(upper_dev) &&
4039 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4040 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004041 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004042 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4043 return -EINVAL;
4044 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4045 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4046 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004047 break;
4048 case NETDEV_CHANGEUPPER:
4049 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004050 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004051 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004052 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4053 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004054 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004055 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4056 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004057 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004058 if (info->linking)
4059 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4060 upper_dev);
4061 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004062 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004063 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004064 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004065 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4066 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004067 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004068 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4069 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004070 } else {
4071 err = -EINVAL;
4072 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004073 }
4074 break;
4075 }
4076
Ido Schimmel80bedf12016-06-20 23:03:59 +02004077 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004078}
4079
Jiri Pirko74581202015-12-03 12:12:30 +01004080static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4081 unsigned long event, void *ptr)
4082{
4083 struct netdev_notifier_changelowerstate_info *info;
4084 struct mlxsw_sp_port *mlxsw_sp_port;
4085 int err;
4086
4087 mlxsw_sp_port = netdev_priv(dev);
4088 info = ptr;
4089
4090 switch (event) {
4091 case NETDEV_CHANGELOWERSTATE:
4092 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4093 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4094 info->lower_state_info);
4095 if (err)
4096 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4097 }
4098 break;
4099 }
4100
Ido Schimmel80bedf12016-06-20 23:03:59 +02004101 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004102}
4103
4104static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4105 unsigned long event, void *ptr)
4106{
4107 switch (event) {
4108 case NETDEV_PRECHANGEUPPER:
4109 case NETDEV_CHANGEUPPER:
4110 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4111 case NETDEV_CHANGELOWERSTATE:
4112 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4113 }
4114
Ido Schimmel80bedf12016-06-20 23:03:59 +02004115 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004116}
4117
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004118static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4119 unsigned long event, void *ptr)
4120{
4121 struct net_device *dev;
4122 struct list_head *iter;
4123 int ret;
4124
4125 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4126 if (mlxsw_sp_port_dev_check(dev)) {
4127 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004128 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004129 return ret;
4130 }
4131 }
4132
Ido Schimmel80bedf12016-06-20 23:03:59 +02004133 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004134}
4135
Ido Schimmel701b1862016-07-04 08:23:16 +02004136static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4137 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004138{
Ido Schimmel701b1862016-07-04 08:23:16 +02004139 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004140 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004141
Ido Schimmel701b1862016-07-04 08:23:16 +02004142 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4143 if (!f) {
4144 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4145 if (IS_ERR(f))
4146 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004147 }
4148
Ido Schimmel701b1862016-07-04 08:23:16 +02004149 f->ref_count++;
4150
4151 return 0;
4152}
4153
4154static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4155 struct net_device *vlan_dev)
4156{
4157 u16 fid = vlan_dev_vlan_id(vlan_dev);
4158 struct mlxsw_sp_fid *f;
4159
4160 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004161 if (f && f->r)
4162 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004163 if (f && --f->ref_count == 0)
4164 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4165}
4166
4167static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4168 unsigned long event, void *ptr)
4169{
4170 struct netdev_notifier_changeupper_info *info;
4171 struct net_device *upper_dev;
4172 struct mlxsw_sp *mlxsw_sp;
4173 int err;
4174
4175 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4176 if (!mlxsw_sp)
4177 return 0;
4178 if (br_dev != mlxsw_sp->master_bridge.dev)
4179 return 0;
4180
4181 info = ptr;
4182
4183 switch (event) {
4184 case NETDEV_CHANGEUPPER:
4185 upper_dev = info->upper_dev;
4186 if (!is_vlan_dev(upper_dev))
4187 break;
4188 if (info->linking) {
4189 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4190 upper_dev);
4191 if (err)
4192 return err;
4193 } else {
4194 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4195 }
4196 break;
4197 }
4198
4199 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004200}
4201
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004202static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004203{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004204 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004205 MLXSW_SP_VFID_MAX);
4206}
4207
4208static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4209{
4210 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4211
4212 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4213 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004214}
4215
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004216static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004217
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004218static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4219 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004220{
4221 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004222 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004223 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004224 int err;
4225
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004226 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004227 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004228 dev_err(dev, "No available vFIDs\n");
4229 return ERR_PTR(-ERANGE);
4230 }
4231
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004232 fid = mlxsw_sp_vfid_to_fid(vfid);
4233 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004234 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004235 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004236 return ERR_PTR(err);
4237 }
4238
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004239 f = kzalloc(sizeof(*f), GFP_KERNEL);
4240 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004241 goto err_allocate_vfid;
4242
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004243 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004244 f->fid = fid;
4245 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004246
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004247 list_add(&f->list, &mlxsw_sp->vfids.list);
4248 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004249
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004250 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004251
4252err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004253 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004254 return ERR_PTR(-ENOMEM);
4255}
4256
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004257static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4258 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004259{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004260 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004261 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004262
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004263 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004264 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004265
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004266 if (f->r)
4267 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004268
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004269 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004270
4271 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004272}
4273
Ido Schimmel99724c12016-07-04 08:23:14 +02004274static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4275 bool valid)
4276{
4277 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4278 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4279
4280 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4281 vid);
4282}
4283
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004284static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4285 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004286{
Ido Schimmel0355b592016-06-20 23:04:13 +02004287 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004288 int err;
4289
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004290 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004291 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004292 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004293 if (IS_ERR(f))
4294 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004295 }
4296
Ido Schimmel0355b592016-06-20 23:04:13 +02004297 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4298 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004299 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004300
Ido Schimmel0355b592016-06-20 23:04:13 +02004301 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4302 if (err)
4303 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004304
Ido Schimmel41b996c2016-06-20 23:04:17 +02004305 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004306 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004307
Ido Schimmel22305372016-06-20 23:04:21 +02004308 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4309
Ido Schimmel0355b592016-06-20 23:04:13 +02004310 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004311
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004312err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004313 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4314err_vport_flood_set:
4315 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004316 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004317 return err;
4318}
4319
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004320static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004321{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004322 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004323
Ido Schimmel22305372016-06-20 23:04:21 +02004324 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4325
Ido Schimmel0355b592016-06-20 23:04:13 +02004326 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4327
4328 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4329
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004330 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4331
Ido Schimmel41b996c2016-06-20 23:04:17 +02004332 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004333 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004334 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004335}
4336
4337static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4338 struct net_device *br_dev)
4339{
Ido Schimmel99724c12016-07-04 08:23:14 +02004340 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004341 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4342 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004343 int err;
4344
Ido Schimmel99724c12016-07-04 08:23:14 +02004345 if (f && !WARN_ON(!f->leave))
4346 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004347
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004348 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004349 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004350 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004351 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004352 }
4353
4354 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4355 if (err) {
4356 netdev_err(dev, "Failed to enable learning\n");
4357 goto err_port_vid_learning_set;
4358 }
4359
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004360 mlxsw_sp_vport->learning = 1;
4361 mlxsw_sp_vport->learning_sync = 1;
4362 mlxsw_sp_vport->uc_flood = 1;
4363 mlxsw_sp_vport->bridged = 1;
4364
4365 return 0;
4366
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004367err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004368 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004369 return err;
4370}
4371
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004372static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004373{
4374 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004375
4376 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4377
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004378 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004379
Ido Schimmel0355b592016-06-20 23:04:13 +02004380 mlxsw_sp_vport->learning = 0;
4381 mlxsw_sp_vport->learning_sync = 0;
4382 mlxsw_sp_vport->uc_flood = 0;
4383 mlxsw_sp_vport->bridged = 0;
4384}
4385
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004386static bool
4387mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4388 const struct net_device *br_dev)
4389{
4390 struct mlxsw_sp_port *mlxsw_sp_vport;
4391
4392 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4393 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004394 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004395
4396 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004397 return false;
4398 }
4399
4400 return true;
4401}
4402
4403static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4404 unsigned long event, void *ptr,
4405 u16 vid)
4406{
4407 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4408 struct netdev_notifier_changeupper_info *info = ptr;
4409 struct mlxsw_sp_port *mlxsw_sp_vport;
4410 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004411 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004412
4413 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4414
4415 switch (event) {
4416 case NETDEV_PRECHANGEUPPER:
4417 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004418 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004419 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004420 if (!info->linking)
4421 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004422 /* We can't have multiple VLAN interfaces configured on
4423 * the same port and being members in the same bridge.
4424 */
4425 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4426 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004427 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004428 break;
4429 case NETDEV_CHANGEUPPER:
4430 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004431 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004432 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004433 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004434 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4435 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004436 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004437 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004438 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004439 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004440 }
4441 }
4442
Ido Schimmel80bedf12016-06-20 23:03:59 +02004443 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004444}
4445
Ido Schimmel272c4472015-12-15 16:03:47 +01004446static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4447 unsigned long event, void *ptr,
4448 u16 vid)
4449{
4450 struct net_device *dev;
4451 struct list_head *iter;
4452 int ret;
4453
4454 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4455 if (mlxsw_sp_port_dev_check(dev)) {
4456 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4457 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004458 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004459 return ret;
4460 }
4461 }
4462
Ido Schimmel80bedf12016-06-20 23:03:59 +02004463 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004464}
4465
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004466static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4467 unsigned long event, void *ptr)
4468{
4469 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4470 u16 vid = vlan_dev_vlan_id(vlan_dev);
4471
Ido Schimmel272c4472015-12-15 16:03:47 +01004472 if (mlxsw_sp_port_dev_check(real_dev))
4473 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4474 vid);
4475 else if (netif_is_lag_master(real_dev))
4476 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4477 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004478
Ido Schimmel80bedf12016-06-20 23:03:59 +02004479 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004480}
4481
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004482static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4483 unsigned long event, void *ptr)
4484{
4485 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004486 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004487
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004488 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4489 err = mlxsw_sp_netdevice_router_port_event(dev);
4490 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004491 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4492 else if (netif_is_lag_master(dev))
4493 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004494 else if (netif_is_bridge_master(dev))
4495 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004496 else if (is_vlan_dev(dev))
4497 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004498
Ido Schimmel80bedf12016-06-20 23:03:59 +02004499 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004500}
4501
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004502static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4503 .notifier_call = mlxsw_sp_netdevice_event,
4504};
4505
Ido Schimmel99724c12016-07-04 08:23:14 +02004506static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4507 .notifier_call = mlxsw_sp_inetaddr_event,
4508 .priority = 10, /* Must be called before FIB notifier block */
4509};
4510
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004511static int __init mlxsw_sp_module_init(void)
4512{
4513 int err;
4514
4515 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004516 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004517 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4518 if (err)
4519 goto err_core_driver_register;
4520 return 0;
4521
4522err_core_driver_register:
4523 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4524 return err;
4525}
4526
4527static void __exit mlxsw_sp_module_exit(void)
4528{
4529 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Ido Schimmel99724c12016-07-04 08:23:14 +02004530 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004531 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4532}
4533
4534module_init(mlxsw_sp_module_init);
4535module_exit(mlxsw_sp_module_exit);
4536
4537MODULE_LICENSE("Dual BSD/GPL");
4538MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4539MODULE_DESCRIPTION("Mellanox Spectrum driver");
4540MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);