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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Eran Ben Elisha37e92a92017-11-13 10:11:27 +0200150 MLX5_CMD_OP_SET_PP_RATE_LIMIT = 0x780,
Saeed Mahameed74862162016-06-09 15:11:34 +0300151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300203 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300204 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
205 MLX5_CMD_OP_QUERY_RQ = 0x90b,
206 MLX5_CMD_OP_CREATE_RMP = 0x90c,
207 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
208 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
209 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300210 MLX5_CMD_OP_CREATE_TIS = 0x912,
211 MLX5_CMD_OP_MODIFY_TIS = 0x913,
212 MLX5_CMD_OP_DESTROY_TIS = 0x914,
213 MLX5_CMD_OP_QUERY_TIS = 0x915,
214 MLX5_CMD_OP_CREATE_RQT = 0x916,
215 MLX5_CMD_OP_MODIFY_RQT = 0x917,
216 MLX5_CMD_OP_DESTROY_RQT = 0x918,
217 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200218 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300219 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
220 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
221 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
222 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
223 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
224 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
225 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
226 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200227 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000228 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
229 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
230 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300231 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300232 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
233 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200234 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
235 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300236 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
237 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
238 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
239 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
240 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300241 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300242};
243
244struct mlx5_ifc_flow_table_fields_supported_bits {
245 u8 outer_dmac[0x1];
246 u8 outer_smac[0x1];
247 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300248 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300249 u8 outer_first_prio[0x1];
250 u8 outer_first_cfi[0x1];
251 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300252 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300253 u8 outer_second_prio[0x1];
254 u8 outer_second_cfi[0x1];
255 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200256 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300257 u8 outer_sip[0x1];
258 u8 outer_dip[0x1];
259 u8 outer_frag[0x1];
260 u8 outer_ip_protocol[0x1];
261 u8 outer_ip_ecn[0x1];
262 u8 outer_ip_dscp[0x1];
263 u8 outer_udp_sport[0x1];
264 u8 outer_udp_dport[0x1];
265 u8 outer_tcp_sport[0x1];
266 u8 outer_tcp_dport[0x1];
267 u8 outer_tcp_flags[0x1];
268 u8 outer_gre_protocol[0x1];
269 u8 outer_gre_key[0x1];
270 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200271 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300272 u8 source_eswitch_port[0x1];
273
274 u8 inner_dmac[0x1];
275 u8 inner_smac[0x1];
276 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300277 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300278 u8 inner_first_prio[0x1];
279 u8 inner_first_cfi[0x1];
280 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200281 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300282 u8 inner_second_prio[0x1];
283 u8 inner_second_cfi[0x1];
284 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200285 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300286 u8 inner_sip[0x1];
287 u8 inner_dip[0x1];
288 u8 inner_frag[0x1];
289 u8 inner_ip_protocol[0x1];
290 u8 inner_ip_ecn[0x1];
291 u8 inner_ip_dscp[0x1];
292 u8 inner_udp_sport[0x1];
293 u8 inner_udp_dport[0x1];
294 u8 inner_tcp_sport[0x1];
295 u8 inner_tcp_dport[0x1];
296 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200297 u8 reserved_at_37[0x9];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300298 u8 reserved_at_40[0x1a];
299 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300300
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300301 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300302};
303
304struct mlx5_ifc_flow_table_prop_layout_bits {
305 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000306 u8 reserved_at_1[0x1];
307 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200308 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200309 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200310 u8 identified_miss_table_mode[0x1];
311 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300312 u8 encap[0x1];
313 u8 decap[0x1];
314 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300315
Matan Barakb4ff3a32016-02-09 14:57:42 +0200316 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200318 u8 log_max_modify_header_context[0x8];
319 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320 u8 max_ft_level[0x8];
321
Matan Barakb4ff3a32016-02-09 14:57:42 +0200322 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200325 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300326
Matan Barakb4ff3a32016-02-09 14:57:42 +0200327 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200328 u8 log_max_destination[0x8];
329
Raed Salem16f1c5b2017-07-30 11:02:51 +0300330 u8 log_max_flow_counter[0x8];
331 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300332 u8 log_max_flow[0x8];
333
Matan Barakb4ff3a32016-02-09 14:57:42 +0200334 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300335
336 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
337
338 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
339};
340
341struct mlx5_ifc_odp_per_transport_service_cap_bits {
342 u8 send[0x1];
343 u8 receive[0x1];
344 u8 write[0x1];
345 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200346 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300347 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200348 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300349};
350
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200351struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200352 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200353
354 u8 ipv4[0x20];
355};
356
357struct mlx5_ifc_ipv6_layout_bits {
358 u8 ipv6[16][0x8];
359};
360
361union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
362 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
363 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200364 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200365};
366
Saeed Mahameede2816822015-05-28 22:28:40 +0300367struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
368 u8 smac_47_16[0x20];
369
370 u8 smac_15_0[0x10];
371 u8 ethertype[0x10];
372
373 u8 dmac_47_16[0x20];
374
375 u8 dmac_15_0[0x10];
376 u8 first_prio[0x3];
377 u8 first_cfi[0x1];
378 u8 first_vid[0xc];
379
380 u8 ip_protocol[0x8];
381 u8 ip_dscp[0x6];
382 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300383 u8 cvlan_tag[0x1];
384 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300385 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300386 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300387 u8 tcp_flags[0x9];
388
389 u8 tcp_sport[0x10];
390 u8 tcp_dport[0x10];
391
Or Gerlitza8ade552017-06-07 17:49:56 +0300392 u8 reserved_at_c0[0x18];
393 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300394
395 u8 udp_sport[0x10];
396 u8 udp_dport[0x10];
397
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200398 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300399
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200400 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300401};
402
403struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300404 u8 reserved_at_0[0x8];
405 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300406
Matan Barakb4ff3a32016-02-09 14:57:42 +0200407 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300408 u8 source_port[0x10];
409
410 u8 outer_second_prio[0x3];
411 u8 outer_second_cfi[0x1];
412 u8 outer_second_vid[0xc];
413 u8 inner_second_prio[0x3];
414 u8 inner_second_cfi[0x1];
415 u8 inner_second_vid[0xc];
416
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300417 u8 outer_second_cvlan_tag[0x1];
418 u8 inner_second_cvlan_tag[0x1];
419 u8 outer_second_svlan_tag[0x1];
420 u8 inner_second_svlan_tag[0x1];
421 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300422 u8 gre_protocol[0x10];
423
424 u8 gre_key_h[0x18];
425 u8 gre_key_l[0x8];
426
427 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200428 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300429
Matan Barakb4ff3a32016-02-09 14:57:42 +0200430 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300431
Matan Barakb4ff3a32016-02-09 14:57:42 +0200432 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300433 u8 outer_ipv6_flow_label[0x14];
434
Matan Barakb4ff3a32016-02-09 14:57:42 +0200435 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300436 u8 inner_ipv6_flow_label[0x14];
437
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300438 u8 reserved_at_120[0x28];
439 u8 bth_dst_qp[0x18];
440 u8 reserved_at_160[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300441};
442
443struct mlx5_ifc_cmd_pas_bits {
444 u8 pa_h[0x20];
445
446 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200447 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300448};
449
450struct mlx5_ifc_uint64_bits {
451 u8 hi[0x20];
452
453 u8 lo[0x20];
454};
455
456enum {
457 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
458 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
459 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
460 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
461 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
462 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
463 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
464 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
465 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
466 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
467};
468
469struct mlx5_ifc_ads_bits {
470 u8 fl[0x1];
471 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200472 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300473 u8 pkey_index[0x10];
474
Matan Barakb4ff3a32016-02-09 14:57:42 +0200475 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300476 u8 grh[0x1];
477 u8 mlid[0x7];
478 u8 rlid[0x10];
479
480 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200483 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300484 u8 stat_rate[0x4];
485 u8 hop_limit[0x8];
486
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 tclass[0x8];
489 u8 flow_label[0x14];
490
491 u8 rgid_rip[16][0x8];
492
Matan Barakb4ff3a32016-02-09 14:57:42 +0200493 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300494 u8 f_dscp[0x1];
495 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200496 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300497 u8 f_eth_prio[0x1];
498 u8 ecn[0x2];
499 u8 dscp[0x6];
500 u8 udp_sport[0x10];
501
502 u8 dei_cfi[0x1];
503 u8 eth_prio[0x3];
504 u8 sl[0x4];
505 u8 port[0x8];
506 u8 rmac_47_32[0x10];
507
508 u8 rmac_31_0[0x20];
509};
510
511struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200512 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300513 u8 nic_rx_multi_path_tirs_fts[0x1];
514 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
515 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300516
517 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
518
Matan Barakb4ff3a32016-02-09 14:57:42 +0200519 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
522
523 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
524
Matan Barakb4ff3a32016-02-09 14:57:42 +0200525 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300526
527 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
528
Matan Barakb4ff3a32016-02-09 14:57:42 +0200529 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300530};
531
Saeed Mahameed495716b2015-12-01 18:03:19 +0200532struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200533 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200534
535 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
536
537 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
538
539 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
540
Matan Barakb4ff3a32016-02-09 14:57:42 +0200541 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200542};
543
Saeed Mahameedd6666752015-12-01 18:03:22 +0200544struct mlx5_ifc_e_switch_cap_bits {
545 u8 vport_svlan_strip[0x1];
546 u8 vport_cvlan_strip[0x1];
547 u8 vport_svlan_insert[0x1];
548 u8 vport_cvlan_insert_if_not_exist[0x1];
549 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300550 u8 reserved_at_5[0x19];
551 u8 nic_vport_node_guid_modify[0x1];
552 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200553
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300554 u8 vxlan_encap_decap[0x1];
555 u8 nvgre_encap_decap[0x1];
556 u8 reserved_at_22[0x9];
557 u8 log_max_encap_headers[0x5];
558 u8 reserved_2b[0x6];
559 u8 max_encap_header_size[0xa];
560
561 u8 reserved_40[0x7c0];
562
Saeed Mahameedd6666752015-12-01 18:03:22 +0200563};
564
Saeed Mahameed74862162016-06-09 15:11:34 +0300565struct mlx5_ifc_qos_cap_bits {
566 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300567 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200568 u8 esw_bw_share[0x1];
569 u8 esw_rate_limit[0x1];
570 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300571
572 u8 reserved_at_20[0x20];
573
Saeed Mahameed74862162016-06-09 15:11:34 +0300574 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300575
Saeed Mahameed74862162016-06-09 15:11:34 +0300576 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300577
578 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300579 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300580
581 u8 esw_element_type[0x10];
582 u8 esw_tsar_type[0x10];
583
584 u8 reserved_at_c0[0x10];
585 u8 max_qos_para_vport[0x10];
586
587 u8 max_tsar_bw_share[0x20];
588
589 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300590};
591
Saeed Mahameede2816822015-05-28 22:28:40 +0300592struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
593 u8 csum_cap[0x1];
594 u8 vlan_cap[0x1];
595 u8 lro_cap[0x1];
596 u8 lro_psh_flag[0x1];
597 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200598 u8 reserved_at_5[0x2];
599 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200600 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200601 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300602 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200603 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300604 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300605 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300606 u8 reg_umr_sq[0x1];
607 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300608 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300609 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200610 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300611 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300612 u8 tunnel_stateless_vxlan[0x1];
613
Ilan Tayari547eede2017-04-18 16:04:28 +0300614 u8 swp[0x1];
615 u8 swp_csum[0x1];
616 u8 swp_lso[0x1];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300617 u8 reserved_at_23[0x1b];
618 u8 max_geneve_opt_len[0x1];
619 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300620
Matan Barakb4ff3a32016-02-09 14:57:42 +0200621 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300622 u8 lro_min_mss_size[0x10];
623
Matan Barakb4ff3a32016-02-09 14:57:42 +0200624 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300625
626 u8 lro_timer_supported_periods[4][0x20];
627
Matan Barakb4ff3a32016-02-09 14:57:42 +0200628 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300629};
630
631struct mlx5_ifc_roce_cap_bits {
632 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200633 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300634
Matan Barakb4ff3a32016-02-09 14:57:42 +0200635 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300636
Matan Barakb4ff3a32016-02-09 14:57:42 +0200637 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300638 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200639 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300640 u8 roce_version[0x8];
641
Matan Barakb4ff3a32016-02-09 14:57:42 +0200642 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300643 u8 r_roce_dest_udp_port[0x10];
644
645 u8 r_roce_max_src_udp_port[0x10];
646 u8 r_roce_min_src_udp_port[0x10];
647
Matan Barakb4ff3a32016-02-09 14:57:42 +0200648 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300649 u8 roce_address_table_size[0x10];
650
Matan Barakb4ff3a32016-02-09 14:57:42 +0200651 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300652};
653
654enum {
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
656 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
657 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
658 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
659 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
660 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
661 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
662 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
663 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
664};
665
666enum {
667 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
668 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
669 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
670 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
671 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
672 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
673 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
674 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
675 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
676};
677
678struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200679 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300680
Or Gerlitzbd108382017-05-28 15:24:17 +0300681 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200682 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300683 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300684
Matan Barakb4ff3a32016-02-09 14:57:42 +0200685 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300686
Matan Barakb4ff3a32016-02-09 14:57:42 +0200687 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300688
Matan Barakb4ff3a32016-02-09 14:57:42 +0200689 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200690 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300691
Matan Barakb4ff3a32016-02-09 14:57:42 +0200692 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200693 u8 atomic_size_qp[0x10];
694
Matan Barakb4ff3a32016-02-09 14:57:42 +0200695 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300696 u8 atomic_size_dc[0x10];
697
Matan Barakb4ff3a32016-02-09 14:57:42 +0200698 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300699};
700
701struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200702 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300703
704 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200705 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300706
Matan Barakb4ff3a32016-02-09 14:57:42 +0200707 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300708
709 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
710
711 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
712
713 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
714
Matan Barakb4ff3a32016-02-09 14:57:42 +0200715 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300716};
717
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200718struct mlx5_ifc_calc_op {
719 u8 reserved_at_0[0x10];
720 u8 reserved_at_10[0x9];
721 u8 op_swap_endianness[0x1];
722 u8 op_min[0x1];
723 u8 op_xor[0x1];
724 u8 op_or[0x1];
725 u8 op_and[0x1];
726 u8 op_max[0x1];
727 u8 op_add[0x1];
728};
729
730struct mlx5_ifc_vector_calc_cap_bits {
731 u8 calc_matrix[0x1];
732 u8 reserved_at_1[0x1f];
733 u8 reserved_at_20[0x8];
734 u8 max_vec_count[0x8];
735 u8 reserved_at_30[0xd];
736 u8 max_chunk_size[0x3];
737 struct mlx5_ifc_calc_op calc0;
738 struct mlx5_ifc_calc_op calc1;
739 struct mlx5_ifc_calc_op calc2;
740 struct mlx5_ifc_calc_op calc3;
741
742 u8 reserved_at_e0[0x720];
743};
744
Saeed Mahameede2816822015-05-28 22:28:40 +0300745enum {
746 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
747 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300748 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc87082017-10-17 18:01:13 +0300749 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300750};
751
752enum {
753 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
754 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
755};
756
757enum {
758 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
759 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
760 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
761 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
762 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
763};
764
765enum {
766 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
767 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
768 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
769 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
770 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
771 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
772};
773
774enum {
775 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
776 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
777};
778
779enum {
780 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
781 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
782 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
783};
784
785enum {
786 MLX5_CAP_PORT_TYPE_IB = 0x0,
787 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300788};
789
Max Gurtovoy1410a902017-05-28 10:53:10 +0300790enum {
791 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
792 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
793 MLX5_CAP_UMR_FENCE_NONE = 0x2,
794};
795
Eli Cohenb7755162014-10-02 12:19:44 +0300796struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200797 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300798
799 u8 log_max_srq_sz[0x8];
800 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200801 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300802 u8 log_max_qp[0x5];
803
Matan Barakb4ff3a32016-02-09 14:57:42 +0200804 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300805 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200806 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300807
Matan Barakb4ff3a32016-02-09 14:57:42 +0200808 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300809 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200810 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300811 u8 log_max_cq[0x5];
812
813 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200814 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300815 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200816 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300817 u8 log_max_eq[0x4];
818
819 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200820 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300821 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200822 u8 force_teardown[0x1];
823 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300824 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200825 u8 umr_extended_translation_offset[0x1];
826 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300827 u8 log_max_klm_list_size[0x6];
828
Matan Barakb4ff3a32016-02-09 14:57:42 +0200829 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300830 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200831 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300832 u8 log_max_ra_res_dc[0x6];
833
Matan Barakb4ff3a32016-02-09 14:57:42 +0200834 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300835 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200836 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300837 u8 log_max_ra_res_qp[0x6];
838
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200839 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300840 u8 cc_query_allowed[0x1];
841 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200842 u8 start_pad[0x1];
843 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500844 u8 reserved_at_165[0xa];
845 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300846 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300847
Saeed Mahameede2816822015-05-28 22:28:40 +0300848 u8 out_of_seq_cnt[0x1];
849 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300850 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300851 u8 reserved_at_183[0x1];
852 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300853 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300854 u8 max_qp_cnt[0xa];
855 u8 pkey_table_size[0x10];
856
Saeed Mahameede2816822015-05-28 22:28:40 +0300857 u8 vport_group_manager[0x1];
858 u8 vhca_group_manager[0x1];
859 u8 ib_virt[0x1];
860 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200861 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300862 u8 ets[0x1];
863 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200864 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300865 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200866 u8 mcam_reg[0x1];
867 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300868 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200869 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300870 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300871 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200872 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300873 u8 disable_link_up[0x1];
874 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300875 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300876 u8 num_ports[0x8];
877
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300878 u8 reserved_at_1c0[0x1];
879 u8 pps[0x1];
880 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300881 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300882 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200883 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300884 u8 reserved_at_1d0[0x1];
885 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300886 u8 general_notification_event[0x1];
887 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200888 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200889 u8 rol_s[0x1];
890 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300891 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200892 u8 wol_s[0x1];
893 u8 wol_g[0x1];
894 u8 wol_a[0x1];
895 u8 wol_b[0x1];
896 u8 wol_m[0x1];
897 u8 wol_u[0x1];
898 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300899
900 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300901 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300902 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300903
Saeed Mahameede2816822015-05-28 22:28:40 +0300904 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300905 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300906 u8 reserved_at_202[0x1];
907 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200908 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300909 u8 reserved_at_205[0x5];
910 u8 umr_fence[0x2];
911 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300912 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300913 u8 cmdif_checksum[0x2];
914 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300915 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300916 u8 wq_signature[0x1];
917 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300918 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300919 u8 sho[0x1];
920 u8 tph[0x1];
921 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300922 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300923 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300924 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300925 u8 roce[0x1];
926 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300927 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300928
929 u8 cq_oi[0x1];
930 u8 cq_resize[0x1];
931 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300932 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300933 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300934 u8 pg[0x1];
935 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300936 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300937 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300938 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300939 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300940 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300941 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200942 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300943 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200944 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300945 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300946 u8 qkv[0x1];
947 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200948 u8 set_deth_sqpn[0x1];
949 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300950 u8 xrc[0x1];
951 u8 ud[0x1];
952 u8 uc[0x1];
953 u8 rc[0x1];
954
Eli Cohena6d51b62017-01-03 23:55:23 +0200955 u8 uar_4k[0x1];
956 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300957 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300958 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300959 u8 log_pg_sz[0x8];
960
961 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200962 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300963 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300964 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300965 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300966
967 u8 reserved_at_270[0xb];
968 u8 lag_master[0x1];
969 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300970
Tariq Toukane1c9c622016-04-11 23:10:21 +0300971 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300972 u8 max_wqe_sz_sq[0x10];
973
Tariq Toukane1c9c622016-04-11 23:10:21 +0300974 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300975 u8 max_wqe_sz_rq[0x10];
976
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300977 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300978 u8 max_wqe_sz_sq_dc[0x10];
979
Tariq Toukane1c9c622016-04-11 23:10:21 +0300980 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300981 u8 max_qp_mcg[0x19];
982
Tariq Toukane1c9c622016-04-11 23:10:21 +0300983 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300984 u8 log_max_mcg[0x8];
985
Tariq Toukane1c9c622016-04-11 23:10:21 +0300986 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300987 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300988 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300989 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300990 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300991 u8 log_max_xrcd[0x5];
992
Amir Vadaia351a1b02016-07-14 10:32:38 +0300993 u8 reserved_at_340[0x8];
994 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300995 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +0300996
Eli Cohenb7755162014-10-02 12:19:44 +0300997
Tariq Toukane1c9c622016-04-11 23:10:21 +0300998 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300999 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001000 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001001 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001002 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001003 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001004 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001005 u8 log_max_tis[0x5];
1006
Saeed Mahameede2816822015-05-28 22:28:40 +03001007 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001008 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001009 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001010 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001011 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001012 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001013 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001014 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001015 u8 log_max_tis_per_sq[0x5];
1016
Tariq Toukane1c9c622016-04-11 23:10:21 +03001017 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001018 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001019 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001020 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001021 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001022 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001023 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001024 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001025
Tariq Toukane1c9c622016-04-11 23:10:21 +03001026 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03001027 u8 log_max_wq_sz[0x5];
1028
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001029 u8 nic_vport_change_event[0x1];
Eran Ben Elisha8978cc92018-01-09 11:41:10 +02001030 u8 disable_local_lb_uc[0x1];
1031 u8 disable_local_lb_mc[0x1];
1032 u8 reserved_at_3e3[0x8];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001033 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001034 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001035 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001036 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001037 u8 log_max_current_uc_list[0x5];
1038
Tariq Toukane1c9c622016-04-11 23:10:21 +03001039 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001040
Tariq Toukane1c9c622016-04-11 23:10:21 +03001041 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001042 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001043 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001044 u8 log_uar_page_sz[0x10];
1045
Tariq Toukane1c9c622016-04-11 23:10:21 +03001046 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001047 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001048 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001049
Eli Cohena6d51b62017-01-03 23:55:23 +02001050 u8 reserved_at_500[0x20];
1051 u8 num_of_uars_per_page[0x20];
1052 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001053
Guy Levi0ff8e792017-10-19 08:25:51 +03001054 u8 reserved_at_580[0x3d];
1055 u8 cqe_128_always[0x1];
1056 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001057 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001058
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001059 u8 cqe_compression_timeout[0x10];
1060 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001061
Saeed Mahameed74862162016-06-09 15:11:34 +03001062 u8 reserved_at_5e0[0x10];
1063 u8 tag_matching[0x1];
1064 u8 rndv_offload_rc[0x1];
1065 u8 rndv_offload_dc[0x1];
1066 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001067 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001068 u8 log_max_xrq[0x5];
1069
Max Gurtovoy7b135582017-01-02 11:37:38 +02001070 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001071};
1072
Saeed Mahameed81848732015-12-01 18:03:20 +02001073enum mlx5_flow_destination_type {
1074 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1075 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1076 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001077
1078 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001079};
1080
1081struct mlx5_ifc_dest_format_struct_bits {
1082 u8 destination_type[0x8];
1083 u8 destination_id[0x18];
1084
Matan Barakb4ff3a32016-02-09 14:57:42 +02001085 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001086};
1087
Amir Vadai9dc0b282016-05-13 12:55:39 +00001088struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001089 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001090
1091 u8 reserved_at_20[0x20];
1092};
1093
1094union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1095 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1096 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1097 u8 reserved_at_0[0x40];
1098};
1099
Saeed Mahameede2816822015-05-28 22:28:40 +03001100struct mlx5_ifc_fte_match_param_bits {
1101 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1102
1103 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1104
1105 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1106
Matan Barakb4ff3a32016-02-09 14:57:42 +02001107 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001108};
1109
1110enum {
1111 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1112 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1113 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1114 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1115 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1116};
1117
1118struct mlx5_ifc_rx_hash_field_select_bits {
1119 u8 l3_prot_type[0x1];
1120 u8 l4_prot_type[0x1];
1121 u8 selected_fields[0x1e];
1122};
1123
1124enum {
1125 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1126 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1127};
1128
1129enum {
1130 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1131 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1132};
1133
1134struct mlx5_ifc_wq_bits {
1135 u8 wq_type[0x4];
1136 u8 wq_signature[0x1];
1137 u8 end_padding_mode[0x2];
1138 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001139 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001140
1141 u8 hds_skip_first_sge[0x1];
1142 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001143 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001144 u8 page_offset[0x5];
1145 u8 lwm[0x10];
1146
Matan Barakb4ff3a32016-02-09 14:57:42 +02001147 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001148 u8 pd[0x18];
1149
Matan Barakb4ff3a32016-02-09 14:57:42 +02001150 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001151 u8 uar_page[0x18];
1152
1153 u8 dbr_addr[0x40];
1154
1155 u8 hw_counter[0x20];
1156
1157 u8 sw_counter[0x20];
1158
Matan Barakb4ff3a32016-02-09 14:57:42 +02001159 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001160 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001161 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001162 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001163 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001164 u8 log_wq_sz[0x5];
1165
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001166 u8 reserved_at_120[0x15];
1167 u8 log_wqe_num_of_strides[0x3];
1168 u8 two_byte_shift_en[0x1];
1169 u8 reserved_at_139[0x4];
1170 u8 log_wqe_stride_size[0x3];
1171
1172 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001173
1174 struct mlx5_ifc_cmd_pas_bits pas[0];
1175};
1176
1177struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001178 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001179 u8 rq_num[0x18];
1180};
1181
1182struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001183 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001184 u8 mac_addr_47_32[0x10];
1185
1186 u8 mac_addr_31_0[0x20];
1187};
1188
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001189struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001190 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001191 u8 vlan[0x0c];
1192
Matan Barakb4ff3a32016-02-09 14:57:42 +02001193 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001194};
1195
Saeed Mahameede2816822015-05-28 22:28:40 +03001196struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001197 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001198
1199 u8 min_time_between_cnps[0x20];
1200
Matan Barakb4ff3a32016-02-09 14:57:42 +02001201 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001202 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001203 u8 reserved_at_d8[0x4];
1204 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001205 u8 cnp_802p_prio[0x3];
1206
Matan Barakb4ff3a32016-02-09 14:57:42 +02001207 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001208};
1209
1210struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001211 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001212
Matan Barakb4ff3a32016-02-09 14:57:42 +02001213 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001214 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001215 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001216 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001217 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001218
Matan Barakb4ff3a32016-02-09 14:57:42 +02001219 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001220
1221 u8 rpg_time_reset[0x20];
1222
1223 u8 rpg_byte_reset[0x20];
1224
1225 u8 rpg_threshold[0x20];
1226
1227 u8 rpg_max_rate[0x20];
1228
1229 u8 rpg_ai_rate[0x20];
1230
1231 u8 rpg_hai_rate[0x20];
1232
1233 u8 rpg_gd[0x20];
1234
1235 u8 rpg_min_dec_fac[0x20];
1236
1237 u8 rpg_min_rate[0x20];
1238
Matan Barakb4ff3a32016-02-09 14:57:42 +02001239 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001240
1241 u8 rate_to_set_on_first_cnp[0x20];
1242
1243 u8 dce_tcp_g[0x20];
1244
1245 u8 dce_tcp_rtt[0x20];
1246
1247 u8 rate_reduce_monitor_period[0x20];
1248
Matan Barakb4ff3a32016-02-09 14:57:42 +02001249 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001250
1251 u8 initial_alpha_value[0x20];
1252
Matan Barakb4ff3a32016-02-09 14:57:42 +02001253 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001254};
1255
1256struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001257 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001258
1259 u8 rppp_max_rps[0x20];
1260
1261 u8 rpg_time_reset[0x20];
1262
1263 u8 rpg_byte_reset[0x20];
1264
1265 u8 rpg_threshold[0x20];
1266
1267 u8 rpg_max_rate[0x20];
1268
1269 u8 rpg_ai_rate[0x20];
1270
1271 u8 rpg_hai_rate[0x20];
1272
1273 u8 rpg_gd[0x20];
1274
1275 u8 rpg_min_dec_fac[0x20];
1276
1277 u8 rpg_min_rate[0x20];
1278
Matan Barakb4ff3a32016-02-09 14:57:42 +02001279 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001280};
1281
1282enum {
1283 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1284 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1285 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1286};
1287
1288struct mlx5_ifc_resize_field_select_bits {
1289 u8 resize_field_select[0x20];
1290};
1291
1292enum {
1293 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1294 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1295 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1296 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1297};
1298
1299struct mlx5_ifc_modify_field_select_bits {
1300 u8 modify_field_select[0x20];
1301};
1302
1303struct mlx5_ifc_field_select_r_roce_np_bits {
1304 u8 field_select_r_roce_np[0x20];
1305};
1306
1307struct mlx5_ifc_field_select_r_roce_rp_bits {
1308 u8 field_select_r_roce_rp[0x20];
1309};
1310
1311enum {
1312 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1313 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1314 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1315 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1316 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1317 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1318 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1319 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1320 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1321 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1322};
1323
1324struct mlx5_ifc_field_select_802_1qau_rp_bits {
1325 u8 field_select_8021qaurp[0x20];
1326};
1327
1328struct mlx5_ifc_phys_layer_cntrs_bits {
1329 u8 time_since_last_clear_high[0x20];
1330
1331 u8 time_since_last_clear_low[0x20];
1332
1333 u8 symbol_errors_high[0x20];
1334
1335 u8 symbol_errors_low[0x20];
1336
1337 u8 sync_headers_errors_high[0x20];
1338
1339 u8 sync_headers_errors_low[0x20];
1340
1341 u8 edpl_bip_errors_lane0_high[0x20];
1342
1343 u8 edpl_bip_errors_lane0_low[0x20];
1344
1345 u8 edpl_bip_errors_lane1_high[0x20];
1346
1347 u8 edpl_bip_errors_lane1_low[0x20];
1348
1349 u8 edpl_bip_errors_lane2_high[0x20];
1350
1351 u8 edpl_bip_errors_lane2_low[0x20];
1352
1353 u8 edpl_bip_errors_lane3_high[0x20];
1354
1355 u8 edpl_bip_errors_lane3_low[0x20];
1356
1357 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1358
1359 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1360
1361 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1362
1363 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1364
1365 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1366
1367 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1368
1369 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1370
1371 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1372
1373 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1374
1375 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1376
1377 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1378
1379 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1380
1381 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1382
1383 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1384
1385 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1386
1387 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1388
1389 u8 rs_fec_corrected_blocks_high[0x20];
1390
1391 u8 rs_fec_corrected_blocks_low[0x20];
1392
1393 u8 rs_fec_uncorrectable_blocks_high[0x20];
1394
1395 u8 rs_fec_uncorrectable_blocks_low[0x20];
1396
1397 u8 rs_fec_no_errors_blocks_high[0x20];
1398
1399 u8 rs_fec_no_errors_blocks_low[0x20];
1400
1401 u8 rs_fec_single_error_blocks_high[0x20];
1402
1403 u8 rs_fec_single_error_blocks_low[0x20];
1404
1405 u8 rs_fec_corrected_symbols_total_high[0x20];
1406
1407 u8 rs_fec_corrected_symbols_total_low[0x20];
1408
1409 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1410
1411 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1412
1413 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1414
1415 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1416
1417 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1418
1419 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1420
1421 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1422
1423 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1424
1425 u8 link_down_events[0x20];
1426
1427 u8 successful_recovery_events[0x20];
1428
Matan Barakb4ff3a32016-02-09 14:57:42 +02001429 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001430};
1431
Gal Pressmand8dc0502016-09-27 17:04:51 +03001432struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1433 u8 time_since_last_clear_high[0x20];
1434
1435 u8 time_since_last_clear_low[0x20];
1436
1437 u8 phy_received_bits_high[0x20];
1438
1439 u8 phy_received_bits_low[0x20];
1440
1441 u8 phy_symbol_errors_high[0x20];
1442
1443 u8 phy_symbol_errors_low[0x20];
1444
1445 u8 phy_corrected_bits_high[0x20];
1446
1447 u8 phy_corrected_bits_low[0x20];
1448
1449 u8 phy_corrected_bits_lane0_high[0x20];
1450
1451 u8 phy_corrected_bits_lane0_low[0x20];
1452
1453 u8 phy_corrected_bits_lane1_high[0x20];
1454
1455 u8 phy_corrected_bits_lane1_low[0x20];
1456
1457 u8 phy_corrected_bits_lane2_high[0x20];
1458
1459 u8 phy_corrected_bits_lane2_low[0x20];
1460
1461 u8 phy_corrected_bits_lane3_high[0x20];
1462
1463 u8 phy_corrected_bits_lane3_low[0x20];
1464
1465 u8 reserved_at_200[0x5c0];
1466};
1467
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001468struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1469 u8 symbol_error_counter[0x10];
1470
1471 u8 link_error_recovery_counter[0x8];
1472
1473 u8 link_downed_counter[0x8];
1474
1475 u8 port_rcv_errors[0x10];
1476
1477 u8 port_rcv_remote_physical_errors[0x10];
1478
1479 u8 port_rcv_switch_relay_errors[0x10];
1480
1481 u8 port_xmit_discards[0x10];
1482
1483 u8 port_xmit_constraint_errors[0x8];
1484
1485 u8 port_rcv_constraint_errors[0x8];
1486
1487 u8 reserved_at_70[0x8];
1488
1489 u8 link_overrun_errors[0x8];
1490
1491 u8 reserved_at_80[0x10];
1492
1493 u8 vl_15_dropped[0x10];
1494
Tim Wright133bea02017-05-01 17:30:08 +01001495 u8 reserved_at_a0[0x80];
1496
1497 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001498};
1499
Saeed Mahameede2816822015-05-28 22:28:40 +03001500struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1501 u8 transmit_queue_high[0x20];
1502
1503 u8 transmit_queue_low[0x20];
1504
Matan Barakb4ff3a32016-02-09 14:57:42 +02001505 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001506};
1507
1508struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1509 u8 rx_octets_high[0x20];
1510
1511 u8 rx_octets_low[0x20];
1512
Matan Barakb4ff3a32016-02-09 14:57:42 +02001513 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001514
1515 u8 rx_frames_high[0x20];
1516
1517 u8 rx_frames_low[0x20];
1518
1519 u8 tx_octets_high[0x20];
1520
1521 u8 tx_octets_low[0x20];
1522
Matan Barakb4ff3a32016-02-09 14:57:42 +02001523 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001524
1525 u8 tx_frames_high[0x20];
1526
1527 u8 tx_frames_low[0x20];
1528
1529 u8 rx_pause_high[0x20];
1530
1531 u8 rx_pause_low[0x20];
1532
1533 u8 rx_pause_duration_high[0x20];
1534
1535 u8 rx_pause_duration_low[0x20];
1536
1537 u8 tx_pause_high[0x20];
1538
1539 u8 tx_pause_low[0x20];
1540
1541 u8 tx_pause_duration_high[0x20];
1542
1543 u8 tx_pause_duration_low[0x20];
1544
1545 u8 rx_pause_transition_high[0x20];
1546
1547 u8 rx_pause_transition_low[0x20];
1548
Matan Barakb4ff3a32016-02-09 14:57:42 +02001549 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001550};
1551
1552struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1553 u8 port_transmit_wait_high[0x20];
1554
1555 u8 port_transmit_wait_low[0x20];
1556
Gal Pressman2dba0792017-06-18 14:56:45 +03001557 u8 reserved_at_40[0x100];
1558
1559 u8 rx_buffer_almost_full_high[0x20];
1560
1561 u8 rx_buffer_almost_full_low[0x20];
1562
1563 u8 rx_buffer_full_high[0x20];
1564
1565 u8 rx_buffer_full_low[0x20];
1566
1567 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001568};
1569
1570struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1571 u8 dot3stats_alignment_errors_high[0x20];
1572
1573 u8 dot3stats_alignment_errors_low[0x20];
1574
1575 u8 dot3stats_fcs_errors_high[0x20];
1576
1577 u8 dot3stats_fcs_errors_low[0x20];
1578
1579 u8 dot3stats_single_collision_frames_high[0x20];
1580
1581 u8 dot3stats_single_collision_frames_low[0x20];
1582
1583 u8 dot3stats_multiple_collision_frames_high[0x20];
1584
1585 u8 dot3stats_multiple_collision_frames_low[0x20];
1586
1587 u8 dot3stats_sqe_test_errors_high[0x20];
1588
1589 u8 dot3stats_sqe_test_errors_low[0x20];
1590
1591 u8 dot3stats_deferred_transmissions_high[0x20];
1592
1593 u8 dot3stats_deferred_transmissions_low[0x20];
1594
1595 u8 dot3stats_late_collisions_high[0x20];
1596
1597 u8 dot3stats_late_collisions_low[0x20];
1598
1599 u8 dot3stats_excessive_collisions_high[0x20];
1600
1601 u8 dot3stats_excessive_collisions_low[0x20];
1602
1603 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1604
1605 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1606
1607 u8 dot3stats_carrier_sense_errors_high[0x20];
1608
1609 u8 dot3stats_carrier_sense_errors_low[0x20];
1610
1611 u8 dot3stats_frame_too_longs_high[0x20];
1612
1613 u8 dot3stats_frame_too_longs_low[0x20];
1614
1615 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1616
1617 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1618
1619 u8 dot3stats_symbol_errors_high[0x20];
1620
1621 u8 dot3stats_symbol_errors_low[0x20];
1622
1623 u8 dot3control_in_unknown_opcodes_high[0x20];
1624
1625 u8 dot3control_in_unknown_opcodes_low[0x20];
1626
1627 u8 dot3in_pause_frames_high[0x20];
1628
1629 u8 dot3in_pause_frames_low[0x20];
1630
1631 u8 dot3out_pause_frames_high[0x20];
1632
1633 u8 dot3out_pause_frames_low[0x20];
1634
Matan Barakb4ff3a32016-02-09 14:57:42 +02001635 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001636};
1637
1638struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1639 u8 ether_stats_drop_events_high[0x20];
1640
1641 u8 ether_stats_drop_events_low[0x20];
1642
1643 u8 ether_stats_octets_high[0x20];
1644
1645 u8 ether_stats_octets_low[0x20];
1646
1647 u8 ether_stats_pkts_high[0x20];
1648
1649 u8 ether_stats_pkts_low[0x20];
1650
1651 u8 ether_stats_broadcast_pkts_high[0x20];
1652
1653 u8 ether_stats_broadcast_pkts_low[0x20];
1654
1655 u8 ether_stats_multicast_pkts_high[0x20];
1656
1657 u8 ether_stats_multicast_pkts_low[0x20];
1658
1659 u8 ether_stats_crc_align_errors_high[0x20];
1660
1661 u8 ether_stats_crc_align_errors_low[0x20];
1662
1663 u8 ether_stats_undersize_pkts_high[0x20];
1664
1665 u8 ether_stats_undersize_pkts_low[0x20];
1666
1667 u8 ether_stats_oversize_pkts_high[0x20];
1668
1669 u8 ether_stats_oversize_pkts_low[0x20];
1670
1671 u8 ether_stats_fragments_high[0x20];
1672
1673 u8 ether_stats_fragments_low[0x20];
1674
1675 u8 ether_stats_jabbers_high[0x20];
1676
1677 u8 ether_stats_jabbers_low[0x20];
1678
1679 u8 ether_stats_collisions_high[0x20];
1680
1681 u8 ether_stats_collisions_low[0x20];
1682
1683 u8 ether_stats_pkts64octets_high[0x20];
1684
1685 u8 ether_stats_pkts64octets_low[0x20];
1686
1687 u8 ether_stats_pkts65to127octets_high[0x20];
1688
1689 u8 ether_stats_pkts65to127octets_low[0x20];
1690
1691 u8 ether_stats_pkts128to255octets_high[0x20];
1692
1693 u8 ether_stats_pkts128to255octets_low[0x20];
1694
1695 u8 ether_stats_pkts256to511octets_high[0x20];
1696
1697 u8 ether_stats_pkts256to511octets_low[0x20];
1698
1699 u8 ether_stats_pkts512to1023octets_high[0x20];
1700
1701 u8 ether_stats_pkts512to1023octets_low[0x20];
1702
1703 u8 ether_stats_pkts1024to1518octets_high[0x20];
1704
1705 u8 ether_stats_pkts1024to1518octets_low[0x20];
1706
1707 u8 ether_stats_pkts1519to2047octets_high[0x20];
1708
1709 u8 ether_stats_pkts1519to2047octets_low[0x20];
1710
1711 u8 ether_stats_pkts2048to4095octets_high[0x20];
1712
1713 u8 ether_stats_pkts2048to4095octets_low[0x20];
1714
1715 u8 ether_stats_pkts4096to8191octets_high[0x20];
1716
1717 u8 ether_stats_pkts4096to8191octets_low[0x20];
1718
1719 u8 ether_stats_pkts8192to10239octets_high[0x20];
1720
1721 u8 ether_stats_pkts8192to10239octets_low[0x20];
1722
Matan Barakb4ff3a32016-02-09 14:57:42 +02001723 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001724};
1725
1726struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1727 u8 if_in_octets_high[0x20];
1728
1729 u8 if_in_octets_low[0x20];
1730
1731 u8 if_in_ucast_pkts_high[0x20];
1732
1733 u8 if_in_ucast_pkts_low[0x20];
1734
1735 u8 if_in_discards_high[0x20];
1736
1737 u8 if_in_discards_low[0x20];
1738
1739 u8 if_in_errors_high[0x20];
1740
1741 u8 if_in_errors_low[0x20];
1742
1743 u8 if_in_unknown_protos_high[0x20];
1744
1745 u8 if_in_unknown_protos_low[0x20];
1746
1747 u8 if_out_octets_high[0x20];
1748
1749 u8 if_out_octets_low[0x20];
1750
1751 u8 if_out_ucast_pkts_high[0x20];
1752
1753 u8 if_out_ucast_pkts_low[0x20];
1754
1755 u8 if_out_discards_high[0x20];
1756
1757 u8 if_out_discards_low[0x20];
1758
1759 u8 if_out_errors_high[0x20];
1760
1761 u8 if_out_errors_low[0x20];
1762
1763 u8 if_in_multicast_pkts_high[0x20];
1764
1765 u8 if_in_multicast_pkts_low[0x20];
1766
1767 u8 if_in_broadcast_pkts_high[0x20];
1768
1769 u8 if_in_broadcast_pkts_low[0x20];
1770
1771 u8 if_out_multicast_pkts_high[0x20];
1772
1773 u8 if_out_multicast_pkts_low[0x20];
1774
1775 u8 if_out_broadcast_pkts_high[0x20];
1776
1777 u8 if_out_broadcast_pkts_low[0x20];
1778
Matan Barakb4ff3a32016-02-09 14:57:42 +02001779 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001780};
1781
1782struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1783 u8 a_frames_transmitted_ok_high[0x20];
1784
1785 u8 a_frames_transmitted_ok_low[0x20];
1786
1787 u8 a_frames_received_ok_high[0x20];
1788
1789 u8 a_frames_received_ok_low[0x20];
1790
1791 u8 a_frame_check_sequence_errors_high[0x20];
1792
1793 u8 a_frame_check_sequence_errors_low[0x20];
1794
1795 u8 a_alignment_errors_high[0x20];
1796
1797 u8 a_alignment_errors_low[0x20];
1798
1799 u8 a_octets_transmitted_ok_high[0x20];
1800
1801 u8 a_octets_transmitted_ok_low[0x20];
1802
1803 u8 a_octets_received_ok_high[0x20];
1804
1805 u8 a_octets_received_ok_low[0x20];
1806
1807 u8 a_multicast_frames_xmitted_ok_high[0x20];
1808
1809 u8 a_multicast_frames_xmitted_ok_low[0x20];
1810
1811 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1812
1813 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1814
1815 u8 a_multicast_frames_received_ok_high[0x20];
1816
1817 u8 a_multicast_frames_received_ok_low[0x20];
1818
1819 u8 a_broadcast_frames_received_ok_high[0x20];
1820
1821 u8 a_broadcast_frames_received_ok_low[0x20];
1822
1823 u8 a_in_range_length_errors_high[0x20];
1824
1825 u8 a_in_range_length_errors_low[0x20];
1826
1827 u8 a_out_of_range_length_field_high[0x20];
1828
1829 u8 a_out_of_range_length_field_low[0x20];
1830
1831 u8 a_frame_too_long_errors_high[0x20];
1832
1833 u8 a_frame_too_long_errors_low[0x20];
1834
1835 u8 a_symbol_error_during_carrier_high[0x20];
1836
1837 u8 a_symbol_error_during_carrier_low[0x20];
1838
1839 u8 a_mac_control_frames_transmitted_high[0x20];
1840
1841 u8 a_mac_control_frames_transmitted_low[0x20];
1842
1843 u8 a_mac_control_frames_received_high[0x20];
1844
1845 u8 a_mac_control_frames_received_low[0x20];
1846
1847 u8 a_unsupported_opcodes_received_high[0x20];
1848
1849 u8 a_unsupported_opcodes_received_low[0x20];
1850
1851 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1852
1853 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1854
1855 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1856
1857 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1858
Matan Barakb4ff3a32016-02-09 14:57:42 +02001859 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001860};
1861
Gal Pressman8ed1a632016-11-17 13:46:01 +02001862struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1863 u8 life_time_counter_high[0x20];
1864
1865 u8 life_time_counter_low[0x20];
1866
1867 u8 rx_errors[0x20];
1868
1869 u8 tx_errors[0x20];
1870
1871 u8 l0_to_recovery_eieos[0x20];
1872
1873 u8 l0_to_recovery_ts[0x20];
1874
1875 u8 l0_to_recovery_framing[0x20];
1876
1877 u8 l0_to_recovery_retrain[0x20];
1878
1879 u8 crc_error_dllp[0x20];
1880
1881 u8 crc_error_tlp[0x20];
1882
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001883 u8 tx_overflow_buffer_pkt_high[0x20];
1884
1885 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001886
1887 u8 outbound_stalled_reads[0x20];
1888
1889 u8 outbound_stalled_writes[0x20];
1890
1891 u8 outbound_stalled_reads_events[0x20];
1892
1893 u8 outbound_stalled_writes_events[0x20];
1894
1895 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001896};
1897
Saeed Mahameede2816822015-05-28 22:28:40 +03001898struct mlx5_ifc_cmd_inter_comp_event_bits {
1899 u8 command_completion_vector[0x20];
1900
Matan Barakb4ff3a32016-02-09 14:57:42 +02001901 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001902};
1903
1904struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001905 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001906 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001907 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001908 u8 vl[0x4];
1909
Matan Barakb4ff3a32016-02-09 14:57:42 +02001910 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001911};
1912
1913struct mlx5_ifc_db_bf_congestion_event_bits {
1914 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001915 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001916 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001917 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001918
Matan Barakb4ff3a32016-02-09 14:57:42 +02001919 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001920};
1921
1922struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001923 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001924
1925 u8 gpio_event_hi[0x20];
1926
1927 u8 gpio_event_lo[0x20];
1928
Matan Barakb4ff3a32016-02-09 14:57:42 +02001929 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001930};
1931
1932struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001933 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001934
1935 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001936 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001937
Matan Barakb4ff3a32016-02-09 14:57:42 +02001938 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001939};
1940
1941struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001942 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001943};
1944
1945enum {
1946 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1947 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1948};
1949
1950struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001951 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001952 u8 cqn[0x18];
1953
Matan Barakb4ff3a32016-02-09 14:57:42 +02001954 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001955
Matan Barakb4ff3a32016-02-09 14:57:42 +02001956 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001957 u8 syndrome[0x8];
1958
Matan Barakb4ff3a32016-02-09 14:57:42 +02001959 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001960};
1961
1962struct mlx5_ifc_rdma_page_fault_event_bits {
1963 u8 bytes_committed[0x20];
1964
1965 u8 r_key[0x20];
1966
Matan Barakb4ff3a32016-02-09 14:57:42 +02001967 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001968 u8 packet_len[0x10];
1969
1970 u8 rdma_op_len[0x20];
1971
1972 u8 rdma_va[0x40];
1973
Matan Barakb4ff3a32016-02-09 14:57:42 +02001974 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001975 u8 rdma[0x1];
1976 u8 write[0x1];
1977 u8 requestor[0x1];
1978 u8 qp_number[0x18];
1979};
1980
1981struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1982 u8 bytes_committed[0x20];
1983
Matan Barakb4ff3a32016-02-09 14:57:42 +02001984 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001985 u8 wqe_index[0x10];
1986
Matan Barakb4ff3a32016-02-09 14:57:42 +02001987 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001988 u8 len[0x10];
1989
Matan Barakb4ff3a32016-02-09 14:57:42 +02001990 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001991
Matan Barakb4ff3a32016-02-09 14:57:42 +02001992 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001993 u8 rdma[0x1];
1994 u8 write_read[0x1];
1995 u8 requestor[0x1];
1996 u8 qpn[0x18];
1997};
1998
1999struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002000 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002001
2002 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002003 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002004
Matan Barakb4ff3a32016-02-09 14:57:42 +02002005 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002006 u8 qpn_rqn_sqn[0x18];
2007};
2008
2009struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002010 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002011
Matan Barakb4ff3a32016-02-09 14:57:42 +02002012 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002013 u8 dct_number[0x18];
2014};
2015
2016struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002017 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002018
Matan Barakb4ff3a32016-02-09 14:57:42 +02002019 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002020 u8 cq_number[0x18];
2021};
2022
2023enum {
2024 MLX5_QPC_STATE_RST = 0x0,
2025 MLX5_QPC_STATE_INIT = 0x1,
2026 MLX5_QPC_STATE_RTR = 0x2,
2027 MLX5_QPC_STATE_RTS = 0x3,
2028 MLX5_QPC_STATE_SQER = 0x4,
2029 MLX5_QPC_STATE_ERR = 0x6,
2030 MLX5_QPC_STATE_SQD = 0x7,
2031 MLX5_QPC_STATE_SUSPENDED = 0x9,
2032};
2033
2034enum {
2035 MLX5_QPC_ST_RC = 0x0,
2036 MLX5_QPC_ST_UC = 0x1,
2037 MLX5_QPC_ST_UD = 0x2,
2038 MLX5_QPC_ST_XRC = 0x3,
2039 MLX5_QPC_ST_DCI = 0x5,
2040 MLX5_QPC_ST_QP0 = 0x7,
2041 MLX5_QPC_ST_QP1 = 0x8,
2042 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2043 MLX5_QPC_ST_REG_UMR = 0xc,
2044};
2045
2046enum {
2047 MLX5_QPC_PM_STATE_ARMED = 0x0,
2048 MLX5_QPC_PM_STATE_REARM = 0x1,
2049 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2050 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2051};
2052
2053enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002054 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2055};
2056
2057enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002058 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2059 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2060};
2061
2062enum {
2063 MLX5_QPC_MTU_256_BYTES = 0x1,
2064 MLX5_QPC_MTU_512_BYTES = 0x2,
2065 MLX5_QPC_MTU_1K_BYTES = 0x3,
2066 MLX5_QPC_MTU_2K_BYTES = 0x4,
2067 MLX5_QPC_MTU_4K_BYTES = 0x5,
2068 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2069};
2070
2071enum {
2072 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2073 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2074 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2075 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2076 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2077 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2078 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2079 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2080};
2081
2082enum {
2083 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2084 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2085 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2086};
2087
2088enum {
2089 MLX5_QPC_CS_RES_DISABLE = 0x0,
2090 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2091 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2092};
2093
2094struct mlx5_ifc_qpc_bits {
2095 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002096 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002097 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002098 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002099 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002100 u8 reserved_at_15[0x3];
2101 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002102 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002103 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002104
2105 u8 wq_signature[0x1];
2106 u8 block_lb_mc[0x1];
2107 u8 atomic_like_write_en[0x1];
2108 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002109 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002110 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002111 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002112 u8 pd[0x18];
2113
2114 u8 mtu[0x3];
2115 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002116 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002117 u8 log_rq_size[0x4];
2118 u8 log_rq_stride[0x3];
2119 u8 no_sq[0x1];
2120 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002121 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002122 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002123 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002124
2125 u8 counter_set_id[0x8];
2126 u8 uar_page[0x18];
2127
Matan Barakb4ff3a32016-02-09 14:57:42 +02002128 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002129 u8 user_index[0x18];
2130
Matan Barakb4ff3a32016-02-09 14:57:42 +02002131 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002132 u8 log_page_size[0x5];
2133 u8 remote_qpn[0x18];
2134
2135 struct mlx5_ifc_ads_bits primary_address_path;
2136
2137 struct mlx5_ifc_ads_bits secondary_address_path;
2138
2139 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002140 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002141 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002142 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002143 u8 retry_count[0x3];
2144 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002145 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002146 u8 fre[0x1];
2147 u8 cur_rnr_retry[0x3];
2148 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002149 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002150
Matan Barakb4ff3a32016-02-09 14:57:42 +02002151 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002152
Matan Barakb4ff3a32016-02-09 14:57:42 +02002153 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002154 u8 next_send_psn[0x18];
2155
Matan Barakb4ff3a32016-02-09 14:57:42 +02002156 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002157 u8 cqn_snd[0x18];
2158
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002159 u8 reserved_at_400[0x8];
2160 u8 deth_sqpn[0x18];
2161
2162 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002163
Matan Barakb4ff3a32016-02-09 14:57:42 +02002164 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002165 u8 last_acked_psn[0x18];
2166
Matan Barakb4ff3a32016-02-09 14:57:42 +02002167 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002168 u8 ssn[0x18];
2169
Matan Barakb4ff3a32016-02-09 14:57:42 +02002170 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002171 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002172 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002173 u8 atomic_mode[0x4];
2174 u8 rre[0x1];
2175 u8 rwe[0x1];
2176 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002177 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002178 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002179 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002180 u8 cd_slave_receive[0x1];
2181 u8 cd_slave_send[0x1];
2182 u8 cd_master[0x1];
2183
Matan Barakb4ff3a32016-02-09 14:57:42 +02002184 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002185 u8 min_rnr_nak[0x5];
2186 u8 next_rcv_psn[0x18];
2187
Matan Barakb4ff3a32016-02-09 14:57:42 +02002188 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002189 u8 xrcd[0x18];
2190
Matan Barakb4ff3a32016-02-09 14:57:42 +02002191 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002192 u8 cqn_rcv[0x18];
2193
2194 u8 dbr_addr[0x40];
2195
2196 u8 q_key[0x20];
2197
Matan Barakb4ff3a32016-02-09 14:57:42 +02002198 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002199 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002200 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002201
Matan Barakb4ff3a32016-02-09 14:57:42 +02002202 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002203 u8 rmsn[0x18];
2204
2205 u8 hw_sq_wqebb_counter[0x10];
2206 u8 sw_sq_wqebb_counter[0x10];
2207
2208 u8 hw_rq_counter[0x20];
2209
2210 u8 sw_rq_counter[0x20];
2211
Matan Barakb4ff3a32016-02-09 14:57:42 +02002212 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002213
Matan Barakb4ff3a32016-02-09 14:57:42 +02002214 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002215 u8 cgs[0x1];
2216 u8 cs_req[0x8];
2217 u8 cs_res[0x8];
2218
2219 u8 dc_access_key[0x40];
2220
Matan Barakb4ff3a32016-02-09 14:57:42 +02002221 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002222};
2223
2224struct mlx5_ifc_roce_addr_layout_bits {
2225 u8 source_l3_address[16][0x8];
2226
Matan Barakb4ff3a32016-02-09 14:57:42 +02002227 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002228 u8 vlan_valid[0x1];
2229 u8 vlan_id[0xc];
2230 u8 source_mac_47_32[0x10];
2231
2232 u8 source_mac_31_0[0x20];
2233
Matan Barakb4ff3a32016-02-09 14:57:42 +02002234 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002235 u8 roce_l3_type[0x4];
2236 u8 roce_version[0x8];
2237
Matan Barakb4ff3a32016-02-09 14:57:42 +02002238 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002239};
2240
2241union mlx5_ifc_hca_cap_union_bits {
2242 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2243 struct mlx5_ifc_odp_cap_bits odp_cap;
2244 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2245 struct mlx5_ifc_roce_cap_bits roce_cap;
2246 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2247 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002248 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002249 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002250 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002251 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002252 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002253 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002254};
2255
2256enum {
2257 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2258 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2259 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002260 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002261 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2262 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002263 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002264};
2265
2266struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002267 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002268
2269 u8 group_id[0x20];
2270
Matan Barakb4ff3a32016-02-09 14:57:42 +02002271 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002272 u8 flow_tag[0x18];
2273
Matan Barakb4ff3a32016-02-09 14:57:42 +02002274 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002275 u8 action[0x10];
2276
Matan Barakb4ff3a32016-02-09 14:57:42 +02002277 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002278 u8 destination_list_size[0x18];
2279
Amir Vadai9dc0b282016-05-13 12:55:39 +00002280 u8 reserved_at_a0[0x8];
2281 u8 flow_counter_list_size[0x18];
2282
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002283 u8 encap_id[0x20];
2284
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002285 u8 modify_header_id[0x20];
2286
2287 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002288
2289 struct mlx5_ifc_fte_match_param_bits match_value;
2290
Matan Barakb4ff3a32016-02-09 14:57:42 +02002291 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002292
Amir Vadai9dc0b282016-05-13 12:55:39 +00002293 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002294};
2295
2296enum {
2297 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2298 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2299};
2300
2301struct mlx5_ifc_xrc_srqc_bits {
2302 u8 state[0x4];
2303 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002304 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002305
2306 u8 wq_signature[0x1];
2307 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002308 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002309 u8 rlky[0x1];
2310 u8 basic_cyclic_rcv_wqe[0x1];
2311 u8 log_rq_stride[0x3];
2312 u8 xrcd[0x18];
2313
2314 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002315 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002316 u8 cqn[0x18];
2317
Matan Barakb4ff3a32016-02-09 14:57:42 +02002318 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002319
2320 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002321 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002322 u8 log_page_size[0x6];
2323 u8 user_index[0x18];
2324
Matan Barakb4ff3a32016-02-09 14:57:42 +02002325 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002326
Matan Barakb4ff3a32016-02-09 14:57:42 +02002327 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002328 u8 pd[0x18];
2329
2330 u8 lwm[0x10];
2331 u8 wqe_cnt[0x10];
2332
Matan Barakb4ff3a32016-02-09 14:57:42 +02002333 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002334
2335 u8 db_record_addr_h[0x20];
2336
2337 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002338 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002339
Matan Barakb4ff3a32016-02-09 14:57:42 +02002340 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002341};
2342
2343struct mlx5_ifc_traffic_counter_bits {
2344 u8 packets[0x40];
2345
2346 u8 octets[0x40];
2347};
2348
2349struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002350 u8 strict_lag_tx_port_affinity[0x1];
2351 u8 reserved_at_1[0x3];
2352 u8 lag_tx_port_affinity[0x04];
2353
2354 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002355 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002356 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002357
Matan Barakb4ff3a32016-02-09 14:57:42 +02002358 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002359
Matan Barakb4ff3a32016-02-09 14:57:42 +02002360 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002361 u8 transport_domain[0x18];
2362
Erez Shitrit500a3d02017-04-13 06:36:51 +03002363 u8 reserved_at_140[0x8];
2364 u8 underlay_qpn[0x18];
2365 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002366};
2367
2368enum {
2369 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2370 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2371};
2372
2373enum {
2374 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2375 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2376};
2377
2378enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002379 MLX5_RX_HASH_FN_NONE = 0x0,
2380 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2381 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002382};
2383
2384enum {
2385 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2386 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2387};
2388
2389struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002390 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002391
2392 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002393 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002394
Matan Barakb4ff3a32016-02-09 14:57:42 +02002395 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002396
Matan Barakb4ff3a32016-02-09 14:57:42 +02002397 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002398 u8 lro_timeout_period_usecs[0x10];
2399 u8 lro_enable_mask[0x4];
2400 u8 lro_max_ip_payload_size[0x8];
2401
Matan Barakb4ff3a32016-02-09 14:57:42 +02002402 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002403
Matan Barakb4ff3a32016-02-09 14:57:42 +02002404 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002405 u8 inline_rqn[0x18];
2406
2407 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002408 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002409 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002410 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002411 u8 indirect_table[0x18];
2412
2413 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002414 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002415 u8 self_lb_block[0x2];
2416 u8 transport_domain[0x18];
2417
2418 u8 rx_hash_toeplitz_key[10][0x20];
2419
2420 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2421
2422 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2423
Matan Barakb4ff3a32016-02-09 14:57:42 +02002424 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002425};
2426
2427enum {
2428 MLX5_SRQC_STATE_GOOD = 0x0,
2429 MLX5_SRQC_STATE_ERROR = 0x1,
2430};
2431
2432struct mlx5_ifc_srqc_bits {
2433 u8 state[0x4];
2434 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002435 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002436
2437 u8 wq_signature[0x1];
2438 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002439 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002440 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002441 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002442 u8 log_rq_stride[0x3];
2443 u8 xrcd[0x18];
2444
2445 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002446 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002447 u8 cqn[0x18];
2448
Matan Barakb4ff3a32016-02-09 14:57:42 +02002449 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002450
Matan Barakb4ff3a32016-02-09 14:57:42 +02002451 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002452 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002453 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002454
Matan Barakb4ff3a32016-02-09 14:57:42 +02002455 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002456
Matan Barakb4ff3a32016-02-09 14:57:42 +02002457 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002458 u8 pd[0x18];
2459
2460 u8 lwm[0x10];
2461 u8 wqe_cnt[0x10];
2462
Matan Barakb4ff3a32016-02-09 14:57:42 +02002463 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002464
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002465 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002466
Matan Barakb4ff3a32016-02-09 14:57:42 +02002467 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002468};
2469
2470enum {
2471 MLX5_SQC_STATE_RST = 0x0,
2472 MLX5_SQC_STATE_RDY = 0x1,
2473 MLX5_SQC_STATE_ERR = 0x3,
2474};
2475
2476struct mlx5_ifc_sqc_bits {
2477 u8 rlky[0x1];
2478 u8 cd_master[0x1];
2479 u8 fre[0x1];
2480 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002481 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002482 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002483 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002484 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002485 u8 allow_swp[0x1];
2486 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002487
Matan Barakb4ff3a32016-02-09 14:57:42 +02002488 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002489 u8 user_index[0x18];
2490
Matan Barakb4ff3a32016-02-09 14:57:42 +02002491 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002492 u8 cqn[0x18];
2493
Saeed Mahameed74862162016-06-09 15:11:34 +03002494 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002495
Saeed Mahameed74862162016-06-09 15:11:34 +03002496 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002497 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002498 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002499
Matan Barakb4ff3a32016-02-09 14:57:42 +02002500 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002501
Matan Barakb4ff3a32016-02-09 14:57:42 +02002502 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002503 u8 tis_num_0[0x18];
2504
2505 struct mlx5_ifc_wq_bits wq;
2506};
2507
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002508enum {
2509 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2510 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2511 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2512 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2513};
2514
2515struct mlx5_ifc_scheduling_context_bits {
2516 u8 element_type[0x8];
2517 u8 reserved_at_8[0x18];
2518
2519 u8 element_attributes[0x20];
2520
2521 u8 parent_element_id[0x20];
2522
2523 u8 reserved_at_60[0x40];
2524
2525 u8 bw_share[0x20];
2526
2527 u8 max_average_bw[0x20];
2528
2529 u8 reserved_at_e0[0x120];
2530};
2531
Saeed Mahameede2816822015-05-28 22:28:40 +03002532struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002533 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002534
Matan Barakb4ff3a32016-02-09 14:57:42 +02002535 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002536 u8 rqt_max_size[0x10];
2537
Matan Barakb4ff3a32016-02-09 14:57:42 +02002538 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002539 u8 rqt_actual_size[0x10];
2540
Matan Barakb4ff3a32016-02-09 14:57:42 +02002541 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002542
2543 struct mlx5_ifc_rq_num_bits rq_num[0];
2544};
2545
2546enum {
2547 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2548 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2549};
2550
2551enum {
2552 MLX5_RQC_STATE_RST = 0x0,
2553 MLX5_RQC_STATE_RDY = 0x1,
2554 MLX5_RQC_STATE_ERR = 0x3,
2555};
2556
2557struct mlx5_ifc_rqc_bits {
2558 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002559 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002560 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002561 u8 vsd[0x1];
2562 u8 mem_rq_type[0x4];
2563 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002564 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002565 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002566 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002567
Matan Barakb4ff3a32016-02-09 14:57:42 +02002568 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002569 u8 user_index[0x18];
2570
Matan Barakb4ff3a32016-02-09 14:57:42 +02002571 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002572 u8 cqn[0x18];
2573
2574 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002575 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002576
Matan Barakb4ff3a32016-02-09 14:57:42 +02002577 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002578 u8 rmpn[0x18];
2579
Matan Barakb4ff3a32016-02-09 14:57:42 +02002580 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002581
2582 struct mlx5_ifc_wq_bits wq;
2583};
2584
2585enum {
2586 MLX5_RMPC_STATE_RDY = 0x1,
2587 MLX5_RMPC_STATE_ERR = 0x3,
2588};
2589
2590struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002591 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002592 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002593 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002594
2595 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002596 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002597
Matan Barakb4ff3a32016-02-09 14:57:42 +02002598 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002599
2600 struct mlx5_ifc_wq_bits wq;
2601};
2602
Saeed Mahameede2816822015-05-28 22:28:40 +03002603struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002604 u8 reserved_at_0[0x5];
2605 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002606 u8 reserved_at_8[0x15];
2607 u8 disable_mc_local_lb[0x1];
2608 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002609 u8 roce_en[0x1];
2610
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002611 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002612 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002613 u8 event_on_mtu[0x1];
2614 u8 event_on_promisc_change[0x1];
2615 u8 event_on_vlan_change[0x1];
2616 u8 event_on_mc_address_change[0x1];
2617 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002618
Matan Barakb4ff3a32016-02-09 14:57:42 +02002619 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002620
2621 u8 mtu[0x10];
2622
Achiad Shochat9efa7522015-12-23 18:47:20 +02002623 u8 system_image_guid[0x40];
2624 u8 port_guid[0x40];
2625 u8 node_guid[0x40];
2626
Matan Barakb4ff3a32016-02-09 14:57:42 +02002627 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002628 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002629 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002630
2631 u8 promisc_uc[0x1];
2632 u8 promisc_mc[0x1];
2633 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002634 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002635 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002636 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002637 u8 allowed_list_size[0xc];
2638
2639 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2640
Matan Barakb4ff3a32016-02-09 14:57:42 +02002641 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002642
2643 u8 current_uc_mac_address[0][0x40];
2644};
2645
2646enum {
2647 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2648 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2649 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002650 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002651};
2652
2653struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002654 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002655 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002656 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002657 u8 small_fence_on_rdma_read_response[0x1];
2658 u8 umr_en[0x1];
2659 u8 a[0x1];
2660 u8 rw[0x1];
2661 u8 rr[0x1];
2662 u8 lw[0x1];
2663 u8 lr[0x1];
2664 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002665 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002666
2667 u8 qpn[0x18];
2668 u8 mkey_7_0[0x8];
2669
Matan Barakb4ff3a32016-02-09 14:57:42 +02002670 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002671
2672 u8 length64[0x1];
2673 u8 bsf_en[0x1];
2674 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002675 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002676 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002677 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002678 u8 en_rinval[0x1];
2679 u8 pd[0x18];
2680
2681 u8 start_addr[0x40];
2682
2683 u8 len[0x40];
2684
2685 u8 bsf_octword_size[0x20];
2686
Matan Barakb4ff3a32016-02-09 14:57:42 +02002687 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002688
2689 u8 translations_octword_size[0x20];
2690
Matan Barakb4ff3a32016-02-09 14:57:42 +02002691 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002692 u8 log_page_size[0x5];
2693
Matan Barakb4ff3a32016-02-09 14:57:42 +02002694 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002695};
2696
2697struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002698 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002699 u8 pkey[0x10];
2700};
2701
2702struct mlx5_ifc_array128_auto_bits {
2703 u8 array128_auto[16][0x8];
2704};
2705
2706struct mlx5_ifc_hca_vport_context_bits {
2707 u8 field_select[0x20];
2708
Matan Barakb4ff3a32016-02-09 14:57:42 +02002709 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002710
2711 u8 sm_virt_aware[0x1];
2712 u8 has_smi[0x1];
2713 u8 has_raw[0x1];
2714 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002715 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002716 u8 port_physical_state[0x4];
2717 u8 vport_state_policy[0x4];
2718 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002719 u8 vport_state[0x4];
2720
Matan Barakb4ff3a32016-02-09 14:57:42 +02002721 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002722
2723 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002724
2725 u8 port_guid[0x40];
2726
2727 u8 node_guid[0x40];
2728
2729 u8 cap_mask1[0x20];
2730
2731 u8 cap_mask1_field_select[0x20];
2732
2733 u8 cap_mask2[0x20];
2734
2735 u8 cap_mask2_field_select[0x20];
2736
Matan Barakb4ff3a32016-02-09 14:57:42 +02002737 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002738
2739 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002740 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002741 u8 init_type_reply[0x4];
2742 u8 lmc[0x3];
2743 u8 subnet_timeout[0x5];
2744
2745 u8 sm_lid[0x10];
2746 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002747 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002748
2749 u8 qkey_violation_counter[0x10];
2750 u8 pkey_violation_counter[0x10];
2751
Matan Barakb4ff3a32016-02-09 14:57:42 +02002752 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002753};
2754
Saeed Mahameedd6666752015-12-01 18:03:22 +02002755struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002756 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002757 u8 vport_svlan_strip[0x1];
2758 u8 vport_cvlan_strip[0x1];
2759 u8 vport_svlan_insert[0x1];
2760 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002761 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002762
Matan Barakb4ff3a32016-02-09 14:57:42 +02002763 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002764
2765 u8 svlan_cfi[0x1];
2766 u8 svlan_pcp[0x3];
2767 u8 svlan_id[0xc];
2768 u8 cvlan_cfi[0x1];
2769 u8 cvlan_pcp[0x3];
2770 u8 cvlan_id[0xc];
2771
Matan Barakb4ff3a32016-02-09 14:57:42 +02002772 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002773};
2774
Saeed Mahameede2816822015-05-28 22:28:40 +03002775enum {
2776 MLX5_EQC_STATUS_OK = 0x0,
2777 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2778};
2779
2780enum {
2781 MLX5_EQC_ST_ARMED = 0x9,
2782 MLX5_EQC_ST_FIRED = 0xa,
2783};
2784
2785struct mlx5_ifc_eqc_bits {
2786 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002787 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002788 u8 ec[0x1];
2789 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002790 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002791 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002792 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002793
Matan Barakb4ff3a32016-02-09 14:57:42 +02002794 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002795
Matan Barakb4ff3a32016-02-09 14:57:42 +02002796 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002797 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002798 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002799
Matan Barakb4ff3a32016-02-09 14:57:42 +02002800 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002801 u8 log_eq_size[0x5];
2802 u8 uar_page[0x18];
2803
Matan Barakb4ff3a32016-02-09 14:57:42 +02002804 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002805
Matan Barakb4ff3a32016-02-09 14:57:42 +02002806 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002807 u8 intr[0x8];
2808
Matan Barakb4ff3a32016-02-09 14:57:42 +02002809 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002810 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002811 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002812
Matan Barakb4ff3a32016-02-09 14:57:42 +02002813 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002814
Matan Barakb4ff3a32016-02-09 14:57:42 +02002815 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002816 u8 consumer_counter[0x18];
2817
Matan Barakb4ff3a32016-02-09 14:57:42 +02002818 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002819 u8 producer_counter[0x18];
2820
Matan Barakb4ff3a32016-02-09 14:57:42 +02002821 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002822};
2823
2824enum {
2825 MLX5_DCTC_STATE_ACTIVE = 0x0,
2826 MLX5_DCTC_STATE_DRAINING = 0x1,
2827 MLX5_DCTC_STATE_DRAINED = 0x2,
2828};
2829
2830enum {
2831 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2832 MLX5_DCTC_CS_RES_NA = 0x1,
2833 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2834};
2835
2836enum {
2837 MLX5_DCTC_MTU_256_BYTES = 0x1,
2838 MLX5_DCTC_MTU_512_BYTES = 0x2,
2839 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2840 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2841 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2842};
2843
2844struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002845 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002846 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002847 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002848
Matan Barakb4ff3a32016-02-09 14:57:42 +02002849 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002850 u8 user_index[0x18];
2851
Matan Barakb4ff3a32016-02-09 14:57:42 +02002852 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002853 u8 cqn[0x18];
2854
2855 u8 counter_set_id[0x8];
2856 u8 atomic_mode[0x4];
2857 u8 rre[0x1];
2858 u8 rwe[0x1];
2859 u8 rae[0x1];
2860 u8 atomic_like_write_en[0x1];
2861 u8 latency_sensitive[0x1];
2862 u8 rlky[0x1];
2863 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002864 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002865
Matan Barakb4ff3a32016-02-09 14:57:42 +02002866 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002867 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002868 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002869 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002870 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002871
Matan Barakb4ff3a32016-02-09 14:57:42 +02002872 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002873 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002874
Matan Barakb4ff3a32016-02-09 14:57:42 +02002875 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002876 u8 pd[0x18];
2877
2878 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002879 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002880 u8 flow_label[0x14];
2881
2882 u8 dc_access_key[0x40];
2883
Matan Barakb4ff3a32016-02-09 14:57:42 +02002884 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002885 u8 mtu[0x3];
2886 u8 port[0x8];
2887 u8 pkey_index[0x10];
2888
Matan Barakb4ff3a32016-02-09 14:57:42 +02002889 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002890 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002891 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002892 u8 hop_limit[0x8];
2893
2894 u8 dc_access_key_violation_count[0x20];
2895
Matan Barakb4ff3a32016-02-09 14:57:42 +02002896 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002897 u8 dei_cfi[0x1];
2898 u8 eth_prio[0x3];
2899 u8 ecn[0x2];
2900 u8 dscp[0x6];
2901
Matan Barakb4ff3a32016-02-09 14:57:42 +02002902 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002903};
2904
2905enum {
2906 MLX5_CQC_STATUS_OK = 0x0,
2907 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2908 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2909};
2910
2911enum {
2912 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2913 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2914};
2915
2916enum {
2917 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2918 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2919 MLX5_CQC_ST_FIRED = 0xa,
2920};
2921
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002922enum {
2923 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2924 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002925 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002926};
2927
Saeed Mahameede2816822015-05-28 22:28:40 +03002928struct mlx5_ifc_cqc_bits {
2929 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002930 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002931 u8 cqe_sz[0x3];
2932 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002933 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002934 u8 scqe_break_moderation_en[0x1];
2935 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002936 u8 cq_period_mode[0x2];
2937 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002938 u8 mini_cqe_res_format[0x2];
2939 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002940 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002941
Matan Barakb4ff3a32016-02-09 14:57:42 +02002942 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002943
Matan Barakb4ff3a32016-02-09 14:57:42 +02002944 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002945 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002946 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002947
Matan Barakb4ff3a32016-02-09 14:57:42 +02002948 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002949 u8 log_cq_size[0x5];
2950 u8 uar_page[0x18];
2951
Matan Barakb4ff3a32016-02-09 14:57:42 +02002952 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002953 u8 cq_period[0xc];
2954 u8 cq_max_count[0x10];
2955
Matan Barakb4ff3a32016-02-09 14:57:42 +02002956 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002957 u8 c_eqn[0x8];
2958
Matan Barakb4ff3a32016-02-09 14:57:42 +02002959 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002960 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002961 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002962
Matan Barakb4ff3a32016-02-09 14:57:42 +02002963 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002964
Matan Barakb4ff3a32016-02-09 14:57:42 +02002965 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002966 u8 last_notified_index[0x18];
2967
Matan Barakb4ff3a32016-02-09 14:57:42 +02002968 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002969 u8 last_solicit_index[0x18];
2970
Matan Barakb4ff3a32016-02-09 14:57:42 +02002971 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002972 u8 consumer_counter[0x18];
2973
Matan Barakb4ff3a32016-02-09 14:57:42 +02002974 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002975 u8 producer_counter[0x18];
2976
Matan Barakb4ff3a32016-02-09 14:57:42 +02002977 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002978
2979 u8 dbr_addr[0x40];
2980};
2981
2982union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2983 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2984 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2985 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002986 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002987};
2988
2989struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002990 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002991
Matan Barakb4ff3a32016-02-09 14:57:42 +02002992 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002993 u8 ieee_vendor_id[0x18];
2994
Matan Barakb4ff3a32016-02-09 14:57:42 +02002995 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002996 u8 vsd_vendor_id[0x10];
2997
2998 u8 vsd[208][0x8];
2999
3000 u8 vsd_contd_psid[16][0x8];
3001};
3002
Saeed Mahameed74862162016-06-09 15:11:34 +03003003enum {
3004 MLX5_XRQC_STATE_GOOD = 0x0,
3005 MLX5_XRQC_STATE_ERROR = 0x1,
3006};
3007
3008enum {
3009 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3010 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3011};
3012
3013enum {
3014 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3015};
3016
3017struct mlx5_ifc_tag_matching_topology_context_bits {
3018 u8 log_matching_list_sz[0x4];
3019 u8 reserved_at_4[0xc];
3020 u8 append_next_index[0x10];
3021
3022 u8 sw_phase_cnt[0x10];
3023 u8 hw_phase_cnt[0x10];
3024
3025 u8 reserved_at_40[0x40];
3026};
3027
3028struct mlx5_ifc_xrqc_bits {
3029 u8 state[0x4];
3030 u8 rlkey[0x1];
3031 u8 reserved_at_5[0xf];
3032 u8 topology[0x4];
3033 u8 reserved_at_18[0x4];
3034 u8 offload[0x4];
3035
3036 u8 reserved_at_20[0x8];
3037 u8 user_index[0x18];
3038
3039 u8 reserved_at_40[0x8];
3040 u8 cqn[0x18];
3041
3042 u8 reserved_at_60[0xa0];
3043
3044 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3045
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003046 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003047
3048 struct mlx5_ifc_wq_bits wq;
3049};
3050
Saeed Mahameede2816822015-05-28 22:28:40 +03003051union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3052 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3053 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003054 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003055};
3056
3057union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3058 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3059 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3060 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003061 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003062};
3063
3064union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3065 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3066 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3067 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3068 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3069 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3070 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3071 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003072 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003073 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003074 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003075 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003076};
3077
Gal Pressman8ed1a632016-11-17 13:46:01 +02003078union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3079 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3080 u8 reserved_at_0[0x7c0];
3081};
3082
Saeed Mahameede2816822015-05-28 22:28:40 +03003083union mlx5_ifc_event_auto_bits {
3084 struct mlx5_ifc_comp_event_bits comp_event;
3085 struct mlx5_ifc_dct_events_bits dct_events;
3086 struct mlx5_ifc_qp_events_bits qp_events;
3087 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3088 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3089 struct mlx5_ifc_cq_error_bits cq_error;
3090 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3091 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3092 struct mlx5_ifc_gpio_event_bits gpio_event;
3093 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3094 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3095 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003096 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003097};
3098
3099struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003100 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003101
3102 u8 assert_existptr[0x20];
3103
3104 u8 assert_callra[0x20];
3105
Matan Barakb4ff3a32016-02-09 14:57:42 +02003106 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003107
3108 u8 fw_version[0x20];
3109
3110 u8 hw_id[0x20];
3111
Matan Barakb4ff3a32016-02-09 14:57:42 +02003112 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003113
3114 u8 irisc_index[0x8];
3115 u8 synd[0x8];
3116 u8 ext_synd[0x10];
3117};
3118
3119struct mlx5_ifc_register_loopback_control_bits {
3120 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003121 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003122 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003123 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003124
Matan Barakb4ff3a32016-02-09 14:57:42 +02003125 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003126};
3127
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003128struct mlx5_ifc_vport_tc_element_bits {
3129 u8 traffic_class[0x4];
3130 u8 reserved_at_4[0xc];
3131 u8 vport_number[0x10];
3132};
3133
3134struct mlx5_ifc_vport_element_bits {
3135 u8 reserved_at_0[0x10];
3136 u8 vport_number[0x10];
3137};
3138
3139enum {
3140 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3141 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3142 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3143};
3144
3145struct mlx5_ifc_tsar_element_bits {
3146 u8 reserved_at_0[0x8];
3147 u8 tsar_type[0x8];
3148 u8 reserved_at_10[0x10];
3149};
3150
Majd Dibbiny8812c242017-02-09 14:20:12 +02003151enum {
3152 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3153 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3154};
3155
Saeed Mahameede2816822015-05-28 22:28:40 +03003156struct mlx5_ifc_teardown_hca_out_bits {
3157 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003158 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003159
3160 u8 syndrome[0x20];
3161
Majd Dibbiny8812c242017-02-09 14:20:12 +02003162 u8 reserved_at_40[0x3f];
3163
3164 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003165};
3166
3167enum {
3168 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003169 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003170};
3171
3172struct mlx5_ifc_teardown_hca_in_bits {
3173 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003174 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003175
Matan Barakb4ff3a32016-02-09 14:57:42 +02003176 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003177 u8 op_mod[0x10];
3178
Matan Barakb4ff3a32016-02-09 14:57:42 +02003179 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003180 u8 profile[0x10];
3181
Matan Barakb4ff3a32016-02-09 14:57:42 +02003182 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003183};
3184
3185struct mlx5_ifc_sqerr2rts_qp_out_bits {
3186 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003187 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003188
3189 u8 syndrome[0x20];
3190
Matan Barakb4ff3a32016-02-09 14:57:42 +02003191 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003192};
3193
3194struct mlx5_ifc_sqerr2rts_qp_in_bits {
3195 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003196 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003197
Matan Barakb4ff3a32016-02-09 14:57:42 +02003198 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003199 u8 op_mod[0x10];
3200
Matan Barakb4ff3a32016-02-09 14:57:42 +02003201 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003202 u8 qpn[0x18];
3203
Matan Barakb4ff3a32016-02-09 14:57:42 +02003204 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003205
3206 u8 opt_param_mask[0x20];
3207
Matan Barakb4ff3a32016-02-09 14:57:42 +02003208 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003209
3210 struct mlx5_ifc_qpc_bits qpc;
3211
Matan Barakb4ff3a32016-02-09 14:57:42 +02003212 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003213};
3214
3215struct mlx5_ifc_sqd2rts_qp_out_bits {
3216 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003217 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003218
3219 u8 syndrome[0x20];
3220
Matan Barakb4ff3a32016-02-09 14:57:42 +02003221 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003222};
3223
3224struct mlx5_ifc_sqd2rts_qp_in_bits {
3225 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003226 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003227
Matan Barakb4ff3a32016-02-09 14:57:42 +02003228 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003229 u8 op_mod[0x10];
3230
Matan Barakb4ff3a32016-02-09 14:57:42 +02003231 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003232 u8 qpn[0x18];
3233
Matan Barakb4ff3a32016-02-09 14:57:42 +02003234 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003235
3236 u8 opt_param_mask[0x20];
3237
Matan Barakb4ff3a32016-02-09 14:57:42 +02003238 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003239
3240 struct mlx5_ifc_qpc_bits qpc;
3241
Matan Barakb4ff3a32016-02-09 14:57:42 +02003242 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003243};
3244
3245struct mlx5_ifc_set_roce_address_out_bits {
3246 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003247 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003248
3249 u8 syndrome[0x20];
3250
Matan Barakb4ff3a32016-02-09 14:57:42 +02003251 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003252};
3253
3254struct mlx5_ifc_set_roce_address_in_bits {
3255 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003256 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003257
Matan Barakb4ff3a32016-02-09 14:57:42 +02003258 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003259 u8 op_mod[0x10];
3260
3261 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003262 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003263
Matan Barakb4ff3a32016-02-09 14:57:42 +02003264 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003265
3266 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3267};
3268
3269struct mlx5_ifc_set_mad_demux_out_bits {
3270 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003271 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003272
3273 u8 syndrome[0x20];
3274
Matan Barakb4ff3a32016-02-09 14:57:42 +02003275 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003276};
3277
3278enum {
3279 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3280 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3281};
3282
3283struct mlx5_ifc_set_mad_demux_in_bits {
3284 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003285 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003286
Matan Barakb4ff3a32016-02-09 14:57:42 +02003287 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003288 u8 op_mod[0x10];
3289
Matan Barakb4ff3a32016-02-09 14:57:42 +02003290 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003291
Matan Barakb4ff3a32016-02-09 14:57:42 +02003292 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003293 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003294 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003295};
3296
3297struct mlx5_ifc_set_l2_table_entry_out_bits {
3298 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003299 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003300
3301 u8 syndrome[0x20];
3302
Matan Barakb4ff3a32016-02-09 14:57:42 +02003303 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003304};
3305
3306struct mlx5_ifc_set_l2_table_entry_in_bits {
3307 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003308 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003309
Matan Barakb4ff3a32016-02-09 14:57:42 +02003310 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003311 u8 op_mod[0x10];
3312
Matan Barakb4ff3a32016-02-09 14:57:42 +02003313 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003314
Matan Barakb4ff3a32016-02-09 14:57:42 +02003315 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003316 u8 table_index[0x18];
3317
Matan Barakb4ff3a32016-02-09 14:57:42 +02003318 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003319
Matan Barakb4ff3a32016-02-09 14:57:42 +02003320 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003321 u8 vlan_valid[0x1];
3322 u8 vlan[0xc];
3323
3324 struct mlx5_ifc_mac_address_layout_bits mac_address;
3325
Matan Barakb4ff3a32016-02-09 14:57:42 +02003326 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003327};
3328
3329struct mlx5_ifc_set_issi_out_bits {
3330 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003331 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003332
3333 u8 syndrome[0x20];
3334
Matan Barakb4ff3a32016-02-09 14:57:42 +02003335 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003336};
3337
3338struct mlx5_ifc_set_issi_in_bits {
3339 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003340 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003341
Matan Barakb4ff3a32016-02-09 14:57:42 +02003342 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003343 u8 op_mod[0x10];
3344
Matan Barakb4ff3a32016-02-09 14:57:42 +02003345 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003346 u8 current_issi[0x10];
3347
Matan Barakb4ff3a32016-02-09 14:57:42 +02003348 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003349};
3350
3351struct mlx5_ifc_set_hca_cap_out_bits {
3352 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003353 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003354
3355 u8 syndrome[0x20];
3356
Matan Barakb4ff3a32016-02-09 14:57:42 +02003357 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003358};
3359
3360struct mlx5_ifc_set_hca_cap_in_bits {
3361 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003362 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003363
Matan Barakb4ff3a32016-02-09 14:57:42 +02003364 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003365 u8 op_mod[0x10];
3366
Matan Barakb4ff3a32016-02-09 14:57:42 +02003367 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003368
Saeed Mahameede2816822015-05-28 22:28:40 +03003369 union mlx5_ifc_hca_cap_union_bits capability;
3370};
3371
Maor Gottlieb26a81452015-12-10 17:12:39 +02003372enum {
3373 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3374 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3375 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3376 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3377};
3378
Saeed Mahameede2816822015-05-28 22:28:40 +03003379struct mlx5_ifc_set_fte_out_bits {
3380 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003381 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003382
3383 u8 syndrome[0x20];
3384
Matan Barakb4ff3a32016-02-09 14:57:42 +02003385 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003386};
3387
3388struct mlx5_ifc_set_fte_in_bits {
3389 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003390 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003391
Matan Barakb4ff3a32016-02-09 14:57:42 +02003392 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003393 u8 op_mod[0x10];
3394
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003395 u8 other_vport[0x1];
3396 u8 reserved_at_41[0xf];
3397 u8 vport_number[0x10];
3398
3399 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003400
3401 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003402 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003403
Matan Barakb4ff3a32016-02-09 14:57:42 +02003404 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003405 u8 table_id[0x18];
3406
Matan Barakb4ff3a32016-02-09 14:57:42 +02003407 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003408 u8 modify_enable_mask[0x8];
3409
Matan Barakb4ff3a32016-02-09 14:57:42 +02003410 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003411
3412 u8 flow_index[0x20];
3413
Matan Barakb4ff3a32016-02-09 14:57:42 +02003414 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003415
3416 struct mlx5_ifc_flow_context_bits flow_context;
3417};
3418
3419struct mlx5_ifc_rts2rts_qp_out_bits {
3420 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003421 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003422
3423 u8 syndrome[0x20];
3424
Matan Barakb4ff3a32016-02-09 14:57:42 +02003425 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003426};
3427
3428struct mlx5_ifc_rts2rts_qp_in_bits {
3429 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003430 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003431
Matan Barakb4ff3a32016-02-09 14:57:42 +02003432 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003433 u8 op_mod[0x10];
3434
Matan Barakb4ff3a32016-02-09 14:57:42 +02003435 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003436 u8 qpn[0x18];
3437
Matan Barakb4ff3a32016-02-09 14:57:42 +02003438 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003439
3440 u8 opt_param_mask[0x20];
3441
Matan Barakb4ff3a32016-02-09 14:57:42 +02003442 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003443
3444 struct mlx5_ifc_qpc_bits qpc;
3445
Matan Barakb4ff3a32016-02-09 14:57:42 +02003446 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003447};
3448
3449struct mlx5_ifc_rtr2rts_qp_out_bits {
3450 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003451 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003452
3453 u8 syndrome[0x20];
3454
Matan Barakb4ff3a32016-02-09 14:57:42 +02003455 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003456};
3457
3458struct mlx5_ifc_rtr2rts_qp_in_bits {
3459 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003460 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003461
Matan Barakb4ff3a32016-02-09 14:57:42 +02003462 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003463 u8 op_mod[0x10];
3464
Matan Barakb4ff3a32016-02-09 14:57:42 +02003465 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003466 u8 qpn[0x18];
3467
Matan Barakb4ff3a32016-02-09 14:57:42 +02003468 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003469
3470 u8 opt_param_mask[0x20];
3471
Matan Barakb4ff3a32016-02-09 14:57:42 +02003472 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003473
3474 struct mlx5_ifc_qpc_bits qpc;
3475
Matan Barakb4ff3a32016-02-09 14:57:42 +02003476 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003477};
3478
3479struct mlx5_ifc_rst2init_qp_out_bits {
3480 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003481 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003482
3483 u8 syndrome[0x20];
3484
Matan Barakb4ff3a32016-02-09 14:57:42 +02003485 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003486};
3487
3488struct mlx5_ifc_rst2init_qp_in_bits {
3489 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003490 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003491
Matan Barakb4ff3a32016-02-09 14:57:42 +02003492 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003493 u8 op_mod[0x10];
3494
Matan Barakb4ff3a32016-02-09 14:57:42 +02003495 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003496 u8 qpn[0x18];
3497
Matan Barakb4ff3a32016-02-09 14:57:42 +02003498 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003499
3500 u8 opt_param_mask[0x20];
3501
Matan Barakb4ff3a32016-02-09 14:57:42 +02003502 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003503
3504 struct mlx5_ifc_qpc_bits qpc;
3505
Matan Barakb4ff3a32016-02-09 14:57:42 +02003506 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003507};
3508
Saeed Mahameed74862162016-06-09 15:11:34 +03003509struct mlx5_ifc_query_xrq_out_bits {
3510 u8 status[0x8];
3511 u8 reserved_at_8[0x18];
3512
3513 u8 syndrome[0x20];
3514
3515 u8 reserved_at_40[0x40];
3516
3517 struct mlx5_ifc_xrqc_bits xrq_context;
3518};
3519
3520struct mlx5_ifc_query_xrq_in_bits {
3521 u8 opcode[0x10];
3522 u8 reserved_at_10[0x10];
3523
3524 u8 reserved_at_20[0x10];
3525 u8 op_mod[0x10];
3526
3527 u8 reserved_at_40[0x8];
3528 u8 xrqn[0x18];
3529
3530 u8 reserved_at_60[0x20];
3531};
3532
Saeed Mahameede2816822015-05-28 22:28:40 +03003533struct mlx5_ifc_query_xrc_srq_out_bits {
3534 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003535 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003536
3537 u8 syndrome[0x20];
3538
Matan Barakb4ff3a32016-02-09 14:57:42 +02003539 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003540
3541 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3542
Matan Barakb4ff3a32016-02-09 14:57:42 +02003543 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003544
3545 u8 pas[0][0x40];
3546};
3547
3548struct mlx5_ifc_query_xrc_srq_in_bits {
3549 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003550 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003551
Matan Barakb4ff3a32016-02-09 14:57:42 +02003552 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003553 u8 op_mod[0x10];
3554
Matan Barakb4ff3a32016-02-09 14:57:42 +02003555 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003556 u8 xrc_srqn[0x18];
3557
Matan Barakb4ff3a32016-02-09 14:57:42 +02003558 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003559};
3560
3561enum {
3562 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3563 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3564};
3565
3566struct mlx5_ifc_query_vport_state_out_bits {
3567 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003568 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003569
3570 u8 syndrome[0x20];
3571
Matan Barakb4ff3a32016-02-09 14:57:42 +02003572 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003573
Matan Barakb4ff3a32016-02-09 14:57:42 +02003574 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003575 u8 admin_state[0x4];
3576 u8 state[0x4];
3577};
3578
3579enum {
3580 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003581 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003582};
3583
3584struct mlx5_ifc_query_vport_state_in_bits {
3585 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003586 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003587
Matan Barakb4ff3a32016-02-09 14:57:42 +02003588 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003589 u8 op_mod[0x10];
3590
3591 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003592 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003593 u8 vport_number[0x10];
3594
Matan Barakb4ff3a32016-02-09 14:57:42 +02003595 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003596};
3597
3598struct mlx5_ifc_query_vport_counter_out_bits {
3599 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003600 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003601
3602 u8 syndrome[0x20];
3603
Matan Barakb4ff3a32016-02-09 14:57:42 +02003604 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003605
3606 struct mlx5_ifc_traffic_counter_bits received_errors;
3607
3608 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3609
3610 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3611
3612 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3613
3614 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3615
3616 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3617
3618 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3619
3620 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3621
3622 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3623
3624 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3625
3626 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3627
3628 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3629
Matan Barakb4ff3a32016-02-09 14:57:42 +02003630 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003631};
3632
3633enum {
3634 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3635};
3636
3637struct mlx5_ifc_query_vport_counter_in_bits {
3638 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003639 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003640
Matan Barakb4ff3a32016-02-09 14:57:42 +02003641 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003642 u8 op_mod[0x10];
3643
3644 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003645 u8 reserved_at_41[0xb];
3646 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003647 u8 vport_number[0x10];
3648
Matan Barakb4ff3a32016-02-09 14:57:42 +02003649 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003650
3651 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003652 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003653
Matan Barakb4ff3a32016-02-09 14:57:42 +02003654 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003655};
3656
3657struct mlx5_ifc_query_tis_out_bits {
3658 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003659 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003660
3661 u8 syndrome[0x20];
3662
Matan Barakb4ff3a32016-02-09 14:57:42 +02003663 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003664
3665 struct mlx5_ifc_tisc_bits tis_context;
3666};
3667
3668struct mlx5_ifc_query_tis_in_bits {
3669 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003670 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003671
Matan Barakb4ff3a32016-02-09 14:57:42 +02003672 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003673 u8 op_mod[0x10];
3674
Matan Barakb4ff3a32016-02-09 14:57:42 +02003675 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003676 u8 tisn[0x18];
3677
Matan Barakb4ff3a32016-02-09 14:57:42 +02003678 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003679};
3680
3681struct mlx5_ifc_query_tir_out_bits {
3682 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003683 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003684
3685 u8 syndrome[0x20];
3686
Matan Barakb4ff3a32016-02-09 14:57:42 +02003687 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003688
3689 struct mlx5_ifc_tirc_bits tir_context;
3690};
3691
3692struct mlx5_ifc_query_tir_in_bits {
3693 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003694 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003695
Matan Barakb4ff3a32016-02-09 14:57:42 +02003696 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003697 u8 op_mod[0x10];
3698
Matan Barakb4ff3a32016-02-09 14:57:42 +02003699 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003700 u8 tirn[0x18];
3701
Matan Barakb4ff3a32016-02-09 14:57:42 +02003702 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003703};
3704
3705struct mlx5_ifc_query_srq_out_bits {
3706 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003707 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003708
3709 u8 syndrome[0x20];
3710
Matan Barakb4ff3a32016-02-09 14:57:42 +02003711 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003712
3713 struct mlx5_ifc_srqc_bits srq_context_entry;
3714
Matan Barakb4ff3a32016-02-09 14:57:42 +02003715 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003716
3717 u8 pas[0][0x40];
3718};
3719
3720struct mlx5_ifc_query_srq_in_bits {
3721 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003722 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003723
Matan Barakb4ff3a32016-02-09 14:57:42 +02003724 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003725 u8 op_mod[0x10];
3726
Matan Barakb4ff3a32016-02-09 14:57:42 +02003727 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003728 u8 srqn[0x18];
3729
Matan Barakb4ff3a32016-02-09 14:57:42 +02003730 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003731};
3732
3733struct mlx5_ifc_query_sq_out_bits {
3734 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003735 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003736
3737 u8 syndrome[0x20];
3738
Matan Barakb4ff3a32016-02-09 14:57:42 +02003739 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003740
3741 struct mlx5_ifc_sqc_bits sq_context;
3742};
3743
3744struct mlx5_ifc_query_sq_in_bits {
3745 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003746 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003747
Matan Barakb4ff3a32016-02-09 14:57:42 +02003748 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003749 u8 op_mod[0x10];
3750
Matan Barakb4ff3a32016-02-09 14:57:42 +02003751 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003752 u8 sqn[0x18];
3753
Matan Barakb4ff3a32016-02-09 14:57:42 +02003754 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003755};
3756
3757struct mlx5_ifc_query_special_contexts_out_bits {
3758 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003759 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003760
3761 u8 syndrome[0x20];
3762
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003763 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003764
3765 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003766
3767 u8 null_mkey[0x20];
3768
3769 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003770};
3771
3772struct mlx5_ifc_query_special_contexts_in_bits {
3773 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003774 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003775
Matan Barakb4ff3a32016-02-09 14:57:42 +02003776 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003777 u8 op_mod[0x10];
3778
Matan Barakb4ff3a32016-02-09 14:57:42 +02003779 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003780};
3781
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003782struct mlx5_ifc_query_scheduling_element_out_bits {
3783 u8 opcode[0x10];
3784 u8 reserved_at_10[0x10];
3785
3786 u8 reserved_at_20[0x10];
3787 u8 op_mod[0x10];
3788
3789 u8 reserved_at_40[0xc0];
3790
3791 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3792
3793 u8 reserved_at_300[0x100];
3794};
3795
3796enum {
3797 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3798};
3799
3800struct mlx5_ifc_query_scheduling_element_in_bits {
3801 u8 opcode[0x10];
3802 u8 reserved_at_10[0x10];
3803
3804 u8 reserved_at_20[0x10];
3805 u8 op_mod[0x10];
3806
3807 u8 scheduling_hierarchy[0x8];
3808 u8 reserved_at_48[0x18];
3809
3810 u8 scheduling_element_id[0x20];
3811
3812 u8 reserved_at_80[0x180];
3813};
3814
Saeed Mahameede2816822015-05-28 22:28:40 +03003815struct mlx5_ifc_query_rqt_out_bits {
3816 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003817 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003818
3819 u8 syndrome[0x20];
3820
Matan Barakb4ff3a32016-02-09 14:57:42 +02003821 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003822
3823 struct mlx5_ifc_rqtc_bits rqt_context;
3824};
3825
3826struct mlx5_ifc_query_rqt_in_bits {
3827 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003828 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003829
Matan Barakb4ff3a32016-02-09 14:57:42 +02003830 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003831 u8 op_mod[0x10];
3832
Matan Barakb4ff3a32016-02-09 14:57:42 +02003833 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003834 u8 rqtn[0x18];
3835
Matan Barakb4ff3a32016-02-09 14:57:42 +02003836 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003837};
3838
3839struct mlx5_ifc_query_rq_out_bits {
3840 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003841 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003842
3843 u8 syndrome[0x20];
3844
Matan Barakb4ff3a32016-02-09 14:57:42 +02003845 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003846
3847 struct mlx5_ifc_rqc_bits rq_context;
3848};
3849
3850struct mlx5_ifc_query_rq_in_bits {
3851 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003852 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003853
Matan Barakb4ff3a32016-02-09 14:57:42 +02003854 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003855 u8 op_mod[0x10];
3856
Matan Barakb4ff3a32016-02-09 14:57:42 +02003857 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003858 u8 rqn[0x18];
3859
Matan Barakb4ff3a32016-02-09 14:57:42 +02003860 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003861};
3862
3863struct mlx5_ifc_query_roce_address_out_bits {
3864 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003865 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003866
3867 u8 syndrome[0x20];
3868
Matan Barakb4ff3a32016-02-09 14:57:42 +02003869 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003870
3871 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3872};
3873
3874struct mlx5_ifc_query_roce_address_in_bits {
3875 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003876 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003877
Matan Barakb4ff3a32016-02-09 14:57:42 +02003878 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003879 u8 op_mod[0x10];
3880
3881 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003882 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003883
Matan Barakb4ff3a32016-02-09 14:57:42 +02003884 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003885};
3886
3887struct mlx5_ifc_query_rmp_out_bits {
3888 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003889 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003890
3891 u8 syndrome[0x20];
3892
Matan Barakb4ff3a32016-02-09 14:57:42 +02003893 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003894
3895 struct mlx5_ifc_rmpc_bits rmp_context;
3896};
3897
3898struct mlx5_ifc_query_rmp_in_bits {
3899 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003900 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003901
Matan Barakb4ff3a32016-02-09 14:57:42 +02003902 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003903 u8 op_mod[0x10];
3904
Matan Barakb4ff3a32016-02-09 14:57:42 +02003905 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003906 u8 rmpn[0x18];
3907
Matan Barakb4ff3a32016-02-09 14:57:42 +02003908 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003909};
3910
3911struct mlx5_ifc_query_qp_out_bits {
3912 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003913 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003914
3915 u8 syndrome[0x20];
3916
Matan Barakb4ff3a32016-02-09 14:57:42 +02003917 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003918
3919 u8 opt_param_mask[0x20];
3920
Matan Barakb4ff3a32016-02-09 14:57:42 +02003921 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003922
3923 struct mlx5_ifc_qpc_bits qpc;
3924
Matan Barakb4ff3a32016-02-09 14:57:42 +02003925 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003926
3927 u8 pas[0][0x40];
3928};
3929
3930struct mlx5_ifc_query_qp_in_bits {
3931 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003932 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003933
Matan Barakb4ff3a32016-02-09 14:57:42 +02003934 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003935 u8 op_mod[0x10];
3936
Matan Barakb4ff3a32016-02-09 14:57:42 +02003937 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003938 u8 qpn[0x18];
3939
Matan Barakb4ff3a32016-02-09 14:57:42 +02003940 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003941};
3942
3943struct mlx5_ifc_query_q_counter_out_bits {
3944 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003945 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003946
3947 u8 syndrome[0x20];
3948
Matan Barakb4ff3a32016-02-09 14:57:42 +02003949 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003950
3951 u8 rx_write_requests[0x20];
3952
Matan Barakb4ff3a32016-02-09 14:57:42 +02003953 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003954
3955 u8 rx_read_requests[0x20];
3956
Matan Barakb4ff3a32016-02-09 14:57:42 +02003957 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003958
3959 u8 rx_atomic_requests[0x20];
3960
Matan Barakb4ff3a32016-02-09 14:57:42 +02003961 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003962
3963 u8 rx_dct_connect[0x20];
3964
Matan Barakb4ff3a32016-02-09 14:57:42 +02003965 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003966
3967 u8 out_of_buffer[0x20];
3968
Matan Barakb4ff3a32016-02-09 14:57:42 +02003969 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003970
3971 u8 out_of_sequence[0x20];
3972
Saeed Mahameed74862162016-06-09 15:11:34 +03003973 u8 reserved_at_1e0[0x20];
3974
3975 u8 duplicate_request[0x20];
3976
3977 u8 reserved_at_220[0x20];
3978
3979 u8 rnr_nak_retry_err[0x20];
3980
3981 u8 reserved_at_260[0x20];
3982
3983 u8 packet_seq_err[0x20];
3984
3985 u8 reserved_at_2a0[0x20];
3986
3987 u8 implied_nak_seq_err[0x20];
3988
3989 u8 reserved_at_2e0[0x20];
3990
3991 u8 local_ack_timeout_err[0x20];
3992
Parav Pandit58dcb602017-06-19 07:19:37 +03003993 u8 reserved_at_320[0xa0];
3994
3995 u8 resp_local_length_error[0x20];
3996
3997 u8 req_local_length_error[0x20];
3998
3999 u8 resp_local_qp_error[0x20];
4000
4001 u8 local_operation_error[0x20];
4002
4003 u8 resp_local_protection[0x20];
4004
4005 u8 req_local_protection[0x20];
4006
4007 u8 resp_cqe_error[0x20];
4008
4009 u8 req_cqe_error[0x20];
4010
4011 u8 req_mw_binding[0x20];
4012
4013 u8 req_bad_response[0x20];
4014
4015 u8 req_remote_invalid_request[0x20];
4016
4017 u8 resp_remote_invalid_request[0x20];
4018
4019 u8 req_remote_access_errors[0x20];
4020
4021 u8 resp_remote_access_errors[0x20];
4022
4023 u8 req_remote_operation_errors[0x20];
4024
4025 u8 req_transport_retries_exceeded[0x20];
4026
4027 u8 cq_overflow[0x20];
4028
4029 u8 resp_cqe_flush_error[0x20];
4030
4031 u8 req_cqe_flush_error[0x20];
4032
4033 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004034};
4035
4036struct mlx5_ifc_query_q_counter_in_bits {
4037 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004038 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004039
Matan Barakb4ff3a32016-02-09 14:57:42 +02004040 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004041 u8 op_mod[0x10];
4042
Matan Barakb4ff3a32016-02-09 14:57:42 +02004043 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004044
4045 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004046 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004047
Matan Barakb4ff3a32016-02-09 14:57:42 +02004048 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004049 u8 counter_set_id[0x8];
4050};
4051
4052struct mlx5_ifc_query_pages_out_bits {
4053 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004054 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004055
4056 u8 syndrome[0x20];
4057
Matan Barakb4ff3a32016-02-09 14:57:42 +02004058 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004059 u8 function_id[0x10];
4060
4061 u8 num_pages[0x20];
4062};
4063
4064enum {
4065 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4066 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4067 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4068};
4069
4070struct mlx5_ifc_query_pages_in_bits {
4071 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004072 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004073
Matan Barakb4ff3a32016-02-09 14:57:42 +02004074 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004075 u8 op_mod[0x10];
4076
Matan Barakb4ff3a32016-02-09 14:57:42 +02004077 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004078 u8 function_id[0x10];
4079
Matan Barakb4ff3a32016-02-09 14:57:42 +02004080 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004081};
4082
4083struct mlx5_ifc_query_nic_vport_context_out_bits {
4084 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004085 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004086
4087 u8 syndrome[0x20];
4088
Matan Barakb4ff3a32016-02-09 14:57:42 +02004089 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004090
4091 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4092};
4093
4094struct mlx5_ifc_query_nic_vport_context_in_bits {
4095 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004096 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004097
Matan Barakb4ff3a32016-02-09 14:57:42 +02004098 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004099 u8 op_mod[0x10];
4100
4101 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004102 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004103 u8 vport_number[0x10];
4104
Matan Barakb4ff3a32016-02-09 14:57:42 +02004105 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004106 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004107 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004108};
4109
4110struct mlx5_ifc_query_mkey_out_bits {
4111 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004112 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004113
4114 u8 syndrome[0x20];
4115
Matan Barakb4ff3a32016-02-09 14:57:42 +02004116 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004117
4118 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4119
Matan Barakb4ff3a32016-02-09 14:57:42 +02004120 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004121
4122 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4123
4124 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4125};
4126
4127struct mlx5_ifc_query_mkey_in_bits {
4128 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004129 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004130
Matan Barakb4ff3a32016-02-09 14:57:42 +02004131 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004132 u8 op_mod[0x10];
4133
Matan Barakb4ff3a32016-02-09 14:57:42 +02004134 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004135 u8 mkey_index[0x18];
4136
4137 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004138 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004139};
4140
4141struct mlx5_ifc_query_mad_demux_out_bits {
4142 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004143 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004144
4145 u8 syndrome[0x20];
4146
Matan Barakb4ff3a32016-02-09 14:57:42 +02004147 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004148
4149 u8 mad_dumux_parameters_block[0x20];
4150};
4151
4152struct mlx5_ifc_query_mad_demux_in_bits {
4153 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004154 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004155
Matan Barakb4ff3a32016-02-09 14:57:42 +02004156 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004157 u8 op_mod[0x10];
4158
Matan Barakb4ff3a32016-02-09 14:57:42 +02004159 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004160};
4161
4162struct mlx5_ifc_query_l2_table_entry_out_bits {
4163 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004164 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004165
4166 u8 syndrome[0x20];
4167
Matan Barakb4ff3a32016-02-09 14:57:42 +02004168 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004169
Matan Barakb4ff3a32016-02-09 14:57:42 +02004170 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004171 u8 vlan_valid[0x1];
4172 u8 vlan[0xc];
4173
4174 struct mlx5_ifc_mac_address_layout_bits mac_address;
4175
Matan Barakb4ff3a32016-02-09 14:57:42 +02004176 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004177};
4178
4179struct mlx5_ifc_query_l2_table_entry_in_bits {
4180 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004181 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004182
Matan Barakb4ff3a32016-02-09 14:57:42 +02004183 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004184 u8 op_mod[0x10];
4185
Matan Barakb4ff3a32016-02-09 14:57:42 +02004186 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004187
Matan Barakb4ff3a32016-02-09 14:57:42 +02004188 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004189 u8 table_index[0x18];
4190
Matan Barakb4ff3a32016-02-09 14:57:42 +02004191 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004192};
4193
4194struct mlx5_ifc_query_issi_out_bits {
4195 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004196 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004197
4198 u8 syndrome[0x20];
4199
Matan Barakb4ff3a32016-02-09 14:57:42 +02004200 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004201 u8 current_issi[0x10];
4202
Matan Barakb4ff3a32016-02-09 14:57:42 +02004203 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004204
Matan Barakb4ff3a32016-02-09 14:57:42 +02004205 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004206 u8 supported_issi_dw0[0x20];
4207};
4208
4209struct mlx5_ifc_query_issi_in_bits {
4210 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004211 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004212
Matan Barakb4ff3a32016-02-09 14:57:42 +02004213 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004214 u8 op_mod[0x10];
4215
Matan Barakb4ff3a32016-02-09 14:57:42 +02004216 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004217};
4218
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004219struct mlx5_ifc_set_driver_version_out_bits {
4220 u8 status[0x8];
4221 u8 reserved_0[0x18];
4222
4223 u8 syndrome[0x20];
4224 u8 reserved_1[0x40];
4225};
4226
4227struct mlx5_ifc_set_driver_version_in_bits {
4228 u8 opcode[0x10];
4229 u8 reserved_0[0x10];
4230
4231 u8 reserved_1[0x10];
4232 u8 op_mod[0x10];
4233
4234 u8 reserved_2[0x40];
4235 u8 driver_version[64][0x8];
4236};
4237
Saeed Mahameede2816822015-05-28 22:28:40 +03004238struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4239 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004240 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004241
4242 u8 syndrome[0x20];
4243
Matan Barakb4ff3a32016-02-09 14:57:42 +02004244 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004245
4246 struct mlx5_ifc_pkey_bits pkey[0];
4247};
4248
4249struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4250 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004251 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004252
Matan Barakb4ff3a32016-02-09 14:57:42 +02004253 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004254 u8 op_mod[0x10];
4255
4256 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004257 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004258 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004259 u8 vport_number[0x10];
4260
Matan Barakb4ff3a32016-02-09 14:57:42 +02004261 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004262 u8 pkey_index[0x10];
4263};
4264
Eli Coheneff901d2016-03-11 22:58:42 +02004265enum {
4266 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4267 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4268 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4269};
4270
Saeed Mahameede2816822015-05-28 22:28:40 +03004271struct mlx5_ifc_query_hca_vport_gid_out_bits {
4272 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004273 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004274
4275 u8 syndrome[0x20];
4276
Matan Barakb4ff3a32016-02-09 14:57:42 +02004277 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004278
4279 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004280 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004281
4282 struct mlx5_ifc_array128_auto_bits gid[0];
4283};
4284
4285struct mlx5_ifc_query_hca_vport_gid_in_bits {
4286 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004287 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004288
Matan Barakb4ff3a32016-02-09 14:57:42 +02004289 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004290 u8 op_mod[0x10];
4291
4292 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004293 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004294 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004295 u8 vport_number[0x10];
4296
Matan Barakb4ff3a32016-02-09 14:57:42 +02004297 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004298 u8 gid_index[0x10];
4299};
4300
4301struct mlx5_ifc_query_hca_vport_context_out_bits {
4302 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004303 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004304
4305 u8 syndrome[0x20];
4306
Matan Barakb4ff3a32016-02-09 14:57:42 +02004307 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004308
4309 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4310};
4311
4312struct mlx5_ifc_query_hca_vport_context_in_bits {
4313 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004314 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004315
Matan Barakb4ff3a32016-02-09 14:57:42 +02004316 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004317 u8 op_mod[0x10];
4318
4319 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004320 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004321 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004322 u8 vport_number[0x10];
4323
Matan Barakb4ff3a32016-02-09 14:57:42 +02004324 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004325};
4326
4327struct mlx5_ifc_query_hca_cap_out_bits {
4328 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004329 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004330
4331 u8 syndrome[0x20];
4332
Matan Barakb4ff3a32016-02-09 14:57:42 +02004333 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004334
4335 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004336};
4337
4338struct mlx5_ifc_query_hca_cap_in_bits {
4339 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004340 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004341
Matan Barakb4ff3a32016-02-09 14:57:42 +02004342 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004343 u8 op_mod[0x10];
4344
Matan Barakb4ff3a32016-02-09 14:57:42 +02004345 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004346};
4347
Saeed Mahameede2816822015-05-28 22:28:40 +03004348struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004349 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004350 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004351
4352 u8 syndrome[0x20];
4353
Matan Barakb4ff3a32016-02-09 14:57:42 +02004354 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004355
Matan Barakb4ff3a32016-02-09 14:57:42 +02004356 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004357 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004358 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004359 u8 log_size[0x8];
4360
Matan Barakb4ff3a32016-02-09 14:57:42 +02004361 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004362};
4363
Saeed Mahameede2816822015-05-28 22:28:40 +03004364struct mlx5_ifc_query_flow_table_in_bits {
4365 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004366 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004367
Matan Barakb4ff3a32016-02-09 14:57:42 +02004368 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004369 u8 op_mod[0x10];
4370
Matan Barakb4ff3a32016-02-09 14:57:42 +02004371 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004372
4373 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004374 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004375
Matan Barakb4ff3a32016-02-09 14:57:42 +02004376 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004377 u8 table_id[0x18];
4378
Matan Barakb4ff3a32016-02-09 14:57:42 +02004379 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004380};
4381
4382struct mlx5_ifc_query_fte_out_bits {
4383 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004384 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004385
4386 u8 syndrome[0x20];
4387
Matan Barakb4ff3a32016-02-09 14:57:42 +02004388 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004389
4390 struct mlx5_ifc_flow_context_bits flow_context;
4391};
4392
4393struct mlx5_ifc_query_fte_in_bits {
4394 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004395 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004396
Matan Barakb4ff3a32016-02-09 14:57:42 +02004397 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004398 u8 op_mod[0x10];
4399
Matan Barakb4ff3a32016-02-09 14:57:42 +02004400 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004401
4402 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004403 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004404
Matan Barakb4ff3a32016-02-09 14:57:42 +02004405 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004406 u8 table_id[0x18];
4407
Matan Barakb4ff3a32016-02-09 14:57:42 +02004408 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004409
4410 u8 flow_index[0x20];
4411
Matan Barakb4ff3a32016-02-09 14:57:42 +02004412 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004413};
4414
4415enum {
4416 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4417 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4418 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4419};
4420
4421struct mlx5_ifc_query_flow_group_out_bits {
4422 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004423 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004424
4425 u8 syndrome[0x20];
4426
Matan Barakb4ff3a32016-02-09 14:57:42 +02004427 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004428
4429 u8 start_flow_index[0x20];
4430
Matan Barakb4ff3a32016-02-09 14:57:42 +02004431 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004432
4433 u8 end_flow_index[0x20];
4434
Matan Barakb4ff3a32016-02-09 14:57:42 +02004435 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004436
Matan Barakb4ff3a32016-02-09 14:57:42 +02004437 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004438 u8 match_criteria_enable[0x8];
4439
4440 struct mlx5_ifc_fte_match_param_bits match_criteria;
4441
Matan Barakb4ff3a32016-02-09 14:57:42 +02004442 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004443};
4444
4445struct mlx5_ifc_query_flow_group_in_bits {
4446 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004447 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004448
Matan Barakb4ff3a32016-02-09 14:57:42 +02004449 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004450 u8 op_mod[0x10];
4451
Matan Barakb4ff3a32016-02-09 14:57:42 +02004452 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004453
4454 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004455 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004456
Matan Barakb4ff3a32016-02-09 14:57:42 +02004457 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004458 u8 table_id[0x18];
4459
4460 u8 group_id[0x20];
4461
Matan Barakb4ff3a32016-02-09 14:57:42 +02004462 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004463};
4464
Amir Vadai9dc0b282016-05-13 12:55:39 +00004465struct mlx5_ifc_query_flow_counter_out_bits {
4466 u8 status[0x8];
4467 u8 reserved_at_8[0x18];
4468
4469 u8 syndrome[0x20];
4470
4471 u8 reserved_at_40[0x40];
4472
4473 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4474};
4475
4476struct mlx5_ifc_query_flow_counter_in_bits {
4477 u8 opcode[0x10];
4478 u8 reserved_at_10[0x10];
4479
4480 u8 reserved_at_20[0x10];
4481 u8 op_mod[0x10];
4482
4483 u8 reserved_at_40[0x80];
4484
4485 u8 clear[0x1];
4486 u8 reserved_at_c1[0xf];
4487 u8 num_of_counters[0x10];
4488
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004489 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004490};
4491
Saeed Mahameedd6666752015-12-01 18:03:22 +02004492struct mlx5_ifc_query_esw_vport_context_out_bits {
4493 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004494 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004495
4496 u8 syndrome[0x20];
4497
Matan Barakb4ff3a32016-02-09 14:57:42 +02004498 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004499
4500 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4501};
4502
4503struct mlx5_ifc_query_esw_vport_context_in_bits {
4504 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004505 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004506
Matan Barakb4ff3a32016-02-09 14:57:42 +02004507 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004508 u8 op_mod[0x10];
4509
4510 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004511 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004512 u8 vport_number[0x10];
4513
Matan Barakb4ff3a32016-02-09 14:57:42 +02004514 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004515};
4516
4517struct mlx5_ifc_modify_esw_vport_context_out_bits {
4518 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004519 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004520
4521 u8 syndrome[0x20];
4522
Matan Barakb4ff3a32016-02-09 14:57:42 +02004523 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004524};
4525
4526struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004527 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004528 u8 vport_cvlan_insert[0x1];
4529 u8 vport_svlan_insert[0x1];
4530 u8 vport_cvlan_strip[0x1];
4531 u8 vport_svlan_strip[0x1];
4532};
4533
4534struct mlx5_ifc_modify_esw_vport_context_in_bits {
4535 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004536 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004537
Matan Barakb4ff3a32016-02-09 14:57:42 +02004538 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004539 u8 op_mod[0x10];
4540
4541 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004542 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004543 u8 vport_number[0x10];
4544
4545 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4546
4547 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4548};
4549
Saeed Mahameede2816822015-05-28 22:28:40 +03004550struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004551 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004552 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004553
4554 u8 syndrome[0x20];
4555
Matan Barakb4ff3a32016-02-09 14:57:42 +02004556 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004557
4558 struct mlx5_ifc_eqc_bits eq_context_entry;
4559
Matan Barakb4ff3a32016-02-09 14:57:42 +02004560 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004561
4562 u8 event_bitmask[0x40];
4563
Matan Barakb4ff3a32016-02-09 14:57:42 +02004564 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004565
4566 u8 pas[0][0x40];
4567};
4568
4569struct mlx5_ifc_query_eq_in_bits {
4570 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004571 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004572
Matan Barakb4ff3a32016-02-09 14:57:42 +02004573 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004574 u8 op_mod[0x10];
4575
Matan Barakb4ff3a32016-02-09 14:57:42 +02004576 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004577 u8 eq_number[0x8];
4578
Matan Barakb4ff3a32016-02-09 14:57:42 +02004579 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004580};
4581
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004582struct mlx5_ifc_encap_header_in_bits {
4583 u8 reserved_at_0[0x5];
4584 u8 header_type[0x3];
4585 u8 reserved_at_8[0xe];
4586 u8 encap_header_size[0xa];
4587
4588 u8 reserved_at_20[0x10];
4589 u8 encap_header[2][0x8];
4590
4591 u8 more_encap_header[0][0x8];
4592};
4593
4594struct mlx5_ifc_query_encap_header_out_bits {
4595 u8 status[0x8];
4596 u8 reserved_at_8[0x18];
4597
4598 u8 syndrome[0x20];
4599
4600 u8 reserved_at_40[0xa0];
4601
4602 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4603};
4604
4605struct mlx5_ifc_query_encap_header_in_bits {
4606 u8 opcode[0x10];
4607 u8 reserved_at_10[0x10];
4608
4609 u8 reserved_at_20[0x10];
4610 u8 op_mod[0x10];
4611
4612 u8 encap_id[0x20];
4613
4614 u8 reserved_at_60[0xa0];
4615};
4616
4617struct mlx5_ifc_alloc_encap_header_out_bits {
4618 u8 status[0x8];
4619 u8 reserved_at_8[0x18];
4620
4621 u8 syndrome[0x20];
4622
4623 u8 encap_id[0x20];
4624
4625 u8 reserved_at_60[0x20];
4626};
4627
4628struct mlx5_ifc_alloc_encap_header_in_bits {
4629 u8 opcode[0x10];
4630 u8 reserved_at_10[0x10];
4631
4632 u8 reserved_at_20[0x10];
4633 u8 op_mod[0x10];
4634
4635 u8 reserved_at_40[0xa0];
4636
4637 struct mlx5_ifc_encap_header_in_bits encap_header;
4638};
4639
4640struct mlx5_ifc_dealloc_encap_header_out_bits {
4641 u8 status[0x8];
4642 u8 reserved_at_8[0x18];
4643
4644 u8 syndrome[0x20];
4645
4646 u8 reserved_at_40[0x40];
4647};
4648
4649struct mlx5_ifc_dealloc_encap_header_in_bits {
4650 u8 opcode[0x10];
4651 u8 reserved_at_10[0x10];
4652
4653 u8 reserved_20[0x10];
4654 u8 op_mod[0x10];
4655
4656 u8 encap_id[0x20];
4657
4658 u8 reserved_60[0x20];
4659};
4660
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004661struct mlx5_ifc_set_action_in_bits {
4662 u8 action_type[0x4];
4663 u8 field[0xc];
4664 u8 reserved_at_10[0x3];
4665 u8 offset[0x5];
4666 u8 reserved_at_18[0x3];
4667 u8 length[0x5];
4668
4669 u8 data[0x20];
4670};
4671
4672struct mlx5_ifc_add_action_in_bits {
4673 u8 action_type[0x4];
4674 u8 field[0xc];
4675 u8 reserved_at_10[0x10];
4676
4677 u8 data[0x20];
4678};
4679
4680union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4681 struct mlx5_ifc_set_action_in_bits set_action_in;
4682 struct mlx5_ifc_add_action_in_bits add_action_in;
4683 u8 reserved_at_0[0x40];
4684};
4685
4686enum {
4687 MLX5_ACTION_TYPE_SET = 0x1,
4688 MLX5_ACTION_TYPE_ADD = 0x2,
4689};
4690
4691enum {
4692 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4693 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4694 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4695 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4696 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4697 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4698 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4699 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4700 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4701 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4702 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4703 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4704 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4705 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4706 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4707 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4708 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4709 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4710 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4711 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4712 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4713 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004714 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004715};
4716
4717struct mlx5_ifc_alloc_modify_header_context_out_bits {
4718 u8 status[0x8];
4719 u8 reserved_at_8[0x18];
4720
4721 u8 syndrome[0x20];
4722
4723 u8 modify_header_id[0x20];
4724
4725 u8 reserved_at_60[0x20];
4726};
4727
4728struct mlx5_ifc_alloc_modify_header_context_in_bits {
4729 u8 opcode[0x10];
4730 u8 reserved_at_10[0x10];
4731
4732 u8 reserved_at_20[0x10];
4733 u8 op_mod[0x10];
4734
4735 u8 reserved_at_40[0x20];
4736
4737 u8 table_type[0x8];
4738 u8 reserved_at_68[0x10];
4739 u8 num_of_actions[0x8];
4740
4741 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4742};
4743
4744struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4745 u8 status[0x8];
4746 u8 reserved_at_8[0x18];
4747
4748 u8 syndrome[0x20];
4749
4750 u8 reserved_at_40[0x40];
4751};
4752
4753struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4754 u8 opcode[0x10];
4755 u8 reserved_at_10[0x10];
4756
4757 u8 reserved_at_20[0x10];
4758 u8 op_mod[0x10];
4759
4760 u8 modify_header_id[0x20];
4761
4762 u8 reserved_at_60[0x20];
4763};
4764
Saeed Mahameede2816822015-05-28 22:28:40 +03004765struct mlx5_ifc_query_dct_out_bits {
4766 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004767 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004768
4769 u8 syndrome[0x20];
4770
Matan Barakb4ff3a32016-02-09 14:57:42 +02004771 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004772
4773 struct mlx5_ifc_dctc_bits dct_context_entry;
4774
Matan Barakb4ff3a32016-02-09 14:57:42 +02004775 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004776};
4777
4778struct mlx5_ifc_query_dct_in_bits {
4779 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004780 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004781
Matan Barakb4ff3a32016-02-09 14:57:42 +02004782 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004783 u8 op_mod[0x10];
4784
Matan Barakb4ff3a32016-02-09 14:57:42 +02004785 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004786 u8 dctn[0x18];
4787
Matan Barakb4ff3a32016-02-09 14:57:42 +02004788 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004789};
4790
4791struct mlx5_ifc_query_cq_out_bits {
4792 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004793 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004794
4795 u8 syndrome[0x20];
4796
Matan Barakb4ff3a32016-02-09 14:57:42 +02004797 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004798
4799 struct mlx5_ifc_cqc_bits cq_context;
4800
Matan Barakb4ff3a32016-02-09 14:57:42 +02004801 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004802
4803 u8 pas[0][0x40];
4804};
4805
4806struct mlx5_ifc_query_cq_in_bits {
4807 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004808 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004809
Matan Barakb4ff3a32016-02-09 14:57:42 +02004810 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004811 u8 op_mod[0x10];
4812
Matan Barakb4ff3a32016-02-09 14:57:42 +02004813 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004814 u8 cqn[0x18];
4815
Matan Barakb4ff3a32016-02-09 14:57:42 +02004816 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004817};
4818
4819struct mlx5_ifc_query_cong_status_out_bits {
4820 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004821 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004822
4823 u8 syndrome[0x20];
4824
Matan Barakb4ff3a32016-02-09 14:57:42 +02004825 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004826
4827 u8 enable[0x1];
4828 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004829 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004830};
4831
4832struct mlx5_ifc_query_cong_status_in_bits {
4833 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004834 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004835
Matan Barakb4ff3a32016-02-09 14:57:42 +02004836 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004837 u8 op_mod[0x10];
4838
Matan Barakb4ff3a32016-02-09 14:57:42 +02004839 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004840 u8 priority[0x4];
4841 u8 cong_protocol[0x4];
4842
Matan Barakb4ff3a32016-02-09 14:57:42 +02004843 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004844};
4845
4846struct mlx5_ifc_query_cong_statistics_out_bits {
4847 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004848 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004849
4850 u8 syndrome[0x20];
4851
Matan Barakb4ff3a32016-02-09 14:57:42 +02004852 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004853
Parav Pandite1f24a72017-04-16 07:29:29 +03004854 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004855
4856 u8 sum_flows[0x20];
4857
Parav Pandite1f24a72017-04-16 07:29:29 +03004858 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004859
Parav Pandite1f24a72017-04-16 07:29:29 +03004860 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004861
Parav Pandite1f24a72017-04-16 07:29:29 +03004862 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004863
Parav Pandite1f24a72017-04-16 07:29:29 +03004864 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004865
Matan Barakb4ff3a32016-02-09 14:57:42 +02004866 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004867
4868 u8 time_stamp_high[0x20];
4869
4870 u8 time_stamp_low[0x20];
4871
4872 u8 accumulators_period[0x20];
4873
Parav Pandite1f24a72017-04-16 07:29:29 +03004874 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004875
Parav Pandite1f24a72017-04-16 07:29:29 +03004876 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004877
Parav Pandite1f24a72017-04-16 07:29:29 +03004878 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004879
Parav Pandite1f24a72017-04-16 07:29:29 +03004880 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004881
Matan Barakb4ff3a32016-02-09 14:57:42 +02004882 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004883};
4884
4885struct mlx5_ifc_query_cong_statistics_in_bits {
4886 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004887 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004888
Matan Barakb4ff3a32016-02-09 14:57:42 +02004889 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004890 u8 op_mod[0x10];
4891
4892 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004893 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004894
Matan Barakb4ff3a32016-02-09 14:57:42 +02004895 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004896};
4897
4898struct mlx5_ifc_query_cong_params_out_bits {
4899 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004900 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004901
4902 u8 syndrome[0x20];
4903
Matan Barakb4ff3a32016-02-09 14:57:42 +02004904 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004905
4906 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4907};
4908
4909struct mlx5_ifc_query_cong_params_in_bits {
4910 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004911 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004912
Matan Barakb4ff3a32016-02-09 14:57:42 +02004913 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004914 u8 op_mod[0x10];
4915
Matan Barakb4ff3a32016-02-09 14:57:42 +02004916 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004917 u8 cong_protocol[0x4];
4918
Matan Barakb4ff3a32016-02-09 14:57:42 +02004919 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004920};
4921
4922struct mlx5_ifc_query_adapter_out_bits {
4923 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004924 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004925
4926 u8 syndrome[0x20];
4927
Matan Barakb4ff3a32016-02-09 14:57:42 +02004928 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004929
4930 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4931};
4932
4933struct mlx5_ifc_query_adapter_in_bits {
4934 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004935 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004936
Matan Barakb4ff3a32016-02-09 14:57:42 +02004937 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004938 u8 op_mod[0x10];
4939
Matan Barakb4ff3a32016-02-09 14:57:42 +02004940 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004941};
4942
4943struct mlx5_ifc_qp_2rst_out_bits {
4944 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004945 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004946
4947 u8 syndrome[0x20];
4948
Matan Barakb4ff3a32016-02-09 14:57:42 +02004949 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004950};
4951
4952struct mlx5_ifc_qp_2rst_in_bits {
4953 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004954 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004955
Matan Barakb4ff3a32016-02-09 14:57:42 +02004956 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004957 u8 op_mod[0x10];
4958
Matan Barakb4ff3a32016-02-09 14:57:42 +02004959 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004960 u8 qpn[0x18];
4961
Matan Barakb4ff3a32016-02-09 14:57:42 +02004962 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004963};
4964
4965struct mlx5_ifc_qp_2err_out_bits {
4966 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004967 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004968
4969 u8 syndrome[0x20];
4970
Matan Barakb4ff3a32016-02-09 14:57:42 +02004971 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004972};
4973
4974struct mlx5_ifc_qp_2err_in_bits {
4975 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004976 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004977
Matan Barakb4ff3a32016-02-09 14:57:42 +02004978 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004979 u8 op_mod[0x10];
4980
Matan Barakb4ff3a32016-02-09 14:57:42 +02004981 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004982 u8 qpn[0x18];
4983
Matan Barakb4ff3a32016-02-09 14:57:42 +02004984 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004985};
4986
4987struct mlx5_ifc_page_fault_resume_out_bits {
4988 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004989 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004990
4991 u8 syndrome[0x20];
4992
Matan Barakb4ff3a32016-02-09 14:57:42 +02004993 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004994};
4995
4996struct mlx5_ifc_page_fault_resume_in_bits {
4997 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004998 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004999
Matan Barakb4ff3a32016-02-09 14:57:42 +02005000 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005001 u8 op_mod[0x10];
5002
5003 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005004 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005005 u8 page_fault_type[0x3];
5006 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005007
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005008 u8 reserved_at_60[0x8];
5009 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005010};
5011
5012struct mlx5_ifc_nop_out_bits {
5013 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005014 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005015
5016 u8 syndrome[0x20];
5017
Matan Barakb4ff3a32016-02-09 14:57:42 +02005018 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005019};
5020
5021struct mlx5_ifc_nop_in_bits {
5022 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005023 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005024
Matan Barakb4ff3a32016-02-09 14:57:42 +02005025 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005026 u8 op_mod[0x10];
5027
Matan Barakb4ff3a32016-02-09 14:57:42 +02005028 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005029};
5030
5031struct mlx5_ifc_modify_vport_state_out_bits {
5032 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005033 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005034
5035 u8 syndrome[0x20];
5036
Matan Barakb4ff3a32016-02-09 14:57:42 +02005037 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005038};
5039
5040struct mlx5_ifc_modify_vport_state_in_bits {
5041 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005042 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005043
Matan Barakb4ff3a32016-02-09 14:57:42 +02005044 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005045 u8 op_mod[0x10];
5046
5047 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005048 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005049 u8 vport_number[0x10];
5050
Matan Barakb4ff3a32016-02-09 14:57:42 +02005051 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005052 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005053 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005054};
5055
5056struct mlx5_ifc_modify_tis_out_bits {
5057 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005058 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005059
5060 u8 syndrome[0x20];
5061
Matan Barakb4ff3a32016-02-09 14:57:42 +02005062 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005063};
5064
majd@mellanox.com75850d02016-01-14 19:13:06 +02005065struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005066 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005067
Aviv Heller84df61e2016-05-10 13:47:50 +03005068 u8 reserved_at_20[0x1d];
5069 u8 lag_tx_port_affinity[0x1];
5070 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005071 u8 prio[0x1];
5072};
5073
Saeed Mahameede2816822015-05-28 22:28:40 +03005074struct mlx5_ifc_modify_tis_in_bits {
5075 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005076 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005077
Matan Barakb4ff3a32016-02-09 14:57:42 +02005078 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005079 u8 op_mod[0x10];
5080
Matan Barakb4ff3a32016-02-09 14:57:42 +02005081 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005082 u8 tisn[0x18];
5083
Matan Barakb4ff3a32016-02-09 14:57:42 +02005084 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005085
majd@mellanox.com75850d02016-01-14 19:13:06 +02005086 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005087
Matan Barakb4ff3a32016-02-09 14:57:42 +02005088 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005089
5090 struct mlx5_ifc_tisc_bits ctx;
5091};
5092
Achiad Shochatd9eea402015-08-04 14:05:42 +03005093struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005094 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005095
Matan Barakb4ff3a32016-02-09 14:57:42 +02005096 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005097 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005098 u8 reserved_at_3c[0x1];
5099 u8 hash[0x1];
5100 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005101 u8 lro[0x1];
5102};
5103
Saeed Mahameede2816822015-05-28 22:28:40 +03005104struct mlx5_ifc_modify_tir_out_bits {
5105 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005106 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005107
5108 u8 syndrome[0x20];
5109
Matan Barakb4ff3a32016-02-09 14:57:42 +02005110 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005111};
5112
5113struct mlx5_ifc_modify_tir_in_bits {
5114 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005115 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005116
Matan Barakb4ff3a32016-02-09 14:57:42 +02005117 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005118 u8 op_mod[0x10];
5119
Matan Barakb4ff3a32016-02-09 14:57:42 +02005120 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005121 u8 tirn[0x18];
5122
Matan Barakb4ff3a32016-02-09 14:57:42 +02005123 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005124
Achiad Shochatd9eea402015-08-04 14:05:42 +03005125 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005126
Matan Barakb4ff3a32016-02-09 14:57:42 +02005127 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005128
5129 struct mlx5_ifc_tirc_bits ctx;
5130};
5131
5132struct mlx5_ifc_modify_sq_out_bits {
5133 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005134 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005135
5136 u8 syndrome[0x20];
5137
Matan Barakb4ff3a32016-02-09 14:57:42 +02005138 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005139};
5140
5141struct mlx5_ifc_modify_sq_in_bits {
5142 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005143 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005144
Matan Barakb4ff3a32016-02-09 14:57:42 +02005145 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005146 u8 op_mod[0x10];
5147
5148 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005149 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005150 u8 sqn[0x18];
5151
Matan Barakb4ff3a32016-02-09 14:57:42 +02005152 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005153
5154 u8 modify_bitmask[0x40];
5155
Matan Barakb4ff3a32016-02-09 14:57:42 +02005156 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005157
5158 struct mlx5_ifc_sqc_bits ctx;
5159};
5160
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005161struct mlx5_ifc_modify_scheduling_element_out_bits {
5162 u8 status[0x8];
5163 u8 reserved_at_8[0x18];
5164
5165 u8 syndrome[0x20];
5166
5167 u8 reserved_at_40[0x1c0];
5168};
5169
5170enum {
5171 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5172 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5173};
5174
5175struct mlx5_ifc_modify_scheduling_element_in_bits {
5176 u8 opcode[0x10];
5177 u8 reserved_at_10[0x10];
5178
5179 u8 reserved_at_20[0x10];
5180 u8 op_mod[0x10];
5181
5182 u8 scheduling_hierarchy[0x8];
5183 u8 reserved_at_48[0x18];
5184
5185 u8 scheduling_element_id[0x20];
5186
5187 u8 reserved_at_80[0x20];
5188
5189 u8 modify_bitmask[0x20];
5190
5191 u8 reserved_at_c0[0x40];
5192
5193 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5194
5195 u8 reserved_at_300[0x100];
5196};
5197
Saeed Mahameede2816822015-05-28 22:28:40 +03005198struct mlx5_ifc_modify_rqt_out_bits {
5199 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005200 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005201
5202 u8 syndrome[0x20];
5203
Matan Barakb4ff3a32016-02-09 14:57:42 +02005204 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005205};
5206
Achiad Shochat5c503682015-08-04 14:05:43 +03005207struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005208 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005209
Matan Barakb4ff3a32016-02-09 14:57:42 +02005210 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005211 u8 rqn_list[0x1];
5212};
5213
Saeed Mahameede2816822015-05-28 22:28:40 +03005214struct mlx5_ifc_modify_rqt_in_bits {
5215 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005216 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005217
Matan Barakb4ff3a32016-02-09 14:57:42 +02005218 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005219 u8 op_mod[0x10];
5220
Matan Barakb4ff3a32016-02-09 14:57:42 +02005221 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005222 u8 rqtn[0x18];
5223
Matan Barakb4ff3a32016-02-09 14:57:42 +02005224 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005225
Achiad Shochat5c503682015-08-04 14:05:43 +03005226 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005227
Matan Barakb4ff3a32016-02-09 14:57:42 +02005228 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005229
5230 struct mlx5_ifc_rqtc_bits ctx;
5231};
5232
5233struct mlx5_ifc_modify_rq_out_bits {
5234 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005235 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005236
5237 u8 syndrome[0x20];
5238
Matan Barakb4ff3a32016-02-09 14:57:42 +02005239 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005240};
5241
Alex Vesker83b502a2016-08-04 17:32:02 +03005242enum {
5243 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005244 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005245 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005246};
5247
Saeed Mahameede2816822015-05-28 22:28:40 +03005248struct mlx5_ifc_modify_rq_in_bits {
5249 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005250 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005251
Matan Barakb4ff3a32016-02-09 14:57:42 +02005252 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005253 u8 op_mod[0x10];
5254
5255 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005256 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005257 u8 rqn[0x18];
5258
Matan Barakb4ff3a32016-02-09 14:57:42 +02005259 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005260
5261 u8 modify_bitmask[0x40];
5262
Matan Barakb4ff3a32016-02-09 14:57:42 +02005263 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005264
5265 struct mlx5_ifc_rqc_bits ctx;
5266};
5267
5268struct mlx5_ifc_modify_rmp_out_bits {
5269 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005270 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005271
5272 u8 syndrome[0x20];
5273
Matan Barakb4ff3a32016-02-09 14:57:42 +02005274 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005275};
5276
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005277struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005278 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005279
Matan Barakb4ff3a32016-02-09 14:57:42 +02005280 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005281 u8 lwm[0x1];
5282};
5283
Saeed Mahameede2816822015-05-28 22:28:40 +03005284struct mlx5_ifc_modify_rmp_in_bits {
5285 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005286 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005287
Matan Barakb4ff3a32016-02-09 14:57:42 +02005288 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005289 u8 op_mod[0x10];
5290
5291 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005292 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005293 u8 rmpn[0x18];
5294
Matan Barakb4ff3a32016-02-09 14:57:42 +02005295 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005296
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005297 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005298
Matan Barakb4ff3a32016-02-09 14:57:42 +02005299 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005300
5301 struct mlx5_ifc_rmpc_bits ctx;
5302};
5303
5304struct mlx5_ifc_modify_nic_vport_context_out_bits {
5305 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005306 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005307
5308 u8 syndrome[0x20];
5309
Matan Barakb4ff3a32016-02-09 14:57:42 +02005310 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005311};
5312
5313struct mlx5_ifc_modify_nic_vport_field_select_bits {
Huy Nguyenbded7472017-05-30 09:42:53 +03005314 u8 reserved_at_0[0x14];
5315 u8 disable_uc_local_lb[0x1];
5316 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005317 u8 node_guid[0x1];
5318 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005319 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005320 u8 mtu[0x1];
5321 u8 change_event[0x1];
5322 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005323 u8 permanent_address[0x1];
5324 u8 addresses_list[0x1];
5325 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005326 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005327};
5328
5329struct mlx5_ifc_modify_nic_vport_context_in_bits {
5330 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005331 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005332
Matan Barakb4ff3a32016-02-09 14:57:42 +02005333 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005334 u8 op_mod[0x10];
5335
5336 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005337 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005338 u8 vport_number[0x10];
5339
5340 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5341
Matan Barakb4ff3a32016-02-09 14:57:42 +02005342 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005343
5344 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5345};
5346
5347struct mlx5_ifc_modify_hca_vport_context_out_bits {
5348 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005349 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005350
5351 u8 syndrome[0x20];
5352
Matan Barakb4ff3a32016-02-09 14:57:42 +02005353 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005354};
5355
5356struct mlx5_ifc_modify_hca_vport_context_in_bits {
5357 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005358 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005359
Matan Barakb4ff3a32016-02-09 14:57:42 +02005360 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005361 u8 op_mod[0x10];
5362
5363 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005364 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005365 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005366 u8 vport_number[0x10];
5367
Matan Barakb4ff3a32016-02-09 14:57:42 +02005368 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005369
5370 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5371};
5372
5373struct mlx5_ifc_modify_cq_out_bits {
5374 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005375 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005376
5377 u8 syndrome[0x20];
5378
Matan Barakb4ff3a32016-02-09 14:57:42 +02005379 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005380};
5381
5382enum {
5383 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5384 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5385};
5386
5387struct mlx5_ifc_modify_cq_in_bits {
5388 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005389 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005390
Matan Barakb4ff3a32016-02-09 14:57:42 +02005391 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005392 u8 op_mod[0x10];
5393
Matan Barakb4ff3a32016-02-09 14:57:42 +02005394 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005395 u8 cqn[0x18];
5396
5397 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5398
5399 struct mlx5_ifc_cqc_bits cq_context;
5400
Matan Barakb4ff3a32016-02-09 14:57:42 +02005401 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005402
5403 u8 pas[0][0x40];
5404};
5405
5406struct mlx5_ifc_modify_cong_status_out_bits {
5407 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005408 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005409
5410 u8 syndrome[0x20];
5411
Matan Barakb4ff3a32016-02-09 14:57:42 +02005412 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005413};
5414
5415struct mlx5_ifc_modify_cong_status_in_bits {
5416 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005417 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005418
Matan Barakb4ff3a32016-02-09 14:57:42 +02005419 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005420 u8 op_mod[0x10];
5421
Matan Barakb4ff3a32016-02-09 14:57:42 +02005422 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005423 u8 priority[0x4];
5424 u8 cong_protocol[0x4];
5425
5426 u8 enable[0x1];
5427 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005428 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005429};
5430
5431struct mlx5_ifc_modify_cong_params_out_bits {
5432 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005433 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005434
5435 u8 syndrome[0x20];
5436
Matan Barakb4ff3a32016-02-09 14:57:42 +02005437 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005438};
5439
5440struct mlx5_ifc_modify_cong_params_in_bits {
5441 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005442 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005443
Matan Barakb4ff3a32016-02-09 14:57:42 +02005444 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005445 u8 op_mod[0x10];
5446
Matan Barakb4ff3a32016-02-09 14:57:42 +02005447 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005448 u8 cong_protocol[0x4];
5449
5450 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5451
Matan Barakb4ff3a32016-02-09 14:57:42 +02005452 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005453
5454 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5455};
5456
5457struct mlx5_ifc_manage_pages_out_bits {
5458 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005459 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005460
5461 u8 syndrome[0x20];
5462
5463 u8 output_num_entries[0x20];
5464
Matan Barakb4ff3a32016-02-09 14:57:42 +02005465 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005466
5467 u8 pas[0][0x40];
5468};
5469
5470enum {
5471 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5472 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5473 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5474};
5475
5476struct mlx5_ifc_manage_pages_in_bits {
5477 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005478 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005479
Matan Barakb4ff3a32016-02-09 14:57:42 +02005480 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005481 u8 op_mod[0x10];
5482
Matan Barakb4ff3a32016-02-09 14:57:42 +02005483 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005484 u8 function_id[0x10];
5485
5486 u8 input_num_entries[0x20];
5487
5488 u8 pas[0][0x40];
5489};
5490
5491struct mlx5_ifc_mad_ifc_out_bits {
5492 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005493 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005494
5495 u8 syndrome[0x20];
5496
Matan Barakb4ff3a32016-02-09 14:57:42 +02005497 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005498
5499 u8 response_mad_packet[256][0x8];
5500};
5501
5502struct mlx5_ifc_mad_ifc_in_bits {
5503 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005504 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005505
Matan Barakb4ff3a32016-02-09 14:57:42 +02005506 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005507 u8 op_mod[0x10];
5508
5509 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005510 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005511 u8 port[0x8];
5512
Matan Barakb4ff3a32016-02-09 14:57:42 +02005513 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005514
5515 u8 mad[256][0x8];
5516};
5517
5518struct mlx5_ifc_init_hca_out_bits {
5519 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005520 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005521
5522 u8 syndrome[0x20];
5523
Matan Barakb4ff3a32016-02-09 14:57:42 +02005524 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005525};
5526
5527struct mlx5_ifc_init_hca_in_bits {
5528 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005529 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005530
Matan Barakb4ff3a32016-02-09 14:57:42 +02005531 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005532 u8 op_mod[0x10];
5533
Matan Barakb4ff3a32016-02-09 14:57:42 +02005534 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005535};
5536
5537struct mlx5_ifc_init2rtr_qp_out_bits {
5538 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005539 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005540
5541 u8 syndrome[0x20];
5542
Matan Barakb4ff3a32016-02-09 14:57:42 +02005543 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005544};
5545
5546struct mlx5_ifc_init2rtr_qp_in_bits {
5547 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005548 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005549
Matan Barakb4ff3a32016-02-09 14:57:42 +02005550 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005551 u8 op_mod[0x10];
5552
Matan Barakb4ff3a32016-02-09 14:57:42 +02005553 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005554 u8 qpn[0x18];
5555
Matan Barakb4ff3a32016-02-09 14:57:42 +02005556 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005557
5558 u8 opt_param_mask[0x20];
5559
Matan Barakb4ff3a32016-02-09 14:57:42 +02005560 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005561
5562 struct mlx5_ifc_qpc_bits qpc;
5563
Matan Barakb4ff3a32016-02-09 14:57:42 +02005564 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005565};
5566
5567struct mlx5_ifc_init2init_qp_out_bits {
5568 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005569 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005570
5571 u8 syndrome[0x20];
5572
Matan Barakb4ff3a32016-02-09 14:57:42 +02005573 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005574};
5575
5576struct mlx5_ifc_init2init_qp_in_bits {
5577 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005578 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005579
Matan Barakb4ff3a32016-02-09 14:57:42 +02005580 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005581 u8 op_mod[0x10];
5582
Matan Barakb4ff3a32016-02-09 14:57:42 +02005583 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005584 u8 qpn[0x18];
5585
Matan Barakb4ff3a32016-02-09 14:57:42 +02005586 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005587
5588 u8 opt_param_mask[0x20];
5589
Matan Barakb4ff3a32016-02-09 14:57:42 +02005590 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005591
5592 struct mlx5_ifc_qpc_bits qpc;
5593
Matan Barakb4ff3a32016-02-09 14:57:42 +02005594 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005595};
5596
5597struct mlx5_ifc_get_dropped_packet_log_out_bits {
5598 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005599 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005600
5601 u8 syndrome[0x20];
5602
Matan Barakb4ff3a32016-02-09 14:57:42 +02005603 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005604
5605 u8 packet_headers_log[128][0x8];
5606
5607 u8 packet_syndrome[64][0x8];
5608};
5609
5610struct mlx5_ifc_get_dropped_packet_log_in_bits {
5611 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005612 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005613
Matan Barakb4ff3a32016-02-09 14:57:42 +02005614 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005615 u8 op_mod[0x10];
5616
Matan Barakb4ff3a32016-02-09 14:57:42 +02005617 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005618};
5619
5620struct mlx5_ifc_gen_eqe_in_bits {
5621 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005622 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005623
Matan Barakb4ff3a32016-02-09 14:57:42 +02005624 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005625 u8 op_mod[0x10];
5626
Matan Barakb4ff3a32016-02-09 14:57:42 +02005627 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005628 u8 eq_number[0x8];
5629
Matan Barakb4ff3a32016-02-09 14:57:42 +02005630 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005631
5632 u8 eqe[64][0x8];
5633};
5634
5635struct mlx5_ifc_gen_eq_out_bits {
5636 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005637 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005638
5639 u8 syndrome[0x20];
5640
Matan Barakb4ff3a32016-02-09 14:57:42 +02005641 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005642};
5643
5644struct mlx5_ifc_enable_hca_out_bits {
5645 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005646 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005647
5648 u8 syndrome[0x20];
5649
Matan Barakb4ff3a32016-02-09 14:57:42 +02005650 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005651};
5652
5653struct mlx5_ifc_enable_hca_in_bits {
5654 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005655 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005656
Matan Barakb4ff3a32016-02-09 14:57:42 +02005657 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005658 u8 op_mod[0x10];
5659
Matan Barakb4ff3a32016-02-09 14:57:42 +02005660 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005661 u8 function_id[0x10];
5662
Matan Barakb4ff3a32016-02-09 14:57:42 +02005663 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005664};
5665
5666struct mlx5_ifc_drain_dct_out_bits {
5667 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005668 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005669
5670 u8 syndrome[0x20];
5671
Matan Barakb4ff3a32016-02-09 14:57:42 +02005672 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005673};
5674
5675struct mlx5_ifc_drain_dct_in_bits {
5676 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005677 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005678
Matan Barakb4ff3a32016-02-09 14:57:42 +02005679 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005680 u8 op_mod[0x10];
5681
Matan Barakb4ff3a32016-02-09 14:57:42 +02005682 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005683 u8 dctn[0x18];
5684
Matan Barakb4ff3a32016-02-09 14:57:42 +02005685 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005686};
5687
5688struct mlx5_ifc_disable_hca_out_bits {
5689 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005690 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005691
5692 u8 syndrome[0x20];
5693
Matan Barakb4ff3a32016-02-09 14:57:42 +02005694 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005695};
5696
5697struct mlx5_ifc_disable_hca_in_bits {
5698 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005699 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005700
Matan Barakb4ff3a32016-02-09 14:57:42 +02005701 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005702 u8 op_mod[0x10];
5703
Matan Barakb4ff3a32016-02-09 14:57:42 +02005704 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005705 u8 function_id[0x10];
5706
Matan Barakb4ff3a32016-02-09 14:57:42 +02005707 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005708};
5709
5710struct mlx5_ifc_detach_from_mcg_out_bits {
5711 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005712 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005713
5714 u8 syndrome[0x20];
5715
Matan Barakb4ff3a32016-02-09 14:57:42 +02005716 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005717};
5718
5719struct mlx5_ifc_detach_from_mcg_in_bits {
5720 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005721 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005722
Matan Barakb4ff3a32016-02-09 14:57:42 +02005723 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005724 u8 op_mod[0x10];
5725
Matan Barakb4ff3a32016-02-09 14:57:42 +02005726 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005727 u8 qpn[0x18];
5728
Matan Barakb4ff3a32016-02-09 14:57:42 +02005729 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005730
5731 u8 multicast_gid[16][0x8];
5732};
5733
Saeed Mahameed74862162016-06-09 15:11:34 +03005734struct mlx5_ifc_destroy_xrq_out_bits {
5735 u8 status[0x8];
5736 u8 reserved_at_8[0x18];
5737
5738 u8 syndrome[0x20];
5739
5740 u8 reserved_at_40[0x40];
5741};
5742
5743struct mlx5_ifc_destroy_xrq_in_bits {
5744 u8 opcode[0x10];
5745 u8 reserved_at_10[0x10];
5746
5747 u8 reserved_at_20[0x10];
5748 u8 op_mod[0x10];
5749
5750 u8 reserved_at_40[0x8];
5751 u8 xrqn[0x18];
5752
5753 u8 reserved_at_60[0x20];
5754};
5755
Saeed Mahameede2816822015-05-28 22:28:40 +03005756struct mlx5_ifc_destroy_xrc_srq_out_bits {
5757 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005758 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005759
5760 u8 syndrome[0x20];
5761
Matan Barakb4ff3a32016-02-09 14:57:42 +02005762 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005763};
5764
5765struct mlx5_ifc_destroy_xrc_srq_in_bits {
5766 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005767 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005768
Matan Barakb4ff3a32016-02-09 14:57:42 +02005769 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005770 u8 op_mod[0x10];
5771
Matan Barakb4ff3a32016-02-09 14:57:42 +02005772 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005773 u8 xrc_srqn[0x18];
5774
Matan Barakb4ff3a32016-02-09 14:57:42 +02005775 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005776};
5777
5778struct mlx5_ifc_destroy_tis_out_bits {
5779 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005780 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005781
5782 u8 syndrome[0x20];
5783
Matan Barakb4ff3a32016-02-09 14:57:42 +02005784 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005785};
5786
5787struct mlx5_ifc_destroy_tis_in_bits {
5788 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005789 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005790
Matan Barakb4ff3a32016-02-09 14:57:42 +02005791 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005792 u8 op_mod[0x10];
5793
Matan Barakb4ff3a32016-02-09 14:57:42 +02005794 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005795 u8 tisn[0x18];
5796
Matan Barakb4ff3a32016-02-09 14:57:42 +02005797 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005798};
5799
5800struct mlx5_ifc_destroy_tir_out_bits {
5801 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005802 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005803
5804 u8 syndrome[0x20];
5805
Matan Barakb4ff3a32016-02-09 14:57:42 +02005806 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005807};
5808
5809struct mlx5_ifc_destroy_tir_in_bits {
5810 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005811 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005812
Matan Barakb4ff3a32016-02-09 14:57:42 +02005813 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005814 u8 op_mod[0x10];
5815
Matan Barakb4ff3a32016-02-09 14:57:42 +02005816 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005817 u8 tirn[0x18];
5818
Matan Barakb4ff3a32016-02-09 14:57:42 +02005819 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005820};
5821
5822struct mlx5_ifc_destroy_srq_out_bits {
5823 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005824 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005825
5826 u8 syndrome[0x20];
5827
Matan Barakb4ff3a32016-02-09 14:57:42 +02005828 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005829};
5830
5831struct mlx5_ifc_destroy_srq_in_bits {
5832 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005833 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005834
Matan Barakb4ff3a32016-02-09 14:57:42 +02005835 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005836 u8 op_mod[0x10];
5837
Matan Barakb4ff3a32016-02-09 14:57:42 +02005838 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005839 u8 srqn[0x18];
5840
Matan Barakb4ff3a32016-02-09 14:57:42 +02005841 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005842};
5843
5844struct mlx5_ifc_destroy_sq_out_bits {
5845 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005846 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005847
5848 u8 syndrome[0x20];
5849
Matan Barakb4ff3a32016-02-09 14:57:42 +02005850 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005851};
5852
5853struct mlx5_ifc_destroy_sq_in_bits {
5854 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005855 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005856
Matan Barakb4ff3a32016-02-09 14:57:42 +02005857 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005858 u8 op_mod[0x10];
5859
Matan Barakb4ff3a32016-02-09 14:57:42 +02005860 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005861 u8 sqn[0x18];
5862
Matan Barakb4ff3a32016-02-09 14:57:42 +02005863 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005864};
5865
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005866struct mlx5_ifc_destroy_scheduling_element_out_bits {
5867 u8 status[0x8];
5868 u8 reserved_at_8[0x18];
5869
5870 u8 syndrome[0x20];
5871
5872 u8 reserved_at_40[0x1c0];
5873};
5874
5875struct mlx5_ifc_destroy_scheduling_element_in_bits {
5876 u8 opcode[0x10];
5877 u8 reserved_at_10[0x10];
5878
5879 u8 reserved_at_20[0x10];
5880 u8 op_mod[0x10];
5881
5882 u8 scheduling_hierarchy[0x8];
5883 u8 reserved_at_48[0x18];
5884
5885 u8 scheduling_element_id[0x20];
5886
5887 u8 reserved_at_80[0x180];
5888};
5889
Saeed Mahameede2816822015-05-28 22:28:40 +03005890struct mlx5_ifc_destroy_rqt_out_bits {
5891 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005892 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005893
5894 u8 syndrome[0x20];
5895
Matan Barakb4ff3a32016-02-09 14:57:42 +02005896 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005897};
5898
5899struct mlx5_ifc_destroy_rqt_in_bits {
5900 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005901 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005902
Matan Barakb4ff3a32016-02-09 14:57:42 +02005903 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005904 u8 op_mod[0x10];
5905
Matan Barakb4ff3a32016-02-09 14:57:42 +02005906 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005907 u8 rqtn[0x18];
5908
Matan Barakb4ff3a32016-02-09 14:57:42 +02005909 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005910};
5911
5912struct mlx5_ifc_destroy_rq_out_bits {
5913 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005914 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005915
5916 u8 syndrome[0x20];
5917
Matan Barakb4ff3a32016-02-09 14:57:42 +02005918 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005919};
5920
5921struct mlx5_ifc_destroy_rq_in_bits {
5922 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005923 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005924
Matan Barakb4ff3a32016-02-09 14:57:42 +02005925 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005926 u8 op_mod[0x10];
5927
Matan Barakb4ff3a32016-02-09 14:57:42 +02005928 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005929 u8 rqn[0x18];
5930
Matan Barakb4ff3a32016-02-09 14:57:42 +02005931 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005932};
5933
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03005934struct mlx5_ifc_set_delay_drop_params_in_bits {
5935 u8 opcode[0x10];
5936 u8 reserved_at_10[0x10];
5937
5938 u8 reserved_at_20[0x10];
5939 u8 op_mod[0x10];
5940
5941 u8 reserved_at_40[0x20];
5942
5943 u8 reserved_at_60[0x10];
5944 u8 delay_drop_timeout[0x10];
5945};
5946
5947struct mlx5_ifc_set_delay_drop_params_out_bits {
5948 u8 status[0x8];
5949 u8 reserved_at_8[0x18];
5950
5951 u8 syndrome[0x20];
5952
5953 u8 reserved_at_40[0x40];
5954};
5955
Saeed Mahameede2816822015-05-28 22:28:40 +03005956struct mlx5_ifc_destroy_rmp_out_bits {
5957 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005958 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005959
5960 u8 syndrome[0x20];
5961
Matan Barakb4ff3a32016-02-09 14:57:42 +02005962 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005963};
5964
5965struct mlx5_ifc_destroy_rmp_in_bits {
5966 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005967 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005968
Matan Barakb4ff3a32016-02-09 14:57:42 +02005969 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005970 u8 op_mod[0x10];
5971
Matan Barakb4ff3a32016-02-09 14:57:42 +02005972 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005973 u8 rmpn[0x18];
5974
Matan Barakb4ff3a32016-02-09 14:57:42 +02005975 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005976};
5977
5978struct mlx5_ifc_destroy_qp_out_bits {
5979 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005980 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005981
5982 u8 syndrome[0x20];
5983
Matan Barakb4ff3a32016-02-09 14:57:42 +02005984 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005985};
5986
5987struct mlx5_ifc_destroy_qp_in_bits {
5988 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005989 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005990
Matan Barakb4ff3a32016-02-09 14:57:42 +02005991 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005992 u8 op_mod[0x10];
5993
Matan Barakb4ff3a32016-02-09 14:57:42 +02005994 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005995 u8 qpn[0x18];
5996
Matan Barakb4ff3a32016-02-09 14:57:42 +02005997 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005998};
5999
6000struct mlx5_ifc_destroy_psv_out_bits {
6001 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006002 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006003
6004 u8 syndrome[0x20];
6005
Matan Barakb4ff3a32016-02-09 14:57:42 +02006006 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006007};
6008
6009struct mlx5_ifc_destroy_psv_in_bits {
6010 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006011 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006012
Matan Barakb4ff3a32016-02-09 14:57:42 +02006013 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006014 u8 op_mod[0x10];
6015
Matan Barakb4ff3a32016-02-09 14:57:42 +02006016 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006017 u8 psvn[0x18];
6018
Matan Barakb4ff3a32016-02-09 14:57:42 +02006019 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006020};
6021
6022struct mlx5_ifc_destroy_mkey_out_bits {
6023 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006024 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006025
6026 u8 syndrome[0x20];
6027
Matan Barakb4ff3a32016-02-09 14:57:42 +02006028 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006029};
6030
6031struct mlx5_ifc_destroy_mkey_in_bits {
6032 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006033 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006034
Matan Barakb4ff3a32016-02-09 14:57:42 +02006035 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006036 u8 op_mod[0x10];
6037
Matan Barakb4ff3a32016-02-09 14:57:42 +02006038 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006039 u8 mkey_index[0x18];
6040
Matan Barakb4ff3a32016-02-09 14:57:42 +02006041 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006042};
6043
6044struct mlx5_ifc_destroy_flow_table_out_bits {
6045 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006046 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006047
6048 u8 syndrome[0x20];
6049
Matan Barakb4ff3a32016-02-09 14:57:42 +02006050 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006051};
6052
6053struct mlx5_ifc_destroy_flow_table_in_bits {
6054 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006055 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006056
Matan Barakb4ff3a32016-02-09 14:57:42 +02006057 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006058 u8 op_mod[0x10];
6059
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006060 u8 other_vport[0x1];
6061 u8 reserved_at_41[0xf];
6062 u8 vport_number[0x10];
6063
6064 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006065
6066 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006067 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006068
Matan Barakb4ff3a32016-02-09 14:57:42 +02006069 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006070 u8 table_id[0x18];
6071
Matan Barakb4ff3a32016-02-09 14:57:42 +02006072 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006073};
6074
6075struct mlx5_ifc_destroy_flow_group_out_bits {
6076 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006077 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006078
6079 u8 syndrome[0x20];
6080
Matan Barakb4ff3a32016-02-09 14:57:42 +02006081 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006082};
6083
6084struct mlx5_ifc_destroy_flow_group_in_bits {
6085 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006086 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006087
Matan Barakb4ff3a32016-02-09 14:57:42 +02006088 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006089 u8 op_mod[0x10];
6090
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006091 u8 other_vport[0x1];
6092 u8 reserved_at_41[0xf];
6093 u8 vport_number[0x10];
6094
6095 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006096
6097 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006098 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006099
Matan Barakb4ff3a32016-02-09 14:57:42 +02006100 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006101 u8 table_id[0x18];
6102
6103 u8 group_id[0x20];
6104
Matan Barakb4ff3a32016-02-09 14:57:42 +02006105 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006106};
6107
6108struct mlx5_ifc_destroy_eq_out_bits {
6109 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006110 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006111
6112 u8 syndrome[0x20];
6113
Matan Barakb4ff3a32016-02-09 14:57:42 +02006114 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006115};
6116
6117struct mlx5_ifc_destroy_eq_in_bits {
6118 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006119 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006120
Matan Barakb4ff3a32016-02-09 14:57:42 +02006121 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006122 u8 op_mod[0x10];
6123
Matan Barakb4ff3a32016-02-09 14:57:42 +02006124 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006125 u8 eq_number[0x8];
6126
Matan Barakb4ff3a32016-02-09 14:57:42 +02006127 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006128};
6129
6130struct mlx5_ifc_destroy_dct_out_bits {
6131 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006132 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006133
6134 u8 syndrome[0x20];
6135
Matan Barakb4ff3a32016-02-09 14:57:42 +02006136 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006137};
6138
6139struct mlx5_ifc_destroy_dct_in_bits {
6140 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006141 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006142
Matan Barakb4ff3a32016-02-09 14:57:42 +02006143 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006144 u8 op_mod[0x10];
6145
Matan Barakb4ff3a32016-02-09 14:57:42 +02006146 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006147 u8 dctn[0x18];
6148
Matan Barakb4ff3a32016-02-09 14:57:42 +02006149 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006150};
6151
6152struct mlx5_ifc_destroy_cq_out_bits {
6153 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006154 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006155
6156 u8 syndrome[0x20];
6157
Matan Barakb4ff3a32016-02-09 14:57:42 +02006158 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006159};
6160
6161struct mlx5_ifc_destroy_cq_in_bits {
6162 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006163 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006164
Matan Barakb4ff3a32016-02-09 14:57:42 +02006165 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006166 u8 op_mod[0x10];
6167
Matan Barakb4ff3a32016-02-09 14:57:42 +02006168 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006169 u8 cqn[0x18];
6170
Matan Barakb4ff3a32016-02-09 14:57:42 +02006171 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006172};
6173
6174struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6175 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006176 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006177
6178 u8 syndrome[0x20];
6179
Matan Barakb4ff3a32016-02-09 14:57:42 +02006180 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006181};
6182
6183struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6184 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006185 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006186
Matan Barakb4ff3a32016-02-09 14:57:42 +02006187 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006188 u8 op_mod[0x10];
6189
Matan Barakb4ff3a32016-02-09 14:57:42 +02006190 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006191
Matan Barakb4ff3a32016-02-09 14:57:42 +02006192 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006193 u8 vxlan_udp_port[0x10];
6194};
6195
6196struct mlx5_ifc_delete_l2_table_entry_out_bits {
6197 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006198 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006199
6200 u8 syndrome[0x20];
6201
Matan Barakb4ff3a32016-02-09 14:57:42 +02006202 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006203};
6204
6205struct mlx5_ifc_delete_l2_table_entry_in_bits {
6206 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006207 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006208
Matan Barakb4ff3a32016-02-09 14:57:42 +02006209 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006210 u8 op_mod[0x10];
6211
Matan Barakb4ff3a32016-02-09 14:57:42 +02006212 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006213
Matan Barakb4ff3a32016-02-09 14:57:42 +02006214 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006215 u8 table_index[0x18];
6216
Matan Barakb4ff3a32016-02-09 14:57:42 +02006217 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006218};
6219
6220struct mlx5_ifc_delete_fte_out_bits {
6221 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006222 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006223
6224 u8 syndrome[0x20];
6225
Matan Barakb4ff3a32016-02-09 14:57:42 +02006226 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006227};
6228
6229struct mlx5_ifc_delete_fte_in_bits {
6230 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006231 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006232
Matan Barakb4ff3a32016-02-09 14:57:42 +02006233 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006234 u8 op_mod[0x10];
6235
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006236 u8 other_vport[0x1];
6237 u8 reserved_at_41[0xf];
6238 u8 vport_number[0x10];
6239
6240 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006241
6242 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006243 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006244
Matan Barakb4ff3a32016-02-09 14:57:42 +02006245 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006246 u8 table_id[0x18];
6247
Matan Barakb4ff3a32016-02-09 14:57:42 +02006248 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006249
6250 u8 flow_index[0x20];
6251
Matan Barakb4ff3a32016-02-09 14:57:42 +02006252 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006253};
6254
6255struct mlx5_ifc_dealloc_xrcd_out_bits {
6256 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006257 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006258
6259 u8 syndrome[0x20];
6260
Matan Barakb4ff3a32016-02-09 14:57:42 +02006261 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006262};
6263
6264struct mlx5_ifc_dealloc_xrcd_in_bits {
6265 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006266 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006267
Matan Barakb4ff3a32016-02-09 14:57:42 +02006268 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006269 u8 op_mod[0x10];
6270
Matan Barakb4ff3a32016-02-09 14:57:42 +02006271 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006272 u8 xrcd[0x18];
6273
Matan Barakb4ff3a32016-02-09 14:57:42 +02006274 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006275};
6276
6277struct mlx5_ifc_dealloc_uar_out_bits {
6278 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006279 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006280
6281 u8 syndrome[0x20];
6282
Matan Barakb4ff3a32016-02-09 14:57:42 +02006283 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006284};
6285
6286struct mlx5_ifc_dealloc_uar_in_bits {
6287 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006288 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006289
Matan Barakb4ff3a32016-02-09 14:57:42 +02006290 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006291 u8 op_mod[0x10];
6292
Matan Barakb4ff3a32016-02-09 14:57:42 +02006293 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006294 u8 uar[0x18];
6295
Matan Barakb4ff3a32016-02-09 14:57:42 +02006296 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006297};
6298
6299struct mlx5_ifc_dealloc_transport_domain_out_bits {
6300 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006301 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006302
6303 u8 syndrome[0x20];
6304
Matan Barakb4ff3a32016-02-09 14:57:42 +02006305 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006306};
6307
6308struct mlx5_ifc_dealloc_transport_domain_in_bits {
6309 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006310 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006311
Matan Barakb4ff3a32016-02-09 14:57:42 +02006312 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006313 u8 op_mod[0x10];
6314
Matan Barakb4ff3a32016-02-09 14:57:42 +02006315 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006316 u8 transport_domain[0x18];
6317
Matan Barakb4ff3a32016-02-09 14:57:42 +02006318 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006319};
6320
6321struct mlx5_ifc_dealloc_q_counter_out_bits {
6322 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006323 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006324
6325 u8 syndrome[0x20];
6326
Matan Barakb4ff3a32016-02-09 14:57:42 +02006327 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006328};
6329
6330struct mlx5_ifc_dealloc_q_counter_in_bits {
6331 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006332 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006333
Matan Barakb4ff3a32016-02-09 14:57:42 +02006334 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006335 u8 op_mod[0x10];
6336
Matan Barakb4ff3a32016-02-09 14:57:42 +02006337 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006338 u8 counter_set_id[0x8];
6339
Matan Barakb4ff3a32016-02-09 14:57:42 +02006340 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006341};
6342
6343struct mlx5_ifc_dealloc_pd_out_bits {
6344 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006345 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006346
6347 u8 syndrome[0x20];
6348
Matan Barakb4ff3a32016-02-09 14:57:42 +02006349 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006350};
6351
6352struct mlx5_ifc_dealloc_pd_in_bits {
6353 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006354 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006355
Matan Barakb4ff3a32016-02-09 14:57:42 +02006356 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006357 u8 op_mod[0x10];
6358
Matan Barakb4ff3a32016-02-09 14:57:42 +02006359 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006360 u8 pd[0x18];
6361
Matan Barakb4ff3a32016-02-09 14:57:42 +02006362 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006363};
6364
Amir Vadai9dc0b282016-05-13 12:55:39 +00006365struct mlx5_ifc_dealloc_flow_counter_out_bits {
6366 u8 status[0x8];
6367 u8 reserved_at_8[0x18];
6368
6369 u8 syndrome[0x20];
6370
6371 u8 reserved_at_40[0x40];
6372};
6373
6374struct mlx5_ifc_dealloc_flow_counter_in_bits {
6375 u8 opcode[0x10];
6376 u8 reserved_at_10[0x10];
6377
6378 u8 reserved_at_20[0x10];
6379 u8 op_mod[0x10];
6380
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006381 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006382
6383 u8 reserved_at_60[0x20];
6384};
6385
Saeed Mahameed74862162016-06-09 15:11:34 +03006386struct mlx5_ifc_create_xrq_out_bits {
6387 u8 status[0x8];
6388 u8 reserved_at_8[0x18];
6389
6390 u8 syndrome[0x20];
6391
6392 u8 reserved_at_40[0x8];
6393 u8 xrqn[0x18];
6394
6395 u8 reserved_at_60[0x20];
6396};
6397
6398struct mlx5_ifc_create_xrq_in_bits {
6399 u8 opcode[0x10];
6400 u8 reserved_at_10[0x10];
6401
6402 u8 reserved_at_20[0x10];
6403 u8 op_mod[0x10];
6404
6405 u8 reserved_at_40[0x40];
6406
6407 struct mlx5_ifc_xrqc_bits xrq_context;
6408};
6409
Saeed Mahameede2816822015-05-28 22:28:40 +03006410struct mlx5_ifc_create_xrc_srq_out_bits {
6411 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006412 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006413
6414 u8 syndrome[0x20];
6415
Matan Barakb4ff3a32016-02-09 14:57:42 +02006416 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006417 u8 xrc_srqn[0x18];
6418
Matan Barakb4ff3a32016-02-09 14:57:42 +02006419 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006420};
6421
6422struct mlx5_ifc_create_xrc_srq_in_bits {
6423 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006424 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006425
Matan Barakb4ff3a32016-02-09 14:57:42 +02006426 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006427 u8 op_mod[0x10];
6428
Matan Barakb4ff3a32016-02-09 14:57:42 +02006429 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006430
6431 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6432
Matan Barakb4ff3a32016-02-09 14:57:42 +02006433 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006434
6435 u8 pas[0][0x40];
6436};
6437
6438struct mlx5_ifc_create_tis_out_bits {
6439 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006440 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006441
6442 u8 syndrome[0x20];
6443
Matan Barakb4ff3a32016-02-09 14:57:42 +02006444 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006445 u8 tisn[0x18];
6446
Matan Barakb4ff3a32016-02-09 14:57:42 +02006447 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006448};
6449
6450struct mlx5_ifc_create_tis_in_bits {
6451 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006452 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006453
Matan Barakb4ff3a32016-02-09 14:57:42 +02006454 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006455 u8 op_mod[0x10];
6456
Matan Barakb4ff3a32016-02-09 14:57:42 +02006457 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006458
6459 struct mlx5_ifc_tisc_bits ctx;
6460};
6461
6462struct mlx5_ifc_create_tir_out_bits {
6463 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006464 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006465
6466 u8 syndrome[0x20];
6467
Matan Barakb4ff3a32016-02-09 14:57:42 +02006468 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006469 u8 tirn[0x18];
6470
Matan Barakb4ff3a32016-02-09 14:57:42 +02006471 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006472};
6473
6474struct mlx5_ifc_create_tir_in_bits {
6475 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006476 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006477
Matan Barakb4ff3a32016-02-09 14:57:42 +02006478 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006479 u8 op_mod[0x10];
6480
Matan Barakb4ff3a32016-02-09 14:57:42 +02006481 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006482
6483 struct mlx5_ifc_tirc_bits ctx;
6484};
6485
6486struct mlx5_ifc_create_srq_out_bits {
6487 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006488 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006489
6490 u8 syndrome[0x20];
6491
Matan Barakb4ff3a32016-02-09 14:57:42 +02006492 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006493 u8 srqn[0x18];
6494
Matan Barakb4ff3a32016-02-09 14:57:42 +02006495 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006496};
6497
6498struct mlx5_ifc_create_srq_in_bits {
6499 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006500 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006501
Matan Barakb4ff3a32016-02-09 14:57:42 +02006502 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006503 u8 op_mod[0x10];
6504
Matan Barakb4ff3a32016-02-09 14:57:42 +02006505 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006506
6507 struct mlx5_ifc_srqc_bits srq_context_entry;
6508
Matan Barakb4ff3a32016-02-09 14:57:42 +02006509 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006510
6511 u8 pas[0][0x40];
6512};
6513
6514struct mlx5_ifc_create_sq_out_bits {
6515 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006516 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006517
6518 u8 syndrome[0x20];
6519
Matan Barakb4ff3a32016-02-09 14:57:42 +02006520 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006521 u8 sqn[0x18];
6522
Matan Barakb4ff3a32016-02-09 14:57:42 +02006523 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006524};
6525
6526struct mlx5_ifc_create_sq_in_bits {
6527 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006528 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006529
Matan Barakb4ff3a32016-02-09 14:57:42 +02006530 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006531 u8 op_mod[0x10];
6532
Matan Barakb4ff3a32016-02-09 14:57:42 +02006533 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006534
6535 struct mlx5_ifc_sqc_bits ctx;
6536};
6537
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006538struct mlx5_ifc_create_scheduling_element_out_bits {
6539 u8 status[0x8];
6540 u8 reserved_at_8[0x18];
6541
6542 u8 syndrome[0x20];
6543
6544 u8 reserved_at_40[0x40];
6545
6546 u8 scheduling_element_id[0x20];
6547
6548 u8 reserved_at_a0[0x160];
6549};
6550
6551struct mlx5_ifc_create_scheduling_element_in_bits {
6552 u8 opcode[0x10];
6553 u8 reserved_at_10[0x10];
6554
6555 u8 reserved_at_20[0x10];
6556 u8 op_mod[0x10];
6557
6558 u8 scheduling_hierarchy[0x8];
6559 u8 reserved_at_48[0x18];
6560
6561 u8 reserved_at_60[0xa0];
6562
6563 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6564
6565 u8 reserved_at_300[0x100];
6566};
6567
Saeed Mahameede2816822015-05-28 22:28:40 +03006568struct mlx5_ifc_create_rqt_out_bits {
6569 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006570 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006571
6572 u8 syndrome[0x20];
6573
Matan Barakb4ff3a32016-02-09 14:57:42 +02006574 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006575 u8 rqtn[0x18];
6576
Matan Barakb4ff3a32016-02-09 14:57:42 +02006577 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006578};
6579
6580struct mlx5_ifc_create_rqt_in_bits {
6581 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006582 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006583
Matan Barakb4ff3a32016-02-09 14:57:42 +02006584 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006585 u8 op_mod[0x10];
6586
Matan Barakb4ff3a32016-02-09 14:57:42 +02006587 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006588
6589 struct mlx5_ifc_rqtc_bits rqt_context;
6590};
6591
6592struct mlx5_ifc_create_rq_out_bits {
6593 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006594 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006595
6596 u8 syndrome[0x20];
6597
Matan Barakb4ff3a32016-02-09 14:57:42 +02006598 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006599 u8 rqn[0x18];
6600
Matan Barakb4ff3a32016-02-09 14:57:42 +02006601 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006602};
6603
6604struct mlx5_ifc_create_rq_in_bits {
6605 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006606 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006607
Matan Barakb4ff3a32016-02-09 14:57:42 +02006608 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006609 u8 op_mod[0x10];
6610
Matan Barakb4ff3a32016-02-09 14:57:42 +02006611 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006612
6613 struct mlx5_ifc_rqc_bits ctx;
6614};
6615
6616struct mlx5_ifc_create_rmp_out_bits {
6617 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006618 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006619
6620 u8 syndrome[0x20];
6621
Matan Barakb4ff3a32016-02-09 14:57:42 +02006622 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006623 u8 rmpn[0x18];
6624
Matan Barakb4ff3a32016-02-09 14:57:42 +02006625 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006626};
6627
6628struct mlx5_ifc_create_rmp_in_bits {
6629 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006630 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006631
Matan Barakb4ff3a32016-02-09 14:57:42 +02006632 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006633 u8 op_mod[0x10];
6634
Matan Barakb4ff3a32016-02-09 14:57:42 +02006635 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006636
6637 struct mlx5_ifc_rmpc_bits ctx;
6638};
6639
6640struct mlx5_ifc_create_qp_out_bits {
6641 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006642 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006643
6644 u8 syndrome[0x20];
6645
Matan Barakb4ff3a32016-02-09 14:57:42 +02006646 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006647 u8 qpn[0x18];
6648
Matan Barakb4ff3a32016-02-09 14:57:42 +02006649 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006650};
6651
6652struct mlx5_ifc_create_qp_in_bits {
6653 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006654 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006655
Matan Barakb4ff3a32016-02-09 14:57:42 +02006656 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006657 u8 op_mod[0x10];
6658
Matan Barakb4ff3a32016-02-09 14:57:42 +02006659 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006660
6661 u8 opt_param_mask[0x20];
6662
Matan Barakb4ff3a32016-02-09 14:57:42 +02006663 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006664
6665 struct mlx5_ifc_qpc_bits qpc;
6666
Matan Barakb4ff3a32016-02-09 14:57:42 +02006667 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006668
6669 u8 pas[0][0x40];
6670};
6671
6672struct mlx5_ifc_create_psv_out_bits {
6673 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006674 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006675
6676 u8 syndrome[0x20];
6677
Matan Barakb4ff3a32016-02-09 14:57:42 +02006678 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006679
Matan Barakb4ff3a32016-02-09 14:57:42 +02006680 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006681 u8 psv0_index[0x18];
6682
Matan Barakb4ff3a32016-02-09 14:57:42 +02006683 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006684 u8 psv1_index[0x18];
6685
Matan Barakb4ff3a32016-02-09 14:57:42 +02006686 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006687 u8 psv2_index[0x18];
6688
Matan Barakb4ff3a32016-02-09 14:57:42 +02006689 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006690 u8 psv3_index[0x18];
6691};
6692
6693struct mlx5_ifc_create_psv_in_bits {
6694 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006695 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006696
Matan Barakb4ff3a32016-02-09 14:57:42 +02006697 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006698 u8 op_mod[0x10];
6699
6700 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006701 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006702 u8 pd[0x18];
6703
Matan Barakb4ff3a32016-02-09 14:57:42 +02006704 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006705};
6706
6707struct mlx5_ifc_create_mkey_out_bits {
6708 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006709 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006710
6711 u8 syndrome[0x20];
6712
Matan Barakb4ff3a32016-02-09 14:57:42 +02006713 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006714 u8 mkey_index[0x18];
6715
Matan Barakb4ff3a32016-02-09 14:57:42 +02006716 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006717};
6718
6719struct mlx5_ifc_create_mkey_in_bits {
6720 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006721 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006722
Matan Barakb4ff3a32016-02-09 14:57:42 +02006723 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006724 u8 op_mod[0x10];
6725
Matan Barakb4ff3a32016-02-09 14:57:42 +02006726 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006727
6728 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006729 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006730
6731 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6732
Matan Barakb4ff3a32016-02-09 14:57:42 +02006733 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006734
6735 u8 translations_octword_actual_size[0x20];
6736
Matan Barakb4ff3a32016-02-09 14:57:42 +02006737 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006738
6739 u8 klm_pas_mtt[0][0x20];
6740};
6741
6742struct mlx5_ifc_create_flow_table_out_bits {
6743 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006744 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006745
6746 u8 syndrome[0x20];
6747
Matan Barakb4ff3a32016-02-09 14:57:42 +02006748 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006749 u8 table_id[0x18];
6750
Matan Barakb4ff3a32016-02-09 14:57:42 +02006751 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006752};
6753
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006754struct mlx5_ifc_flow_table_context_bits {
6755 u8 encap_en[0x1];
6756 u8 decap_en[0x1];
6757 u8 reserved_at_2[0x2];
6758 u8 table_miss_action[0x4];
6759 u8 level[0x8];
6760 u8 reserved_at_10[0x8];
6761 u8 log_size[0x8];
6762
6763 u8 reserved_at_20[0x8];
6764 u8 table_miss_id[0x18];
6765
6766 u8 reserved_at_40[0x8];
6767 u8 lag_master_next_table_id[0x18];
6768
6769 u8 reserved_at_60[0xe0];
6770};
6771
Saeed Mahameede2816822015-05-28 22:28:40 +03006772struct mlx5_ifc_create_flow_table_in_bits {
6773 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006774 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006775
Matan Barakb4ff3a32016-02-09 14:57:42 +02006776 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006777 u8 op_mod[0x10];
6778
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006779 u8 other_vport[0x1];
6780 u8 reserved_at_41[0xf];
6781 u8 vport_number[0x10];
6782
6783 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006784
6785 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006786 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006787
Matan Barakb4ff3a32016-02-09 14:57:42 +02006788 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006789
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006790 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006791};
6792
6793struct mlx5_ifc_create_flow_group_out_bits {
6794 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006795 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006796
6797 u8 syndrome[0x20];
6798
Matan Barakb4ff3a32016-02-09 14:57:42 +02006799 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006800 u8 group_id[0x18];
6801
Matan Barakb4ff3a32016-02-09 14:57:42 +02006802 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006803};
6804
6805enum {
6806 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6807 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6808 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6809};
6810
6811struct mlx5_ifc_create_flow_group_in_bits {
6812 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006813 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006814
Matan Barakb4ff3a32016-02-09 14:57:42 +02006815 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006816 u8 op_mod[0x10];
6817
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006818 u8 other_vport[0x1];
6819 u8 reserved_at_41[0xf];
6820 u8 vport_number[0x10];
6821
6822 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006823
6824 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006825 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006826
Matan Barakb4ff3a32016-02-09 14:57:42 +02006827 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006828 u8 table_id[0x18];
6829
Matan Barakb4ff3a32016-02-09 14:57:42 +02006830 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006831
6832 u8 start_flow_index[0x20];
6833
Matan Barakb4ff3a32016-02-09 14:57:42 +02006834 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006835
6836 u8 end_flow_index[0x20];
6837
Matan Barakb4ff3a32016-02-09 14:57:42 +02006838 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006839
Matan Barakb4ff3a32016-02-09 14:57:42 +02006840 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006841 u8 match_criteria_enable[0x8];
6842
6843 struct mlx5_ifc_fte_match_param_bits match_criteria;
6844
Matan Barakb4ff3a32016-02-09 14:57:42 +02006845 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006846};
6847
6848struct mlx5_ifc_create_eq_out_bits {
6849 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006850 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006851
6852 u8 syndrome[0x20];
6853
Matan Barakb4ff3a32016-02-09 14:57:42 +02006854 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006855 u8 eq_number[0x8];
6856
Matan Barakb4ff3a32016-02-09 14:57:42 +02006857 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006858};
6859
6860struct mlx5_ifc_create_eq_in_bits {
6861 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006862 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006863
Matan Barakb4ff3a32016-02-09 14:57:42 +02006864 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006865 u8 op_mod[0x10];
6866
Matan Barakb4ff3a32016-02-09 14:57:42 +02006867 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006868
6869 struct mlx5_ifc_eqc_bits eq_context_entry;
6870
Matan Barakb4ff3a32016-02-09 14:57:42 +02006871 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006872
6873 u8 event_bitmask[0x40];
6874
Matan Barakb4ff3a32016-02-09 14:57:42 +02006875 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006876
6877 u8 pas[0][0x40];
6878};
6879
6880struct mlx5_ifc_create_dct_out_bits {
6881 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006882 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006883
6884 u8 syndrome[0x20];
6885
Matan Barakb4ff3a32016-02-09 14:57:42 +02006886 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006887 u8 dctn[0x18];
6888
Matan Barakb4ff3a32016-02-09 14:57:42 +02006889 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006890};
6891
6892struct mlx5_ifc_create_dct_in_bits {
6893 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006894 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006895
Matan Barakb4ff3a32016-02-09 14:57:42 +02006896 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006897 u8 op_mod[0x10];
6898
Matan Barakb4ff3a32016-02-09 14:57:42 +02006899 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006900
6901 struct mlx5_ifc_dctc_bits dct_context_entry;
6902
Matan Barakb4ff3a32016-02-09 14:57:42 +02006903 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006904};
6905
6906struct mlx5_ifc_create_cq_out_bits {
6907 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006908 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006909
6910 u8 syndrome[0x20];
6911
Matan Barakb4ff3a32016-02-09 14:57:42 +02006912 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006913 u8 cqn[0x18];
6914
Matan Barakb4ff3a32016-02-09 14:57:42 +02006915 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006916};
6917
6918struct mlx5_ifc_create_cq_in_bits {
6919 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006920 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006921
Matan Barakb4ff3a32016-02-09 14:57:42 +02006922 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006923 u8 op_mod[0x10];
6924
Matan Barakb4ff3a32016-02-09 14:57:42 +02006925 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006926
6927 struct mlx5_ifc_cqc_bits cq_context;
6928
Matan Barakb4ff3a32016-02-09 14:57:42 +02006929 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006930
6931 u8 pas[0][0x40];
6932};
6933
6934struct mlx5_ifc_config_int_moderation_out_bits {
6935 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006936 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006937
6938 u8 syndrome[0x20];
6939
Matan Barakb4ff3a32016-02-09 14:57:42 +02006940 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006941 u8 min_delay[0xc];
6942 u8 int_vector[0x10];
6943
Matan Barakb4ff3a32016-02-09 14:57:42 +02006944 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006945};
6946
6947enum {
6948 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6949 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6950};
6951
6952struct mlx5_ifc_config_int_moderation_in_bits {
6953 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006954 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006955
Matan Barakb4ff3a32016-02-09 14:57:42 +02006956 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006957 u8 op_mod[0x10];
6958
Matan Barakb4ff3a32016-02-09 14:57:42 +02006959 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006960 u8 min_delay[0xc];
6961 u8 int_vector[0x10];
6962
Matan Barakb4ff3a32016-02-09 14:57:42 +02006963 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006964};
6965
6966struct mlx5_ifc_attach_to_mcg_out_bits {
6967 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006968 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006969
6970 u8 syndrome[0x20];
6971
Matan Barakb4ff3a32016-02-09 14:57:42 +02006972 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006973};
6974
6975struct mlx5_ifc_attach_to_mcg_in_bits {
6976 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006977 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006978
Matan Barakb4ff3a32016-02-09 14:57:42 +02006979 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006980 u8 op_mod[0x10];
6981
Matan Barakb4ff3a32016-02-09 14:57:42 +02006982 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006983 u8 qpn[0x18];
6984
Matan Barakb4ff3a32016-02-09 14:57:42 +02006985 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006986
6987 u8 multicast_gid[16][0x8];
6988};
6989
Saeed Mahameed74862162016-06-09 15:11:34 +03006990struct mlx5_ifc_arm_xrq_out_bits {
6991 u8 status[0x8];
6992 u8 reserved_at_8[0x18];
6993
6994 u8 syndrome[0x20];
6995
6996 u8 reserved_at_40[0x40];
6997};
6998
6999struct mlx5_ifc_arm_xrq_in_bits {
7000 u8 opcode[0x10];
7001 u8 reserved_at_10[0x10];
7002
7003 u8 reserved_at_20[0x10];
7004 u8 op_mod[0x10];
7005
7006 u8 reserved_at_40[0x8];
7007 u8 xrqn[0x18];
7008
7009 u8 reserved_at_60[0x10];
7010 u8 lwm[0x10];
7011};
7012
Saeed Mahameede2816822015-05-28 22:28:40 +03007013struct mlx5_ifc_arm_xrc_srq_out_bits {
7014 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007015 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007016
7017 u8 syndrome[0x20];
7018
Matan Barakb4ff3a32016-02-09 14:57:42 +02007019 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007020};
7021
7022enum {
7023 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7024};
7025
7026struct mlx5_ifc_arm_xrc_srq_in_bits {
7027 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007028 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007029
Matan Barakb4ff3a32016-02-09 14:57:42 +02007030 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007031 u8 op_mod[0x10];
7032
Matan Barakb4ff3a32016-02-09 14:57:42 +02007033 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007034 u8 xrc_srqn[0x18];
7035
Matan Barakb4ff3a32016-02-09 14:57:42 +02007036 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007037 u8 lwm[0x10];
7038};
7039
7040struct mlx5_ifc_arm_rq_out_bits {
7041 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007042 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007043
7044 u8 syndrome[0x20];
7045
Matan Barakb4ff3a32016-02-09 14:57:42 +02007046 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007047};
7048
7049enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007050 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7051 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007052};
7053
7054struct mlx5_ifc_arm_rq_in_bits {
7055 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007056 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007057
Matan Barakb4ff3a32016-02-09 14:57:42 +02007058 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007059 u8 op_mod[0x10];
7060
Matan Barakb4ff3a32016-02-09 14:57:42 +02007061 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007062 u8 srq_number[0x18];
7063
Matan Barakb4ff3a32016-02-09 14:57:42 +02007064 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007065 u8 lwm[0x10];
7066};
7067
7068struct mlx5_ifc_arm_dct_out_bits {
7069 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007070 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007071
7072 u8 syndrome[0x20];
7073
Matan Barakb4ff3a32016-02-09 14:57:42 +02007074 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007075};
7076
7077struct mlx5_ifc_arm_dct_in_bits {
7078 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007079 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007080
Matan Barakb4ff3a32016-02-09 14:57:42 +02007081 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007082 u8 op_mod[0x10];
7083
Matan Barakb4ff3a32016-02-09 14:57:42 +02007084 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007085 u8 dct_number[0x18];
7086
Matan Barakb4ff3a32016-02-09 14:57:42 +02007087 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007088};
7089
7090struct mlx5_ifc_alloc_xrcd_out_bits {
7091 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007092 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007093
7094 u8 syndrome[0x20];
7095
Matan Barakb4ff3a32016-02-09 14:57:42 +02007096 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007097 u8 xrcd[0x18];
7098
Matan Barakb4ff3a32016-02-09 14:57:42 +02007099 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007100};
7101
7102struct mlx5_ifc_alloc_xrcd_in_bits {
7103 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007104 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007105
Matan Barakb4ff3a32016-02-09 14:57:42 +02007106 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007107 u8 op_mod[0x10];
7108
Matan Barakb4ff3a32016-02-09 14:57:42 +02007109 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007110};
7111
7112struct mlx5_ifc_alloc_uar_out_bits {
7113 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007114 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007115
7116 u8 syndrome[0x20];
7117
Matan Barakb4ff3a32016-02-09 14:57:42 +02007118 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007119 u8 uar[0x18];
7120
Matan Barakb4ff3a32016-02-09 14:57:42 +02007121 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007122};
7123
7124struct mlx5_ifc_alloc_uar_in_bits {
7125 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007126 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007127
Matan Barakb4ff3a32016-02-09 14:57:42 +02007128 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007129 u8 op_mod[0x10];
7130
Matan Barakb4ff3a32016-02-09 14:57:42 +02007131 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007132};
7133
7134struct mlx5_ifc_alloc_transport_domain_out_bits {
7135 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007136 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007137
7138 u8 syndrome[0x20];
7139
Matan Barakb4ff3a32016-02-09 14:57:42 +02007140 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007141 u8 transport_domain[0x18];
7142
Matan Barakb4ff3a32016-02-09 14:57:42 +02007143 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007144};
7145
7146struct mlx5_ifc_alloc_transport_domain_in_bits {
7147 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007148 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007149
Matan Barakb4ff3a32016-02-09 14:57:42 +02007150 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007151 u8 op_mod[0x10];
7152
Matan Barakb4ff3a32016-02-09 14:57:42 +02007153 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007154};
7155
7156struct mlx5_ifc_alloc_q_counter_out_bits {
7157 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007158 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007159
7160 u8 syndrome[0x20];
7161
Matan Barakb4ff3a32016-02-09 14:57:42 +02007162 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007163 u8 counter_set_id[0x8];
7164
Matan Barakb4ff3a32016-02-09 14:57:42 +02007165 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007166};
7167
7168struct mlx5_ifc_alloc_q_counter_in_bits {
7169 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007170 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007171
Matan Barakb4ff3a32016-02-09 14:57:42 +02007172 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007173 u8 op_mod[0x10];
7174
Matan Barakb4ff3a32016-02-09 14:57:42 +02007175 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007176};
7177
7178struct mlx5_ifc_alloc_pd_out_bits {
7179 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007180 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007181
7182 u8 syndrome[0x20];
7183
Matan Barakb4ff3a32016-02-09 14:57:42 +02007184 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007185 u8 pd[0x18];
7186
Matan Barakb4ff3a32016-02-09 14:57:42 +02007187 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007188};
7189
7190struct mlx5_ifc_alloc_pd_in_bits {
7191 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007192 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007193
Matan Barakb4ff3a32016-02-09 14:57:42 +02007194 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007195 u8 op_mod[0x10];
7196
Matan Barakb4ff3a32016-02-09 14:57:42 +02007197 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007198};
7199
Amir Vadai9dc0b282016-05-13 12:55:39 +00007200struct mlx5_ifc_alloc_flow_counter_out_bits {
7201 u8 status[0x8];
7202 u8 reserved_at_8[0x18];
7203
7204 u8 syndrome[0x20];
7205
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007206 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007207
7208 u8 reserved_at_60[0x20];
7209};
7210
7211struct mlx5_ifc_alloc_flow_counter_in_bits {
7212 u8 opcode[0x10];
7213 u8 reserved_at_10[0x10];
7214
7215 u8 reserved_at_20[0x10];
7216 u8 op_mod[0x10];
7217
7218 u8 reserved_at_40[0x40];
7219};
7220
Saeed Mahameede2816822015-05-28 22:28:40 +03007221struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7222 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007223 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007224
7225 u8 syndrome[0x20];
7226
Matan Barakb4ff3a32016-02-09 14:57:42 +02007227 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007228};
7229
7230struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7231 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007232 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007233
Matan Barakb4ff3a32016-02-09 14:57:42 +02007234 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007235 u8 op_mod[0x10];
7236
Matan Barakb4ff3a32016-02-09 14:57:42 +02007237 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007238
Matan Barakb4ff3a32016-02-09 14:57:42 +02007239 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007240 u8 vxlan_udp_port[0x10];
7241};
7242
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007243struct mlx5_ifc_set_pp_rate_limit_out_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007244 u8 status[0x8];
7245 u8 reserved_at_8[0x18];
7246
7247 u8 syndrome[0x20];
7248
7249 u8 reserved_at_40[0x40];
7250};
7251
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007252struct mlx5_ifc_set_pp_rate_limit_in_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007253 u8 opcode[0x10];
7254 u8 reserved_at_10[0x10];
7255
7256 u8 reserved_at_20[0x10];
7257 u8 op_mod[0x10];
7258
7259 u8 reserved_at_40[0x10];
7260 u8 rate_limit_index[0x10];
7261
7262 u8 reserved_at_60[0x20];
7263
7264 u8 rate_limit[0x20];
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007265
7266 u8 reserved_at_a0[0x160];
Saeed Mahameed74862162016-06-09 15:11:34 +03007267};
7268
Saeed Mahameede2816822015-05-28 22:28:40 +03007269struct mlx5_ifc_access_register_out_bits {
7270 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007271 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007272
7273 u8 syndrome[0x20];
7274
Matan Barakb4ff3a32016-02-09 14:57:42 +02007275 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007276
7277 u8 register_data[0][0x20];
7278};
7279
7280enum {
7281 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7282 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7283};
7284
7285struct mlx5_ifc_access_register_in_bits {
7286 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007287 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007288
Matan Barakb4ff3a32016-02-09 14:57:42 +02007289 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007290 u8 op_mod[0x10];
7291
Matan Barakb4ff3a32016-02-09 14:57:42 +02007292 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007293 u8 register_id[0x10];
7294
7295 u8 argument[0x20];
7296
7297 u8 register_data[0][0x20];
7298};
7299
7300struct mlx5_ifc_sltp_reg_bits {
7301 u8 status[0x4];
7302 u8 version[0x4];
7303 u8 local_port[0x8];
7304 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007305 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007306 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007307 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007308
Matan Barakb4ff3a32016-02-09 14:57:42 +02007309 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007310
Matan Barakb4ff3a32016-02-09 14:57:42 +02007311 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007312 u8 polarity[0x1];
7313 u8 ob_tap0[0x8];
7314 u8 ob_tap1[0x8];
7315 u8 ob_tap2[0x8];
7316
Matan Barakb4ff3a32016-02-09 14:57:42 +02007317 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007318 u8 ob_preemp_mode[0x4];
7319 u8 ob_reg[0x8];
7320 u8 ob_bias[0x8];
7321
Matan Barakb4ff3a32016-02-09 14:57:42 +02007322 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007323};
7324
7325struct mlx5_ifc_slrg_reg_bits {
7326 u8 status[0x4];
7327 u8 version[0x4];
7328 u8 local_port[0x8];
7329 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007330 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007331 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007332 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007333
7334 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007335 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007336 u8 grade_lane_speed[0x4];
7337
7338 u8 grade_version[0x8];
7339 u8 grade[0x18];
7340
Matan Barakb4ff3a32016-02-09 14:57:42 +02007341 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007342 u8 height_grade_type[0x4];
7343 u8 height_grade[0x18];
7344
7345 u8 height_dz[0x10];
7346 u8 height_dv[0x10];
7347
Matan Barakb4ff3a32016-02-09 14:57:42 +02007348 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007349 u8 height_sigma[0x10];
7350
Matan Barakb4ff3a32016-02-09 14:57:42 +02007351 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007352
Matan Barakb4ff3a32016-02-09 14:57:42 +02007353 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007354 u8 phase_grade_type[0x4];
7355 u8 phase_grade[0x18];
7356
Matan Barakb4ff3a32016-02-09 14:57:42 +02007357 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007358 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007359 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007360 u8 phase_eo_neg[0x8];
7361
7362 u8 ffe_set_tested[0x10];
7363 u8 test_errors_per_lane[0x10];
7364};
7365
7366struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007367 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007368 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007369 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007370
Matan Barakb4ff3a32016-02-09 14:57:42 +02007371 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007372 u8 vl_hw_cap[0x4];
7373
Matan Barakb4ff3a32016-02-09 14:57:42 +02007374 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007375 u8 vl_admin[0x4];
7376
Matan Barakb4ff3a32016-02-09 14:57:42 +02007377 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007378 u8 vl_operational[0x4];
7379};
7380
7381struct mlx5_ifc_pude_reg_bits {
7382 u8 swid[0x8];
7383 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007384 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007385 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007386 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007387 u8 oper_status[0x4];
7388
Matan Barakb4ff3a32016-02-09 14:57:42 +02007389 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007390};
7391
7392struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007393 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007394 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007395 u8 an_disable_cap[0x1];
7396 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007397 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007398 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007399 u8 proto_mask[0x3];
7400
Saeed Mahameed74862162016-06-09 15:11:34 +03007401 u8 an_status[0x4];
7402 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007403
7404 u8 eth_proto_capability[0x20];
7405
7406 u8 ib_link_width_capability[0x10];
7407 u8 ib_proto_capability[0x10];
7408
Matan Barakb4ff3a32016-02-09 14:57:42 +02007409 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007410
7411 u8 eth_proto_admin[0x20];
7412
7413 u8 ib_link_width_admin[0x10];
7414 u8 ib_proto_admin[0x10];
7415
Matan Barakb4ff3a32016-02-09 14:57:42 +02007416 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007417
7418 u8 eth_proto_oper[0x20];
7419
7420 u8 ib_link_width_oper[0x10];
7421 u8 ib_proto_oper[0x10];
7422
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007423 u8 reserved_at_160[0x1c];
7424 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007425
7426 u8 eth_proto_lp_advertise[0x20];
7427
Matan Barakb4ff3a32016-02-09 14:57:42 +02007428 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007429};
7430
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007431struct mlx5_ifc_mlcr_reg_bits {
7432 u8 reserved_at_0[0x8];
7433 u8 local_port[0x8];
7434 u8 reserved_at_10[0x20];
7435
7436 u8 beacon_duration[0x10];
7437 u8 reserved_at_40[0x10];
7438
7439 u8 beacon_remain[0x10];
7440};
7441
Saeed Mahameede2816822015-05-28 22:28:40 +03007442struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007443 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007444
7445 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007446 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007447 u8 repetitions_mode[0x4];
7448 u8 num_of_repetitions[0x8];
7449
7450 u8 grade_version[0x8];
7451 u8 height_grade_type[0x4];
7452 u8 phase_grade_type[0x4];
7453 u8 height_grade_weight[0x8];
7454 u8 phase_grade_weight[0x8];
7455
7456 u8 gisim_measure_bits[0x10];
7457 u8 adaptive_tap_measure_bits[0x10];
7458
7459 u8 ber_bath_high_error_threshold[0x10];
7460 u8 ber_bath_mid_error_threshold[0x10];
7461
7462 u8 ber_bath_low_error_threshold[0x10];
7463 u8 one_ratio_high_threshold[0x10];
7464
7465 u8 one_ratio_high_mid_threshold[0x10];
7466 u8 one_ratio_low_mid_threshold[0x10];
7467
7468 u8 one_ratio_low_threshold[0x10];
7469 u8 ndeo_error_threshold[0x10];
7470
7471 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007472 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007473 u8 mix90_phase_for_voltage_bath[0x8];
7474
7475 u8 mixer_offset_start[0x10];
7476 u8 mixer_offset_end[0x10];
7477
Matan Barakb4ff3a32016-02-09 14:57:42 +02007478 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007479 u8 ber_test_time[0xb];
7480};
7481
7482struct mlx5_ifc_pspa_reg_bits {
7483 u8 swid[0x8];
7484 u8 local_port[0x8];
7485 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007486 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007487
Matan Barakb4ff3a32016-02-09 14:57:42 +02007488 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007489};
7490
7491struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007492 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007493 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007494 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007495 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007496 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007497 u8 mode[0x2];
7498
Matan Barakb4ff3a32016-02-09 14:57:42 +02007499 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007500
Matan Barakb4ff3a32016-02-09 14:57:42 +02007501 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007502 u8 min_threshold[0x10];
7503
Matan Barakb4ff3a32016-02-09 14:57:42 +02007504 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007505 u8 max_threshold[0x10];
7506
Matan Barakb4ff3a32016-02-09 14:57:42 +02007507 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007508 u8 mark_probability_denominator[0x10];
7509
Matan Barakb4ff3a32016-02-09 14:57:42 +02007510 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007511};
7512
7513struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007514 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007515 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007516 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007517
Matan Barakb4ff3a32016-02-09 14:57:42 +02007518 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007519
Matan Barakb4ff3a32016-02-09 14:57:42 +02007520 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007521 u8 wrps_admin[0x4];
7522
Matan Barakb4ff3a32016-02-09 14:57:42 +02007523 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007524 u8 wrps_status[0x4];
7525
Matan Barakb4ff3a32016-02-09 14:57:42 +02007526 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007527 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007528 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007529 u8 down_threshold[0x8];
7530
Matan Barakb4ff3a32016-02-09 14:57:42 +02007531 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007532
Matan Barakb4ff3a32016-02-09 14:57:42 +02007533 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007534 u8 srps_admin[0x4];
7535
Matan Barakb4ff3a32016-02-09 14:57:42 +02007536 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007537 u8 srps_status[0x4];
7538
Matan Barakb4ff3a32016-02-09 14:57:42 +02007539 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007540};
7541
7542struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007543 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007544 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007545 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007546
Matan Barakb4ff3a32016-02-09 14:57:42 +02007547 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007548 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007549 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007550 u8 lb_en[0x8];
7551};
7552
7553struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007554 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007555 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007556 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007557
Matan Barakb4ff3a32016-02-09 14:57:42 +02007558 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007559
7560 u8 port_profile_mode[0x8];
7561 u8 static_port_profile[0x8];
7562 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007563 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007564
7565 u8 retransmission_active[0x8];
7566 u8 fec_mode_active[0x18];
7567
Matan Barakb4ff3a32016-02-09 14:57:42 +02007568 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007569};
7570
7571struct mlx5_ifc_ppcnt_reg_bits {
7572 u8 swid[0x8];
7573 u8 local_port[0x8];
7574 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007575 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007576 u8 grp[0x6];
7577
7578 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007579 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007580 u8 prio_tc[0x3];
7581
7582 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7583};
7584
Gal Pressman8ed1a632016-11-17 13:46:01 +02007585struct mlx5_ifc_mpcnt_reg_bits {
7586 u8 reserved_at_0[0x8];
7587 u8 pcie_index[0x8];
7588 u8 reserved_at_10[0xa];
7589 u8 grp[0x6];
7590
7591 u8 clr[0x1];
7592 u8 reserved_at_21[0x1f];
7593
7594 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7595};
7596
Saeed Mahameede2816822015-05-28 22:28:40 +03007597struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007598 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007599 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007600 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007601 u8 local_port[0x8];
7602 u8 mac_47_32[0x10];
7603
7604 u8 mac_31_0[0x20];
7605
Matan Barakb4ff3a32016-02-09 14:57:42 +02007606 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007607};
7608
7609struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007610 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007611 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007612 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007613
7614 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007615 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007616
7617 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007618 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007619
7620 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007621 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007622};
7623
7624struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007625 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007626 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007627 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007628
Matan Barakb4ff3a32016-02-09 14:57:42 +02007629 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007630 u8 attenuation_5g[0x8];
7631
Matan Barakb4ff3a32016-02-09 14:57:42 +02007632 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007633 u8 attenuation_7g[0x8];
7634
Matan Barakb4ff3a32016-02-09 14:57:42 +02007635 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007636 u8 attenuation_12g[0x8];
7637};
7638
7639struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007640 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007641 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007642 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007643 u8 module_status[0x4];
7644
Matan Barakb4ff3a32016-02-09 14:57:42 +02007645 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007646};
7647
7648struct mlx5_ifc_pmpc_reg_bits {
7649 u8 module_state_updated[32][0x8];
7650};
7651
7652struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007653 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007654 u8 mlpn_status[0x4];
7655 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007656 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007657
7658 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007659 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007660};
7661
7662struct mlx5_ifc_pmlp_reg_bits {
7663 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007664 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007665 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007666 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007667 u8 width[0x8];
7668
7669 u8 lane0_module_mapping[0x20];
7670
7671 u8 lane1_module_mapping[0x20];
7672
7673 u8 lane2_module_mapping[0x20];
7674
7675 u8 lane3_module_mapping[0x20];
7676
Matan Barakb4ff3a32016-02-09 14:57:42 +02007677 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007678};
7679
7680struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007681 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007682 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007683 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007684 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007685 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007686 u8 oper_status[0x4];
7687
7688 u8 ase[0x1];
7689 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007690 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007691 u8 e[0x2];
7692
Matan Barakb4ff3a32016-02-09 14:57:42 +02007693 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007694};
7695
7696struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007697 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007698 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007699 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007700 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007701 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007702
Matan Barakb4ff3a32016-02-09 14:57:42 +02007703 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007704 u8 lane_speed[0x10];
7705
Matan Barakb4ff3a32016-02-09 14:57:42 +02007706 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007707 u8 lpbf[0x1];
7708 u8 fec_mode_policy[0x8];
7709
7710 u8 retransmission_capability[0x8];
7711 u8 fec_mode_capability[0x18];
7712
7713 u8 retransmission_support_admin[0x8];
7714 u8 fec_mode_support_admin[0x18];
7715
7716 u8 retransmission_request_admin[0x8];
7717 u8 fec_mode_request_admin[0x18];
7718
Matan Barakb4ff3a32016-02-09 14:57:42 +02007719 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007720};
7721
7722struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007723 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007724 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007725 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007726 u8 ib_port[0x8];
7727
Matan Barakb4ff3a32016-02-09 14:57:42 +02007728 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007729};
7730
7731struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007732 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007733 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007734 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007735 u8 lbf_mode[0x3];
7736
Matan Barakb4ff3a32016-02-09 14:57:42 +02007737 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007738};
7739
7740struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007741 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007742 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007743 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007744
7745 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007746 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007747 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007748 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007749};
7750
7751struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007752 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007753 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007754 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007755
Matan Barakb4ff3a32016-02-09 14:57:42 +02007756 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007757
7758 u8 port_filter[8][0x20];
7759
7760 u8 port_filter_update_en[8][0x20];
7761};
7762
7763struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007764 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007765 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007766 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007767
7768 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007769 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007770 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007771 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007772 u8 prio_mask_rx[0x8];
7773
7774 u8 pptx[0x1];
7775 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007776 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007777 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007778 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007779
7780 u8 pprx[0x1];
7781 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007782 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007783 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007784 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007785
Matan Barakb4ff3a32016-02-09 14:57:42 +02007786 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007787};
7788
7789struct mlx5_ifc_pelc_reg_bits {
7790 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007791 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007792 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007793 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007794
7795 u8 op_admin[0x8];
7796 u8 op_capability[0x8];
7797 u8 op_request[0x8];
7798 u8 op_active[0x8];
7799
7800 u8 admin[0x40];
7801
7802 u8 capability[0x40];
7803
7804 u8 request[0x40];
7805
7806 u8 active[0x40];
7807
Matan Barakb4ff3a32016-02-09 14:57:42 +02007808 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007809};
7810
7811struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007812 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007813 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007814 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007815
Matan Barakb4ff3a32016-02-09 14:57:42 +02007816 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007817 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007818 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007819
Matan Barakb4ff3a32016-02-09 14:57:42 +02007820 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007821 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007822 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007823 u8 error_type[0x8];
7824};
7825
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007826struct mlx5_ifc_pcam_enhanced_features_bits {
Gal Pressman2dba0792017-06-18 14:56:45 +03007827 u8 reserved_at_0[0x7b];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007828
Gal Pressman2dba0792017-06-18 14:56:45 +03007829 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007830 u8 ptys_connector_type[0x1];
7831 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007832 u8 ppcnt_discard_group[0x1];
7833 u8 ppcnt_statistical_group[0x1];
7834};
7835
7836struct mlx5_ifc_pcam_reg_bits {
7837 u8 reserved_at_0[0x8];
7838 u8 feature_group[0x8];
7839 u8 reserved_at_10[0x8];
7840 u8 access_reg_group[0x8];
7841
7842 u8 reserved_at_20[0x20];
7843
7844 union {
7845 u8 reserved_at_0[0x80];
7846 } port_access_reg_cap_mask;
7847
7848 u8 reserved_at_c0[0x80];
7849
7850 union {
7851 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7852 u8 reserved_at_0[0x80];
7853 } feature_cap_mask;
7854
7855 u8 reserved_at_1c0[0xc0];
7856};
7857
7858struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03007859 u8 reserved_at_0[0x7b];
7860 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03007861 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007862 u8 mtpps_enh_out_per_adj[0x1];
7863 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007864 u8 pcie_performance_group[0x1];
7865};
7866
Or Gerlitz0ab87742017-06-11 15:25:38 +03007867struct mlx5_ifc_mcam_access_reg_bits {
7868 u8 reserved_at_0[0x1c];
7869 u8 mcda[0x1];
7870 u8 mcc[0x1];
7871 u8 mcqi[0x1];
7872 u8 reserved_at_1f[0x1];
7873
7874 u8 regs_95_to_64[0x20];
7875 u8 regs_63_to_32[0x20];
7876 u8 regs_31_to_0[0x20];
7877};
7878
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007879struct mlx5_ifc_mcam_reg_bits {
7880 u8 reserved_at_0[0x8];
7881 u8 feature_group[0x8];
7882 u8 reserved_at_10[0x8];
7883 u8 access_reg_group[0x8];
7884
7885 u8 reserved_at_20[0x20];
7886
7887 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007888 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007889 u8 reserved_at_0[0x80];
7890 } mng_access_reg_cap_mask;
7891
7892 u8 reserved_at_c0[0x80];
7893
7894 union {
7895 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7896 u8 reserved_at_0[0x80];
7897 } mng_feature_cap_mask;
7898
7899 u8 reserved_at_1c0[0x80];
7900};
7901
Huy Nguyenc02762e2017-07-18 16:03:17 -05007902struct mlx5_ifc_qcam_access_reg_cap_mask {
7903 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
7904 u8 qpdpm[0x1];
7905 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
7906 u8 qdpm[0x1];
7907 u8 qpts[0x1];
7908 u8 qcap[0x1];
7909 u8 qcam_access_reg_cap_mask_0[0x1];
7910};
7911
7912struct mlx5_ifc_qcam_qos_feature_cap_mask {
7913 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
7914 u8 qpts_trust_both[0x1];
7915};
7916
7917struct mlx5_ifc_qcam_reg_bits {
7918 u8 reserved_at_0[0x8];
7919 u8 feature_group[0x8];
7920 u8 reserved_at_10[0x8];
7921 u8 access_reg_group[0x8];
7922 u8 reserved_at_20[0x20];
7923
7924 union {
7925 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
7926 u8 reserved_at_0[0x80];
7927 } qos_access_reg_cap_mask;
7928
7929 u8 reserved_at_c0[0x80];
7930
7931 union {
7932 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
7933 u8 reserved_at_0[0x80];
7934 } qos_feature_cap_mask;
7935
7936 u8 reserved_at_1c0[0x80];
7937};
7938
Saeed Mahameede2816822015-05-28 22:28:40 +03007939struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007940 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007941 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007942 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007943
7944 u8 port_capability_mask[4][0x20];
7945};
7946
7947struct mlx5_ifc_paos_reg_bits {
7948 u8 swid[0x8];
7949 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007950 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007951 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007952 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007953 u8 oper_status[0x4];
7954
7955 u8 ase[0x1];
7956 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007957 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007958 u8 e[0x2];
7959
Matan Barakb4ff3a32016-02-09 14:57:42 +02007960 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007961};
7962
7963struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007964 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007965 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007966 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007967 u8 opamp_group_type[0x4];
7968
7969 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007970 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007971 u8 num_of_indices[0xc];
7972
7973 u8 index_data[18][0x10];
7974};
7975
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007976struct mlx5_ifc_pcmr_reg_bits {
7977 u8 reserved_at_0[0x8];
7978 u8 local_port[0x8];
7979 u8 reserved_at_10[0x2e];
7980 u8 fcs_cap[0x1];
7981 u8 reserved_at_3f[0x1f];
7982 u8 fcs_chk[0x1];
7983 u8 reserved_at_5f[0x1];
7984};
7985
Saeed Mahameede2816822015-05-28 22:28:40 +03007986struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007987 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007988 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007989 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007990 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007991 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007992 u8 module[0x8];
7993};
7994
7995struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007996 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007997 u8 lossy[0x1];
7998 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007999 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008000 u8 size[0xc];
8001
8002 u8 xoff_threshold[0x10];
8003 u8 xon_threshold[0x10];
8004};
8005
8006struct mlx5_ifc_set_node_in_bits {
8007 u8 node_description[64][0x8];
8008};
8009
8010struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008011 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008012 u8 power_settings_level[0x8];
8013
Matan Barakb4ff3a32016-02-09 14:57:42 +02008014 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008015};
8016
8017struct mlx5_ifc_register_host_endianness_bits {
8018 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008019 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008020
Matan Barakb4ff3a32016-02-09 14:57:42 +02008021 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008022};
8023
8024struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008025 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008026
8027 u8 mkey[0x20];
8028
8029 u8 addressh_63_32[0x20];
8030
8031 u8 addressl_31_0[0x20];
8032};
8033
8034struct mlx5_ifc_ud_adrs_vector_bits {
8035 u8 dc_key[0x40];
8036
8037 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008038 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008039 u8 destination_qp_dct[0x18];
8040
8041 u8 static_rate[0x4];
8042 u8 sl_eth_prio[0x4];
8043 u8 fl[0x1];
8044 u8 mlid[0x7];
8045 u8 rlid_udp_sport[0x10];
8046
Matan Barakb4ff3a32016-02-09 14:57:42 +02008047 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008048
8049 u8 rmac_47_16[0x20];
8050
8051 u8 rmac_15_0[0x10];
8052 u8 tclass[0x8];
8053 u8 hop_limit[0x8];
8054
Matan Barakb4ff3a32016-02-09 14:57:42 +02008055 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008056 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008057 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008058 u8 src_addr_index[0x8];
8059 u8 flow_label[0x14];
8060
8061 u8 rgid_rip[16][0x8];
8062};
8063
8064struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008065 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008066 u8 function_id[0x10];
8067
8068 u8 num_pages[0x20];
8069
Matan Barakb4ff3a32016-02-09 14:57:42 +02008070 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008071};
8072
8073struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008074 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008075 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008076 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008077 u8 event_sub_type[0x8];
8078
Matan Barakb4ff3a32016-02-09 14:57:42 +02008079 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008080
8081 union mlx5_ifc_event_auto_bits event_data;
8082
Matan Barakb4ff3a32016-02-09 14:57:42 +02008083 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008084 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008085 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008086 u8 owner[0x1];
8087};
8088
8089enum {
8090 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8091};
8092
8093struct mlx5_ifc_cmd_queue_entry_bits {
8094 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008095 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008096
8097 u8 input_length[0x20];
8098
8099 u8 input_mailbox_pointer_63_32[0x20];
8100
8101 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008102 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008103
8104 u8 command_input_inline_data[16][0x8];
8105
8106 u8 command_output_inline_data[16][0x8];
8107
8108 u8 output_mailbox_pointer_63_32[0x20];
8109
8110 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008111 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008112
8113 u8 output_length[0x20];
8114
8115 u8 token[0x8];
8116 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008117 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008118 u8 status[0x7];
8119 u8 ownership[0x1];
8120};
8121
8122struct mlx5_ifc_cmd_out_bits {
8123 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008124 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008125
8126 u8 syndrome[0x20];
8127
8128 u8 command_output[0x20];
8129};
8130
8131struct mlx5_ifc_cmd_in_bits {
8132 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008133 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008134
Matan Barakb4ff3a32016-02-09 14:57:42 +02008135 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008136 u8 op_mod[0x10];
8137
8138 u8 command[0][0x20];
8139};
8140
8141struct mlx5_ifc_cmd_if_box_bits {
8142 u8 mailbox_data[512][0x8];
8143
Matan Barakb4ff3a32016-02-09 14:57:42 +02008144 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008145
8146 u8 next_pointer_63_32[0x20];
8147
8148 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008149 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008150
8151 u8 block_number[0x20];
8152
Matan Barakb4ff3a32016-02-09 14:57:42 +02008153 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008154 u8 token[0x8];
8155 u8 ctrl_signature[0x8];
8156 u8 signature[0x8];
8157};
8158
8159struct mlx5_ifc_mtt_bits {
8160 u8 ptag_63_32[0x20];
8161
8162 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008163 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008164 u8 wr_en[0x1];
8165 u8 rd_en[0x1];
8166};
8167
Tariq Toukan928cfe82016-02-22 18:17:29 +02008168struct mlx5_ifc_query_wol_rol_out_bits {
8169 u8 status[0x8];
8170 u8 reserved_at_8[0x18];
8171
8172 u8 syndrome[0x20];
8173
8174 u8 reserved_at_40[0x10];
8175 u8 rol_mode[0x8];
8176 u8 wol_mode[0x8];
8177
8178 u8 reserved_at_60[0x20];
8179};
8180
8181struct mlx5_ifc_query_wol_rol_in_bits {
8182 u8 opcode[0x10];
8183 u8 reserved_at_10[0x10];
8184
8185 u8 reserved_at_20[0x10];
8186 u8 op_mod[0x10];
8187
8188 u8 reserved_at_40[0x40];
8189};
8190
8191struct mlx5_ifc_set_wol_rol_out_bits {
8192 u8 status[0x8];
8193 u8 reserved_at_8[0x18];
8194
8195 u8 syndrome[0x20];
8196
8197 u8 reserved_at_40[0x40];
8198};
8199
8200struct mlx5_ifc_set_wol_rol_in_bits {
8201 u8 opcode[0x10];
8202 u8 reserved_at_10[0x10];
8203
8204 u8 reserved_at_20[0x10];
8205 u8 op_mod[0x10];
8206
8207 u8 rol_mode_valid[0x1];
8208 u8 wol_mode_valid[0x1];
8209 u8 reserved_at_42[0xe];
8210 u8 rol_mode[0x8];
8211 u8 wol_mode[0x8];
8212
8213 u8 reserved_at_60[0x20];
8214};
8215
Saeed Mahameede2816822015-05-28 22:28:40 +03008216enum {
8217 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8218 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8219 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8220};
8221
8222enum {
8223 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8224 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8225 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8226};
8227
8228enum {
8229 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8230 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8231 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8232 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8233 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8234 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8235 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8236 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8237 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8238 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8239 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8240};
8241
8242struct mlx5_ifc_initial_seg_bits {
8243 u8 fw_rev_minor[0x10];
8244 u8 fw_rev_major[0x10];
8245
8246 u8 cmd_interface_rev[0x10];
8247 u8 fw_rev_subminor[0x10];
8248
Matan Barakb4ff3a32016-02-09 14:57:42 +02008249 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008250
8251 u8 cmdq_phy_addr_63_32[0x20];
8252
8253 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008254 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008255 u8 nic_interface[0x2];
8256 u8 log_cmdq_size[0x4];
8257 u8 log_cmdq_stride[0x4];
8258
8259 u8 command_doorbell_vector[0x20];
8260
Matan Barakb4ff3a32016-02-09 14:57:42 +02008261 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008262
8263 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008264 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008265 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008266 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008267
8268 struct mlx5_ifc_health_buffer_bits health_buffer;
8269
8270 u8 no_dram_nic_offset[0x20];
8271
Matan Barakb4ff3a32016-02-09 14:57:42 +02008272 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008273
Matan Barakb4ff3a32016-02-09 14:57:42 +02008274 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008275 u8 clear_int[0x1];
8276
8277 u8 health_syndrome[0x8];
8278 u8 health_counter[0x18];
8279
Matan Barakb4ff3a32016-02-09 14:57:42 +02008280 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008281};
8282
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008283struct mlx5_ifc_mtpps_reg_bits {
8284 u8 reserved_at_0[0xc];
8285 u8 cap_number_of_pps_pins[0x4];
8286 u8 reserved_at_10[0x4];
8287 u8 cap_max_num_of_pps_in_pins[0x4];
8288 u8 reserved_at_18[0x4];
8289 u8 cap_max_num_of_pps_out_pins[0x4];
8290
8291 u8 reserved_at_20[0x24];
8292 u8 cap_pin_3_mode[0x4];
8293 u8 reserved_at_48[0x4];
8294 u8 cap_pin_2_mode[0x4];
8295 u8 reserved_at_50[0x4];
8296 u8 cap_pin_1_mode[0x4];
8297 u8 reserved_at_58[0x4];
8298 u8 cap_pin_0_mode[0x4];
8299
8300 u8 reserved_at_60[0x4];
8301 u8 cap_pin_7_mode[0x4];
8302 u8 reserved_at_68[0x4];
8303 u8 cap_pin_6_mode[0x4];
8304 u8 reserved_at_70[0x4];
8305 u8 cap_pin_5_mode[0x4];
8306 u8 reserved_at_78[0x4];
8307 u8 cap_pin_4_mode[0x4];
8308
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008309 u8 field_select[0x20];
8310 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008311
8312 u8 enable[0x1];
8313 u8 reserved_at_101[0xb];
8314 u8 pattern[0x4];
8315 u8 reserved_at_110[0x4];
8316 u8 pin_mode[0x4];
8317 u8 pin[0x8];
8318
8319 u8 reserved_at_120[0x20];
8320
8321 u8 time_stamp[0x40];
8322
8323 u8 out_pulse_duration[0x10];
8324 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008325 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008326
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008327 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008328};
8329
8330struct mlx5_ifc_mtppse_reg_bits {
8331 u8 reserved_at_0[0x18];
8332 u8 pin[0x8];
8333 u8 event_arm[0x1];
8334 u8 reserved_at_21[0x1b];
8335 u8 event_generation_mode[0x4];
8336 u8 reserved_at_40[0x40];
8337};
8338
Or Gerlitz47176282017-04-18 13:35:39 +03008339struct mlx5_ifc_mcqi_cap_bits {
8340 u8 supported_info_bitmask[0x20];
8341
8342 u8 component_size[0x20];
8343
8344 u8 max_component_size[0x20];
8345
8346 u8 log_mcda_word_size[0x4];
8347 u8 reserved_at_64[0xc];
8348 u8 mcda_max_write_size[0x10];
8349
8350 u8 rd_en[0x1];
8351 u8 reserved_at_81[0x1];
8352 u8 match_chip_id[0x1];
8353 u8 match_psid[0x1];
8354 u8 check_user_timestamp[0x1];
8355 u8 match_base_guid_mac[0x1];
8356 u8 reserved_at_86[0x1a];
8357};
8358
8359struct mlx5_ifc_mcqi_reg_bits {
8360 u8 read_pending_component[0x1];
8361 u8 reserved_at_1[0xf];
8362 u8 component_index[0x10];
8363
8364 u8 reserved_at_20[0x20];
8365
8366 u8 reserved_at_40[0x1b];
8367 u8 info_type[0x5];
8368
8369 u8 info_size[0x20];
8370
8371 u8 offset[0x20];
8372
8373 u8 reserved_at_a0[0x10];
8374 u8 data_size[0x10];
8375
8376 u8 data[0][0x20];
8377};
8378
8379struct mlx5_ifc_mcc_reg_bits {
8380 u8 reserved_at_0[0x4];
8381 u8 time_elapsed_since_last_cmd[0xc];
8382 u8 reserved_at_10[0x8];
8383 u8 instruction[0x8];
8384
8385 u8 reserved_at_20[0x10];
8386 u8 component_index[0x10];
8387
8388 u8 reserved_at_40[0x8];
8389 u8 update_handle[0x18];
8390
8391 u8 handle_owner_type[0x4];
8392 u8 handle_owner_host_id[0x4];
8393 u8 reserved_at_68[0x1];
8394 u8 control_progress[0x7];
8395 u8 error_code[0x8];
8396 u8 reserved_at_78[0x4];
8397 u8 control_state[0x4];
8398
8399 u8 component_size[0x20];
8400
8401 u8 reserved_at_a0[0x60];
8402};
8403
8404struct mlx5_ifc_mcda_reg_bits {
8405 u8 reserved_at_0[0x8];
8406 u8 update_handle[0x18];
8407
8408 u8 offset[0x20];
8409
8410 u8 reserved_at_40[0x10];
8411 u8 size[0x10];
8412
8413 u8 reserved_at_60[0x20];
8414
8415 u8 data[0][0x20];
8416};
8417
Saeed Mahameede2816822015-05-28 22:28:40 +03008418union mlx5_ifc_ports_control_registers_document_bits {
8419 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8420 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8421 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8422 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8423 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8424 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8425 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8426 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8427 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8428 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8429 struct mlx5_ifc_paos_reg_bits paos_reg;
8430 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8431 struct mlx5_ifc_peir_reg_bits peir_reg;
8432 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8433 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008434 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008435 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8436 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8437 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8438 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8439 struct mlx5_ifc_plib_reg_bits plib_reg;
8440 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8441 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8442 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8443 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8444 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8445 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8446 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8447 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8448 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8449 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008450 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008451 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8452 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8453 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8454 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8455 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8456 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8457 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008458 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008459 struct mlx5_ifc_pude_reg_bits pude_reg;
8460 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8461 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8462 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008463 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8464 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008465 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008466 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8467 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008468 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8469 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8470 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008471 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008472};
8473
8474union mlx5_ifc_debug_enhancements_document_bits {
8475 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008476 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008477};
8478
8479union mlx5_ifc_uplink_pci_interface_document_bits {
8480 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008481 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008482};
8483
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008484struct mlx5_ifc_set_flow_table_root_out_bits {
8485 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008486 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008487
8488 u8 syndrome[0x20];
8489
Matan Barakb4ff3a32016-02-09 14:57:42 +02008490 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008491};
8492
8493struct mlx5_ifc_set_flow_table_root_in_bits {
8494 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008495 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008496
Matan Barakb4ff3a32016-02-09 14:57:42 +02008497 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008498 u8 op_mod[0x10];
8499
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008500 u8 other_vport[0x1];
8501 u8 reserved_at_41[0xf];
8502 u8 vport_number[0x10];
8503
8504 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008505
8506 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008507 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008508
Matan Barakb4ff3a32016-02-09 14:57:42 +02008509 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008510 u8 table_id[0x18];
8511
Erez Shitrit500a3d02017-04-13 06:36:51 +03008512 u8 reserved_at_c0[0x8];
8513 u8 underlay_qpn[0x18];
8514 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008515};
8516
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008517enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008518 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8519 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008520};
8521
8522struct mlx5_ifc_modify_flow_table_out_bits {
8523 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008524 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008525
8526 u8 syndrome[0x20];
8527
Matan Barakb4ff3a32016-02-09 14:57:42 +02008528 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008529};
8530
8531struct mlx5_ifc_modify_flow_table_in_bits {
8532 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008533 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008534
Matan Barakb4ff3a32016-02-09 14:57:42 +02008535 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008536 u8 op_mod[0x10];
8537
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008538 u8 other_vport[0x1];
8539 u8 reserved_at_41[0xf];
8540 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008541
Matan Barakb4ff3a32016-02-09 14:57:42 +02008542 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008543 u8 modify_field_select[0x10];
8544
8545 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008546 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008547
Matan Barakb4ff3a32016-02-09 14:57:42 +02008548 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008549 u8 table_id[0x18];
8550
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008551 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008552};
8553
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008554struct mlx5_ifc_ets_tcn_config_reg_bits {
8555 u8 g[0x1];
8556 u8 b[0x1];
8557 u8 r[0x1];
8558 u8 reserved_at_3[0x9];
8559 u8 group[0x4];
8560 u8 reserved_at_10[0x9];
8561 u8 bw_allocation[0x7];
8562
8563 u8 reserved_at_20[0xc];
8564 u8 max_bw_units[0x4];
8565 u8 reserved_at_30[0x8];
8566 u8 max_bw_value[0x8];
8567};
8568
8569struct mlx5_ifc_ets_global_config_reg_bits {
8570 u8 reserved_at_0[0x2];
8571 u8 r[0x1];
8572 u8 reserved_at_3[0x1d];
8573
8574 u8 reserved_at_20[0xc];
8575 u8 max_bw_units[0x4];
8576 u8 reserved_at_30[0x8];
8577 u8 max_bw_value[0x8];
8578};
8579
8580struct mlx5_ifc_qetc_reg_bits {
8581 u8 reserved_at_0[0x8];
8582 u8 port_number[0x8];
8583 u8 reserved_at_10[0x30];
8584
8585 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8586 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8587};
8588
Huy Nguyen415a64a2017-07-18 16:08:46 -05008589struct mlx5_ifc_qpdpm_dscp_reg_bits {
8590 u8 e[0x1];
8591 u8 reserved_at_01[0x0b];
8592 u8 prio[0x04];
8593};
8594
8595struct mlx5_ifc_qpdpm_reg_bits {
8596 u8 reserved_at_0[0x8];
8597 u8 local_port[0x8];
8598 u8 reserved_at_10[0x10];
8599 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8600};
8601
8602struct mlx5_ifc_qpts_reg_bits {
8603 u8 reserved_at_0[0x8];
8604 u8 local_port[0x8];
8605 u8 reserved_at_10[0x2d];
8606 u8 trust_state[0x3];
8607};
8608
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008609struct mlx5_ifc_qtct_reg_bits {
8610 u8 reserved_at_0[0x8];
8611 u8 port_number[0x8];
8612 u8 reserved_at_10[0xd];
8613 u8 prio[0x3];
8614
8615 u8 reserved_at_20[0x1d];
8616 u8 tclass[0x3];
8617};
8618
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008619struct mlx5_ifc_mcia_reg_bits {
8620 u8 l[0x1];
8621 u8 reserved_at_1[0x7];
8622 u8 module[0x8];
8623 u8 reserved_at_10[0x8];
8624 u8 status[0x8];
8625
8626 u8 i2c_device_address[0x8];
8627 u8 page_number[0x8];
8628 u8 device_address[0x10];
8629
8630 u8 reserved_at_40[0x10];
8631 u8 size[0x10];
8632
8633 u8 reserved_at_60[0x20];
8634
8635 u8 dword_0[0x20];
8636 u8 dword_1[0x20];
8637 u8 dword_2[0x20];
8638 u8 dword_3[0x20];
8639 u8 dword_4[0x20];
8640 u8 dword_5[0x20];
8641 u8 dword_6[0x20];
8642 u8 dword_7[0x20];
8643 u8 dword_8[0x20];
8644 u8 dword_9[0x20];
8645 u8 dword_10[0x20];
8646 u8 dword_11[0x20];
8647};
8648
Saeed Mahameed74862162016-06-09 15:11:34 +03008649struct mlx5_ifc_dcbx_param_bits {
8650 u8 dcbx_cee_cap[0x1];
8651 u8 dcbx_ieee_cap[0x1];
8652 u8 dcbx_standby_cap[0x1];
8653 u8 reserved_at_0[0x5];
8654 u8 port_number[0x8];
8655 u8 reserved_at_10[0xa];
8656 u8 max_application_table_size[6];
8657 u8 reserved_at_20[0x15];
8658 u8 version_oper[0x3];
8659 u8 reserved_at_38[5];
8660 u8 version_admin[0x3];
8661 u8 willing_admin[0x1];
8662 u8 reserved_at_41[0x3];
8663 u8 pfc_cap_oper[0x4];
8664 u8 reserved_at_48[0x4];
8665 u8 pfc_cap_admin[0x4];
8666 u8 reserved_at_50[0x4];
8667 u8 num_of_tc_oper[0x4];
8668 u8 reserved_at_58[0x4];
8669 u8 num_of_tc_admin[0x4];
8670 u8 remote_willing[0x1];
8671 u8 reserved_at_61[3];
8672 u8 remote_pfc_cap[4];
8673 u8 reserved_at_68[0x14];
8674 u8 remote_num_of_tc[0x4];
8675 u8 reserved_at_80[0x18];
8676 u8 error[0x8];
8677 u8 reserved_at_a0[0x160];
8678};
Aviv Heller84df61e2016-05-10 13:47:50 +03008679
8680struct mlx5_ifc_lagc_bits {
8681 u8 reserved_at_0[0x1d];
8682 u8 lag_state[0x3];
8683
8684 u8 reserved_at_20[0x14];
8685 u8 tx_remap_affinity_2[0x4];
8686 u8 reserved_at_38[0x4];
8687 u8 tx_remap_affinity_1[0x4];
8688};
8689
8690struct mlx5_ifc_create_lag_out_bits {
8691 u8 status[0x8];
8692 u8 reserved_at_8[0x18];
8693
8694 u8 syndrome[0x20];
8695
8696 u8 reserved_at_40[0x40];
8697};
8698
8699struct mlx5_ifc_create_lag_in_bits {
8700 u8 opcode[0x10];
8701 u8 reserved_at_10[0x10];
8702
8703 u8 reserved_at_20[0x10];
8704 u8 op_mod[0x10];
8705
8706 struct mlx5_ifc_lagc_bits ctx;
8707};
8708
8709struct mlx5_ifc_modify_lag_out_bits {
8710 u8 status[0x8];
8711 u8 reserved_at_8[0x18];
8712
8713 u8 syndrome[0x20];
8714
8715 u8 reserved_at_40[0x40];
8716};
8717
8718struct mlx5_ifc_modify_lag_in_bits {
8719 u8 opcode[0x10];
8720 u8 reserved_at_10[0x10];
8721
8722 u8 reserved_at_20[0x10];
8723 u8 op_mod[0x10];
8724
8725 u8 reserved_at_40[0x20];
8726 u8 field_select[0x20];
8727
8728 struct mlx5_ifc_lagc_bits ctx;
8729};
8730
8731struct mlx5_ifc_query_lag_out_bits {
8732 u8 status[0x8];
8733 u8 reserved_at_8[0x18];
8734
8735 u8 syndrome[0x20];
8736
8737 u8 reserved_at_40[0x40];
8738
8739 struct mlx5_ifc_lagc_bits ctx;
8740};
8741
8742struct mlx5_ifc_query_lag_in_bits {
8743 u8 opcode[0x10];
8744 u8 reserved_at_10[0x10];
8745
8746 u8 reserved_at_20[0x10];
8747 u8 op_mod[0x10];
8748
8749 u8 reserved_at_40[0x40];
8750};
8751
8752struct mlx5_ifc_destroy_lag_out_bits {
8753 u8 status[0x8];
8754 u8 reserved_at_8[0x18];
8755
8756 u8 syndrome[0x20];
8757
8758 u8 reserved_at_40[0x40];
8759};
8760
8761struct mlx5_ifc_destroy_lag_in_bits {
8762 u8 opcode[0x10];
8763 u8 reserved_at_10[0x10];
8764
8765 u8 reserved_at_20[0x10];
8766 u8 op_mod[0x10];
8767
8768 u8 reserved_at_40[0x40];
8769};
8770
8771struct mlx5_ifc_create_vport_lag_out_bits {
8772 u8 status[0x8];
8773 u8 reserved_at_8[0x18];
8774
8775 u8 syndrome[0x20];
8776
8777 u8 reserved_at_40[0x40];
8778};
8779
8780struct mlx5_ifc_create_vport_lag_in_bits {
8781 u8 opcode[0x10];
8782 u8 reserved_at_10[0x10];
8783
8784 u8 reserved_at_20[0x10];
8785 u8 op_mod[0x10];
8786
8787 u8 reserved_at_40[0x40];
8788};
8789
8790struct mlx5_ifc_destroy_vport_lag_out_bits {
8791 u8 status[0x8];
8792 u8 reserved_at_8[0x18];
8793
8794 u8 syndrome[0x20];
8795
8796 u8 reserved_at_40[0x40];
8797};
8798
8799struct mlx5_ifc_destroy_vport_lag_in_bits {
8800 u8 opcode[0x10];
8801 u8 reserved_at_10[0x10];
8802
8803 u8 reserved_at_20[0x10];
8804 u8 op_mod[0x10];
8805
8806 u8 reserved_at_40[0x40];
8807};
8808
Eli Cohend29b7962014-10-02 12:19:43 +03008809#endif /* MLX5_IFC_H */