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Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.h
Jiri Pirko22a67762017-02-03 10:29:07 +01003 * Copyright (c) 2015-2017 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015-2017 Jiri Pirko <jiri@mellanox.com>
Jiri Pirko56ade8f2015-10-16 14:01:37 +02005 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#ifndef _MLXSW_SPECTRUM_H
38#define _MLXSW_SPECTRUM_H
39
40#include <linux/types.h>
41#include <linux/netdevice.h>
Jiri Pirko6cf3c972016-07-05 11:27:39 +020042#include <linux/rhashtable.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020043#include <linux/bitops.h>
44#include <linux/if_vlan.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010045#include <linux/list.h>
Ido Schimmel8e8dfe92016-04-06 17:10:10 +020046#include <linux/dcbnl.h>
Jiri Pirko5e9c16c2016-07-04 08:23:04 +020047#include <linux/in6.h>
Jiri Pirkob45f64d2016-09-26 12:52:31 +020048#include <linux/notifier.h>
Yotam Gigi98d0f7b2017-01-23 11:07:11 +010049#include <net/psample.h>
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +010050#include <net/pkt_cls.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020051
Elad Raz3a49b4f2016-01-10 21:06:28 +010052#include "port.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020053#include "core.h"
Jiri Pirko22a67762017-02-03 10:29:07 +010054#include "core_acl_flex_keys.h"
55#include "core_acl_flex_actions.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020056
57#define MLXSW_SP_VFID_BASE VLAN_N_VID
Nogah Frankel63fe8132017-02-09 14:54:45 +010058#define MLXSW_SP_VFID_MAX 1024 /* Bridged VLAN interfaces */
Ido Schimmel99724c12016-07-04 08:23:14 +020059
60#define MLXSW_SP_RFID_BASE 15360
Ido Schimmel7f71eb42015-12-15 16:03:37 +010061
Elad Raz53ae6282016-01-10 21:06:26 +010062#define MLXSW_SP_MID_MAX 7000
63
Ido Schimmel18f1e702016-02-26 17:32:31 +010064#define MLXSW_SP_PORTS_PER_CLUSTER_MAX 4
65
66#define MLXSW_SP_PORT_BASE_SPEED 25000 /* Mb/s */
67
Jiri Pirkoc6022422016-07-05 11:27:46 +020068#define MLXSW_SP_KVD_LINEAR_SIZE 65536 /* entries */
Nogah Frankel403547d2016-09-20 11:16:52 +020069#define MLXSW_SP_KVD_GRANULARITY 128
Jiri Pirkoc6022422016-07-05 11:27:46 +020070
Jiri Pirko56ade8f2015-10-16 14:01:37 +020071struct mlxsw_sp_port;
Ido Schimmel4724ba562017-03-10 08:53:39 +010072struct mlxsw_sp_rif;
Jiri Pirko56ade8f2015-10-16 14:01:37 +020073
Jiri Pirko0d65fc12015-12-03 12:12:28 +010074struct mlxsw_sp_upper {
75 struct net_device *dev;
76 unsigned int ref_count;
77};
78
Ido Schimmeld0ec8752016-06-20 23:04:12 +020079struct mlxsw_sp_fid {
Ido Schimmel1c800752016-06-20 23:04:20 +020080 void (*leave)(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel7f71eb42015-12-15 16:03:37 +010081 struct list_head list;
Ido Schimmeld0ec8752016-06-20 23:04:12 +020082 unsigned int ref_count;
83 struct net_device *dev;
Arkadi Sharshevskybf952332017-03-17 09:38:00 +010084 struct mlxsw_sp_rif *rif;
Ido Schimmeld0ec8752016-06-20 23:04:12 +020085 u16 fid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +010086};
87
Elad Raz3a49b4f2016-01-10 21:06:28 +010088struct mlxsw_sp_mid {
89 struct list_head list;
90 unsigned char addr[ETH_ALEN];
Ido Schimmel46d08472016-10-30 10:09:22 +010091 u16 fid;
Elad Raz3a49b4f2016-01-10 21:06:28 +010092 u16 mid;
93 unsigned int ref_count;
94};
95
Ido Schimmel7f71eb42015-12-15 16:03:37 +010096static inline u16 mlxsw_sp_vfid_to_fid(u16 vfid)
97{
98 return MLXSW_SP_VFID_BASE + vfid;
99}
100
Ido Schimmelaac78a42015-12-15 16:03:42 +0100101static inline u16 mlxsw_sp_fid_to_vfid(u16 fid)
102{
103 return fid - MLXSW_SP_VFID_BASE;
104}
105
106static inline bool mlxsw_sp_fid_is_vfid(u16 fid)
107{
Ido Schimmel99724c12016-07-04 08:23:14 +0200108 return fid >= MLXSW_SP_VFID_BASE && fid < MLXSW_SP_RFID_BASE;
109}
110
Jiri Pirko078f9c72016-04-14 18:19:19 +0200111struct mlxsw_sp_sb_pr {
112 enum mlxsw_reg_sbpr_mode mode;
113 u32 size;
114};
115
Jiri Pirko2d0ed392016-04-14 18:19:30 +0200116struct mlxsw_cp_sb_occ {
117 u32 cur;
118 u32 max;
119};
120
Jiri Pirko078f9c72016-04-14 18:19:19 +0200121struct mlxsw_sp_sb_cm {
122 u32 min_buff;
123 u32 max_buff;
124 u8 pool;
Jiri Pirko2d0ed392016-04-14 18:19:30 +0200125 struct mlxsw_cp_sb_occ occ;
Jiri Pirko078f9c72016-04-14 18:19:19 +0200126};
127
128struct mlxsw_sp_sb_pm {
129 u32 min_buff;
130 u32 max_buff;
Jiri Pirko2d0ed392016-04-14 18:19:30 +0200131 struct mlxsw_cp_sb_occ occ;
Jiri Pirko078f9c72016-04-14 18:19:19 +0200132};
133
134#define MLXSW_SP_SB_POOL_COUNT 4
135#define MLXSW_SP_SB_TC_COUNT 8
136
Ido Schimmel5ec2ee72017-03-24 08:02:48 +0100137struct mlxsw_sp_sb_port {
138 struct mlxsw_sp_sb_cm cms[2][MLXSW_SP_SB_TC_COUNT];
139 struct mlxsw_sp_sb_pm pms[2][MLXSW_SP_SB_POOL_COUNT];
140};
141
Jiri Pirko078f9c72016-04-14 18:19:19 +0200142struct mlxsw_sp_sb {
143 struct mlxsw_sp_sb_pr prs[2][MLXSW_SP_SB_POOL_COUNT];
Ido Schimmel5ec2ee72017-03-24 08:02:48 +0100144 struct mlxsw_sp_sb_port *ports;
Ido Schimmel18281f22017-03-24 08:02:51 +0100145 u32 cell_size;
Jiri Pirko078f9c72016-04-14 18:19:19 +0200146};
147
Jiri Pirko5e9c16c2016-07-04 08:23:04 +0200148#define MLXSW_SP_PREFIX_COUNT (sizeof(struct in6_addr) * BITS_PER_BYTE)
149
150struct mlxsw_sp_prefix_usage {
151 DECLARE_BITMAP(b, MLXSW_SP_PREFIX_COUNT);
152};
153
Jiri Pirko53342022016-07-04 08:23:08 +0200154enum mlxsw_sp_l3proto {
155 MLXSW_SP_L3_PROTO_IPV4,
156 MLXSW_SP_L3_PROTO_IPV6,
157};
158
159struct mlxsw_sp_lpm_tree {
160 u8 id; /* tree ID */
161 unsigned int ref_count;
162 enum mlxsw_sp_l3proto proto;
163 struct mlxsw_sp_prefix_usage prefix_usage;
164};
165
Jiri Pirko6b75c482016-07-04 08:23:09 +0200166struct mlxsw_sp_fib;
167
168struct mlxsw_sp_vr {
169 u16 id; /* virtual router ID */
Jiri Pirko6b75c482016-07-04 08:23:09 +0200170 u32 tb_id; /* kernel fib table id */
Ido Schimmel69132292017-03-10 08:53:42 +0100171 unsigned int rif_count;
Ido Schimmel76610eb2017-03-10 08:53:41 +0100172 struct mlxsw_sp_fib *fib4;
Jiri Pirko6b75c482016-07-04 08:23:09 +0200173};
174
Yotam Gigi763b4b72016-07-21 12:03:17 +0200175enum mlxsw_sp_span_type {
176 MLXSW_SP_SPAN_EGRESS,
177 MLXSW_SP_SPAN_INGRESS
178};
179
180struct mlxsw_sp_span_inspected_port {
181 struct list_head list;
182 enum mlxsw_sp_span_type type;
183 u8 local_port;
184};
185
186struct mlxsw_sp_span_entry {
187 u8 local_port;
188 bool used;
189 struct list_head bound_ports_list;
190 int ref_count;
191 int id;
192};
193
194enum mlxsw_sp_port_mall_action_type {
195 MLXSW_SP_PORT_MALL_MIRROR,
Yotam Gigi98d0f7b2017-01-23 11:07:11 +0100196 MLXSW_SP_PORT_MALL_SAMPLE,
Yotam Gigi763b4b72016-07-21 12:03:17 +0200197};
198
199struct mlxsw_sp_port_mall_mirror_tc_entry {
200 u8 to_local_port;
201 bool ingress;
202};
203
204struct mlxsw_sp_port_mall_tc_entry {
205 struct list_head list;
206 unsigned long cookie;
207 enum mlxsw_sp_port_mall_action_type type;
208 union {
209 struct mlxsw_sp_port_mall_mirror_tc_entry mirror;
210 };
211};
212
Jiri Pirko53342022016-07-04 08:23:08 +0200213struct mlxsw_sp_router {
Nogah Frankel9497c042016-09-20 11:16:54 +0200214 struct mlxsw_sp_vr *vrs;
Jiri Pirko6cf3c972016-07-05 11:27:39 +0200215 struct rhashtable neigh_ht;
Ido Schimmele9ad5e72017-02-08 11:16:29 +0100216 struct rhashtable nexthop_group_ht;
Ido Schimmelc53b8e12017-02-08 11:16:30 +0100217 struct rhashtable nexthop_ht;
Yotam Gigic723c7352016-07-05 11:27:43 +0200218 struct {
Ido Schimmel8494ab02017-03-24 08:02:47 +0100219 struct mlxsw_sp_lpm_tree *trees;
220 unsigned int tree_count;
221 } lpm;
222 struct {
Yotam Gigic723c7352016-07-05 11:27:43 +0200223 struct delayed_work dw;
224 unsigned long interval; /* ms */
225 } neighs_update;
Yotam Gigi0b2361d2016-07-05 11:27:52 +0200226 struct delayed_work nexthop_probe_dw;
227#define MLXSW_SP_UNRESOLVED_NH_PROBE_INTERVAL 5000 /* ms */
Yotam Gigib2157142016-07-05 11:27:51 +0200228 struct list_head nexthop_neighs_list;
Jiri Pirkob45f64d2016-09-26 12:52:31 +0200229 bool aborted;
Jiri Pirko53342022016-07-04 08:23:08 +0200230};
231
Jiri Pirko22a67762017-02-03 10:29:07 +0100232struct mlxsw_sp_acl;
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +0100233struct mlxsw_sp_counter_pool;
Jiri Pirko22a67762017-02-03 10:29:07 +0100234
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200235struct mlxsw_sp {
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100236 struct {
237 struct list_head list;
Ido Schimmel99724c12016-07-04 08:23:14 +0200238 DECLARE_BITMAP(mapped, MLXSW_SP_VFID_MAX);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +0200239 } vfids;
Elad Raz3a49b4f2016-01-10 21:06:28 +0100240 struct {
241 struct list_head list;
Ido Schimmeld8651fd2016-06-20 23:04:07 +0200242 DECLARE_BITMAP(mapped, MLXSW_SP_MID_MAX);
Elad Raz3a49b4f2016-01-10 21:06:28 +0100243 } br_mids;
Ido Schimmel14d39462016-06-20 23:04:15 +0200244 struct list_head fids; /* VLAN-aware bridge FIDs */
Nogah Frankel8f8a62d2016-09-20 11:16:57 +0200245 struct mlxsw_sp_rif **rifs;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200246 struct mlxsw_sp_port **ports;
247 struct mlxsw_core *core;
248 const struct mlxsw_bus_info *bus_info;
249 unsigned char base_mac[ETH_ALEN];
250 struct {
251 struct delayed_work dw;
252#define MLXSW_SP_DEFAULT_LEARNING_INTERVAL 100
253 unsigned int interval; /* ms */
254 } fdb_notify;
Ido Schimmel869f63a2016-03-08 12:59:33 -0800255#define MLXSW_SP_MIN_AGEING_TIME 10
256#define MLXSW_SP_MAX_AGEING_TIME 1000000
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200257#define MLXSW_SP_DEFAULT_AGEING_TIME 300
258 u32 ageing_time;
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100259 struct mlxsw_sp_upper master_bridge;
Nogah Frankelce0bd2b2016-09-20 11:16:50 +0200260 struct mlxsw_sp_upper *lags;
Ido Schimmel5ec2ee72017-03-24 08:02:48 +0100261 u8 *port_to_module;
Jiri Pirko078f9c72016-04-14 18:19:19 +0200262 struct mlxsw_sp_sb sb;
Jiri Pirko53342022016-07-04 08:23:08 +0200263 struct mlxsw_sp_router router;
Jiri Pirko22a67762017-02-03 10:29:07 +0100264 struct mlxsw_sp_acl *acl;
Jiri Pirkob090ef02016-07-05 11:27:47 +0200265 struct {
266 DECLARE_BITMAP(usage, MLXSW_SP_KVD_LINEAR_SIZE);
267 } kvdl;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200268
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +0100269 struct mlxsw_sp_counter_pool *counter_pool;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200270 struct {
271 struct mlxsw_sp_span_entry *entries;
272 int entries_count;
273 } span;
Jiri Pirkob45f64d2016-09-26 12:52:31 +0200274 struct notifier_block fib_nb;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200275};
276
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100277static inline struct mlxsw_sp_upper *
278mlxsw_sp_lag_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
279{
280 return &mlxsw_sp->lags[lag_id];
281}
282
Ido Schimmel18281f22017-03-24 08:02:51 +0100283static inline u32 mlxsw_sp_cells_bytes(const struct mlxsw_sp *mlxsw_sp,
284 u32 cells)
285{
286 return mlxsw_sp->sb.cell_size * cells;
287}
288
289static inline u32 mlxsw_sp_bytes_cells(const struct mlxsw_sp *mlxsw_sp,
290 u32 bytes)
291{
292 return DIV_ROUND_UP(bytes, mlxsw_sp->sb.cell_size);
293}
294
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200295struct mlxsw_sp_port_pcpu_stats {
296 u64 rx_packets;
297 u64 rx_bytes;
298 u64 tx_packets;
299 u64 tx_bytes;
300 struct u64_stats_sync syncp;
301 u32 tx_dropped;
302};
303
Yotam Gigi98d0f7b2017-01-23 11:07:11 +0100304struct mlxsw_sp_port_sample {
305 struct psample_group __rcu *psample_group;
306 u32 trunc_size;
307 u32 rate;
308 bool truncate;
309};
310
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200311struct mlxsw_sp_port {
312 struct net_device *dev;
313 struct mlxsw_sp_port_pcpu_stats __percpu *pcpu_stats;
314 struct mlxsw_sp *mlxsw_sp;
315 u8 local_port;
316 u8 stp_state;
Nogah Frankel8ecd4592017-02-09 14:54:47 +0100317 u16 learning:1,
Jiri Pirko0d9b9702015-10-28 10:16:56 +0100318 learning_sync:1,
Ido Schimmel02930382015-10-28 10:16:58 +0100319 uc_flood:1,
Nogah Frankel71c365b2017-02-09 14:54:46 +0100320 mc_flood:1,
Nogah Frankel8ecd4592017-02-09 14:54:47 +0100321 mc_router:1,
322 mc_disabled:1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100323 bridged:1,
Ido Schimmel18f1e702016-02-26 17:32:31 +0100324 lagged:1,
325 split:1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200326 u16 pvid;
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100327 u16 lag_id;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100328 struct {
329 struct list_head list;
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200330 struct mlxsw_sp_fid *f;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100331 u16 vid;
332 } vport;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200333 struct {
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200334 u8 tx_pause:1,
Ido Schimmel0c83f882016-09-12 13:26:23 +0200335 rx_pause:1,
336 autoneg:1;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200337 } link;
338 struct {
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200339 struct ieee_ets *ets;
Ido Schimmelcc7cf512016-04-06 17:10:11 +0200340 struct ieee_maxrate *maxrate;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200341 struct ieee_pfc *pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200342 } dcb;
Ido Schimmeld664b412016-06-09 09:51:40 +0200343 struct {
344 u8 module;
345 u8 width;
346 u8 lane;
347 } mapping;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200348 /* 802.1Q bridge VLANs */
Ido Schimmelbd40e9d2015-12-15 16:03:36 +0100349 unsigned long *active_vlans;
Elad Razfc1273a2016-01-06 13:01:11 +0100350 unsigned long *untagged_vlans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200351 /* VLAN interfaces */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100352 struct list_head vports_list;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200353 /* TC handles */
354 struct list_head mall_tc_list;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200355 struct {
356 #define MLXSW_HW_STATS_UPDATE_TIME HZ
357 struct rtnl_link_stats64 *cache;
358 struct delayed_work update_dw;
359 } hw_stats;
Yotam Gigi98d0f7b2017-01-23 11:07:11 +0100360 struct mlxsw_sp_port_sample *sample;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200361};
362
Jiri Pirko22a67762017-02-03 10:29:07 +0100363bool mlxsw_sp_port_dev_check(const struct net_device *dev);
Ido Schimmel4724ba562017-03-10 08:53:39 +0100364struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev);
Jiri Pirko7ce856a2016-07-04 08:23:12 +0200365struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev);
366void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port);
367
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200368static inline bool
369mlxsw_sp_port_is_pause_en(const struct mlxsw_sp_port *mlxsw_sp_port)
370{
371 return mlxsw_sp_port->link.tx_pause || mlxsw_sp_port->link.rx_pause;
372}
373
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100374static inline struct mlxsw_sp_port *
375mlxsw_sp_port_lagged_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id, u8 port_index)
376{
377 struct mlxsw_sp_port *mlxsw_sp_port;
378 u8 local_port;
379
380 local_port = mlxsw_core_lag_mapping_get(mlxsw_sp->core,
381 lag_id, port_index);
382 mlxsw_sp_port = mlxsw_sp->ports[local_port];
383 return mlxsw_sp_port && mlxsw_sp_port->lagged ? mlxsw_sp_port : NULL;
384}
385
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100386static inline u16
387mlxsw_sp_vport_vid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
388{
389 return mlxsw_sp_vport->vport.vid;
390}
391
Ido Schimmel6381b3a2016-06-20 23:04:16 +0200392static inline bool
393mlxsw_sp_port_is_vport(const struct mlxsw_sp_port *mlxsw_sp_port)
394{
395 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
396
397 return vid != 0;
398}
399
Ido Schimmel41b996c2016-06-20 23:04:17 +0200400static inline void mlxsw_sp_vport_fid_set(struct mlxsw_sp_port *mlxsw_sp_vport,
401 struct mlxsw_sp_fid *f)
402{
403 mlxsw_sp_vport->vport.f = f;
404}
405
406static inline struct mlxsw_sp_fid *
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200407mlxsw_sp_vport_fid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100408{
Ido Schimmel41b996c2016-06-20 23:04:17 +0200409 return mlxsw_sp_vport->vport.f;
410}
411
412static inline struct net_device *
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +0200413mlxsw_sp_vport_dev_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel41b996c2016-06-20 23:04:17 +0200414{
415 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
416
Ido Schimmel56918b62016-06-20 23:04:18 +0200417 return f ? f->dev : NULL;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100418}
419
420static inline struct mlxsw_sp_port *
421mlxsw_sp_port_vport_find(const struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
422{
423 struct mlxsw_sp_port *mlxsw_sp_vport;
424
425 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
426 vport.list) {
427 if (mlxsw_sp_vport_vid_get(mlxsw_sp_vport) == vid)
428 return mlxsw_sp_vport;
429 }
430
431 return NULL;
432}
433
Ido Schimmelaac78a42015-12-15 16:03:42 +0100434static inline struct mlxsw_sp_port *
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200435mlxsw_sp_port_vport_find_by_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
436 u16 fid)
Ido Schimmelaac78a42015-12-15 16:03:42 +0100437{
438 struct mlxsw_sp_port *mlxsw_sp_vport;
439
440 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
441 vport.list) {
Ido Schimmel41b996c2016-06-20 23:04:17 +0200442 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
443
Ido Schimmel56918b62016-06-20 23:04:18 +0200444 if (f && f->fid == fid)
Ido Schimmelaac78a42015-12-15 16:03:42 +0100445 return mlxsw_sp_vport;
446 }
447
448 return NULL;
449}
450
Ido Schimmel701b1862016-07-04 08:23:16 +0200451static inline struct mlxsw_sp_fid *mlxsw_sp_fid_find(struct mlxsw_sp *mlxsw_sp,
452 u16 fid)
453{
454 struct mlxsw_sp_fid *f;
455
456 list_for_each_entry(f, &mlxsw_sp->fids, list)
457 if (f->fid == fid)
458 return f;
459
460 return NULL;
461}
462
463static inline struct mlxsw_sp_fid *
464mlxsw_sp_vfid_find(const struct mlxsw_sp *mlxsw_sp,
465 const struct net_device *br_dev)
466{
467 struct mlxsw_sp_fid *f;
468
469 list_for_each_entry(f, &mlxsw_sp->vfids.list, list)
470 if (f->dev == br_dev)
471 return f;
472
473 return NULL;
474}
475
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200476enum mlxsw_sp_flood_table {
477 MLXSW_SP_FLOOD_TABLE_UC,
Nogah Frankel71c365b2017-02-09 14:54:46 +0100478 MLXSW_SP_FLOOD_TABLE_BC,
479 MLXSW_SP_FLOOD_TABLE_MC,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200480};
481
482int mlxsw_sp_buffers_init(struct mlxsw_sp *mlxsw_sp);
Jiri Pirko0f433fa2016-04-14 18:19:24 +0200483void mlxsw_sp_buffers_fini(struct mlxsw_sp *mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200484int mlxsw_sp_port_buffers_init(struct mlxsw_sp_port *mlxsw_sp_port);
Jiri Pirko0f433fa2016-04-14 18:19:24 +0200485int mlxsw_sp_sb_pool_get(struct mlxsw_core *mlxsw_core,
486 unsigned int sb_index, u16 pool_index,
487 struct devlink_sb_pool_info *pool_info);
488int mlxsw_sp_sb_pool_set(struct mlxsw_core *mlxsw_core,
489 unsigned int sb_index, u16 pool_index, u32 size,
490 enum devlink_sb_threshold_type threshold_type);
491int mlxsw_sp_sb_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
492 unsigned int sb_index, u16 pool_index,
493 u32 *p_threshold);
494int mlxsw_sp_sb_port_pool_set(struct mlxsw_core_port *mlxsw_core_port,
495 unsigned int sb_index, u16 pool_index,
496 u32 threshold);
497int mlxsw_sp_sb_tc_pool_bind_get(struct mlxsw_core_port *mlxsw_core_port,
498 unsigned int sb_index, u16 tc_index,
499 enum devlink_sb_pool_type pool_type,
500 u16 *p_pool_index, u32 *p_threshold);
501int mlxsw_sp_sb_tc_pool_bind_set(struct mlxsw_core_port *mlxsw_core_port,
502 unsigned int sb_index, u16 tc_index,
503 enum devlink_sb_pool_type pool_type,
504 u16 pool_index, u32 threshold);
Jiri Pirko2d0ed392016-04-14 18:19:30 +0200505int mlxsw_sp_sb_occ_snapshot(struct mlxsw_core *mlxsw_core,
506 unsigned int sb_index);
507int mlxsw_sp_sb_occ_max_clear(struct mlxsw_core *mlxsw_core,
508 unsigned int sb_index);
509int mlxsw_sp_sb_occ_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
510 unsigned int sb_index, u16 pool_index,
511 u32 *p_cur, u32 *p_max);
512int mlxsw_sp_sb_occ_tc_port_bind_get(struct mlxsw_core_port *mlxsw_core_port,
513 unsigned int sb_index, u16 tc_index,
514 enum devlink_sb_pool_type pool_type,
515 u32 *p_cur, u32 *p_max);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200516
517int mlxsw_sp_switchdev_init(struct mlxsw_sp *mlxsw_sp);
518void mlxsw_sp_switchdev_fini(struct mlxsw_sp *mlxsw_sp);
519int mlxsw_sp_port_vlan_init(struct mlxsw_sp_port *mlxsw_sp_port);
520void mlxsw_sp_port_switchdev_init(struct mlxsw_sp_port *mlxsw_sp_port);
521void mlxsw_sp_port_switchdev_fini(struct mlxsw_sp_port *mlxsw_sp_port);
522int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
523 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
524 u16 vid);
525int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
526 u16 vid_end, bool is_member, bool untagged);
Ido Schimmele6060022016-06-20 23:04:11 +0200527int mlxsw_sp_vport_flood_set(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
Ido Schimmel47a0a9e2016-06-20 23:04:08 +0200528 bool set);
Ido Schimmel4dc236c2016-01-27 15:20:16 +0100529void mlxsw_sp_port_active_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port);
Ido Schimmel28a01d22016-02-18 11:30:02 +0100530int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +0200531int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid);
Ido Schimmel6e095fd2016-07-04 08:23:13 +0200532int mlxsw_sp_rif_fdb_op(struct mlxsw_sp *mlxsw_sp, const char *mac, u16 fid,
533 bool adding);
Ido Schimmel701b1862016-07-04 08:23:16 +0200534struct mlxsw_sp_fid *mlxsw_sp_fid_create(struct mlxsw_sp *mlxsw_sp, u16 fid);
535void mlxsw_sp_fid_destroy(struct mlxsw_sp *mlxsw_sp, struct mlxsw_sp_fid *f);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200536int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
537 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
538 bool dwrr, u8 dwrr_weight);
539int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
540 u8 switch_prio, u8 tclass);
541int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200542 u8 *prio_tc, bool pause_en,
543 struct ieee_pfc *my_pfc);
Ido Schimmelcc7cf512016-04-06 17:10:11 +0200544int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
545 enum mlxsw_reg_qeec_hr hr, u8 index,
546 u8 next_index, u32 maxrate);
Ido Schimmel584d73d2016-08-24 12:00:26 +0200547int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
548 u16 vid_begin, u16 vid_end,
549 bool learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200550
Ido Schimmelf00817d2016-04-06 17:10:09 +0200551#ifdef CONFIG_MLXSW_SPECTRUM_DCB
552
553int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port);
554void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port);
555
556#else
557
558static inline int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port)
559{
560 return 0;
561}
562
563static inline void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port)
564{}
565
566#endif
567
Ido Schimmel464dce12016-07-02 11:00:15 +0200568int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp);
569void mlxsw_sp_router_fini(struct mlxsw_sp *mlxsw_sp);
Jiri Pirkoe7322632016-09-01 10:37:43 +0200570int mlxsw_sp_router_netevent_event(struct notifier_block *unused,
571 unsigned long event, void *ptr);
Ido Schimmel4724ba562017-03-10 08:53:39 +0100572int mlxsw_sp_netdevice_router_port_event(struct net_device *dev);
573int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
574 unsigned long event, void *ptr);
575void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
Arkadi Sharshevskybf952332017-03-17 09:38:00 +0100576 struct mlxsw_sp_rif *rif);
Ido Schimmel7179eb52017-03-16 09:08:18 +0100577int mlxsw_sp_vport_vrf_join(struct mlxsw_sp_port *mlxsw_sp_vport);
578void mlxsw_sp_vport_vrf_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
579int mlxsw_sp_port_vrf_join(struct mlxsw_sp_port *mlxsw_sp_port);
580void mlxsw_sp_port_vrf_leave(struct mlxsw_sp_port *mlxsw_sp_port);
Ido Schimmel3d70e4582017-03-16 09:08:19 +0100581int mlxsw_sp_bridge_vrf_join(struct mlxsw_sp *mlxsw_sp,
582 struct net_device *l3_dev);
583void mlxsw_sp_bridge_vrf_leave(struct mlxsw_sp *mlxsw_sp,
584 struct net_device *l3_dev);
Ido Schimmel464dce12016-07-02 11:00:15 +0200585
Arkadi Sharshevsky13124442017-03-25 08:28:22 +0100586int mlxsw_sp_kvdl_alloc(struct mlxsw_sp *mlxsw_sp, unsigned int entry_count,
587 u32 *p_entry_index);
Jiri Pirkob090ef02016-07-05 11:27:47 +0200588void mlxsw_sp_kvdl_free(struct mlxsw_sp *mlxsw_sp, int entry_index);
589
Jiri Pirko22a67762017-02-03 10:29:07 +0100590struct mlxsw_afk *mlxsw_sp_acl_afk(struct mlxsw_sp_acl *acl);
591
592struct mlxsw_sp_acl_rule_info {
593 unsigned int priority;
594 struct mlxsw_afk_element_values values;
595 struct mlxsw_afa_block *act_block;
Arkadi Sharshevsky48170722017-03-11 09:42:58 +0100596 unsigned int counter_index;
597 bool counter_valid;
Jiri Pirko22a67762017-02-03 10:29:07 +0100598};
599
600enum mlxsw_sp_acl_profile {
601 MLXSW_SP_ACL_PROFILE_FLOWER,
602};
603
604struct mlxsw_sp_acl_profile_ops {
605 size_t ruleset_priv_size;
606 int (*ruleset_add)(struct mlxsw_sp *mlxsw_sp,
607 void *priv, void *ruleset_priv);
608 void (*ruleset_del)(struct mlxsw_sp *mlxsw_sp, void *ruleset_priv);
609 int (*ruleset_bind)(struct mlxsw_sp *mlxsw_sp, void *ruleset_priv,
610 struct net_device *dev, bool ingress);
611 void (*ruleset_unbind)(struct mlxsw_sp *mlxsw_sp, void *ruleset_priv);
612 size_t rule_priv_size;
613 int (*rule_add)(struct mlxsw_sp *mlxsw_sp,
614 void *ruleset_priv, void *rule_priv,
615 struct mlxsw_sp_acl_rule_info *rulei);
616 void (*rule_del)(struct mlxsw_sp *mlxsw_sp, void *rule_priv);
Arkadi Sharshevsky7fd056c2017-03-11 09:42:54 +0100617 int (*rule_activity_get)(struct mlxsw_sp *mlxsw_sp, void *rule_priv,
618 bool *activity);
Jiri Pirko22a67762017-02-03 10:29:07 +0100619};
620
621struct mlxsw_sp_acl_ops {
622 size_t priv_size;
623 int (*init)(struct mlxsw_sp *mlxsw_sp, void *priv);
624 void (*fini)(struct mlxsw_sp *mlxsw_sp, void *priv);
625 const struct mlxsw_sp_acl_profile_ops *
626 (*profile_ops)(struct mlxsw_sp *mlxsw_sp,
627 enum mlxsw_sp_acl_profile profile);
628};
629
630struct mlxsw_sp_acl_ruleset;
631
632struct mlxsw_sp_acl_ruleset *
633mlxsw_sp_acl_ruleset_get(struct mlxsw_sp *mlxsw_sp,
634 struct net_device *dev, bool ingress,
635 enum mlxsw_sp_acl_profile profile);
636void mlxsw_sp_acl_ruleset_put(struct mlxsw_sp *mlxsw_sp,
637 struct mlxsw_sp_acl_ruleset *ruleset);
638
639struct mlxsw_sp_acl_rule_info *
640mlxsw_sp_acl_rulei_create(struct mlxsw_sp_acl *acl);
641void mlxsw_sp_acl_rulei_destroy(struct mlxsw_sp_acl_rule_info *rulei);
642int mlxsw_sp_acl_rulei_commit(struct mlxsw_sp_acl_rule_info *rulei);
643void mlxsw_sp_acl_rulei_priority(struct mlxsw_sp_acl_rule_info *rulei,
644 unsigned int priority);
645void mlxsw_sp_acl_rulei_keymask_u32(struct mlxsw_sp_acl_rule_info *rulei,
646 enum mlxsw_afk_element element,
647 u32 key_value, u32 mask_value);
648void mlxsw_sp_acl_rulei_keymask_buf(struct mlxsw_sp_acl_rule_info *rulei,
649 enum mlxsw_afk_element element,
650 const char *key_value,
651 const char *mask_value, unsigned int len);
652void mlxsw_sp_acl_rulei_act_continue(struct mlxsw_sp_acl_rule_info *rulei);
653void mlxsw_sp_acl_rulei_act_jump(struct mlxsw_sp_acl_rule_info *rulei,
654 u16 group_id);
655int mlxsw_sp_acl_rulei_act_drop(struct mlxsw_sp_acl_rule_info *rulei);
656int mlxsw_sp_acl_rulei_act_fwd(struct mlxsw_sp *mlxsw_sp,
657 struct mlxsw_sp_acl_rule_info *rulei,
658 struct net_device *out_dev);
Petr Machataa1502012017-03-09 09:25:19 +0100659int mlxsw_sp_acl_rulei_act_vlan(struct mlxsw_sp *mlxsw_sp,
660 struct mlxsw_sp_acl_rule_info *rulei,
661 u32 action, u16 vid, u16 proto, u8 prio);
Arkadi Sharshevsky48170722017-03-11 09:42:58 +0100662int mlxsw_sp_acl_rulei_act_count(struct mlxsw_sp *mlxsw_sp,
663 struct mlxsw_sp_acl_rule_info *rulei);
Jiri Pirko22a67762017-02-03 10:29:07 +0100664
665struct mlxsw_sp_acl_rule;
666
667struct mlxsw_sp_acl_rule *
668mlxsw_sp_acl_rule_create(struct mlxsw_sp *mlxsw_sp,
669 struct mlxsw_sp_acl_ruleset *ruleset,
670 unsigned long cookie);
671void mlxsw_sp_acl_rule_destroy(struct mlxsw_sp *mlxsw_sp,
672 struct mlxsw_sp_acl_rule *rule);
673int mlxsw_sp_acl_rule_add(struct mlxsw_sp *mlxsw_sp,
674 struct mlxsw_sp_acl_rule *rule);
675void mlxsw_sp_acl_rule_del(struct mlxsw_sp *mlxsw_sp,
676 struct mlxsw_sp_acl_rule *rule);
677struct mlxsw_sp_acl_rule *
678mlxsw_sp_acl_rule_lookup(struct mlxsw_sp *mlxsw_sp,
679 struct mlxsw_sp_acl_ruleset *ruleset,
680 unsigned long cookie);
681struct mlxsw_sp_acl_rule_info *
682mlxsw_sp_acl_rule_rulei(struct mlxsw_sp_acl_rule *rule);
Arkadi Sharshevsky48170722017-03-11 09:42:58 +0100683int mlxsw_sp_acl_rule_get_stats(struct mlxsw_sp *mlxsw_sp,
684 struct mlxsw_sp_acl_rule *rule,
685 u64 *packets, u64 *bytes, u64 *last_use);
Jiri Pirko22a67762017-02-03 10:29:07 +0100686
687int mlxsw_sp_acl_init(struct mlxsw_sp *mlxsw_sp);
688void mlxsw_sp_acl_fini(struct mlxsw_sp *mlxsw_sp);
689
690extern const struct mlxsw_sp_acl_ops mlxsw_sp_acl_tcam_ops;
691
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +0100692int mlxsw_sp_flower_replace(struct mlxsw_sp_port *mlxsw_sp_port, bool ingress,
693 __be16 protocol, struct tc_cls_flower_offload *f);
694void mlxsw_sp_flower_destroy(struct mlxsw_sp_port *mlxsw_sp_port, bool ingress,
695 struct tc_cls_flower_offload *f);
Arkadi Sharshevsky7c1b8eb2017-03-11 09:42:59 +0100696int mlxsw_sp_flower_stats(struct mlxsw_sp_port *mlxsw_sp_port, bool ingress,
697 struct tc_cls_flower_offload *f);
Arkadi Sharshevsky1abcbcc2017-03-11 09:42:53 +0100698int mlxsw_sp_flow_counter_get(struct mlxsw_sp *mlxsw_sp,
699 unsigned int counter_index, u64 *packets,
700 u64 *bytes);
701int mlxsw_sp_flow_counter_alloc(struct mlxsw_sp *mlxsw_sp,
702 unsigned int *p_counter_index);
703void mlxsw_sp_flow_counter_free(struct mlxsw_sp *mlxsw_sp,
704 unsigned int counter_index);
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +0100705
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200706#endif