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Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.h
Jiri Pirko22a67762017-02-03 10:29:07 +01003 * Copyright (c) 2015-2017 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015-2017 Jiri Pirko <jiri@mellanox.com>
Jiri Pirko56ade8f2015-10-16 14:01:37 +02005 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#ifndef _MLXSW_SPECTRUM_H
38#define _MLXSW_SPECTRUM_H
39
40#include <linux/types.h>
41#include <linux/netdevice.h>
Jiri Pirko6cf3c972016-07-05 11:27:39 +020042#include <linux/rhashtable.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020043#include <linux/bitops.h>
44#include <linux/if_vlan.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010045#include <linux/list.h>
Ido Schimmel8e8dfe92016-04-06 17:10:10 +020046#include <linux/dcbnl.h>
Jiri Pirko5e9c16c2016-07-04 08:23:04 +020047#include <linux/in6.h>
Jiri Pirkob45f64d2016-09-26 12:52:31 +020048#include <linux/notifier.h>
Yotam Gigi98d0f7b2017-01-23 11:07:11 +010049#include <net/psample.h>
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +010050#include <net/pkt_cls.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020051
Elad Raz3a49b4f2016-01-10 21:06:28 +010052#include "port.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020053#include "core.h"
Jiri Pirko22a67762017-02-03 10:29:07 +010054#include "core_acl_flex_keys.h"
55#include "core_acl_flex_actions.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020056
57#define MLXSW_SP_VFID_BASE VLAN_N_VID
Nogah Frankel63fe8132017-02-09 14:54:45 +010058#define MLXSW_SP_VFID_MAX 1024 /* Bridged VLAN interfaces */
Ido Schimmel99724c12016-07-04 08:23:14 +020059
60#define MLXSW_SP_RFID_BASE 15360
Ido Schimmel7f71eb42015-12-15 16:03:37 +010061
Elad Raz53ae6282016-01-10 21:06:26 +010062#define MLXSW_SP_MID_MAX 7000
63
Ido Schimmel18f1e702016-02-26 17:32:31 +010064#define MLXSW_SP_PORTS_PER_CLUSTER_MAX 4
65
66#define MLXSW_SP_PORT_BASE_SPEED 25000 /* Mb/s */
67
Ido Schimmel1a198442016-04-06 17:10:02 +020068#define MLXSW_SP_BYTES_PER_CELL 96
69
70#define MLXSW_SP_BYTES_TO_CELLS(b) DIV_ROUND_UP(b, MLXSW_SP_BYTES_PER_CELL)
Jiri Pirko0f433fa2016-04-14 18:19:24 +020071#define MLXSW_SP_CELLS_TO_BYTES(c) (c * MLXSW_SP_BYTES_PER_CELL)
Ido Schimmel1a198442016-04-06 17:10:02 +020072
Jiri Pirkoc6022422016-07-05 11:27:46 +020073#define MLXSW_SP_KVD_LINEAR_SIZE 65536 /* entries */
Nogah Frankel403547d2016-09-20 11:16:52 +020074#define MLXSW_SP_KVD_GRANULARITY 128
Jiri Pirkoc6022422016-07-05 11:27:46 +020075
Ido Schimmel9f7ec052016-04-06 17:10:14 +020076/* Maximum delay buffer needed in case of PAUSE frames, in cells.
77 * Assumes 100m cable and maximum MTU.
78 */
79#define MLXSW_SP_PAUSE_DELAY 612
80
Ido Schimmeld81a6bd2016-04-06 17:10:16 +020081#define MLXSW_SP_CELL_FACTOR 2 /* 2 * cell_size / (IPG + cell_size + 1) */
82
83static inline u16 mlxsw_sp_pfc_delay_get(int mtu, u16 delay)
84{
85 delay = MLXSW_SP_BYTES_TO_CELLS(DIV_ROUND_UP(delay, BITS_PER_BYTE));
86 return MLXSW_SP_CELL_FACTOR * delay + MLXSW_SP_BYTES_TO_CELLS(mtu);
87}
88
Jiri Pirko56ade8f2015-10-16 14:01:37 +020089struct mlxsw_sp_port;
Ido Schimmel4724ba562017-03-10 08:53:39 +010090struct mlxsw_sp_rif;
Jiri Pirko56ade8f2015-10-16 14:01:37 +020091
Jiri Pirko0d65fc12015-12-03 12:12:28 +010092struct mlxsw_sp_upper {
93 struct net_device *dev;
94 unsigned int ref_count;
95};
96
Ido Schimmeld0ec8752016-06-20 23:04:12 +020097struct mlxsw_sp_fid {
Ido Schimmel1c800752016-06-20 23:04:20 +020098 void (*leave)(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel7f71eb42015-12-15 16:03:37 +010099 struct list_head list;
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200100 unsigned int ref_count;
101 struct net_device *dev;
Arkadi Sharshevskybf952332017-03-17 09:38:00 +0100102 struct mlxsw_sp_rif *rif;
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200103 u16 fid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100104};
105
Elad Raz3a49b4f2016-01-10 21:06:28 +0100106struct mlxsw_sp_mid {
107 struct list_head list;
108 unsigned char addr[ETH_ALEN];
Ido Schimmel46d08472016-10-30 10:09:22 +0100109 u16 fid;
Elad Raz3a49b4f2016-01-10 21:06:28 +0100110 u16 mid;
111 unsigned int ref_count;
112};
113
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100114static inline u16 mlxsw_sp_vfid_to_fid(u16 vfid)
115{
116 return MLXSW_SP_VFID_BASE + vfid;
117}
118
Ido Schimmelaac78a42015-12-15 16:03:42 +0100119static inline u16 mlxsw_sp_fid_to_vfid(u16 fid)
120{
121 return fid - MLXSW_SP_VFID_BASE;
122}
123
124static inline bool mlxsw_sp_fid_is_vfid(u16 fid)
125{
Ido Schimmel99724c12016-07-04 08:23:14 +0200126 return fid >= MLXSW_SP_VFID_BASE && fid < MLXSW_SP_RFID_BASE;
127}
128
Jiri Pirko078f9c72016-04-14 18:19:19 +0200129struct mlxsw_sp_sb_pr {
130 enum mlxsw_reg_sbpr_mode mode;
131 u32 size;
132};
133
Jiri Pirko2d0ed392016-04-14 18:19:30 +0200134struct mlxsw_cp_sb_occ {
135 u32 cur;
136 u32 max;
137};
138
Jiri Pirko078f9c72016-04-14 18:19:19 +0200139struct mlxsw_sp_sb_cm {
140 u32 min_buff;
141 u32 max_buff;
142 u8 pool;
Jiri Pirko2d0ed392016-04-14 18:19:30 +0200143 struct mlxsw_cp_sb_occ occ;
Jiri Pirko078f9c72016-04-14 18:19:19 +0200144};
145
146struct mlxsw_sp_sb_pm {
147 u32 min_buff;
148 u32 max_buff;
Jiri Pirko2d0ed392016-04-14 18:19:30 +0200149 struct mlxsw_cp_sb_occ occ;
Jiri Pirko078f9c72016-04-14 18:19:19 +0200150};
151
152#define MLXSW_SP_SB_POOL_COUNT 4
153#define MLXSW_SP_SB_TC_COUNT 8
154
Ido Schimmel5ec2ee72017-03-24 08:02:48 +0100155struct mlxsw_sp_sb_port {
156 struct mlxsw_sp_sb_cm cms[2][MLXSW_SP_SB_TC_COUNT];
157 struct mlxsw_sp_sb_pm pms[2][MLXSW_SP_SB_POOL_COUNT];
158};
159
Jiri Pirko078f9c72016-04-14 18:19:19 +0200160struct mlxsw_sp_sb {
161 struct mlxsw_sp_sb_pr prs[2][MLXSW_SP_SB_POOL_COUNT];
Ido Schimmel5ec2ee72017-03-24 08:02:48 +0100162 struct mlxsw_sp_sb_port *ports;
Jiri Pirko078f9c72016-04-14 18:19:19 +0200163};
164
Jiri Pirko5e9c16c2016-07-04 08:23:04 +0200165#define MLXSW_SP_PREFIX_COUNT (sizeof(struct in6_addr) * BITS_PER_BYTE)
166
167struct mlxsw_sp_prefix_usage {
168 DECLARE_BITMAP(b, MLXSW_SP_PREFIX_COUNT);
169};
170
Jiri Pirko53342022016-07-04 08:23:08 +0200171enum mlxsw_sp_l3proto {
172 MLXSW_SP_L3_PROTO_IPV4,
173 MLXSW_SP_L3_PROTO_IPV6,
174};
175
176struct mlxsw_sp_lpm_tree {
177 u8 id; /* tree ID */
178 unsigned int ref_count;
179 enum mlxsw_sp_l3proto proto;
180 struct mlxsw_sp_prefix_usage prefix_usage;
181};
182
Jiri Pirko6b75c482016-07-04 08:23:09 +0200183struct mlxsw_sp_fib;
184
185struct mlxsw_sp_vr {
186 u16 id; /* virtual router ID */
Jiri Pirko6b75c482016-07-04 08:23:09 +0200187 u32 tb_id; /* kernel fib table id */
Ido Schimmel69132292017-03-10 08:53:42 +0100188 unsigned int rif_count;
Ido Schimmel76610eb2017-03-10 08:53:41 +0100189 struct mlxsw_sp_fib *fib4;
Jiri Pirko6b75c482016-07-04 08:23:09 +0200190};
191
Yotam Gigi763b4b72016-07-21 12:03:17 +0200192enum mlxsw_sp_span_type {
193 MLXSW_SP_SPAN_EGRESS,
194 MLXSW_SP_SPAN_INGRESS
195};
196
197struct mlxsw_sp_span_inspected_port {
198 struct list_head list;
199 enum mlxsw_sp_span_type type;
200 u8 local_port;
201};
202
203struct mlxsw_sp_span_entry {
204 u8 local_port;
205 bool used;
206 struct list_head bound_ports_list;
207 int ref_count;
208 int id;
209};
210
211enum mlxsw_sp_port_mall_action_type {
212 MLXSW_SP_PORT_MALL_MIRROR,
Yotam Gigi98d0f7b2017-01-23 11:07:11 +0100213 MLXSW_SP_PORT_MALL_SAMPLE,
Yotam Gigi763b4b72016-07-21 12:03:17 +0200214};
215
216struct mlxsw_sp_port_mall_mirror_tc_entry {
217 u8 to_local_port;
218 bool ingress;
219};
220
221struct mlxsw_sp_port_mall_tc_entry {
222 struct list_head list;
223 unsigned long cookie;
224 enum mlxsw_sp_port_mall_action_type type;
225 union {
226 struct mlxsw_sp_port_mall_mirror_tc_entry mirror;
227 };
228};
229
Jiri Pirko53342022016-07-04 08:23:08 +0200230struct mlxsw_sp_router {
Nogah Frankel9497c042016-09-20 11:16:54 +0200231 struct mlxsw_sp_vr *vrs;
Jiri Pirko6cf3c972016-07-05 11:27:39 +0200232 struct rhashtable neigh_ht;
Ido Schimmele9ad5e72017-02-08 11:16:29 +0100233 struct rhashtable nexthop_group_ht;
Ido Schimmelc53b8e12017-02-08 11:16:30 +0100234 struct rhashtable nexthop_ht;
Yotam Gigic723c7352016-07-05 11:27:43 +0200235 struct {
Ido Schimmel8494ab02017-03-24 08:02:47 +0100236 struct mlxsw_sp_lpm_tree *trees;
237 unsigned int tree_count;
238 } lpm;
239 struct {
Yotam Gigic723c7352016-07-05 11:27:43 +0200240 struct delayed_work dw;
241 unsigned long interval; /* ms */
242 } neighs_update;
Yotam Gigi0b2361d2016-07-05 11:27:52 +0200243 struct delayed_work nexthop_probe_dw;
244#define MLXSW_SP_UNRESOLVED_NH_PROBE_INTERVAL 5000 /* ms */
Yotam Gigib2157142016-07-05 11:27:51 +0200245 struct list_head nexthop_neighs_list;
Jiri Pirkob45f64d2016-09-26 12:52:31 +0200246 bool aborted;
Jiri Pirko53342022016-07-04 08:23:08 +0200247};
248
Jiri Pirko22a67762017-02-03 10:29:07 +0100249struct mlxsw_sp_acl;
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +0100250struct mlxsw_sp_counter_pool;
Jiri Pirko22a67762017-02-03 10:29:07 +0100251
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200252struct mlxsw_sp {
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100253 struct {
254 struct list_head list;
Ido Schimmel99724c12016-07-04 08:23:14 +0200255 DECLARE_BITMAP(mapped, MLXSW_SP_VFID_MAX);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +0200256 } vfids;
Elad Raz3a49b4f2016-01-10 21:06:28 +0100257 struct {
258 struct list_head list;
Ido Schimmeld8651fd2016-06-20 23:04:07 +0200259 DECLARE_BITMAP(mapped, MLXSW_SP_MID_MAX);
Elad Raz3a49b4f2016-01-10 21:06:28 +0100260 } br_mids;
Ido Schimmel14d39462016-06-20 23:04:15 +0200261 struct list_head fids; /* VLAN-aware bridge FIDs */
Nogah Frankel8f8a62d2016-09-20 11:16:57 +0200262 struct mlxsw_sp_rif **rifs;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200263 struct mlxsw_sp_port **ports;
264 struct mlxsw_core *core;
265 const struct mlxsw_bus_info *bus_info;
266 unsigned char base_mac[ETH_ALEN];
267 struct {
268 struct delayed_work dw;
269#define MLXSW_SP_DEFAULT_LEARNING_INTERVAL 100
270 unsigned int interval; /* ms */
271 } fdb_notify;
Ido Schimmel869f63a2016-03-08 12:59:33 -0800272#define MLXSW_SP_MIN_AGEING_TIME 10
273#define MLXSW_SP_MAX_AGEING_TIME 1000000
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200274#define MLXSW_SP_DEFAULT_AGEING_TIME 300
275 u32 ageing_time;
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100276 struct mlxsw_sp_upper master_bridge;
Nogah Frankelce0bd2b2016-09-20 11:16:50 +0200277 struct mlxsw_sp_upper *lags;
Ido Schimmel5ec2ee72017-03-24 08:02:48 +0100278 u8 *port_to_module;
Jiri Pirko078f9c72016-04-14 18:19:19 +0200279 struct mlxsw_sp_sb sb;
Jiri Pirko53342022016-07-04 08:23:08 +0200280 struct mlxsw_sp_router router;
Jiri Pirko22a67762017-02-03 10:29:07 +0100281 struct mlxsw_sp_acl *acl;
Jiri Pirkob090ef02016-07-05 11:27:47 +0200282 struct {
283 DECLARE_BITMAP(usage, MLXSW_SP_KVD_LINEAR_SIZE);
284 } kvdl;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200285
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +0100286 struct mlxsw_sp_counter_pool *counter_pool;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200287 struct {
288 struct mlxsw_sp_span_entry *entries;
289 int entries_count;
290 } span;
Jiri Pirkob45f64d2016-09-26 12:52:31 +0200291 struct notifier_block fib_nb;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200292};
293
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100294static inline struct mlxsw_sp_upper *
295mlxsw_sp_lag_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
296{
297 return &mlxsw_sp->lags[lag_id];
298}
299
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200300struct mlxsw_sp_port_pcpu_stats {
301 u64 rx_packets;
302 u64 rx_bytes;
303 u64 tx_packets;
304 u64 tx_bytes;
305 struct u64_stats_sync syncp;
306 u32 tx_dropped;
307};
308
Yotam Gigi98d0f7b2017-01-23 11:07:11 +0100309struct mlxsw_sp_port_sample {
310 struct psample_group __rcu *psample_group;
311 u32 trunc_size;
312 u32 rate;
313 bool truncate;
314};
315
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200316struct mlxsw_sp_port {
317 struct net_device *dev;
318 struct mlxsw_sp_port_pcpu_stats __percpu *pcpu_stats;
319 struct mlxsw_sp *mlxsw_sp;
320 u8 local_port;
321 u8 stp_state;
Nogah Frankel8ecd4592017-02-09 14:54:47 +0100322 u16 learning:1,
Jiri Pirko0d9b9702015-10-28 10:16:56 +0100323 learning_sync:1,
Ido Schimmel02930382015-10-28 10:16:58 +0100324 uc_flood:1,
Nogah Frankel71c365b2017-02-09 14:54:46 +0100325 mc_flood:1,
Nogah Frankel8ecd4592017-02-09 14:54:47 +0100326 mc_router:1,
327 mc_disabled:1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100328 bridged:1,
Ido Schimmel18f1e702016-02-26 17:32:31 +0100329 lagged:1,
330 split:1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200331 u16 pvid;
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100332 u16 lag_id;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100333 struct {
334 struct list_head list;
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200335 struct mlxsw_sp_fid *f;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100336 u16 vid;
337 } vport;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200338 struct {
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200339 u8 tx_pause:1,
Ido Schimmel0c83f882016-09-12 13:26:23 +0200340 rx_pause:1,
341 autoneg:1;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200342 } link;
343 struct {
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200344 struct ieee_ets *ets;
Ido Schimmelcc7cf512016-04-06 17:10:11 +0200345 struct ieee_maxrate *maxrate;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200346 struct ieee_pfc *pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200347 } dcb;
Ido Schimmeld664b412016-06-09 09:51:40 +0200348 struct {
349 u8 module;
350 u8 width;
351 u8 lane;
352 } mapping;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200353 /* 802.1Q bridge VLANs */
Ido Schimmelbd40e9d2015-12-15 16:03:36 +0100354 unsigned long *active_vlans;
Elad Razfc1273a2016-01-06 13:01:11 +0100355 unsigned long *untagged_vlans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200356 /* VLAN interfaces */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100357 struct list_head vports_list;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200358 /* TC handles */
359 struct list_head mall_tc_list;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200360 struct {
361 #define MLXSW_HW_STATS_UPDATE_TIME HZ
362 struct rtnl_link_stats64 *cache;
363 struct delayed_work update_dw;
364 } hw_stats;
Yotam Gigi98d0f7b2017-01-23 11:07:11 +0100365 struct mlxsw_sp_port_sample *sample;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200366};
367
Jiri Pirko22a67762017-02-03 10:29:07 +0100368bool mlxsw_sp_port_dev_check(const struct net_device *dev);
Ido Schimmel4724ba562017-03-10 08:53:39 +0100369struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev);
Jiri Pirko7ce856a2016-07-04 08:23:12 +0200370struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev);
371void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port);
372
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200373static inline bool
374mlxsw_sp_port_is_pause_en(const struct mlxsw_sp_port *mlxsw_sp_port)
375{
376 return mlxsw_sp_port->link.tx_pause || mlxsw_sp_port->link.rx_pause;
377}
378
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100379static inline struct mlxsw_sp_port *
380mlxsw_sp_port_lagged_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id, u8 port_index)
381{
382 struct mlxsw_sp_port *mlxsw_sp_port;
383 u8 local_port;
384
385 local_port = mlxsw_core_lag_mapping_get(mlxsw_sp->core,
386 lag_id, port_index);
387 mlxsw_sp_port = mlxsw_sp->ports[local_port];
388 return mlxsw_sp_port && mlxsw_sp_port->lagged ? mlxsw_sp_port : NULL;
389}
390
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100391static inline u16
392mlxsw_sp_vport_vid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
393{
394 return mlxsw_sp_vport->vport.vid;
395}
396
Ido Schimmel6381b3a2016-06-20 23:04:16 +0200397static inline bool
398mlxsw_sp_port_is_vport(const struct mlxsw_sp_port *mlxsw_sp_port)
399{
400 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
401
402 return vid != 0;
403}
404
Ido Schimmel41b996c2016-06-20 23:04:17 +0200405static inline void mlxsw_sp_vport_fid_set(struct mlxsw_sp_port *mlxsw_sp_vport,
406 struct mlxsw_sp_fid *f)
407{
408 mlxsw_sp_vport->vport.f = f;
409}
410
411static inline struct mlxsw_sp_fid *
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200412mlxsw_sp_vport_fid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100413{
Ido Schimmel41b996c2016-06-20 23:04:17 +0200414 return mlxsw_sp_vport->vport.f;
415}
416
417static inline struct net_device *
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +0200418mlxsw_sp_vport_dev_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel41b996c2016-06-20 23:04:17 +0200419{
420 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
421
Ido Schimmel56918b62016-06-20 23:04:18 +0200422 return f ? f->dev : NULL;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100423}
424
425static inline struct mlxsw_sp_port *
426mlxsw_sp_port_vport_find(const struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
427{
428 struct mlxsw_sp_port *mlxsw_sp_vport;
429
430 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
431 vport.list) {
432 if (mlxsw_sp_vport_vid_get(mlxsw_sp_vport) == vid)
433 return mlxsw_sp_vport;
434 }
435
436 return NULL;
437}
438
Ido Schimmelaac78a42015-12-15 16:03:42 +0100439static inline struct mlxsw_sp_port *
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200440mlxsw_sp_port_vport_find_by_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
441 u16 fid)
Ido Schimmelaac78a42015-12-15 16:03:42 +0100442{
443 struct mlxsw_sp_port *mlxsw_sp_vport;
444
445 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
446 vport.list) {
Ido Schimmel41b996c2016-06-20 23:04:17 +0200447 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
448
Ido Schimmel56918b62016-06-20 23:04:18 +0200449 if (f && f->fid == fid)
Ido Schimmelaac78a42015-12-15 16:03:42 +0100450 return mlxsw_sp_vport;
451 }
452
453 return NULL;
454}
455
Ido Schimmel701b1862016-07-04 08:23:16 +0200456static inline struct mlxsw_sp_fid *mlxsw_sp_fid_find(struct mlxsw_sp *mlxsw_sp,
457 u16 fid)
458{
459 struct mlxsw_sp_fid *f;
460
461 list_for_each_entry(f, &mlxsw_sp->fids, list)
462 if (f->fid == fid)
463 return f;
464
465 return NULL;
466}
467
468static inline struct mlxsw_sp_fid *
469mlxsw_sp_vfid_find(const struct mlxsw_sp *mlxsw_sp,
470 const struct net_device *br_dev)
471{
472 struct mlxsw_sp_fid *f;
473
474 list_for_each_entry(f, &mlxsw_sp->vfids.list, list)
475 if (f->dev == br_dev)
476 return f;
477
478 return NULL;
479}
480
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200481enum mlxsw_sp_flood_table {
482 MLXSW_SP_FLOOD_TABLE_UC,
Nogah Frankel71c365b2017-02-09 14:54:46 +0100483 MLXSW_SP_FLOOD_TABLE_BC,
484 MLXSW_SP_FLOOD_TABLE_MC,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200485};
486
487int mlxsw_sp_buffers_init(struct mlxsw_sp *mlxsw_sp);
Jiri Pirko0f433fa2016-04-14 18:19:24 +0200488void mlxsw_sp_buffers_fini(struct mlxsw_sp *mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200489int mlxsw_sp_port_buffers_init(struct mlxsw_sp_port *mlxsw_sp_port);
Jiri Pirko0f433fa2016-04-14 18:19:24 +0200490int mlxsw_sp_sb_pool_get(struct mlxsw_core *mlxsw_core,
491 unsigned int sb_index, u16 pool_index,
492 struct devlink_sb_pool_info *pool_info);
493int mlxsw_sp_sb_pool_set(struct mlxsw_core *mlxsw_core,
494 unsigned int sb_index, u16 pool_index, u32 size,
495 enum devlink_sb_threshold_type threshold_type);
496int mlxsw_sp_sb_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
497 unsigned int sb_index, u16 pool_index,
498 u32 *p_threshold);
499int mlxsw_sp_sb_port_pool_set(struct mlxsw_core_port *mlxsw_core_port,
500 unsigned int sb_index, u16 pool_index,
501 u32 threshold);
502int mlxsw_sp_sb_tc_pool_bind_get(struct mlxsw_core_port *mlxsw_core_port,
503 unsigned int sb_index, u16 tc_index,
504 enum devlink_sb_pool_type pool_type,
505 u16 *p_pool_index, u32 *p_threshold);
506int mlxsw_sp_sb_tc_pool_bind_set(struct mlxsw_core_port *mlxsw_core_port,
507 unsigned int sb_index, u16 tc_index,
508 enum devlink_sb_pool_type pool_type,
509 u16 pool_index, u32 threshold);
Jiri Pirko2d0ed392016-04-14 18:19:30 +0200510int mlxsw_sp_sb_occ_snapshot(struct mlxsw_core *mlxsw_core,
511 unsigned int sb_index);
512int mlxsw_sp_sb_occ_max_clear(struct mlxsw_core *mlxsw_core,
513 unsigned int sb_index);
514int mlxsw_sp_sb_occ_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
515 unsigned int sb_index, u16 pool_index,
516 u32 *p_cur, u32 *p_max);
517int mlxsw_sp_sb_occ_tc_port_bind_get(struct mlxsw_core_port *mlxsw_core_port,
518 unsigned int sb_index, u16 tc_index,
519 enum devlink_sb_pool_type pool_type,
520 u32 *p_cur, u32 *p_max);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200521
522int mlxsw_sp_switchdev_init(struct mlxsw_sp *mlxsw_sp);
523void mlxsw_sp_switchdev_fini(struct mlxsw_sp *mlxsw_sp);
524int mlxsw_sp_port_vlan_init(struct mlxsw_sp_port *mlxsw_sp_port);
525void mlxsw_sp_port_switchdev_init(struct mlxsw_sp_port *mlxsw_sp_port);
526void mlxsw_sp_port_switchdev_fini(struct mlxsw_sp_port *mlxsw_sp_port);
527int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
528 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
529 u16 vid);
530int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
531 u16 vid_end, bool is_member, bool untagged);
Ido Schimmele6060022016-06-20 23:04:11 +0200532int mlxsw_sp_vport_flood_set(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
Ido Schimmel47a0a9e2016-06-20 23:04:08 +0200533 bool set);
Ido Schimmel4dc236c2016-01-27 15:20:16 +0100534void mlxsw_sp_port_active_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port);
Ido Schimmel28a01d22016-02-18 11:30:02 +0100535int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +0200536int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid);
Ido Schimmel6e095fd2016-07-04 08:23:13 +0200537int mlxsw_sp_rif_fdb_op(struct mlxsw_sp *mlxsw_sp, const char *mac, u16 fid,
538 bool adding);
Ido Schimmel701b1862016-07-04 08:23:16 +0200539struct mlxsw_sp_fid *mlxsw_sp_fid_create(struct mlxsw_sp *mlxsw_sp, u16 fid);
540void mlxsw_sp_fid_destroy(struct mlxsw_sp *mlxsw_sp, struct mlxsw_sp_fid *f);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200541int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
542 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
543 bool dwrr, u8 dwrr_weight);
544int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
545 u8 switch_prio, u8 tclass);
546int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200547 u8 *prio_tc, bool pause_en,
548 struct ieee_pfc *my_pfc);
Ido Schimmelcc7cf512016-04-06 17:10:11 +0200549int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
550 enum mlxsw_reg_qeec_hr hr, u8 index,
551 u8 next_index, u32 maxrate);
Ido Schimmel584d73d2016-08-24 12:00:26 +0200552int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
553 u16 vid_begin, u16 vid_end,
554 bool learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200555
Ido Schimmelf00817d2016-04-06 17:10:09 +0200556#ifdef CONFIG_MLXSW_SPECTRUM_DCB
557
558int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port);
559void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port);
560
561#else
562
563static inline int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port)
564{
565 return 0;
566}
567
568static inline void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port)
569{}
570
571#endif
572
Ido Schimmel464dce12016-07-02 11:00:15 +0200573int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp);
574void mlxsw_sp_router_fini(struct mlxsw_sp *mlxsw_sp);
Jiri Pirkoe7322632016-09-01 10:37:43 +0200575int mlxsw_sp_router_netevent_event(struct notifier_block *unused,
576 unsigned long event, void *ptr);
Ido Schimmel4724ba562017-03-10 08:53:39 +0100577int mlxsw_sp_netdevice_router_port_event(struct net_device *dev);
578int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
579 unsigned long event, void *ptr);
580void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
Arkadi Sharshevskybf952332017-03-17 09:38:00 +0100581 struct mlxsw_sp_rif *rif);
Ido Schimmel7179eb52017-03-16 09:08:18 +0100582int mlxsw_sp_vport_vrf_join(struct mlxsw_sp_port *mlxsw_sp_vport);
583void mlxsw_sp_vport_vrf_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
584int mlxsw_sp_port_vrf_join(struct mlxsw_sp_port *mlxsw_sp_port);
585void mlxsw_sp_port_vrf_leave(struct mlxsw_sp_port *mlxsw_sp_port);
Ido Schimmel3d70e4582017-03-16 09:08:19 +0100586int mlxsw_sp_bridge_vrf_join(struct mlxsw_sp *mlxsw_sp,
587 struct net_device *l3_dev);
588void mlxsw_sp_bridge_vrf_leave(struct mlxsw_sp *mlxsw_sp,
589 struct net_device *l3_dev);
Ido Schimmel464dce12016-07-02 11:00:15 +0200590
Jiri Pirkob090ef02016-07-05 11:27:47 +0200591int mlxsw_sp_kvdl_alloc(struct mlxsw_sp *mlxsw_sp, unsigned int entry_count);
592void mlxsw_sp_kvdl_free(struct mlxsw_sp *mlxsw_sp, int entry_index);
593
Jiri Pirko22a67762017-02-03 10:29:07 +0100594struct mlxsw_afk *mlxsw_sp_acl_afk(struct mlxsw_sp_acl *acl);
595
596struct mlxsw_sp_acl_rule_info {
597 unsigned int priority;
598 struct mlxsw_afk_element_values values;
599 struct mlxsw_afa_block *act_block;
Arkadi Sharshevsky48170722017-03-11 09:42:58 +0100600 unsigned int counter_index;
601 bool counter_valid;
Jiri Pirko22a67762017-02-03 10:29:07 +0100602};
603
604enum mlxsw_sp_acl_profile {
605 MLXSW_SP_ACL_PROFILE_FLOWER,
606};
607
608struct mlxsw_sp_acl_profile_ops {
609 size_t ruleset_priv_size;
610 int (*ruleset_add)(struct mlxsw_sp *mlxsw_sp,
611 void *priv, void *ruleset_priv);
612 void (*ruleset_del)(struct mlxsw_sp *mlxsw_sp, void *ruleset_priv);
613 int (*ruleset_bind)(struct mlxsw_sp *mlxsw_sp, void *ruleset_priv,
614 struct net_device *dev, bool ingress);
615 void (*ruleset_unbind)(struct mlxsw_sp *mlxsw_sp, void *ruleset_priv);
616 size_t rule_priv_size;
617 int (*rule_add)(struct mlxsw_sp *mlxsw_sp,
618 void *ruleset_priv, void *rule_priv,
619 struct mlxsw_sp_acl_rule_info *rulei);
620 void (*rule_del)(struct mlxsw_sp *mlxsw_sp, void *rule_priv);
Arkadi Sharshevsky7fd056c2017-03-11 09:42:54 +0100621 int (*rule_activity_get)(struct mlxsw_sp *mlxsw_sp, void *rule_priv,
622 bool *activity);
Jiri Pirko22a67762017-02-03 10:29:07 +0100623};
624
625struct mlxsw_sp_acl_ops {
626 size_t priv_size;
627 int (*init)(struct mlxsw_sp *mlxsw_sp, void *priv);
628 void (*fini)(struct mlxsw_sp *mlxsw_sp, void *priv);
629 const struct mlxsw_sp_acl_profile_ops *
630 (*profile_ops)(struct mlxsw_sp *mlxsw_sp,
631 enum mlxsw_sp_acl_profile profile);
632};
633
634struct mlxsw_sp_acl_ruleset;
635
636struct mlxsw_sp_acl_ruleset *
637mlxsw_sp_acl_ruleset_get(struct mlxsw_sp *mlxsw_sp,
638 struct net_device *dev, bool ingress,
639 enum mlxsw_sp_acl_profile profile);
640void mlxsw_sp_acl_ruleset_put(struct mlxsw_sp *mlxsw_sp,
641 struct mlxsw_sp_acl_ruleset *ruleset);
642
643struct mlxsw_sp_acl_rule_info *
644mlxsw_sp_acl_rulei_create(struct mlxsw_sp_acl *acl);
645void mlxsw_sp_acl_rulei_destroy(struct mlxsw_sp_acl_rule_info *rulei);
646int mlxsw_sp_acl_rulei_commit(struct mlxsw_sp_acl_rule_info *rulei);
647void mlxsw_sp_acl_rulei_priority(struct mlxsw_sp_acl_rule_info *rulei,
648 unsigned int priority);
649void mlxsw_sp_acl_rulei_keymask_u32(struct mlxsw_sp_acl_rule_info *rulei,
650 enum mlxsw_afk_element element,
651 u32 key_value, u32 mask_value);
652void mlxsw_sp_acl_rulei_keymask_buf(struct mlxsw_sp_acl_rule_info *rulei,
653 enum mlxsw_afk_element element,
654 const char *key_value,
655 const char *mask_value, unsigned int len);
656void mlxsw_sp_acl_rulei_act_continue(struct mlxsw_sp_acl_rule_info *rulei);
657void mlxsw_sp_acl_rulei_act_jump(struct mlxsw_sp_acl_rule_info *rulei,
658 u16 group_id);
659int mlxsw_sp_acl_rulei_act_drop(struct mlxsw_sp_acl_rule_info *rulei);
660int mlxsw_sp_acl_rulei_act_fwd(struct mlxsw_sp *mlxsw_sp,
661 struct mlxsw_sp_acl_rule_info *rulei,
662 struct net_device *out_dev);
Petr Machataa1502012017-03-09 09:25:19 +0100663int mlxsw_sp_acl_rulei_act_vlan(struct mlxsw_sp *mlxsw_sp,
664 struct mlxsw_sp_acl_rule_info *rulei,
665 u32 action, u16 vid, u16 proto, u8 prio);
Arkadi Sharshevsky48170722017-03-11 09:42:58 +0100666int mlxsw_sp_acl_rulei_act_count(struct mlxsw_sp *mlxsw_sp,
667 struct mlxsw_sp_acl_rule_info *rulei);
Jiri Pirko22a67762017-02-03 10:29:07 +0100668
669struct mlxsw_sp_acl_rule;
670
671struct mlxsw_sp_acl_rule *
672mlxsw_sp_acl_rule_create(struct mlxsw_sp *mlxsw_sp,
673 struct mlxsw_sp_acl_ruleset *ruleset,
674 unsigned long cookie);
675void mlxsw_sp_acl_rule_destroy(struct mlxsw_sp *mlxsw_sp,
676 struct mlxsw_sp_acl_rule *rule);
677int mlxsw_sp_acl_rule_add(struct mlxsw_sp *mlxsw_sp,
678 struct mlxsw_sp_acl_rule *rule);
679void mlxsw_sp_acl_rule_del(struct mlxsw_sp *mlxsw_sp,
680 struct mlxsw_sp_acl_rule *rule);
681struct mlxsw_sp_acl_rule *
682mlxsw_sp_acl_rule_lookup(struct mlxsw_sp *mlxsw_sp,
683 struct mlxsw_sp_acl_ruleset *ruleset,
684 unsigned long cookie);
685struct mlxsw_sp_acl_rule_info *
686mlxsw_sp_acl_rule_rulei(struct mlxsw_sp_acl_rule *rule);
Arkadi Sharshevsky48170722017-03-11 09:42:58 +0100687int mlxsw_sp_acl_rule_get_stats(struct mlxsw_sp *mlxsw_sp,
688 struct mlxsw_sp_acl_rule *rule,
689 u64 *packets, u64 *bytes, u64 *last_use);
Jiri Pirko22a67762017-02-03 10:29:07 +0100690
691int mlxsw_sp_acl_init(struct mlxsw_sp *mlxsw_sp);
692void mlxsw_sp_acl_fini(struct mlxsw_sp *mlxsw_sp);
693
694extern const struct mlxsw_sp_acl_ops mlxsw_sp_acl_tcam_ops;
695
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +0100696int mlxsw_sp_flower_replace(struct mlxsw_sp_port *mlxsw_sp_port, bool ingress,
697 __be16 protocol, struct tc_cls_flower_offload *f);
698void mlxsw_sp_flower_destroy(struct mlxsw_sp_port *mlxsw_sp_port, bool ingress,
699 struct tc_cls_flower_offload *f);
Arkadi Sharshevsky7c1b8eb2017-03-11 09:42:59 +0100700int mlxsw_sp_flower_stats(struct mlxsw_sp_port *mlxsw_sp_port, bool ingress,
701 struct tc_cls_flower_offload *f);
Arkadi Sharshevsky1abcbcc2017-03-11 09:42:53 +0100702int mlxsw_sp_flow_counter_get(struct mlxsw_sp *mlxsw_sp,
703 unsigned int counter_index, u64 *packets,
704 u64 *bytes);
705int mlxsw_sp_flow_counter_alloc(struct mlxsw_sp *mlxsw_sp,
706 unsigned int *p_counter_index);
707void mlxsw_sp_flow_counter_free(struct mlxsw_sp *mlxsw_sp,
708 unsigned int counter_index);
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +0100709
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200710#endif