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Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.h
Jiri Pirko22a67762017-02-03 10:29:07 +01003 * Copyright (c) 2015-2017 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015-2017 Jiri Pirko <jiri@mellanox.com>
Jiri Pirko56ade8f2015-10-16 14:01:37 +02005 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#ifndef _MLXSW_SPECTRUM_H
38#define _MLXSW_SPECTRUM_H
39
40#include <linux/types.h>
41#include <linux/netdevice.h>
Jiri Pirko6cf3c972016-07-05 11:27:39 +020042#include <linux/rhashtable.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020043#include <linux/bitops.h>
44#include <linux/if_vlan.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010045#include <linux/list.h>
Ido Schimmel8e8dfe92016-04-06 17:10:10 +020046#include <linux/dcbnl.h>
Jiri Pirko5e9c16c2016-07-04 08:23:04 +020047#include <linux/in6.h>
Jiri Pirkob45f64d2016-09-26 12:52:31 +020048#include <linux/notifier.h>
Yotam Gigi98d0f7b2017-01-23 11:07:11 +010049#include <net/psample.h>
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +010050#include <net/pkt_cls.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020051
Elad Raz3a49b4f2016-01-10 21:06:28 +010052#include "port.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020053#include "core.h"
Jiri Pirko22a67762017-02-03 10:29:07 +010054#include "core_acl_flex_keys.h"
55#include "core_acl_flex_actions.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020056
57#define MLXSW_SP_VFID_BASE VLAN_N_VID
Nogah Frankel63fe8132017-02-09 14:54:45 +010058#define MLXSW_SP_VFID_MAX 1024 /* Bridged VLAN interfaces */
Ido Schimmel99724c12016-07-04 08:23:14 +020059
60#define MLXSW_SP_RFID_BASE 15360
Ido Schimmel7f71eb42015-12-15 16:03:37 +010061
Elad Raz53ae6282016-01-10 21:06:26 +010062#define MLXSW_SP_MID_MAX 7000
63
Ido Schimmel18f1e702016-02-26 17:32:31 +010064#define MLXSW_SP_PORTS_PER_CLUSTER_MAX 4
65
Jiri Pirko53342022016-07-04 08:23:08 +020066#define MLXSW_SP_LPM_TREE_MIN 2 /* trees 0 and 1 are reserved */
67#define MLXSW_SP_LPM_TREE_MAX 22
68#define MLXSW_SP_LPM_TREE_COUNT (MLXSW_SP_LPM_TREE_MAX - MLXSW_SP_LPM_TREE_MIN)
69
Ido Schimmel18f1e702016-02-26 17:32:31 +010070#define MLXSW_SP_PORT_BASE_SPEED 25000 /* Mb/s */
71
Ido Schimmel1a198442016-04-06 17:10:02 +020072#define MLXSW_SP_BYTES_PER_CELL 96
73
74#define MLXSW_SP_BYTES_TO_CELLS(b) DIV_ROUND_UP(b, MLXSW_SP_BYTES_PER_CELL)
Jiri Pirko0f433fa2016-04-14 18:19:24 +020075#define MLXSW_SP_CELLS_TO_BYTES(c) (c * MLXSW_SP_BYTES_PER_CELL)
Ido Schimmel1a198442016-04-06 17:10:02 +020076
Jiri Pirkoc6022422016-07-05 11:27:46 +020077#define MLXSW_SP_KVD_LINEAR_SIZE 65536 /* entries */
Nogah Frankel403547d2016-09-20 11:16:52 +020078#define MLXSW_SP_KVD_GRANULARITY 128
Jiri Pirkoc6022422016-07-05 11:27:46 +020079
Ido Schimmel9f7ec052016-04-06 17:10:14 +020080/* Maximum delay buffer needed in case of PAUSE frames, in cells.
81 * Assumes 100m cable and maximum MTU.
82 */
83#define MLXSW_SP_PAUSE_DELAY 612
84
Ido Schimmeld81a6bd2016-04-06 17:10:16 +020085#define MLXSW_SP_CELL_FACTOR 2 /* 2 * cell_size / (IPG + cell_size + 1) */
86
87static inline u16 mlxsw_sp_pfc_delay_get(int mtu, u16 delay)
88{
89 delay = MLXSW_SP_BYTES_TO_CELLS(DIV_ROUND_UP(delay, BITS_PER_BYTE));
90 return MLXSW_SP_CELL_FACTOR * delay + MLXSW_SP_BYTES_TO_CELLS(mtu);
91}
92
Jiri Pirko56ade8f2015-10-16 14:01:37 +020093struct mlxsw_sp_port;
Ido Schimmel4724ba562017-03-10 08:53:39 +010094struct mlxsw_sp_rif;
Jiri Pirko56ade8f2015-10-16 14:01:37 +020095
Jiri Pirko0d65fc12015-12-03 12:12:28 +010096struct mlxsw_sp_upper {
97 struct net_device *dev;
98 unsigned int ref_count;
99};
100
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200101struct mlxsw_sp_fid {
Ido Schimmel1c800752016-06-20 23:04:20 +0200102 void (*leave)(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100103 struct list_head list;
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200104 unsigned int ref_count;
105 struct net_device *dev;
Arkadi Sharshevskybf952332017-03-17 09:38:00 +0100106 struct mlxsw_sp_rif *rif;
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200107 u16 fid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100108};
109
Elad Raz3a49b4f2016-01-10 21:06:28 +0100110struct mlxsw_sp_mid {
111 struct list_head list;
112 unsigned char addr[ETH_ALEN];
Ido Schimmel46d08472016-10-30 10:09:22 +0100113 u16 fid;
Elad Raz3a49b4f2016-01-10 21:06:28 +0100114 u16 mid;
115 unsigned int ref_count;
116};
117
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100118static inline u16 mlxsw_sp_vfid_to_fid(u16 vfid)
119{
120 return MLXSW_SP_VFID_BASE + vfid;
121}
122
Ido Schimmelaac78a42015-12-15 16:03:42 +0100123static inline u16 mlxsw_sp_fid_to_vfid(u16 fid)
124{
125 return fid - MLXSW_SP_VFID_BASE;
126}
127
128static inline bool mlxsw_sp_fid_is_vfid(u16 fid)
129{
Ido Schimmel99724c12016-07-04 08:23:14 +0200130 return fid >= MLXSW_SP_VFID_BASE && fid < MLXSW_SP_RFID_BASE;
131}
132
Jiri Pirko078f9c72016-04-14 18:19:19 +0200133struct mlxsw_sp_sb_pr {
134 enum mlxsw_reg_sbpr_mode mode;
135 u32 size;
136};
137
Jiri Pirko2d0ed392016-04-14 18:19:30 +0200138struct mlxsw_cp_sb_occ {
139 u32 cur;
140 u32 max;
141};
142
Jiri Pirko078f9c72016-04-14 18:19:19 +0200143struct mlxsw_sp_sb_cm {
144 u32 min_buff;
145 u32 max_buff;
146 u8 pool;
Jiri Pirko2d0ed392016-04-14 18:19:30 +0200147 struct mlxsw_cp_sb_occ occ;
Jiri Pirko078f9c72016-04-14 18:19:19 +0200148};
149
150struct mlxsw_sp_sb_pm {
151 u32 min_buff;
152 u32 max_buff;
Jiri Pirko2d0ed392016-04-14 18:19:30 +0200153 struct mlxsw_cp_sb_occ occ;
Jiri Pirko078f9c72016-04-14 18:19:19 +0200154};
155
156#define MLXSW_SP_SB_POOL_COUNT 4
157#define MLXSW_SP_SB_TC_COUNT 8
158
159struct mlxsw_sp_sb {
160 struct mlxsw_sp_sb_pr prs[2][MLXSW_SP_SB_POOL_COUNT];
161 struct {
162 struct mlxsw_sp_sb_cm cms[2][MLXSW_SP_SB_TC_COUNT];
163 struct mlxsw_sp_sb_pm pms[2][MLXSW_SP_SB_POOL_COUNT];
164 } ports[MLXSW_PORT_MAX_PORTS];
165};
166
Jiri Pirko5e9c16c2016-07-04 08:23:04 +0200167#define MLXSW_SP_PREFIX_COUNT (sizeof(struct in6_addr) * BITS_PER_BYTE)
168
169struct mlxsw_sp_prefix_usage {
170 DECLARE_BITMAP(b, MLXSW_SP_PREFIX_COUNT);
171};
172
Jiri Pirko53342022016-07-04 08:23:08 +0200173enum mlxsw_sp_l3proto {
174 MLXSW_SP_L3_PROTO_IPV4,
175 MLXSW_SP_L3_PROTO_IPV6,
176};
177
178struct mlxsw_sp_lpm_tree {
179 u8 id; /* tree ID */
180 unsigned int ref_count;
181 enum mlxsw_sp_l3proto proto;
182 struct mlxsw_sp_prefix_usage prefix_usage;
183};
184
Jiri Pirko6b75c482016-07-04 08:23:09 +0200185struct mlxsw_sp_fib;
186
187struct mlxsw_sp_vr {
188 u16 id; /* virtual router ID */
Jiri Pirko6b75c482016-07-04 08:23:09 +0200189 u32 tb_id; /* kernel fib table id */
Ido Schimmel69132292017-03-10 08:53:42 +0100190 unsigned int rif_count;
Ido Schimmel76610eb2017-03-10 08:53:41 +0100191 struct mlxsw_sp_fib *fib4;
Jiri Pirko6b75c482016-07-04 08:23:09 +0200192};
193
Yotam Gigi763b4b72016-07-21 12:03:17 +0200194enum mlxsw_sp_span_type {
195 MLXSW_SP_SPAN_EGRESS,
196 MLXSW_SP_SPAN_INGRESS
197};
198
199struct mlxsw_sp_span_inspected_port {
200 struct list_head list;
201 enum mlxsw_sp_span_type type;
202 u8 local_port;
203};
204
205struct mlxsw_sp_span_entry {
206 u8 local_port;
207 bool used;
208 struct list_head bound_ports_list;
209 int ref_count;
210 int id;
211};
212
213enum mlxsw_sp_port_mall_action_type {
214 MLXSW_SP_PORT_MALL_MIRROR,
Yotam Gigi98d0f7b2017-01-23 11:07:11 +0100215 MLXSW_SP_PORT_MALL_SAMPLE,
Yotam Gigi763b4b72016-07-21 12:03:17 +0200216};
217
218struct mlxsw_sp_port_mall_mirror_tc_entry {
219 u8 to_local_port;
220 bool ingress;
221};
222
223struct mlxsw_sp_port_mall_tc_entry {
224 struct list_head list;
225 unsigned long cookie;
226 enum mlxsw_sp_port_mall_action_type type;
227 union {
228 struct mlxsw_sp_port_mall_mirror_tc_entry mirror;
229 };
230};
231
Jiri Pirko53342022016-07-04 08:23:08 +0200232struct mlxsw_sp_router {
233 struct mlxsw_sp_lpm_tree lpm_trees[MLXSW_SP_LPM_TREE_COUNT];
Nogah Frankel9497c042016-09-20 11:16:54 +0200234 struct mlxsw_sp_vr *vrs;
Jiri Pirko6cf3c972016-07-05 11:27:39 +0200235 struct rhashtable neigh_ht;
Ido Schimmele9ad5e72017-02-08 11:16:29 +0100236 struct rhashtable nexthop_group_ht;
Ido Schimmelc53b8e12017-02-08 11:16:30 +0100237 struct rhashtable nexthop_ht;
Yotam Gigic723c7352016-07-05 11:27:43 +0200238 struct {
239 struct delayed_work dw;
240 unsigned long interval; /* ms */
241 } neighs_update;
Yotam Gigi0b2361d2016-07-05 11:27:52 +0200242 struct delayed_work nexthop_probe_dw;
243#define MLXSW_SP_UNRESOLVED_NH_PROBE_INTERVAL 5000 /* ms */
Yotam Gigib2157142016-07-05 11:27:51 +0200244 struct list_head nexthop_neighs_list;
Jiri Pirkob45f64d2016-09-26 12:52:31 +0200245 bool aborted;
Jiri Pirko53342022016-07-04 08:23:08 +0200246};
247
Jiri Pirko22a67762017-02-03 10:29:07 +0100248struct mlxsw_sp_acl;
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +0100249struct mlxsw_sp_counter_pool;
Jiri Pirko22a67762017-02-03 10:29:07 +0100250
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200251struct mlxsw_sp {
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100252 struct {
253 struct list_head list;
Ido Schimmel99724c12016-07-04 08:23:14 +0200254 DECLARE_BITMAP(mapped, MLXSW_SP_VFID_MAX);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +0200255 } vfids;
Elad Raz3a49b4f2016-01-10 21:06:28 +0100256 struct {
257 struct list_head list;
Ido Schimmeld8651fd2016-06-20 23:04:07 +0200258 DECLARE_BITMAP(mapped, MLXSW_SP_MID_MAX);
Elad Raz3a49b4f2016-01-10 21:06:28 +0100259 } br_mids;
Ido Schimmel14d39462016-06-20 23:04:15 +0200260 struct list_head fids; /* VLAN-aware bridge FIDs */
Nogah Frankel8f8a62d2016-09-20 11:16:57 +0200261 struct mlxsw_sp_rif **rifs;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200262 struct mlxsw_sp_port **ports;
263 struct mlxsw_core *core;
264 const struct mlxsw_bus_info *bus_info;
265 unsigned char base_mac[ETH_ALEN];
266 struct {
267 struct delayed_work dw;
268#define MLXSW_SP_DEFAULT_LEARNING_INTERVAL 100
269 unsigned int interval; /* ms */
270 } fdb_notify;
Ido Schimmel869f63a2016-03-08 12:59:33 -0800271#define MLXSW_SP_MIN_AGEING_TIME 10
272#define MLXSW_SP_MAX_AGEING_TIME 1000000
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200273#define MLXSW_SP_DEFAULT_AGEING_TIME 300
274 u32 ageing_time;
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100275 struct mlxsw_sp_upper master_bridge;
Nogah Frankelce0bd2b2016-09-20 11:16:50 +0200276 struct mlxsw_sp_upper *lags;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100277 u8 port_to_module[MLXSW_PORT_MAX_PORTS];
Jiri Pirko078f9c72016-04-14 18:19:19 +0200278 struct mlxsw_sp_sb sb;
Jiri Pirko53342022016-07-04 08:23:08 +0200279 struct mlxsw_sp_router router;
Jiri Pirko22a67762017-02-03 10:29:07 +0100280 struct mlxsw_sp_acl *acl;
Jiri Pirkob090ef02016-07-05 11:27:47 +0200281 struct {
282 DECLARE_BITMAP(usage, MLXSW_SP_KVD_LINEAR_SIZE);
283 } kvdl;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200284
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +0100285 struct mlxsw_sp_counter_pool *counter_pool;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200286 struct {
287 struct mlxsw_sp_span_entry *entries;
288 int entries_count;
289 } span;
Jiri Pirkob45f64d2016-09-26 12:52:31 +0200290 struct notifier_block fib_nb;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200291};
292
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100293static inline struct mlxsw_sp_upper *
294mlxsw_sp_lag_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
295{
296 return &mlxsw_sp->lags[lag_id];
297}
298
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200299struct mlxsw_sp_port_pcpu_stats {
300 u64 rx_packets;
301 u64 rx_bytes;
302 u64 tx_packets;
303 u64 tx_bytes;
304 struct u64_stats_sync syncp;
305 u32 tx_dropped;
306};
307
Yotam Gigi98d0f7b2017-01-23 11:07:11 +0100308struct mlxsw_sp_port_sample {
309 struct psample_group __rcu *psample_group;
310 u32 trunc_size;
311 u32 rate;
312 bool truncate;
313};
314
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200315struct mlxsw_sp_port {
316 struct net_device *dev;
317 struct mlxsw_sp_port_pcpu_stats __percpu *pcpu_stats;
318 struct mlxsw_sp *mlxsw_sp;
319 u8 local_port;
320 u8 stp_state;
Nogah Frankel8ecd4592017-02-09 14:54:47 +0100321 u16 learning:1,
Jiri Pirko0d9b9702015-10-28 10:16:56 +0100322 learning_sync:1,
Ido Schimmel02930382015-10-28 10:16:58 +0100323 uc_flood:1,
Nogah Frankel71c365b2017-02-09 14:54:46 +0100324 mc_flood:1,
Nogah Frankel8ecd4592017-02-09 14:54:47 +0100325 mc_router:1,
326 mc_disabled:1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100327 bridged:1,
Ido Schimmel18f1e702016-02-26 17:32:31 +0100328 lagged:1,
329 split:1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200330 u16 pvid;
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100331 u16 lag_id;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100332 struct {
333 struct list_head list;
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200334 struct mlxsw_sp_fid *f;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100335 u16 vid;
336 } vport;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200337 struct {
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200338 u8 tx_pause:1,
Ido Schimmel0c83f882016-09-12 13:26:23 +0200339 rx_pause:1,
340 autoneg:1;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200341 } link;
342 struct {
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200343 struct ieee_ets *ets;
Ido Schimmelcc7cf512016-04-06 17:10:11 +0200344 struct ieee_maxrate *maxrate;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200345 struct ieee_pfc *pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200346 } dcb;
Ido Schimmeld664b412016-06-09 09:51:40 +0200347 struct {
348 u8 module;
349 u8 width;
350 u8 lane;
351 } mapping;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200352 /* 802.1Q bridge VLANs */
Ido Schimmelbd40e9d2015-12-15 16:03:36 +0100353 unsigned long *active_vlans;
Elad Razfc1273a2016-01-06 13:01:11 +0100354 unsigned long *untagged_vlans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200355 /* VLAN interfaces */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100356 struct list_head vports_list;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200357 /* TC handles */
358 struct list_head mall_tc_list;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200359 struct {
360 #define MLXSW_HW_STATS_UPDATE_TIME HZ
361 struct rtnl_link_stats64 *cache;
362 struct delayed_work update_dw;
363 } hw_stats;
Yotam Gigi98d0f7b2017-01-23 11:07:11 +0100364 struct mlxsw_sp_port_sample *sample;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200365};
366
Jiri Pirko22a67762017-02-03 10:29:07 +0100367bool mlxsw_sp_port_dev_check(const struct net_device *dev);
Ido Schimmel4724ba562017-03-10 08:53:39 +0100368struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev);
Jiri Pirko7ce856a2016-07-04 08:23:12 +0200369struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev);
370void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port);
371
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200372static inline bool
373mlxsw_sp_port_is_pause_en(const struct mlxsw_sp_port *mlxsw_sp_port)
374{
375 return mlxsw_sp_port->link.tx_pause || mlxsw_sp_port->link.rx_pause;
376}
377
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100378static inline struct mlxsw_sp_port *
379mlxsw_sp_port_lagged_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id, u8 port_index)
380{
381 struct mlxsw_sp_port *mlxsw_sp_port;
382 u8 local_port;
383
384 local_port = mlxsw_core_lag_mapping_get(mlxsw_sp->core,
385 lag_id, port_index);
386 mlxsw_sp_port = mlxsw_sp->ports[local_port];
387 return mlxsw_sp_port && mlxsw_sp_port->lagged ? mlxsw_sp_port : NULL;
388}
389
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100390static inline u16
391mlxsw_sp_vport_vid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
392{
393 return mlxsw_sp_vport->vport.vid;
394}
395
Ido Schimmel6381b3a2016-06-20 23:04:16 +0200396static inline bool
397mlxsw_sp_port_is_vport(const struct mlxsw_sp_port *mlxsw_sp_port)
398{
399 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
400
401 return vid != 0;
402}
403
Ido Schimmel41b996c2016-06-20 23:04:17 +0200404static inline void mlxsw_sp_vport_fid_set(struct mlxsw_sp_port *mlxsw_sp_vport,
405 struct mlxsw_sp_fid *f)
406{
407 mlxsw_sp_vport->vport.f = f;
408}
409
410static inline struct mlxsw_sp_fid *
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200411mlxsw_sp_vport_fid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100412{
Ido Schimmel41b996c2016-06-20 23:04:17 +0200413 return mlxsw_sp_vport->vport.f;
414}
415
416static inline struct net_device *
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +0200417mlxsw_sp_vport_dev_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel41b996c2016-06-20 23:04:17 +0200418{
419 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
420
Ido Schimmel56918b62016-06-20 23:04:18 +0200421 return f ? f->dev : NULL;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100422}
423
424static inline struct mlxsw_sp_port *
425mlxsw_sp_port_vport_find(const struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
426{
427 struct mlxsw_sp_port *mlxsw_sp_vport;
428
429 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
430 vport.list) {
431 if (mlxsw_sp_vport_vid_get(mlxsw_sp_vport) == vid)
432 return mlxsw_sp_vport;
433 }
434
435 return NULL;
436}
437
Ido Schimmelaac78a42015-12-15 16:03:42 +0100438static inline struct mlxsw_sp_port *
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200439mlxsw_sp_port_vport_find_by_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
440 u16 fid)
Ido Schimmelaac78a42015-12-15 16:03:42 +0100441{
442 struct mlxsw_sp_port *mlxsw_sp_vport;
443
444 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
445 vport.list) {
Ido Schimmel41b996c2016-06-20 23:04:17 +0200446 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
447
Ido Schimmel56918b62016-06-20 23:04:18 +0200448 if (f && f->fid == fid)
Ido Schimmelaac78a42015-12-15 16:03:42 +0100449 return mlxsw_sp_vport;
450 }
451
452 return NULL;
453}
454
Ido Schimmel701b1862016-07-04 08:23:16 +0200455static inline struct mlxsw_sp_fid *mlxsw_sp_fid_find(struct mlxsw_sp *mlxsw_sp,
456 u16 fid)
457{
458 struct mlxsw_sp_fid *f;
459
460 list_for_each_entry(f, &mlxsw_sp->fids, list)
461 if (f->fid == fid)
462 return f;
463
464 return NULL;
465}
466
467static inline struct mlxsw_sp_fid *
468mlxsw_sp_vfid_find(const struct mlxsw_sp *mlxsw_sp,
469 const struct net_device *br_dev)
470{
471 struct mlxsw_sp_fid *f;
472
473 list_for_each_entry(f, &mlxsw_sp->vfids.list, list)
474 if (f->dev == br_dev)
475 return f;
476
477 return NULL;
478}
479
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200480enum mlxsw_sp_flood_table {
481 MLXSW_SP_FLOOD_TABLE_UC,
Nogah Frankel71c365b2017-02-09 14:54:46 +0100482 MLXSW_SP_FLOOD_TABLE_BC,
483 MLXSW_SP_FLOOD_TABLE_MC,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200484};
485
486int mlxsw_sp_buffers_init(struct mlxsw_sp *mlxsw_sp);
Jiri Pirko0f433fa2016-04-14 18:19:24 +0200487void mlxsw_sp_buffers_fini(struct mlxsw_sp *mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200488int mlxsw_sp_port_buffers_init(struct mlxsw_sp_port *mlxsw_sp_port);
Jiri Pirko0f433fa2016-04-14 18:19:24 +0200489int mlxsw_sp_sb_pool_get(struct mlxsw_core *mlxsw_core,
490 unsigned int sb_index, u16 pool_index,
491 struct devlink_sb_pool_info *pool_info);
492int mlxsw_sp_sb_pool_set(struct mlxsw_core *mlxsw_core,
493 unsigned int sb_index, u16 pool_index, u32 size,
494 enum devlink_sb_threshold_type threshold_type);
495int mlxsw_sp_sb_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
496 unsigned int sb_index, u16 pool_index,
497 u32 *p_threshold);
498int mlxsw_sp_sb_port_pool_set(struct mlxsw_core_port *mlxsw_core_port,
499 unsigned int sb_index, u16 pool_index,
500 u32 threshold);
501int mlxsw_sp_sb_tc_pool_bind_get(struct mlxsw_core_port *mlxsw_core_port,
502 unsigned int sb_index, u16 tc_index,
503 enum devlink_sb_pool_type pool_type,
504 u16 *p_pool_index, u32 *p_threshold);
505int mlxsw_sp_sb_tc_pool_bind_set(struct mlxsw_core_port *mlxsw_core_port,
506 unsigned int sb_index, u16 tc_index,
507 enum devlink_sb_pool_type pool_type,
508 u16 pool_index, u32 threshold);
Jiri Pirko2d0ed392016-04-14 18:19:30 +0200509int mlxsw_sp_sb_occ_snapshot(struct mlxsw_core *mlxsw_core,
510 unsigned int sb_index);
511int mlxsw_sp_sb_occ_max_clear(struct mlxsw_core *mlxsw_core,
512 unsigned int sb_index);
513int mlxsw_sp_sb_occ_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
514 unsigned int sb_index, u16 pool_index,
515 u32 *p_cur, u32 *p_max);
516int mlxsw_sp_sb_occ_tc_port_bind_get(struct mlxsw_core_port *mlxsw_core_port,
517 unsigned int sb_index, u16 tc_index,
518 enum devlink_sb_pool_type pool_type,
519 u32 *p_cur, u32 *p_max);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200520
521int mlxsw_sp_switchdev_init(struct mlxsw_sp *mlxsw_sp);
522void mlxsw_sp_switchdev_fini(struct mlxsw_sp *mlxsw_sp);
523int mlxsw_sp_port_vlan_init(struct mlxsw_sp_port *mlxsw_sp_port);
524void mlxsw_sp_port_switchdev_init(struct mlxsw_sp_port *mlxsw_sp_port);
525void mlxsw_sp_port_switchdev_fini(struct mlxsw_sp_port *mlxsw_sp_port);
526int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
527 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
528 u16 vid);
529int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
530 u16 vid_end, bool is_member, bool untagged);
Ido Schimmele6060022016-06-20 23:04:11 +0200531int mlxsw_sp_vport_flood_set(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
Ido Schimmel47a0a9e2016-06-20 23:04:08 +0200532 bool set);
Ido Schimmel4dc236c2016-01-27 15:20:16 +0100533void mlxsw_sp_port_active_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port);
Ido Schimmel28a01d22016-02-18 11:30:02 +0100534int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +0200535int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid);
Ido Schimmel6e095fd2016-07-04 08:23:13 +0200536int mlxsw_sp_rif_fdb_op(struct mlxsw_sp *mlxsw_sp, const char *mac, u16 fid,
537 bool adding);
Ido Schimmel701b1862016-07-04 08:23:16 +0200538struct mlxsw_sp_fid *mlxsw_sp_fid_create(struct mlxsw_sp *mlxsw_sp, u16 fid);
539void mlxsw_sp_fid_destroy(struct mlxsw_sp *mlxsw_sp, struct mlxsw_sp_fid *f);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200540int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
541 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
542 bool dwrr, u8 dwrr_weight);
543int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
544 u8 switch_prio, u8 tclass);
545int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200546 u8 *prio_tc, bool pause_en,
547 struct ieee_pfc *my_pfc);
Ido Schimmelcc7cf512016-04-06 17:10:11 +0200548int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
549 enum mlxsw_reg_qeec_hr hr, u8 index,
550 u8 next_index, u32 maxrate);
Ido Schimmel584d73d2016-08-24 12:00:26 +0200551int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
552 u16 vid_begin, u16 vid_end,
553 bool learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200554
Ido Schimmelf00817d2016-04-06 17:10:09 +0200555#ifdef CONFIG_MLXSW_SPECTRUM_DCB
556
557int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port);
558void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port);
559
560#else
561
562static inline int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port)
563{
564 return 0;
565}
566
567static inline void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port)
568{}
569
570#endif
571
Ido Schimmel464dce12016-07-02 11:00:15 +0200572int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp);
573void mlxsw_sp_router_fini(struct mlxsw_sp *mlxsw_sp);
Jiri Pirkoe7322632016-09-01 10:37:43 +0200574int mlxsw_sp_router_netevent_event(struct notifier_block *unused,
575 unsigned long event, void *ptr);
Ido Schimmel4724ba562017-03-10 08:53:39 +0100576int mlxsw_sp_netdevice_router_port_event(struct net_device *dev);
577int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
578 unsigned long event, void *ptr);
579void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
Arkadi Sharshevskybf952332017-03-17 09:38:00 +0100580 struct mlxsw_sp_rif *rif);
Ido Schimmel7179eb52017-03-16 09:08:18 +0100581int mlxsw_sp_vport_vrf_join(struct mlxsw_sp_port *mlxsw_sp_vport);
582void mlxsw_sp_vport_vrf_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
583int mlxsw_sp_port_vrf_join(struct mlxsw_sp_port *mlxsw_sp_port);
584void mlxsw_sp_port_vrf_leave(struct mlxsw_sp_port *mlxsw_sp_port);
Ido Schimmel3d70e4582017-03-16 09:08:19 +0100585int mlxsw_sp_bridge_vrf_join(struct mlxsw_sp *mlxsw_sp,
586 struct net_device *l3_dev);
587void mlxsw_sp_bridge_vrf_leave(struct mlxsw_sp *mlxsw_sp,
588 struct net_device *l3_dev);
Ido Schimmel464dce12016-07-02 11:00:15 +0200589
Jiri Pirkob090ef02016-07-05 11:27:47 +0200590int mlxsw_sp_kvdl_alloc(struct mlxsw_sp *mlxsw_sp, unsigned int entry_count);
591void mlxsw_sp_kvdl_free(struct mlxsw_sp *mlxsw_sp, int entry_index);
592
Jiri Pirko22a67762017-02-03 10:29:07 +0100593struct mlxsw_afk *mlxsw_sp_acl_afk(struct mlxsw_sp_acl *acl);
594
595struct mlxsw_sp_acl_rule_info {
596 unsigned int priority;
597 struct mlxsw_afk_element_values values;
598 struct mlxsw_afa_block *act_block;
Arkadi Sharshevsky48170722017-03-11 09:42:58 +0100599 unsigned int counter_index;
600 bool counter_valid;
Jiri Pirko22a67762017-02-03 10:29:07 +0100601};
602
603enum mlxsw_sp_acl_profile {
604 MLXSW_SP_ACL_PROFILE_FLOWER,
605};
606
607struct mlxsw_sp_acl_profile_ops {
608 size_t ruleset_priv_size;
609 int (*ruleset_add)(struct mlxsw_sp *mlxsw_sp,
610 void *priv, void *ruleset_priv);
611 void (*ruleset_del)(struct mlxsw_sp *mlxsw_sp, void *ruleset_priv);
612 int (*ruleset_bind)(struct mlxsw_sp *mlxsw_sp, void *ruleset_priv,
613 struct net_device *dev, bool ingress);
614 void (*ruleset_unbind)(struct mlxsw_sp *mlxsw_sp, void *ruleset_priv);
615 size_t rule_priv_size;
616 int (*rule_add)(struct mlxsw_sp *mlxsw_sp,
617 void *ruleset_priv, void *rule_priv,
618 struct mlxsw_sp_acl_rule_info *rulei);
619 void (*rule_del)(struct mlxsw_sp *mlxsw_sp, void *rule_priv);
Arkadi Sharshevsky7fd056c2017-03-11 09:42:54 +0100620 int (*rule_activity_get)(struct mlxsw_sp *mlxsw_sp, void *rule_priv,
621 bool *activity);
Jiri Pirko22a67762017-02-03 10:29:07 +0100622};
623
624struct mlxsw_sp_acl_ops {
625 size_t priv_size;
626 int (*init)(struct mlxsw_sp *mlxsw_sp, void *priv);
627 void (*fini)(struct mlxsw_sp *mlxsw_sp, void *priv);
628 const struct mlxsw_sp_acl_profile_ops *
629 (*profile_ops)(struct mlxsw_sp *mlxsw_sp,
630 enum mlxsw_sp_acl_profile profile);
631};
632
633struct mlxsw_sp_acl_ruleset;
634
635struct mlxsw_sp_acl_ruleset *
636mlxsw_sp_acl_ruleset_get(struct mlxsw_sp *mlxsw_sp,
637 struct net_device *dev, bool ingress,
638 enum mlxsw_sp_acl_profile profile);
639void mlxsw_sp_acl_ruleset_put(struct mlxsw_sp *mlxsw_sp,
640 struct mlxsw_sp_acl_ruleset *ruleset);
641
642struct mlxsw_sp_acl_rule_info *
643mlxsw_sp_acl_rulei_create(struct mlxsw_sp_acl *acl);
644void mlxsw_sp_acl_rulei_destroy(struct mlxsw_sp_acl_rule_info *rulei);
645int mlxsw_sp_acl_rulei_commit(struct mlxsw_sp_acl_rule_info *rulei);
646void mlxsw_sp_acl_rulei_priority(struct mlxsw_sp_acl_rule_info *rulei,
647 unsigned int priority);
648void mlxsw_sp_acl_rulei_keymask_u32(struct mlxsw_sp_acl_rule_info *rulei,
649 enum mlxsw_afk_element element,
650 u32 key_value, u32 mask_value);
651void mlxsw_sp_acl_rulei_keymask_buf(struct mlxsw_sp_acl_rule_info *rulei,
652 enum mlxsw_afk_element element,
653 const char *key_value,
654 const char *mask_value, unsigned int len);
655void mlxsw_sp_acl_rulei_act_continue(struct mlxsw_sp_acl_rule_info *rulei);
656void mlxsw_sp_acl_rulei_act_jump(struct mlxsw_sp_acl_rule_info *rulei,
657 u16 group_id);
658int mlxsw_sp_acl_rulei_act_drop(struct mlxsw_sp_acl_rule_info *rulei);
659int mlxsw_sp_acl_rulei_act_fwd(struct mlxsw_sp *mlxsw_sp,
660 struct mlxsw_sp_acl_rule_info *rulei,
661 struct net_device *out_dev);
Petr Machataa1502012017-03-09 09:25:19 +0100662int mlxsw_sp_acl_rulei_act_vlan(struct mlxsw_sp *mlxsw_sp,
663 struct mlxsw_sp_acl_rule_info *rulei,
664 u32 action, u16 vid, u16 proto, u8 prio);
Arkadi Sharshevsky48170722017-03-11 09:42:58 +0100665int mlxsw_sp_acl_rulei_act_count(struct mlxsw_sp *mlxsw_sp,
666 struct mlxsw_sp_acl_rule_info *rulei);
Jiri Pirko22a67762017-02-03 10:29:07 +0100667
668struct mlxsw_sp_acl_rule;
669
670struct mlxsw_sp_acl_rule *
671mlxsw_sp_acl_rule_create(struct mlxsw_sp *mlxsw_sp,
672 struct mlxsw_sp_acl_ruleset *ruleset,
673 unsigned long cookie);
674void mlxsw_sp_acl_rule_destroy(struct mlxsw_sp *mlxsw_sp,
675 struct mlxsw_sp_acl_rule *rule);
676int mlxsw_sp_acl_rule_add(struct mlxsw_sp *mlxsw_sp,
677 struct mlxsw_sp_acl_rule *rule);
678void mlxsw_sp_acl_rule_del(struct mlxsw_sp *mlxsw_sp,
679 struct mlxsw_sp_acl_rule *rule);
680struct mlxsw_sp_acl_rule *
681mlxsw_sp_acl_rule_lookup(struct mlxsw_sp *mlxsw_sp,
682 struct mlxsw_sp_acl_ruleset *ruleset,
683 unsigned long cookie);
684struct mlxsw_sp_acl_rule_info *
685mlxsw_sp_acl_rule_rulei(struct mlxsw_sp_acl_rule *rule);
Arkadi Sharshevsky48170722017-03-11 09:42:58 +0100686int mlxsw_sp_acl_rule_get_stats(struct mlxsw_sp *mlxsw_sp,
687 struct mlxsw_sp_acl_rule *rule,
688 u64 *packets, u64 *bytes, u64 *last_use);
Jiri Pirko22a67762017-02-03 10:29:07 +0100689
690int mlxsw_sp_acl_init(struct mlxsw_sp *mlxsw_sp);
691void mlxsw_sp_acl_fini(struct mlxsw_sp *mlxsw_sp);
692
693extern const struct mlxsw_sp_acl_ops mlxsw_sp_acl_tcam_ops;
694
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +0100695int mlxsw_sp_flower_replace(struct mlxsw_sp_port *mlxsw_sp_port, bool ingress,
696 __be16 protocol, struct tc_cls_flower_offload *f);
697void mlxsw_sp_flower_destroy(struct mlxsw_sp_port *mlxsw_sp_port, bool ingress,
698 struct tc_cls_flower_offload *f);
Arkadi Sharshevsky7c1b8eb2017-03-11 09:42:59 +0100699int mlxsw_sp_flower_stats(struct mlxsw_sp_port *mlxsw_sp_port, bool ingress,
700 struct tc_cls_flower_offload *f);
Arkadi Sharshevsky1abcbcc2017-03-11 09:42:53 +0100701int mlxsw_sp_flow_counter_get(struct mlxsw_sp *mlxsw_sp,
702 unsigned int counter_index, u64 *packets,
703 u64 *bytes);
704int mlxsw_sp_flow_counter_alloc(struct mlxsw_sp *mlxsw_sp,
705 unsigned int *p_counter_index);
706void mlxsw_sp_flow_counter_free(struct mlxsw_sp *mlxsw_sp,
707 unsigned int counter_index);
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +0100708
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200709#endif