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Salil76ad4f02017-08-02 16:59:45 +01001/*
2 * Copyright (c) 2016~2017 Hisilicon Limited.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#include <linux/dma-mapping.h>
11#include <linux/etherdevice.h>
12#include <linux/interrupt.h>
13#include <linux/if_vlan.h>
14#include <linux/ip.h>
15#include <linux/ipv6.h>
16#include <linux/module.h>
17#include <linux/pci.h>
18#include <linux/skbuff.h>
19#include <linux/sctp.h>
20#include <linux/vermagic.h>
21#include <net/gre.h>
Yunsheng Lin30d240d2017-10-17 14:51:30 +080022#include <net/pkt_cls.h>
Salil76ad4f02017-08-02 16:59:45 +010023#include <net/vxlan.h>
24
25#include "hnae3.h"
26#include "hns3_enet.h"
27
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +080028static const char hns3_driver_name[] = "hns3";
Salil76ad4f02017-08-02 16:59:45 +010029const char hns3_driver_version[] = VERMAGIC_STRING;
30static const char hns3_driver_string[] =
31 "Hisilicon Ethernet Network Driver for Hip08 Family";
32static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
33static struct hnae3_client client;
34
35/* hns3_pci_tbl - PCI Device ID Table
36 *
37 * Last entry must be all 0s
38 *
39 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
40 * Class, Class Mask, private data (not used) }
41 */
42static const struct pci_device_id hns3_pci_tbl[] = {
43 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
44 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
Yunsheng Line92a0842017-09-20 18:52:50 +080045 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080046 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080047 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080048 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080049 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080050 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080051 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080052 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080053 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080054 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Salil Mehta424eb832017-12-14 18:03:06 +000055 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
56 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF), 0},
Salil76ad4f02017-08-02 16:59:45 +010057 /* required last entry */
58 {0, }
59};
60MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
61
62static irqreturn_t hns3_irq_handle(int irq, void *dev)
63{
64 struct hns3_enet_tqp_vector *tqp_vector = dev;
65
66 napi_schedule(&tqp_vector->napi);
67
68 return IRQ_HANDLED;
69}
70
71static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
72{
73 struct hns3_enet_tqp_vector *tqp_vectors;
74 unsigned int i;
75
76 for (i = 0; i < priv->vector_num; i++) {
77 tqp_vectors = &priv->tqp_vector[i];
78
79 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
80 continue;
81
82 /* release the irq resource */
83 free_irq(tqp_vectors->vector_irq, tqp_vectors);
84 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
85 }
86}
87
88static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
89{
90 struct hns3_enet_tqp_vector *tqp_vectors;
91 int txrx_int_idx = 0;
92 int rx_int_idx = 0;
93 int tx_int_idx = 0;
94 unsigned int i;
95 int ret;
96
97 for (i = 0; i < priv->vector_num; i++) {
98 tqp_vectors = &priv->tqp_vector[i];
99
100 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
101 continue;
102
103 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
104 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
105 "%s-%s-%d", priv->netdev->name, "TxRx",
106 txrx_int_idx++);
107 txrx_int_idx++;
108 } else if (tqp_vectors->rx_group.ring) {
109 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
110 "%s-%s-%d", priv->netdev->name, "Rx",
111 rx_int_idx++);
112 } else if (tqp_vectors->tx_group.ring) {
113 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
114 "%s-%s-%d", priv->netdev->name, "Tx",
115 tx_int_idx++);
116 } else {
117 /* Skip this unused q_vector */
118 continue;
119 }
120
121 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
122
123 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
124 tqp_vectors->name,
125 tqp_vectors);
126 if (ret) {
127 netdev_err(priv->netdev, "request irq(%d) fail\n",
128 tqp_vectors->vector_irq);
129 return ret;
130 }
131
132 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
133 }
134
135 return 0;
136}
137
138static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
139 u32 mask_en)
140{
141 writel(mask_en, tqp_vector->mask_addr);
142}
143
144static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
145{
146 napi_enable(&tqp_vector->napi);
147
148 /* enable vector */
149 hns3_mask_vector_irq(tqp_vector, 1);
150}
151
152static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
153{
154 /* disable vector */
155 hns3_mask_vector_irq(tqp_vector, 0);
156
157 disable_irq(tqp_vector->vector_irq);
158 napi_disable(&tqp_vector->napi);
159}
160
Fuyun Liang434776a2018-01-12 16:23:10 +0800161void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
162 u32 rl_value)
Salil76ad4f02017-08-02 16:59:45 +0100163{
Fuyun Liang434776a2018-01-12 16:23:10 +0800164 u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
165
Salil76ad4f02017-08-02 16:59:45 +0100166 /* this defines the configuration for RL (Interrupt Rate Limiter).
167 * Rl defines rate of interrupts i.e. number of interrupts-per-second
168 * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
169 */
Fuyun Liang434776a2018-01-12 16:23:10 +0800170
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800171 if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
172 !tqp_vector->rx_group.coal.gl_adapt_enable)
Fuyun Liang434776a2018-01-12 16:23:10 +0800173 /* According to the hardware, the range of rl_reg is
174 * 0-59 and the unit is 4.
175 */
176 rl_reg |= HNS3_INT_RL_ENABLE_MASK;
177
178 writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
179}
180
181void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
182 u32 gl_value)
183{
184 u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
185
186 writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
187}
188
189void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
190 u32 gl_value)
191{
192 u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
193
194 writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
Salil76ad4f02017-08-02 16:59:45 +0100195}
196
Fuyun Liang5fd47892018-01-12 16:23:11 +0800197static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
198 struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +0100199{
Fuyun Liang5fd47892018-01-12 16:23:11 +0800200 struct hnae3_handle *h = priv->ae_handle;
201
Salil76ad4f02017-08-02 16:59:45 +0100202 /* initialize the configuration for interrupt coalescing.
203 * 1. GL (Interrupt Gap Limiter)
204 * 2. RL (Interrupt Rate Limiter)
205 */
206
Fuyun Liang5fd47892018-01-12 16:23:11 +0800207 /* Default: enable interrupt coalescing self-adaptive and GL */
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800208 tqp_vector->tx_group.coal.gl_adapt_enable = 1;
209 tqp_vector->rx_group.coal.gl_adapt_enable = 1;
Fuyun Liang5fd47892018-01-12 16:23:11 +0800210
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800211 tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
212 tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
Fuyun Liang5fd47892018-01-12 16:23:11 +0800213
Yunsheng Lindd38c722018-03-09 10:37:02 +0800214 /* Default: disable RL */
215 h->kinfo.int_rl_setting = 0;
216
Fuyun Liangcd9d1872018-03-21 15:49:25 +0800217 tqp_vector->int_adapt_down = HNS3_INT_ADAPT_DOWN_START;
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800218 tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
219 tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
Yunsheng Lindd38c722018-03-09 10:37:02 +0800220}
221
222static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
223 struct hns3_nic_priv *priv)
224{
225 struct hnae3_handle *h = priv->ae_handle;
226
Fuyun Liang5fd47892018-01-12 16:23:11 +0800227 hns3_set_vector_coalesce_tx_gl(tqp_vector,
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800228 tqp_vector->tx_group.coal.int_gl);
Fuyun Liang5fd47892018-01-12 16:23:11 +0800229 hns3_set_vector_coalesce_rx_gl(tqp_vector,
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800230 tqp_vector->rx_group.coal.int_gl);
Fuyun Liang5fd47892018-01-12 16:23:11 +0800231 hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
Salil76ad4f02017-08-02 16:59:45 +0100232}
233
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800234static int hns3_nic_set_real_num_queue(struct net_device *netdev)
235{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800236 struct hnae3_handle *h = hns3_get_handle(netdev);
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800237 struct hnae3_knic_private_info *kinfo = &h->kinfo;
238 unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
239 int ret;
240
241 ret = netif_set_real_num_tx_queues(netdev, queue_size);
242 if (ret) {
243 netdev_err(netdev,
244 "netif_set_real_num_tx_queues fail, ret=%d!\n",
245 ret);
246 return ret;
247 }
248
249 ret = netif_set_real_num_rx_queues(netdev, queue_size);
250 if (ret) {
251 netdev_err(netdev,
252 "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
253 return ret;
254 }
255
256 return 0;
257}
258
Peng Li678335a12018-03-08 19:41:54 +0800259static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
260{
261 u16 free_tqps, max_rss_size, max_tqps;
262
263 h->ae_algo->ops->get_tqps_and_rss_info(h, &free_tqps, &max_rss_size);
264 max_tqps = h->kinfo.num_tc * max_rss_size;
265
266 return min_t(u16, max_tqps, (free_tqps + h->kinfo.num_tqps));
267}
268
Salil76ad4f02017-08-02 16:59:45 +0100269static int hns3_nic_net_up(struct net_device *netdev)
270{
271 struct hns3_nic_priv *priv = netdev_priv(netdev);
272 struct hnae3_handle *h = priv->ae_handle;
273 int i, j;
274 int ret;
275
276 /* get irq resource for all vectors */
277 ret = hns3_nic_init_irq(priv);
278 if (ret) {
279 netdev_err(netdev, "hns init irq failed! ret=%d\n", ret);
280 return ret;
281 }
282
283 /* enable the vectors */
284 for (i = 0; i < priv->vector_num; i++)
285 hns3_vector_enable(&priv->tqp_vector[i]);
286
287 /* start the ae_dev */
288 ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
289 if (ret)
290 goto out_start_err;
291
Jian Shenb875cc32018-01-05 18:18:11 +0800292 clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
293
Salil76ad4f02017-08-02 16:59:45 +0100294 return 0;
295
296out_start_err:
297 for (j = i - 1; j >= 0; j--)
298 hns3_vector_disable(&priv->tqp_vector[j]);
299
300 hns3_nic_uninit_irq(priv);
301
302 return ret;
303}
304
305static int hns3_nic_net_open(struct net_device *netdev)
306{
Lipengf8fa222c2017-11-02 20:45:20 +0800307 struct hns3_nic_priv *priv = netdev_priv(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100308 int ret;
309
310 netif_carrier_off(netdev);
311
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800312 ret = hns3_nic_set_real_num_queue(netdev);
313 if (ret)
Salil76ad4f02017-08-02 16:59:45 +0100314 return ret;
Salil76ad4f02017-08-02 16:59:45 +0100315
316 ret = hns3_nic_net_up(netdev);
317 if (ret) {
318 netdev_err(netdev,
319 "hns net up fail, ret=%d!\n", ret);
320 return ret;
321 }
322
Salil Mehta6d4c3982018-03-22 14:28:52 +0000323 priv->ae_handle->last_reset_time = jiffies;
Salil76ad4f02017-08-02 16:59:45 +0100324 return 0;
325}
326
327static void hns3_nic_net_down(struct net_device *netdev)
328{
329 struct hns3_nic_priv *priv = netdev_priv(netdev);
330 const struct hnae3_ae_ops *ops;
331 int i;
332
Jian Shenb875cc32018-01-05 18:18:11 +0800333 if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
334 return;
335
Salil76ad4f02017-08-02 16:59:45 +0100336 /* stop ae_dev */
337 ops = priv->ae_handle->ae_algo->ops;
338 if (ops->stop)
339 ops->stop(priv->ae_handle);
340
341 /* disable vectors */
342 for (i = 0; i < priv->vector_num; i++)
343 hns3_vector_disable(&priv->tqp_vector[i]);
344
345 /* free irq resources */
346 hns3_nic_uninit_irq(priv);
347}
348
349static int hns3_nic_net_stop(struct net_device *netdev)
350{
351 netif_tx_stop_all_queues(netdev);
352 netif_carrier_off(netdev);
353
354 hns3_nic_net_down(netdev);
355
356 return 0;
357}
358
Salil76ad4f02017-08-02 16:59:45 +0100359static int hns3_nic_uc_sync(struct net_device *netdev,
360 const unsigned char *addr)
361{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800362 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100363
364 if (h->ae_algo->ops->add_uc_addr)
365 return h->ae_algo->ops->add_uc_addr(h, addr);
366
367 return 0;
368}
369
370static int hns3_nic_uc_unsync(struct net_device *netdev,
371 const unsigned char *addr)
372{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800373 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100374
375 if (h->ae_algo->ops->rm_uc_addr)
376 return h->ae_algo->ops->rm_uc_addr(h, addr);
377
378 return 0;
379}
380
381static int hns3_nic_mc_sync(struct net_device *netdev,
382 const unsigned char *addr)
383{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800384 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100385
Dan Carpenter720a8472017-08-10 12:56:14 +0300386 if (h->ae_algo->ops->add_mc_addr)
Salil76ad4f02017-08-02 16:59:45 +0100387 return h->ae_algo->ops->add_mc_addr(h, addr);
388
389 return 0;
390}
391
392static int hns3_nic_mc_unsync(struct net_device *netdev,
393 const unsigned char *addr)
394{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800395 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100396
Dan Carpenter720a8472017-08-10 12:56:14 +0300397 if (h->ae_algo->ops->rm_mc_addr)
Salil76ad4f02017-08-02 16:59:45 +0100398 return h->ae_algo->ops->rm_mc_addr(h, addr);
399
400 return 0;
401}
402
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +0800403static void hns3_nic_set_rx_mode(struct net_device *netdev)
Salil76ad4f02017-08-02 16:59:45 +0100404{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800405 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100406
407 if (h->ae_algo->ops->set_promisc_mode) {
408 if (netdev->flags & IFF_PROMISC)
409 h->ae_algo->ops->set_promisc_mode(h, 1);
410 else
411 h->ae_algo->ops->set_promisc_mode(h, 0);
412 }
413 if (__dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync))
414 netdev_err(netdev, "sync uc address fail\n");
415 if (netdev->flags & IFF_MULTICAST)
416 if (__dev_mc_sync(netdev, hns3_nic_mc_sync, hns3_nic_mc_unsync))
417 netdev_err(netdev, "sync mc address fail\n");
418}
419
420static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
421 u16 *mss, u32 *type_cs_vlan_tso)
422{
423 u32 l4_offset, hdr_len;
424 union l3_hdr_info l3;
425 union l4_hdr_info l4;
426 u32 l4_paylen;
427 int ret;
428
429 if (!skb_is_gso(skb))
430 return 0;
431
432 ret = skb_cow_head(skb, 0);
433 if (ret)
434 return ret;
435
436 l3.hdr = skb_network_header(skb);
437 l4.hdr = skb_transport_header(skb);
438
439 /* Software should clear the IPv4's checksum field when tso is
440 * needed.
441 */
442 if (l3.v4->version == 4)
443 l3.v4->check = 0;
444
445 /* tunnel packet.*/
446 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
447 SKB_GSO_GRE_CSUM |
448 SKB_GSO_UDP_TUNNEL |
449 SKB_GSO_UDP_TUNNEL_CSUM)) {
450 if ((!(skb_shinfo(skb)->gso_type &
451 SKB_GSO_PARTIAL)) &&
452 (skb_shinfo(skb)->gso_type &
453 SKB_GSO_UDP_TUNNEL_CSUM)) {
454 /* Software should clear the udp's checksum
455 * field when tso is needed.
456 */
457 l4.udp->check = 0;
458 }
459 /* reset l3&l4 pointers from outer to inner headers */
460 l3.hdr = skb_inner_network_header(skb);
461 l4.hdr = skb_inner_transport_header(skb);
462
463 /* Software should clear the IPv4's checksum field when
464 * tso is needed.
465 */
466 if (l3.v4->version == 4)
467 l3.v4->check = 0;
468 }
469
470 /* normal or tunnel packet*/
471 l4_offset = l4.hdr - skb->data;
472 hdr_len = (l4.tcp->doff * 4) + l4_offset;
473
474 /* remove payload length from inner pseudo checksum when tso*/
475 l4_paylen = skb->len - l4_offset;
476 csum_replace_by_diff(&l4.tcp->check,
477 (__force __wsum)htonl(l4_paylen));
478
479 /* find the txbd field values */
480 *paylen = skb->len - hdr_len;
481 hnae_set_bit(*type_cs_vlan_tso,
482 HNS3_TXD_TSO_B, 1);
483
484 /* get MSS for TSO */
485 *mss = skb_shinfo(skb)->gso_size;
486
487 return 0;
488}
489
Salil1898d4e2017-08-18 12:31:39 +0100490static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
491 u8 *il4_proto)
Salil76ad4f02017-08-02 16:59:45 +0100492{
493 union {
494 struct iphdr *v4;
495 struct ipv6hdr *v6;
496 unsigned char *hdr;
497 } l3;
498 unsigned char *l4_hdr;
499 unsigned char *exthdr;
500 u8 l4_proto_tmp;
501 __be16 frag_off;
502
503 /* find outer header point */
504 l3.hdr = skb_network_header(skb);
Huazhong Tan35f58fd2018-05-01 19:55:58 +0100505 l4_hdr = skb_transport_header(skb);
Salil76ad4f02017-08-02 16:59:45 +0100506
507 if (skb->protocol == htons(ETH_P_IPV6)) {
508 exthdr = l3.hdr + sizeof(*l3.v6);
509 l4_proto_tmp = l3.v6->nexthdr;
510 if (l4_hdr != exthdr)
511 ipv6_skip_exthdr(skb, exthdr - skb->data,
512 &l4_proto_tmp, &frag_off);
513 } else if (skb->protocol == htons(ETH_P_IP)) {
514 l4_proto_tmp = l3.v4->protocol;
Salil1898d4e2017-08-18 12:31:39 +0100515 } else {
516 return -EINVAL;
Salil76ad4f02017-08-02 16:59:45 +0100517 }
518
519 *ol4_proto = l4_proto_tmp;
520
521 /* tunnel packet */
522 if (!skb->encapsulation) {
523 *il4_proto = 0;
Salil1898d4e2017-08-18 12:31:39 +0100524 return 0;
Salil76ad4f02017-08-02 16:59:45 +0100525 }
526
527 /* find inner header point */
528 l3.hdr = skb_inner_network_header(skb);
529 l4_hdr = skb_inner_transport_header(skb);
530
531 if (l3.v6->version == 6) {
532 exthdr = l3.hdr + sizeof(*l3.v6);
533 l4_proto_tmp = l3.v6->nexthdr;
534 if (l4_hdr != exthdr)
535 ipv6_skip_exthdr(skb, exthdr - skb->data,
536 &l4_proto_tmp, &frag_off);
537 } else if (l3.v4->version == 4) {
538 l4_proto_tmp = l3.v4->protocol;
539 }
540
541 *il4_proto = l4_proto_tmp;
Salil1898d4e2017-08-18 12:31:39 +0100542
543 return 0;
Salil76ad4f02017-08-02 16:59:45 +0100544}
545
546static void hns3_set_l2l3l4_len(struct sk_buff *skb, u8 ol4_proto,
547 u8 il4_proto, u32 *type_cs_vlan_tso,
548 u32 *ol_type_vlan_len_msec)
549{
550 union {
551 struct iphdr *v4;
552 struct ipv6hdr *v6;
553 unsigned char *hdr;
554 } l3;
555 union {
556 struct tcphdr *tcp;
557 struct udphdr *udp;
558 struct gre_base_hdr *gre;
559 unsigned char *hdr;
560 } l4;
561 unsigned char *l2_hdr;
562 u8 l4_proto = ol4_proto;
563 u32 ol2_len;
564 u32 ol3_len;
565 u32 ol4_len;
566 u32 l2_len;
567 u32 l3_len;
568
569 l3.hdr = skb_network_header(skb);
570 l4.hdr = skb_transport_header(skb);
571
572 /* compute L2 header size for normal packet, defined in 2 Bytes */
573 l2_len = l3.hdr - skb->data;
574 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
575 HNS3_TXD_L2LEN_S, l2_len >> 1);
576
577 /* tunnel packet*/
578 if (skb->encapsulation) {
579 /* compute OL2 header size, defined in 2 Bytes */
580 ol2_len = l2_len;
581 hnae_set_field(*ol_type_vlan_len_msec,
582 HNS3_TXD_L2LEN_M,
583 HNS3_TXD_L2LEN_S, ol2_len >> 1);
584
585 /* compute OL3 header size, defined in 4 Bytes */
586 ol3_len = l4.hdr - l3.hdr;
587 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_M,
588 HNS3_TXD_L3LEN_S, ol3_len >> 2);
589
590 /* MAC in UDP, MAC in GRE (0x6558)*/
591 if ((ol4_proto == IPPROTO_UDP) || (ol4_proto == IPPROTO_GRE)) {
592 /* switch MAC header ptr from outer to inner header.*/
593 l2_hdr = skb_inner_mac_header(skb);
594
595 /* compute OL4 header size, defined in 4 Bytes. */
596 ol4_len = l2_hdr - l4.hdr;
597 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L4LEN_M,
598 HNS3_TXD_L4LEN_S, ol4_len >> 2);
599
600 /* switch IP header ptr from outer to inner header */
601 l3.hdr = skb_inner_network_header(skb);
602
603 /* compute inner l2 header size, defined in 2 Bytes. */
604 l2_len = l3.hdr - l2_hdr;
605 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
606 HNS3_TXD_L2LEN_S, l2_len >> 1);
607 } else {
608 /* skb packet types not supported by hardware,
609 * txbd len fild doesn't be filled.
610 */
611 return;
612 }
613
614 /* switch L4 header pointer from outer to inner */
615 l4.hdr = skb_inner_transport_header(skb);
616
617 l4_proto = il4_proto;
618 }
619
620 /* compute inner(/normal) L3 header size, defined in 4 Bytes */
621 l3_len = l4.hdr - l3.hdr;
622 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_M,
623 HNS3_TXD_L3LEN_S, l3_len >> 2);
624
625 /* compute inner(/normal) L4 header size, defined in 4 Bytes */
626 switch (l4_proto) {
627 case IPPROTO_TCP:
628 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
629 HNS3_TXD_L4LEN_S, l4.tcp->doff);
630 break;
631 case IPPROTO_SCTP:
632 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
633 HNS3_TXD_L4LEN_S, (sizeof(struct sctphdr) >> 2));
634 break;
635 case IPPROTO_UDP:
636 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
637 HNS3_TXD_L4LEN_S, (sizeof(struct udphdr) >> 2));
638 break;
639 default:
640 /* skb packet types not supported by hardware,
641 * txbd len fild doesn't be filled.
642 */
643 return;
644 }
645}
646
647static int hns3_set_l3l4_type_csum(struct sk_buff *skb, u8 ol4_proto,
648 u8 il4_proto, u32 *type_cs_vlan_tso,
649 u32 *ol_type_vlan_len_msec)
650{
651 union {
652 struct iphdr *v4;
653 struct ipv6hdr *v6;
654 unsigned char *hdr;
655 } l3;
656 u32 l4_proto = ol4_proto;
657
658 l3.hdr = skb_network_header(skb);
659
660 /* define OL3 type and tunnel type(OL4).*/
661 if (skb->encapsulation) {
662 /* define outer network header type.*/
663 if (skb->protocol == htons(ETH_P_IP)) {
664 if (skb_is_gso(skb))
665 hnae_set_field(*ol_type_vlan_len_msec,
666 HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
667 HNS3_OL3T_IPV4_CSUM);
668 else
669 hnae_set_field(*ol_type_vlan_len_msec,
670 HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
671 HNS3_OL3T_IPV4_NO_CSUM);
672
673 } else if (skb->protocol == htons(ETH_P_IPV6)) {
674 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_M,
675 HNS3_TXD_OL3T_S, HNS3_OL3T_IPV6);
676 }
677
678 /* define tunnel type(OL4).*/
679 switch (l4_proto) {
680 case IPPROTO_UDP:
681 hnae_set_field(*ol_type_vlan_len_msec,
682 HNS3_TXD_TUNTYPE_M,
683 HNS3_TXD_TUNTYPE_S,
684 HNS3_TUN_MAC_IN_UDP);
685 break;
686 case IPPROTO_GRE:
687 hnae_set_field(*ol_type_vlan_len_msec,
688 HNS3_TXD_TUNTYPE_M,
689 HNS3_TXD_TUNTYPE_S,
690 HNS3_TUN_NVGRE);
691 break;
692 default:
693 /* drop the skb tunnel packet if hardware don't support,
694 * because hardware can't calculate csum when TSO.
695 */
696 if (skb_is_gso(skb))
697 return -EDOM;
698
699 /* the stack computes the IP header already,
700 * driver calculate l4 checksum when not TSO.
701 */
702 skb_checksum_help(skb);
703 return 0;
704 }
705
706 l3.hdr = skb_inner_network_header(skb);
707 l4_proto = il4_proto;
708 }
709
710 if (l3.v4->version == 4) {
711 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
712 HNS3_TXD_L3T_S, HNS3_L3T_IPV4);
713
714 /* the stack computes the IP header already, the only time we
715 * need the hardware to recompute it is in the case of TSO.
716 */
717 if (skb_is_gso(skb))
718 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
719
720 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
721 } else if (l3.v6->version == 6) {
722 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
723 HNS3_TXD_L3T_S, HNS3_L3T_IPV6);
724 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
725 }
726
727 switch (l4_proto) {
728 case IPPROTO_TCP:
729 hnae_set_field(*type_cs_vlan_tso,
730 HNS3_TXD_L4T_M,
731 HNS3_TXD_L4T_S,
732 HNS3_L4T_TCP);
733 break;
734 case IPPROTO_UDP:
735 hnae_set_field(*type_cs_vlan_tso,
736 HNS3_TXD_L4T_M,
737 HNS3_TXD_L4T_S,
738 HNS3_L4T_UDP);
739 break;
740 case IPPROTO_SCTP:
741 hnae_set_field(*type_cs_vlan_tso,
742 HNS3_TXD_L4T_M,
743 HNS3_TXD_L4T_S,
744 HNS3_L4T_SCTP);
745 break;
746 default:
747 /* drop the skb tunnel packet if hardware don't support,
748 * because hardware can't calculate csum when TSO.
749 */
750 if (skb_is_gso(skb))
751 return -EDOM;
752
753 /* the stack computes the IP header already,
754 * driver calculate l4 checksum when not TSO.
755 */
756 skb_checksum_help(skb);
757 return 0;
758 }
759
760 return 0;
761}
762
763static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
764{
765 /* Config bd buffer end */
766 hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_BDTYPE_M,
Fuyun Liang3c8f5c02018-03-24 11:32:45 +0800767 HNS3_TXD_BDTYPE_S, 0);
Salil76ad4f02017-08-02 16:59:45 +0100768 hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end);
769 hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1);
Lipeng7036d262017-10-24 21:02:09 +0800770 hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_SC_M, HNS3_TXD_SC_S, 0);
Salil76ad4f02017-08-02 16:59:45 +0100771}
772
Peng Li9699cff2017-12-22 12:21:48 +0800773static int hns3_fill_desc_vtags(struct sk_buff *skb,
774 struct hns3_enet_ring *tx_ring,
775 u32 *inner_vlan_flag,
776 u32 *out_vlan_flag,
777 u16 *inner_vtag,
778 u16 *out_vtag)
779{
780#define HNS3_TX_VLAN_PRIO_SHIFT 13
781
782 if (skb->protocol == htons(ETH_P_8021Q) &&
783 !(tx_ring->tqp->handle->kinfo.netdev->features &
784 NETIF_F_HW_VLAN_CTAG_TX)) {
785 /* When HW VLAN acceleration is turned off, and the stack
786 * sets the protocol to 802.1q, the driver just need to
787 * set the protocol to the encapsulated ethertype.
788 */
789 skb->protocol = vlan_get_protocol(skb);
790 return 0;
791 }
792
793 if (skb_vlan_tag_present(skb)) {
794 u16 vlan_tag;
795
796 vlan_tag = skb_vlan_tag_get(skb);
797 vlan_tag |= (skb->priority & 0x7) << HNS3_TX_VLAN_PRIO_SHIFT;
798
799 /* Based on hw strategy, use out_vtag in two layer tag case,
800 * and use inner_vtag in one tag case.
801 */
802 if (skb->protocol == htons(ETH_P_8021Q)) {
803 hnae_set_bit(*out_vlan_flag, HNS3_TXD_OVLAN_B, 1);
804 *out_vtag = vlan_tag;
805 } else {
806 hnae_set_bit(*inner_vlan_flag, HNS3_TXD_VLAN_B, 1);
807 *inner_vtag = vlan_tag;
808 }
809 } else if (skb->protocol == htons(ETH_P_8021Q)) {
810 struct vlan_ethhdr *vhdr;
811 int rc;
812
813 rc = skb_cow_head(skb, 0);
814 if (rc < 0)
815 return rc;
816 vhdr = (struct vlan_ethhdr *)skb->data;
817 vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority & 0x7)
818 << HNS3_TX_VLAN_PRIO_SHIFT);
819 }
820
821 skb->protocol = vlan_get_protocol(skb);
822 return 0;
823}
824
Salil76ad4f02017-08-02 16:59:45 +0100825static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
826 int size, dma_addr_t dma, int frag_end,
827 enum hns_desc_type type)
828{
829 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
830 struct hns3_desc *desc = &ring->desc[ring->next_to_use];
831 u32 ol_type_vlan_len_msec = 0;
832 u16 bdtp_fe_sc_vld_ra_ri = 0;
833 u32 type_cs_vlan_tso = 0;
834 struct sk_buff *skb;
Peng Li9699cff2017-12-22 12:21:48 +0800835 u16 inner_vtag = 0;
836 u16 out_vtag = 0;
Salil76ad4f02017-08-02 16:59:45 +0100837 u32 paylen = 0;
838 u16 mss = 0;
839 __be16 protocol;
840 u8 ol4_proto;
841 u8 il4_proto;
842 int ret;
843
844 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
845 desc_cb->priv = priv;
846 desc_cb->length = size;
847 desc_cb->dma = dma;
848 desc_cb->type = type;
849
850 /* now, fill the descriptor */
851 desc->addr = cpu_to_le64(dma);
852 desc->tx.send_size = cpu_to_le16((u16)size);
853 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end);
854 desc->tx.bdtp_fe_sc_vld_ra_ri = cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
855
856 if (type == DESC_TYPE_SKB) {
857 skb = (struct sk_buff *)priv;
Yunsheng Lina90bb9a2017-10-09 15:44:00 +0800858 paylen = skb->len;
Salil76ad4f02017-08-02 16:59:45 +0100859
Peng Li9699cff2017-12-22 12:21:48 +0800860 ret = hns3_fill_desc_vtags(skb, ring, &type_cs_vlan_tso,
861 &ol_type_vlan_len_msec,
862 &inner_vtag, &out_vtag);
863 if (unlikely(ret))
864 return ret;
865
Salil76ad4f02017-08-02 16:59:45 +0100866 if (skb->ip_summed == CHECKSUM_PARTIAL) {
867 skb_reset_mac_len(skb);
868 protocol = skb->protocol;
869
Salil1898d4e2017-08-18 12:31:39 +0100870 ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
871 if (ret)
872 return ret;
Salil76ad4f02017-08-02 16:59:45 +0100873 hns3_set_l2l3l4_len(skb, ol4_proto, il4_proto,
874 &type_cs_vlan_tso,
875 &ol_type_vlan_len_msec);
876 ret = hns3_set_l3l4_type_csum(skb, ol4_proto, il4_proto,
877 &type_cs_vlan_tso,
878 &ol_type_vlan_len_msec);
879 if (ret)
880 return ret;
881
882 ret = hns3_set_tso(skb, &paylen, &mss,
883 &type_cs_vlan_tso);
884 if (ret)
885 return ret;
886 }
887
888 /* Set txbd */
889 desc->tx.ol_type_vlan_len_msec =
890 cpu_to_le32(ol_type_vlan_len_msec);
891 desc->tx.type_cs_vlan_tso_len =
892 cpu_to_le32(type_cs_vlan_tso);
Yunsheng Lina90bb9a2017-10-09 15:44:00 +0800893 desc->tx.paylen = cpu_to_le32(paylen);
Salil76ad4f02017-08-02 16:59:45 +0100894 desc->tx.mss = cpu_to_le16(mss);
Peng Li9699cff2017-12-22 12:21:48 +0800895 desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
896 desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
Salil76ad4f02017-08-02 16:59:45 +0100897 }
898
899 /* move ring pointer to next.*/
900 ring_ptr_move_fw(ring, next_to_use);
901
902 return 0;
903}
904
905static int hns3_fill_desc_tso(struct hns3_enet_ring *ring, void *priv,
906 int size, dma_addr_t dma, int frag_end,
907 enum hns_desc_type type)
908{
909 unsigned int frag_buf_num;
910 unsigned int k;
911 int sizeoflast;
912 int ret;
913
914 frag_buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
915 sizeoflast = size % HNS3_MAX_BD_SIZE;
916 sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
917
918 /* When the frag size is bigger than hardware, split this frag */
919 for (k = 0; k < frag_buf_num; k++) {
920 ret = hns3_fill_desc(ring, priv,
921 (k == frag_buf_num - 1) ?
922 sizeoflast : HNS3_MAX_BD_SIZE,
923 dma + HNS3_MAX_BD_SIZE * k,
924 frag_end && (k == frag_buf_num - 1) ? 1 : 0,
925 (type == DESC_TYPE_SKB && !k) ?
926 DESC_TYPE_SKB : DESC_TYPE_PAGE);
927 if (ret)
928 return ret;
929 }
930
931 return 0;
932}
933
934static int hns3_nic_maybe_stop_tso(struct sk_buff **out_skb, int *bnum,
935 struct hns3_enet_ring *ring)
936{
937 struct sk_buff *skb = *out_skb;
938 struct skb_frag_struct *frag;
939 int bdnum_for_frag;
940 int frag_num;
941 int buf_num;
942 int size;
943 int i;
944
945 size = skb_headlen(skb);
946 buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
947
948 frag_num = skb_shinfo(skb)->nr_frags;
949 for (i = 0; i < frag_num; i++) {
950 frag = &skb_shinfo(skb)->frags[i];
951 size = skb_frag_size(frag);
952 bdnum_for_frag =
953 (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
954 if (bdnum_for_frag > HNS3_MAX_BD_PER_FRAG)
955 return -ENOMEM;
956
957 buf_num += bdnum_for_frag;
958 }
959
960 if (buf_num > ring_space(ring))
961 return -EBUSY;
962
963 *bnum = buf_num;
964 return 0;
965}
966
967static int hns3_nic_maybe_stop_tx(struct sk_buff **out_skb, int *bnum,
968 struct hns3_enet_ring *ring)
969{
970 struct sk_buff *skb = *out_skb;
971 int buf_num;
972
973 /* No. of segments (plus a header) */
974 buf_num = skb_shinfo(skb)->nr_frags + 1;
975
976 if (buf_num > ring_space(ring))
977 return -EBUSY;
978
979 *bnum = buf_num;
980
981 return 0;
982}
983
984static void hns_nic_dma_unmap(struct hns3_enet_ring *ring, int next_to_use_orig)
985{
986 struct device *dev = ring_to_dev(ring);
987 unsigned int i;
988
989 for (i = 0; i < ring->desc_num; i++) {
990 /* check if this is where we started */
991 if (ring->next_to_use == next_to_use_orig)
992 break;
993
994 /* unmap the descriptor dma address */
995 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
996 dma_unmap_single(dev,
997 ring->desc_cb[ring->next_to_use].dma,
998 ring->desc_cb[ring->next_to_use].length,
999 DMA_TO_DEVICE);
1000 else
1001 dma_unmap_page(dev,
1002 ring->desc_cb[ring->next_to_use].dma,
1003 ring->desc_cb[ring->next_to_use].length,
1004 DMA_TO_DEVICE);
1005
1006 /* rollback one */
1007 ring_ptr_move_bw(ring, next_to_use);
1008 }
1009}
1010
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08001011netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
Salil76ad4f02017-08-02 16:59:45 +01001012{
1013 struct hns3_nic_priv *priv = netdev_priv(netdev);
1014 struct hns3_nic_ring_data *ring_data =
1015 &tx_ring_data(priv, skb->queue_mapping);
1016 struct hns3_enet_ring *ring = ring_data->ring;
1017 struct device *dev = priv->dev;
1018 struct netdev_queue *dev_queue;
1019 struct skb_frag_struct *frag;
1020 int next_to_use_head;
1021 int next_to_use_frag;
1022 dma_addr_t dma;
1023 int buf_num;
1024 int seg_num;
1025 int size;
1026 int ret;
1027 int i;
1028
1029 /* Prefetch the data used later */
1030 prefetch(skb->data);
1031
1032 switch (priv->ops.maybe_stop_tx(&skb, &buf_num, ring)) {
1033 case -EBUSY:
1034 u64_stats_update_begin(&ring->syncp);
1035 ring->stats.tx_busy++;
1036 u64_stats_update_end(&ring->syncp);
1037
1038 goto out_net_tx_busy;
1039 case -ENOMEM:
1040 u64_stats_update_begin(&ring->syncp);
1041 ring->stats.sw_err_cnt++;
1042 u64_stats_update_end(&ring->syncp);
1043 netdev_err(netdev, "no memory to xmit!\n");
1044
1045 goto out_err_tx_ok;
1046 default:
1047 break;
1048 }
1049
1050 /* No. of segments (plus a header) */
1051 seg_num = skb_shinfo(skb)->nr_frags + 1;
1052 /* Fill the first part */
1053 size = skb_headlen(skb);
1054
1055 next_to_use_head = ring->next_to_use;
1056
1057 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1058 if (dma_mapping_error(dev, dma)) {
1059 netdev_err(netdev, "TX head DMA map failed\n");
1060 ring->stats.sw_err_cnt++;
1061 goto out_err_tx_ok;
1062 }
1063
1064 ret = priv->ops.fill_desc(ring, skb, size, dma, seg_num == 1 ? 1 : 0,
1065 DESC_TYPE_SKB);
1066 if (ret)
1067 goto head_dma_map_err;
1068
1069 next_to_use_frag = ring->next_to_use;
1070 /* Fill the fragments */
1071 for (i = 1; i < seg_num; i++) {
1072 frag = &skb_shinfo(skb)->frags[i - 1];
1073 size = skb_frag_size(frag);
1074 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1075 if (dma_mapping_error(dev, dma)) {
1076 netdev_err(netdev, "TX frag(%d) DMA map failed\n", i);
1077 ring->stats.sw_err_cnt++;
1078 goto frag_dma_map_err;
1079 }
1080 ret = priv->ops.fill_desc(ring, skb_frag_page(frag), size, dma,
1081 seg_num - 1 == i ? 1 : 0,
1082 DESC_TYPE_PAGE);
1083
1084 if (ret)
1085 goto frag_dma_map_err;
1086 }
1087
1088 /* Complete translate all packets */
1089 dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
1090 netdev_tx_sent_queue(dev_queue, skb->len);
1091
1092 wmb(); /* Commit all data before submit */
1093
1094 hnae_queue_xmit(ring->tqp, buf_num);
1095
1096 return NETDEV_TX_OK;
1097
1098frag_dma_map_err:
1099 hns_nic_dma_unmap(ring, next_to_use_frag);
1100
1101head_dma_map_err:
1102 hns_nic_dma_unmap(ring, next_to_use_head);
1103
1104out_err_tx_ok:
1105 dev_kfree_skb_any(skb);
1106 return NETDEV_TX_OK;
1107
1108out_net_tx_busy:
1109 netif_stop_subqueue(netdev, ring_data->queue_index);
1110 smp_mb(); /* Commit all data before submit */
1111
1112 return NETDEV_TX_BUSY;
1113}
1114
1115static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1116{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001117 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001118 struct sockaddr *mac_addr = p;
1119 int ret;
1120
1121 if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1122 return -EADDRNOTAVAIL;
1123
Fuyun Liang590980552018-03-10 11:29:22 +08001124 ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
Salil76ad4f02017-08-02 16:59:45 +01001125 if (ret) {
1126 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1127 return ret;
1128 }
1129
1130 ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1131
1132 return 0;
1133}
1134
1135static int hns3_nic_set_features(struct net_device *netdev,
1136 netdev_features_t features)
1137{
Jian Shen181d4542018-01-12 16:23:16 +08001138 netdev_features_t changed = netdev->features ^ features;
Salil76ad4f02017-08-02 16:59:45 +01001139 struct hns3_nic_priv *priv = netdev_priv(netdev);
Peng Li052ece62017-12-22 12:21:47 +08001140 struct hnae3_handle *h = priv->ae_handle;
Peng Li052ece62017-12-22 12:21:47 +08001141 int ret;
Salil76ad4f02017-08-02 16:59:45 +01001142
Jian Shen181d4542018-01-12 16:23:16 +08001143 if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) {
1144 if (features & (NETIF_F_TSO | NETIF_F_TSO6)) {
1145 priv->ops.fill_desc = hns3_fill_desc_tso;
1146 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
1147 } else {
1148 priv->ops.fill_desc = hns3_fill_desc;
1149 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
1150 }
Salil76ad4f02017-08-02 16:59:45 +01001151 }
1152
Jian Shenbd368412018-01-12 16:23:17 +08001153 if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&
1154 h->ae_algo->ops->enable_vlan_filter) {
Jian Shen181d4542018-01-12 16:23:16 +08001155 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
1156 h->ae_algo->ops->enable_vlan_filter(h, true);
1157 else
1158 h->ae_algo->ops->enable_vlan_filter(h, false);
1159 }
Jian Shen391b5e92018-01-05 18:18:05 +08001160
Jian Shenbd368412018-01-12 16:23:17 +08001161 if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1162 h->ae_algo->ops->enable_hw_strip_rxvtag) {
Peng Li052ece62017-12-22 12:21:47 +08001163 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1164 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, true);
1165 else
1166 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, false);
1167
1168 if (ret)
1169 return ret;
1170 }
1171
Salil76ad4f02017-08-02 16:59:45 +01001172 netdev->features = features;
1173 return 0;
1174}
1175
Peng Li6c88d9d2018-01-09 14:50:59 +08001176static void hns3_nic_get_stats64(struct net_device *netdev,
1177 struct rtnl_link_stats64 *stats)
Salil76ad4f02017-08-02 16:59:45 +01001178{
1179 struct hns3_nic_priv *priv = netdev_priv(netdev);
1180 int queue_num = priv->ae_handle->kinfo.num_tqps;
Jian Shenc5f65482018-01-05 18:18:10 +08001181 struct hnae3_handle *handle = priv->ae_handle;
Salil76ad4f02017-08-02 16:59:45 +01001182 struct hns3_enet_ring *ring;
1183 unsigned int start;
1184 unsigned int idx;
1185 u64 tx_bytes = 0;
1186 u64 rx_bytes = 0;
1187 u64 tx_pkts = 0;
1188 u64 rx_pkts = 0;
Jian Shend2a5dca2018-01-05 18:18:12 +08001189 u64 tx_drop = 0;
1190 u64 rx_drop = 0;
Salil76ad4f02017-08-02 16:59:45 +01001191
Jian Shenb875cc32018-01-05 18:18:11 +08001192 if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1193 return;
1194
Jian Shenc5f65482018-01-05 18:18:10 +08001195 handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1196
Salil76ad4f02017-08-02 16:59:45 +01001197 for (idx = 0; idx < queue_num; idx++) {
1198 /* fetch the tx stats */
1199 ring = priv->ring_data[idx].ring;
1200 do {
Salild36d36c2017-08-18 12:31:37 +01001201 start = u64_stats_fetch_begin_irq(&ring->syncp);
Salil76ad4f02017-08-02 16:59:45 +01001202 tx_bytes += ring->stats.tx_bytes;
1203 tx_pkts += ring->stats.tx_pkts;
Jian Shend2a5dca2018-01-05 18:18:12 +08001204 tx_drop += ring->stats.tx_busy;
1205 tx_drop += ring->stats.sw_err_cnt;
Salil76ad4f02017-08-02 16:59:45 +01001206 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1207
1208 /* fetch the rx stats */
1209 ring = priv->ring_data[idx + queue_num].ring;
1210 do {
Salild36d36c2017-08-18 12:31:37 +01001211 start = u64_stats_fetch_begin_irq(&ring->syncp);
Salil76ad4f02017-08-02 16:59:45 +01001212 rx_bytes += ring->stats.rx_bytes;
1213 rx_pkts += ring->stats.rx_pkts;
Jian Shend2a5dca2018-01-05 18:18:12 +08001214 rx_drop += ring->stats.non_vld_descs;
1215 rx_drop += ring->stats.err_pkt_len;
1216 rx_drop += ring->stats.l2_err;
Salil76ad4f02017-08-02 16:59:45 +01001217 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1218 }
1219
1220 stats->tx_bytes = tx_bytes;
1221 stats->tx_packets = tx_pkts;
1222 stats->rx_bytes = rx_bytes;
1223 stats->rx_packets = rx_pkts;
1224
1225 stats->rx_errors = netdev->stats.rx_errors;
1226 stats->multicast = netdev->stats.multicast;
1227 stats->rx_length_errors = netdev->stats.rx_length_errors;
1228 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
1229 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1230
1231 stats->tx_errors = netdev->stats.tx_errors;
Jian Shend2a5dca2018-01-05 18:18:12 +08001232 stats->rx_dropped = rx_drop + netdev->stats.rx_dropped;
1233 stats->tx_dropped = tx_drop + netdev->stats.tx_dropped;
Salil76ad4f02017-08-02 16:59:45 +01001234 stats->collisions = netdev->stats.collisions;
1235 stats->rx_over_errors = netdev->stats.rx_over_errors;
1236 stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1237 stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1238 stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1239 stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1240 stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1241 stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1242 stats->tx_window_errors = netdev->stats.tx_window_errors;
1243 stats->rx_compressed = netdev->stats.rx_compressed;
1244 stats->tx_compressed = netdev->stats.tx_compressed;
1245}
1246
1247static void hns3_add_tunnel_port(struct net_device *netdev, u16 port,
1248 enum hns3_udp_tnl_type type)
1249{
1250 struct hns3_nic_priv *priv = netdev_priv(netdev);
1251 struct hns3_udp_tunnel *udp_tnl = &priv->udp_tnl[type];
1252 struct hnae3_handle *h = priv->ae_handle;
1253
1254 if (udp_tnl->used && udp_tnl->dst_port == port) {
1255 udp_tnl->used++;
1256 return;
1257 }
1258
1259 if (udp_tnl->used) {
1260 netdev_warn(netdev,
1261 "UDP tunnel [%d], port [%d] offload\n", type, port);
1262 return;
1263 }
1264
1265 udp_tnl->dst_port = port;
1266 udp_tnl->used = 1;
1267 /* TBD send command to hardware to add port */
1268 if (h->ae_algo->ops->add_tunnel_udp)
1269 h->ae_algo->ops->add_tunnel_udp(h, port);
1270}
1271
1272static void hns3_del_tunnel_port(struct net_device *netdev, u16 port,
1273 enum hns3_udp_tnl_type type)
1274{
1275 struct hns3_nic_priv *priv = netdev_priv(netdev);
1276 struct hns3_udp_tunnel *udp_tnl = &priv->udp_tnl[type];
1277 struct hnae3_handle *h = priv->ae_handle;
1278
1279 if (!udp_tnl->used || udp_tnl->dst_port != port) {
1280 netdev_warn(netdev,
1281 "Invalid UDP tunnel port %d\n", port);
1282 return;
1283 }
1284
1285 udp_tnl->used--;
1286 if (udp_tnl->used)
1287 return;
1288
1289 udp_tnl->dst_port = 0;
1290 /* TBD send command to hardware to del port */
1291 if (h->ae_algo->ops->del_tunnel_udp)
Dan Carpenter9537e7c2017-08-10 12:54:59 +03001292 h->ae_algo->ops->del_tunnel_udp(h, port);
Salil76ad4f02017-08-02 16:59:45 +01001293}
1294
1295/* hns3_nic_udp_tunnel_add - Get notifiacetion about UDP tunnel ports
1296 * @netdev: This physical ports's netdev
1297 * @ti: Tunnel information
1298 */
1299static void hns3_nic_udp_tunnel_add(struct net_device *netdev,
1300 struct udp_tunnel_info *ti)
1301{
1302 u16 port_n = ntohs(ti->port);
1303
1304 switch (ti->type) {
1305 case UDP_TUNNEL_TYPE_VXLAN:
1306 hns3_add_tunnel_port(netdev, port_n, HNS3_UDP_TNL_VXLAN);
1307 break;
1308 case UDP_TUNNEL_TYPE_GENEVE:
1309 hns3_add_tunnel_port(netdev, port_n, HNS3_UDP_TNL_GENEVE);
1310 break;
1311 default:
1312 netdev_err(netdev, "unsupported tunnel type %d\n", ti->type);
1313 break;
1314 }
1315}
1316
1317static void hns3_nic_udp_tunnel_del(struct net_device *netdev,
1318 struct udp_tunnel_info *ti)
1319{
1320 u16 port_n = ntohs(ti->port);
1321
1322 switch (ti->type) {
1323 case UDP_TUNNEL_TYPE_VXLAN:
1324 hns3_del_tunnel_port(netdev, port_n, HNS3_UDP_TNL_VXLAN);
1325 break;
1326 case UDP_TUNNEL_TYPE_GENEVE:
1327 hns3_del_tunnel_port(netdev, port_n, HNS3_UDP_TNL_GENEVE);
1328 break;
1329 default:
1330 break;
1331 }
1332}
1333
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001334static int hns3_setup_tc(struct net_device *netdev, void *type_data)
Salil76ad4f02017-08-02 16:59:45 +01001335{
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001336 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001337 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001338 struct hnae3_knic_private_info *kinfo = &h->kinfo;
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001339 u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1340 u8 tc = mqprio_qopt->qopt.num_tc;
1341 u16 mode = mqprio_qopt->mode;
1342 u8 hw = mqprio_qopt->qopt.hw;
1343 bool if_running;
Salil76ad4f02017-08-02 16:59:45 +01001344 unsigned int i;
1345 int ret;
1346
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001347 if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1348 mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1349 return -EOPNOTSUPP;
1350
Salil76ad4f02017-08-02 16:59:45 +01001351 if (tc > HNAE3_MAX_TC)
1352 return -EINVAL;
1353
Salil76ad4f02017-08-02 16:59:45 +01001354 if (!netdev)
1355 return -EINVAL;
1356
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001357 if_running = netif_running(netdev);
1358 if (if_running) {
1359 hns3_nic_net_stop(netdev);
1360 msleep(100);
Salil76ad4f02017-08-02 16:59:45 +01001361 }
1362
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001363 ret = (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1364 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
Salil76ad4f02017-08-02 16:59:45 +01001365 if (ret)
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001366 goto out;
Salil76ad4f02017-08-02 16:59:45 +01001367
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001368 if (tc <= 1) {
1369 netdev_reset_tc(netdev);
1370 } else {
1371 ret = netdev_set_num_tc(netdev, tc);
1372 if (ret)
1373 goto out;
1374
1375 for (i = 0; i < HNAE3_MAX_TC; i++) {
1376 if (!kinfo->tc_info[i].enable)
1377 continue;
1378
Salil76ad4f02017-08-02 16:59:45 +01001379 netdev_set_tc_queue(netdev,
1380 kinfo->tc_info[i].tc,
1381 kinfo->tc_info[i].tqp_count,
1382 kinfo->tc_info[i].tqp_offset);
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001383 }
Salil76ad4f02017-08-02 16:59:45 +01001384 }
1385
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001386 ret = hns3_nic_set_real_num_queue(netdev);
1387
1388out:
1389 if (if_running)
1390 hns3_nic_net_open(netdev);
1391
1392 return ret;
Salil76ad4f02017-08-02 16:59:45 +01001393}
1394
Jiri Pirko2572ac52017-08-07 10:15:17 +02001395static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
Jiri Pirkode4784c2017-08-07 10:15:32 +02001396 void *type_data)
Salil76ad4f02017-08-02 16:59:45 +01001397{
Nogah Frankel575ed7d2017-11-06 07:23:42 +01001398 if (type != TC_SETUP_QDISC_MQPRIO)
Jiri Pirko38cf0422017-08-07 10:15:31 +02001399 return -EOPNOTSUPP;
Salil76ad4f02017-08-02 16:59:45 +01001400
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001401 return hns3_setup_tc(dev, type_data);
Salil76ad4f02017-08-02 16:59:45 +01001402}
1403
1404static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1405 __be16 proto, u16 vid)
1406{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001407 struct hnae3_handle *h = hns3_get_handle(netdev);
Yunsheng Lin681ec392018-03-21 15:49:22 +08001408 struct hns3_nic_priv *priv = netdev_priv(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001409 int ret = -EIO;
1410
1411 if (h->ae_algo->ops->set_vlan_filter)
1412 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1413
Yunsheng Lin681ec392018-03-21 15:49:22 +08001414 if (!ret)
1415 set_bit(vid, priv->active_vlans);
1416
Salil76ad4f02017-08-02 16:59:45 +01001417 return ret;
1418}
1419
1420static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1421 __be16 proto, u16 vid)
1422{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001423 struct hnae3_handle *h = hns3_get_handle(netdev);
Yunsheng Lin681ec392018-03-21 15:49:22 +08001424 struct hns3_nic_priv *priv = netdev_priv(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001425 int ret = -EIO;
1426
1427 if (h->ae_algo->ops->set_vlan_filter)
1428 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1429
Yunsheng Lin681ec392018-03-21 15:49:22 +08001430 if (!ret)
1431 clear_bit(vid, priv->active_vlans);
1432
Salil76ad4f02017-08-02 16:59:45 +01001433 return ret;
1434}
1435
Yunsheng Lin681ec392018-03-21 15:49:22 +08001436static void hns3_restore_vlan(struct net_device *netdev)
1437{
1438 struct hns3_nic_priv *priv = netdev_priv(netdev);
1439 u16 vid;
1440 int ret;
1441
1442 for_each_set_bit(vid, priv->active_vlans, VLAN_N_VID) {
1443 ret = hns3_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
1444 if (ret)
1445 netdev_warn(netdev, "Restore vlan: %d filter, ret:%d\n",
1446 vid, ret);
1447 }
1448}
1449
Salil76ad4f02017-08-02 16:59:45 +01001450static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1451 u8 qos, __be16 vlan_proto)
1452{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001453 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001454 int ret = -EIO;
1455
1456 if (h->ae_algo->ops->set_vf_vlan_filter)
1457 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1458 qos, vlan_proto);
1459
1460 return ret;
1461}
1462
Salila8e8b7f2017-08-21 17:05:24 +01001463static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1464{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001465 struct hnae3_handle *h = hns3_get_handle(netdev);
Salila8e8b7f2017-08-21 17:05:24 +01001466 bool if_running = netif_running(netdev);
1467 int ret;
1468
1469 if (!h->ae_algo->ops->set_mtu)
1470 return -EOPNOTSUPP;
1471
1472 /* if this was called with netdev up then bring netdevice down */
1473 if (if_running) {
1474 (void)hns3_nic_net_stop(netdev);
1475 msleep(100);
1476 }
1477
1478 ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1479 if (ret) {
1480 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1481 ret);
1482 return ret;
1483 }
1484
Fuyun Liang5bad95a2018-01-05 18:18:20 +08001485 netdev->mtu = new_mtu;
1486
Salila8e8b7f2017-08-21 17:05:24 +01001487 /* if the netdev was running earlier, bring it up again */
1488 if (if_running && hns3_nic_net_open(netdev))
1489 ret = -EINVAL;
1490
1491 return ret;
1492}
1493
Lipengf8fa222c2017-11-02 20:45:20 +08001494static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1495{
1496 struct hns3_nic_priv *priv = netdev_priv(ndev);
1497 struct hns3_enet_ring *tx_ring = NULL;
1498 int timeout_queue = 0;
1499 int hw_head, hw_tail;
1500 int i;
1501
1502 /* Find the stopped queue the same way the stack does */
1503 for (i = 0; i < ndev->real_num_tx_queues; i++) {
1504 struct netdev_queue *q;
1505 unsigned long trans_start;
1506
1507 q = netdev_get_tx_queue(ndev, i);
1508 trans_start = q->trans_start;
1509 if (netif_xmit_stopped(q) &&
1510 time_after(jiffies,
1511 (trans_start + ndev->watchdog_timeo))) {
1512 timeout_queue = i;
1513 break;
1514 }
1515 }
1516
1517 if (i == ndev->num_tx_queues) {
1518 netdev_info(ndev,
1519 "no netdev TX timeout queue found, timeout count: %llu\n",
1520 priv->tx_timeout_count);
1521 return false;
1522 }
1523
1524 tx_ring = priv->ring_data[timeout_queue].ring;
1525
1526 hw_head = readl_relaxed(tx_ring->tqp->io_base +
1527 HNS3_RING_TX_RING_HEAD_REG);
1528 hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1529 HNS3_RING_TX_RING_TAIL_REG);
1530 netdev_info(ndev,
1531 "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, HW_HEAD: 0x%x, HW_TAIL: 0x%x, INT: 0x%x\n",
1532 priv->tx_timeout_count,
1533 timeout_queue,
1534 tx_ring->next_to_use,
1535 tx_ring->next_to_clean,
1536 hw_head,
1537 hw_tail,
1538 readl(tx_ring->tqp_vector->mask_addr));
1539
1540 return true;
1541}
1542
1543static void hns3_nic_net_timeout(struct net_device *ndev)
1544{
1545 struct hns3_nic_priv *priv = netdev_priv(ndev);
Lipengf8fa222c2017-11-02 20:45:20 +08001546 struct hnae3_handle *h = priv->ae_handle;
1547
1548 if (!hns3_get_tx_timeo_queue_info(ndev))
1549 return;
1550
1551 priv->tx_timeout_count++;
1552
Salil Mehta6d4c3982018-03-22 14:28:52 +00001553 if (time_before(jiffies, (h->last_reset_time + ndev->watchdog_timeo)))
Lipengf8fa222c2017-11-02 20:45:20 +08001554 return;
1555
Salil Mehta6d4c3982018-03-22 14:28:52 +00001556 /* request the reset */
Lipengf8fa222c2017-11-02 20:45:20 +08001557 if (h->ae_algo->ops->reset_event)
Salil Mehta6d4c3982018-03-22 14:28:52 +00001558 h->ae_algo->ops->reset_event(h);
Lipengf8fa222c2017-11-02 20:45:20 +08001559}
1560
Salil76ad4f02017-08-02 16:59:45 +01001561static const struct net_device_ops hns3_nic_netdev_ops = {
1562 .ndo_open = hns3_nic_net_open,
1563 .ndo_stop = hns3_nic_net_stop,
1564 .ndo_start_xmit = hns3_nic_net_xmit,
Lipengf8fa222c2017-11-02 20:45:20 +08001565 .ndo_tx_timeout = hns3_nic_net_timeout,
Salil76ad4f02017-08-02 16:59:45 +01001566 .ndo_set_mac_address = hns3_nic_net_set_mac_address,
Salila8e8b7f2017-08-21 17:05:24 +01001567 .ndo_change_mtu = hns3_nic_change_mtu,
Salil76ad4f02017-08-02 16:59:45 +01001568 .ndo_set_features = hns3_nic_set_features,
1569 .ndo_get_stats64 = hns3_nic_get_stats64,
1570 .ndo_setup_tc = hns3_nic_setup_tc,
1571 .ndo_set_rx_mode = hns3_nic_set_rx_mode,
1572 .ndo_udp_tunnel_add = hns3_nic_udp_tunnel_add,
1573 .ndo_udp_tunnel_del = hns3_nic_udp_tunnel_del,
1574 .ndo_vlan_rx_add_vid = hns3_vlan_rx_add_vid,
1575 .ndo_vlan_rx_kill_vid = hns3_vlan_rx_kill_vid,
1576 .ndo_set_vf_vlan = hns3_ndo_set_vf_vlan,
1577};
1578
1579/* hns3_probe - Device initialization routine
1580 * @pdev: PCI device information struct
1581 * @ent: entry in hns3_pci_tbl
1582 *
1583 * hns3_probe initializes a PF identified by a pci_dev structure.
1584 * The OS initialization, configuring of the PF private structure,
1585 * and a hardware reset occur.
1586 *
1587 * Returns 0 on success, negative on failure
1588 */
1589static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1590{
1591 struct hnae3_ae_dev *ae_dev;
1592 int ret;
1593
1594 ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev),
1595 GFP_KERNEL);
1596 if (!ae_dev) {
1597 ret = -ENOMEM;
1598 return ret;
1599 }
1600
1601 ae_dev->pdev = pdev;
Yunsheng Line92a0842017-09-20 18:52:50 +08001602 ae_dev->flag = ent->driver_data;
Salil76ad4f02017-08-02 16:59:45 +01001603 ae_dev->dev_type = HNAE3_DEV_KNIC;
1604 pci_set_drvdata(pdev, ae_dev);
1605
1606 return hnae3_register_ae_dev(ae_dev);
1607}
1608
1609/* hns3_remove - Device removal routine
1610 * @pdev: PCI device information struct
1611 */
1612static void hns3_remove(struct pci_dev *pdev)
1613{
1614 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1615
1616 hnae3_unregister_ae_dev(ae_dev);
Salil76ad4f02017-08-02 16:59:45 +01001617}
1618
1619static struct pci_driver hns3_driver = {
1620 .name = hns3_driver_name,
1621 .id_table = hns3_pci_tbl,
1622 .probe = hns3_probe,
1623 .remove = hns3_remove,
1624};
1625
1626/* set default feature to hns3 */
1627static void hns3_set_default_feature(struct net_device *netdev)
1628{
1629 netdev->priv_flags |= IFF_UNICAST_FLT;
1630
1631 netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1632 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1633 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1634 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1635 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1636
1637 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
1638
1639 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
1640
1641 netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1642 NETIF_F_HW_VLAN_CTAG_FILTER |
Peng Li052ece62017-12-22 12:21:47 +08001643 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
Salil76ad4f02017-08-02 16:59:45 +01001644 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1645 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1646 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1647 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1648
1649 netdev->vlan_features |=
1650 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
1651 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
1652 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1653 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1654 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1655
1656 netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
Yunsheng Linb2641e22018-05-03 17:28:11 +01001657 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
Salil76ad4f02017-08-02 16:59:45 +01001658 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1659 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1660 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1661 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1662}
1663
1664static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
1665 struct hns3_desc_cb *cb)
1666{
1667 unsigned int order = hnae_page_order(ring);
1668 struct page *p;
1669
1670 p = dev_alloc_pages(order);
1671 if (!p)
1672 return -ENOMEM;
1673
1674 cb->priv = p;
1675 cb->page_offset = 0;
1676 cb->reuse_flag = 0;
1677 cb->buf = page_address(p);
1678 cb->length = hnae_page_size(ring);
1679 cb->type = DESC_TYPE_PAGE;
1680
Salil76ad4f02017-08-02 16:59:45 +01001681 return 0;
1682}
1683
1684static void hns3_free_buffer(struct hns3_enet_ring *ring,
1685 struct hns3_desc_cb *cb)
1686{
1687 if (cb->type == DESC_TYPE_SKB)
1688 dev_kfree_skb_any((struct sk_buff *)cb->priv);
1689 else if (!HNAE3_IS_TX_RING(ring))
1690 put_page((struct page *)cb->priv);
1691 memset(cb, 0, sizeof(*cb));
1692}
1693
1694static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
1695{
1696 cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
1697 cb->length, ring_to_dma_dir(ring));
1698
1699 if (dma_mapping_error(ring_to_dev(ring), cb->dma))
1700 return -EIO;
1701
1702 return 0;
1703}
1704
1705static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
1706 struct hns3_desc_cb *cb)
1707{
1708 if (cb->type == DESC_TYPE_SKB)
1709 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
1710 ring_to_dma_dir(ring));
1711 else
1712 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
1713 ring_to_dma_dir(ring));
1714}
1715
1716static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
1717{
1718 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
1719 ring->desc[i].addr = 0;
1720}
1721
1722static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
1723{
1724 struct hns3_desc_cb *cb = &ring->desc_cb[i];
1725
1726 if (!ring->desc_cb[i].dma)
1727 return;
1728
1729 hns3_buffer_detach(ring, i);
1730 hns3_free_buffer(ring, cb);
1731}
1732
1733static void hns3_free_buffers(struct hns3_enet_ring *ring)
1734{
1735 int i;
1736
1737 for (i = 0; i < ring->desc_num; i++)
1738 hns3_free_buffer_detach(ring, i);
1739}
1740
1741/* free desc along with its attached buffer */
1742static void hns3_free_desc(struct hns3_enet_ring *ring)
1743{
1744 hns3_free_buffers(ring);
1745
1746 dma_unmap_single(ring_to_dev(ring), ring->desc_dma_addr,
1747 ring->desc_num * sizeof(ring->desc[0]),
1748 DMA_BIDIRECTIONAL);
1749 ring->desc_dma_addr = 0;
1750 kfree(ring->desc);
1751 ring->desc = NULL;
1752}
1753
1754static int hns3_alloc_desc(struct hns3_enet_ring *ring)
1755{
1756 int size = ring->desc_num * sizeof(ring->desc[0]);
1757
1758 ring->desc = kzalloc(size, GFP_KERNEL);
1759 if (!ring->desc)
1760 return -ENOMEM;
1761
1762 ring->desc_dma_addr = dma_map_single(ring_to_dev(ring), ring->desc,
1763 size, DMA_BIDIRECTIONAL);
1764 if (dma_mapping_error(ring_to_dev(ring), ring->desc_dma_addr)) {
1765 ring->desc_dma_addr = 0;
1766 kfree(ring->desc);
1767 ring->desc = NULL;
1768 return -ENOMEM;
1769 }
1770
1771 return 0;
1772}
1773
1774static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
1775 struct hns3_desc_cb *cb)
1776{
1777 int ret;
1778
1779 ret = hns3_alloc_buffer(ring, cb);
1780 if (ret)
1781 goto out;
1782
1783 ret = hns3_map_buffer(ring, cb);
1784 if (ret)
1785 goto out_with_buf;
1786
1787 return 0;
1788
1789out_with_buf:
Lipeng564883b2017-10-23 19:51:02 +08001790 hns3_free_buffer(ring, cb);
Salil76ad4f02017-08-02 16:59:45 +01001791out:
1792 return ret;
1793}
1794
1795static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
1796{
1797 int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
1798
1799 if (ret)
1800 return ret;
1801
1802 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
1803
1804 return 0;
1805}
1806
1807/* Allocate memory for raw pkg, and map with dma */
1808static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
1809{
1810 int i, j, ret;
1811
1812 for (i = 0; i < ring->desc_num; i++) {
1813 ret = hns3_alloc_buffer_attach(ring, i);
1814 if (ret)
1815 goto out_buffer_fail;
1816 }
1817
1818 return 0;
1819
1820out_buffer_fail:
1821 for (j = i - 1; j >= 0; j--)
1822 hns3_free_buffer_detach(ring, j);
1823 return ret;
1824}
1825
1826/* detach a in-used buffer and replace with a reserved one */
1827static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
1828 struct hns3_desc_cb *res_cb)
1829{
Lipengb9077422017-10-23 19:51:01 +08001830 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
Salil76ad4f02017-08-02 16:59:45 +01001831 ring->desc_cb[i] = *res_cb;
1832 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
1833}
1834
1835static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
1836{
1837 ring->desc_cb[i].reuse_flag = 0;
1838 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
1839 + ring->desc_cb[i].page_offset);
1840}
1841
1842static void hns3_nic_reclaim_one_desc(struct hns3_enet_ring *ring, int *bytes,
1843 int *pkts)
1844{
1845 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
1846
1847 (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
1848 (*bytes) += desc_cb->length;
1849 /* desc_cb will be cleaned, after hnae_free_buffer_detach*/
1850 hns3_free_buffer_detach(ring, ring->next_to_clean);
1851
1852 ring_ptr_move_fw(ring, next_to_clean);
1853}
1854
1855static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
1856{
1857 int u = ring->next_to_use;
1858 int c = ring->next_to_clean;
1859
1860 if (unlikely(h > ring->desc_num))
1861 return 0;
1862
1863 return u > c ? (h > c && h <= u) : (h > c || h <= u);
1864}
1865
Lipeng24e750c2017-10-23 19:51:07 +08001866bool hns3_clean_tx_ring(struct hns3_enet_ring *ring, int budget)
Salil76ad4f02017-08-02 16:59:45 +01001867{
1868 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
1869 struct netdev_queue *dev_queue;
1870 int bytes, pkts;
1871 int head;
1872
1873 head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
1874 rmb(); /* Make sure head is ready before touch any data */
1875
1876 if (is_ring_empty(ring) || head == ring->next_to_clean)
Lipeng24e750c2017-10-23 19:51:07 +08001877 return true; /* no data to poll */
Salil76ad4f02017-08-02 16:59:45 +01001878
1879 if (!is_valid_clean_head(ring, head)) {
1880 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
1881 ring->next_to_use, ring->next_to_clean);
1882
1883 u64_stats_update_begin(&ring->syncp);
1884 ring->stats.io_err_cnt++;
1885 u64_stats_update_end(&ring->syncp);
Lipeng24e750c2017-10-23 19:51:07 +08001886 return true;
Salil76ad4f02017-08-02 16:59:45 +01001887 }
1888
1889 bytes = 0;
1890 pkts = 0;
1891 while (head != ring->next_to_clean && budget) {
1892 hns3_nic_reclaim_one_desc(ring, &bytes, &pkts);
1893 /* Issue prefetch for next Tx descriptor */
1894 prefetch(&ring->desc_cb[ring->next_to_clean]);
1895 budget--;
1896 }
1897
1898 ring->tqp_vector->tx_group.total_bytes += bytes;
1899 ring->tqp_vector->tx_group.total_packets += pkts;
1900
1901 u64_stats_update_begin(&ring->syncp);
1902 ring->stats.tx_bytes += bytes;
1903 ring->stats.tx_pkts += pkts;
1904 u64_stats_update_end(&ring->syncp);
1905
1906 dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
1907 netdev_tx_completed_queue(dev_queue, pkts, bytes);
1908
1909 if (unlikely(pkts && netif_carrier_ok(netdev) &&
1910 (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
1911 /* Make sure that anybody stopping the queue after this
1912 * sees the new next_to_clean.
1913 */
1914 smp_mb();
1915 if (netif_tx_queue_stopped(dev_queue)) {
1916 netif_tx_wake_queue(dev_queue);
1917 ring->stats.restart_queue++;
1918 }
1919 }
1920
1921 return !!budget;
1922}
1923
1924static int hns3_desc_unused(struct hns3_enet_ring *ring)
1925{
1926 int ntc = ring->next_to_clean;
1927 int ntu = ring->next_to_use;
1928
1929 return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
1930}
1931
1932static void
1933hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring, int cleand_count)
1934{
1935 struct hns3_desc_cb *desc_cb;
1936 struct hns3_desc_cb res_cbs;
1937 int i, ret;
1938
1939 for (i = 0; i < cleand_count; i++) {
1940 desc_cb = &ring->desc_cb[ring->next_to_use];
1941 if (desc_cb->reuse_flag) {
1942 u64_stats_update_begin(&ring->syncp);
1943 ring->stats.reuse_pg_cnt++;
1944 u64_stats_update_end(&ring->syncp);
1945
1946 hns3_reuse_buffer(ring, ring->next_to_use);
1947 } else {
1948 ret = hns3_reserve_buffer_map(ring, &res_cbs);
1949 if (ret) {
1950 u64_stats_update_begin(&ring->syncp);
1951 ring->stats.sw_err_cnt++;
1952 u64_stats_update_end(&ring->syncp);
1953
1954 netdev_err(ring->tqp->handle->kinfo.netdev,
1955 "hnae reserve buffer map failed.\n");
1956 break;
1957 }
1958 hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
1959 }
1960
1961 ring_ptr_move_fw(ring, next_to_use);
1962 }
1963
1964 wmb(); /* Make all data has been write before submit */
1965 writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
1966}
1967
1968/* hns3_nic_get_headlen - determine size of header for LRO/GRO
1969 * @data: pointer to the start of the headers
1970 * @max: total length of section to find headers in
1971 *
1972 * This function is meant to determine the length of headers that will
1973 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1974 * motivation of doing this is to only perform one pull for IPv4 TCP
1975 * packets so that we can do basic things like calculating the gso_size
1976 * based on the average data per packet.
1977 */
1978static unsigned int hns3_nic_get_headlen(unsigned char *data, u32 flag,
1979 unsigned int max_size)
1980{
1981 unsigned char *network;
1982 u8 hlen;
1983
1984 /* This should never happen, but better safe than sorry */
1985 if (max_size < ETH_HLEN)
1986 return max_size;
1987
1988 /* Initialize network frame pointer */
1989 network = data;
1990
1991 /* Set first protocol and move network header forward */
1992 network += ETH_HLEN;
1993
1994 /* Handle any vlan tag if present */
1995 if (hnae_get_field(flag, HNS3_RXD_VLAN_M, HNS3_RXD_VLAN_S)
1996 == HNS3_RX_FLAG_VLAN_PRESENT) {
1997 if ((typeof(max_size))(network - data) > (max_size - VLAN_HLEN))
1998 return max_size;
1999
2000 network += VLAN_HLEN;
2001 }
2002
2003 /* Handle L3 protocols */
2004 if (hnae_get_field(flag, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S)
2005 == HNS3_RX_FLAG_L3ID_IPV4) {
2006 if ((typeof(max_size))(network - data) >
2007 (max_size - sizeof(struct iphdr)))
2008 return max_size;
2009
2010 /* Access ihl as a u8 to avoid unaligned access on ia64 */
2011 hlen = (network[0] & 0x0F) << 2;
2012
2013 /* Verify hlen meets minimum size requirements */
2014 if (hlen < sizeof(struct iphdr))
2015 return network - data;
2016
2017 /* Record next protocol if header is present */
2018 } else if (hnae_get_field(flag, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S)
2019 == HNS3_RX_FLAG_L3ID_IPV6) {
2020 if ((typeof(max_size))(network - data) >
2021 (max_size - sizeof(struct ipv6hdr)))
2022 return max_size;
2023
2024 /* Record next protocol */
2025 hlen = sizeof(struct ipv6hdr);
2026 } else {
2027 return network - data;
2028 }
2029
2030 /* Relocate pointer to start of L4 header */
2031 network += hlen;
2032
2033 /* Finally sort out TCP/UDP */
2034 if (hnae_get_field(flag, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S)
2035 == HNS3_RX_FLAG_L4ID_TCP) {
2036 if ((typeof(max_size))(network - data) >
2037 (max_size - sizeof(struct tcphdr)))
2038 return max_size;
2039
2040 /* Access doff as a u8 to avoid unaligned access on ia64 */
2041 hlen = (network[12] & 0xF0) >> 2;
2042
2043 /* Verify hlen meets minimum size requirements */
2044 if (hlen < sizeof(struct tcphdr))
2045 return network - data;
2046
2047 network += hlen;
2048 } else if (hnae_get_field(flag, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S)
2049 == HNS3_RX_FLAG_L4ID_UDP) {
2050 if ((typeof(max_size))(network - data) >
2051 (max_size - sizeof(struct udphdr)))
2052 return max_size;
2053
2054 network += sizeof(struct udphdr);
2055 }
2056
2057 /* If everything has gone correctly network should be the
2058 * data section of the packet and will be the end of the header.
2059 * If not then it probably represents the end of the last recognized
2060 * header.
2061 */
2062 if ((typeof(max_size))(network - data) < max_size)
2063 return network - data;
2064 else
2065 return max_size;
2066}
2067
2068static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2069 struct hns3_enet_ring *ring, int pull_len,
2070 struct hns3_desc_cb *desc_cb)
2071{
2072 struct hns3_desc *desc;
2073 int truesize, size;
2074 int last_offset;
2075 bool twobufs;
2076
2077 twobufs = ((PAGE_SIZE < 8192) &&
2078 hnae_buf_size(ring) == HNS3_BUFFER_SIZE_2048);
2079
2080 desc = &ring->desc[ring->next_to_clean];
2081 size = le16_to_cpu(desc->rx.size);
2082
Peng Lif8d291f2018-03-10 11:29:26 +08002083 truesize = hnae_buf_size(ring);
2084
2085 if (!twobufs)
Salil76ad4f02017-08-02 16:59:45 +01002086 last_offset = hnae_page_size(ring) - hnae_buf_size(ring);
Salil76ad4f02017-08-02 16:59:45 +01002087
2088 skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
Peng Lif8d291f2018-03-10 11:29:26 +08002089 size - pull_len, truesize);
Salil76ad4f02017-08-02 16:59:45 +01002090
2091 /* Avoid re-using remote pages,flag default unreuse */
2092 if (unlikely(page_to_nid(desc_cb->priv) != numa_node_id()))
2093 return;
2094
2095 if (twobufs) {
2096 /* If we are only owner of page we can reuse it */
2097 if (likely(page_count(desc_cb->priv) == 1)) {
2098 /* Flip page offset to other buffer */
2099 desc_cb->page_offset ^= truesize;
2100
2101 desc_cb->reuse_flag = 1;
2102 /* bump ref count on page before it is given*/
2103 get_page(desc_cb->priv);
2104 }
2105 return;
2106 }
2107
2108 /* Move offset up to the next cache line */
2109 desc_cb->page_offset += truesize;
2110
2111 if (desc_cb->page_offset <= last_offset) {
2112 desc_cb->reuse_flag = 1;
2113 /* Bump ref count on page before it is given*/
2114 get_page(desc_cb->priv);
2115 }
2116}
2117
2118static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2119 struct hns3_desc *desc)
2120{
2121 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2122 int l3_type, l4_type;
2123 u32 bd_base_info;
2124 int ol4_type;
2125 u32 l234info;
2126
2127 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2128 l234info = le32_to_cpu(desc->rx.l234_info);
2129
2130 skb->ip_summed = CHECKSUM_NONE;
2131
2132 skb_checksum_none_assert(skb);
2133
2134 if (!(netdev->features & NETIF_F_RXCSUM))
2135 return;
2136
2137 /* check if hardware has done checksum */
2138 if (!hnae_get_bit(bd_base_info, HNS3_RXD_L3L4P_B))
2139 return;
2140
2141 if (unlikely(hnae_get_bit(l234info, HNS3_RXD_L3E_B) ||
2142 hnae_get_bit(l234info, HNS3_RXD_L4E_B) ||
2143 hnae_get_bit(l234info, HNS3_RXD_OL3E_B) ||
2144 hnae_get_bit(l234info, HNS3_RXD_OL4E_B))) {
2145 netdev_err(netdev, "L3/L4 error pkt\n");
2146 u64_stats_update_begin(&ring->syncp);
2147 ring->stats.l3l4_csum_err++;
2148 u64_stats_update_end(&ring->syncp);
2149
2150 return;
2151 }
2152
2153 l3_type = hnae_get_field(l234info, HNS3_RXD_L3ID_M,
2154 HNS3_RXD_L3ID_S);
2155 l4_type = hnae_get_field(l234info, HNS3_RXD_L4ID_M,
2156 HNS3_RXD_L4ID_S);
2157
2158 ol4_type = hnae_get_field(l234info, HNS3_RXD_OL4ID_M, HNS3_RXD_OL4ID_S);
2159 switch (ol4_type) {
2160 case HNS3_OL4_TYPE_MAC_IN_UDP:
2161 case HNS3_OL4_TYPE_NVGRE:
2162 skb->csum_level = 1;
2163 case HNS3_OL4_TYPE_NO_TUN:
2164 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2165 if (l3_type == HNS3_L3_TYPE_IPV4 ||
2166 (l3_type == HNS3_L3_TYPE_IPV6 &&
2167 (l4_type == HNS3_L4_TYPE_UDP ||
2168 l4_type == HNS3_L4_TYPE_TCP ||
2169 l4_type == HNS3_L4_TYPE_SCTP)))
2170 skb->ip_summed = CHECKSUM_UNNECESSARY;
2171 break;
2172 }
2173}
2174
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002175static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2176{
2177 napi_gro_receive(&ring->tqp_vector->napi, skb);
2178}
2179
Salil76ad4f02017-08-02 16:59:45 +01002180static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
2181 struct sk_buff **out_skb, int *out_bnum)
2182{
2183 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2184 struct hns3_desc_cb *desc_cb;
2185 struct hns3_desc *desc;
2186 struct sk_buff *skb;
2187 unsigned char *va;
2188 u32 bd_base_info;
2189 int pull_len;
2190 u32 l234info;
2191 int length;
2192 int bnum;
2193
2194 desc = &ring->desc[ring->next_to_clean];
2195 desc_cb = &ring->desc_cb[ring->next_to_clean];
2196
2197 prefetch(desc);
2198
2199 length = le16_to_cpu(desc->rx.pkt_len);
2200 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2201 l234info = le32_to_cpu(desc->rx.l234_info);
2202
2203 /* Check valid BD */
2204 if (!hnae_get_bit(bd_base_info, HNS3_RXD_VLD_B))
2205 return -EFAULT;
2206
2207 va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
2208
2209 /* Prefetch first cache line of first page
2210 * Idea is to cache few bytes of the header of the packet. Our L1 Cache
2211 * line size is 64B so need to prefetch twice to make it 128B. But in
2212 * actual we can have greater size of caches with 128B Level 1 cache
2213 * lines. In such a case, single fetch would suffice to cache in the
2214 * relevant part of the header.
2215 */
2216 prefetch(va);
2217#if L1_CACHE_BYTES < 128
2218 prefetch(va + L1_CACHE_BYTES);
2219#endif
2220
2221 skb = *out_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2222 HNS3_RX_HEAD_SIZE);
2223 if (unlikely(!skb)) {
2224 netdev_err(netdev, "alloc rx skb fail\n");
2225
2226 u64_stats_update_begin(&ring->syncp);
2227 ring->stats.sw_err_cnt++;
2228 u64_stats_update_end(&ring->syncp);
2229
2230 return -ENOMEM;
2231 }
2232
2233 prefetchw(skb->data);
2234
Peng Li9699cff2017-12-22 12:21:48 +08002235 /* Based on hw strategy, the tag offloaded will be stored at
2236 * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2237 * in one layer tag case.
2238 */
2239 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2240 u16 vlan_tag;
2241
2242 vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2243 if (!(vlan_tag & VLAN_VID_MASK))
2244 vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2245 if (vlan_tag & VLAN_VID_MASK)
2246 __vlan_hwaccel_put_tag(skb,
2247 htons(ETH_P_8021Q),
2248 vlan_tag);
2249 }
2250
Salil76ad4f02017-08-02 16:59:45 +01002251 bnum = 1;
2252 if (length <= HNS3_RX_HEAD_SIZE) {
2253 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2254
2255 /* We can reuse buffer as-is, just make sure it is local */
2256 if (likely(page_to_nid(desc_cb->priv) == numa_node_id()))
2257 desc_cb->reuse_flag = 1;
2258 else /* This page cannot be reused so discard it */
2259 put_page(desc_cb->priv);
2260
2261 ring_ptr_move_fw(ring, next_to_clean);
2262 } else {
2263 u64_stats_update_begin(&ring->syncp);
2264 ring->stats.seg_pkt_cnt++;
2265 u64_stats_update_end(&ring->syncp);
2266
2267 pull_len = hns3_nic_get_headlen(va, l234info,
2268 HNS3_RX_HEAD_SIZE);
2269 memcpy(__skb_put(skb, pull_len), va,
2270 ALIGN(pull_len, sizeof(long)));
2271
2272 hns3_nic_reuse_page(skb, 0, ring, pull_len, desc_cb);
2273 ring_ptr_move_fw(ring, next_to_clean);
2274
2275 while (!hnae_get_bit(bd_base_info, HNS3_RXD_FE_B)) {
2276 desc = &ring->desc[ring->next_to_clean];
2277 desc_cb = &ring->desc_cb[ring->next_to_clean];
2278 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2279 hns3_nic_reuse_page(skb, bnum, ring, 0, desc_cb);
2280 ring_ptr_move_fw(ring, next_to_clean);
2281 bnum++;
2282 }
2283 }
2284
2285 *out_bnum = bnum;
2286
2287 if (unlikely(!hnae_get_bit(bd_base_info, HNS3_RXD_VLD_B))) {
2288 netdev_err(netdev, "no valid bd,%016llx,%016llx\n",
2289 ((u64 *)desc)[0], ((u64 *)desc)[1]);
2290 u64_stats_update_begin(&ring->syncp);
2291 ring->stats.non_vld_descs++;
2292 u64_stats_update_end(&ring->syncp);
2293
2294 dev_kfree_skb_any(skb);
2295 return -EINVAL;
2296 }
2297
2298 if (unlikely((!desc->rx.pkt_len) ||
2299 hnae_get_bit(l234info, HNS3_RXD_TRUNCAT_B))) {
2300 netdev_err(netdev, "truncated pkt\n");
2301 u64_stats_update_begin(&ring->syncp);
2302 ring->stats.err_pkt_len++;
2303 u64_stats_update_end(&ring->syncp);
2304
2305 dev_kfree_skb_any(skb);
2306 return -EFAULT;
2307 }
2308
2309 if (unlikely(hnae_get_bit(l234info, HNS3_RXD_L2E_B))) {
2310 netdev_err(netdev, "L2 error pkt\n");
2311 u64_stats_update_begin(&ring->syncp);
2312 ring->stats.l2_err++;
2313 u64_stats_update_end(&ring->syncp);
2314
2315 dev_kfree_skb_any(skb);
2316 return -EFAULT;
2317 }
2318
2319 u64_stats_update_begin(&ring->syncp);
2320 ring->stats.rx_pkts++;
2321 ring->stats.rx_bytes += skb->len;
2322 u64_stats_update_end(&ring->syncp);
2323
2324 ring->tqp_vector->rx_group.total_bytes += skb->len;
2325
2326 hns3_rx_checksum(ring, skb, desc);
2327 return 0;
2328}
2329
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002330int hns3_clean_rx_ring(
2331 struct hns3_enet_ring *ring, int budget,
2332 void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
Salil76ad4f02017-08-02 16:59:45 +01002333{
2334#define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2335 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2336 int recv_pkts, recv_bds, clean_count, err;
2337 int unused_count = hns3_desc_unused(ring);
2338 struct sk_buff *skb = NULL;
2339 int num, bnum = 0;
2340
2341 num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
2342 rmb(); /* Make sure num taken effect before the other data is touched */
2343
2344 recv_pkts = 0, recv_bds = 0, clean_count = 0;
2345 num -= unused_count;
2346
2347 while (recv_pkts < budget && recv_bds < num) {
2348 /* Reuse or realloc buffers */
2349 if (clean_count + unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
2350 hns3_nic_alloc_rx_buffers(ring,
2351 clean_count + unused_count);
2352 clean_count = 0;
2353 unused_count = hns3_desc_unused(ring);
2354 }
2355
2356 /* Poll one pkt */
2357 err = hns3_handle_rx_bd(ring, &skb, &bnum);
2358 if (unlikely(!skb)) /* This fault cannot be repaired */
2359 goto out;
2360
2361 recv_bds += bnum;
2362 clean_count += bnum;
2363 if (unlikely(err)) { /* Do jump the err */
2364 recv_pkts++;
2365 continue;
2366 }
2367
2368 /* Do update ip stack process */
2369 skb->protocol = eth_type_trans(skb, netdev);
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002370 rx_fn(ring, skb);
Salil76ad4f02017-08-02 16:59:45 +01002371
2372 recv_pkts++;
2373 }
2374
2375out:
2376 /* Make all data has been write before submit */
2377 if (clean_count + unused_count > 0)
2378 hns3_nic_alloc_rx_buffers(ring,
2379 clean_count + unused_count);
2380
2381 return recv_pkts;
2382}
2383
2384static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
2385{
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002386 struct hns3_enet_tqp_vector *tqp_vector =
2387 ring_group->ring->tqp_vector;
Salil76ad4f02017-08-02 16:59:45 +01002388 enum hns3_flow_level_range new_flow_level;
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002389 int packets_per_msecs;
2390 int bytes_per_msecs;
2391 u32 time_passed_ms;
Salil76ad4f02017-08-02 16:59:45 +01002392 u16 new_int_gl;
Salil76ad4f02017-08-02 16:59:45 +01002393
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002394 if (!ring_group->coal.int_gl || !tqp_vector->last_jiffies)
Salil76ad4f02017-08-02 16:59:45 +01002395 return false;
2396
2397 if (ring_group->total_packets == 0) {
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002398 ring_group->coal.int_gl = HNS3_INT_GL_50K;
2399 ring_group->coal.flow_level = HNS3_FLOW_LOW;
Salil76ad4f02017-08-02 16:59:45 +01002400 return true;
2401 }
2402
2403 /* Simple throttlerate management
2404 * 0-10MB/s lower (50000 ints/s)
2405 * 10-20MB/s middle (20000 ints/s)
2406 * 20-1249MB/s high (18000 ints/s)
2407 * > 40000pps ultra (8000 ints/s)
2408 */
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002409 new_flow_level = ring_group->coal.flow_level;
2410 new_int_gl = ring_group->coal.int_gl;
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002411 time_passed_ms =
2412 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);
2413
2414 if (!time_passed_ms)
2415 return false;
2416
2417 do_div(ring_group->total_packets, time_passed_ms);
2418 packets_per_msecs = ring_group->total_packets;
2419
2420 do_div(ring_group->total_bytes, time_passed_ms);
2421 bytes_per_msecs = ring_group->total_bytes;
2422
2423#define HNS3_RX_LOW_BYTE_RATE 10000
2424#define HNS3_RX_MID_BYTE_RATE 20000
Salil76ad4f02017-08-02 16:59:45 +01002425
2426 switch (new_flow_level) {
2427 case HNS3_FLOW_LOW:
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002428 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)
Salil76ad4f02017-08-02 16:59:45 +01002429 new_flow_level = HNS3_FLOW_MID;
2430 break;
2431 case HNS3_FLOW_MID:
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002432 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)
Salil76ad4f02017-08-02 16:59:45 +01002433 new_flow_level = HNS3_FLOW_HIGH;
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002434 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)
Salil76ad4f02017-08-02 16:59:45 +01002435 new_flow_level = HNS3_FLOW_LOW;
2436 break;
2437 case HNS3_FLOW_HIGH:
2438 case HNS3_FLOW_ULTRA:
2439 default:
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002440 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)
Salil76ad4f02017-08-02 16:59:45 +01002441 new_flow_level = HNS3_FLOW_MID;
2442 break;
2443 }
2444
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002445#define HNS3_RX_ULTRA_PACKET_RATE 40
2446
2447 if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&
2448 &tqp_vector->rx_group == ring_group)
Salil76ad4f02017-08-02 16:59:45 +01002449 new_flow_level = HNS3_FLOW_ULTRA;
2450
2451 switch (new_flow_level) {
2452 case HNS3_FLOW_LOW:
2453 new_int_gl = HNS3_INT_GL_50K;
2454 break;
2455 case HNS3_FLOW_MID:
2456 new_int_gl = HNS3_INT_GL_20K;
2457 break;
2458 case HNS3_FLOW_HIGH:
2459 new_int_gl = HNS3_INT_GL_18K;
2460 break;
2461 case HNS3_FLOW_ULTRA:
2462 new_int_gl = HNS3_INT_GL_8K;
2463 break;
2464 default:
2465 break;
2466 }
2467
2468 ring_group->total_bytes = 0;
2469 ring_group->total_packets = 0;
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002470 ring_group->coal.flow_level = new_flow_level;
2471 if (new_int_gl != ring_group->coal.int_gl) {
2472 ring_group->coal.int_gl = new_int_gl;
Salil76ad4f02017-08-02 16:59:45 +01002473 return true;
2474 }
2475 return false;
2476}
2477
2478static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
2479{
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002480 struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
2481 struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
2482 bool rx_update, tx_update;
Salil76ad4f02017-08-02 16:59:45 +01002483
Fuyun Liangcd9d1872018-03-21 15:49:25 +08002484 if (tqp_vector->int_adapt_down > 0) {
2485 tqp_vector->int_adapt_down--;
2486 return;
2487 }
2488
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002489 if (rx_group->coal.gl_adapt_enable) {
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002490 rx_update = hns3_get_new_int_gl(rx_group);
2491 if (rx_update)
2492 hns3_set_vector_coalesce_rx_gl(tqp_vector,
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002493 rx_group->coal.int_gl);
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002494 }
2495
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002496 if (tx_group->coal.gl_adapt_enable) {
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002497 tx_update = hns3_get_new_int_gl(&tqp_vector->tx_group);
2498 if (tx_update)
2499 hns3_set_vector_coalesce_tx_gl(tqp_vector,
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002500 tx_group->coal.int_gl);
Salil76ad4f02017-08-02 16:59:45 +01002501 }
Fuyun Liangcd9d1872018-03-21 15:49:25 +08002502
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002503 tqp_vector->last_jiffies = jiffies;
Fuyun Liangcd9d1872018-03-21 15:49:25 +08002504 tqp_vector->int_adapt_down = HNS3_INT_ADAPT_DOWN_START;
Salil76ad4f02017-08-02 16:59:45 +01002505}
2506
2507static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
2508{
2509 struct hns3_enet_ring *ring;
2510 int rx_pkt_total = 0;
2511
2512 struct hns3_enet_tqp_vector *tqp_vector =
2513 container_of(napi, struct hns3_enet_tqp_vector, napi);
2514 bool clean_complete = true;
2515 int rx_budget;
2516
2517 /* Since the actual Tx work is minimal, we can give the Tx a larger
2518 * budget and be more aggressive about cleaning up the Tx descriptors.
2519 */
2520 hns3_for_each_ring(ring, tqp_vector->tx_group) {
2521 if (!hns3_clean_tx_ring(ring, budget))
2522 clean_complete = false;
2523 }
2524
2525 /* make sure rx ring budget not smaller than 1 */
2526 rx_budget = max(budget / tqp_vector->num_tqps, 1);
2527
2528 hns3_for_each_ring(ring, tqp_vector->rx_group) {
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002529 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
2530 hns3_rx_skb);
Salil76ad4f02017-08-02 16:59:45 +01002531
2532 if (rx_cleaned >= rx_budget)
2533 clean_complete = false;
2534
2535 rx_pkt_total += rx_cleaned;
2536 }
2537
2538 tqp_vector->rx_group.total_packets += rx_pkt_total;
2539
2540 if (!clean_complete)
2541 return budget;
2542
2543 napi_complete(napi);
2544 hns3_update_new_int_gl(tqp_vector);
2545 hns3_mask_vector_irq(tqp_vector, 1);
2546
2547 return rx_pkt_total;
2548}
2549
2550static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2551 struct hnae3_ring_chain_node *head)
2552{
2553 struct pci_dev *pdev = tqp_vector->handle->pdev;
2554 struct hnae3_ring_chain_node *cur_chain = head;
2555 struct hnae3_ring_chain_node *chain;
2556 struct hns3_enet_ring *tx_ring;
2557 struct hns3_enet_ring *rx_ring;
2558
2559 tx_ring = tqp_vector->tx_group.ring;
2560 if (tx_ring) {
2561 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
2562 hnae_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2563 HNAE3_RING_TYPE_TX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002564 hnae_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2565 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
Salil76ad4f02017-08-02 16:59:45 +01002566
2567 cur_chain->next = NULL;
2568
2569 while (tx_ring->next) {
2570 tx_ring = tx_ring->next;
2571
2572 chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
2573 GFP_KERNEL);
2574 if (!chain)
2575 return -ENOMEM;
2576
2577 cur_chain->next = chain;
2578 chain->tqp_index = tx_ring->tqp->tqp_index;
2579 hnae_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2580 HNAE3_RING_TYPE_TX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002581 hnae_set_field(chain->int_gl_idx,
2582 HNAE3_RING_GL_IDX_M,
2583 HNAE3_RING_GL_IDX_S,
2584 HNAE3_RING_GL_TX);
Salil76ad4f02017-08-02 16:59:45 +01002585
2586 cur_chain = chain;
2587 }
2588 }
2589
2590 rx_ring = tqp_vector->rx_group.ring;
2591 if (!tx_ring && rx_ring) {
2592 cur_chain->next = NULL;
2593 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
2594 hnae_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2595 HNAE3_RING_TYPE_RX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002596 hnae_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2597 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
Salil76ad4f02017-08-02 16:59:45 +01002598
2599 rx_ring = rx_ring->next;
2600 }
2601
2602 while (rx_ring) {
2603 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
2604 if (!chain)
2605 return -ENOMEM;
2606
2607 cur_chain->next = chain;
2608 chain->tqp_index = rx_ring->tqp->tqp_index;
2609 hnae_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2610 HNAE3_RING_TYPE_RX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002611 hnae_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2612 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
2613
Salil76ad4f02017-08-02 16:59:45 +01002614 cur_chain = chain;
2615
2616 rx_ring = rx_ring->next;
2617 }
2618
2619 return 0;
2620}
2621
2622static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2623 struct hnae3_ring_chain_node *head)
2624{
2625 struct pci_dev *pdev = tqp_vector->handle->pdev;
2626 struct hnae3_ring_chain_node *chain_tmp, *chain;
2627
2628 chain = head->next;
2629
2630 while (chain) {
2631 chain_tmp = chain->next;
2632 devm_kfree(&pdev->dev, chain);
2633 chain = chain_tmp;
2634 }
2635}
2636
2637static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
2638 struct hns3_enet_ring *ring)
2639{
2640 ring->next = group->ring;
2641 group->ring = ring;
2642
2643 group->count++;
2644}
2645
2646static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
2647{
2648 struct hnae3_ring_chain_node vector_ring_chain;
2649 struct hnae3_handle *h = priv->ae_handle;
2650 struct hns3_enet_tqp_vector *tqp_vector;
Yunsheng Lindd38c722018-03-09 10:37:02 +08002651 int ret = 0;
2652 u16 i;
2653
2654 for (i = 0; i < priv->vector_num; i++) {
2655 tqp_vector = &priv->tqp_vector[i];
2656 hns3_vector_gl_rl_init_hw(tqp_vector, priv);
2657 tqp_vector->num_tqps = 0;
2658 }
2659
2660 for (i = 0; i < h->kinfo.num_tqps; i++) {
2661 u16 vector_i = i % priv->vector_num;
2662 u16 tqp_num = h->kinfo.num_tqps;
2663
2664 tqp_vector = &priv->tqp_vector[vector_i];
2665
2666 hns3_add_ring_to_group(&tqp_vector->tx_group,
2667 priv->ring_data[i].ring);
2668
2669 hns3_add_ring_to_group(&tqp_vector->rx_group,
2670 priv->ring_data[i + tqp_num].ring);
2671
2672 priv->ring_data[i].ring->tqp_vector = tqp_vector;
2673 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
2674 tqp_vector->num_tqps++;
2675 }
2676
2677 for (i = 0; i < priv->vector_num; i++) {
2678 tqp_vector = &priv->tqp_vector[i];
2679
2680 tqp_vector->rx_group.total_bytes = 0;
2681 tqp_vector->rx_group.total_packets = 0;
2682 tqp_vector->tx_group.total_bytes = 0;
2683 tqp_vector->tx_group.total_packets = 0;
2684 tqp_vector->handle = h;
2685
2686 ret = hns3_get_vector_ring_chain(tqp_vector,
2687 &vector_ring_chain);
2688 if (ret)
2689 return ret;
2690
2691 ret = h->ae_algo->ops->map_ring_to_vector(h,
2692 tqp_vector->vector_irq, &vector_ring_chain);
2693
2694 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
2695
2696 if (ret)
2697 return ret;
2698
2699 netif_napi_add(priv->netdev, &tqp_vector->napi,
2700 hns3_nic_common_poll, NAPI_POLL_WEIGHT);
2701 }
2702
2703 return 0;
2704}
2705
2706static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
2707{
2708 struct hnae3_handle *h = priv->ae_handle;
2709 struct hns3_enet_tqp_vector *tqp_vector;
Salil76ad4f02017-08-02 16:59:45 +01002710 struct hnae3_vector_info *vector;
2711 struct pci_dev *pdev = h->pdev;
2712 u16 tqp_num = h->kinfo.num_tqps;
2713 u16 vector_num;
2714 int ret = 0;
2715 u16 i;
2716
2717 /* RSS size, cpu online and vector_num should be the same */
2718 /* Should consider 2p/4p later */
2719 vector_num = min_t(u16, num_online_cpus(), tqp_num);
2720 vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
2721 GFP_KERNEL);
2722 if (!vector)
2723 return -ENOMEM;
2724
2725 vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
2726
2727 priv->vector_num = vector_num;
2728 priv->tqp_vector = (struct hns3_enet_tqp_vector *)
2729 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
2730 GFP_KERNEL);
Yunsheng Lindd38c722018-03-09 10:37:02 +08002731 if (!priv->tqp_vector) {
2732 ret = -ENOMEM;
2733 goto out;
Salil76ad4f02017-08-02 16:59:45 +01002734 }
2735
Yunsheng Lindd38c722018-03-09 10:37:02 +08002736 for (i = 0; i < priv->vector_num; i++) {
Salil76ad4f02017-08-02 16:59:45 +01002737 tqp_vector = &priv->tqp_vector[i];
Yunsheng Lindd38c722018-03-09 10:37:02 +08002738 tqp_vector->idx = i;
2739 tqp_vector->mask_addr = vector[i].io_addr;
2740 tqp_vector->vector_irq = vector[i].vector;
Fuyun Liang5fd47892018-01-12 16:23:11 +08002741 hns3_vector_gl_rl_init(tqp_vector, priv);
Salil76ad4f02017-08-02 16:59:45 +01002742 }
2743
2744out:
2745 devm_kfree(&pdev->dev, vector);
2746 return ret;
2747}
2748
Yunsheng Lindd38c722018-03-09 10:37:02 +08002749static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
2750{
2751 group->ring = NULL;
2752 group->count = 0;
2753}
2754
Salil76ad4f02017-08-02 16:59:45 +01002755static int hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
2756{
2757 struct hnae3_ring_chain_node vector_ring_chain;
2758 struct hnae3_handle *h = priv->ae_handle;
2759 struct hns3_enet_tqp_vector *tqp_vector;
Salil76ad4f02017-08-02 16:59:45 +01002760 int i, ret;
2761
2762 for (i = 0; i < priv->vector_num; i++) {
2763 tqp_vector = &priv->tqp_vector[i];
2764
2765 ret = hns3_get_vector_ring_chain(tqp_vector,
2766 &vector_ring_chain);
2767 if (ret)
2768 return ret;
2769
2770 ret = h->ae_algo->ops->unmap_ring_from_vector(h,
2771 tqp_vector->vector_irq, &vector_ring_chain);
2772 if (ret)
2773 return ret;
2774
Yunsheng Lin0d3e6632018-03-09 10:37:01 +08002775 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
2776 if (ret)
2777 return ret;
2778
Salil76ad4f02017-08-02 16:59:45 +01002779 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
2780
2781 if (priv->tqp_vector[i].irq_init_flag == HNS3_VECTOR_INITED) {
2782 (void)irq_set_affinity_hint(
2783 priv->tqp_vector[i].vector_irq,
2784 NULL);
qumingguangae064e62017-11-02 20:45:22 +08002785 free_irq(priv->tqp_vector[i].vector_irq,
2786 &priv->tqp_vector[i]);
Salil76ad4f02017-08-02 16:59:45 +01002787 }
2788
2789 priv->ring_data[i].ring->irq_init_flag = HNS3_VECTOR_NOT_INITED;
Yunsheng Lindd38c722018-03-09 10:37:02 +08002790 hns3_clear_ring_group(&tqp_vector->rx_group);
2791 hns3_clear_ring_group(&tqp_vector->tx_group);
Salil76ad4f02017-08-02 16:59:45 +01002792 netif_napi_del(&priv->tqp_vector[i].napi);
2793 }
2794
Yunsheng Lindd38c722018-03-09 10:37:02 +08002795 return 0;
2796}
Salil76ad4f02017-08-02 16:59:45 +01002797
Yunsheng Lindd38c722018-03-09 10:37:02 +08002798static int hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
2799{
2800 struct hnae3_handle *h = priv->ae_handle;
2801 struct pci_dev *pdev = h->pdev;
2802 int i, ret;
2803
2804 for (i = 0; i < priv->vector_num; i++) {
2805 struct hns3_enet_tqp_vector *tqp_vector;
2806
2807 tqp_vector = &priv->tqp_vector[i];
2808 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
2809 if (ret)
2810 return ret;
2811 }
2812
2813 devm_kfree(&pdev->dev, priv->tqp_vector);
Salil76ad4f02017-08-02 16:59:45 +01002814 return 0;
2815}
2816
2817static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
2818 int ring_type)
2819{
2820 struct hns3_nic_ring_data *ring_data = priv->ring_data;
2821 int queue_num = priv->ae_handle->kinfo.num_tqps;
2822 struct pci_dev *pdev = priv->ae_handle->pdev;
2823 struct hns3_enet_ring *ring;
2824
2825 ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
2826 if (!ring)
2827 return -ENOMEM;
2828
2829 if (ring_type == HNAE3_RING_TYPE_TX) {
2830 ring_data[q->tqp_index].ring = ring;
Lipeng66b44732017-10-23 19:51:05 +08002831 ring_data[q->tqp_index].queue_index = q->tqp_index;
Salil76ad4f02017-08-02 16:59:45 +01002832 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
2833 } else {
2834 ring_data[q->tqp_index + queue_num].ring = ring;
Lipeng66b44732017-10-23 19:51:05 +08002835 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
Salil76ad4f02017-08-02 16:59:45 +01002836 ring->io_base = q->io_base;
2837 }
2838
2839 hnae_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
2840
Salil76ad4f02017-08-02 16:59:45 +01002841 ring->tqp = q;
2842 ring->desc = NULL;
2843 ring->desc_cb = NULL;
2844 ring->dev = priv->dev;
2845 ring->desc_dma_addr = 0;
2846 ring->buf_size = q->buf_size;
2847 ring->desc_num = q->desc_num;
2848 ring->next_to_use = 0;
2849 ring->next_to_clean = 0;
2850
2851 return 0;
2852}
2853
2854static int hns3_queue_to_ring(struct hnae3_queue *tqp,
2855 struct hns3_nic_priv *priv)
2856{
2857 int ret;
2858
2859 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
2860 if (ret)
2861 return ret;
2862
2863 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
2864 if (ret)
2865 return ret;
2866
2867 return 0;
2868}
2869
2870static int hns3_get_ring_config(struct hns3_nic_priv *priv)
2871{
2872 struct hnae3_handle *h = priv->ae_handle;
2873 struct pci_dev *pdev = h->pdev;
2874 int i, ret;
2875
2876 priv->ring_data = devm_kzalloc(&pdev->dev, h->kinfo.num_tqps *
2877 sizeof(*priv->ring_data) * 2,
2878 GFP_KERNEL);
2879 if (!priv->ring_data)
2880 return -ENOMEM;
2881
2882 for (i = 0; i < h->kinfo.num_tqps; i++) {
2883 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
2884 if (ret)
2885 goto err;
2886 }
2887
2888 return 0;
2889err:
2890 devm_kfree(&pdev->dev, priv->ring_data);
2891 return ret;
2892}
2893
Peng Li09f2af62017-12-22 12:21:41 +08002894static void hns3_put_ring_config(struct hns3_nic_priv *priv)
2895{
2896 struct hnae3_handle *h = priv->ae_handle;
2897 int i;
2898
2899 for (i = 0; i < h->kinfo.num_tqps; i++) {
2900 devm_kfree(priv->dev, priv->ring_data[i].ring);
2901 devm_kfree(priv->dev,
2902 priv->ring_data[i + h->kinfo.num_tqps].ring);
2903 }
2904 devm_kfree(priv->dev, priv->ring_data);
2905}
2906
Salil76ad4f02017-08-02 16:59:45 +01002907static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
2908{
2909 int ret;
2910
2911 if (ring->desc_num <= 0 || ring->buf_size <= 0)
2912 return -EINVAL;
2913
2914 ring->desc_cb = kcalloc(ring->desc_num, sizeof(ring->desc_cb[0]),
2915 GFP_KERNEL);
2916 if (!ring->desc_cb) {
2917 ret = -ENOMEM;
2918 goto out;
2919 }
2920
2921 ret = hns3_alloc_desc(ring);
2922 if (ret)
2923 goto out_with_desc_cb;
2924
2925 if (!HNAE3_IS_TX_RING(ring)) {
2926 ret = hns3_alloc_ring_buffers(ring);
2927 if (ret)
2928 goto out_with_desc;
2929 }
2930
2931 return 0;
2932
2933out_with_desc:
2934 hns3_free_desc(ring);
2935out_with_desc_cb:
2936 kfree(ring->desc_cb);
2937 ring->desc_cb = NULL;
2938out:
2939 return ret;
2940}
2941
2942static void hns3_fini_ring(struct hns3_enet_ring *ring)
2943{
2944 hns3_free_desc(ring);
2945 kfree(ring->desc_cb);
2946 ring->desc_cb = NULL;
2947 ring->next_to_clean = 0;
2948 ring->next_to_use = 0;
2949}
2950
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +08002951static int hns3_buf_size2type(u32 buf_size)
Salil76ad4f02017-08-02 16:59:45 +01002952{
2953 int bd_size_type;
2954
2955 switch (buf_size) {
2956 case 512:
2957 bd_size_type = HNS3_BD_SIZE_512_TYPE;
2958 break;
2959 case 1024:
2960 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
2961 break;
2962 case 2048:
2963 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
2964 break;
2965 case 4096:
2966 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
2967 break;
2968 default:
2969 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
2970 }
2971
2972 return bd_size_type;
2973}
2974
2975static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
2976{
2977 dma_addr_t dma = ring->desc_dma_addr;
2978 struct hnae3_queue *q = ring->tqp;
2979
2980 if (!HNAE3_IS_TX_RING(ring)) {
2981 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG,
2982 (u32)dma);
2983 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
2984 (u32)((dma >> 31) >> 1));
2985
2986 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
2987 hns3_buf_size2type(ring->buf_size));
2988 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
2989 ring->desc_num / 8 - 1);
2990
2991 } else {
2992 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
2993 (u32)dma);
2994 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
2995 (u32)((dma >> 31) >> 1));
2996
2997 hns3_write_dev(q, HNS3_RING_TX_RING_BD_LEN_REG,
2998 hns3_buf_size2type(ring->buf_size));
2999 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
3000 ring->desc_num / 8 - 1);
3001 }
3002}
3003
Lipeng5668abd2017-10-10 16:42:04 +08003004int hns3_init_all_ring(struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +01003005{
3006 struct hnae3_handle *h = priv->ae_handle;
3007 int ring_num = h->kinfo.num_tqps * 2;
3008 int i, j;
3009 int ret;
3010
3011 for (i = 0; i < ring_num; i++) {
3012 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
3013 if (ret) {
3014 dev_err(priv->dev,
3015 "Alloc ring memory fail! ret=%d\n", ret);
3016 goto out_when_alloc_ring_memory;
3017 }
3018
3019 hns3_init_ring_hw(priv->ring_data[i].ring);
3020
3021 u64_stats_init(&priv->ring_data[i].ring->syncp);
3022 }
3023
3024 return 0;
3025
3026out_when_alloc_ring_memory:
3027 for (j = i - 1; j >= 0; j--)
Lipengee83f772017-10-10 16:42:03 +08003028 hns3_fini_ring(priv->ring_data[j].ring);
Salil76ad4f02017-08-02 16:59:45 +01003029
3030 return -ENOMEM;
3031}
3032
Lipeng5668abd2017-10-10 16:42:04 +08003033int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +01003034{
3035 struct hnae3_handle *h = priv->ae_handle;
3036 int i;
3037
3038 for (i = 0; i < h->kinfo.num_tqps; i++) {
3039 if (h->ae_algo->ops->reset_queue)
3040 h->ae_algo->ops->reset_queue(h, i);
3041
3042 hns3_fini_ring(priv->ring_data[i].ring);
3043 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
3044 }
Salil76ad4f02017-08-02 16:59:45 +01003045 return 0;
3046}
3047
3048/* Set mac addr if it is configured. or leave it to the AE driver */
3049static void hns3_init_mac_addr(struct net_device *netdev)
3050{
3051 struct hns3_nic_priv *priv = netdev_priv(netdev);
3052 struct hnae3_handle *h = priv->ae_handle;
3053 u8 mac_addr_temp[ETH_ALEN];
3054
3055 if (h->ae_algo->ops->get_mac_addr) {
3056 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
3057 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
3058 }
3059
3060 /* Check if the MAC address is valid, if not get a random one */
3061 if (!is_valid_ether_addr(netdev->dev_addr)) {
3062 eth_hw_addr_random(netdev);
3063 dev_warn(priv->dev, "using random MAC address %pM\n",
3064 netdev->dev_addr);
Salil76ad4f02017-08-02 16:59:45 +01003065 }
Lipeng139e8792017-09-19 17:17:13 +01003066
3067 if (h->ae_algo->ops->set_mac_addr)
Fuyun Liang590980552018-03-10 11:29:22 +08003068 h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
Lipeng139e8792017-09-19 17:17:13 +01003069
Salil76ad4f02017-08-02 16:59:45 +01003070}
3071
3072static void hns3_nic_set_priv_ops(struct net_device *netdev)
3073{
3074 struct hns3_nic_priv *priv = netdev_priv(netdev);
3075
3076 if ((netdev->features & NETIF_F_TSO) ||
3077 (netdev->features & NETIF_F_TSO6)) {
3078 priv->ops.fill_desc = hns3_fill_desc_tso;
3079 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
3080 } else {
3081 priv->ops.fill_desc = hns3_fill_desc;
3082 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
3083 }
3084}
3085
3086static int hns3_client_init(struct hnae3_handle *handle)
3087{
3088 struct pci_dev *pdev = handle->pdev;
3089 struct hns3_nic_priv *priv;
3090 struct net_device *netdev;
3091 int ret;
3092
3093 netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv),
Peng Li678335a12018-03-08 19:41:54 +08003094 hns3_get_max_available_channels(handle));
Salil76ad4f02017-08-02 16:59:45 +01003095 if (!netdev)
3096 return -ENOMEM;
3097
3098 priv = netdev_priv(netdev);
3099 priv->dev = &pdev->dev;
3100 priv->netdev = netdev;
3101 priv->ae_handle = handle;
Salil Mehta6d4c3982018-03-22 14:28:52 +00003102 priv->ae_handle->reset_level = HNAE3_NONE_RESET;
3103 priv->ae_handle->last_reset_time = jiffies;
Lipengf8fa222c2017-11-02 20:45:20 +08003104 priv->tx_timeout_count = 0;
Salil76ad4f02017-08-02 16:59:45 +01003105
3106 handle->kinfo.netdev = netdev;
3107 handle->priv = (void *)priv;
3108
3109 hns3_init_mac_addr(netdev);
3110
3111 hns3_set_default_feature(netdev);
3112
3113 netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3114 netdev->priv_flags |= IFF_UNICAST_FLT;
3115 netdev->netdev_ops = &hns3_nic_netdev_ops;
3116 SET_NETDEV_DEV(netdev, &pdev->dev);
3117 hns3_ethtool_set_ops(netdev);
3118 hns3_nic_set_priv_ops(netdev);
3119
3120 /* Carrier off reporting is important to ethtool even BEFORE open */
3121 netif_carrier_off(netdev);
3122
3123 ret = hns3_get_ring_config(priv);
3124 if (ret) {
3125 ret = -ENOMEM;
3126 goto out_get_ring_cfg;
3127 }
3128
Yunsheng Lindd38c722018-03-09 10:37:02 +08003129 ret = hns3_nic_alloc_vector_data(priv);
3130 if (ret) {
3131 ret = -ENOMEM;
3132 goto out_alloc_vector_data;
3133 }
3134
Salil76ad4f02017-08-02 16:59:45 +01003135 ret = hns3_nic_init_vector_data(priv);
3136 if (ret) {
3137 ret = -ENOMEM;
3138 goto out_init_vector_data;
3139 }
3140
3141 ret = hns3_init_all_ring(priv);
3142 if (ret) {
3143 ret = -ENOMEM;
3144 goto out_init_ring_data;
3145 }
3146
3147 ret = register_netdev(netdev);
3148 if (ret) {
3149 dev_err(priv->dev, "probe register netdev fail!\n");
3150 goto out_reg_netdev_fail;
3151 }
3152
Yunsheng Lin986743d2017-09-27 09:45:30 +08003153 hns3_dcbnl_setup(handle);
3154
Salila8e8b7f2017-08-21 17:05:24 +01003155 /* MTU range: (ETH_MIN_MTU(kernel default) - 9706) */
3156 netdev->max_mtu = HNS3_MAX_MTU - (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
3157
Salil76ad4f02017-08-02 16:59:45 +01003158 return ret;
3159
3160out_reg_netdev_fail:
3161out_init_ring_data:
3162 (void)hns3_nic_uninit_vector_data(priv);
Salil76ad4f02017-08-02 16:59:45 +01003163out_init_vector_data:
Yunsheng Lindd38c722018-03-09 10:37:02 +08003164 hns3_nic_dealloc_vector_data(priv);
3165out_alloc_vector_data:
3166 priv->ring_data = NULL;
Salil76ad4f02017-08-02 16:59:45 +01003167out_get_ring_cfg:
3168 priv->ae_handle = NULL;
3169 free_netdev(netdev);
3170 return ret;
3171}
3172
3173static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
3174{
3175 struct net_device *netdev = handle->kinfo.netdev;
3176 struct hns3_nic_priv *priv = netdev_priv(netdev);
3177 int ret;
3178
3179 if (netdev->reg_state != NETREG_UNINITIALIZED)
3180 unregister_netdev(netdev);
3181
3182 ret = hns3_nic_uninit_vector_data(priv);
3183 if (ret)
3184 netdev_err(netdev, "uninit vector error\n");
3185
Yunsheng Lindd38c722018-03-09 10:37:02 +08003186 ret = hns3_nic_dealloc_vector_data(priv);
3187 if (ret)
3188 netdev_err(netdev, "dealloc vector error\n");
3189
Salil76ad4f02017-08-02 16:59:45 +01003190 ret = hns3_uninit_all_ring(priv);
3191 if (ret)
3192 netdev_err(netdev, "uninit ring error\n");
3193
Yunsheng Linec777892018-03-09 10:37:00 +08003194 hns3_put_ring_config(priv);
3195
Salil76ad4f02017-08-02 16:59:45 +01003196 priv->ring_data = NULL;
3197
3198 free_netdev(netdev);
3199}
3200
3201static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
3202{
3203 struct net_device *netdev = handle->kinfo.netdev;
3204
3205 if (!netdev)
3206 return;
3207
3208 if (linkup) {
3209 netif_carrier_on(netdev);
3210 netif_tx_wake_all_queues(netdev);
3211 netdev_info(netdev, "link up\n");
3212 } else {
3213 netif_carrier_off(netdev);
3214 netif_tx_stop_all_queues(netdev);
3215 netdev_info(netdev, "link down\n");
3216 }
3217}
3218
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003219static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
3220{
3221 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3222 struct net_device *ndev = kinfo->netdev;
Colin Ian King075cfdd2017-09-29 20:51:23 +01003223 bool if_running;
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003224 int ret;
3225 u8 i;
3226
3227 if (tc > HNAE3_MAX_TC)
3228 return -EINVAL;
3229
3230 if (!ndev)
3231 return -ENODEV;
3232
Colin Ian King075cfdd2017-09-29 20:51:23 +01003233 if_running = netif_running(ndev);
3234
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003235 ret = netdev_set_num_tc(ndev, tc);
3236 if (ret)
3237 return ret;
3238
3239 if (if_running) {
3240 (void)hns3_nic_net_stop(ndev);
3241 msleep(100);
3242 }
3243
3244 ret = (kinfo->dcb_ops && kinfo->dcb_ops->map_update) ?
3245 kinfo->dcb_ops->map_update(handle) : -EOPNOTSUPP;
3246 if (ret)
3247 goto err_out;
3248
3249 if (tc <= 1) {
3250 netdev_reset_tc(ndev);
3251 goto out;
3252 }
3253
3254 for (i = 0; i < HNAE3_MAX_TC; i++) {
3255 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3256
3257 if (tc_info->enable)
3258 netdev_set_tc_queue(ndev,
3259 tc_info->tc,
3260 tc_info->tqp_count,
3261 tc_info->tqp_offset);
3262 }
3263
3264 for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) {
3265 netdev_set_prio_tc_map(ndev, i,
3266 kinfo->prio_tc[i]);
3267 }
3268
3269out:
3270 ret = hns3_nic_set_real_num_queue(ndev);
3271
3272err_out:
3273 if (if_running)
3274 (void)hns3_nic_net_open(ndev);
3275
3276 return ret;
3277}
3278
Lipengbb6b94a2017-11-02 20:45:21 +08003279static void hns3_recover_hw_addr(struct net_device *ndev)
3280{
3281 struct netdev_hw_addr_list *list;
3282 struct netdev_hw_addr *ha, *tmp;
3283
3284 /* go through and sync uc_addr entries to the device */
3285 list = &ndev->uc;
3286 list_for_each_entry_safe(ha, tmp, &list->list, list)
3287 hns3_nic_uc_sync(ndev, ha->addr);
3288
3289 /* go through and sync mc_addr entries to the device */
3290 list = &ndev->mc;
3291 list_for_each_entry_safe(ha, tmp, &list->list, list)
3292 hns3_nic_mc_sync(ndev, ha->addr);
3293}
3294
3295static void hns3_drop_skb_data(struct hns3_enet_ring *ring, struct sk_buff *skb)
3296{
3297 dev_kfree_skb_any(skb);
3298}
3299
3300static void hns3_clear_all_ring(struct hnae3_handle *h)
3301{
3302 struct net_device *ndev = h->kinfo.netdev;
3303 struct hns3_nic_priv *priv = netdev_priv(ndev);
3304 u32 i;
3305
3306 for (i = 0; i < h->kinfo.num_tqps; i++) {
3307 struct netdev_queue *dev_queue;
3308 struct hns3_enet_ring *ring;
3309
3310 ring = priv->ring_data[i].ring;
3311 hns3_clean_tx_ring(ring, ring->desc_num);
3312 dev_queue = netdev_get_tx_queue(ndev,
3313 priv->ring_data[i].queue_index);
3314 netdev_tx_reset_queue(dev_queue);
3315
3316 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
3317 hns3_clean_rx_ring(ring, ring->desc_num, hns3_drop_skb_data);
3318 }
3319}
3320
3321static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
3322{
3323 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3324 struct net_device *ndev = kinfo->netdev;
3325
3326 if (!netif_running(ndev))
3327 return -EIO;
3328
3329 return hns3_nic_net_stop(ndev);
3330}
3331
3332static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
3333{
3334 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
Lipengbb6b94a2017-11-02 20:45:21 +08003335 int ret = 0;
3336
3337 if (netif_running(kinfo->netdev)) {
3338 ret = hns3_nic_net_up(kinfo->netdev);
3339 if (ret) {
3340 netdev_err(kinfo->netdev,
3341 "hns net up fail, ret=%d!\n", ret);
3342 return ret;
3343 }
Salil Mehta6d4c3982018-03-22 14:28:52 +00003344 handle->last_reset_time = jiffies;
Lipengbb6b94a2017-11-02 20:45:21 +08003345 }
3346
3347 return ret;
3348}
3349
3350static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
3351{
3352 struct net_device *netdev = handle->kinfo.netdev;
3353 struct hns3_nic_priv *priv = netdev_priv(netdev);
3354 int ret;
3355
Lipengbb6b94a2017-11-02 20:45:21 +08003356 hns3_init_mac_addr(netdev);
3357 hns3_nic_set_rx_mode(netdev);
3358 hns3_recover_hw_addr(netdev);
3359
Yunsheng Lin681ec392018-03-21 15:49:22 +08003360 /* Hardware table is only clear when pf resets */
3361 if (!(handle->flags & HNAE3_SUPPORT_VF))
3362 hns3_restore_vlan(netdev);
3363
Lipengbb6b94a2017-11-02 20:45:21 +08003364 /* Carrier off reporting is important to ethtool even BEFORE open */
3365 netif_carrier_off(netdev);
3366
3367 ret = hns3_get_ring_config(priv);
3368 if (ret)
3369 return ret;
3370
3371 ret = hns3_nic_init_vector_data(priv);
3372 if (ret)
3373 return ret;
3374
3375 ret = hns3_init_all_ring(priv);
3376 if (ret) {
3377 hns3_nic_uninit_vector_data(priv);
3378 priv->ring_data = NULL;
3379 }
3380
3381 return ret;
3382}
3383
3384static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
3385{
3386 struct net_device *netdev = handle->kinfo.netdev;
3387 struct hns3_nic_priv *priv = netdev_priv(netdev);
3388 int ret;
3389
3390 hns3_clear_all_ring(handle);
3391
3392 ret = hns3_nic_uninit_vector_data(priv);
3393 if (ret) {
3394 netdev_err(netdev, "uninit vector error\n");
3395 return ret;
3396 }
3397
3398 ret = hns3_uninit_all_ring(priv);
3399 if (ret)
3400 netdev_err(netdev, "uninit ring error\n");
3401
Yunsheng Linec777892018-03-09 10:37:00 +08003402 hns3_put_ring_config(priv);
3403
Lipengbb6b94a2017-11-02 20:45:21 +08003404 priv->ring_data = NULL;
3405
3406 return ret;
3407}
3408
3409static int hns3_reset_notify(struct hnae3_handle *handle,
3410 enum hnae3_reset_notify_type type)
3411{
3412 int ret = 0;
3413
3414 switch (type) {
3415 case HNAE3_UP_CLIENT:
Salil Mehtae1586242018-01-19 15:20:53 +00003416 ret = hns3_reset_notify_up_enet(handle);
3417 break;
Lipengbb6b94a2017-11-02 20:45:21 +08003418 case HNAE3_DOWN_CLIENT:
3419 ret = hns3_reset_notify_down_enet(handle);
3420 break;
3421 case HNAE3_INIT_CLIENT:
3422 ret = hns3_reset_notify_init_enet(handle);
3423 break;
3424 case HNAE3_UNINIT_CLIENT:
3425 ret = hns3_reset_notify_uninit_enet(handle);
3426 break;
3427 default:
3428 break;
3429 }
3430
3431 return ret;
3432}
3433
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003434static void hns3_restore_coal(struct hns3_nic_priv *priv,
3435 struct hns3_enet_coalesce *tx,
3436 struct hns3_enet_coalesce *rx)
3437{
3438 u16 vector_num = priv->vector_num;
3439 int i;
3440
3441 for (i = 0; i < vector_num; i++) {
3442 memcpy(&priv->tqp_vector[i].tx_group.coal, tx,
3443 sizeof(struct hns3_enet_coalesce));
3444 memcpy(&priv->tqp_vector[i].rx_group.coal, rx,
3445 sizeof(struct hns3_enet_coalesce));
3446 }
3447}
3448
3449static int hns3_modify_tqp_num(struct net_device *netdev, u16 new_tqp_num,
3450 struct hns3_enet_coalesce *tx,
3451 struct hns3_enet_coalesce *rx)
Peng Li09f2af62017-12-22 12:21:41 +08003452{
3453 struct hns3_nic_priv *priv = netdev_priv(netdev);
3454 struct hnae3_handle *h = hns3_get_handle(netdev);
3455 int ret;
3456
3457 ret = h->ae_algo->ops->set_channels(h, new_tqp_num);
3458 if (ret)
3459 return ret;
3460
3461 ret = hns3_get_ring_config(priv);
3462 if (ret)
3463 return ret;
3464
Yunsheng Lindd38c722018-03-09 10:37:02 +08003465 ret = hns3_nic_alloc_vector_data(priv);
3466 if (ret)
3467 goto err_alloc_vector;
3468
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003469 hns3_restore_coal(priv, tx, rx);
3470
Peng Li09f2af62017-12-22 12:21:41 +08003471 ret = hns3_nic_init_vector_data(priv);
3472 if (ret)
3473 goto err_uninit_vector;
3474
3475 ret = hns3_init_all_ring(priv);
3476 if (ret)
3477 goto err_put_ring;
3478
3479 return 0;
3480
3481err_put_ring:
3482 hns3_put_ring_config(priv);
3483err_uninit_vector:
3484 hns3_nic_uninit_vector_data(priv);
Yunsheng Lindd38c722018-03-09 10:37:02 +08003485err_alloc_vector:
3486 hns3_nic_dealloc_vector_data(priv);
Peng Li09f2af62017-12-22 12:21:41 +08003487 return ret;
3488}
3489
3490static int hns3_adjust_tqps_num(u8 num_tc, u32 new_tqp_num)
3491{
3492 return (new_tqp_num / num_tc) * num_tc;
3493}
3494
3495int hns3_set_channels(struct net_device *netdev,
3496 struct ethtool_channels *ch)
3497{
3498 struct hns3_nic_priv *priv = netdev_priv(netdev);
3499 struct hnae3_handle *h = hns3_get_handle(netdev);
3500 struct hnae3_knic_private_info *kinfo = &h->kinfo;
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003501 struct hns3_enet_coalesce tx_coal, rx_coal;
Peng Li09f2af62017-12-22 12:21:41 +08003502 bool if_running = netif_running(netdev);
3503 u32 new_tqp_num = ch->combined_count;
3504 u16 org_tqp_num;
3505 int ret;
3506
3507 if (ch->rx_count || ch->tx_count)
3508 return -EINVAL;
3509
Peng Li678335a12018-03-08 19:41:54 +08003510 if (new_tqp_num > hns3_get_max_available_channels(h) ||
Peng Li09f2af62017-12-22 12:21:41 +08003511 new_tqp_num < kinfo->num_tc) {
3512 dev_err(&netdev->dev,
3513 "Change tqps fail, the tqp range is from %d to %d",
3514 kinfo->num_tc,
Peng Li678335a12018-03-08 19:41:54 +08003515 hns3_get_max_available_channels(h));
Peng Li09f2af62017-12-22 12:21:41 +08003516 return -EINVAL;
3517 }
3518
3519 new_tqp_num = hns3_adjust_tqps_num(kinfo->num_tc, new_tqp_num);
3520 if (kinfo->num_tqps == new_tqp_num)
3521 return 0;
3522
3523 if (if_running)
Fuyun Liang20e4bf982018-03-10 11:29:24 +08003524 hns3_nic_net_stop(netdev);
Peng Li09f2af62017-12-22 12:21:41 +08003525
3526 hns3_clear_all_ring(h);
3527
3528 ret = hns3_nic_uninit_vector_data(priv);
3529 if (ret) {
3530 dev_err(&netdev->dev,
3531 "Unbind vector with tqp fail, nothing is changed");
3532 goto open_netdev;
3533 }
3534
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003535 /* Changing the tqp num may also change the vector num,
3536 * ethtool only support setting and querying one coal
3537 * configuation for now, so save the vector 0' coal
3538 * configuation here in order to restore it.
3539 */
3540 memcpy(&tx_coal, &priv->tqp_vector[0].tx_group.coal,
3541 sizeof(struct hns3_enet_coalesce));
3542 memcpy(&rx_coal, &priv->tqp_vector[0].rx_group.coal,
3543 sizeof(struct hns3_enet_coalesce));
3544
Yunsheng Lindd38c722018-03-09 10:37:02 +08003545 hns3_nic_dealloc_vector_data(priv);
3546
Peng Li09f2af62017-12-22 12:21:41 +08003547 hns3_uninit_all_ring(priv);
Yunsheng Linec777892018-03-09 10:37:00 +08003548 hns3_put_ring_config(priv);
Peng Li09f2af62017-12-22 12:21:41 +08003549
3550 org_tqp_num = h->kinfo.num_tqps;
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003551 ret = hns3_modify_tqp_num(netdev, new_tqp_num, &tx_coal, &rx_coal);
Peng Li09f2af62017-12-22 12:21:41 +08003552 if (ret) {
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003553 ret = hns3_modify_tqp_num(netdev, org_tqp_num,
3554 &tx_coal, &rx_coal);
Peng Li09f2af62017-12-22 12:21:41 +08003555 if (ret) {
3556 /* If revert to old tqp failed, fatal error occurred */
3557 dev_err(&netdev->dev,
3558 "Revert to old tqp num fail, ret=%d", ret);
3559 return ret;
3560 }
3561 dev_info(&netdev->dev,
3562 "Change tqp num fail, Revert to old tqp num");
3563 }
3564
3565open_netdev:
3566 if (if_running)
Fuyun Liang20e4bf982018-03-10 11:29:24 +08003567 hns3_nic_net_open(netdev);
Peng Li09f2af62017-12-22 12:21:41 +08003568
3569 return ret;
3570}
3571
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +08003572static const struct hnae3_client_ops client_ops = {
Salil76ad4f02017-08-02 16:59:45 +01003573 .init_instance = hns3_client_init,
3574 .uninit_instance = hns3_client_uninit,
3575 .link_status_change = hns3_link_status_change,
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003576 .setup_tc = hns3_client_setup_tc,
Lipengbb6b94a2017-11-02 20:45:21 +08003577 .reset_notify = hns3_reset_notify,
Salil76ad4f02017-08-02 16:59:45 +01003578};
3579
3580/* hns3_init_module - Driver registration routine
3581 * hns3_init_module is the first routine called when the driver is
3582 * loaded. All it does is register with the PCI subsystem.
3583 */
3584static int __init hns3_init_module(void)
3585{
3586 int ret;
3587
3588 pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
3589 pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
3590
3591 client.type = HNAE3_CLIENT_KNIC;
3592 snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
3593 hns3_driver_name);
3594
3595 client.ops = &client_ops;
3596
3597 ret = hnae3_register_client(&client);
3598 if (ret)
3599 return ret;
3600
3601 ret = pci_register_driver(&hns3_driver);
3602 if (ret)
3603 hnae3_unregister_client(&client);
3604
3605 return ret;
3606}
3607module_init(hns3_init_module);
3608
3609/* hns3_exit_module - Driver exit cleanup routine
3610 * hns3_exit_module is called just before the driver is removed
3611 * from memory.
3612 */
3613static void __exit hns3_exit_module(void)
3614{
3615 pci_unregister_driver(&hns3_driver);
3616 hnae3_unregister_client(&client);
3617}
3618module_exit(hns3_exit_module);
3619
3620MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
3621MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
3622MODULE_LICENSE("GPL");
3623MODULE_ALIAS("pci:hns-nic");