blob: d3ddfa067e7d02e18e34e361ba40869da3528703 [file] [log] [blame]
Bryan Wud7df69f2013-01-02 15:53:51 -08001/dts-v1/;
2
Stephen Warren1bd0bd42012-10-17 16:38:21 -06003#include "tegra30.dtsi"
Bryan Wud7df69f2013-01-02 15:53:51 -08004
5/ {
6 model = "NVIDIA Tegra30 Beaver evaluation board";
7 compatible = "nvidia,beaver", "nvidia,tegra30";
8
Stephen Warren553c0a22013-12-09 14:43:59 -07009 aliases {
10 rtc0 = "/i2c@7000d000/tps65911@2d";
11 rtc1 = "/rtc@7000e000";
12 };
13
Bryan Wud7df69f2013-01-02 15:53:51 -080014 memory {
Stephen Warren30022bb2013-05-13 09:47:31 +000015 reg = <0x80000000 0x7ff00000>;
Bryan Wud7df69f2013-01-02 15:53:51 -080016 };
17
Stephen Warren58ecb232013-11-25 17:53:16 -070018 pcie-controller@00003000 {
Thierry Redingbb034cb2013-08-09 16:49:28 +020019 status = "okay";
Thierry Redingcca86142014-05-28 16:49:12 +020020
21 avdd-pexa-supply = <&ldo1_reg>;
22 vdd-pexa-supply = <&ldo1_reg>;
23 avdd-pexb-supply = <&ldo1_reg>;
24 vdd-pexb-supply = <&ldo1_reg>;
25 avdd-pex-pll-supply = <&ldo1_reg>;
26 avdd-plle-supply = <&ldo1_reg>;
27 vddio-pex-ctl-supply = <&sys_3v3_reg>;
28 hvdd-pex-supply = <&sys_3v3_pexs_reg>;
29
30 /* deprecated */
Thierry Redingbb034cb2013-08-09 16:49:28 +020031 pex-clk-supply = <&sys_3v3_pexs_reg>;
32 vdd-supply = <&ldo1_reg>;
33 avdd-supply = <&ldo2_reg>;
34
35 pci@1,0 {
36 status = "okay";
Stephen Warren44fefab2013-08-09 16:49:29 +020037 nvidia,num-lanes = <2>;
Thierry Redingbb034cb2013-08-09 16:49:28 +020038 };
39
40 pci@2,0 {
Stephen Warren44fefab2013-08-09 16:49:29 +020041 nvidia,num-lanes = <2>;
Thierry Redingbb034cb2013-08-09 16:49:28 +020042 };
43
44 pci@3,0 {
Stephen Warren44fefab2013-08-09 16:49:29 +020045 status = "okay";
46 nvidia,num-lanes = <2>;
Thierry Redingbb034cb2013-08-09 16:49:28 +020047 };
48 };
49
Stephen Warren58ecb232013-11-25 17:53:16 -070050 host1x@50000000 {
51 hdmi@54280000 {
Thierry Reding9bd80b42013-08-12 17:49:03 +020052 status = "okay";
53
Thierry Reding597eb8e2014-04-25 17:44:49 +020054 hdmi-supply = <&vdd_5v0_hdmi>;
Thierry Reding9bd80b42013-08-12 17:49:03 +020055 vdd-supply = <&sys_3v3_reg>;
56 pll-supply = <&vio_reg>;
57
58 nvidia,hpd-gpio =
59 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
60 nvidia,ddc-i2c-bus = <&hdmiddc>;
61 };
62 };
63
Stephen Warren58ecb232013-11-25 17:53:16 -070064 pinmux@70000868 {
Bryan Wud7df69f2013-01-02 15:53:51 -080065 pinctrl-names = "default";
66 pinctrl-0 = <&state_default>;
67
68 state_default: pinmux {
69 sdmmc1_clk_pz0 {
70 nvidia,pins = "sdmmc1_clk_pz0";
71 nvidia,function = "sdmmc1";
Laxman Dewangana47c6622013-12-05 16:14:09 +053072 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
73 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Bryan Wud7df69f2013-01-02 15:53:51 -080074 };
75 sdmmc1_cmd_pz1 {
76 nvidia,pins = "sdmmc1_cmd_pz1",
77 "sdmmc1_dat0_py7",
78 "sdmmc1_dat1_py6",
79 "sdmmc1_dat2_py5",
80 "sdmmc1_dat3_py4";
81 nvidia,function = "sdmmc1";
Laxman Dewangana47c6622013-12-05 16:14:09 +053082 nvidia,pull = <TEGRA_PIN_PULL_UP>;
83 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Bryan Wud7df69f2013-01-02 15:53:51 -080084 };
85 sdmmc3_clk_pa6 {
86 nvidia,pins = "sdmmc3_clk_pa6";
87 nvidia,function = "sdmmc3";
Laxman Dewangana47c6622013-12-05 16:14:09 +053088 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
89 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Bryan Wud7df69f2013-01-02 15:53:51 -080090 };
91 sdmmc3_cmd_pa7 {
92 nvidia,pins = "sdmmc3_cmd_pa7",
93 "sdmmc3_dat0_pb7",
94 "sdmmc3_dat1_pb6",
95 "sdmmc3_dat2_pb5",
96 "sdmmc3_dat3_pb4";
97 nvidia,function = "sdmmc3";
Laxman Dewangana47c6622013-12-05 16:14:09 +053098 nvidia,pull = <TEGRA_PIN_PULL_UP>;
99 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800100 };
101 sdmmc4_clk_pcc4 {
102 nvidia,pins = "sdmmc4_clk_pcc4",
103 "sdmmc4_rst_n_pcc3";
104 nvidia,function = "sdmmc4";
Laxman Dewangana47c6622013-12-05 16:14:09 +0530105 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
106 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800107 };
108 sdmmc4_dat0_paa0 {
109 nvidia,pins = "sdmmc4_dat0_paa0",
110 "sdmmc4_dat1_paa1",
111 "sdmmc4_dat2_paa2",
112 "sdmmc4_dat3_paa3",
113 "sdmmc4_dat4_paa4",
114 "sdmmc4_dat5_paa5",
115 "sdmmc4_dat6_paa6",
116 "sdmmc4_dat7_paa7";
117 nvidia,function = "sdmmc4";
Laxman Dewangana47c6622013-12-05 16:14:09 +0530118 nvidia,pull = <TEGRA_PIN_PULL_UP>;
119 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800120 };
121 dap2_fs_pa2 {
122 nvidia,pins = "dap2_fs_pa2",
123 "dap2_sclk_pa3",
124 "dap2_din_pa4",
125 "dap2_dout_pa5";
126 nvidia,function = "i2s1";
Laxman Dewangana47c6622013-12-05 16:14:09 +0530127 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
128 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800129 };
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300130 pex_l1_prsnt_n_pdd4 {
131 nvidia,pins = "pex_l1_prsnt_n_pdd4",
132 "pex_l1_clkreq_n_pdd6";
Laxman Dewangana47c6622013-12-05 16:14:09 +0530133 nvidia,pull = <TEGRA_PIN_PULL_UP>;
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300134 };
Bryan Wud7df69f2013-01-02 15:53:51 -0800135 sdio3 {
136 nvidia,pins = "drive_sdio3";
Laxman Dewangana47c6622013-12-05 16:14:09 +0530137 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
138 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800139 nvidia,pull-down-strength = <46>;
140 nvidia,pull-up-strength = <42>;
141 nvidia,slew-rate-rising = <1>;
142 nvidia,slew-rate-falling = <1>;
143 };
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300144 gpv {
145 nvidia,pins = "drive_gpv";
146 nvidia,pull-up-strength = <16>;
147 };
Bryan Wud7df69f2013-01-02 15:53:51 -0800148 };
149 };
150
151 serial@70006000 {
152 status = "okay";
Bryan Wud7df69f2013-01-02 15:53:51 -0800153 };
154
155 i2c@7000c000 {
156 status = "okay";
157 clock-frequency = <100000>;
158 };
159
160 i2c@7000c400 {
161 status = "okay";
162 clock-frequency = <100000>;
163 };
164
165 i2c@7000c500 {
166 status = "okay";
167 clock-frequency = <100000>;
168 };
169
Thierry Reding9bd80b42013-08-12 17:49:03 +0200170 hdmiddc: i2c@7000c700 {
Bryan Wud7df69f2013-01-02 15:53:51 -0800171 status = "okay";
172 clock-frequency = <100000>;
173 };
174
175 i2c@7000d000 {
176 status = "okay";
177 clock-frequency = <100000>;
178
Stephen Warren58ecb232013-11-25 17:53:16 -0700179 rt5640: rt5640@1c {
Stephen Warren23037bb2013-03-27 16:53:20 -0600180 compatible = "realtek,rt5640";
181 reg = <0x1c>;
182 interrupt-parent = <&gpio>;
183 interrupts = <TEGRA_GPIO(X, 3) GPIO_ACTIVE_HIGH>;
184 realtek,ldo1-en-gpios =
185 <&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_HIGH>;
186 };
187
Bryan Wud7df69f2013-01-02 15:53:51 -0800188 pmic: tps65911@2d {
189 compatible = "ti,tps65911";
190 reg = <0x2d>;
191
Stephen Warren6cecf912013-02-13 12:51:51 -0700192 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800193 #interrupt-cells = <2>;
194 interrupt-controller;
195
196 ti,system-power-controller;
197
198 #gpio-cells = <2>;
199 gpio-controller;
200
201 vcc1-supply = <&vdd_5v_in_reg>;
202 vcc2-supply = <&vdd_5v_in_reg>;
203 vcc3-supply = <&vio_reg>;
204 vcc4-supply = <&vdd_5v_in_reg>;
205 vcc5-supply = <&vdd_5v_in_reg>;
206 vcc6-supply = <&vdd2_reg>;
207 vcc7-supply = <&vdd_5v_in_reg>;
208 vccio-supply = <&vdd_5v_in_reg>;
209
210 regulators {
211 #address-cells = <1>;
212 #size-cells = <0>;
213
214 vdd1_reg: vdd1 {
215 regulator-name = "vddio_ddr_1v2";
216 regulator-min-microvolt = <1200000>;
217 regulator-max-microvolt = <1200000>;
218 regulator-always-on;
219 };
220
221 vdd2_reg: vdd2 {
222 regulator-name = "vdd_1v5_gen";
223 regulator-min-microvolt = <1500000>;
224 regulator-max-microvolt = <1500000>;
225 regulator-always-on;
226 };
227
228 vddctrl_reg: vddctrl {
229 regulator-name = "vdd_cpu,vdd_sys";
230 regulator-min-microvolt = <1000000>;
231 regulator-max-microvolt = <1000000>;
232 regulator-always-on;
233 };
234
235 vio_reg: vio {
236 regulator-name = "vdd_1v8_gen";
237 regulator-min-microvolt = <1800000>;
238 regulator-max-microvolt = <1800000>;
239 regulator-always-on;
240 };
241
242 ldo1_reg: ldo1 {
243 regulator-name = "vdd_pexa,vdd_pexb";
244 regulator-min-microvolt = <1050000>;
245 regulator-max-microvolt = <1050000>;
246 };
247
248 ldo2_reg: ldo2 {
249 regulator-name = "vdd_sata,avdd_plle";
250 regulator-min-microvolt = <1050000>;
251 regulator-max-microvolt = <1050000>;
252 };
253
254 /* LDO3 is not connected to anything */
255
256 ldo4_reg: ldo4 {
257 regulator-name = "vdd_rtc";
258 regulator-min-microvolt = <1200000>;
259 regulator-max-microvolt = <1200000>;
260 regulator-always-on;
261 };
262
263 ldo5_reg: ldo5 {
264 regulator-name = "vddio_sdmmc,avdd_vdac";
265 regulator-min-microvolt = <3300000>;
266 regulator-max-microvolt = <3300000>;
267 regulator-always-on;
268 };
269
270 ldo6_reg: ldo6 {
271 regulator-name = "avdd_dsi_csi,pwrdet_mipi";
272 regulator-min-microvolt = <1200000>;
273 regulator-max-microvolt = <1200000>;
274 };
275
276 ldo7_reg: ldo7 {
277 regulator-name = "vdd_pllm,x,u,a_p_c_s";
278 regulator-min-microvolt = <1200000>;
279 regulator-max-microvolt = <1200000>;
280 regulator-always-on;
281 };
282
283 ldo8_reg: ldo8 {
284 regulator-name = "vdd_ddr_hs";
285 regulator-min-microvolt = <1000000>;
286 regulator-max-microvolt = <1000000>;
287 regulator-always-on;
288 };
289 };
290 };
Stephen Warren57899052013-11-26 14:43:45 -0700291
292 tps62361@60 {
293 compatible = "ti,tps62361";
294 reg = <0x60>;
295
296 regulator-name = "tps62361-vout";
297 regulator-min-microvolt = <500000>;
298 regulator-max-microvolt = <1500000>;
299 regulator-boot-on;
300 regulator-always-on;
301 ti,vsel0-state-high;
302 ti,vsel1-state-high;
303 };
Bryan Wud7df69f2013-01-02 15:53:51 -0800304 };
305
306 spi@7000da00 {
307 status = "okay";
308 spi-max-frequency = <25000000>;
309 spi-flash@1 {
310 compatible = "winbond,w25q32";
311 reg = <1>;
312 spi-max-frequency = <20000000>;
313 };
314 };
315
Stephen Warren58ecb232013-11-25 17:53:16 -0700316 pmc@7000e400 {
Bryan Wud7df69f2013-01-02 15:53:51 -0800317 status = "okay";
318 nvidia,invert-interrupt;
Joseph Lo47d2d632013-08-12 17:40:07 +0800319 nvidia,suspend-mode = <1>;
Joseph Loa44a0192013-04-03 19:31:52 +0800320 nvidia,cpu-pwr-good-time = <2000>;
321 nvidia,cpu-pwr-off-time = <200>;
322 nvidia,core-pwr-good-time = <3845 3845>;
323 nvidia,core-pwr-off-time = <0>;
324 nvidia,core-power-req-active-high;
325 nvidia,sys-clock-req-active-high;
Bryan Wud7df69f2013-01-02 15:53:51 -0800326 };
327
Stephen Warren57899052013-11-26 14:43:45 -0700328 ahub@70080000 {
329 i2s@70080400 {
330 status = "okay";
331 };
332 };
333
Bryan Wud7df69f2013-01-02 15:53:51 -0800334 sdhci@78000000 {
335 status = "okay";
Stephen Warren3325f1b2013-02-12 17:25:15 -0700336 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
337 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
338 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800339 bus-width = <4>;
340 };
341
342 sdhci@78000600 {
343 status = "okay";
344 bus-width = <8>;
Joseph Lo7a2617a2013-04-03 14:34:39 -0600345 non-removable;
Bryan Wud7df69f2013-01-02 15:53:51 -0800346 };
347
Eric Brower4c696502013-12-19 18:08:53 -0800348 usb@7d004000 {
349 status = "okay";
350 };
351
352 phy2: usb-phy@7d004000 {
353 vbus-supply = <&sys_3v3_reg>;
354 status = "okay";
355 };
356
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300357 usb@7d008000 {
358 status = "okay";
359 };
360
361 usb-phy@7d008000 {
362 vbus-supply = <&usb3_vbus_reg>;
363 status = "okay";
364 };
365
Joseph Lo7021d122013-04-03 19:31:27 +0800366 clocks {
367 compatible = "simple-bus";
368 #address-cells = <1>;
369 #size-cells = <0>;
370
Stephen Warren58ecb232013-11-25 17:53:16 -0700371 clk32k_in: clock@0 {
Joseph Lo7021d122013-04-03 19:31:27 +0800372 compatible = "fixed-clock";
373 reg=<0>;
374 #clock-cells = <0>;
375 clock-frequency = <32768>;
376 };
377 };
378
Stephen Warren57899052013-11-26 14:43:45 -0700379 gpio-leds {
380 compatible = "gpio-leds";
381
382 gpled1 {
383 label = "LED1"; /* CR5A1 (blue) */
384 gpios = <&gpio TEGRA_GPIO(L, 1) GPIO_ACTIVE_HIGH>;
385 };
386 gpled2 {
387 label = "LED2"; /* CR4A2 (green) */
388 gpios = <&gpio TEGRA_GPIO(L, 0) GPIO_ACTIVE_HIGH>;
389 };
390 };
391
Bryan Wud7df69f2013-01-02 15:53:51 -0800392 regulators {
393 compatible = "simple-bus";
394 #address-cells = <1>;
395 #size-cells = <0>;
396
397 vdd_5v_in_reg: regulator@0 {
398 compatible = "regulator-fixed";
399 reg = <0>;
400 regulator-name = "vdd_5v_in";
401 regulator-min-microvolt = <5000000>;
402 regulator-max-microvolt = <5000000>;
403 regulator-always-on;
404 };
405
406 chargepump_5v_reg: regulator@1 {
407 compatible = "regulator-fixed";
408 reg = <1>;
409 regulator-name = "chargepump_5v";
410 regulator-min-microvolt = <5000000>;
411 regulator-max-microvolt = <5000000>;
412 regulator-boot-on;
413 regulator-always-on;
414 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700415 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800416 };
417
418 ddr_reg: regulator@2 {
419 compatible = "regulator-fixed";
420 reg = <2>;
421 regulator-name = "vdd_ddr";
422 regulator-min-microvolt = <1500000>;
423 regulator-max-microvolt = <1500000>;
424 regulator-always-on;
425 regulator-boot-on;
426 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700427 gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800428 vin-supply = <&vdd_5v_in_reg>;
429 };
430
431 vdd_5v_sata_reg: regulator@3 {
432 compatible = "regulator-fixed";
433 reg = <3>;
434 regulator-name = "vdd_5v_sata";
435 regulator-min-microvolt = <5000000>;
436 regulator-max-microvolt = <5000000>;
437 regulator-always-on;
438 regulator-boot-on;
439 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700440 gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800441 vin-supply = <&vdd_5v_in_reg>;
442 };
443
444 usb1_vbus_reg: regulator@4 {
445 compatible = "regulator-fixed";
446 reg = <4>;
447 regulator-name = "usb1_vbus";
448 regulator-min-microvolt = <5000000>;
449 regulator-max-microvolt = <5000000>;
450 enable-active-high;
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300451 gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800452 gpio-open-drain;
453 vin-supply = <&vdd_5v_in_reg>;
454 };
455
456 usb3_vbus_reg: regulator@5 {
457 compatible = "regulator-fixed";
458 reg = <5>;
459 regulator-name = "usb3_vbus";
460 regulator-min-microvolt = <5000000>;
461 regulator-max-microvolt = <5000000>;
462 enable-active-high;
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300463 gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800464 gpio-open-drain;
465 vin-supply = <&vdd_5v_in_reg>;
466 };
467
468 sys_3v3_reg: regulator@6 {
469 compatible = "regulator-fixed";
470 reg = <6>;
471 regulator-name = "sys_3v3,vdd_3v3_alw";
472 regulator-min-microvolt = <3300000>;
473 regulator-max-microvolt = <3300000>;
474 regulator-always-on;
475 regulator-boot-on;
476 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700477 gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800478 vin-supply = <&vdd_5v_in_reg>;
479 };
480
481 sys_3v3_pexs_reg: regulator@7 {
482 compatible = "regulator-fixed";
483 reg = <7>;
484 regulator-name = "sys_3v3_pexs";
485 regulator-min-microvolt = <3300000>;
486 regulator-max-microvolt = <3300000>;
487 regulator-always-on;
488 regulator-boot-on;
489 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700490 gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800491 vin-supply = <&sys_3v3_reg>;
492 };
Thierry Reding597eb8e2014-04-25 17:44:49 +0200493
494 vdd_5v0_hdmi: regulator@8 {
495 compatible = "regulator-fixed";
496 reg = <8>;
497 regulator-name = "+VDD_5V_HDMI";
498 regulator-min-microvolt = <5000000>;
499 regulator-max-microvolt = <5000000>;
500 regulator-always-on;
501 regulator-boot-on;
502 vin-supply = <&sys_3v3_reg>;
503 };
Bryan Wud7df69f2013-01-02 15:53:51 -0800504 };
Eric Browerb4dd3e02013-05-10 14:40:29 +0000505
Stephen Warren23037bb2013-03-27 16:53:20 -0600506 sound {
507 compatible = "nvidia,tegra-audio-rt5640-beaver",
508 "nvidia,tegra-audio-rt5640";
509 nvidia,model = "NVIDIA Tegra Beaver";
510
511 nvidia,audio-routing =
512 "Headphones", "HPOR",
Stephen Warrenac472282013-08-14 13:54:24 -0600513 "Headphones", "HPOL",
514 "Mic Jack", "MICBIAS1",
515 "IN2P", "Mic Jack";
Stephen Warren23037bb2013-03-27 16:53:20 -0600516
517 nvidia,i2s-controller = <&tegra_i2s1>;
518 nvidia,audio-codec = <&rt5640>;
519
520 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
521
522 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
523 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
524 <&tegra_car TEGRA30_CLK_EXTERN1>;
525 clock-names = "pll_a", "pll_a_out0", "mclk";
526 };
Bryan Wud7df69f2013-01-02 15:53:51 -0800527};