blob: c600fb06e25e6a4798cd7f7f5841593025d3f484 [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040031#include <linux/export.h>
David Howells760285e2012-10-02 18:01:07 +010032#include <drm/drmP.h>
33#include <drm/drm_crtc.h>
34#include <drm/drm_edid.h>
Chris Wilsonea5b2132010-08-04 13:50:23 +010035#include "intel_drv.h"
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/i915_drm.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include "i915_drv.h"
38#include "intel_sdvo_regs.h"
39
Zhenyu Wang14571b42010-03-30 14:06:33 +080040#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
Chris Wilsona0b1c7a2011-09-30 22:56:41 +010043#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
Zhenyu Wang14571b42010-03-30 14:06:33 +080044
45#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
Akshay Joshi0206e352011-08-16 15:34:10 -040046 SDVO_TV_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080047
48#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000049#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080050#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010051#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Chris Wilson52220082011-06-20 14:45:50 +010052#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080053
Jesse Barnes79e53942008-11-07 14:24:08 -080054
Chris Wilson2e88e402010-08-07 11:01:27 +010055static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080056 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
62 "SECAM_60"
63};
64
65#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66
Chris Wilsonea5b2132010-08-04 13:50:23 +010067struct intel_sdvo {
68 struct intel_encoder base;
69
Chris Wilsonf899fc62010-07-20 15:44:45 -070070 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070071 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080072
Chris Wilsone957d772010-09-24 12:52:03 +010073 struct i2c_adapter ddc;
74
Jesse Barnese2f0ba92009-02-02 15:11:52 -080075 /* Register for the SDVO device: SDVOB or SDVOC */
Daniel Vettereef4eac2012-03-23 23:43:35 +010076 uint32_t sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080077
Jesse Barnese2f0ba92009-02-02 15:11:52 -080078 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080080
Jesse Barnese2f0ba92009-02-02 15:11:52 -080081 /*
82 * Capabilities of the SDVO device returned by
83 * i830_sdvo_get_capabilities()
84 */
Jesse Barnes79e53942008-11-07 14:24:08 -080085 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080086
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080088 int pixel_clock_min, pixel_clock_max;
89
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080090 /*
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
93 */
94 uint16_t attached_output;
95
Simon Farnsworthcc68c812011-09-21 17:13:30 +010096 /*
97 * Hotplug activation bits for this device
98 */
Jani Nikula5fa7ac92012-08-29 16:43:58 +030099 uint16_t hotplug_active;
Simon Farnsworthcc68c812011-09-21 17:13:30 +0100100
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800101 /**
Chris Wilsone953fd72011-02-21 22:23:52 +0000102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
104 */
105 uint32_t color_range;
106
107 /**
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800108 * This is set if we're going to treat the device as TV-out.
109 *
110 * While we have these nice friendly flags for output types that ought
111 * to decide this for us, the S-Video output on our HDMI+S-Video card
112 * shows up as RGB1 (VGA).
113 */
114 bool is_tv;
115
Daniel Vettereef4eac2012-03-23 23:43:35 +0100116 /* On different gens SDVOB is at different places. */
117 bool is_sdvob;
118
Zhao Yakuice6feab2009-08-24 13:50:26 +0800119 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100120 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800121
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800122 /**
123 * This is set if we treat the device as HDMI, instead of DVI.
124 */
125 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000126 bool has_hdmi_monitor;
127 bool has_hdmi_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800128
Ma Ling7086c872009-05-13 11:20:06 +0800129 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100130 * This is set if we detect output of sdvo device as LVDS and
131 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800132 */
133 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800134
135 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800136 * This is sdvo fixed pannel mode pointer
137 */
138 struct drm_display_mode *sdvo_lvds_fixed_mode;
139
Eric Anholtc751ce42010-03-25 11:48:48 -0700140 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800141 uint8_t ddc_bus;
Egbert Eiche7518232012-10-13 14:29:31 +0200142
143 /*
144 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
145 */
146 uint8_t dtd_sdvo_flags;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800147};
148
149struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100150 struct intel_connector base;
151
Zhenyu Wang14571b42010-03-30 14:06:33 +0800152 /* Mark the type of connector */
153 uint16_t output_flag;
154
Daniel Vetterc3e5f672012-02-23 17:14:47 +0100155 enum hdmi_force_audio force_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100156
Zhenyu Wang14571b42010-03-30 14:06:33 +0800157 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100158 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800159 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100160 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800161
Zhao Yakuib9219c52009-09-10 15:45:46 +0800162 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100163 struct drm_property *left;
164 struct drm_property *right;
165 struct drm_property *top;
166 struct drm_property *bottom;
167 struct drm_property *hpos;
168 struct drm_property *vpos;
169 struct drm_property *contrast;
170 struct drm_property *saturation;
171 struct drm_property *hue;
172 struct drm_property *sharpness;
173 struct drm_property *flicker_filter;
174 struct drm_property *flicker_filter_adaptive;
175 struct drm_property *flicker_filter_2d;
176 struct drm_property *tv_chroma_filter;
177 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100178 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800179
180 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100181 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800182
183 /* Add variable to record current setting for the above property */
184 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100185
Zhao Yakuib9219c52009-09-10 15:45:46 +0800186 /* this is to get the range of margin.*/
187 u32 max_hscan, max_vscan;
188 u32 max_hpos, cur_hpos;
189 u32 max_vpos, cur_vpos;
190 u32 cur_brightness, max_brightness;
191 u32 cur_contrast, max_contrast;
192 u32 cur_saturation, max_saturation;
193 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100194 u32 cur_sharpness, max_sharpness;
195 u32 cur_flicker_filter, max_flicker_filter;
196 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
197 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
198 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
199 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100200 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800201};
202
Chris Wilson890f3352010-09-14 16:46:59 +0100203static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100204{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100205 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100206}
207
Chris Wilsondf0e9242010-09-09 16:20:55 +0100208static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
209{
210 return container_of(intel_attached_encoder(connector),
211 struct intel_sdvo, base);
212}
213
Chris Wilson615fb932010-08-04 13:50:24 +0100214static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
215{
216 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
217}
218
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800219static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100220intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100221static bool
222intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
223 struct intel_sdvo_connector *intel_sdvo_connector,
224 int type);
225static bool
226intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
227 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800228
Jesse Barnes79e53942008-11-07 14:24:08 -0800229/**
230 * Writes the SDVOB or SDVOC with the given value, but always writes both
231 * SDVOB and SDVOC to work around apparent hardware issues (according to
232 * comments in the BIOS).
233 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100234static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800235{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100236 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800237 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800238 u32 bval = val, cval = val;
239 int i;
240
Chris Wilsonea5b2132010-08-04 13:50:23 +0100241 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
242 I915_WRITE(intel_sdvo->sdvo_reg, val);
243 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800244 return;
245 }
246
Chris Wilsonea5b2132010-08-04 13:50:23 +0100247 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800248 cval = I915_READ(SDVOC);
249 } else {
250 bval = I915_READ(SDVOB);
251 }
252 /*
253 * Write the registers twice for luck. Sometimes,
254 * writing them only once doesn't appear to 'stick'.
255 * The BIOS does this too. Yay, magic
256 */
257 for (i = 0; i < 2; i++)
258 {
259 I915_WRITE(SDVOB, bval);
260 I915_READ(SDVOB);
261 I915_WRITE(SDVOC, cval);
262 I915_READ(SDVOC);
263 }
264}
265
Chris Wilson32aad862010-08-04 13:50:25 +0100266static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800267{
Jesse Barnes79e53942008-11-07 14:24:08 -0800268 struct i2c_msg msgs[] = {
269 {
Chris Wilsone957d772010-09-24 12:52:03 +0100270 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800271 .flags = 0,
272 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100273 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800274 },
275 {
Chris Wilsone957d772010-09-24 12:52:03 +0100276 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800277 .flags = I2C_M_RD,
278 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100279 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800280 }
281 };
Chris Wilson32aad862010-08-04 13:50:25 +0100282 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800283
Chris Wilsonf899fc62010-07-20 15:44:45 -0700284 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800285 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800286
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800287 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800288 return false;
289}
290
Jesse Barnes79e53942008-11-07 14:24:08 -0800291#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
292/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100293static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800294 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100295 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800296} sdvo_cmd_names[] = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100340
Akshay Joshi0206e352011-08-16 15:34:10 -0400341 /* Add the op code for SDVO enhancements */
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
Chris Wilsonc5521702010-08-04 13:50:28 +0100386
Akshay Joshi0206e352011-08-16 15:34:10 -0400387 /* HDMI op code */
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800408};
409
Daniel Vettereef4eac2012-03-23 23:43:35 +0100410#define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800411
Chris Wilsonea5b2132010-08-04 13:50:23 +0100412static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100413 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800414{
Jesse Barnes79e53942008-11-07 14:24:08 -0800415 int i;
416
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800417 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100418 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800419 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800420 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800421 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800422 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400423 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800424 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800425 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800426 break;
427 }
428 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400429 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800430 DRM_LOG_KMS("(%02X)", cmd);
431 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800432}
Jesse Barnes79e53942008-11-07 14:24:08 -0800433
Jesse Barnes79e53942008-11-07 14:24:08 -0800434static const char *cmd_status_names[] = {
435 "Power on",
436 "Success",
437 "Not supported",
438 "Invalid arg",
439 "Pending",
440 "Target not specified",
441 "Scaling not supported"
442};
443
Chris Wilsone957d772010-09-24 12:52:03 +0100444static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
445 const void *args, int args_len)
446{
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700447 u8 *buf, status;
448 struct i2c_msg *msgs;
449 int i, ret = true;
450
Alan Cox0274df32012-07-25 13:51:04 +0100451 /* Would be simpler to allocate both in one go ? */
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700452 buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
453 if (!buf)
454 return false;
455
456 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
Alan Cox0274df32012-07-25 13:51:04 +0100457 if (!msgs) {
458 kfree(buf);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700459 return false;
Alan Cox0274df32012-07-25 13:51:04 +0100460 }
Chris Wilsone957d772010-09-24 12:52:03 +0100461
462 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
463
464 for (i = 0; i < args_len; i++) {
465 msgs[i].addr = intel_sdvo->slave_addr;
466 msgs[i].flags = 0;
467 msgs[i].len = 2;
468 msgs[i].buf = buf + 2 *i;
469 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
470 buf[2*i + 1] = ((u8*)args)[i];
471 }
472 msgs[i].addr = intel_sdvo->slave_addr;
473 msgs[i].flags = 0;
474 msgs[i].len = 2;
475 msgs[i].buf = buf + 2*i;
476 buf[2*i + 0] = SDVO_I2C_OPCODE;
477 buf[2*i + 1] = cmd;
478
479 /* the following two are to read the response */
480 status = SDVO_I2C_CMD_STATUS;
481 msgs[i+1].addr = intel_sdvo->slave_addr;
482 msgs[i+1].flags = 0;
483 msgs[i+1].len = 1;
484 msgs[i+1].buf = &status;
485
486 msgs[i+2].addr = intel_sdvo->slave_addr;
487 msgs[i+2].flags = I2C_M_RD;
488 msgs[i+2].len = 1;
489 msgs[i+2].buf = &status;
490
491 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
492 if (ret < 0) {
493 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700494 ret = false;
495 goto out;
Chris Wilsone957d772010-09-24 12:52:03 +0100496 }
497 if (ret != i+3) {
498 /* failure in I2C transfer */
499 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700500 ret = false;
Chris Wilsone957d772010-09-24 12:52:03 +0100501 }
502
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700503out:
504 kfree(msgs);
505 kfree(buf);
506 return ret;
Chris Wilsone957d772010-09-24 12:52:03 +0100507}
508
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100509static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
510 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800511{
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100512 u8 retry = 5;
513 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800514 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800515
Chris Wilsond121a5d2011-01-25 15:00:01 +0000516 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
517
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100518 /*
519 * The documentation states that all commands will be
520 * processed within 15µs, and that we need only poll
521 * the status byte a maximum of 3 times in order for the
522 * command to be complete.
523 *
524 * Check 5 times in case the hardware failed to read the docs.
525 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000526 if (!intel_sdvo_read_byte(intel_sdvo,
527 SDVO_I2C_CMD_STATUS,
528 &status))
529 goto log_fail;
530
531 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
532 udelay(15);
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100533 if (!intel_sdvo_read_byte(intel_sdvo,
534 SDVO_I2C_CMD_STATUS,
535 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000536 goto log_fail;
537 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100538
Jesse Barnes79e53942008-11-07 14:24:08 -0800539 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800540 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800541 else
yakui_zhao342dc382009-06-02 14:12:00 +0800542 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800543
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100544 if (status != SDVO_CMD_STATUS_SUCCESS)
545 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800546
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100547 /* Read the command response */
548 for (i = 0; i < response_len; i++) {
549 if (!intel_sdvo_read_byte(intel_sdvo,
550 SDVO_I2C_RETURN_0 + i,
551 &((u8 *)response)[i]))
552 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100553 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800554 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100555 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100556 return true;
557
558log_fail:
Chris Wilsond121a5d2011-01-25 15:00:01 +0000559 DRM_LOG_KMS("... failed\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100560 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800561}
562
Hannes Ederb358d0a2008-12-18 21:18:47 +0100563static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800564{
565 if (mode->clock >= 100000)
566 return 1;
567 else if (mode->clock >= 50000)
568 return 2;
569 else
570 return 4;
571}
572
Chris Wilsone957d772010-09-24 12:52:03 +0100573static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
574 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800575{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000576 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100577 return intel_sdvo_write_cmd(intel_sdvo,
578 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
579 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800580}
581
Chris Wilson32aad862010-08-04 13:50:25 +0100582static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
583{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000584 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
585 return false;
586
587 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100588}
589
590static bool
591intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
592{
593 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
594 return false;
595
596 return intel_sdvo_read_response(intel_sdvo, value, len);
597}
598
599static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800600{
601 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100602 return intel_sdvo_set_value(intel_sdvo,
603 SDVO_CMD_SET_TARGET_INPUT,
604 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800605}
606
607/**
608 * Return whether each input is trained.
609 *
610 * This function is making an assumption about the layout of the response,
611 * which should be checked against the docs.
612 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100613static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800614{
615 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800616
Chris Wilson1a3665c2011-01-25 13:59:37 +0000617 BUILD_BUG_ON(sizeof(response) != 1);
Chris Wilson32aad862010-08-04 13:50:25 +0100618 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
619 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800620 return false;
621
622 *input_1 = response.input0_trained;
623 *input_2 = response.input1_trained;
624 return true;
625}
626
Chris Wilsonea5b2132010-08-04 13:50:23 +0100627static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800628 u16 outputs)
629{
Chris Wilson32aad862010-08-04 13:50:25 +0100630 return intel_sdvo_set_value(intel_sdvo,
631 SDVO_CMD_SET_ACTIVE_OUTPUTS,
632 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800633}
634
Daniel Vetter4ac41f42012-07-02 14:54:00 +0200635static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
636 u16 *outputs)
637{
638 return intel_sdvo_get_value(intel_sdvo,
639 SDVO_CMD_GET_ACTIVE_OUTPUTS,
640 outputs, sizeof(*outputs));
641}
642
Chris Wilsonea5b2132010-08-04 13:50:23 +0100643static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800644 int mode)
645{
Chris Wilson32aad862010-08-04 13:50:25 +0100646 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800647
648 switch (mode) {
649 case DRM_MODE_DPMS_ON:
650 state = SDVO_ENCODER_STATE_ON;
651 break;
652 case DRM_MODE_DPMS_STANDBY:
653 state = SDVO_ENCODER_STATE_STANDBY;
654 break;
655 case DRM_MODE_DPMS_SUSPEND:
656 state = SDVO_ENCODER_STATE_SUSPEND;
657 break;
658 case DRM_MODE_DPMS_OFF:
659 state = SDVO_ENCODER_STATE_OFF;
660 break;
661 }
662
Chris Wilson32aad862010-08-04 13:50:25 +0100663 return intel_sdvo_set_value(intel_sdvo,
664 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800665}
666
Chris Wilsonea5b2132010-08-04 13:50:23 +0100667static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800668 int *clock_min,
669 int *clock_max)
670{
671 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800672
Chris Wilson1a3665c2011-01-25 13:59:37 +0000673 BUILD_BUG_ON(sizeof(clocks) != 4);
Chris Wilson32aad862010-08-04 13:50:25 +0100674 if (!intel_sdvo_get_value(intel_sdvo,
675 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
676 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800677 return false;
678
679 /* Convert the values from units of 10 kHz to kHz. */
680 *clock_min = clocks.min * 10;
681 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800682 return true;
683}
684
Chris Wilsonea5b2132010-08-04 13:50:23 +0100685static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800686 u16 outputs)
687{
Chris Wilson32aad862010-08-04 13:50:25 +0100688 return intel_sdvo_set_value(intel_sdvo,
689 SDVO_CMD_SET_TARGET_OUTPUT,
690 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800691}
692
Chris Wilsonea5b2132010-08-04 13:50:23 +0100693static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800694 struct intel_sdvo_dtd *dtd)
695{
Chris Wilson32aad862010-08-04 13:50:25 +0100696 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
697 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800698}
699
Chris Wilsonea5b2132010-08-04 13:50:23 +0100700static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800701 struct intel_sdvo_dtd *dtd)
702{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100703 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800704 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
705}
706
Chris Wilsonea5b2132010-08-04 13:50:23 +0100707static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800708 struct intel_sdvo_dtd *dtd)
709{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100710 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800711 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
712}
713
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800714static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100715intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800716 uint16_t clock,
717 uint16_t width,
718 uint16_t height)
719{
720 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800721
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800722 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800723 args.clock = clock;
724 args.width = width;
725 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800726 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800727
Chris Wilsonea5b2132010-08-04 13:50:23 +0100728 if (intel_sdvo->is_lvds &&
729 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
730 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800731 args.scaled = 1;
732
Chris Wilson32aad862010-08-04 13:50:25 +0100733 return intel_sdvo_set_value(intel_sdvo,
734 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
735 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800736}
737
Chris Wilsonea5b2132010-08-04 13:50:23 +0100738static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800739 struct intel_sdvo_dtd *dtd)
740{
Chris Wilson1a3665c2011-01-25 13:59:37 +0000741 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
742 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
Chris Wilson32aad862010-08-04 13:50:25 +0100743 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
744 &dtd->part1, sizeof(dtd->part1)) &&
745 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
746 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800747}
Jesse Barnes79e53942008-11-07 14:24:08 -0800748
Chris Wilsonea5b2132010-08-04 13:50:23 +0100749static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800750{
Chris Wilson32aad862010-08-04 13:50:25 +0100751 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800752}
753
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800754static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100755 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800756{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800757 uint16_t width, height;
758 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
759 uint16_t h_sync_offset, v_sync_offset;
Daniel Vetter66518192012-04-01 19:16:18 +0200760 int mode_clock;
Jesse Barnes79e53942008-11-07 14:24:08 -0800761
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200762 width = mode->hdisplay;
763 height = mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800764
765 /* do some mode translations */
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200766 h_blank_len = mode->htotal - mode->hdisplay;
767 h_sync_len = mode->hsync_end - mode->hsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800768
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200769 v_blank_len = mode->vtotal - mode->vdisplay;
770 v_sync_len = mode->vsync_end - mode->vsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800771
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200772 h_sync_offset = mode->hsync_start - mode->hdisplay;
773 v_sync_offset = mode->vsync_start - mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800774
Daniel Vetter66518192012-04-01 19:16:18 +0200775 mode_clock = mode->clock;
776 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
777 mode_clock /= 10;
778 dtd->part1.clock = mode_clock;
779
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800780 dtd->part1.h_active = width & 0xff;
781 dtd->part1.h_blank = h_blank_len & 0xff;
782 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800783 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800784 dtd->part1.v_active = height & 0xff;
785 dtd->part1.v_blank = v_blank_len & 0xff;
786 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800787 ((v_blank_len >> 8) & 0xf);
788
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800789 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800790 dtd->part2.h_sync_width = h_sync_len & 0xff;
791 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800792 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800793 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800794 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
795 ((v_sync_len & 0x30) >> 4);
796
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800797 dtd->part2.dtd_flags = 0x18;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200798 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
799 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800800 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200801 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800802 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200803 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800804
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800805 dtd->part2.sdvo_flags = 0;
806 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
807 dtd->part2.reserved = 0;
808}
Jesse Barnes79e53942008-11-07 14:24:08 -0800809
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800810static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100811 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800812{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800813 mode->hdisplay = dtd->part1.h_active;
814 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
815 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800816 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800817 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
818 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
819 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
820 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
821
822 mode->vdisplay = dtd->part1.v_active;
823 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
824 mode->vsync_start = mode->vdisplay;
825 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800826 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800827 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
828 mode->vsync_end = mode->vsync_start +
829 (dtd->part2.v_sync_off_width & 0xf);
830 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
831 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
832 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
833
834 mode->clock = dtd->part1.clock * 10;
835
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800836 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200837 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
838 mode->flags |= DRM_MODE_FLAG_INTERLACE;
839 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800840 mode->flags |= DRM_MODE_FLAG_PHSYNC;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200841 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800842 mode->flags |= DRM_MODE_FLAG_PVSYNC;
843}
844
Chris Wilsone27d8532010-10-22 09:15:22 +0100845static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800846{
Chris Wilsone27d8532010-10-22 09:15:22 +0100847 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800848
Chris Wilson1a3665c2011-01-25 13:59:37 +0000849 BUILD_BUG_ON(sizeof(encode) != 2);
Chris Wilsone27d8532010-10-22 09:15:22 +0100850 return intel_sdvo_get_value(intel_sdvo,
851 SDVO_CMD_GET_SUPP_ENCODE,
852 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800853}
854
Chris Wilsonea5b2132010-08-04 13:50:23 +0100855static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700856 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800857{
Chris Wilson32aad862010-08-04 13:50:25 +0100858 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800859}
860
Chris Wilsonea5b2132010-08-04 13:50:23 +0100861static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800862 uint8_t mode)
863{
Chris Wilson32aad862010-08-04 13:50:25 +0100864 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800865}
866
867#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100868static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800869{
870 int i, j;
871 uint8_t set_buf_index[2];
872 uint8_t av_split;
873 uint8_t buf_size;
874 uint8_t buf[48];
875 uint8_t *pos;
876
Chris Wilson32aad862010-08-04 13:50:25 +0100877 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800878
879 for (i = 0; i <= av_split; i++) {
880 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700881 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800882 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700883 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
884 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800885
886 pos = buf;
887 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700888 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800889 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700890 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800891 pos += 8;
892 }
893 }
894}
895#endif
896
Daniel Vetterb6e0e542012-10-21 12:52:39 +0200897static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
898 unsigned if_index, uint8_t tx_rate,
899 uint8_t *data, unsigned length)
900{
901 uint8_t set_buf_index[2] = { if_index, 0 };
902 uint8_t hbuf_size, tmp[8];
903 int i;
904
905 if (!intel_sdvo_set_value(intel_sdvo,
906 SDVO_CMD_SET_HBUF_INDEX,
907 set_buf_index, 2))
908 return false;
909
910 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
911 &hbuf_size, 1))
912 return false;
913
914 /* Buffer size is 0 based, hooray! */
915 hbuf_size++;
916
917 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
918 if_index, length, hbuf_size);
919
920 for (i = 0; i < hbuf_size; i += 8) {
921 memset(tmp, 0, 8);
922 if (i < length)
923 memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
924
925 if (!intel_sdvo_set_value(intel_sdvo,
926 SDVO_CMD_SET_HBUF_DATA,
927 tmp, 8))
928 return false;
929 }
930
931 return intel_sdvo_set_value(intel_sdvo,
932 SDVO_CMD_SET_HBUF_TXRATE,
933 &tx_rate, 1);
934}
935
David Härdeman3c17fe42010-09-24 21:44:32 +0200936static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800937{
938 struct dip_infoframe avi_if = {
939 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200940 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800941 .len = DIP_LEN_AVI,
942 };
Daniel Vetter81014b92012-05-12 20:22:00 +0200943 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800944
David Härdeman3c17fe42010-09-24 21:44:32 +0200945 intel_dip_infoframe_csum(&avi_if);
946
Daniel Vetter81014b92012-05-12 20:22:00 +0200947 /* sdvo spec says that the ecc is handled by the hw, and it looks like
948 * we must not send the ecc field, either. */
949 memcpy(sdvo_data, &avi_if, 3);
950 sdvo_data[3] = avi_if.checksum;
951 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
952
Daniel Vetterb6e0e542012-10-21 12:52:39 +0200953 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
954 SDVO_HBUF_TX_VSYNC,
955 sdvo_data, sizeof(sdvo_data));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800956}
957
Chris Wilson32aad862010-08-04 13:50:25 +0100958static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800959{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800960 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100961 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800962
Chris Wilson40039752010-08-04 13:50:26 +0100963 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800964 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100965 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800966
Chris Wilson32aad862010-08-04 13:50:25 +0100967 BUILD_BUG_ON(sizeof(format) != 6);
968 return intel_sdvo_set_value(intel_sdvo,
969 SDVO_CMD_SET_TV_FORMAT,
970 &format, sizeof(format));
971}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800972
Chris Wilson32aad862010-08-04 13:50:25 +0100973static bool
974intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
Laurent Pincharte811f5a2012-07-17 17:56:50 +0200975 const struct drm_display_mode *mode)
Chris Wilson32aad862010-08-04 13:50:25 +0100976{
977 struct intel_sdvo_dtd output_dtd;
978
979 if (!intel_sdvo_set_target_output(intel_sdvo,
980 intel_sdvo->attached_output))
981 return false;
982
983 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
984 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
985 return false;
986
987 return true;
988}
989
Daniel Vetterc9a29692012-04-10 13:55:47 +0200990/* Asks the sdvo controller for the preferred input mode given the output mode.
991 * Unfortunately we have to set up the full output mode to do that. */
Chris Wilson32aad862010-08-04 13:50:25 +0100992static bool
Daniel Vetterc9a29692012-04-10 13:55:47 +0200993intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
Laurent Pincharte811f5a2012-07-17 17:56:50 +0200994 const struct drm_display_mode *mode,
Daniel Vetterc9a29692012-04-10 13:55:47 +0200995 struct drm_display_mode *adjusted_mode)
Chris Wilson32aad862010-08-04 13:50:25 +0100996{
Daniel Vetterc9a29692012-04-10 13:55:47 +0200997 struct intel_sdvo_dtd input_dtd;
998
Chris Wilson32aad862010-08-04 13:50:25 +0100999 /* Reset the input timing to the screen. Assume always input 0. */
1000 if (!intel_sdvo_set_target_input(intel_sdvo))
1001 return false;
1002
1003 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1004 mode->clock / 10,
1005 mode->hdisplay,
1006 mode->vdisplay))
1007 return false;
1008
1009 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Daniel Vetterc9a29692012-04-10 13:55:47 +02001010 &input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +01001011 return false;
1012
Daniel Vetterc9a29692012-04-10 13:55:47 +02001013 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
Egbert Eiche7518232012-10-13 14:29:31 +02001014 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
Chris Wilson32aad862010-08-04 13:50:25 +01001015
Chris Wilson32aad862010-08-04 13:50:25 +01001016 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001017}
1018
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001019static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
Laurent Pincharte811f5a2012-07-17 17:56:50 +02001020 const struct drm_display_mode *mode,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001021 struct drm_display_mode *adjusted_mode)
1022{
Chris Wilson890f3352010-09-14 16:46:59 +01001023 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001024 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001025
Chris Wilson32aad862010-08-04 13:50:25 +01001026 /* We need to construct preferred input timings based on our
1027 * output timings. To do that, we have to set the output
1028 * timings, even though this isn't really the right place in
1029 * the sequence to do it. Oh well.
1030 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001031 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +01001032 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001033 return false;
Chris Wilson32aad862010-08-04 13:50:25 +01001034
Daniel Vetterc9a29692012-04-10 13:55:47 +02001035 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1036 mode,
1037 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001038 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +01001039 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +01001040 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001041 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001042
Daniel Vetterc9a29692012-04-10 13:55:47 +02001043 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1044 mode,
1045 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001046 }
Chris Wilson32aad862010-08-04 13:50:25 +01001047
1048 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +01001049 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +01001050 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001051 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1052 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +01001053
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001054 return true;
1055}
1056
1057static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1058 struct drm_display_mode *mode,
1059 struct drm_display_mode *adjusted_mode)
1060{
1061 struct drm_device *dev = encoder->dev;
1062 struct drm_i915_private *dev_priv = dev->dev_private;
1063 struct drm_crtc *crtc = encoder->crtc;
1064 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +01001065 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001066 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001067 struct intel_sdvo_in_out_map in_out;
Daniel Vetter66518192012-04-01 19:16:18 +02001068 struct intel_sdvo_dtd input_dtd, output_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +01001069 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1070 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001071
1072 if (!mode)
1073 return;
1074
1075 /* First, set the input mapping for the first input to our controlled
1076 * output. This is only correct if we're a single-input device, in
1077 * which case the first input is the output from the appropriate SDVO
1078 * channel on the motherboard. In a two-input device, the first input
1079 * will be SDVOB and the second SDVOC.
1080 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001081 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001082 in_out.in1 = 0;
1083
Pavel Roskinc74696b2010-09-02 14:46:34 -04001084 intel_sdvo_set_value(intel_sdvo,
1085 SDVO_CMD_SET_IN_OUT_MAP,
1086 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001087
Chris Wilson6c9547f2010-08-25 10:05:17 +01001088 /* Set the output timings to the screen */
1089 if (!intel_sdvo_set_target_output(intel_sdvo,
1090 intel_sdvo->attached_output))
1091 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001092
Daniel Vetter66518192012-04-01 19:16:18 +02001093 /* lvds has a special fixed output timing. */
1094 if (intel_sdvo->is_lvds)
1095 intel_sdvo_get_dtd_from_mode(&output_dtd,
1096 intel_sdvo->sdvo_lvds_fixed_mode);
1097 else
1098 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
Daniel Vetterc8d4bb52012-04-10 13:55:48 +02001099 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1100 DRM_INFO("Setting output timings on %s failed\n",
1101 SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001102
1103 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001104 if (!intel_sdvo_set_target_input(intel_sdvo))
1105 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001106
Chris Wilson97aaf912011-01-04 20:10:52 +00001107 if (intel_sdvo->has_hdmi_monitor) {
1108 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1109 intel_sdvo_set_colorimetry(intel_sdvo,
1110 SDVO_COLORIMETRY_RGB256);
1111 intel_sdvo_set_avi_infoframe(intel_sdvo);
1112 } else
1113 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001114
Chris Wilson6c9547f2010-08-25 10:05:17 +01001115 if (intel_sdvo->is_tv &&
1116 !intel_sdvo_set_tv_format(intel_sdvo))
1117 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001118
Daniel Vetter66518192012-04-01 19:16:18 +02001119 /* We have tried to get input timing in mode_fixup, and filled into
1120 * adjusted_mode.
1121 */
1122 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Egbert Eiche7518232012-10-13 14:29:31 +02001123 if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1124 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
Daniel Vetterc8d4bb52012-04-10 13:55:48 +02001125 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1126 DRM_INFO("Setting input timings on %s failed\n",
1127 SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001128
Chris Wilson6c9547f2010-08-25 10:05:17 +01001129 switch (pixel_multiplier) {
1130 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001131 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1132 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1133 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001134 }
Chris Wilson32aad862010-08-04 13:50:25 +01001135 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1136 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001137
1138 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001139 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanoniba68e082012-01-06 19:45:34 -02001140 /* The real mode polarity is set by the SDVO commands, using
1141 * struct intel_sdvo_dtd. */
1142 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
Chris Wilsone953fd72011-02-21 22:23:52 +00001143 if (intel_sdvo->is_hdmi)
1144 sdvox |= intel_sdvo->color_range;
Chris Wilson6714afb2010-12-17 04:10:51 +00001145 if (INTEL_INFO(dev)->gen < 5)
1146 sdvox |= SDVO_BORDER_ENABLE;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001147 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001148 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001149 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001150 case SDVOB:
1151 sdvox &= SDVOB_PRESERVE_MASK;
1152 break;
1153 case SDVOC:
1154 sdvox &= SDVOC_PRESERVE_MASK;
1155 break;
1156 }
1157 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1158 }
Paulo Zanoni3573c412011-10-14 18:16:22 -03001159
1160 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1161 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1162 else
1163 sdvox |= TRANSCODER(intel_crtc->pipe);
1164
Chris Wilsonda79de92010-11-22 11:12:46 +00001165 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001166 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001167
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001168 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001169 /* done in crtc_mode_set as the dpll_md reg must be written early */
1170 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1171 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001172 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001173 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001174 }
1175
Chris Wilson6714afb2010-12-17 04:10:51 +00001176 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1177 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001178 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001179 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001180}
1181
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001182static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001183{
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001184 struct intel_sdvo_connector *intel_sdvo_connector =
1185 to_intel_sdvo_connector(&connector->base);
1186 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1187 u16 active_outputs;
1188
1189 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1190
1191 if (active_outputs & intel_sdvo_connector->output_flag)
1192 return true;
1193 else
1194 return false;
1195}
1196
1197static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1198 enum pipe *pipe)
1199{
1200 struct drm_device *dev = encoder->base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -08001201 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001202 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1203 u32 tmp;
1204
1205 tmp = I915_READ(intel_sdvo->sdvo_reg);
1206
1207 if (!(tmp & SDVO_ENABLE))
1208 return false;
1209
1210 if (HAS_PCH_CPT(dev))
1211 *pipe = PORT_TO_PIPE_CPT(tmp);
1212 else
1213 *pipe = PORT_TO_PIPE(tmp);
1214
1215 return true;
1216}
1217
Daniel Vetterce22c322012-07-01 15:31:04 +02001218static void intel_disable_sdvo(struct intel_encoder *encoder)
1219{
1220 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1221 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001222 u32 temp;
1223
Daniel Vetterce22c322012-07-01 15:31:04 +02001224 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1225 if (0)
1226 intel_sdvo_set_encoder_power_state(intel_sdvo,
1227 DRM_MODE_DPMS_OFF);
1228
1229 temp = I915_READ(intel_sdvo->sdvo_reg);
1230 if ((temp & SDVO_ENABLE) != 0) {
1231 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1232 }
1233}
1234
1235static void intel_enable_sdvo(struct intel_encoder *encoder)
1236{
1237 struct drm_device *dev = encoder->base.dev;
1238 struct drm_i915_private *dev_priv = dev->dev_private;
1239 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1240 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1241 u32 temp;
1242 bool input1, input2;
1243 int i;
1244 u8 status;
1245
1246 temp = I915_READ(intel_sdvo->sdvo_reg);
1247 if ((temp & SDVO_ENABLE) == 0)
1248 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1249 for (i = 0; i < 2; i++)
1250 intel_wait_for_vblank(dev, intel_crtc->pipe);
1251
1252 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1253 /* Warn if the device reported failure to sync.
1254 * A lot of SDVO devices fail to notify of sync, but it's
1255 * a given it the status is a success, we succeeded.
1256 */
1257 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1258 DRM_DEBUG_KMS("First %s output reported failure to "
1259 "sync\n", SDVO_NAME(intel_sdvo));
1260 }
1261
1262 if (0)
1263 intel_sdvo_set_encoder_power_state(intel_sdvo,
1264 DRM_MODE_DPMS_ON);
1265 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1266}
1267
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001268static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
Jesse Barnes79e53942008-11-07 14:24:08 -08001269{
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001270 struct drm_crtc *crtc;
1271 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1272
1273 /* dvo supports only 2 dpms states. */
1274 if (mode != DRM_MODE_DPMS_ON)
1275 mode = DRM_MODE_DPMS_OFF;
1276
1277 if (mode == connector->dpms)
1278 return;
1279
1280 connector->dpms = mode;
1281
1282 /* Only need to change hw state when actually enabled */
1283 crtc = intel_sdvo->base.base.crtc;
1284 if (!crtc) {
1285 intel_sdvo->base.connectors_active = false;
1286 return;
1287 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001288
1289 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001290 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001291 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001292 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001293
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001294 intel_sdvo->base.connectors_active = false;
1295
1296 intel_crtc_update_dpms(crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001297 } else {
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001298 intel_sdvo->base.connectors_active = true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001299
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001300 intel_crtc_update_dpms(crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001301
1302 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001303 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1304 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001305 }
Daniel Vetter0a91ca22012-07-02 21:54:27 +02001306
Daniel Vetterb9805142012-08-31 17:37:33 +02001307 intel_modeset_check_state(connector->dev);
Jesse Barnes79e53942008-11-07 14:24:08 -08001308}
1309
Jesse Barnes79e53942008-11-07 14:24:08 -08001310static int intel_sdvo_mode_valid(struct drm_connector *connector,
1311 struct drm_display_mode *mode)
1312{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001313 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001314
1315 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1316 return MODE_NO_DBLESCAN;
1317
Chris Wilsonea5b2132010-08-04 13:50:23 +01001318 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001319 return MODE_CLOCK_LOW;
1320
Chris Wilsonea5b2132010-08-04 13:50:23 +01001321 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001322 return MODE_CLOCK_HIGH;
1323
Chris Wilson85454232010-08-08 14:28:23 +01001324 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001325 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001326 return MODE_PANEL;
1327
Chris Wilsonea5b2132010-08-04 13:50:23 +01001328 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001329 return MODE_PANEL;
1330 }
1331
Jesse Barnes79e53942008-11-07 14:24:08 -08001332 return MODE_OK;
1333}
1334
Chris Wilsonea5b2132010-08-04 13:50:23 +01001335static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001336{
Chris Wilson1a3665c2011-01-25 13:59:37 +00001337 BUILD_BUG_ON(sizeof(*caps) != 8);
Chris Wilsone957d772010-09-24 12:52:03 +01001338 if (!intel_sdvo_get_value(intel_sdvo,
1339 SDVO_CMD_GET_DEVICE_CAPS,
1340 caps, sizeof(*caps)))
1341 return false;
1342
1343 DRM_DEBUG_KMS("SDVO capabilities:\n"
1344 " vendor_id: %d\n"
1345 " device_id: %d\n"
1346 " device_rev_id: %d\n"
1347 " sdvo_version_major: %d\n"
1348 " sdvo_version_minor: %d\n"
1349 " sdvo_inputs_mask: %d\n"
1350 " smooth_scaling: %d\n"
1351 " sharp_scaling: %d\n"
1352 " up_scaling: %d\n"
1353 " down_scaling: %d\n"
1354 " stall_support: %d\n"
1355 " output_flags: %d\n",
1356 caps->vendor_id,
1357 caps->device_id,
1358 caps->device_rev_id,
1359 caps->sdvo_version_major,
1360 caps->sdvo_version_minor,
1361 caps->sdvo_inputs_mask,
1362 caps->smooth_scaling,
1363 caps->sharp_scaling,
1364 caps->up_scaling,
1365 caps->down_scaling,
1366 caps->stall_support,
1367 caps->output_flags);
1368
1369 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001370}
1371
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001372static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -08001373{
Daniel Vetter768b1072012-05-04 11:29:56 +02001374 struct drm_device *dev = intel_sdvo->base.base.dev;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001375 uint16_t hotplug;
Jesse Barnes79e53942008-11-07 14:24:08 -08001376
Daniel Vetter768b1072012-05-04 11:29:56 +02001377 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1378 * on the line. */
1379 if (IS_I945G(dev) || IS_I945GM(dev))
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001380 return 0;
Daniel Vetter768b1072012-05-04 11:29:56 +02001381
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001382 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1383 &hotplug, sizeof(hotplug)))
1384 return 0;
1385
1386 return hotplug;
Jesse Barnes79e53942008-11-07 14:24:08 -08001387}
1388
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001389static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001390{
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001391 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001392
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001393 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1394 &intel_sdvo->hotplug_active, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001395}
1396
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001397static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001398intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001399{
Chris Wilsonbc652122011-01-25 13:28:29 +00001400 /* Is there more than one type of output? */
Adam Jackson22944882011-06-16 16:36:24 -04001401 return hweight16(intel_sdvo->caps.output_flags) > 1;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001402}
1403
Chris Wilsonf899fc62010-07-20 15:44:45 -07001404static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001405intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001406{
Chris Wilsone957d772010-09-24 12:52:03 +01001407 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1408 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001409}
1410
Chris Wilsonff482d82010-09-15 10:40:38 +01001411/* Mac mini hack -- use the same DDC as the analog connector */
1412static struct edid *
1413intel_sdvo_get_analog_edid(struct drm_connector *connector)
1414{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001415 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001416
Chris Wilson0c1dab82010-11-23 22:37:01 +00001417 return drm_get_edid(connector,
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001418 intel_gmbus_get_adapter(dev_priv,
1419 dev_priv->crt_ddc_pin));
Chris Wilsonff482d82010-09-15 10:40:38 +01001420}
1421
Ben Widawskyc43b5632012-04-16 14:07:40 -07001422static enum drm_connector_status
Adam Jackson8bf38482011-06-16 16:36:25 -04001423intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001424{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001425 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001426 enum drm_connector_status status;
1427 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001428
Chris Wilsone957d772010-09-24 12:52:03 +01001429 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001430
Chris Wilsonea5b2132010-08-04 13:50:23 +01001431 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001432 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001433
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001434 /*
1435 * Don't use the 1 as the argument of DDC bus switch to get
1436 * the EDID. It is used for SDVO SPD ROM.
1437 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001438 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001439 intel_sdvo->ddc_bus = ddc;
1440 edid = intel_sdvo_get_edid(connector);
1441 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001442 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001443 }
Chris Wilsone957d772010-09-24 12:52:03 +01001444 /*
1445 * If we found the EDID on the other bus,
1446 * assume that is the correct DDC bus.
1447 */
1448 if (edid == NULL)
1449 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001450 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001451
1452 /*
1453 * When there is no edid and no monitor is connected with VGA
1454 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001455 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001456 if (edid == NULL)
1457 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001458
Chris Wilson2f551c82010-09-15 10:42:50 +01001459 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001460 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001461 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001462 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1463 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001464 if (intel_sdvo->is_hdmi) {
1465 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1466 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1467 }
Chris Wilson139467432011-02-09 20:01:16 +00001468 } else
1469 status = connector_status_disconnected;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001470 kfree(edid);
1471 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001472
1473 if (status == connector_status_connected) {
1474 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001475 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1476 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001477 }
1478
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001479 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001480}
1481
Chris Wilson52220082011-06-20 14:45:50 +01001482static bool
1483intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1484 struct edid *edid)
1485{
1486 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1487 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1488
1489 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1490 connector_is_digital, monitor_is_digital);
1491 return connector_is_digital == monitor_is_digital;
1492}
1493
Chris Wilson7b334fc2010-09-09 23:51:02 +01001494static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001495intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001496{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001497 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001498 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001499 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001500 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001501
Chris Wilson32aad862010-08-04 13:50:25 +01001502 if (!intel_sdvo_write_cmd(intel_sdvo,
Chris Wilsone957d772010-09-24 12:52:03 +01001503 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
Chris Wilson32aad862010-08-04 13:50:25 +01001504 return connector_status_unknown;
Chris Wilsonba84cd12010-11-24 17:37:17 +00001505
1506 /* add 30ms delay when the output type might be TV */
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01001507 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
Daniel Vetter6c982372012-05-24 21:26:49 +02001508 msleep(30);
Chris Wilsonba84cd12010-11-24 17:37:17 +00001509
Chris Wilson32aad862010-08-04 13:50:25 +01001510 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1511 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001512
Chris Wilsone957d772010-09-24 12:52:03 +01001513 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1514 response & 0xff, response >> 8,
1515 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001516
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001517 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001518 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001519
Chris Wilsonea5b2132010-08-04 13:50:23 +01001520 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001521
Chris Wilson97aaf912011-01-04 20:10:52 +00001522 intel_sdvo->has_hdmi_monitor = false;
1523 intel_sdvo->has_hdmi_audio = false;
1524
Chris Wilson615fb932010-08-04 13:50:24 +01001525 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001526 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001527 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson8bf38482011-06-16 16:36:25 -04001528 ret = intel_sdvo_tmds_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001529 else {
1530 struct edid *edid;
1531
1532 /* if we have an edid check it matches the connection */
1533 edid = intel_sdvo_get_edid(connector);
1534 if (edid == NULL)
1535 edid = intel_sdvo_get_analog_edid(connector);
1536 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001537 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1538 edid))
Chris Wilson139467432011-02-09 20:01:16 +00001539 ret = connector_status_connected;
Chris Wilson52220082011-06-20 14:45:50 +01001540 else
1541 ret = connector_status_disconnected;
1542
Chris Wilson139467432011-02-09 20:01:16 +00001543 kfree(edid);
1544 } else
1545 ret = connector_status_connected;
1546 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001547
1548 /* May update encoder flag for like clock for SDVO TV, etc.*/
1549 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001550 intel_sdvo->is_tv = false;
1551 intel_sdvo->is_lvds = false;
1552 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001553
1554 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001555 intel_sdvo->is_tv = true;
1556 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001557 }
1558 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001559 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001560 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001561
1562 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001563}
1564
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001565static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001566{
Chris Wilsonff482d82010-09-15 10:40:38 +01001567 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001568
1569 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001570 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001571
Keith Packard57cdaf92009-09-04 13:07:54 +08001572 /*
1573 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1574 * link between analog and digital outputs. So, if the regular SDVO
1575 * DDC fails, check to see if the analog output is disconnected, in
1576 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001577 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001578 if (edid == NULL)
1579 edid = intel_sdvo_get_analog_edid(connector);
1580
Chris Wilsonff482d82010-09-15 10:40:38 +01001581 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001582 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1583 edid)) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001584 drm_mode_connector_update_edid_property(connector, edid);
1585 drm_add_edid_modes(connector, edid);
1586 }
Chris Wilson139467432011-02-09 20:01:16 +00001587
Chris Wilsonff482d82010-09-15 10:40:38 +01001588 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001589 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001590}
1591
1592/*
1593 * Set of SDVO TV modes.
1594 * Note! This is in reply order (see loop in get_tv_modes).
1595 * XXX: all 60Hz refresh?
1596 */
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001597static const struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001598 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1599 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001600 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001601 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1602 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001603 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001604 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1605 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001606 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001607 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1608 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001609 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001610 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1611 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001612 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001613 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1614 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001615 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001616 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1617 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001618 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001619 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1620 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001621 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001622 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1623 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001624 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001625 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1626 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001627 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001628 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1629 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001630 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001631 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1632 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001633 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001634 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1635 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001636 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001637 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1638 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001639 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001640 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1641 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001642 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001643 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1644 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001645 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001646 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1647 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001648 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001649 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1650 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001651 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001652 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1653 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001654 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1655};
1656
1657static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1658{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001659 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001660 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001661 uint32_t reply = 0, format_map = 0;
1662 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001663
1664 /* Read the list of supported input resolutions for the selected TV
1665 * format.
1666 */
Chris Wilson40039752010-08-04 13:50:26 +01001667 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001668 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001669 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001670
Chris Wilson32aad862010-08-04 13:50:25 +01001671 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1672 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001673
Chris Wilson32aad862010-08-04 13:50:25 +01001674 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001675 if (!intel_sdvo_write_cmd(intel_sdvo,
1676 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001677 &tv_res, sizeof(tv_res)))
1678 return;
1679 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001680 return;
1681
1682 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001683 if (reply & (1 << i)) {
1684 struct drm_display_mode *nmode;
1685 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001686 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001687 if (nmode)
1688 drm_mode_probed_add(connector, nmode);
1689 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001690}
1691
Ma Ling7086c872009-05-13 11:20:06 +08001692static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1693{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001694 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001695 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001696 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001697
1698 /*
1699 * Attempt to get the mode list from DDC.
1700 * Assume that the preferred modes are
1701 * arranged in priority order.
1702 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001703 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001704 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001705 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001706
1707 /* Fetch modes from VBT */
1708 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001709 newmode = drm_mode_duplicate(connector->dev,
1710 dev_priv->sdvo_lvds_vbt_mode);
1711 if (newmode != NULL) {
1712 /* Guarantee the mode is preferred */
1713 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1714 DRM_MODE_TYPE_DRIVER);
1715 drm_mode_probed_add(connector, newmode);
1716 }
1717 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001718
1719end:
1720 list_for_each_entry(newmode, &connector->probed_modes, head) {
1721 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001722 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001723 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001724
Chris Wilson85454232010-08-08 14:28:23 +01001725 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001726 break;
1727 }
1728 }
1729
Ma Ling7086c872009-05-13 11:20:06 +08001730}
1731
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001732static int intel_sdvo_get_modes(struct drm_connector *connector)
1733{
Chris Wilson615fb932010-08-04 13:50:24 +01001734 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001735
Chris Wilson615fb932010-08-04 13:50:24 +01001736 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001737 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001738 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001739 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001740 else
1741 intel_sdvo_get_ddc_modes(connector);
1742
Chris Wilson32aad862010-08-04 13:50:25 +01001743 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001744}
1745
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001746static void
1747intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001748{
Chris Wilson615fb932010-08-04 13:50:24 +01001749 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001750 struct drm_device *dev = connector->dev;
1751
Chris Wilsonc5521702010-08-04 13:50:28 +01001752 if (intel_sdvo_connector->left)
1753 drm_property_destroy(dev, intel_sdvo_connector->left);
1754 if (intel_sdvo_connector->right)
1755 drm_property_destroy(dev, intel_sdvo_connector->right);
1756 if (intel_sdvo_connector->top)
1757 drm_property_destroy(dev, intel_sdvo_connector->top);
1758 if (intel_sdvo_connector->bottom)
1759 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1760 if (intel_sdvo_connector->hpos)
1761 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1762 if (intel_sdvo_connector->vpos)
1763 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1764 if (intel_sdvo_connector->saturation)
1765 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1766 if (intel_sdvo_connector->contrast)
1767 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1768 if (intel_sdvo_connector->hue)
1769 drm_property_destroy(dev, intel_sdvo_connector->hue);
1770 if (intel_sdvo_connector->sharpness)
1771 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1772 if (intel_sdvo_connector->flicker_filter)
1773 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1774 if (intel_sdvo_connector->flicker_filter_2d)
1775 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1776 if (intel_sdvo_connector->flicker_filter_adaptive)
1777 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1778 if (intel_sdvo_connector->tv_luma_filter)
1779 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1780 if (intel_sdvo_connector->tv_chroma_filter)
1781 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001782 if (intel_sdvo_connector->dot_crawl)
1783 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001784 if (intel_sdvo_connector->brightness)
1785 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001786}
1787
Jesse Barnes79e53942008-11-07 14:24:08 -08001788static void intel_sdvo_destroy(struct drm_connector *connector)
1789{
Chris Wilson615fb932010-08-04 13:50:24 +01001790 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001791
Chris Wilsonc5521702010-08-04 13:50:28 +01001792 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001793 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001794 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001795
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001796 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001797 drm_sysfs_connector_remove(connector);
1798 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001799 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001800}
1801
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001802static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1803{
1804 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1805 struct edid *edid;
1806 bool has_audio = false;
1807
1808 if (!intel_sdvo->is_hdmi)
1809 return false;
1810
1811 edid = intel_sdvo_get_edid(connector);
1812 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1813 has_audio = drm_detect_monitor_audio(edid);
Jani Nikula38ab8a22012-08-15 12:32:36 +03001814 kfree(edid);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001815
1816 return has_audio;
1817}
1818
Zhao Yakuice6feab2009-08-24 13:50:26 +08001819static int
1820intel_sdvo_set_property(struct drm_connector *connector,
1821 struct drm_property *property,
1822 uint64_t val)
1823{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001824 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001825 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Chris Wilsone953fd72011-02-21 22:23:52 +00001826 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001827 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001828 uint8_t cmd;
1829 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001830
1831 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001832 if (ret)
1833 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001834
Chris Wilson3f43c482011-05-12 22:17:24 +01001835 if (property == dev_priv->force_audio_property) {
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001836 int i = val;
1837 bool has_audio;
1838
1839 if (i == intel_sdvo_connector->force_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001840 return 0;
1841
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001842 intel_sdvo_connector->force_audio = i;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001843
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001844 if (i == HDMI_AUDIO_AUTO)
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001845 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1846 else
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001847 has_audio = (i == HDMI_AUDIO_ON);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001848
1849 if (has_audio == intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001850 return 0;
1851
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001852 intel_sdvo->has_hdmi_audio = has_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001853 goto done;
1854 }
1855
Chris Wilsone953fd72011-02-21 22:23:52 +00001856 if (property == dev_priv->broadcast_rgb_property) {
1857 if (val == !!intel_sdvo->color_range)
1858 return 0;
1859
1860 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001861 goto done;
1862 }
1863
Chris Wilsonc5521702010-08-04 13:50:28 +01001864#define CHECK_PROPERTY(name, NAME) \
1865 if (intel_sdvo_connector->name == property) { \
1866 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1867 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1868 cmd = SDVO_CMD_SET_##NAME; \
1869 intel_sdvo_connector->cur_##name = temp_value; \
1870 goto set_value; \
1871 }
1872
1873 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001874 if (val >= TV_FORMAT_NUM)
1875 return -EINVAL;
1876
Chris Wilson40039752010-08-04 13:50:26 +01001877 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001878 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001879 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001880
Chris Wilson40039752010-08-04 13:50:26 +01001881 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001882 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001883 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001884 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001885 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001886 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001887 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001888 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001889 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001890
Chris Wilson615fb932010-08-04 13:50:24 +01001891 intel_sdvo_connector->left_margin = temp_value;
1892 intel_sdvo_connector->right_margin = temp_value;
1893 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001894 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001895 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001896 goto set_value;
1897 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001898 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001899 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001900 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001901 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001902
Chris Wilson615fb932010-08-04 13:50:24 +01001903 intel_sdvo_connector->left_margin = temp_value;
1904 intel_sdvo_connector->right_margin = temp_value;
1905 temp_value = intel_sdvo_connector->max_hscan -
1906 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001907 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001908 goto set_value;
1909 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001910 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001911 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001912 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001913 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001914
Chris Wilson615fb932010-08-04 13:50:24 +01001915 intel_sdvo_connector->top_margin = temp_value;
1916 intel_sdvo_connector->bottom_margin = temp_value;
1917 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001918 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001919 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001920 goto set_value;
1921 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001922 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001923 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001924 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001925 return 0;
1926
Chris Wilson615fb932010-08-04 13:50:24 +01001927 intel_sdvo_connector->top_margin = temp_value;
1928 intel_sdvo_connector->bottom_margin = temp_value;
1929 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001930 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001931 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001932 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001933 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001934 CHECK_PROPERTY(hpos, HPOS)
1935 CHECK_PROPERTY(vpos, VPOS)
1936 CHECK_PROPERTY(saturation, SATURATION)
1937 CHECK_PROPERTY(contrast, CONTRAST)
1938 CHECK_PROPERTY(hue, HUE)
1939 CHECK_PROPERTY(brightness, BRIGHTNESS)
1940 CHECK_PROPERTY(sharpness, SHARPNESS)
1941 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1942 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1943 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1944 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1945 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001946 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001947 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001948
1949 return -EINVAL; /* unknown property */
1950
1951set_value:
1952 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1953 return -EIO;
1954
1955
1956done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01001957 if (intel_sdvo->base.base.crtc) {
1958 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Daniel Vettera6778b32012-07-02 09:56:42 +02001959 intel_set_mode(crtc, &crtc->mode,
1960 crtc->x, crtc->y, crtc->fb);
Chris Wilsonc5521702010-08-04 13:50:28 +01001961 }
1962
Chris Wilson32aad862010-08-04 13:50:25 +01001963 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001964#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001965}
1966
Jesse Barnes79e53942008-11-07 14:24:08 -08001967static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
Jesse Barnes79e53942008-11-07 14:24:08 -08001968 .mode_fixup = intel_sdvo_mode_fixup,
Jesse Barnes79e53942008-11-07 14:24:08 -08001969 .mode_set = intel_sdvo_mode_set,
Daniel Vetter1f703852012-07-11 16:51:39 +02001970 .disable = intel_encoder_noop,
Jesse Barnes79e53942008-11-07 14:24:08 -08001971};
1972
1973static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001974 .dpms = intel_sdvo_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001975 .detect = intel_sdvo_detect,
1976 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001977 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001978 .destroy = intel_sdvo_destroy,
1979};
1980
1981static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1982 .get_modes = intel_sdvo_get_modes,
1983 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01001984 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001985};
1986
Hannes Ederb358d0a2008-12-18 21:18:47 +01001987static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001988{
Chris Wilson890f3352010-09-14 16:46:59 +01001989 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001990
Chris Wilsonea5b2132010-08-04 13:50:23 +01001991 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001992 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001993 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001994
Chris Wilsone957d772010-09-24 12:52:03 +01001995 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001996 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001997}
1998
1999static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2000 .destroy = intel_sdvo_enc_destroy,
2001};
2002
Chris Wilsonb66d8422010-08-12 15:26:41 +01002003static void
2004intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2005{
2006 uint16_t mask = 0;
2007 unsigned int num_bits;
2008
2009 /* Make a mask of outputs less than or equal to our own priority in the
2010 * list.
2011 */
2012 switch (sdvo->controlled_output) {
2013 case SDVO_OUTPUT_LVDS1:
2014 mask |= SDVO_OUTPUT_LVDS1;
2015 case SDVO_OUTPUT_LVDS0:
2016 mask |= SDVO_OUTPUT_LVDS0;
2017 case SDVO_OUTPUT_TMDS1:
2018 mask |= SDVO_OUTPUT_TMDS1;
2019 case SDVO_OUTPUT_TMDS0:
2020 mask |= SDVO_OUTPUT_TMDS0;
2021 case SDVO_OUTPUT_RGB1:
2022 mask |= SDVO_OUTPUT_RGB1;
2023 case SDVO_OUTPUT_RGB0:
2024 mask |= SDVO_OUTPUT_RGB0;
2025 break;
2026 }
2027
2028 /* Count bits to find what number we are in the priority list. */
2029 mask &= sdvo->caps.output_flags;
2030 num_bits = hweight16(mask);
2031 /* If more than 3 outputs, default to DDC bus 3 for now. */
2032 if (num_bits > 3)
2033 num_bits = 3;
2034
2035 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2036 sdvo->ddc_bus = 1 << num_bits;
2037}
Jesse Barnes79e53942008-11-07 14:24:08 -08002038
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002039/**
2040 * Choose the appropriate DDC bus for control bus switch command for this
2041 * SDVO output based on the controlled output.
2042 *
2043 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2044 * outputs, then LVDS outputs.
2045 */
2046static void
Adam Jacksonb1083332010-04-23 16:07:40 -04002047intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002048 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002049{
Adam Jacksonb1083332010-04-23 16:07:40 -04002050 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002051
Daniel Vettereef4eac2012-03-23 23:43:35 +01002052 if (sdvo->is_sdvob)
Adam Jacksonb1083332010-04-23 16:07:40 -04002053 mapping = &(dev_priv->sdvo_mappings[0]);
2054 else
2055 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002056
Chris Wilsonb66d8422010-08-12 15:26:41 +01002057 if (mapping->initialized)
2058 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2059 else
2060 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002061}
2062
Chris Wilsone957d772010-09-24 12:52:03 +01002063static void
2064intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2065 struct intel_sdvo *sdvo, u32 reg)
2066{
2067 struct sdvo_device_mapping *mapping;
Adam Jackson46eb3032011-06-16 16:36:23 -04002068 u8 pin;
Chris Wilsone957d772010-09-24 12:52:03 +01002069
Daniel Vettereef4eac2012-03-23 23:43:35 +01002070 if (sdvo->is_sdvob)
Chris Wilsone957d772010-09-24 12:52:03 +01002071 mapping = &dev_priv->sdvo_mappings[0];
2072 else
2073 mapping = &dev_priv->sdvo_mappings[1];
2074
2075 pin = GMBUS_PORT_DPB;
Adam Jackson46eb3032011-06-16 16:36:23 -04002076 if (mapping->initialized)
Chris Wilsone957d772010-09-24 12:52:03 +01002077 pin = mapping->i2c_pin;
Chris Wilsone957d772010-09-24 12:52:03 +01002078
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08002079 if (intel_gmbus_is_port_valid(pin)) {
2080 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
Adam Jacksond5090b92011-06-16 16:36:28 -04002081 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
Chris Wilson63abf3e2010-12-08 16:48:21 +00002082 intel_gmbus_force_bit(sdvo->i2c, true);
Adam Jackson46eb3032011-06-16 16:36:23 -04002083 } else {
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08002084 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
Adam Jackson46eb3032011-06-16 16:36:23 -04002085 }
Chris Wilsone957d772010-09-24 12:52:03 +01002086}
2087
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002088static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01002089intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002090{
Chris Wilson97aaf912011-01-04 20:10:52 +00002091 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002092}
2093
yakui_zhao714605e2009-05-31 17:18:07 +08002094static u8
Daniel Vettereef4eac2012-03-23 23:43:35 +01002095intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
yakui_zhao714605e2009-05-31 17:18:07 +08002096{
2097 struct drm_i915_private *dev_priv = dev->dev_private;
2098 struct sdvo_device_mapping *my_mapping, *other_mapping;
2099
Daniel Vettereef4eac2012-03-23 23:43:35 +01002100 if (sdvo->is_sdvob) {
yakui_zhao714605e2009-05-31 17:18:07 +08002101 my_mapping = &dev_priv->sdvo_mappings[0];
2102 other_mapping = &dev_priv->sdvo_mappings[1];
2103 } else {
2104 my_mapping = &dev_priv->sdvo_mappings[1];
2105 other_mapping = &dev_priv->sdvo_mappings[0];
2106 }
2107
2108 /* If the BIOS described our SDVO device, take advantage of it. */
2109 if (my_mapping->slave_addr)
2110 return my_mapping->slave_addr;
2111
2112 /* If the BIOS only described a different SDVO device, use the
2113 * address that it isn't using.
2114 */
2115 if (other_mapping->slave_addr) {
2116 if (other_mapping->slave_addr == 0x70)
2117 return 0x72;
2118 else
2119 return 0x70;
2120 }
2121
2122 /* No SDVO device info is found for another DVO port,
2123 * so use mapping assumption we had before BIOS parsing.
2124 */
Daniel Vettereef4eac2012-03-23 23:43:35 +01002125 if (sdvo->is_sdvob)
yakui_zhao714605e2009-05-31 17:18:07 +08002126 return 0x70;
2127 else
2128 return 0x72;
2129}
2130
Zhenyu Wang14571b42010-03-30 14:06:33 +08002131static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01002132intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2133 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002134{
Chris Wilsondf0e9242010-09-09 16:20:55 +01002135 drm_connector_init(encoder->base.base.dev,
2136 &connector->base.base,
2137 &intel_sdvo_connector_funcs,
2138 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002139
Chris Wilsondf0e9242010-09-09 16:20:55 +01002140 drm_connector_helper_add(&connector->base.base,
2141 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002142
Peter Ross8f4839e2012-01-28 14:49:25 +01002143 connector->base.base.interlace_allowed = 1;
Chris Wilsondf0e9242010-09-09 16:20:55 +01002144 connector->base.base.doublescan_allowed = 0;
2145 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02002146 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002147
Chris Wilsondf0e9242010-09-09 16:20:55 +01002148 intel_connector_attach_encoder(&connector->base, &encoder->base);
2149 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002150}
2151
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002152static void
2153intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2154{
2155 struct drm_device *dev = connector->base.base.dev;
2156
Chris Wilson3f43c482011-05-12 22:17:24 +01002157 intel_attach_force_audio_property(&connector->base.base);
Chris Wilsone953fd72011-02-21 22:23:52 +00002158 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2159 intel_attach_broadcast_rgb_property(&connector->base.base);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002160}
2161
Zhenyu Wang14571b42010-03-30 14:06:33 +08002162static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002163intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002164{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002165 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002166 struct drm_connector *connector;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002167 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002168 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002169 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002170
Chris Wilson615fb932010-08-04 13:50:24 +01002171 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2172 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002173 return false;
2174
Zhenyu Wang14571b42010-03-30 14:06:33 +08002175 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002176 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002177 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002178 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002179 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002180 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002181 }
2182
Chris Wilson615fb932010-08-04 13:50:24 +01002183 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002184 connector = &intel_connector->base;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002185 if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2186 intel_sdvo_connector->output_flag) {
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002187 connector->polled = DRM_CONNECTOR_POLL_HPD;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002188 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002189 /* Some SDVO devices have one-shot hotplug interrupts.
2190 * Ensure that they get re-enabled when an interrupt happens.
2191 */
2192 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2193 intel_sdvo_enable_hotplug(intel_encoder);
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002194 } else {
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002195 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002196 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002197 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2198 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2199
Chris Wilsone27d8532010-10-22 09:15:22 +01002200 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002201 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002202 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002203 }
Daniel Vetter66a92782012-07-12 20:08:18 +02002204 intel_sdvo->base.cloneable = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002205
Chris Wilsondf0e9242010-09-09 16:20:55 +01002206 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002207 if (intel_sdvo->is_hdmi)
2208 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002209
2210 return true;
2211}
2212
2213static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002214intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002215{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002216 struct drm_encoder *encoder = &intel_sdvo->base.base;
2217 struct drm_connector *connector;
2218 struct intel_connector *intel_connector;
2219 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002220
Chris Wilson615fb932010-08-04 13:50:24 +01002221 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2222 if (!intel_sdvo_connector)
2223 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002224
Chris Wilson615fb932010-08-04 13:50:24 +01002225 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002226 connector = &intel_connector->base;
2227 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2228 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002229
Chris Wilson4ef69c72010-09-09 15:14:28 +01002230 intel_sdvo->controlled_output |= type;
2231 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002232
Chris Wilson4ef69c72010-09-09 15:14:28 +01002233 intel_sdvo->is_tv = true;
2234 intel_sdvo->base.needs_tv_clock = true;
Daniel Vetter66a92782012-07-12 20:08:18 +02002235 intel_sdvo->base.cloneable = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002236
Chris Wilsondf0e9242010-09-09 16:20:55 +01002237 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002238
Chris Wilson4ef69c72010-09-09 15:14:28 +01002239 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002240 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002241
Chris Wilson4ef69c72010-09-09 15:14:28 +01002242 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002243 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002244
Chris Wilson4ef69c72010-09-09 15:14:28 +01002245 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002246
2247err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002248 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002249 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002250}
2251
2252static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002253intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002254{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002255 struct drm_encoder *encoder = &intel_sdvo->base.base;
2256 struct drm_connector *connector;
2257 struct intel_connector *intel_connector;
2258 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002259
Chris Wilson615fb932010-08-04 13:50:24 +01002260 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2261 if (!intel_sdvo_connector)
2262 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002263
Chris Wilson615fb932010-08-04 13:50:24 +01002264 intel_connector = &intel_sdvo_connector->base;
2265 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002266 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2267 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2268 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002269
Chris Wilson4ef69c72010-09-09 15:14:28 +01002270 if (device == 0) {
2271 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2272 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2273 } else if (device == 1) {
2274 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2275 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2276 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002277
Daniel Vetter66a92782012-07-12 20:08:18 +02002278 intel_sdvo->base.cloneable = true;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002279
Chris Wilsondf0e9242010-09-09 16:20:55 +01002280 intel_sdvo_connector_init(intel_sdvo_connector,
2281 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002282 return true;
2283}
2284
2285static bool
2286intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2287{
2288 struct drm_encoder *encoder = &intel_sdvo->base.base;
2289 struct drm_connector *connector;
2290 struct intel_connector *intel_connector;
2291 struct intel_sdvo_connector *intel_sdvo_connector;
2292
2293 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2294 if (!intel_sdvo_connector)
2295 return false;
2296
2297 intel_connector = &intel_sdvo_connector->base;
2298 connector = &intel_connector->base;
2299 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2300 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2301
2302 if (device == 0) {
2303 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2304 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2305 } else if (device == 1) {
2306 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2307 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2308 }
2309
Egbert Eiche3b86d62012-10-13 14:30:15 +02002310 /* SDVO LVDS is not cloneable because the input mode gets adjusted by the encoder */
2311 intel_sdvo->base.cloneable = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002312
Chris Wilsondf0e9242010-09-09 16:20:55 +01002313 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002314 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002315 goto err;
2316
2317 return true;
2318
2319err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002320 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002321 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002322}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002323
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002324static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002325intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002326{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002327 intel_sdvo->is_tv = false;
2328 intel_sdvo->base.needs_tv_clock = false;
2329 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002330
Zhenyu Wang14571b42010-03-30 14:06:33 +08002331 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002332
Zhenyu Wang14571b42010-03-30 14:06:33 +08002333 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002334 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002335 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002336
Zhenyu Wang14571b42010-03-30 14:06:33 +08002337 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002338 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002339 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002340
Zhenyu Wang14571b42010-03-30 14:06:33 +08002341 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002342 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002343 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002344 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002345
Zhenyu Wang14571b42010-03-30 14:06:33 +08002346 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002347 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002348 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002349
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01002350 if (flags & SDVO_OUTPUT_YPRPB0)
2351 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2352 return false;
2353
Zhenyu Wang14571b42010-03-30 14:06:33 +08002354 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002355 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002356 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002357
Zhenyu Wang14571b42010-03-30 14:06:33 +08002358 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002359 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002360 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002361
Zhenyu Wang14571b42010-03-30 14:06:33 +08002362 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002363 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002364 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002365
Zhenyu Wang14571b42010-03-30 14:06:33 +08002366 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002367 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002368 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002369
Zhenyu Wang14571b42010-03-30 14:06:33 +08002370 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002371 unsigned char bytes[2];
2372
Chris Wilsonea5b2132010-08-04 13:50:23 +01002373 intel_sdvo->controlled_output = 0;
2374 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002375 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002376 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002377 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002378 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002379 }
Jesse Barnes27f82272011-09-02 12:54:37 -07002380 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002381
Zhenyu Wang14571b42010-03-30 14:06:33 +08002382 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002383}
2384
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002385static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2386{
2387 struct drm_device *dev = intel_sdvo->base.base.dev;
2388 struct drm_connector *connector, *tmp;
2389
2390 list_for_each_entry_safe(connector, tmp,
2391 &dev->mode_config.connector_list, head) {
2392 if (intel_attached_encoder(connector) == &intel_sdvo->base)
2393 intel_sdvo_destroy(connector);
2394 }
2395}
2396
Chris Wilson32aad862010-08-04 13:50:25 +01002397static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2398 struct intel_sdvo_connector *intel_sdvo_connector,
2399 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002400{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002401 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002402 struct intel_sdvo_tv_format format;
2403 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002404
Chris Wilson32aad862010-08-04 13:50:25 +01002405 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2406 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002407
Chris Wilson1a3665c2011-01-25 13:59:37 +00002408 BUILD_BUG_ON(sizeof(format) != 6);
Chris Wilson32aad862010-08-04 13:50:25 +01002409 if (!intel_sdvo_get_value(intel_sdvo,
2410 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2411 &format, sizeof(format)))
2412 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002413
Chris Wilson32aad862010-08-04 13:50:25 +01002414 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002415
2416 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002417 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002418
Chris Wilson615fb932010-08-04 13:50:24 +01002419 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002420 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002421 if (format_map & (1 << i))
2422 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002423
2424
Chris Wilsonc5521702010-08-04 13:50:28 +01002425 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002426 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2427 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002428 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002429 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002430
Chris Wilson615fb932010-08-04 13:50:24 +01002431 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002432 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002433 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002434 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002435
Chris Wilson40039752010-08-04 13:50:26 +01002436 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002437 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002438 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002439 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002440
2441}
2442
Chris Wilsonc5521702010-08-04 13:50:28 +01002443#define ENHANCEMENT(name, NAME) do { \
2444 if (enhancements.name) { \
2445 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2446 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2447 return false; \
2448 intel_sdvo_connector->max_##name = data_value[0]; \
2449 intel_sdvo_connector->cur_##name = response; \
2450 intel_sdvo_connector->name = \
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002451 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
Chris Wilsonc5521702010-08-04 13:50:28 +01002452 if (!intel_sdvo_connector->name) return false; \
Chris Wilsonc5521702010-08-04 13:50:28 +01002453 drm_connector_attach_property(connector, \
2454 intel_sdvo_connector->name, \
2455 intel_sdvo_connector->cur_##name); \
2456 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2457 data_value[0], data_value[1], response); \
2458 } \
Akshay Joshi0206e352011-08-16 15:34:10 -04002459} while (0)
Chris Wilsonc5521702010-08-04 13:50:28 +01002460
2461static bool
2462intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2463 struct intel_sdvo_connector *intel_sdvo_connector,
2464 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002465{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002466 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002467 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002468 uint16_t response, data_value[2];
2469
Chris Wilsonc5521702010-08-04 13:50:28 +01002470 /* when horizontal overscan is supported, Add the left/right property */
2471 if (enhancements.overscan_h) {
2472 if (!intel_sdvo_get_value(intel_sdvo,
2473 SDVO_CMD_GET_MAX_OVERSCAN_H,
2474 &data_value, 4))
2475 return false;
2476
2477 if (!intel_sdvo_get_value(intel_sdvo,
2478 SDVO_CMD_GET_OVERSCAN_H,
2479 &response, 2))
2480 return false;
2481
2482 intel_sdvo_connector->max_hscan = data_value[0];
2483 intel_sdvo_connector->left_margin = data_value[0] - response;
2484 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2485 intel_sdvo_connector->left =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002486 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002487 if (!intel_sdvo_connector->left)
2488 return false;
2489
Chris Wilsonc5521702010-08-04 13:50:28 +01002490 drm_connector_attach_property(connector,
2491 intel_sdvo_connector->left,
2492 intel_sdvo_connector->left_margin);
2493
2494 intel_sdvo_connector->right =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002495 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002496 if (!intel_sdvo_connector->right)
2497 return false;
2498
Chris Wilsonc5521702010-08-04 13:50:28 +01002499 drm_connector_attach_property(connector,
2500 intel_sdvo_connector->right,
2501 intel_sdvo_connector->right_margin);
2502 DRM_DEBUG_KMS("h_overscan: max %d, "
2503 "default %d, current %d\n",
2504 data_value[0], data_value[1], response);
2505 }
2506
2507 if (enhancements.overscan_v) {
2508 if (!intel_sdvo_get_value(intel_sdvo,
2509 SDVO_CMD_GET_MAX_OVERSCAN_V,
2510 &data_value, 4))
2511 return false;
2512
2513 if (!intel_sdvo_get_value(intel_sdvo,
2514 SDVO_CMD_GET_OVERSCAN_V,
2515 &response, 2))
2516 return false;
2517
2518 intel_sdvo_connector->max_vscan = data_value[0];
2519 intel_sdvo_connector->top_margin = data_value[0] - response;
2520 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2521 intel_sdvo_connector->top =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002522 drm_property_create_range(dev, 0,
2523 "top_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002524 if (!intel_sdvo_connector->top)
2525 return false;
2526
Chris Wilsonc5521702010-08-04 13:50:28 +01002527 drm_connector_attach_property(connector,
2528 intel_sdvo_connector->top,
2529 intel_sdvo_connector->top_margin);
2530
2531 intel_sdvo_connector->bottom =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002532 drm_property_create_range(dev, 0,
2533 "bottom_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002534 if (!intel_sdvo_connector->bottom)
2535 return false;
2536
Chris Wilsonc5521702010-08-04 13:50:28 +01002537 drm_connector_attach_property(connector,
2538 intel_sdvo_connector->bottom,
2539 intel_sdvo_connector->bottom_margin);
2540 DRM_DEBUG_KMS("v_overscan: max %d, "
2541 "default %d, current %d\n",
2542 data_value[0], data_value[1], response);
2543 }
2544
2545 ENHANCEMENT(hpos, HPOS);
2546 ENHANCEMENT(vpos, VPOS);
2547 ENHANCEMENT(saturation, SATURATION);
2548 ENHANCEMENT(contrast, CONTRAST);
2549 ENHANCEMENT(hue, HUE);
2550 ENHANCEMENT(sharpness, SHARPNESS);
2551 ENHANCEMENT(brightness, BRIGHTNESS);
2552 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2553 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2554 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2555 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2556 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2557
Chris Wilsone0442182010-08-04 13:50:29 +01002558 if (enhancements.dot_crawl) {
2559 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2560 return false;
2561
2562 intel_sdvo_connector->max_dot_crawl = 1;
2563 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2564 intel_sdvo_connector->dot_crawl =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002565 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
Chris Wilsone0442182010-08-04 13:50:29 +01002566 if (!intel_sdvo_connector->dot_crawl)
2567 return false;
2568
Chris Wilsone0442182010-08-04 13:50:29 +01002569 drm_connector_attach_property(connector,
2570 intel_sdvo_connector->dot_crawl,
2571 intel_sdvo_connector->cur_dot_crawl);
2572 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2573 }
2574
Chris Wilsonc5521702010-08-04 13:50:28 +01002575 return true;
2576}
2577
2578static bool
2579intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2580 struct intel_sdvo_connector *intel_sdvo_connector,
2581 struct intel_sdvo_enhancements_reply enhancements)
2582{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002583 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002584 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2585 uint16_t response, data_value[2];
2586
2587 ENHANCEMENT(brightness, BRIGHTNESS);
2588
2589 return true;
2590}
2591#undef ENHANCEMENT
2592
2593static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2594 struct intel_sdvo_connector *intel_sdvo_connector)
2595{
2596 union {
2597 struct intel_sdvo_enhancements_reply reply;
2598 uint16_t response;
2599 } enhancements;
2600
Chris Wilson1a3665c2011-01-25 13:59:37 +00002601 BUILD_BUG_ON(sizeof(enhancements) != 2);
2602
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002603 enhancements.response = 0;
2604 intel_sdvo_get_value(intel_sdvo,
2605 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2606 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002607 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002608 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002609 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002610 }
Chris Wilson32aad862010-08-04 13:50:25 +01002611
Chris Wilsonc5521702010-08-04 13:50:28 +01002612 if (IS_TV(intel_sdvo_connector))
2613 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
Akshay Joshi0206e352011-08-16 15:34:10 -04002614 else if (IS_LVDS(intel_sdvo_connector))
Chris Wilsonc5521702010-08-04 13:50:28 +01002615 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2616 else
2617 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002618}
Chris Wilson32aad862010-08-04 13:50:25 +01002619
Chris Wilsone957d772010-09-24 12:52:03 +01002620static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2621 struct i2c_msg *msgs,
2622 int num)
2623{
2624 struct intel_sdvo *sdvo = adapter->algo_data;
2625
2626 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2627 return -EIO;
2628
2629 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2630}
2631
2632static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2633{
2634 struct intel_sdvo *sdvo = adapter->algo_data;
2635 return sdvo->i2c->algo->functionality(sdvo->i2c);
2636}
2637
2638static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2639 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2640 .functionality = intel_sdvo_ddc_proxy_func
2641};
2642
2643static bool
2644intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2645 struct drm_device *dev)
2646{
2647 sdvo->ddc.owner = THIS_MODULE;
2648 sdvo->ddc.class = I2C_CLASS_DDC;
2649 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2650 sdvo->ddc.dev.parent = &dev->pdev->dev;
2651 sdvo->ddc.algo_data = sdvo;
2652 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2653
2654 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002655}
2656
Daniel Vettereef4eac2012-03-23 23:43:35 +01002657bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
Jesse Barnes79e53942008-11-07 14:24:08 -08002658{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002659 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002660 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002661 struct intel_sdvo *intel_sdvo;
Chris Wilson084b6122012-05-11 18:01:33 +01002662 u32 hotplug_mask;
Jesse Barnes79e53942008-11-07 14:24:08 -08002663 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002664
Chris Wilsonea5b2132010-08-04 13:50:23 +01002665 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2666 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002667 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002668
Chris Wilson56184e32011-05-17 14:03:50 +01002669 intel_sdvo->sdvo_reg = sdvo_reg;
Daniel Vettereef4eac2012-03-23 23:43:35 +01002670 intel_sdvo->is_sdvob = is_sdvob;
2671 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
Chris Wilson56184e32011-05-17 14:03:50 +01002672 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Chris Wilsone957d772010-09-24 12:52:03 +01002673 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2674 kfree(intel_sdvo);
2675 return false;
2676 }
2677
Chris Wilson56184e32011-05-17 14:03:50 +01002678 /* encoder type will be decided later */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002679 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002680 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002681 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002682
Jesse Barnes79e53942008-11-07 14:24:08 -08002683 /* Read the regs to test if we can talk to the device */
2684 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002685 u8 byte;
2686
2687 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002688 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2689 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002690 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002691 }
2692 }
2693
Chris Wilson084b6122012-05-11 18:01:33 +01002694 hotplug_mask = 0;
2695 if (IS_G4X(dev)) {
2696 hotplug_mask = intel_sdvo->is_sdvob ?
2697 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2698 } else if (IS_GEN4(dev)) {
2699 hotplug_mask = intel_sdvo->is_sdvob ?
2700 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2701 } else {
2702 hotplug_mask = intel_sdvo->is_sdvob ?
2703 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2704 }
Ma Ling619ac3b2009-05-18 16:12:46 +08002705
Chris Wilson4ef69c72010-09-09 15:14:28 +01002706 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002707
Daniel Vetterce22c322012-07-01 15:31:04 +02002708 intel_encoder->disable = intel_disable_sdvo;
2709 intel_encoder->enable = intel_enable_sdvo;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02002710 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
Daniel Vetterce22c322012-07-01 15:31:04 +02002711
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002712 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002713 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002714 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002715
Chris Wilsonea5b2132010-08-04 13:50:23 +01002716 if (intel_sdvo_output_setup(intel_sdvo,
2717 intel_sdvo->caps.output_flags) != true) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002718 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2719 SDVO_NAME(intel_sdvo));
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002720 /* Output_setup can leave behind connectors! */
2721 goto err_output;
Jesse Barnes79e53942008-11-07 14:24:08 -08002722 }
2723
Jani Nikulafcbc50d2012-08-29 14:08:42 +03002724 /* Only enable the hotplug irq if we need it, to work around noisy
2725 * hotplug lines.
2726 */
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002727 if (intel_sdvo->hotplug_active)
Jani Nikulafcbc50d2012-08-29 14:08:42 +03002728 dev_priv->hotplug_supported_mask |= hotplug_mask;
2729
Chris Wilsonea5b2132010-08-04 13:50:23 +01002730 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002731
Jesse Barnes79e53942008-11-07 14:24:08 -08002732 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002733 if (!intel_sdvo_set_target_input(intel_sdvo))
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002734 goto err_output;
Jesse Barnes79e53942008-11-07 14:24:08 -08002735
Chris Wilson32aad862010-08-04 13:50:25 +01002736 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2737 &intel_sdvo->pixel_clock_min,
2738 &intel_sdvo->pixel_clock_max))
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002739 goto err_output;
Jesse Barnes79e53942008-11-07 14:24:08 -08002740
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002741 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002742 "clock range %dMHz - %dMHz, "
2743 "input 1: %c, input 2: %c, "
2744 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002745 SDVO_NAME(intel_sdvo),
2746 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2747 intel_sdvo->caps.device_rev_id,
2748 intel_sdvo->pixel_clock_min / 1000,
2749 intel_sdvo->pixel_clock_max / 1000,
2750 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2751 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002752 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002753 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002754 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002755 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002756 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002757 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002758
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002759err_output:
2760 intel_sdvo_output_cleanup(intel_sdvo);
2761
Chris Wilsonf899fc62010-07-20 15:44:45 -07002762err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002763 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002764 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002765 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002766
Eric Anholt7d573822009-01-02 13:33:00 -08002767 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002768}