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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Francois Romieu07d3f512007-02-21 22:40:46 +01002 * r8169.c: RealTek 8169/8168/8101 ethernet driver.
3 *
4 * Copyright (c) 2002 ShuChen <shuchen@realtek.com.tw>
5 * Copyright (c) 2003 - 2007 Francois Romieu <romieu@fr.zoreil.com>
6 * Copyright (c) a lot of people too. Please respect their work.
7 *
8 * See MAINTAINERS file for support contact information.
Linus Torvalds1da177e2005-04-16 15:20:36 -07009 */
10
11#include <linux/module.h>
12#include <linux/moduleparam.h>
13#include <linux/pci.h>
14#include <linux/netdevice.h>
15#include <linux/etherdevice.h>
16#include <linux/delay.h>
17#include <linux/ethtool.h>
18#include <linux/mii.h>
19#include <linux/if_vlan.h>
20#include <linux/crc32.h>
21#include <linux/in.h>
22#include <linux/ip.h>
23#include <linux/tcp.h>
24#include <linux/init.h>
25#include <linux/dma-mapping.h>
Rafael J. Wysockie1759442010-03-14 14:33:51 +000026#include <linux/pm_runtime.h>
françois romieubca03d52011-01-03 15:07:31 +000027#include <linux/firmware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070028
Francois Romieu99f252b2007-04-02 22:59:59 +020029#include <asm/system.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070030#include <asm/io.h>
31#include <asm/irq.h>
32
Francois Romieu865c6522008-05-11 14:51:00 +020033#define RTL8169_VERSION "2.3LK-NAPI"
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#define MODULENAME "r8169"
35#define PFX MODULENAME ": "
36
françois romieubca03d52011-01-03 15:07:31 +000037#define FIRMWARE_8168D_1 "rtl_nic/rtl8168d-1.fw"
38#define FIRMWARE_8168D_2 "rtl_nic/rtl8168d-2.fw"
39
Linus Torvalds1da177e2005-04-16 15:20:36 -070040#ifdef RTL8169_DEBUG
41#define assert(expr) \
Francois Romieu5b0384f2006-08-16 16:00:01 +020042 if (!(expr)) { \
43 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
Harvey Harrisonb39d66a2008-08-20 16:52:04 -070044 #expr,__FILE__,__func__,__LINE__); \
Francois Romieu5b0384f2006-08-16 16:00:01 +020045 }
Joe Perches06fa7352007-10-18 21:15:00 +020046#define dprintk(fmt, args...) \
47 do { printk(KERN_DEBUG PFX fmt, ## args); } while (0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070048#else
49#define assert(expr) do {} while (0)
50#define dprintk(fmt, args...) do {} while (0)
51#endif /* RTL8169_DEBUG */
52
Stephen Hemmingerb57b7e52005-05-27 21:11:52 +020053#define R8169_MSG_DEFAULT \
Francois Romieuf0e837d2005-09-30 16:54:02 -070054 (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
Stephen Hemmingerb57b7e52005-05-27 21:11:52 +020055
Linus Torvalds1da177e2005-04-16 15:20:36 -070056#define TX_BUFFS_AVAIL(tp) \
57 (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
58
Linus Torvalds1da177e2005-04-16 15:20:36 -070059/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
60 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
Arjan van de Venf71e1302006-03-03 21:33:57 -050061static const int multicast_filter_limit = 32;
Linus Torvalds1da177e2005-04-16 15:20:36 -070062
63/* MAC address length */
64#define MAC_ADDR_LEN 6
65
Francois Romieu9c14cea2008-07-05 00:21:15 +020066#define MAX_READ_REQUEST_SHIFT 12
Linus Torvalds1da177e2005-04-16 15:20:36 -070067#define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
68#define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
69#define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070070#define SafeMtu 0x1c20 /* ... actually life sucks beyond ~7k */
71#define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
72
73#define R8169_REGS_SIZE 256
74#define R8169_NAPI_WEIGHT 64
75#define NUM_TX_DESC 64 /* Number of Tx descriptor registers */
76#define NUM_RX_DESC 256 /* Number of Rx descriptor registers */
77#define RX_BUF_SIZE 1536 /* Rx Buffer size */
78#define R8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
79#define R8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
80
81#define RTL8169_TX_TIMEOUT (6*HZ)
82#define RTL8169_PHY_TIMEOUT (10*HZ)
83
françois romieuea8dbdd2009-03-15 01:10:50 +000084#define RTL_EEPROM_SIG cpu_to_le32(0x8129)
85#define RTL_EEPROM_SIG_MASK cpu_to_le32(0xffff)
Francois Romieue1564ec2008-10-16 22:46:13 +020086#define RTL_EEPROM_SIG_ADDR 0x0000
87
Linus Torvalds1da177e2005-04-16 15:20:36 -070088/* write/read MMIO register */
89#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
90#define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
91#define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
92#define RTL_R8(reg) readb (ioaddr + (reg))
93#define RTL_R16(reg) readw (ioaddr + (reg))
Junchang Wang06f555f2010-05-30 02:26:07 +000094#define RTL_R32(reg) readl (ioaddr + (reg))
Linus Torvalds1da177e2005-04-16 15:20:36 -070095
96enum mac_version {
Jean Delvaref21b75e2009-05-26 20:54:48 -070097 RTL_GIGA_MAC_NONE = 0x00,
Francois Romieuba6eb6e2007-06-11 23:35:18 +020098 RTL_GIGA_MAC_VER_01 = 0x01, // 8169
99 RTL_GIGA_MAC_VER_02 = 0x02, // 8169S
100 RTL_GIGA_MAC_VER_03 = 0x03, // 8110S
101 RTL_GIGA_MAC_VER_04 = 0x04, // 8169SB
102 RTL_GIGA_MAC_VER_05 = 0x05, // 8110SCd
Francois Romieu6dccd162007-02-13 23:38:05 +0100103 RTL_GIGA_MAC_VER_06 = 0x06, // 8110SCe
Francois Romieu2857ffb2008-08-02 21:08:49 +0200104 RTL_GIGA_MAC_VER_07 = 0x07, // 8102e
105 RTL_GIGA_MAC_VER_08 = 0x08, // 8102e
106 RTL_GIGA_MAC_VER_09 = 0x09, // 8102e
107 RTL_GIGA_MAC_VER_10 = 0x0a, // 8101e
Francois Romieu2dd99532007-06-11 23:22:52 +0200108 RTL_GIGA_MAC_VER_11 = 0x0b, // 8168Bb
Francois Romieue3cf0cc2007-08-17 14:55:46 +0200109 RTL_GIGA_MAC_VER_12 = 0x0c, // 8168Be
110 RTL_GIGA_MAC_VER_13 = 0x0d, // 8101Eb
111 RTL_GIGA_MAC_VER_14 = 0x0e, // 8101 ?
112 RTL_GIGA_MAC_VER_15 = 0x0f, // 8101 ?
113 RTL_GIGA_MAC_VER_16 = 0x11, // 8101Ec
114 RTL_GIGA_MAC_VER_17 = 0x10, // 8168Bf
115 RTL_GIGA_MAC_VER_18 = 0x12, // 8168CP
116 RTL_GIGA_MAC_VER_19 = 0x13, // 8168C
Francois Romieu197ff762008-06-28 13:16:02 +0200117 RTL_GIGA_MAC_VER_20 = 0x14, // 8168C
Francois Romieu6fb07052008-06-29 11:54:28 +0200118 RTL_GIGA_MAC_VER_21 = 0x15, // 8168C
Francois Romieuef3386f2008-06-29 12:24:30 +0200119 RTL_GIGA_MAC_VER_22 = 0x16, // 8168C
Francois Romieu7f3e3d32008-07-20 18:53:20 +0200120 RTL_GIGA_MAC_VER_23 = 0x17, // 8168CP
Francois Romieu5b538df2008-07-20 16:22:45 +0200121 RTL_GIGA_MAC_VER_24 = 0x18, // 8168CP
françois romieudaf9df62009-10-07 12:44:20 +0000122 RTL_GIGA_MAC_VER_25 = 0x19, // 8168D
123 RTL_GIGA_MAC_VER_26 = 0x1a, // 8168D
124 RTL_GIGA_MAC_VER_27 = 0x1b // 8168DP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125};
126
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127#define _R(NAME,MAC,MASK) \
128 { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
129
Jesper Juhl3c6bee12006-01-09 20:54:01 -0800130static const struct {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131 const char *name;
132 u8 mac_version;
133 u32 RxConfigMask; /* Clears the bits supported by this chip */
134} rtl_chip_info[] = {
Francois Romieuba6eb6e2007-06-11 23:35:18 +0200135 _R("RTL8169", RTL_GIGA_MAC_VER_01, 0xff7e1880), // 8169
136 _R("RTL8169s", RTL_GIGA_MAC_VER_02, 0xff7e1880), // 8169S
137 _R("RTL8110s", RTL_GIGA_MAC_VER_03, 0xff7e1880), // 8110S
138 _R("RTL8169sb/8110sb", RTL_GIGA_MAC_VER_04, 0xff7e1880), // 8169SB
139 _R("RTL8169sc/8110sc", RTL_GIGA_MAC_VER_05, 0xff7e1880), // 8110SCd
Francois Romieu6dccd162007-02-13 23:38:05 +0100140 _R("RTL8169sc/8110sc", RTL_GIGA_MAC_VER_06, 0xff7e1880), // 8110SCe
Francois Romieu2857ffb2008-08-02 21:08:49 +0200141 _R("RTL8102e", RTL_GIGA_MAC_VER_07, 0xff7e1880), // PCI-E
142 _R("RTL8102e", RTL_GIGA_MAC_VER_08, 0xff7e1880), // PCI-E
143 _R("RTL8102e", RTL_GIGA_MAC_VER_09, 0xff7e1880), // PCI-E
144 _R("RTL8101e", RTL_GIGA_MAC_VER_10, 0xff7e1880), // PCI-E
Francois Romieubcf0bf92006-07-26 23:14:13 +0200145 _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_11, 0xff7e1880), // PCI-E
146 _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_12, 0xff7e1880), // PCI-E
147 _R("RTL8101e", RTL_GIGA_MAC_VER_13, 0xff7e1880), // PCI-E 8139
148 _R("RTL8100e", RTL_GIGA_MAC_VER_14, 0xff7e1880), // PCI-E 8139
Francois Romieue3cf0cc2007-08-17 14:55:46 +0200149 _R("RTL8100e", RTL_GIGA_MAC_VER_15, 0xff7e1880), // PCI-E 8139
150 _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_17, 0xff7e1880), // PCI-E
151 _R("RTL8101e", RTL_GIGA_MAC_VER_16, 0xff7e1880), // PCI-E
152 _R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_18, 0xff7e1880), // PCI-E
153 _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_19, 0xff7e1880), // PCI-E
Francois Romieu197ff762008-06-28 13:16:02 +0200154 _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_20, 0xff7e1880), // PCI-E
Francois Romieu6fb07052008-06-29 11:54:28 +0200155 _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_21, 0xff7e1880), // PCI-E
Francois Romieuef3386f2008-06-29 12:24:30 +0200156 _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_22, 0xff7e1880), // PCI-E
Francois Romieu7f3e3d32008-07-20 18:53:20 +0200157 _R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_23, 0xff7e1880), // PCI-E
Francois Romieu5b538df2008-07-20 16:22:45 +0200158 _R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_24, 0xff7e1880), // PCI-E
françois romieudaf9df62009-10-07 12:44:20 +0000159 _R("RTL8168d/8111d", RTL_GIGA_MAC_VER_25, 0xff7e1880), // PCI-E
160 _R("RTL8168d/8111d", RTL_GIGA_MAC_VER_26, 0xff7e1880), // PCI-E
161 _R("RTL8168dp/8111dp", RTL_GIGA_MAC_VER_27, 0xff7e1880) // PCI-E
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162};
163#undef _R
164
Francois Romieubcf0bf92006-07-26 23:14:13 +0200165enum cfg_version {
166 RTL_CFG_0 = 0x00,
167 RTL_CFG_1,
168 RTL_CFG_2
169};
170
Francois Romieu07ce4062007-02-23 23:36:39 +0100171static void rtl_hw_start_8169(struct net_device *);
172static void rtl_hw_start_8168(struct net_device *);
173static void rtl_hw_start_8101(struct net_device *);
174
Alexey Dobriyana3aa1882010-01-07 11:58:11 +0000175static DEFINE_PCI_DEVICE_TABLE(rtl8169_pci_tbl) = {
Francois Romieubcf0bf92006-07-26 23:14:13 +0200176 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8129), 0, 0, RTL_CFG_0 },
Francois Romieud2eed8c2006-08-31 22:01:07 +0200177 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8136), 0, 0, RTL_CFG_2 },
Francois Romieud81bf552006-09-20 21:31:20 +0200178 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8167), 0, 0, RTL_CFG_0 },
Francois Romieu07ce4062007-02-23 23:36:39 +0100179 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8168), 0, 0, RTL_CFG_1 },
Francois Romieubcf0bf92006-07-26 23:14:13 +0200180 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8169), 0, 0, RTL_CFG_0 },
181 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4300), 0, 0, RTL_CFG_0 },
Francois Romieubc1660b2007-10-12 23:58:09 +0200182 { PCI_DEVICE(PCI_VENDOR_ID_AT, 0xc107), 0, 0, RTL_CFG_0 },
Francois Romieubcf0bf92006-07-26 23:14:13 +0200183 { PCI_DEVICE(0x16ec, 0x0116), 0, 0, RTL_CFG_0 },
184 { PCI_VENDOR_ID_LINKSYS, 0x1032,
185 PCI_ANY_ID, 0x0024, 0, 0, RTL_CFG_0 },
Ciaran McCreesh11d2e282007-11-01 22:48:15 +0100186 { 0x0001, 0x8168,
187 PCI_ANY_ID, 0x2410, 0, 0, RTL_CFG_2 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700188 {0,},
189};
190
191MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
192
Eric Dumazet6f0333b2010-10-11 11:17:47 +0000193static int rx_buf_sz = 16383;
David S. Miller4300e8c2010-03-26 10:23:30 -0700194static int use_dac;
Stephen Hemmingerb57b7e52005-05-27 21:11:52 +0200195static struct {
196 u32 msg_enable;
197} debug = { -1 };
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198
Francois Romieu07d3f512007-02-21 22:40:46 +0100199enum rtl_registers {
200 MAC0 = 0, /* Ethernet hardware address. */
Francois Romieu773d2022007-01-31 23:47:43 +0100201 MAC4 = 4,
Francois Romieu07d3f512007-02-21 22:40:46 +0100202 MAR0 = 8, /* Multicast filter. */
203 CounterAddrLow = 0x10,
204 CounterAddrHigh = 0x14,
205 TxDescStartAddrLow = 0x20,
206 TxDescStartAddrHigh = 0x24,
207 TxHDescStartAddrLow = 0x28,
208 TxHDescStartAddrHigh = 0x2c,
209 FLASH = 0x30,
210 ERSR = 0x36,
211 ChipCmd = 0x37,
212 TxPoll = 0x38,
213 IntrMask = 0x3c,
214 IntrStatus = 0x3e,
215 TxConfig = 0x40,
216 RxConfig = 0x44,
217 RxMissed = 0x4c,
218 Cfg9346 = 0x50,
219 Config0 = 0x51,
220 Config1 = 0x52,
221 Config2 = 0x53,
222 Config3 = 0x54,
223 Config4 = 0x55,
224 Config5 = 0x56,
225 MultiIntr = 0x5c,
226 PHYAR = 0x60,
Francois Romieu07d3f512007-02-21 22:40:46 +0100227 PHYstatus = 0x6c,
228 RxMaxSize = 0xda,
229 CPlusCmd = 0xe0,
230 IntrMitigate = 0xe2,
231 RxDescAddrLow = 0xe4,
232 RxDescAddrHigh = 0xe8,
françois romieuf0298f82011-01-03 15:07:42 +0000233 EarlyTxThres = 0xec, /* 8169. Unit of 32 bytes. */
234
235#define NoEarlyTx 0x3f /* Max value : no early transmit. */
236
237 MaxTxPacketSize = 0xec, /* 8101/8168. Unit of 128 bytes. */
238
239#define TxPacketMax (8064 >> 7)
240
Francois Romieu07d3f512007-02-21 22:40:46 +0100241 FuncEvent = 0xf0,
242 FuncEventMask = 0xf4,
243 FuncPresetState = 0xf8,
244 FuncForceEvent = 0xfc,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245};
246
Francois Romieuf162a5d2008-06-01 22:37:49 +0200247enum rtl8110_registers {
248 TBICSR = 0x64,
249 TBI_ANAR = 0x68,
250 TBI_LPAR = 0x6a,
251};
252
253enum rtl8168_8101_registers {
254 CSIDR = 0x64,
255 CSIAR = 0x68,
256#define CSIAR_FLAG 0x80000000
257#define CSIAR_WRITE_CMD 0x80000000
258#define CSIAR_BYTE_ENABLE 0x0f
259#define CSIAR_BYTE_ENABLE_SHIFT 12
260#define CSIAR_ADDR_MASK 0x0fff
françois romieu065c27c2011-01-03 15:08:12 +0000261 PMCH = 0x6f,
Francois Romieuf162a5d2008-06-01 22:37:49 +0200262 EPHYAR = 0x80,
263#define EPHYAR_FLAG 0x80000000
264#define EPHYAR_WRITE_CMD 0x80000000
265#define EPHYAR_REG_MASK 0x1f
266#define EPHYAR_REG_SHIFT 16
267#define EPHYAR_DATA_MASK 0xffff
268 DBG_REG = 0xd1,
269#define FIX_NAK_1 (1 << 4)
270#define FIX_NAK_2 (1 << 3)
françois romieudaf9df62009-10-07 12:44:20 +0000271 EFUSEAR = 0xdc,
272#define EFUSEAR_FLAG 0x80000000
273#define EFUSEAR_WRITE_CMD 0x80000000
274#define EFUSEAR_READ_CMD 0x00000000
275#define EFUSEAR_REG_MASK 0x03ff
276#define EFUSEAR_REG_SHIFT 8
277#define EFUSEAR_DATA_MASK 0xff
Francois Romieuf162a5d2008-06-01 22:37:49 +0200278};
279
françois romieuc0e45c12011-01-03 15:08:04 +0000280enum rtl8168_registers {
françois romieub646d902011-01-03 15:08:21 +0000281 ERIDR = 0x70,
282 ERIAR = 0x74,
283#define ERIAR_FLAG 0x80000000
284#define ERIAR_WRITE_CMD 0x80000000
285#define ERIAR_READ_CMD 0x00000000
286#define ERIAR_ADDR_BYTE_ALIGN 4
287#define ERIAR_EXGMAC 0
288#define ERIAR_MSIX 1
289#define ERIAR_ASF 2
290#define ERIAR_TYPE_SHIFT 16
291#define ERIAR_BYTEEN 0x0f
292#define ERIAR_BYTEEN_SHIFT 12
françois romieuc0e45c12011-01-03 15:08:04 +0000293 EPHY_RXER_NUM = 0x7c,
294 OCPDR = 0xb0, /* OCP GPHY access */
295#define OCPDR_WRITE_CMD 0x80000000
296#define OCPDR_READ_CMD 0x00000000
297#define OCPDR_REG_MASK 0x7f
298#define OCPDR_GPHY_REG_SHIFT 16
299#define OCPDR_DATA_MASK 0xffff
300 OCPAR = 0xb4,
301#define OCPAR_FLAG 0x80000000
302#define OCPAR_GPHY_WRITE_CMD 0x8000f060
303#define OCPAR_GPHY_READ_CMD 0x0000f060
304};
305
Francois Romieu07d3f512007-02-21 22:40:46 +0100306enum rtl_register_content {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700307 /* InterruptStatusBits */
Francois Romieu07d3f512007-02-21 22:40:46 +0100308 SYSErr = 0x8000,
309 PCSTimeout = 0x4000,
310 SWInt = 0x0100,
311 TxDescUnavail = 0x0080,
312 RxFIFOOver = 0x0040,
313 LinkChg = 0x0020,
314 RxOverflow = 0x0010,
315 TxErr = 0x0008,
316 TxOK = 0x0004,
317 RxErr = 0x0002,
318 RxOK = 0x0001,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700319
320 /* RxStatusDesc */
Francois Romieu9dccf612006-05-14 12:31:17 +0200321 RxFOVF = (1 << 23),
322 RxRWT = (1 << 22),
323 RxRES = (1 << 21),
324 RxRUNT = (1 << 20),
325 RxCRC = (1 << 19),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700326
327 /* ChipCmdBits */
Francois Romieu07d3f512007-02-21 22:40:46 +0100328 CmdReset = 0x10,
329 CmdRxEnb = 0x08,
330 CmdTxEnb = 0x04,
331 RxBufEmpty = 0x01,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700332
Francois Romieu275391a2007-02-23 23:50:28 +0100333 /* TXPoll register p.5 */
334 HPQ = 0x80, /* Poll cmd on the high prio queue */
335 NPQ = 0x40, /* Poll cmd on the low prio queue */
336 FSWInt = 0x01, /* Forced software interrupt */
337
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338 /* Cfg9346Bits */
Francois Romieu07d3f512007-02-21 22:40:46 +0100339 Cfg9346_Lock = 0x00,
340 Cfg9346_Unlock = 0xc0,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700341
342 /* rx_mode_bits */
Francois Romieu07d3f512007-02-21 22:40:46 +0100343 AcceptErr = 0x20,
344 AcceptRunt = 0x10,
345 AcceptBroadcast = 0x08,
346 AcceptMulticast = 0x04,
347 AcceptMyPhys = 0x02,
348 AcceptAllPhys = 0x01,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700349
350 /* RxConfigBits */
Francois Romieu07d3f512007-02-21 22:40:46 +0100351 RxCfgFIFOShift = 13,
352 RxCfgDMAShift = 8,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353
354 /* TxConfigBits */
355 TxInterFrameGapShift = 24,
356 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
357
Francois Romieu5d06a992006-02-23 00:47:58 +0100358 /* Config1 register p.24 */
Francois Romieuf162a5d2008-06-01 22:37:49 +0200359 LEDS1 = (1 << 7),
360 LEDS0 = (1 << 6),
Francois Romieufbac58f2007-10-04 22:51:38 +0200361 MSIEnable = (1 << 5), /* Enable Message Signaled Interrupt */
Francois Romieuf162a5d2008-06-01 22:37:49 +0200362 Speed_down = (1 << 4),
363 MEMMAP = (1 << 3),
364 IOMAP = (1 << 2),
365 VPD = (1 << 1),
Francois Romieu5d06a992006-02-23 00:47:58 +0100366 PMEnable = (1 << 0), /* Power Management Enable */
367
Francois Romieu6dccd162007-02-13 23:38:05 +0100368 /* Config2 register p. 25 */
369 PCI_Clock_66MHz = 0x01,
370 PCI_Clock_33MHz = 0x00,
371
Francois Romieu61a4dcc2006-02-23 00:55:25 +0100372 /* Config3 register p.25 */
373 MagicPacket = (1 << 5), /* Wake up when receives a Magic Packet */
374 LinkUp = (1 << 4), /* Wake up when the cable connection is re-established */
Francois Romieuf162a5d2008-06-01 22:37:49 +0200375 Beacon_en = (1 << 0), /* 8168 only. Reserved in the 8168b */
Francois Romieu61a4dcc2006-02-23 00:55:25 +0100376
Francois Romieu5d06a992006-02-23 00:47:58 +0100377 /* Config5 register p.27 */
Francois Romieu61a4dcc2006-02-23 00:55:25 +0100378 BWF = (1 << 6), /* Accept Broadcast wakeup frame */
379 MWF = (1 << 5), /* Accept Multicast wakeup frame */
380 UWF = (1 << 4), /* Accept Unicast wakeup frame */
381 LanWake = (1 << 1), /* LanWake enable/disable */
Francois Romieu5d06a992006-02-23 00:47:58 +0100382 PMEStatus = (1 << 0), /* PME status can be reset by PCI RST# */
383
Linus Torvalds1da177e2005-04-16 15:20:36 -0700384 /* TBICSR p.28 */
385 TBIReset = 0x80000000,
386 TBILoopback = 0x40000000,
387 TBINwEnable = 0x20000000,
388 TBINwRestart = 0x10000000,
389 TBILinkOk = 0x02000000,
390 TBINwComplete = 0x01000000,
391
392 /* CPlusCmd p.31 */
Francois Romieuf162a5d2008-06-01 22:37:49 +0200393 EnableBist = (1 << 15), // 8168 8101
394 Mac_dbgo_oe = (1 << 14), // 8168 8101
395 Normal_mode = (1 << 13), // unused
396 Force_half_dup = (1 << 12), // 8168 8101
397 Force_rxflow_en = (1 << 11), // 8168 8101
398 Force_txflow_en = (1 << 10), // 8168 8101
399 Cxpl_dbg_sel = (1 << 9), // 8168 8101
400 ASF = (1 << 8), // 8168 8101
401 PktCntrDisable = (1 << 7), // 8168 8101
402 Mac_dbgo_sel = 0x001c, // 8168
Linus Torvalds1da177e2005-04-16 15:20:36 -0700403 RxVlan = (1 << 6),
404 RxChkSum = (1 << 5),
405 PCIDAC = (1 << 4),
406 PCIMulRW = (1 << 3),
Francois Romieu0e485152007-02-20 00:00:26 +0100407 INTT_0 = 0x0000, // 8168
408 INTT_1 = 0x0001, // 8168
409 INTT_2 = 0x0002, // 8168
410 INTT_3 = 0x0003, // 8168
Linus Torvalds1da177e2005-04-16 15:20:36 -0700411
412 /* rtl8169_PHYstatus */
Francois Romieu07d3f512007-02-21 22:40:46 +0100413 TBI_Enable = 0x80,
414 TxFlowCtrl = 0x40,
415 RxFlowCtrl = 0x20,
416 _1000bpsF = 0x10,
417 _100bps = 0x08,
418 _10bps = 0x04,
419 LinkStatus = 0x02,
420 FullDup = 0x01,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700421
Linus Torvalds1da177e2005-04-16 15:20:36 -0700422 /* _TBICSRBit */
Francois Romieu07d3f512007-02-21 22:40:46 +0100423 TBILinkOK = 0x02000000,
Stephen Hemmingerd4a3a0f2005-05-27 21:11:56 +0200424
425 /* DumpCounterCommand */
Francois Romieu07d3f512007-02-21 22:40:46 +0100426 CounterDump = 0x8,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427};
428
Francois Romieu07d3f512007-02-21 22:40:46 +0100429enum desc_status_bit {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430 DescOwn = (1 << 31), /* Descriptor is owned by NIC */
431 RingEnd = (1 << 30), /* End of descriptor ring */
432 FirstFrag = (1 << 29), /* First segment of a packet */
433 LastFrag = (1 << 28), /* Final segment of a packet */
434
435 /* Tx private */
436 LargeSend = (1 << 27), /* TCP Large Send Offload (TSO) */
437 MSSShift = 16, /* MSS value position */
438 MSSMask = 0xfff, /* MSS value + LargeSend bit: 12 bits */
439 IPCS = (1 << 18), /* Calculate IP checksum */
440 UDPCS = (1 << 17), /* Calculate UDP/IP checksum */
441 TCPCS = (1 << 16), /* Calculate TCP/IP checksum */
442 TxVlanTag = (1 << 17), /* Add VLAN tag */
443
444 /* Rx private */
445 PID1 = (1 << 18), /* Protocol ID bit 1/2 */
446 PID0 = (1 << 17), /* Protocol ID bit 2/2 */
447
448#define RxProtoUDP (PID1)
449#define RxProtoTCP (PID0)
450#define RxProtoIP (PID1 | PID0)
451#define RxProtoMask RxProtoIP
452
453 IPFail = (1 << 16), /* IP checksum failed */
454 UDPFail = (1 << 15), /* UDP/IP checksum failed */
455 TCPFail = (1 << 14), /* TCP/IP checksum failed */
456 RxVlanTag = (1 << 16), /* VLAN tag available */
457};
458
459#define RsvdMask 0x3fffc000
460
461struct TxDesc {
Rolf Eike Beer6cccd6e2007-05-21 22:11:04 +0200462 __le32 opts1;
463 __le32 opts2;
464 __le64 addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700465};
466
467struct RxDesc {
Rolf Eike Beer6cccd6e2007-05-21 22:11:04 +0200468 __le32 opts1;
469 __le32 opts2;
470 __le64 addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700471};
472
473struct ring_info {
474 struct sk_buff *skb;
475 u32 len;
476 u8 __pad[sizeof(void *) - sizeof(u32)];
477};
478
Francois Romieuf23e7fd2007-10-04 22:36:14 +0200479enum features {
Francois Romieuccdffb92008-07-26 14:26:06 +0200480 RTL_FEATURE_WOL = (1 << 0),
481 RTL_FEATURE_MSI = (1 << 1),
482 RTL_FEATURE_GMII = (1 << 2),
Francois Romieuf23e7fd2007-10-04 22:36:14 +0200483};
484
Ivan Vecera355423d2009-02-06 21:49:57 -0800485struct rtl8169_counters {
486 __le64 tx_packets;
487 __le64 rx_packets;
488 __le64 tx_errors;
489 __le32 rx_errors;
490 __le16 rx_missed;
491 __le16 align_errors;
492 __le32 tx_one_collision;
493 __le32 tx_multi_collision;
494 __le64 rx_unicast;
495 __le64 rx_broadcast;
496 __le32 rx_multicast;
497 __le16 tx_aborted;
498 __le16 tx_underun;
499};
500
Linus Torvalds1da177e2005-04-16 15:20:36 -0700501struct rtl8169_private {
502 void __iomem *mmio_addr; /* memory map physical address */
503 struct pci_dev *pci_dev; /* Index of PCI device */
David Howellsc4028952006-11-22 14:57:56 +0000504 struct net_device *dev;
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700505 struct napi_struct napi;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700506 spinlock_t lock; /* spin lock flag */
Stephen Hemmingerb57b7e52005-05-27 21:11:52 +0200507 u32 msg_enable;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700508 int chipset;
509 int mac_version;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700510 u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
511 u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
512 u32 dirty_rx;
513 u32 dirty_tx;
514 struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
515 struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
516 dma_addr_t TxPhyAddr;
517 dma_addr_t RxPhyAddr;
Eric Dumazet6f0333b2010-10-11 11:17:47 +0000518 void *Rx_databuff[NUM_RX_DESC]; /* Rx data buffers */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700519 struct ring_info tx_skb[NUM_TX_DESC]; /* Tx data buffers */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700520 struct timer_list timer;
521 u16 cp_cmd;
Francois Romieu0e485152007-02-20 00:00:26 +0100522 u16 intr_event;
523 u16 napi_event;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700524 u16 intr_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700525 int phy_1000_ctrl_reg;
526#ifdef CONFIG_R8169_VLAN
527 struct vlan_group *vlgrp;
528#endif
françois romieuc0e45c12011-01-03 15:08:04 +0000529
530 struct mdio_ops {
531 void (*write)(void __iomem *, int, int);
532 int (*read)(void __iomem *, int);
533 } mdio_ops;
534
françois romieu065c27c2011-01-03 15:08:12 +0000535 struct pll_power_ops {
536 void (*down)(struct rtl8169_private *);
537 void (*up)(struct rtl8169_private *);
538 } pll_power_ops;
539
Linus Torvalds1da177e2005-04-16 15:20:36 -0700540 int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex);
Francois Romieuccdffb92008-07-26 14:26:06 +0200541 int (*get_settings)(struct net_device *, struct ethtool_cmd *);
françois romieu4da19632011-01-03 15:07:55 +0000542 void (*phy_reset_enable)(struct rtl8169_private *tp);
Francois Romieu07ce4062007-02-23 23:36:39 +0100543 void (*hw_start)(struct net_device *);
françois romieu4da19632011-01-03 15:07:55 +0000544 unsigned int (*phy_reset_pending)(struct rtl8169_private *tp);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700545 unsigned int (*link_ok)(void __iomem *);
Francois Romieu8b4ab282008-11-19 22:05:25 -0800546 int (*do_ioctl)(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd);
Francois Romieu9c14cea2008-07-05 00:21:15 +0200547 int pcie_cap;
David Howellsc4028952006-11-22 14:57:56 +0000548 struct delayed_work task;
Francois Romieuf23e7fd2007-10-04 22:36:14 +0200549 unsigned features;
Francois Romieuccdffb92008-07-26 14:26:06 +0200550
551 struct mii_if_info mii;
Ivan Vecera355423d2009-02-06 21:49:57 -0800552 struct rtl8169_counters counters;
Rafael J. Wysockie1759442010-03-14 14:33:51 +0000553 u32 saved_wolopts;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700554};
555
Ralf Baechle979b6c12005-06-13 14:30:40 -0700556MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700557MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700558module_param(use_dac, int, 0);
David S. Miller4300e8c2010-03-26 10:23:30 -0700559MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
Stephen Hemmingerb57b7e52005-05-27 21:11:52 +0200560module_param_named(debug, debug.msg_enable, int, 0);
561MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700562MODULE_LICENSE("GPL");
563MODULE_VERSION(RTL8169_VERSION);
françois romieubca03d52011-01-03 15:07:31 +0000564MODULE_FIRMWARE(FIRMWARE_8168D_1);
565MODULE_FIRMWARE(FIRMWARE_8168D_2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700566
567static int rtl8169_open(struct net_device *dev);
Stephen Hemminger613573252009-08-31 19:50:58 +0000568static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb,
569 struct net_device *dev);
David Howells7d12e782006-10-05 14:55:46 +0100570static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700571static int rtl8169_init_ring(struct net_device *dev);
Francois Romieu07ce4062007-02-23 23:36:39 +0100572static void rtl_hw_start(struct net_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700573static int rtl8169_close(struct net_device *dev);
Francois Romieu07ce4062007-02-23 23:36:39 +0100574static void rtl_set_rx_mode(struct net_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700575static void rtl8169_tx_timeout(struct net_device *dev);
Richard Dawe4dcb7d32005-05-27 21:12:00 +0200576static struct net_device_stats *rtl8169_get_stats(struct net_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700577static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *,
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700578 void __iomem *, u32 budget);
Richard Dawe4dcb7d32005-05-27 21:12:00 +0200579static int rtl8169_change_mtu(struct net_device *dev, int new_mtu);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700580static void rtl8169_down(struct net_device *dev);
Francois Romieu99f252b2007-04-02 22:59:59 +0200581static void rtl8169_rx_clear(struct rtl8169_private *tp);
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700582static int rtl8169_poll(struct napi_struct *napi, int budget);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700583
Linus Torvalds1da177e2005-04-16 15:20:36 -0700584static const unsigned int rtl8169_rx_config =
Francois Romieu5b0384f2006-08-16 16:00:01 +0200585 (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700586
françois romieub646d902011-01-03 15:08:21 +0000587static u32 ocp_read(struct rtl8169_private *tp, u8 mask, u16 reg)
588{
589 void __iomem *ioaddr = tp->mmio_addr;
590 int i;
591
592 RTL_W32(OCPAR, ((u32)mask & 0x0f) << 12 | (reg & 0x0fff));
593 for (i = 0; i < 20; i++) {
594 udelay(100);
595 if (RTL_R32(OCPAR) & OCPAR_FLAG)
596 break;
597 }
598 return RTL_R32(OCPDR);
599}
600
601static void ocp_write(struct rtl8169_private *tp, u8 mask, u16 reg, u32 data)
602{
603 void __iomem *ioaddr = tp->mmio_addr;
604 int i;
605
606 RTL_W32(OCPDR, data);
607 RTL_W32(OCPAR, OCPAR_FLAG | ((u32)mask & 0x0f) << 12 | (reg & 0x0fff));
608 for (i = 0; i < 20; i++) {
609 udelay(100);
610 if ((RTL_R32(OCPAR) & OCPAR_FLAG) == 0)
611 break;
612 }
613}
614
615static void rtl8168_oob_notify(void __iomem *ioaddr, u8 cmd)
616{
617 int i;
618
619 RTL_W8(ERIDR, cmd);
620 RTL_W32(ERIAR, 0x800010e8);
621 msleep(2);
622 for (i = 0; i < 5; i++) {
623 udelay(100);
624 if (!(RTL_R32(ERIDR) & ERIAR_FLAG))
625 break;
626 }
627
628 ocp_write(ioaddr, 0x1, 0x30, 0x00000001);
629}
630
631#define OOB_CMD_RESET 0x00
632#define OOB_CMD_DRIVER_START 0x05
633#define OOB_CMD_DRIVER_STOP 0x06
634
635static void rtl8168_driver_start(struct rtl8169_private *tp)
636{
637 int i;
638
639 rtl8168_oob_notify(tp, OOB_CMD_DRIVER_START);
640
641 for (i = 0; i < 10; i++) {
642 msleep(10);
643 if (ocp_read(tp, 0x0f, 0x0010) & 0x00000800)
644 break;
645 }
646}
647
648static void rtl8168_driver_stop(struct rtl8169_private *tp)
649{
650 int i;
651
652 rtl8168_oob_notify(tp, OOB_CMD_DRIVER_STOP);
653
654 for (i = 0; i < 10; i++) {
655 msleep(10);
656 if ((ocp_read(tp, 0x0f, 0x0010) & 0x00000800) == 0)
657 break;
658 }
659}
660
661
françois romieu4da19632011-01-03 15:07:55 +0000662static void r8169_mdio_write(void __iomem *ioaddr, int reg_addr, int value)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700663{
664 int i;
665
Francois Romieua6baf3a2007-11-08 23:23:21 +0100666 RTL_W32(PHYAR, 0x80000000 | (reg_addr & 0x1f) << 16 | (value & 0xffff));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700667
Francois Romieu23714082006-01-29 00:49:09 +0100668 for (i = 20; i > 0; i--) {
Francois Romieu07d3f512007-02-21 22:40:46 +0100669 /*
670 * Check if the RTL8169 has completed writing to the specified
671 * MII register.
672 */
Francois Romieu5b0384f2006-08-16 16:00:01 +0200673 if (!(RTL_R32(PHYAR) & 0x80000000))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700674 break;
Francois Romieu23714082006-01-29 00:49:09 +0100675 udelay(25);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700676 }
Timo Teräs024a07b2010-06-06 15:38:47 -0700677 /*
Timo Teräs81a95f02010-06-09 17:31:48 -0700678 * According to hardware specs a 20us delay is required after write
679 * complete indication, but before sending next command.
Timo Teräs024a07b2010-06-06 15:38:47 -0700680 */
Timo Teräs81a95f02010-06-09 17:31:48 -0700681 udelay(20);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700682}
683
françois romieu4da19632011-01-03 15:07:55 +0000684static int r8169_mdio_read(void __iomem *ioaddr, int reg_addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700685{
686 int i, value = -1;
687
Francois Romieua6baf3a2007-11-08 23:23:21 +0100688 RTL_W32(PHYAR, 0x0 | (reg_addr & 0x1f) << 16);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700689
Francois Romieu23714082006-01-29 00:49:09 +0100690 for (i = 20; i > 0; i--) {
Francois Romieu07d3f512007-02-21 22:40:46 +0100691 /*
692 * Check if the RTL8169 has completed retrieving data from
693 * the specified MII register.
694 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700695 if (RTL_R32(PHYAR) & 0x80000000) {
Francois Romieua6baf3a2007-11-08 23:23:21 +0100696 value = RTL_R32(PHYAR) & 0xffff;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700697 break;
698 }
Francois Romieu23714082006-01-29 00:49:09 +0100699 udelay(25);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700 }
Timo Teräs81a95f02010-06-09 17:31:48 -0700701 /*
702 * According to hardware specs a 20us delay is required after read
703 * complete indication, but before sending next command.
704 */
705 udelay(20);
706
Linus Torvalds1da177e2005-04-16 15:20:36 -0700707 return value;
708}
709
françois romieuc0e45c12011-01-03 15:08:04 +0000710static void r8168dp_1_mdio_access(void __iomem *ioaddr, int reg_addr, u32 data)
711{
712 int i;
713
714 RTL_W32(OCPDR, data |
715 ((reg_addr & OCPDR_REG_MASK) << OCPDR_GPHY_REG_SHIFT));
716 RTL_W32(OCPAR, OCPAR_GPHY_WRITE_CMD);
717 RTL_W32(EPHY_RXER_NUM, 0);
718
719 for (i = 0; i < 100; i++) {
720 mdelay(1);
721 if (!(RTL_R32(OCPAR) & OCPAR_FLAG))
722 break;
723 }
724}
725
726static void r8168dp_1_mdio_write(void __iomem *ioaddr, int reg_addr, int value)
727{
728 r8168dp_1_mdio_access(ioaddr, reg_addr, OCPDR_WRITE_CMD |
729 (value & OCPDR_DATA_MASK));
730}
731
732static int r8168dp_1_mdio_read(void __iomem *ioaddr, int reg_addr)
733{
734 int i;
735
736 r8168dp_1_mdio_access(ioaddr, reg_addr, OCPDR_READ_CMD);
737
738 mdelay(1);
739 RTL_W32(OCPAR, OCPAR_GPHY_READ_CMD);
740 RTL_W32(EPHY_RXER_NUM, 0);
741
742 for (i = 0; i < 100; i++) {
743 mdelay(1);
744 if (RTL_R32(OCPAR) & OCPAR_FLAG)
745 break;
746 }
747
748 return RTL_R32(OCPDR) & OCPDR_DATA_MASK;
749}
750
françois romieu4da19632011-01-03 15:07:55 +0000751static void rtl_writephy(struct rtl8169_private *tp, int location, u32 val)
Francois Romieudacf8152008-08-02 20:44:13 +0200752{
françois romieuc0e45c12011-01-03 15:08:04 +0000753 tp->mdio_ops.write(tp->mmio_addr, location, val);
Francois Romieudacf8152008-08-02 20:44:13 +0200754}
755
françois romieu4da19632011-01-03 15:07:55 +0000756static int rtl_readphy(struct rtl8169_private *tp, int location)
757{
françois romieuc0e45c12011-01-03 15:08:04 +0000758 return tp->mdio_ops.read(tp->mmio_addr, location);
françois romieu4da19632011-01-03 15:07:55 +0000759}
760
761static void rtl_patchphy(struct rtl8169_private *tp, int reg_addr, int value)
762{
763 rtl_writephy(tp, reg_addr, rtl_readphy(tp, reg_addr) | value);
764}
765
766static void rtl_w1w0_phy(struct rtl8169_private *tp, int reg_addr, int p, int m)
françois romieudaf9df62009-10-07 12:44:20 +0000767{
768 int val;
769
françois romieu4da19632011-01-03 15:07:55 +0000770 val = rtl_readphy(tp, reg_addr);
771 rtl_writephy(tp, reg_addr, (val | p) & ~m);
françois romieudaf9df62009-10-07 12:44:20 +0000772}
773
Francois Romieuccdffb92008-07-26 14:26:06 +0200774static void rtl_mdio_write(struct net_device *dev, int phy_id, int location,
775 int val)
776{
777 struct rtl8169_private *tp = netdev_priv(dev);
Francois Romieuccdffb92008-07-26 14:26:06 +0200778
françois romieu4da19632011-01-03 15:07:55 +0000779 rtl_writephy(tp, location, val);
Francois Romieuccdffb92008-07-26 14:26:06 +0200780}
781
782static int rtl_mdio_read(struct net_device *dev, int phy_id, int location)
783{
784 struct rtl8169_private *tp = netdev_priv(dev);
Francois Romieuccdffb92008-07-26 14:26:06 +0200785
françois romieu4da19632011-01-03 15:07:55 +0000786 return rtl_readphy(tp, location);
Francois Romieuccdffb92008-07-26 14:26:06 +0200787}
788
Francois Romieudacf8152008-08-02 20:44:13 +0200789static void rtl_ephy_write(void __iomem *ioaddr, int reg_addr, int value)
790{
791 unsigned int i;
792
793 RTL_W32(EPHYAR, EPHYAR_WRITE_CMD | (value & EPHYAR_DATA_MASK) |
794 (reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT);
795
796 for (i = 0; i < 100; i++) {
797 if (!(RTL_R32(EPHYAR) & EPHYAR_FLAG))
798 break;
799 udelay(10);
800 }
801}
802
803static u16 rtl_ephy_read(void __iomem *ioaddr, int reg_addr)
804{
805 u16 value = 0xffff;
806 unsigned int i;
807
808 RTL_W32(EPHYAR, (reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT);
809
810 for (i = 0; i < 100; i++) {
811 if (RTL_R32(EPHYAR) & EPHYAR_FLAG) {
812 value = RTL_R32(EPHYAR) & EPHYAR_DATA_MASK;
813 break;
814 }
815 udelay(10);
816 }
817
818 return value;
819}
820
821static void rtl_csi_write(void __iomem *ioaddr, int addr, int value)
822{
823 unsigned int i;
824
825 RTL_W32(CSIDR, value);
826 RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr & CSIAR_ADDR_MASK) |
827 CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);
828
829 for (i = 0; i < 100; i++) {
830 if (!(RTL_R32(CSIAR) & CSIAR_FLAG))
831 break;
832 udelay(10);
833 }
834}
835
836static u32 rtl_csi_read(void __iomem *ioaddr, int addr)
837{
838 u32 value = ~0x00;
839 unsigned int i;
840
841 RTL_W32(CSIAR, (addr & CSIAR_ADDR_MASK) |
842 CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);
843
844 for (i = 0; i < 100; i++) {
845 if (RTL_R32(CSIAR) & CSIAR_FLAG) {
846 value = RTL_R32(CSIDR);
847 break;
848 }
849 udelay(10);
850 }
851
852 return value;
853}
854
françois romieudaf9df62009-10-07 12:44:20 +0000855static u8 rtl8168d_efuse_read(void __iomem *ioaddr, int reg_addr)
856{
857 u8 value = 0xff;
858 unsigned int i;
859
860 RTL_W32(EFUSEAR, (reg_addr & EFUSEAR_REG_MASK) << EFUSEAR_REG_SHIFT);
861
862 for (i = 0; i < 300; i++) {
863 if (RTL_R32(EFUSEAR) & EFUSEAR_FLAG) {
864 value = RTL_R32(EFUSEAR) & EFUSEAR_DATA_MASK;
865 break;
866 }
867 udelay(100);
868 }
869
870 return value;
871}
872
Linus Torvalds1da177e2005-04-16 15:20:36 -0700873static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
874{
875 RTL_W16(IntrMask, 0x0000);
876
877 RTL_W16(IntrStatus, 0xffff);
878}
879
880static void rtl8169_asic_down(void __iomem *ioaddr)
881{
882 RTL_W8(ChipCmd, 0x00);
883 rtl8169_irq_mask_and_ack(ioaddr);
884 RTL_R16(CPlusCmd);
885}
886
françois romieu4da19632011-01-03 15:07:55 +0000887static unsigned int rtl8169_tbi_reset_pending(struct rtl8169_private *tp)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700888{
françois romieu4da19632011-01-03 15:07:55 +0000889 void __iomem *ioaddr = tp->mmio_addr;
890
Linus Torvalds1da177e2005-04-16 15:20:36 -0700891 return RTL_R32(TBICSR) & TBIReset;
892}
893
françois romieu4da19632011-01-03 15:07:55 +0000894static unsigned int rtl8169_xmii_reset_pending(struct rtl8169_private *tp)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700895{
françois romieu4da19632011-01-03 15:07:55 +0000896 return rtl_readphy(tp, MII_BMCR) & BMCR_RESET;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700897}
898
899static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr)
900{
901 return RTL_R32(TBICSR) & TBILinkOk;
902}
903
904static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr)
905{
906 return RTL_R8(PHYstatus) & LinkStatus;
907}
908
françois romieu4da19632011-01-03 15:07:55 +0000909static void rtl8169_tbi_reset_enable(struct rtl8169_private *tp)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700910{
françois romieu4da19632011-01-03 15:07:55 +0000911 void __iomem *ioaddr = tp->mmio_addr;
912
Linus Torvalds1da177e2005-04-16 15:20:36 -0700913 RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
914}
915
françois romieu4da19632011-01-03 15:07:55 +0000916static void rtl8169_xmii_reset_enable(struct rtl8169_private *tp)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700917{
918 unsigned int val;
919
françois romieu4da19632011-01-03 15:07:55 +0000920 val = rtl_readphy(tp, MII_BMCR) | BMCR_RESET;
921 rtl_writephy(tp, MII_BMCR, val & 0xffff);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700922}
923
Rafael J. Wysockie4fbce72010-12-08 15:32:14 +0000924static void __rtl8169_check_link_status(struct net_device *dev,
Francois Romieu07d3f512007-02-21 22:40:46 +0100925 struct rtl8169_private *tp,
Rafael J. Wysockie4fbce72010-12-08 15:32:14 +0000926 void __iomem *ioaddr,
927 bool pm)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700928{
929 unsigned long flags;
930
931 spin_lock_irqsave(&tp->lock, flags);
932 if (tp->link_ok(ioaddr)) {
Rafael J. Wysockie1759442010-03-14 14:33:51 +0000933 /* This is to cancel a scheduled suspend if there's one. */
Rafael J. Wysockie4fbce72010-12-08 15:32:14 +0000934 if (pm)
935 pm_request_resume(&tp->pci_dev->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700936 netif_carrier_on(dev);
Joe Perchesbf82c182010-02-09 11:49:50 +0000937 netif_info(tp, ifup, dev, "link up\n");
Stephen Hemmingerb57b7e52005-05-27 21:11:52 +0200938 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700939 netif_carrier_off(dev);
Joe Perchesbf82c182010-02-09 11:49:50 +0000940 netif_info(tp, ifdown, dev, "link down\n");
Rafael J. Wysockie4fbce72010-12-08 15:32:14 +0000941 if (pm)
942 pm_schedule_suspend(&tp->pci_dev->dev, 100);
Stephen Hemmingerb57b7e52005-05-27 21:11:52 +0200943 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700944 spin_unlock_irqrestore(&tp->lock, flags);
945}
946
Rafael J. Wysockie4fbce72010-12-08 15:32:14 +0000947static void rtl8169_check_link_status(struct net_device *dev,
948 struct rtl8169_private *tp,
949 void __iomem *ioaddr)
950{
951 __rtl8169_check_link_status(dev, tp, ioaddr, false);
952}
953
Rafael J. Wysockie1759442010-03-14 14:33:51 +0000954#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
955
956static u32 __rtl8169_get_wol(struct rtl8169_private *tp)
957{
958 void __iomem *ioaddr = tp->mmio_addr;
959 u8 options;
960 u32 wolopts = 0;
961
962 options = RTL_R8(Config1);
963 if (!(options & PMEnable))
964 return 0;
965
966 options = RTL_R8(Config3);
967 if (options & LinkUp)
968 wolopts |= WAKE_PHY;
969 if (options & MagicPacket)
970 wolopts |= WAKE_MAGIC;
971
972 options = RTL_R8(Config5);
973 if (options & UWF)
974 wolopts |= WAKE_UCAST;
975 if (options & BWF)
976 wolopts |= WAKE_BCAST;
977 if (options & MWF)
978 wolopts |= WAKE_MCAST;
979
980 return wolopts;
981}
982
Francois Romieu61a4dcc2006-02-23 00:55:25 +0100983static void rtl8169_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
984{
985 struct rtl8169_private *tp = netdev_priv(dev);
Francois Romieu61a4dcc2006-02-23 00:55:25 +0100986
987 spin_lock_irq(&tp->lock);
988
Rafael J. Wysockie1759442010-03-14 14:33:51 +0000989 wol->supported = WAKE_ANY;
990 wol->wolopts = __rtl8169_get_wol(tp);
Francois Romieu61a4dcc2006-02-23 00:55:25 +0100991
Francois Romieu61a4dcc2006-02-23 00:55:25 +0100992 spin_unlock_irq(&tp->lock);
993}
994
Rafael J. Wysockie1759442010-03-14 14:33:51 +0000995static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
Francois Romieu61a4dcc2006-02-23 00:55:25 +0100996{
Francois Romieu61a4dcc2006-02-23 00:55:25 +0100997 void __iomem *ioaddr = tp->mmio_addr;
Francois Romieu07d3f512007-02-21 22:40:46 +0100998 unsigned int i;
Alexey Dobriyan350f7592009-11-25 15:54:21 -0800999 static const struct {
Francois Romieu61a4dcc2006-02-23 00:55:25 +01001000 u32 opt;
1001 u16 reg;
1002 u8 mask;
1003 } cfg[] = {
1004 { WAKE_ANY, Config1, PMEnable },
1005 { WAKE_PHY, Config3, LinkUp },
1006 { WAKE_MAGIC, Config3, MagicPacket },
1007 { WAKE_UCAST, Config5, UWF },
1008 { WAKE_BCAST, Config5, BWF },
1009 { WAKE_MCAST, Config5, MWF },
1010 { WAKE_ANY, Config5, LanWake }
1011 };
1012
Francois Romieu61a4dcc2006-02-23 00:55:25 +01001013 RTL_W8(Cfg9346, Cfg9346_Unlock);
1014
1015 for (i = 0; i < ARRAY_SIZE(cfg); i++) {
1016 u8 options = RTL_R8(cfg[i].reg) & ~cfg[i].mask;
Rafael J. Wysockie1759442010-03-14 14:33:51 +00001017 if (wolopts & cfg[i].opt)
Francois Romieu61a4dcc2006-02-23 00:55:25 +01001018 options |= cfg[i].mask;
1019 RTL_W8(cfg[i].reg, options);
1020 }
1021
1022 RTL_W8(Cfg9346, Cfg9346_Lock);
Rafael J. Wysockie1759442010-03-14 14:33:51 +00001023}
1024
1025static int rtl8169_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1026{
1027 struct rtl8169_private *tp = netdev_priv(dev);
1028
1029 spin_lock_irq(&tp->lock);
Francois Romieu61a4dcc2006-02-23 00:55:25 +01001030
Francois Romieuf23e7fd2007-10-04 22:36:14 +02001031 if (wol->wolopts)
1032 tp->features |= RTL_FEATURE_WOL;
1033 else
1034 tp->features &= ~RTL_FEATURE_WOL;
Rafael J. Wysockie1759442010-03-14 14:33:51 +00001035 __rtl8169_set_wol(tp, wol->wolopts);
Francois Romieu61a4dcc2006-02-23 00:55:25 +01001036 spin_unlock_irq(&tp->lock);
1037
françois romieuea809072010-11-08 13:23:58 +00001038 device_set_wakeup_enable(&tp->pci_dev->dev, wol->wolopts);
1039
Francois Romieu61a4dcc2006-02-23 00:55:25 +01001040 return 0;
1041}
1042
Linus Torvalds1da177e2005-04-16 15:20:36 -07001043static void rtl8169_get_drvinfo(struct net_device *dev,
1044 struct ethtool_drvinfo *info)
1045{
1046 struct rtl8169_private *tp = netdev_priv(dev);
1047
1048 strcpy(info->driver, MODULENAME);
1049 strcpy(info->version, RTL8169_VERSION);
1050 strcpy(info->bus_info, pci_name(tp->pci_dev));
1051}
1052
1053static int rtl8169_get_regs_len(struct net_device *dev)
1054{
1055 return R8169_REGS_SIZE;
1056}
1057
1058static int rtl8169_set_speed_tbi(struct net_device *dev,
1059 u8 autoneg, u16 speed, u8 duplex)
1060{
1061 struct rtl8169_private *tp = netdev_priv(dev);
1062 void __iomem *ioaddr = tp->mmio_addr;
1063 int ret = 0;
1064 u32 reg;
1065
1066 reg = RTL_R32(TBICSR);
1067 if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
1068 (duplex == DUPLEX_FULL)) {
1069 RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
1070 } else if (autoneg == AUTONEG_ENABLE)
1071 RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
1072 else {
Joe Perchesbf82c182010-02-09 11:49:50 +00001073 netif_warn(tp, link, dev,
1074 "incorrect speed setting refused in TBI mode\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001075 ret = -EOPNOTSUPP;
1076 }
1077
1078 return ret;
1079}
1080
1081static int rtl8169_set_speed_xmii(struct net_device *dev,
1082 u8 autoneg, u16 speed, u8 duplex)
1083{
1084 struct rtl8169_private *tp = netdev_priv(dev);
françois romieu3577aa12009-05-19 10:46:48 +00001085 int giga_ctrl, bmcr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001086
1087 if (autoneg == AUTONEG_ENABLE) {
françois romieu3577aa12009-05-19 10:46:48 +00001088 int auto_nego;
1089
françois romieu4da19632011-01-03 15:07:55 +00001090 auto_nego = rtl_readphy(tp, MII_ADVERTISE);
Francois Romieu64e4bfb2006-08-17 12:43:06 +02001091 auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL |
1092 ADVERTISE_100HALF | ADVERTISE_100FULL);
françois romieu3577aa12009-05-19 10:46:48 +00001093 auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
1094
françois romieu4da19632011-01-03 15:07:55 +00001095 giga_ctrl = rtl_readphy(tp, MII_CTRL1000);
françois romieu3577aa12009-05-19 10:46:48 +00001096 giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
1097
1098 /* The 8100e/8101e/8102e do Fast Ethernet only. */
1099 if ((tp->mac_version != RTL_GIGA_MAC_VER_07) &&
1100 (tp->mac_version != RTL_GIGA_MAC_VER_08) &&
1101 (tp->mac_version != RTL_GIGA_MAC_VER_09) &&
1102 (tp->mac_version != RTL_GIGA_MAC_VER_10) &&
1103 (tp->mac_version != RTL_GIGA_MAC_VER_13) &&
1104 (tp->mac_version != RTL_GIGA_MAC_VER_14) &&
1105 (tp->mac_version != RTL_GIGA_MAC_VER_15) &&
1106 (tp->mac_version != RTL_GIGA_MAC_VER_16)) {
Francois Romieu64e4bfb2006-08-17 12:43:06 +02001107 giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
Joe Perchesbf82c182010-02-09 11:49:50 +00001108 } else {
1109 netif_info(tp, link, dev,
1110 "PHY does not support 1000Mbps\n");
Francois Romieubcf0bf92006-07-26 23:14:13 +02001111 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001112
françois romieu3577aa12009-05-19 10:46:48 +00001113 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
Francois Romieu623a1592006-05-14 12:42:14 +02001114
françois romieu3577aa12009-05-19 10:46:48 +00001115 if ((tp->mac_version == RTL_GIGA_MAC_VER_11) ||
1116 (tp->mac_version == RTL_GIGA_MAC_VER_12) ||
1117 (tp->mac_version >= RTL_GIGA_MAC_VER_17)) {
1118 /*
1119 * Wake up the PHY.
1120 * Vendor specific (0x1f) and reserved (0x0e) MII
1121 * registers.
1122 */
françois romieu4da19632011-01-03 15:07:55 +00001123 rtl_writephy(tp, 0x1f, 0x0000);
1124 rtl_writephy(tp, 0x0e, 0x0000);
françois romieu3577aa12009-05-19 10:46:48 +00001125 }
1126
françois romieu4da19632011-01-03 15:07:55 +00001127 rtl_writephy(tp, MII_ADVERTISE, auto_nego);
1128 rtl_writephy(tp, MII_CTRL1000, giga_ctrl);
françois romieu3577aa12009-05-19 10:46:48 +00001129 } else {
1130 giga_ctrl = 0;
1131
1132 if (speed == SPEED_10)
1133 bmcr = 0;
1134 else if (speed == SPEED_100)
1135 bmcr = BMCR_SPEED100;
1136 else
1137 return -EINVAL;
1138
1139 if (duplex == DUPLEX_FULL)
1140 bmcr |= BMCR_FULLDPLX;
1141
françois romieu4da19632011-01-03 15:07:55 +00001142 rtl_writephy(tp, 0x1f, 0x0000);
Roger So2584fbc2007-07-31 23:52:42 +02001143 }
1144
Linus Torvalds1da177e2005-04-16 15:20:36 -07001145 tp->phy_1000_ctrl_reg = giga_ctrl;
1146
françois romieu4da19632011-01-03 15:07:55 +00001147 rtl_writephy(tp, MII_BMCR, bmcr);
françois romieu3577aa12009-05-19 10:46:48 +00001148
1149 if ((tp->mac_version == RTL_GIGA_MAC_VER_02) ||
1150 (tp->mac_version == RTL_GIGA_MAC_VER_03)) {
1151 if ((speed == SPEED_100) && (autoneg != AUTONEG_ENABLE)) {
françois romieu4da19632011-01-03 15:07:55 +00001152 rtl_writephy(tp, 0x17, 0x2138);
1153 rtl_writephy(tp, 0x0e, 0x0260);
françois romieu3577aa12009-05-19 10:46:48 +00001154 } else {
françois romieu4da19632011-01-03 15:07:55 +00001155 rtl_writephy(tp, 0x17, 0x2108);
1156 rtl_writephy(tp, 0x0e, 0x0000);
françois romieu3577aa12009-05-19 10:46:48 +00001157 }
1158 }
1159
Linus Torvalds1da177e2005-04-16 15:20:36 -07001160 return 0;
1161}
1162
1163static int rtl8169_set_speed(struct net_device *dev,
1164 u8 autoneg, u16 speed, u8 duplex)
1165{
1166 struct rtl8169_private *tp = netdev_priv(dev);
1167 int ret;
1168
1169 ret = tp->set_speed(dev, autoneg, speed, duplex);
1170
Francois Romieu64e4bfb2006-08-17 12:43:06 +02001171 if (netif_running(dev) && (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001172 mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
1173
1174 return ret;
1175}
1176
1177static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1178{
1179 struct rtl8169_private *tp = netdev_priv(dev);
1180 unsigned long flags;
1181 int ret;
1182
1183 spin_lock_irqsave(&tp->lock, flags);
1184 ret = rtl8169_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex);
1185 spin_unlock_irqrestore(&tp->lock, flags);
Francois Romieu5b0384f2006-08-16 16:00:01 +02001186
Linus Torvalds1da177e2005-04-16 15:20:36 -07001187 return ret;
1188}
1189
1190static u32 rtl8169_get_rx_csum(struct net_device *dev)
1191{
1192 struct rtl8169_private *tp = netdev_priv(dev);
1193
1194 return tp->cp_cmd & RxChkSum;
1195}
1196
1197static int rtl8169_set_rx_csum(struct net_device *dev, u32 data)
1198{
1199 struct rtl8169_private *tp = netdev_priv(dev);
1200 void __iomem *ioaddr = tp->mmio_addr;
1201 unsigned long flags;
1202
1203 spin_lock_irqsave(&tp->lock, flags);
1204
1205 if (data)
1206 tp->cp_cmd |= RxChkSum;
1207 else
1208 tp->cp_cmd &= ~RxChkSum;
1209
1210 RTL_W16(CPlusCmd, tp->cp_cmd);
1211 RTL_R16(CPlusCmd);
1212
1213 spin_unlock_irqrestore(&tp->lock, flags);
1214
1215 return 0;
1216}
1217
1218#ifdef CONFIG_R8169_VLAN
1219
1220static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
1221 struct sk_buff *skb)
1222{
Jesse Grosseab6d182010-10-20 13:56:03 +00001223 return (vlan_tx_tag_present(skb)) ?
Linus Torvalds1da177e2005-04-16 15:20:36 -07001224 TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
1225}
1226
1227static void rtl8169_vlan_rx_register(struct net_device *dev,
1228 struct vlan_group *grp)
1229{
1230 struct rtl8169_private *tp = netdev_priv(dev);
1231 void __iomem *ioaddr = tp->mmio_addr;
1232 unsigned long flags;
1233
1234 spin_lock_irqsave(&tp->lock, flags);
1235 tp->vlgrp = grp;
Simon Wunderlich05af2142009-10-24 06:47:33 -07001236 /*
1237 * Do not disable RxVlan on 8110SCd.
1238 */
1239 if (tp->vlgrp || (tp->mac_version == RTL_GIGA_MAC_VER_05))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001240 tp->cp_cmd |= RxVlan;
1241 else
1242 tp->cp_cmd &= ~RxVlan;
1243 RTL_W16(CPlusCmd, tp->cp_cmd);
1244 RTL_R16(CPlusCmd);
1245 spin_unlock_irqrestore(&tp->lock, flags);
1246}
1247
Linus Torvalds1da177e2005-04-16 15:20:36 -07001248static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
Eric Dumazet630b9432010-03-31 02:08:31 +00001249 struct sk_buff *skb, int polling)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001250{
1251 u32 opts2 = le32_to_cpu(desc->opts2);
Francois Romieu865c6522008-05-11 14:51:00 +02001252 struct vlan_group *vlgrp = tp->vlgrp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001253 int ret;
1254
Francois Romieu865c6522008-05-11 14:51:00 +02001255 if (vlgrp && (opts2 & RxVlanTag)) {
Eric Dumazet2edae082010-09-06 18:46:39 +00001256 u16 vtag = swab16(opts2 & 0xffff);
1257
1258 if (likely(polling))
1259 vlan_gro_receive(&tp->napi, vlgrp, vtag, skb);
1260 else
1261 __vlan_hwaccel_rx(skb, vlgrp, vtag, polling);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001262 ret = 0;
1263 } else
1264 ret = -1;
1265 desc->opts2 = 0;
1266 return ret;
1267}
1268
1269#else /* !CONFIG_R8169_VLAN */
1270
1271static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
1272 struct sk_buff *skb)
1273{
1274 return 0;
1275}
1276
1277static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
Eric Dumazet630b9432010-03-31 02:08:31 +00001278 struct sk_buff *skb, int polling)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001279{
1280 return -1;
1281}
1282
1283#endif
1284
Francois Romieuccdffb92008-07-26 14:26:06 +02001285static int rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001286{
1287 struct rtl8169_private *tp = netdev_priv(dev);
1288 void __iomem *ioaddr = tp->mmio_addr;
1289 u32 status;
1290
1291 cmd->supported =
1292 SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
1293 cmd->port = PORT_FIBRE;
1294 cmd->transceiver = XCVR_INTERNAL;
1295
1296 status = RTL_R32(TBICSR);
1297 cmd->advertising = (status & TBINwEnable) ? ADVERTISED_Autoneg : 0;
1298 cmd->autoneg = !!(status & TBINwEnable);
1299
1300 cmd->speed = SPEED_1000;
1301 cmd->duplex = DUPLEX_FULL; /* Always set */
Francois Romieuccdffb92008-07-26 14:26:06 +02001302
1303 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001304}
1305
Francois Romieuccdffb92008-07-26 14:26:06 +02001306static int rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001307{
1308 struct rtl8169_private *tp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001309
Francois Romieuccdffb92008-07-26 14:26:06 +02001310 return mii_ethtool_gset(&tp->mii, cmd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001311}
1312
1313static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1314{
1315 struct rtl8169_private *tp = netdev_priv(dev);
1316 unsigned long flags;
Francois Romieuccdffb92008-07-26 14:26:06 +02001317 int rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001318
1319 spin_lock_irqsave(&tp->lock, flags);
1320
Francois Romieuccdffb92008-07-26 14:26:06 +02001321 rc = tp->get_settings(dev, cmd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001322
1323 spin_unlock_irqrestore(&tp->lock, flags);
Francois Romieuccdffb92008-07-26 14:26:06 +02001324 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001325}
1326
1327static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1328 void *p)
1329{
Francois Romieu5b0384f2006-08-16 16:00:01 +02001330 struct rtl8169_private *tp = netdev_priv(dev);
1331 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001332
Francois Romieu5b0384f2006-08-16 16:00:01 +02001333 if (regs->len > R8169_REGS_SIZE)
1334 regs->len = R8169_REGS_SIZE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001335
Francois Romieu5b0384f2006-08-16 16:00:01 +02001336 spin_lock_irqsave(&tp->lock, flags);
1337 memcpy_fromio(p, tp->mmio_addr, regs->len);
1338 spin_unlock_irqrestore(&tp->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001339}
1340
Stephen Hemmingerb57b7e52005-05-27 21:11:52 +02001341static u32 rtl8169_get_msglevel(struct net_device *dev)
1342{
1343 struct rtl8169_private *tp = netdev_priv(dev);
1344
1345 return tp->msg_enable;
1346}
1347
1348static void rtl8169_set_msglevel(struct net_device *dev, u32 value)
1349{
1350 struct rtl8169_private *tp = netdev_priv(dev);
1351
1352 tp->msg_enable = value;
1353}
1354
Stephen Hemmingerd4a3a0f2005-05-27 21:11:56 +02001355static const char rtl8169_gstrings[][ETH_GSTRING_LEN] = {
1356 "tx_packets",
1357 "rx_packets",
1358 "tx_errors",
1359 "rx_errors",
1360 "rx_missed",
1361 "align_errors",
1362 "tx_single_collisions",
1363 "tx_multi_collisions",
1364 "unicast",
1365 "broadcast",
1366 "multicast",
1367 "tx_aborted",
1368 "tx_underrun",
1369};
1370
Jeff Garzikb9f2c042007-10-03 18:07:32 -07001371static int rtl8169_get_sset_count(struct net_device *dev, int sset)
Stephen Hemmingerd4a3a0f2005-05-27 21:11:56 +02001372{
Jeff Garzikb9f2c042007-10-03 18:07:32 -07001373 switch (sset) {
1374 case ETH_SS_STATS:
1375 return ARRAY_SIZE(rtl8169_gstrings);
1376 default:
1377 return -EOPNOTSUPP;
1378 }
Stephen Hemmingerd4a3a0f2005-05-27 21:11:56 +02001379}
1380
Ivan Vecera355423d2009-02-06 21:49:57 -08001381static void rtl8169_update_counters(struct net_device *dev)
Stephen Hemmingerd4a3a0f2005-05-27 21:11:56 +02001382{
1383 struct rtl8169_private *tp = netdev_priv(dev);
1384 void __iomem *ioaddr = tp->mmio_addr;
1385 struct rtl8169_counters *counters;
1386 dma_addr_t paddr;
1387 u32 cmd;
Ivan Vecera355423d2009-02-06 21:49:57 -08001388 int wait = 1000;
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00001389 struct device *d = &tp->pci_dev->dev;
Stephen Hemmingerd4a3a0f2005-05-27 21:11:56 +02001390
Ivan Vecera355423d2009-02-06 21:49:57 -08001391 /*
1392 * Some chips are unable to dump tally counters when the receiver
1393 * is disabled.
1394 */
1395 if ((RTL_R8(ChipCmd) & CmdRxEnb) == 0)
1396 return;
Stephen Hemmingerd4a3a0f2005-05-27 21:11:56 +02001397
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00001398 counters = dma_alloc_coherent(d, sizeof(*counters), &paddr, GFP_KERNEL);
Stephen Hemmingerd4a3a0f2005-05-27 21:11:56 +02001399 if (!counters)
1400 return;
1401
1402 RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
Yang Hongyang284901a2009-04-06 19:01:15 -07001403 cmd = (u64)paddr & DMA_BIT_MASK(32);
Stephen Hemmingerd4a3a0f2005-05-27 21:11:56 +02001404 RTL_W32(CounterAddrLow, cmd);
1405 RTL_W32(CounterAddrLow, cmd | CounterDump);
1406
Ivan Vecera355423d2009-02-06 21:49:57 -08001407 while (wait--) {
1408 if ((RTL_R32(CounterAddrLow) & CounterDump) == 0) {
1409 /* copy updated counters */
1410 memcpy(&tp->counters, counters, sizeof(*counters));
Stephen Hemmingerd4a3a0f2005-05-27 21:11:56 +02001411 break;
Ivan Vecera355423d2009-02-06 21:49:57 -08001412 }
1413 udelay(10);
Stephen Hemmingerd4a3a0f2005-05-27 21:11:56 +02001414 }
1415
1416 RTL_W32(CounterAddrLow, 0);
1417 RTL_W32(CounterAddrHigh, 0);
1418
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00001419 dma_free_coherent(d, sizeof(*counters), counters, paddr);
Stephen Hemmingerd4a3a0f2005-05-27 21:11:56 +02001420}
1421
Ivan Vecera355423d2009-02-06 21:49:57 -08001422static void rtl8169_get_ethtool_stats(struct net_device *dev,
1423 struct ethtool_stats *stats, u64 *data)
1424{
1425 struct rtl8169_private *tp = netdev_priv(dev);
1426
1427 ASSERT_RTNL();
1428
1429 rtl8169_update_counters(dev);
1430
1431 data[0] = le64_to_cpu(tp->counters.tx_packets);
1432 data[1] = le64_to_cpu(tp->counters.rx_packets);
1433 data[2] = le64_to_cpu(tp->counters.tx_errors);
1434 data[3] = le32_to_cpu(tp->counters.rx_errors);
1435 data[4] = le16_to_cpu(tp->counters.rx_missed);
1436 data[5] = le16_to_cpu(tp->counters.align_errors);
1437 data[6] = le32_to_cpu(tp->counters.tx_one_collision);
1438 data[7] = le32_to_cpu(tp->counters.tx_multi_collision);
1439 data[8] = le64_to_cpu(tp->counters.rx_unicast);
1440 data[9] = le64_to_cpu(tp->counters.rx_broadcast);
1441 data[10] = le32_to_cpu(tp->counters.rx_multicast);
1442 data[11] = le16_to_cpu(tp->counters.tx_aborted);
1443 data[12] = le16_to_cpu(tp->counters.tx_underun);
1444}
1445
Stephen Hemmingerd4a3a0f2005-05-27 21:11:56 +02001446static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
1447{
1448 switch(stringset) {
1449 case ETH_SS_STATS:
1450 memcpy(data, *rtl8169_gstrings, sizeof(rtl8169_gstrings));
1451 break;
1452 }
1453}
1454
Jeff Garzik7282d492006-09-13 14:30:00 -04001455static const struct ethtool_ops rtl8169_ethtool_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001456 .get_drvinfo = rtl8169_get_drvinfo,
1457 .get_regs_len = rtl8169_get_regs_len,
1458 .get_link = ethtool_op_get_link,
1459 .get_settings = rtl8169_get_settings,
1460 .set_settings = rtl8169_set_settings,
Stephen Hemmingerb57b7e52005-05-27 21:11:52 +02001461 .get_msglevel = rtl8169_get_msglevel,
1462 .set_msglevel = rtl8169_set_msglevel,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001463 .get_rx_csum = rtl8169_get_rx_csum,
1464 .set_rx_csum = rtl8169_set_rx_csum,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001465 .set_tx_csum = ethtool_op_set_tx_csum,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001466 .set_sg = ethtool_op_set_sg,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001467 .set_tso = ethtool_op_set_tso,
1468 .get_regs = rtl8169_get_regs,
Francois Romieu61a4dcc2006-02-23 00:55:25 +01001469 .get_wol = rtl8169_get_wol,
1470 .set_wol = rtl8169_set_wol,
Stephen Hemmingerd4a3a0f2005-05-27 21:11:56 +02001471 .get_strings = rtl8169_get_strings,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07001472 .get_sset_count = rtl8169_get_sset_count,
Stephen Hemmingerd4a3a0f2005-05-27 21:11:56 +02001473 .get_ethtool_stats = rtl8169_get_ethtool_stats,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001474};
1475
Francois Romieu07d3f512007-02-21 22:40:46 +01001476static void rtl8169_get_mac_version(struct rtl8169_private *tp,
1477 void __iomem *ioaddr)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001478{
Francois Romieu0e485152007-02-20 00:00:26 +01001479 /*
1480 * The driver currently handles the 8168Bf and the 8168Be identically
1481 * but they can be identified more specifically through the test below
1482 * if needed:
1483 *
1484 * (RTL_R32(TxConfig) & 0x700000) == 0x500000 ? 8168Bf : 8168Be
Francois Romieu01272152007-02-20 22:58:51 +01001485 *
1486 * Same thing for the 8101Eb and the 8101Ec:
1487 *
1488 * (RTL_R32(TxConfig) & 0x700000) == 0x200000 ? 8101Eb : 8101Ec
Francois Romieu0e485152007-02-20 00:00:26 +01001489 */
Alexey Dobriyan350f7592009-11-25 15:54:21 -08001490 static const struct {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001491 u32 mask;
Francois Romieue3cf0cc2007-08-17 14:55:46 +02001492 u32 val;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001493 int mac_version;
1494 } mac_info[] = {
Francois Romieu5b538df2008-07-20 16:22:45 +02001495 /* 8168D family. */
françois romieudaf9df62009-10-07 12:44:20 +00001496 { 0x7cf00000, 0x28300000, RTL_GIGA_MAC_VER_26 },
1497 { 0x7cf00000, 0x28100000, RTL_GIGA_MAC_VER_25 },
1498 { 0x7c800000, 0x28800000, RTL_GIGA_MAC_VER_27 },
1499 { 0x7c800000, 0x28000000, RTL_GIGA_MAC_VER_26 },
Francois Romieu5b538df2008-07-20 16:22:45 +02001500
Francois Romieuef808d52008-06-29 13:10:54 +02001501 /* 8168C family. */
Francois Romieu17c99292010-07-11 17:10:09 -07001502 { 0x7cf00000, 0x3cb00000, RTL_GIGA_MAC_VER_24 },
Francois Romieuef3386f2008-06-29 12:24:30 +02001503 { 0x7cf00000, 0x3c900000, RTL_GIGA_MAC_VER_23 },
Francois Romieuef808d52008-06-29 13:10:54 +02001504 { 0x7cf00000, 0x3c800000, RTL_GIGA_MAC_VER_18 },
Francois Romieu7f3e3d32008-07-20 18:53:20 +02001505 { 0x7c800000, 0x3c800000, RTL_GIGA_MAC_VER_24 },
Francois Romieue3cf0cc2007-08-17 14:55:46 +02001506 { 0x7cf00000, 0x3c000000, RTL_GIGA_MAC_VER_19 },
1507 { 0x7cf00000, 0x3c200000, RTL_GIGA_MAC_VER_20 },
Francois Romieu197ff762008-06-28 13:16:02 +02001508 { 0x7cf00000, 0x3c300000, RTL_GIGA_MAC_VER_21 },
Francois Romieu6fb07052008-06-29 11:54:28 +02001509 { 0x7cf00000, 0x3c400000, RTL_GIGA_MAC_VER_22 },
Francois Romieuef808d52008-06-29 13:10:54 +02001510 { 0x7c800000, 0x3c000000, RTL_GIGA_MAC_VER_22 },
Francois Romieue3cf0cc2007-08-17 14:55:46 +02001511
1512 /* 8168B family. */
1513 { 0x7cf00000, 0x38000000, RTL_GIGA_MAC_VER_12 },
1514 { 0x7cf00000, 0x38500000, RTL_GIGA_MAC_VER_17 },
1515 { 0x7c800000, 0x38000000, RTL_GIGA_MAC_VER_17 },
1516 { 0x7c800000, 0x30000000, RTL_GIGA_MAC_VER_11 },
1517
1518 /* 8101 family. */
Francois Romieu2857ffb2008-08-02 21:08:49 +02001519 { 0x7cf00000, 0x34a00000, RTL_GIGA_MAC_VER_09 },
1520 { 0x7cf00000, 0x24a00000, RTL_GIGA_MAC_VER_09 },
1521 { 0x7cf00000, 0x34900000, RTL_GIGA_MAC_VER_08 },
1522 { 0x7cf00000, 0x24900000, RTL_GIGA_MAC_VER_08 },
1523 { 0x7cf00000, 0x34800000, RTL_GIGA_MAC_VER_07 },
1524 { 0x7cf00000, 0x24800000, RTL_GIGA_MAC_VER_07 },
Francois Romieue3cf0cc2007-08-17 14:55:46 +02001525 { 0x7cf00000, 0x34000000, RTL_GIGA_MAC_VER_13 },
Francois Romieu2857ffb2008-08-02 21:08:49 +02001526 { 0x7cf00000, 0x34300000, RTL_GIGA_MAC_VER_10 },
Francois Romieue3cf0cc2007-08-17 14:55:46 +02001527 { 0x7cf00000, 0x34200000, RTL_GIGA_MAC_VER_16 },
Francois Romieu2857ffb2008-08-02 21:08:49 +02001528 { 0x7c800000, 0x34800000, RTL_GIGA_MAC_VER_09 },
1529 { 0x7c800000, 0x24800000, RTL_GIGA_MAC_VER_09 },
Francois Romieue3cf0cc2007-08-17 14:55:46 +02001530 { 0x7c800000, 0x34000000, RTL_GIGA_MAC_VER_16 },
1531 /* FIXME: where did these entries come from ? -- FR */
1532 { 0xfc800000, 0x38800000, RTL_GIGA_MAC_VER_15 },
1533 { 0xfc800000, 0x30800000, RTL_GIGA_MAC_VER_14 },
1534
1535 /* 8110 family. */
1536 { 0xfc800000, 0x98000000, RTL_GIGA_MAC_VER_06 },
1537 { 0xfc800000, 0x18000000, RTL_GIGA_MAC_VER_05 },
1538 { 0xfc800000, 0x10000000, RTL_GIGA_MAC_VER_04 },
1539 { 0xfc800000, 0x04000000, RTL_GIGA_MAC_VER_03 },
1540 { 0xfc800000, 0x00800000, RTL_GIGA_MAC_VER_02 },
1541 { 0xfc800000, 0x00000000, RTL_GIGA_MAC_VER_01 },
1542
Jean Delvaref21b75e2009-05-26 20:54:48 -07001543 /* Catch-all */
1544 { 0x00000000, 0x00000000, RTL_GIGA_MAC_NONE }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001545 }, *p = mac_info;
1546 u32 reg;
1547
Francois Romieue3cf0cc2007-08-17 14:55:46 +02001548 reg = RTL_R32(TxConfig);
1549 while ((reg & p->mask) != p->val)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001550 p++;
1551 tp->mac_version = p->mac_version;
1552}
1553
1554static void rtl8169_print_mac_version(struct rtl8169_private *tp)
1555{
Francois Romieubcf0bf92006-07-26 23:14:13 +02001556 dprintk("mac_version = 0x%02x\n", tp->mac_version);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001557}
1558
Francois Romieu867763c2007-08-17 18:21:58 +02001559struct phy_reg {
1560 u16 reg;
1561 u16 val;
1562};
1563
françois romieu4da19632011-01-03 15:07:55 +00001564static void rtl_writephy_batch(struct rtl8169_private *tp,
1565 const struct phy_reg *regs, int len)
Francois Romieu867763c2007-08-17 18:21:58 +02001566{
1567 while (len-- > 0) {
françois romieu4da19632011-01-03 15:07:55 +00001568 rtl_writephy(tp, regs->reg, regs->val);
Francois Romieu867763c2007-08-17 18:21:58 +02001569 regs++;
1570 }
1571}
1572
françois romieubca03d52011-01-03 15:07:31 +00001573#define PHY_READ 0x00000000
1574#define PHY_DATA_OR 0x10000000
1575#define PHY_DATA_AND 0x20000000
1576#define PHY_BJMPN 0x30000000
1577#define PHY_READ_EFUSE 0x40000000
1578#define PHY_READ_MAC_BYTE 0x50000000
1579#define PHY_WRITE_MAC_BYTE 0x60000000
1580#define PHY_CLEAR_READCOUNT 0x70000000
1581#define PHY_WRITE 0x80000000
1582#define PHY_READCOUNT_EQ_SKIP 0x90000000
1583#define PHY_COMP_EQ_SKIPN 0xa0000000
1584#define PHY_COMP_NEQ_SKIPN 0xb0000000
1585#define PHY_WRITE_PREVIOUS 0xc0000000
1586#define PHY_SKIPN 0xd0000000
1587#define PHY_DELAY_MS 0xe0000000
1588#define PHY_WRITE_ERI_WORD 0xf0000000
1589
1590static void
1591rtl_phy_write_fw(struct rtl8169_private *tp, const struct firmware *fw)
1592{
françois romieubca03d52011-01-03 15:07:31 +00001593 __le32 *phytable = (__le32 *)fw->data;
1594 struct net_device *dev = tp->dev;
1595 size_t i;
1596
1597 if (fw->size % sizeof(*phytable)) {
1598 netif_err(tp, probe, dev, "odd sized firmware %zd\n", fw->size);
1599 return;
1600 }
1601
1602 for (i = 0; i < fw->size / sizeof(*phytable); i++) {
1603 u32 action = le32_to_cpu(phytable[i]);
1604
1605 if (!action)
1606 break;
1607
1608 if ((action & 0xf0000000) != PHY_WRITE) {
1609 netif_err(tp, probe, dev,
1610 "unknown action 0x%08x\n", action);
1611 return;
1612 }
1613 }
1614
1615 while (i-- != 0) {
1616 u32 action = le32_to_cpu(*phytable);
1617 u32 data = action & 0x0000ffff;
1618 u32 reg = (action & 0x0fff0000) >> 16;
1619
1620 switch(action & 0xf0000000) {
1621 case PHY_WRITE:
françois romieu4da19632011-01-03 15:07:55 +00001622 rtl_writephy(tp, reg, data);
françois romieubca03d52011-01-03 15:07:31 +00001623 phytable++;
1624 break;
1625 default:
1626 BUG();
1627 }
1628 }
1629}
1630
françois romieu4da19632011-01-03 15:07:55 +00001631static void rtl8169s_hw_phy_config(struct rtl8169_private *tp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001632{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08001633 static const struct phy_reg phy_reg_init[] = {
françois romieu0b9b5712009-08-10 19:44:56 +00001634 { 0x1f, 0x0001 },
1635 { 0x06, 0x006e },
1636 { 0x08, 0x0708 },
1637 { 0x15, 0x4000 },
1638 { 0x18, 0x65c7 },
Linus Torvalds1da177e2005-04-16 15:20:36 -07001639
françois romieu0b9b5712009-08-10 19:44:56 +00001640 { 0x1f, 0x0001 },
1641 { 0x03, 0x00a1 },
1642 { 0x02, 0x0008 },
1643 { 0x01, 0x0120 },
1644 { 0x00, 0x1000 },
1645 { 0x04, 0x0800 },
1646 { 0x04, 0x0000 },
Linus Torvalds1da177e2005-04-16 15:20:36 -07001647
françois romieu0b9b5712009-08-10 19:44:56 +00001648 { 0x03, 0xff41 },
1649 { 0x02, 0xdf60 },
1650 { 0x01, 0x0140 },
1651 { 0x00, 0x0077 },
1652 { 0x04, 0x7800 },
1653 { 0x04, 0x7000 },
Linus Torvalds1da177e2005-04-16 15:20:36 -07001654
françois romieu0b9b5712009-08-10 19:44:56 +00001655 { 0x03, 0x802f },
1656 { 0x02, 0x4f02 },
1657 { 0x01, 0x0409 },
1658 { 0x00, 0xf0f9 },
1659 { 0x04, 0x9800 },
1660 { 0x04, 0x9000 },
1661
1662 { 0x03, 0xdf01 },
1663 { 0x02, 0xdf20 },
1664 { 0x01, 0xff95 },
1665 { 0x00, 0xba00 },
1666 { 0x04, 0xa800 },
1667 { 0x04, 0xa000 },
1668
1669 { 0x03, 0xff41 },
1670 { 0x02, 0xdf20 },
1671 { 0x01, 0x0140 },
1672 { 0x00, 0x00bb },
1673 { 0x04, 0xb800 },
1674 { 0x04, 0xb000 },
1675
1676 { 0x03, 0xdf41 },
1677 { 0x02, 0xdc60 },
1678 { 0x01, 0x6340 },
1679 { 0x00, 0x007d },
1680 { 0x04, 0xd800 },
1681 { 0x04, 0xd000 },
1682
1683 { 0x03, 0xdf01 },
1684 { 0x02, 0xdf20 },
1685 { 0x01, 0x100a },
1686 { 0x00, 0xa0ff },
1687 { 0x04, 0xf800 },
1688 { 0x04, 0xf000 },
1689
1690 { 0x1f, 0x0000 },
1691 { 0x0b, 0x0000 },
1692 { 0x00, 0x9200 }
1693 };
1694
françois romieu4da19632011-01-03 15:07:55 +00001695 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001696}
1697
françois romieu4da19632011-01-03 15:07:55 +00001698static void rtl8169sb_hw_phy_config(struct rtl8169_private *tp)
Francois Romieu5615d9f2007-08-17 17:50:46 +02001699{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08001700 static const struct phy_reg phy_reg_init[] = {
Francois Romieua441d7b2007-08-17 18:26:35 +02001701 { 0x1f, 0x0002 },
1702 { 0x01, 0x90d0 },
1703 { 0x1f, 0x0000 }
1704 };
1705
françois romieu4da19632011-01-03 15:07:55 +00001706 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
Francois Romieu5615d9f2007-08-17 17:50:46 +02001707}
1708
françois romieu4da19632011-01-03 15:07:55 +00001709static void rtl8169scd_hw_phy_config_quirk(struct rtl8169_private *tp)
françois romieu2e9558562009-08-10 19:44:19 +00001710{
1711 struct pci_dev *pdev = tp->pci_dev;
1712 u16 vendor_id, device_id;
1713
1714 pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &vendor_id);
1715 pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &device_id);
1716
1717 if ((vendor_id != PCI_VENDOR_ID_GIGABYTE) || (device_id != 0xe000))
1718 return;
1719
françois romieu4da19632011-01-03 15:07:55 +00001720 rtl_writephy(tp, 0x1f, 0x0001);
1721 rtl_writephy(tp, 0x10, 0xf01b);
1722 rtl_writephy(tp, 0x1f, 0x0000);
françois romieu2e9558562009-08-10 19:44:19 +00001723}
1724
françois romieu4da19632011-01-03 15:07:55 +00001725static void rtl8169scd_hw_phy_config(struct rtl8169_private *tp)
françois romieu2e9558562009-08-10 19:44:19 +00001726{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08001727 static const struct phy_reg phy_reg_init[] = {
françois romieu2e9558562009-08-10 19:44:19 +00001728 { 0x1f, 0x0001 },
1729 { 0x04, 0x0000 },
1730 { 0x03, 0x00a1 },
1731 { 0x02, 0x0008 },
1732 { 0x01, 0x0120 },
1733 { 0x00, 0x1000 },
1734 { 0x04, 0x0800 },
1735 { 0x04, 0x9000 },
1736 { 0x03, 0x802f },
1737 { 0x02, 0x4f02 },
1738 { 0x01, 0x0409 },
1739 { 0x00, 0xf099 },
1740 { 0x04, 0x9800 },
1741 { 0x04, 0xa000 },
1742 { 0x03, 0xdf01 },
1743 { 0x02, 0xdf20 },
1744 { 0x01, 0xff95 },
1745 { 0x00, 0xba00 },
1746 { 0x04, 0xa800 },
1747 { 0x04, 0xf000 },
1748 { 0x03, 0xdf01 },
1749 { 0x02, 0xdf20 },
1750 { 0x01, 0x101a },
1751 { 0x00, 0xa0ff },
1752 { 0x04, 0xf800 },
1753 { 0x04, 0x0000 },
1754 { 0x1f, 0x0000 },
1755
1756 { 0x1f, 0x0001 },
1757 { 0x10, 0xf41b },
1758 { 0x14, 0xfb54 },
1759 { 0x18, 0xf5c7 },
1760 { 0x1f, 0x0000 },
1761
1762 { 0x1f, 0x0001 },
1763 { 0x17, 0x0cc0 },
1764 { 0x1f, 0x0000 }
1765 };
1766
françois romieu4da19632011-01-03 15:07:55 +00001767 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
françois romieu2e9558562009-08-10 19:44:19 +00001768
françois romieu4da19632011-01-03 15:07:55 +00001769 rtl8169scd_hw_phy_config_quirk(tp);
françois romieu2e9558562009-08-10 19:44:19 +00001770}
1771
françois romieu4da19632011-01-03 15:07:55 +00001772static void rtl8169sce_hw_phy_config(struct rtl8169_private *tp)
françois romieu8c7006a2009-08-10 19:43:29 +00001773{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08001774 static const struct phy_reg phy_reg_init[] = {
françois romieu8c7006a2009-08-10 19:43:29 +00001775 { 0x1f, 0x0001 },
1776 { 0x04, 0x0000 },
1777 { 0x03, 0x00a1 },
1778 { 0x02, 0x0008 },
1779 { 0x01, 0x0120 },
1780 { 0x00, 0x1000 },
1781 { 0x04, 0x0800 },
1782 { 0x04, 0x9000 },
1783 { 0x03, 0x802f },
1784 { 0x02, 0x4f02 },
1785 { 0x01, 0x0409 },
1786 { 0x00, 0xf099 },
1787 { 0x04, 0x9800 },
1788 { 0x04, 0xa000 },
1789 { 0x03, 0xdf01 },
1790 { 0x02, 0xdf20 },
1791 { 0x01, 0xff95 },
1792 { 0x00, 0xba00 },
1793 { 0x04, 0xa800 },
1794 { 0x04, 0xf000 },
1795 { 0x03, 0xdf01 },
1796 { 0x02, 0xdf20 },
1797 { 0x01, 0x101a },
1798 { 0x00, 0xa0ff },
1799 { 0x04, 0xf800 },
1800 { 0x04, 0x0000 },
1801 { 0x1f, 0x0000 },
1802
1803 { 0x1f, 0x0001 },
1804 { 0x0b, 0x8480 },
1805 { 0x1f, 0x0000 },
1806
1807 { 0x1f, 0x0001 },
1808 { 0x18, 0x67c7 },
1809 { 0x04, 0x2000 },
1810 { 0x03, 0x002f },
1811 { 0x02, 0x4360 },
1812 { 0x01, 0x0109 },
1813 { 0x00, 0x3022 },
1814 { 0x04, 0x2800 },
1815 { 0x1f, 0x0000 },
1816
1817 { 0x1f, 0x0001 },
1818 { 0x17, 0x0cc0 },
1819 { 0x1f, 0x0000 }
1820 };
1821
françois romieu4da19632011-01-03 15:07:55 +00001822 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
françois romieu8c7006a2009-08-10 19:43:29 +00001823}
1824
françois romieu4da19632011-01-03 15:07:55 +00001825static void rtl8168bb_hw_phy_config(struct rtl8169_private *tp)
Francois Romieu236b8082008-05-30 16:11:48 +02001826{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08001827 static const struct phy_reg phy_reg_init[] = {
Francois Romieu236b8082008-05-30 16:11:48 +02001828 { 0x10, 0xf41b },
1829 { 0x1f, 0x0000 }
1830 };
1831
françois romieu4da19632011-01-03 15:07:55 +00001832 rtl_writephy(tp, 0x1f, 0x0001);
1833 rtl_patchphy(tp, 0x16, 1 << 0);
Francois Romieu236b8082008-05-30 16:11:48 +02001834
françois romieu4da19632011-01-03 15:07:55 +00001835 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
Francois Romieu236b8082008-05-30 16:11:48 +02001836}
1837
françois romieu4da19632011-01-03 15:07:55 +00001838static void rtl8168bef_hw_phy_config(struct rtl8169_private *tp)
Francois Romieu236b8082008-05-30 16:11:48 +02001839{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08001840 static const struct phy_reg phy_reg_init[] = {
Francois Romieu236b8082008-05-30 16:11:48 +02001841 { 0x1f, 0x0001 },
1842 { 0x10, 0xf41b },
1843 { 0x1f, 0x0000 }
1844 };
1845
françois romieu4da19632011-01-03 15:07:55 +00001846 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
Francois Romieu236b8082008-05-30 16:11:48 +02001847}
1848
françois romieu4da19632011-01-03 15:07:55 +00001849static void rtl8168cp_1_hw_phy_config(struct rtl8169_private *tp)
Francois Romieu867763c2007-08-17 18:21:58 +02001850{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08001851 static const struct phy_reg phy_reg_init[] = {
Francois Romieu867763c2007-08-17 18:21:58 +02001852 { 0x1f, 0x0000 },
1853 { 0x1d, 0x0f00 },
1854 { 0x1f, 0x0002 },
1855 { 0x0c, 0x1ec8 },
1856 { 0x1f, 0x0000 }
1857 };
1858
françois romieu4da19632011-01-03 15:07:55 +00001859 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
Francois Romieu867763c2007-08-17 18:21:58 +02001860}
1861
françois romieu4da19632011-01-03 15:07:55 +00001862static void rtl8168cp_2_hw_phy_config(struct rtl8169_private *tp)
Francois Romieuef3386f2008-06-29 12:24:30 +02001863{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08001864 static const struct phy_reg phy_reg_init[] = {
Francois Romieuef3386f2008-06-29 12:24:30 +02001865 { 0x1f, 0x0001 },
1866 { 0x1d, 0x3d98 },
1867 { 0x1f, 0x0000 }
1868 };
1869
françois romieu4da19632011-01-03 15:07:55 +00001870 rtl_writephy(tp, 0x1f, 0x0000);
1871 rtl_patchphy(tp, 0x14, 1 << 5);
1872 rtl_patchphy(tp, 0x0d, 1 << 5);
Francois Romieuef3386f2008-06-29 12:24:30 +02001873
françois romieu4da19632011-01-03 15:07:55 +00001874 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
Francois Romieuef3386f2008-06-29 12:24:30 +02001875}
1876
françois romieu4da19632011-01-03 15:07:55 +00001877static void rtl8168c_1_hw_phy_config(struct rtl8169_private *tp)
Francois Romieu867763c2007-08-17 18:21:58 +02001878{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08001879 static const struct phy_reg phy_reg_init[] = {
Francois Romieua3f80672007-10-18 14:35:11 +02001880 { 0x1f, 0x0001 },
1881 { 0x12, 0x2300 },
Francois Romieu867763c2007-08-17 18:21:58 +02001882 { 0x1f, 0x0002 },
1883 { 0x00, 0x88d4 },
1884 { 0x01, 0x82b1 },
1885 { 0x03, 0x7002 },
1886 { 0x08, 0x9e30 },
1887 { 0x09, 0x01f0 },
1888 { 0x0a, 0x5500 },
1889 { 0x0c, 0x00c8 },
1890 { 0x1f, 0x0003 },
1891 { 0x12, 0xc096 },
1892 { 0x16, 0x000a },
Francois Romieuf50d4272008-05-30 16:07:07 +02001893 { 0x1f, 0x0000 },
1894 { 0x1f, 0x0000 },
1895 { 0x09, 0x2000 },
1896 { 0x09, 0x0000 }
Francois Romieu867763c2007-08-17 18:21:58 +02001897 };
1898
françois romieu4da19632011-01-03 15:07:55 +00001899 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
Francois Romieuf50d4272008-05-30 16:07:07 +02001900
françois romieu4da19632011-01-03 15:07:55 +00001901 rtl_patchphy(tp, 0x14, 1 << 5);
1902 rtl_patchphy(tp, 0x0d, 1 << 5);
1903 rtl_writephy(tp, 0x1f, 0x0000);
Francois Romieu867763c2007-08-17 18:21:58 +02001904}
1905
françois romieu4da19632011-01-03 15:07:55 +00001906static void rtl8168c_2_hw_phy_config(struct rtl8169_private *tp)
Francois Romieu7da97ec2007-10-18 15:20:43 +02001907{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08001908 static const struct phy_reg phy_reg_init[] = {
Francois Romieuf50d4272008-05-30 16:07:07 +02001909 { 0x1f, 0x0001 },
Francois Romieu7da97ec2007-10-18 15:20:43 +02001910 { 0x12, 0x2300 },
Francois Romieuf50d4272008-05-30 16:07:07 +02001911 { 0x03, 0x802f },
1912 { 0x02, 0x4f02 },
1913 { 0x01, 0x0409 },
1914 { 0x00, 0xf099 },
1915 { 0x04, 0x9800 },
1916 { 0x04, 0x9000 },
1917 { 0x1d, 0x3d98 },
Francois Romieu7da97ec2007-10-18 15:20:43 +02001918 { 0x1f, 0x0002 },
1919 { 0x0c, 0x7eb8 },
Francois Romieuf50d4272008-05-30 16:07:07 +02001920 { 0x06, 0x0761 },
1921 { 0x1f, 0x0003 },
1922 { 0x16, 0x0f0a },
Francois Romieu7da97ec2007-10-18 15:20:43 +02001923 { 0x1f, 0x0000 }
1924 };
1925
françois romieu4da19632011-01-03 15:07:55 +00001926 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
Francois Romieuf50d4272008-05-30 16:07:07 +02001927
françois romieu4da19632011-01-03 15:07:55 +00001928 rtl_patchphy(tp, 0x16, 1 << 0);
1929 rtl_patchphy(tp, 0x14, 1 << 5);
1930 rtl_patchphy(tp, 0x0d, 1 << 5);
1931 rtl_writephy(tp, 0x1f, 0x0000);
Francois Romieu7da97ec2007-10-18 15:20:43 +02001932}
1933
françois romieu4da19632011-01-03 15:07:55 +00001934static void rtl8168c_3_hw_phy_config(struct rtl8169_private *tp)
Francois Romieu197ff762008-06-28 13:16:02 +02001935{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08001936 static const struct phy_reg phy_reg_init[] = {
Francois Romieu197ff762008-06-28 13:16:02 +02001937 { 0x1f, 0x0001 },
1938 { 0x12, 0x2300 },
1939 { 0x1d, 0x3d98 },
1940 { 0x1f, 0x0002 },
1941 { 0x0c, 0x7eb8 },
1942 { 0x06, 0x5461 },
1943 { 0x1f, 0x0003 },
1944 { 0x16, 0x0f0a },
1945 { 0x1f, 0x0000 }
1946 };
1947
françois romieu4da19632011-01-03 15:07:55 +00001948 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
Francois Romieu197ff762008-06-28 13:16:02 +02001949
françois romieu4da19632011-01-03 15:07:55 +00001950 rtl_patchphy(tp, 0x16, 1 << 0);
1951 rtl_patchphy(tp, 0x14, 1 << 5);
1952 rtl_patchphy(tp, 0x0d, 1 << 5);
1953 rtl_writephy(tp, 0x1f, 0x0000);
Francois Romieu197ff762008-06-28 13:16:02 +02001954}
1955
françois romieu4da19632011-01-03 15:07:55 +00001956static void rtl8168c_4_hw_phy_config(struct rtl8169_private *tp)
Francois Romieu6fb07052008-06-29 11:54:28 +02001957{
françois romieu4da19632011-01-03 15:07:55 +00001958 rtl8168c_3_hw_phy_config(tp);
Francois Romieu6fb07052008-06-29 11:54:28 +02001959}
1960
françois romieubca03d52011-01-03 15:07:31 +00001961static void rtl8168d_1_hw_phy_config(struct rtl8169_private *tp)
Francois Romieu5b538df2008-07-20 16:22:45 +02001962{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08001963 static const struct phy_reg phy_reg_init_0[] = {
françois romieubca03d52011-01-03 15:07:31 +00001964 /* Channel Estimation */
Francois Romieu5b538df2008-07-20 16:22:45 +02001965 { 0x1f, 0x0001 },
françois romieudaf9df62009-10-07 12:44:20 +00001966 { 0x06, 0x4064 },
1967 { 0x07, 0x2863 },
1968 { 0x08, 0x059c },
1969 { 0x09, 0x26b4 },
1970 { 0x0a, 0x6a19 },
1971 { 0x0b, 0xdcc8 },
1972 { 0x10, 0xf06d },
1973 { 0x14, 0x7f68 },
1974 { 0x18, 0x7fd9 },
1975 { 0x1c, 0xf0ff },
1976 { 0x1d, 0x3d9c },
Francois Romieu5b538df2008-07-20 16:22:45 +02001977 { 0x1f, 0x0003 },
françois romieudaf9df62009-10-07 12:44:20 +00001978 { 0x12, 0xf49f },
1979 { 0x13, 0x070b },
1980 { 0x1a, 0x05ad },
françois romieubca03d52011-01-03 15:07:31 +00001981 { 0x14, 0x94c0 },
1982
1983 /*
1984 * Tx Error Issue
1985 * enhance line driver power
1986 */
Francois Romieu5b538df2008-07-20 16:22:45 +02001987 { 0x1f, 0x0002 },
françois romieudaf9df62009-10-07 12:44:20 +00001988 { 0x06, 0x5561 },
Francois Romieu5b538df2008-07-20 16:22:45 +02001989 { 0x1f, 0x0005 },
françois romieudaf9df62009-10-07 12:44:20 +00001990 { 0x05, 0x8332 },
françois romieubca03d52011-01-03 15:07:31 +00001991 { 0x06, 0x5561 },
1992
1993 /*
1994 * Can not link to 1Gbps with bad cable
1995 * Decrease SNR threshold form 21.07dB to 19.04dB
1996 */
1997 { 0x1f, 0x0001 },
1998 { 0x17, 0x0cc0 },
françois romieudaf9df62009-10-07 12:44:20 +00001999
2000 { 0x1f, 0x0000 },
françois romieubca03d52011-01-03 15:07:31 +00002001 { 0x0d, 0xf880 }
Francois Romieu5b538df2008-07-20 16:22:45 +02002002 };
françois romieubca03d52011-01-03 15:07:31 +00002003 void __iomem *ioaddr = tp->mmio_addr;
2004 const struct firmware *fw;
Francois Romieu5b538df2008-07-20 16:22:45 +02002005
françois romieu4da19632011-01-03 15:07:55 +00002006 rtl_writephy_batch(tp, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
Francois Romieu5b538df2008-07-20 16:22:45 +02002007
françois romieubca03d52011-01-03 15:07:31 +00002008 /*
2009 * Rx Error Issue
2010 * Fine Tune Switching regulator parameter
2011 */
françois romieu4da19632011-01-03 15:07:55 +00002012 rtl_writephy(tp, 0x1f, 0x0002);
2013 rtl_w1w0_phy(tp, 0x0b, 0x0010, 0x00ef);
2014 rtl_w1w0_phy(tp, 0x0c, 0xa200, 0x5d00);
françois romieudaf9df62009-10-07 12:44:20 +00002015
françois romieudaf9df62009-10-07 12:44:20 +00002016 if (rtl8168d_efuse_read(ioaddr, 0x01) == 0xb1) {
Alexey Dobriyan350f7592009-11-25 15:54:21 -08002017 static const struct phy_reg phy_reg_init[] = {
françois romieudaf9df62009-10-07 12:44:20 +00002018 { 0x1f, 0x0002 },
2019 { 0x05, 0x669a },
Francois Romieu5b538df2008-07-20 16:22:45 +02002020 { 0x1f, 0x0005 },
françois romieudaf9df62009-10-07 12:44:20 +00002021 { 0x05, 0x8330 },
2022 { 0x06, 0x669a },
2023 { 0x1f, 0x0002 }
2024 };
2025 int val;
2026
françois romieu4da19632011-01-03 15:07:55 +00002027 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
françois romieudaf9df62009-10-07 12:44:20 +00002028
françois romieu4da19632011-01-03 15:07:55 +00002029 val = rtl_readphy(tp, 0x0d);
françois romieudaf9df62009-10-07 12:44:20 +00002030
2031 if ((val & 0x00ff) != 0x006c) {
Alexey Dobriyan350f7592009-11-25 15:54:21 -08002032 static const u32 set[] = {
françois romieudaf9df62009-10-07 12:44:20 +00002033 0x0065, 0x0066, 0x0067, 0x0068,
2034 0x0069, 0x006a, 0x006b, 0x006c
2035 };
2036 int i;
2037
françois romieu4da19632011-01-03 15:07:55 +00002038 rtl_writephy(tp, 0x1f, 0x0002);
françois romieudaf9df62009-10-07 12:44:20 +00002039
2040 val &= 0xff00;
2041 for (i = 0; i < ARRAY_SIZE(set); i++)
françois romieu4da19632011-01-03 15:07:55 +00002042 rtl_writephy(tp, 0x0d, val | set[i]);
françois romieudaf9df62009-10-07 12:44:20 +00002043 }
2044 } else {
Alexey Dobriyan350f7592009-11-25 15:54:21 -08002045 static const struct phy_reg phy_reg_init[] = {
françois romieudaf9df62009-10-07 12:44:20 +00002046 { 0x1f, 0x0002 },
2047 { 0x05, 0x6662 },
Francois Romieu5b538df2008-07-20 16:22:45 +02002048 { 0x1f, 0x0005 },
françois romieudaf9df62009-10-07 12:44:20 +00002049 { 0x05, 0x8330 },
2050 { 0x06, 0x6662 }
Francois Romieu5b538df2008-07-20 16:22:45 +02002051 };
2052
françois romieu4da19632011-01-03 15:07:55 +00002053 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
Francois Romieu5b538df2008-07-20 16:22:45 +02002054 }
2055
françois romieubca03d52011-01-03 15:07:31 +00002056 /* RSET couple improve */
françois romieu4da19632011-01-03 15:07:55 +00002057 rtl_writephy(tp, 0x1f, 0x0002);
2058 rtl_patchphy(tp, 0x0d, 0x0300);
2059 rtl_patchphy(tp, 0x0f, 0x0010);
françois romieudaf9df62009-10-07 12:44:20 +00002060
françois romieubca03d52011-01-03 15:07:31 +00002061 /* Fine tune PLL performance */
françois romieu4da19632011-01-03 15:07:55 +00002062 rtl_writephy(tp, 0x1f, 0x0002);
2063 rtl_w1w0_phy(tp, 0x02, 0x0100, 0x0600);
2064 rtl_w1w0_phy(tp, 0x03, 0x0000, 0xe000);
françois romieudaf9df62009-10-07 12:44:20 +00002065
françois romieu4da19632011-01-03 15:07:55 +00002066 rtl_writephy(tp, 0x1f, 0x0005);
2067 rtl_writephy(tp, 0x05, 0x001b);
2068 if (rtl_readphy(tp, 0x06) == 0xbf00 &&
françois romieubca03d52011-01-03 15:07:31 +00002069 request_firmware(&fw, FIRMWARE_8168D_1, &tp->pci_dev->dev) == 0) {
2070 rtl_phy_write_fw(tp, fw);
2071 release_firmware(fw);
2072 } else {
2073 netif_warn(tp, probe, tp->dev, "unable to apply firmware patch\n");
2074 }
2075
françois romieu4da19632011-01-03 15:07:55 +00002076 rtl_writephy(tp, 0x1f, 0x0000);
françois romieudaf9df62009-10-07 12:44:20 +00002077}
2078
françois romieubca03d52011-01-03 15:07:31 +00002079static void rtl8168d_2_hw_phy_config(struct rtl8169_private *tp)
françois romieudaf9df62009-10-07 12:44:20 +00002080{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08002081 static const struct phy_reg phy_reg_init_0[] = {
françois romieubca03d52011-01-03 15:07:31 +00002082 /* Channel Estimation */
françois romieudaf9df62009-10-07 12:44:20 +00002083 { 0x1f, 0x0001 },
2084 { 0x06, 0x4064 },
2085 { 0x07, 0x2863 },
2086 { 0x08, 0x059c },
2087 { 0x09, 0x26b4 },
2088 { 0x0a, 0x6a19 },
2089 { 0x0b, 0xdcc8 },
2090 { 0x10, 0xf06d },
2091 { 0x14, 0x7f68 },
2092 { 0x18, 0x7fd9 },
2093 { 0x1c, 0xf0ff },
2094 { 0x1d, 0x3d9c },
2095 { 0x1f, 0x0003 },
2096 { 0x12, 0xf49f },
2097 { 0x13, 0x070b },
2098 { 0x1a, 0x05ad },
2099 { 0x14, 0x94c0 },
2100
françois romieubca03d52011-01-03 15:07:31 +00002101 /*
2102 * Tx Error Issue
2103 * enhance line driver power
2104 */
françois romieudaf9df62009-10-07 12:44:20 +00002105 { 0x1f, 0x0002 },
2106 { 0x06, 0x5561 },
2107 { 0x1f, 0x0005 },
2108 { 0x05, 0x8332 },
françois romieubca03d52011-01-03 15:07:31 +00002109 { 0x06, 0x5561 },
2110
2111 /*
2112 * Can not link to 1Gbps with bad cable
2113 * Decrease SNR threshold form 21.07dB to 19.04dB
2114 */
2115 { 0x1f, 0x0001 },
2116 { 0x17, 0x0cc0 },
françois romieudaf9df62009-10-07 12:44:20 +00002117
2118 { 0x1f, 0x0000 },
françois romieubca03d52011-01-03 15:07:31 +00002119 { 0x0d, 0xf880 }
françois romieudaf9df62009-10-07 12:44:20 +00002120 };
françois romieubca03d52011-01-03 15:07:31 +00002121 void __iomem *ioaddr = tp->mmio_addr;
2122 const struct firmware *fw;
françois romieudaf9df62009-10-07 12:44:20 +00002123
françois romieu4da19632011-01-03 15:07:55 +00002124 rtl_writephy_batch(tp, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
françois romieudaf9df62009-10-07 12:44:20 +00002125
2126 if (rtl8168d_efuse_read(ioaddr, 0x01) == 0xb1) {
Alexey Dobriyan350f7592009-11-25 15:54:21 -08002127 static const struct phy_reg phy_reg_init[] = {
françois romieudaf9df62009-10-07 12:44:20 +00002128 { 0x1f, 0x0002 },
2129 { 0x05, 0x669a },
2130 { 0x1f, 0x0005 },
2131 { 0x05, 0x8330 },
2132 { 0x06, 0x669a },
2133
2134 { 0x1f, 0x0002 }
2135 };
2136 int val;
2137
françois romieu4da19632011-01-03 15:07:55 +00002138 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
françois romieudaf9df62009-10-07 12:44:20 +00002139
françois romieu4da19632011-01-03 15:07:55 +00002140 val = rtl_readphy(tp, 0x0d);
françois romieudaf9df62009-10-07 12:44:20 +00002141 if ((val & 0x00ff) != 0x006c) {
Joe Perchesb6bc7652010-12-21 02:16:08 -08002142 static const u32 set[] = {
françois romieudaf9df62009-10-07 12:44:20 +00002143 0x0065, 0x0066, 0x0067, 0x0068,
2144 0x0069, 0x006a, 0x006b, 0x006c
2145 };
2146 int i;
2147
françois romieu4da19632011-01-03 15:07:55 +00002148 rtl_writephy(tp, 0x1f, 0x0002);
françois romieudaf9df62009-10-07 12:44:20 +00002149
2150 val &= 0xff00;
2151 for (i = 0; i < ARRAY_SIZE(set); i++)
françois romieu4da19632011-01-03 15:07:55 +00002152 rtl_writephy(tp, 0x0d, val | set[i]);
françois romieudaf9df62009-10-07 12:44:20 +00002153 }
2154 } else {
Alexey Dobriyan350f7592009-11-25 15:54:21 -08002155 static const struct phy_reg phy_reg_init[] = {
françois romieudaf9df62009-10-07 12:44:20 +00002156 { 0x1f, 0x0002 },
2157 { 0x05, 0x2642 },
2158 { 0x1f, 0x0005 },
2159 { 0x05, 0x8330 },
2160 { 0x06, 0x2642 }
2161 };
2162
françois romieu4da19632011-01-03 15:07:55 +00002163 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
françois romieudaf9df62009-10-07 12:44:20 +00002164 }
2165
françois romieubca03d52011-01-03 15:07:31 +00002166 /* Fine tune PLL performance */
françois romieu4da19632011-01-03 15:07:55 +00002167 rtl_writephy(tp, 0x1f, 0x0002);
2168 rtl_w1w0_phy(tp, 0x02, 0x0100, 0x0600);
2169 rtl_w1w0_phy(tp, 0x03, 0x0000, 0xe000);
françois romieudaf9df62009-10-07 12:44:20 +00002170
françois romieubca03d52011-01-03 15:07:31 +00002171 /* Switching regulator Slew rate */
françois romieu4da19632011-01-03 15:07:55 +00002172 rtl_writephy(tp, 0x1f, 0x0002);
2173 rtl_patchphy(tp, 0x0f, 0x0017);
françois romieudaf9df62009-10-07 12:44:20 +00002174
françois romieu4da19632011-01-03 15:07:55 +00002175 rtl_writephy(tp, 0x1f, 0x0005);
2176 rtl_writephy(tp, 0x05, 0x001b);
2177 if (rtl_readphy(tp, 0x06) == 0xb300 &&
françois romieubca03d52011-01-03 15:07:31 +00002178 request_firmware(&fw, FIRMWARE_8168D_2, &tp->pci_dev->dev) == 0) {
2179 rtl_phy_write_fw(tp, fw);
2180 release_firmware(fw);
2181 } else {
2182 netif_warn(tp, probe, tp->dev, "unable to apply firmware patch\n");
2183 }
2184
françois romieu4da19632011-01-03 15:07:55 +00002185 rtl_writephy(tp, 0x1f, 0x0000);
françois romieudaf9df62009-10-07 12:44:20 +00002186}
2187
françois romieu4da19632011-01-03 15:07:55 +00002188static void rtl8168d_3_hw_phy_config(struct rtl8169_private *tp)
françois romieudaf9df62009-10-07 12:44:20 +00002189{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08002190 static const struct phy_reg phy_reg_init[] = {
françois romieudaf9df62009-10-07 12:44:20 +00002191 { 0x1f, 0x0002 },
2192 { 0x10, 0x0008 },
2193 { 0x0d, 0x006c },
2194
2195 { 0x1f, 0x0000 },
2196 { 0x0d, 0xf880 },
2197
2198 { 0x1f, 0x0001 },
2199 { 0x17, 0x0cc0 },
2200
2201 { 0x1f, 0x0001 },
2202 { 0x0b, 0xa4d8 },
2203 { 0x09, 0x281c },
2204 { 0x07, 0x2883 },
2205 { 0x0a, 0x6b35 },
2206 { 0x1d, 0x3da4 },
2207 { 0x1c, 0xeffd },
2208 { 0x14, 0x7f52 },
2209 { 0x18, 0x7fc6 },
2210 { 0x08, 0x0601 },
2211 { 0x06, 0x4063 },
2212 { 0x10, 0xf074 },
2213 { 0x1f, 0x0003 },
2214 { 0x13, 0x0789 },
2215 { 0x12, 0xf4bd },
2216 { 0x1a, 0x04fd },
2217 { 0x14, 0x84b0 },
2218 { 0x1f, 0x0000 },
2219 { 0x00, 0x9200 },
2220
2221 { 0x1f, 0x0005 },
2222 { 0x01, 0x0340 },
2223 { 0x1f, 0x0001 },
2224 { 0x04, 0x4000 },
2225 { 0x03, 0x1d21 },
2226 { 0x02, 0x0c32 },
2227 { 0x01, 0x0200 },
2228 { 0x00, 0x5554 },
2229 { 0x04, 0x4800 },
2230 { 0x04, 0x4000 },
2231 { 0x04, 0xf000 },
2232 { 0x03, 0xdf01 },
2233 { 0x02, 0xdf20 },
2234 { 0x01, 0x101a },
2235 { 0x00, 0xa0ff },
2236 { 0x04, 0xf800 },
2237 { 0x04, 0xf000 },
2238 { 0x1f, 0x0000 },
2239
2240 { 0x1f, 0x0007 },
2241 { 0x1e, 0x0023 },
2242 { 0x16, 0x0000 },
2243 { 0x1f, 0x0000 }
2244 };
2245
françois romieu4da19632011-01-03 15:07:55 +00002246 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
Francois Romieu5b538df2008-07-20 16:22:45 +02002247}
2248
françois romieu4da19632011-01-03 15:07:55 +00002249static void rtl8102e_hw_phy_config(struct rtl8169_private *tp)
Francois Romieu2857ffb2008-08-02 21:08:49 +02002250{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08002251 static const struct phy_reg phy_reg_init[] = {
Francois Romieu2857ffb2008-08-02 21:08:49 +02002252 { 0x1f, 0x0003 },
2253 { 0x08, 0x441d },
2254 { 0x01, 0x9100 },
2255 { 0x1f, 0x0000 }
2256 };
2257
françois romieu4da19632011-01-03 15:07:55 +00002258 rtl_writephy(tp, 0x1f, 0x0000);
2259 rtl_patchphy(tp, 0x11, 1 << 12);
2260 rtl_patchphy(tp, 0x19, 1 << 13);
2261 rtl_patchphy(tp, 0x10, 1 << 15);
Francois Romieu2857ffb2008-08-02 21:08:49 +02002262
françois romieu4da19632011-01-03 15:07:55 +00002263 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
Francois Romieu2857ffb2008-08-02 21:08:49 +02002264}
2265
Francois Romieu5615d9f2007-08-17 17:50:46 +02002266static void rtl_hw_phy_config(struct net_device *dev)
2267{
2268 struct rtl8169_private *tp = netdev_priv(dev);
Francois Romieu5615d9f2007-08-17 17:50:46 +02002269
2270 rtl8169_print_mac_version(tp);
2271
2272 switch (tp->mac_version) {
2273 case RTL_GIGA_MAC_VER_01:
2274 break;
2275 case RTL_GIGA_MAC_VER_02:
2276 case RTL_GIGA_MAC_VER_03:
françois romieu4da19632011-01-03 15:07:55 +00002277 rtl8169s_hw_phy_config(tp);
Francois Romieu5615d9f2007-08-17 17:50:46 +02002278 break;
2279 case RTL_GIGA_MAC_VER_04:
françois romieu4da19632011-01-03 15:07:55 +00002280 rtl8169sb_hw_phy_config(tp);
Francois Romieu5615d9f2007-08-17 17:50:46 +02002281 break;
françois romieu2e9558562009-08-10 19:44:19 +00002282 case RTL_GIGA_MAC_VER_05:
françois romieu4da19632011-01-03 15:07:55 +00002283 rtl8169scd_hw_phy_config(tp);
françois romieu2e9558562009-08-10 19:44:19 +00002284 break;
françois romieu8c7006a2009-08-10 19:43:29 +00002285 case RTL_GIGA_MAC_VER_06:
françois romieu4da19632011-01-03 15:07:55 +00002286 rtl8169sce_hw_phy_config(tp);
françois romieu8c7006a2009-08-10 19:43:29 +00002287 break;
Francois Romieu2857ffb2008-08-02 21:08:49 +02002288 case RTL_GIGA_MAC_VER_07:
2289 case RTL_GIGA_MAC_VER_08:
2290 case RTL_GIGA_MAC_VER_09:
françois romieu4da19632011-01-03 15:07:55 +00002291 rtl8102e_hw_phy_config(tp);
Francois Romieu2857ffb2008-08-02 21:08:49 +02002292 break;
Francois Romieu236b8082008-05-30 16:11:48 +02002293 case RTL_GIGA_MAC_VER_11:
françois romieu4da19632011-01-03 15:07:55 +00002294 rtl8168bb_hw_phy_config(tp);
Francois Romieu236b8082008-05-30 16:11:48 +02002295 break;
2296 case RTL_GIGA_MAC_VER_12:
françois romieu4da19632011-01-03 15:07:55 +00002297 rtl8168bef_hw_phy_config(tp);
Francois Romieu236b8082008-05-30 16:11:48 +02002298 break;
2299 case RTL_GIGA_MAC_VER_17:
françois romieu4da19632011-01-03 15:07:55 +00002300 rtl8168bef_hw_phy_config(tp);
Francois Romieu236b8082008-05-30 16:11:48 +02002301 break;
Francois Romieu867763c2007-08-17 18:21:58 +02002302 case RTL_GIGA_MAC_VER_18:
françois romieu4da19632011-01-03 15:07:55 +00002303 rtl8168cp_1_hw_phy_config(tp);
Francois Romieu867763c2007-08-17 18:21:58 +02002304 break;
2305 case RTL_GIGA_MAC_VER_19:
françois romieu4da19632011-01-03 15:07:55 +00002306 rtl8168c_1_hw_phy_config(tp);
Francois Romieu867763c2007-08-17 18:21:58 +02002307 break;
Francois Romieu7da97ec2007-10-18 15:20:43 +02002308 case RTL_GIGA_MAC_VER_20:
françois romieu4da19632011-01-03 15:07:55 +00002309 rtl8168c_2_hw_phy_config(tp);
Francois Romieu7da97ec2007-10-18 15:20:43 +02002310 break;
Francois Romieu197ff762008-06-28 13:16:02 +02002311 case RTL_GIGA_MAC_VER_21:
françois romieu4da19632011-01-03 15:07:55 +00002312 rtl8168c_3_hw_phy_config(tp);
Francois Romieu197ff762008-06-28 13:16:02 +02002313 break;
Francois Romieu6fb07052008-06-29 11:54:28 +02002314 case RTL_GIGA_MAC_VER_22:
françois romieu4da19632011-01-03 15:07:55 +00002315 rtl8168c_4_hw_phy_config(tp);
Francois Romieu6fb07052008-06-29 11:54:28 +02002316 break;
Francois Romieuef3386f2008-06-29 12:24:30 +02002317 case RTL_GIGA_MAC_VER_23:
Francois Romieu7f3e3d32008-07-20 18:53:20 +02002318 case RTL_GIGA_MAC_VER_24:
françois romieu4da19632011-01-03 15:07:55 +00002319 rtl8168cp_2_hw_phy_config(tp);
Francois Romieuef3386f2008-06-29 12:24:30 +02002320 break;
Francois Romieu5b538df2008-07-20 16:22:45 +02002321 case RTL_GIGA_MAC_VER_25:
françois romieubca03d52011-01-03 15:07:31 +00002322 rtl8168d_1_hw_phy_config(tp);
françois romieudaf9df62009-10-07 12:44:20 +00002323 break;
2324 case RTL_GIGA_MAC_VER_26:
françois romieubca03d52011-01-03 15:07:31 +00002325 rtl8168d_2_hw_phy_config(tp);
françois romieudaf9df62009-10-07 12:44:20 +00002326 break;
2327 case RTL_GIGA_MAC_VER_27:
françois romieu4da19632011-01-03 15:07:55 +00002328 rtl8168d_3_hw_phy_config(tp);
Francois Romieu5b538df2008-07-20 16:22:45 +02002329 break;
Francois Romieuef3386f2008-06-29 12:24:30 +02002330
Francois Romieu5615d9f2007-08-17 17:50:46 +02002331 default:
2332 break;
2333 }
2334}
2335
Linus Torvalds1da177e2005-04-16 15:20:36 -07002336static void rtl8169_phy_timer(unsigned long __opaque)
2337{
2338 struct net_device *dev = (struct net_device *)__opaque;
2339 struct rtl8169_private *tp = netdev_priv(dev);
2340 struct timer_list *timer = &tp->timer;
2341 void __iomem *ioaddr = tp->mmio_addr;
2342 unsigned long timeout = RTL8169_PHY_TIMEOUT;
2343
Francois Romieubcf0bf92006-07-26 23:14:13 +02002344 assert(tp->mac_version > RTL_GIGA_MAC_VER_01);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002345
Francois Romieu64e4bfb2006-08-17 12:43:06 +02002346 if (!(tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL))
Linus Torvalds1da177e2005-04-16 15:20:36 -07002347 return;
2348
2349 spin_lock_irq(&tp->lock);
2350
françois romieu4da19632011-01-03 15:07:55 +00002351 if (tp->phy_reset_pending(tp)) {
Francois Romieu5b0384f2006-08-16 16:00:01 +02002352 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002353 * A busy loop could burn quite a few cycles on nowadays CPU.
2354 * Let's delay the execution of the timer for a few ticks.
2355 */
2356 timeout = HZ/10;
2357 goto out_mod_timer;
2358 }
2359
2360 if (tp->link_ok(ioaddr))
2361 goto out_unlock;
2362
Joe Perchesbf82c182010-02-09 11:49:50 +00002363 netif_warn(tp, link, dev, "PHY reset until link up\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07002364
françois romieu4da19632011-01-03 15:07:55 +00002365 tp->phy_reset_enable(tp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002366
2367out_mod_timer:
2368 mod_timer(timer, jiffies + timeout);
2369out_unlock:
2370 spin_unlock_irq(&tp->lock);
2371}
2372
2373static inline void rtl8169_delete_timer(struct net_device *dev)
2374{
2375 struct rtl8169_private *tp = netdev_priv(dev);
2376 struct timer_list *timer = &tp->timer;
2377
Francois Romieue179bb72007-08-17 15:05:21 +02002378 if (tp->mac_version <= RTL_GIGA_MAC_VER_01)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002379 return;
2380
2381 del_timer_sync(timer);
2382}
2383
2384static inline void rtl8169_request_timer(struct net_device *dev)
2385{
2386 struct rtl8169_private *tp = netdev_priv(dev);
2387 struct timer_list *timer = &tp->timer;
2388
Francois Romieue179bb72007-08-17 15:05:21 +02002389 if (tp->mac_version <= RTL_GIGA_MAC_VER_01)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002390 return;
2391
Francois Romieu2efa53f2007-03-09 00:00:05 +01002392 mod_timer(timer, jiffies + RTL8169_PHY_TIMEOUT);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002393}
2394
2395#ifdef CONFIG_NET_POLL_CONTROLLER
2396/*
2397 * Polling 'interrupt' - used by things like netconsole to send skbs
2398 * without having to re-enable interrupts. It's not called while
2399 * the interrupt routine is executing.
2400 */
2401static void rtl8169_netpoll(struct net_device *dev)
2402{
2403 struct rtl8169_private *tp = netdev_priv(dev);
2404 struct pci_dev *pdev = tp->pci_dev;
2405
2406 disable_irq(pdev->irq);
David Howells7d12e782006-10-05 14:55:46 +01002407 rtl8169_interrupt(pdev->irq, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002408 enable_irq(pdev->irq);
2409}
2410#endif
2411
2412static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev,
2413 void __iomem *ioaddr)
2414{
2415 iounmap(ioaddr);
2416 pci_release_regions(pdev);
françois romieu87aeec72010-04-26 11:42:06 +00002417 pci_clear_mwi(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002418 pci_disable_device(pdev);
2419 free_netdev(dev);
2420}
2421
Francois Romieubf793292006-11-01 00:53:05 +01002422static void rtl8169_phy_reset(struct net_device *dev,
2423 struct rtl8169_private *tp)
2424{
Francois Romieu07d3f512007-02-21 22:40:46 +01002425 unsigned int i;
Francois Romieubf793292006-11-01 00:53:05 +01002426
françois romieu4da19632011-01-03 15:07:55 +00002427 tp->phy_reset_enable(tp);
Francois Romieubf793292006-11-01 00:53:05 +01002428 for (i = 0; i < 100; i++) {
françois romieu4da19632011-01-03 15:07:55 +00002429 if (!tp->phy_reset_pending(tp))
Francois Romieubf793292006-11-01 00:53:05 +01002430 return;
2431 msleep(1);
2432 }
Joe Perchesbf82c182010-02-09 11:49:50 +00002433 netif_err(tp, link, dev, "PHY reset failed\n");
Francois Romieubf793292006-11-01 00:53:05 +01002434}
2435
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002436static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002437{
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002438 void __iomem *ioaddr = tp->mmio_addr;
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002439
Francois Romieu5615d9f2007-08-17 17:50:46 +02002440 rtl_hw_phy_config(dev);
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002441
Marcus Sundberg773328942008-07-10 21:28:08 +02002442 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) {
2443 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
2444 RTL_W8(0x82, 0x01);
2445 }
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002446
Francois Romieu6dccd162007-02-13 23:38:05 +01002447 pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40);
2448
2449 if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
2450 pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08);
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002451
Francois Romieubcf0bf92006-07-26 23:14:13 +02002452 if (tp->mac_version == RTL_GIGA_MAC_VER_02) {
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002453 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
2454 RTL_W8(0x82, 0x01);
2455 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
françois romieu4da19632011-01-03 15:07:55 +00002456 rtl_writephy(tp, 0x0b, 0x0000); //w 0x0b 15 0 0
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002457 }
2458
Francois Romieubf793292006-11-01 00:53:05 +01002459 rtl8169_phy_reset(dev, tp);
2460
Francois Romieu901dda22007-02-21 00:10:20 +01002461 /*
2462 * rtl8169_set_speed_xmii takes good care of the Fast Ethernet
2463 * only 8101. Don't panic.
2464 */
2465 rtl8169_set_speed(dev, AUTONEG_ENABLE, SPEED_1000, DUPLEX_FULL);
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002466
Joe Perchesbf82c182010-02-09 11:49:50 +00002467 if (RTL_R8(PHYstatus) & TBI_Enable)
2468 netif_info(tp, link, dev, "TBI auto-negotiating\n");
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002469}
2470
Francois Romieu773d2022007-01-31 23:47:43 +01002471static void rtl_rar_set(struct rtl8169_private *tp, u8 *addr)
2472{
2473 void __iomem *ioaddr = tp->mmio_addr;
2474 u32 high;
2475 u32 low;
2476
2477 low = addr[0] | (addr[1] << 8) | (addr[2] << 16) | (addr[3] << 24);
2478 high = addr[4] | (addr[5] << 8);
2479
2480 spin_lock_irq(&tp->lock);
2481
2482 RTL_W8(Cfg9346, Cfg9346_Unlock);
françois romieu908ba2b2010-04-26 11:42:58 +00002483
Francois Romieu773d2022007-01-31 23:47:43 +01002484 RTL_W32(MAC4, high);
françois romieu908ba2b2010-04-26 11:42:58 +00002485 RTL_R32(MAC4);
2486
Francois Romieu78f1cd02010-03-27 19:35:46 -07002487 RTL_W32(MAC0, low);
françois romieu908ba2b2010-04-26 11:42:58 +00002488 RTL_R32(MAC0);
2489
Francois Romieu773d2022007-01-31 23:47:43 +01002490 RTL_W8(Cfg9346, Cfg9346_Lock);
2491
2492 spin_unlock_irq(&tp->lock);
2493}
2494
2495static int rtl_set_mac_address(struct net_device *dev, void *p)
2496{
2497 struct rtl8169_private *tp = netdev_priv(dev);
2498 struct sockaddr *addr = p;
2499
2500 if (!is_valid_ether_addr(addr->sa_data))
2501 return -EADDRNOTAVAIL;
2502
2503 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
2504
2505 rtl_rar_set(tp, dev->dev_addr);
2506
2507 return 0;
2508}
2509
Francois Romieu5f787a12006-08-17 13:02:36 +02002510static int rtl8169_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2511{
2512 struct rtl8169_private *tp = netdev_priv(dev);
2513 struct mii_ioctl_data *data = if_mii(ifr);
2514
Francois Romieu8b4ab282008-11-19 22:05:25 -08002515 return netif_running(dev) ? tp->do_ioctl(tp, data, cmd) : -ENODEV;
2516}
Francois Romieu5f787a12006-08-17 13:02:36 +02002517
Francois Romieu8b4ab282008-11-19 22:05:25 -08002518static int rtl_xmii_ioctl(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd)
2519{
Francois Romieu5f787a12006-08-17 13:02:36 +02002520 switch (cmd) {
2521 case SIOCGMIIPHY:
2522 data->phy_id = 32; /* Internal PHY */
2523 return 0;
2524
2525 case SIOCGMIIREG:
françois romieu4da19632011-01-03 15:07:55 +00002526 data->val_out = rtl_readphy(tp, data->reg_num & 0x1f);
Francois Romieu5f787a12006-08-17 13:02:36 +02002527 return 0;
2528
2529 case SIOCSMIIREG:
françois romieu4da19632011-01-03 15:07:55 +00002530 rtl_writephy(tp, data->reg_num & 0x1f, data->val_in);
Francois Romieu5f787a12006-08-17 13:02:36 +02002531 return 0;
2532 }
2533 return -EOPNOTSUPP;
2534}
2535
Francois Romieu8b4ab282008-11-19 22:05:25 -08002536static int rtl_tbi_ioctl(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd)
2537{
2538 return -EOPNOTSUPP;
2539}
2540
Francois Romieu0e485152007-02-20 00:00:26 +01002541static const struct rtl_cfg_info {
2542 void (*hw_start)(struct net_device *);
2543 unsigned int region;
2544 unsigned int align;
2545 u16 intr_event;
2546 u16 napi_event;
Francois Romieuccdffb92008-07-26 14:26:06 +02002547 unsigned features;
Jean Delvaref21b75e2009-05-26 20:54:48 -07002548 u8 default_ver;
Francois Romieu0e485152007-02-20 00:00:26 +01002549} rtl_cfg_infos [] = {
2550 [RTL_CFG_0] = {
2551 .hw_start = rtl_hw_start_8169,
2552 .region = 1,
Francois Romieue9f63f32007-02-28 23:16:57 +01002553 .align = 0,
Francois Romieu0e485152007-02-20 00:00:26 +01002554 .intr_event = SYSErr | LinkChg | RxOverflow |
2555 RxFIFOOver | TxErr | TxOK | RxOK | RxErr,
Francois Romieufbac58f2007-10-04 22:51:38 +02002556 .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow,
Jean Delvaref21b75e2009-05-26 20:54:48 -07002557 .features = RTL_FEATURE_GMII,
2558 .default_ver = RTL_GIGA_MAC_VER_01,
Francois Romieu0e485152007-02-20 00:00:26 +01002559 },
2560 [RTL_CFG_1] = {
2561 .hw_start = rtl_hw_start_8168,
2562 .region = 2,
2563 .align = 8,
françois romieu53f57352010-11-08 13:23:05 +00002564 .intr_event = SYSErr | LinkChg | RxOverflow |
Francois Romieu0e485152007-02-20 00:00:26 +01002565 TxErr | TxOK | RxOK | RxErr,
Francois Romieufbac58f2007-10-04 22:51:38 +02002566 .napi_event = TxErr | TxOK | RxOK | RxOverflow,
Jean Delvaref21b75e2009-05-26 20:54:48 -07002567 .features = RTL_FEATURE_GMII | RTL_FEATURE_MSI,
2568 .default_ver = RTL_GIGA_MAC_VER_11,
Francois Romieu0e485152007-02-20 00:00:26 +01002569 },
2570 [RTL_CFG_2] = {
2571 .hw_start = rtl_hw_start_8101,
2572 .region = 2,
2573 .align = 8,
2574 .intr_event = SYSErr | LinkChg | RxOverflow | PCSTimeout |
2575 RxFIFOOver | TxErr | TxOK | RxOK | RxErr,
Francois Romieufbac58f2007-10-04 22:51:38 +02002576 .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow,
Jean Delvaref21b75e2009-05-26 20:54:48 -07002577 .features = RTL_FEATURE_MSI,
2578 .default_ver = RTL_GIGA_MAC_VER_13,
Francois Romieu0e485152007-02-20 00:00:26 +01002579 }
2580};
2581
Francois Romieufbac58f2007-10-04 22:51:38 +02002582/* Cfg9346_Unlock assumed. */
2583static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr,
2584 const struct rtl_cfg_info *cfg)
2585{
2586 unsigned msi = 0;
2587 u8 cfg2;
2588
2589 cfg2 = RTL_R8(Config2) & ~MSIEnable;
Francois Romieuccdffb92008-07-26 14:26:06 +02002590 if (cfg->features & RTL_FEATURE_MSI) {
Francois Romieufbac58f2007-10-04 22:51:38 +02002591 if (pci_enable_msi(pdev)) {
2592 dev_info(&pdev->dev, "no MSI. Back to INTx.\n");
2593 } else {
2594 cfg2 |= MSIEnable;
2595 msi = RTL_FEATURE_MSI;
2596 }
2597 }
2598 RTL_W8(Config2, cfg2);
2599 return msi;
2600}
2601
2602static void rtl_disable_msi(struct pci_dev *pdev, struct rtl8169_private *tp)
2603{
2604 if (tp->features & RTL_FEATURE_MSI) {
2605 pci_disable_msi(pdev);
2606 tp->features &= ~RTL_FEATURE_MSI;
2607 }
2608}
2609
Francois Romieu8b4ab282008-11-19 22:05:25 -08002610static const struct net_device_ops rtl8169_netdev_ops = {
2611 .ndo_open = rtl8169_open,
2612 .ndo_stop = rtl8169_close,
2613 .ndo_get_stats = rtl8169_get_stats,
Stephen Hemminger00829822008-11-20 20:14:53 -08002614 .ndo_start_xmit = rtl8169_start_xmit,
Francois Romieu8b4ab282008-11-19 22:05:25 -08002615 .ndo_tx_timeout = rtl8169_tx_timeout,
2616 .ndo_validate_addr = eth_validate_addr,
2617 .ndo_change_mtu = rtl8169_change_mtu,
2618 .ndo_set_mac_address = rtl_set_mac_address,
2619 .ndo_do_ioctl = rtl8169_ioctl,
2620 .ndo_set_multicast_list = rtl_set_rx_mode,
2621#ifdef CONFIG_R8169_VLAN
2622 .ndo_vlan_rx_register = rtl8169_vlan_rx_register,
2623#endif
2624#ifdef CONFIG_NET_POLL_CONTROLLER
2625 .ndo_poll_controller = rtl8169_netpoll,
2626#endif
2627
2628};
2629
françois romieuc0e45c12011-01-03 15:08:04 +00002630static void __devinit rtl_init_mdio_ops(struct rtl8169_private *tp)
2631{
2632 struct mdio_ops *ops = &tp->mdio_ops;
2633
2634 switch (tp->mac_version) {
2635 case RTL_GIGA_MAC_VER_27:
2636 ops->write = r8168dp_1_mdio_write;
2637 ops->read = r8168dp_1_mdio_read;
2638 break;
2639 default:
2640 ops->write = r8169_mdio_write;
2641 ops->read = r8169_mdio_read;
2642 break;
2643 }
2644}
2645
françois romieu065c27c2011-01-03 15:08:12 +00002646static void r810x_phy_power_down(struct rtl8169_private *tp)
2647{
2648 rtl_writephy(tp, 0x1f, 0x0000);
2649 rtl_writephy(tp, MII_BMCR, BMCR_PDOWN);
2650}
2651
2652static void r810x_phy_power_up(struct rtl8169_private *tp)
2653{
2654 rtl_writephy(tp, 0x1f, 0x0000);
2655 rtl_writephy(tp, MII_BMCR, BMCR_ANENABLE);
2656}
2657
2658static void r810x_pll_power_down(struct rtl8169_private *tp)
2659{
2660 if (__rtl8169_get_wol(tp) & WAKE_ANY) {
2661 rtl_writephy(tp, 0x1f, 0x0000);
2662 rtl_writephy(tp, MII_BMCR, 0x0000);
2663 return;
2664 }
2665
2666 r810x_phy_power_down(tp);
2667}
2668
2669static void r810x_pll_power_up(struct rtl8169_private *tp)
2670{
2671 r810x_phy_power_up(tp);
2672}
2673
2674static void r8168_phy_power_up(struct rtl8169_private *tp)
2675{
2676 rtl_writephy(tp, 0x1f, 0x0000);
2677 rtl_writephy(tp, 0x0e, 0x0000);
2678 rtl_writephy(tp, MII_BMCR, BMCR_ANENABLE);
2679}
2680
2681static void r8168_phy_power_down(struct rtl8169_private *tp)
2682{
2683 rtl_writephy(tp, 0x1f, 0x0000);
2684 rtl_writephy(tp, 0x0e, 0x0200);
2685 rtl_writephy(tp, MII_BMCR, BMCR_PDOWN);
2686}
2687
2688static void r8168_pll_power_down(struct rtl8169_private *tp)
2689{
2690 void __iomem *ioaddr = tp->mmio_addr;
2691
2692 if (tp->mac_version == RTL_GIGA_MAC_VER_27)
2693 return;
2694
2695 if (((tp->mac_version == RTL_GIGA_MAC_VER_23) ||
2696 (tp->mac_version == RTL_GIGA_MAC_VER_24)) &&
2697 (RTL_R16(CPlusCmd) & ASF)) {
2698 return;
2699 }
2700
2701 if (__rtl8169_get_wol(tp) & WAKE_ANY) {
2702 rtl_writephy(tp, 0x1f, 0x0000);
2703 rtl_writephy(tp, MII_BMCR, 0x0000);
2704
2705 RTL_W32(RxConfig, RTL_R32(RxConfig) |
2706 AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
2707 return;
2708 }
2709
2710 r8168_phy_power_down(tp);
2711
2712 switch (tp->mac_version) {
2713 case RTL_GIGA_MAC_VER_25:
2714 case RTL_GIGA_MAC_VER_26:
2715 RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80);
2716 break;
2717 }
2718}
2719
2720static void r8168_pll_power_up(struct rtl8169_private *tp)
2721{
2722 void __iomem *ioaddr = tp->mmio_addr;
2723
2724 if (tp->mac_version == RTL_GIGA_MAC_VER_27)
2725 return;
2726
2727 switch (tp->mac_version) {
2728 case RTL_GIGA_MAC_VER_25:
2729 case RTL_GIGA_MAC_VER_26:
2730 RTL_W8(PMCH, RTL_R8(PMCH) | 0x80);
2731 break;
2732 }
2733
2734 r8168_phy_power_up(tp);
2735}
2736
2737static void rtl_pll_power_op(struct rtl8169_private *tp,
2738 void (*op)(struct rtl8169_private *))
2739{
2740 if (op)
2741 op(tp);
2742}
2743
2744static void rtl_pll_power_down(struct rtl8169_private *tp)
2745{
2746 rtl_pll_power_op(tp, tp->pll_power_ops.down);
2747}
2748
2749static void rtl_pll_power_up(struct rtl8169_private *tp)
2750{
2751 rtl_pll_power_op(tp, tp->pll_power_ops.up);
2752}
2753
2754static void __devinit rtl_init_pll_power_ops(struct rtl8169_private *tp)
2755{
2756 struct pll_power_ops *ops = &tp->pll_power_ops;
2757
2758 switch (tp->mac_version) {
2759 case RTL_GIGA_MAC_VER_07:
2760 case RTL_GIGA_MAC_VER_08:
2761 case RTL_GIGA_MAC_VER_09:
2762 case RTL_GIGA_MAC_VER_10:
2763 case RTL_GIGA_MAC_VER_16:
2764 ops->down = r810x_pll_power_down;
2765 ops->up = r810x_pll_power_up;
2766 break;
2767
2768 case RTL_GIGA_MAC_VER_11:
2769 case RTL_GIGA_MAC_VER_12:
2770 case RTL_GIGA_MAC_VER_17:
2771 case RTL_GIGA_MAC_VER_18:
2772 case RTL_GIGA_MAC_VER_19:
2773 case RTL_GIGA_MAC_VER_20:
2774 case RTL_GIGA_MAC_VER_21:
2775 case RTL_GIGA_MAC_VER_22:
2776 case RTL_GIGA_MAC_VER_23:
2777 case RTL_GIGA_MAC_VER_24:
2778 case RTL_GIGA_MAC_VER_25:
2779 case RTL_GIGA_MAC_VER_26:
2780 case RTL_GIGA_MAC_VER_27:
2781 ops->down = r8168_pll_power_down;
2782 ops->up = r8168_pll_power_up;
2783 break;
2784
2785 default:
2786 ops->down = NULL;
2787 ops->up = NULL;
2788 break;
2789 }
2790}
2791
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002792static int __devinit
2793rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2794{
Francois Romieu0e485152007-02-20 00:00:26 +01002795 const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data;
2796 const unsigned int region = cfg->region;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002797 struct rtl8169_private *tp;
Francois Romieuccdffb92008-07-26 14:26:06 +02002798 struct mii_if_info *mii;
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002799 struct net_device *dev;
2800 void __iomem *ioaddr;
Francois Romieu07d3f512007-02-21 22:40:46 +01002801 unsigned int i;
2802 int rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002803
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002804 if (netif_msg_drv(&debug)) {
2805 printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
2806 MODULENAME, RTL8169_VERSION);
2807 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002808
Linus Torvalds1da177e2005-04-16 15:20:36 -07002809 dev = alloc_etherdev(sizeof (*tp));
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002810 if (!dev) {
Stephen Hemmingerb57b7e52005-05-27 21:11:52 +02002811 if (netif_msg_drv(&debug))
Jeff Garzik9b91cf92006-06-27 11:39:50 -04002812 dev_err(&pdev->dev, "unable to alloc new ethernet\n");
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002813 rc = -ENOMEM;
2814 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002815 }
2816
Linus Torvalds1da177e2005-04-16 15:20:36 -07002817 SET_NETDEV_DEV(dev, &pdev->dev);
Francois Romieu8b4ab282008-11-19 22:05:25 -08002818 dev->netdev_ops = &rtl8169_netdev_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002819 tp = netdev_priv(dev);
David Howellsc4028952006-11-22 14:57:56 +00002820 tp->dev = dev;
Ivan Vecera21e197f2008-04-17 22:48:41 +02002821 tp->pci_dev = pdev;
Stephen Hemmingerb57b7e52005-05-27 21:11:52 +02002822 tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002823
Francois Romieuccdffb92008-07-26 14:26:06 +02002824 mii = &tp->mii;
2825 mii->dev = dev;
2826 mii->mdio_read = rtl_mdio_read;
2827 mii->mdio_write = rtl_mdio_write;
2828 mii->phy_id_mask = 0x1f;
2829 mii->reg_num_mask = 0x1f;
2830 mii->supports_gmii = !!(cfg->features & RTL_FEATURE_GMII);
2831
Linus Torvalds1da177e2005-04-16 15:20:36 -07002832 /* enable device (incl. PCI PM wakeup and hotplug setup) */
2833 rc = pci_enable_device(pdev);
Stephen Hemmingerb57b7e52005-05-27 21:11:52 +02002834 if (rc < 0) {
Joe Perchesbf82c182010-02-09 11:49:50 +00002835 netif_err(tp, probe, dev, "enable failure\n");
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002836 goto err_out_free_dev_1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002837 }
2838
françois romieu87aeec72010-04-26 11:42:06 +00002839 if (pci_set_mwi(pdev) < 0)
2840 netif_info(tp, probe, dev, "Mem-Wr-Inval unavailable\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07002841
Linus Torvalds1da177e2005-04-16 15:20:36 -07002842 /* make sure PCI base addr 1 is MMIO */
Francois Romieubcf0bf92006-07-26 23:14:13 +02002843 if (!(pci_resource_flags(pdev, region) & IORESOURCE_MEM)) {
Joe Perchesbf82c182010-02-09 11:49:50 +00002844 netif_err(tp, probe, dev,
2845 "region #%d not an MMIO resource, aborting\n",
2846 region);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002847 rc = -ENODEV;
françois romieu87aeec72010-04-26 11:42:06 +00002848 goto err_out_mwi_2;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002849 }
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002850
Linus Torvalds1da177e2005-04-16 15:20:36 -07002851 /* check for weird/broken PCI region reporting */
Francois Romieubcf0bf92006-07-26 23:14:13 +02002852 if (pci_resource_len(pdev, region) < R8169_REGS_SIZE) {
Joe Perchesbf82c182010-02-09 11:49:50 +00002853 netif_err(tp, probe, dev,
2854 "Invalid PCI region size(s), aborting\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07002855 rc = -ENODEV;
françois romieu87aeec72010-04-26 11:42:06 +00002856 goto err_out_mwi_2;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002857 }
2858
2859 rc = pci_request_regions(pdev, MODULENAME);
Stephen Hemmingerb57b7e52005-05-27 21:11:52 +02002860 if (rc < 0) {
Joe Perchesbf82c182010-02-09 11:49:50 +00002861 netif_err(tp, probe, dev, "could not request regions\n");
françois romieu87aeec72010-04-26 11:42:06 +00002862 goto err_out_mwi_2;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002863 }
2864
2865 tp->cp_cmd = PCIMulRW | RxChkSum;
2866
2867 if ((sizeof(dma_addr_t) > 4) &&
David S. Miller4300e8c2010-03-26 10:23:30 -07002868 !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && use_dac) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002869 tp->cp_cmd |= PCIDAC;
2870 dev->features |= NETIF_F_HIGHDMA;
2871 } else {
Yang Hongyang284901a2009-04-06 19:01:15 -07002872 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Linus Torvalds1da177e2005-04-16 15:20:36 -07002873 if (rc < 0) {
Joe Perchesbf82c182010-02-09 11:49:50 +00002874 netif_err(tp, probe, dev, "DMA configuration failed\n");
françois romieu87aeec72010-04-26 11:42:06 +00002875 goto err_out_free_res_3;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002876 }
2877 }
2878
Linus Torvalds1da177e2005-04-16 15:20:36 -07002879 /* ioremap MMIO region */
Francois Romieubcf0bf92006-07-26 23:14:13 +02002880 ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE);
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002881 if (!ioaddr) {
Joe Perchesbf82c182010-02-09 11:49:50 +00002882 netif_err(tp, probe, dev, "cannot remap MMIO, aborting\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07002883 rc = -EIO;
françois romieu87aeec72010-04-26 11:42:06 +00002884 goto err_out_free_res_3;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002885 }
2886
David S. Miller4300e8c2010-03-26 10:23:30 -07002887 tp->pcie_cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
2888 if (!tp->pcie_cap)
2889 netif_info(tp, probe, dev, "no PCI Express capability\n");
2890
Karsten Wiesed78ad8c2009-04-02 01:06:01 -07002891 RTL_W16(IntrMask, 0x0000);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002892
2893 /* Soft reset the chip. */
2894 RTL_W8(ChipCmd, CmdReset);
2895
2896 /* Check that the chip has finished the reset. */
Francois Romieu07d3f512007-02-21 22:40:46 +01002897 for (i = 0; i < 100; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002898 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
2899 break;
Francois Romieub518fa82006-08-16 15:23:13 +02002900 msleep_interruptible(1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002901 }
2902
Karsten Wiesed78ad8c2009-04-02 01:06:01 -07002903 RTL_W16(IntrStatus, 0xffff);
2904
françois romieuca52efd2009-07-24 12:34:19 +00002905 pci_set_master(pdev);
2906
Linus Torvalds1da177e2005-04-16 15:20:36 -07002907 /* Identify chip attached to board */
2908 rtl8169_get_mac_version(tp, ioaddr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002909
françois romieuc0e45c12011-01-03 15:08:04 +00002910 rtl_init_mdio_ops(tp);
françois romieu065c27c2011-01-03 15:08:12 +00002911 rtl_init_pll_power_ops(tp);
françois romieuc0e45c12011-01-03 15:08:04 +00002912
Jean Delvaref21b75e2009-05-26 20:54:48 -07002913 /* Use appropriate default if unknown */
2914 if (tp->mac_version == RTL_GIGA_MAC_NONE) {
Joe Perchesbf82c182010-02-09 11:49:50 +00002915 netif_notice(tp, probe, dev,
2916 "unknown MAC, using family default\n");
Jean Delvaref21b75e2009-05-26 20:54:48 -07002917 tp->mac_version = cfg->default_ver;
2918 }
2919
Linus Torvalds1da177e2005-04-16 15:20:36 -07002920 rtl8169_print_mac_version(tp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002921
Roel Kluincee60c32008-04-17 22:35:54 +02002922 for (i = 0; i < ARRAY_SIZE(rtl_chip_info); i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002923 if (tp->mac_version == rtl_chip_info[i].mac_version)
2924 break;
2925 }
Roel Kluincee60c32008-04-17 22:35:54 +02002926 if (i == ARRAY_SIZE(rtl_chip_info)) {
Jean Delvaref21b75e2009-05-26 20:54:48 -07002927 dev_err(&pdev->dev,
2928 "driver bug, MAC version not found in rtl_chip_info\n");
françois romieu87aeec72010-04-26 11:42:06 +00002929 goto err_out_msi_4;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002930 }
2931 tp->chipset = i;
2932
Francois Romieu5d06a992006-02-23 00:47:58 +01002933 RTL_W8(Cfg9346, Cfg9346_Unlock);
2934 RTL_W8(Config1, RTL_R8(Config1) | PMEnable);
2935 RTL_W8(Config5, RTL_R8(Config5) & PMEStatus);
Bruno Prémont20037fa2008-10-08 17:05:03 -07002936 if ((RTL_R8(Config3) & (LinkUp | MagicPacket)) != 0)
2937 tp->features |= RTL_FEATURE_WOL;
2938 if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0)
2939 tp->features |= RTL_FEATURE_WOL;
Francois Romieufbac58f2007-10-04 22:51:38 +02002940 tp->features |= rtl_try_msi(pdev, ioaddr, cfg);
Francois Romieu5d06a992006-02-23 00:47:58 +01002941 RTL_W8(Cfg9346, Cfg9346_Lock);
2942
Francois Romieu66ec5d42007-11-06 22:56:10 +01002943 if ((tp->mac_version <= RTL_GIGA_MAC_VER_06) &&
2944 (RTL_R8(PHYstatus) & TBI_Enable)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002945 tp->set_speed = rtl8169_set_speed_tbi;
2946 tp->get_settings = rtl8169_gset_tbi;
2947 tp->phy_reset_enable = rtl8169_tbi_reset_enable;
2948 tp->phy_reset_pending = rtl8169_tbi_reset_pending;
2949 tp->link_ok = rtl8169_tbi_link_ok;
Francois Romieu8b4ab282008-11-19 22:05:25 -08002950 tp->do_ioctl = rtl_tbi_ioctl;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002951
Francois Romieu64e4bfb2006-08-17 12:43:06 +02002952 tp->phy_1000_ctrl_reg = ADVERTISE_1000FULL; /* Implied by TBI */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002953 } else {
2954 tp->set_speed = rtl8169_set_speed_xmii;
2955 tp->get_settings = rtl8169_gset_xmii;
2956 tp->phy_reset_enable = rtl8169_xmii_reset_enable;
2957 tp->phy_reset_pending = rtl8169_xmii_reset_pending;
2958 tp->link_ok = rtl8169_xmii_link_ok;
Francois Romieu8b4ab282008-11-19 22:05:25 -08002959 tp->do_ioctl = rtl_xmii_ioctl;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002960 }
2961
Francois Romieudf58ef52008-10-09 14:35:58 -07002962 spin_lock_init(&tp->lock);
2963
Petr Vandrovec738e1e62008-10-12 20:58:29 -07002964 tp->mmio_addr = ioaddr;
2965
Ivan Vecera7bf6bf42008-09-23 22:46:29 +00002966 /* Get MAC address */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002967 for (i = 0; i < MAC_ADDR_LEN; i++)
2968 dev->dev_addr[i] = RTL_R8(MAC0 + i);
John W. Linville6d6525b2005-09-12 10:48:57 -04002969 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002970
Linus Torvalds1da177e2005-04-16 15:20:36 -07002971 SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002972 dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
2973 dev->irq = pdev->irq;
2974 dev->base_addr = (unsigned long) ioaddr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002975
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002976 netif_napi_add(dev, &tp->napi, rtl8169_poll, R8169_NAPI_WEIGHT);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002977
2978#ifdef CONFIG_R8169_VLAN
2979 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002980#endif
Eric Dumazet2edae082010-09-06 18:46:39 +00002981 dev->features |= NETIF_F_GRO;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002982
2983 tp->intr_mask = 0xffff;
Francois Romieu0e485152007-02-20 00:00:26 +01002984 tp->hw_start = cfg->hw_start;
2985 tp->intr_event = cfg->intr_event;
2986 tp->napi_event = cfg->napi_event;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002987
Francois Romieu2efa53f2007-03-09 00:00:05 +01002988 init_timer(&tp->timer);
2989 tp->timer.data = (unsigned long) dev;
2990 tp->timer.function = rtl8169_phy_timer;
2991
Linus Torvalds1da177e2005-04-16 15:20:36 -07002992 rc = register_netdev(dev);
Francois Romieu4ff96fa2006-07-26 22:05:06 +02002993 if (rc < 0)
françois romieu87aeec72010-04-26 11:42:06 +00002994 goto err_out_msi_4;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002995
2996 pci_set_drvdata(pdev, dev);
2997
Joe Perchesbf82c182010-02-09 11:49:50 +00002998 netif_info(tp, probe, dev, "%s at 0x%lx, %pM, XID %08x IRQ %d\n",
2999 rtl_chip_info[tp->chipset].name,
3000 dev->base_addr, dev->dev_addr,
3001 (u32)(RTL_R32(TxConfig) & 0x9cf0f8ff), dev->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003002
françois romieub646d902011-01-03 15:08:21 +00003003 if (tp->mac_version == RTL_GIGA_MAC_VER_27)
3004 rtl8168_driver_start(tp);
3005
Francois Romieu4ff96fa2006-07-26 22:05:06 +02003006 rtl8169_init_phy(dev, tp);
Simon Wunderlich05af2142009-10-24 06:47:33 -07003007
3008 /*
3009 * Pretend we are using VLANs; This bypasses a nasty bug where
3010 * Interrupts stop flowing on high load on 8110SCd controllers.
3011 */
3012 if (tp->mac_version == RTL_GIGA_MAC_VER_05)
3013 RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) | RxVlan);
3014
Bruno Prémont8b76ab32008-10-08 17:06:25 -07003015 device_set_wakeup_enable(&pdev->dev, tp->features & RTL_FEATURE_WOL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003016
Alan Sternf3ec4f82010-06-08 15:23:51 -04003017 if (pci_dev_run_wake(pdev))
3018 pm_runtime_put_noidle(&pdev->dev);
Rafael J. Wysockie1759442010-03-14 14:33:51 +00003019
Francois Romieu4ff96fa2006-07-26 22:05:06 +02003020out:
3021 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003022
françois romieu87aeec72010-04-26 11:42:06 +00003023err_out_msi_4:
Francois Romieufbac58f2007-10-04 22:51:38 +02003024 rtl_disable_msi(pdev, tp);
Francois Romieu4ff96fa2006-07-26 22:05:06 +02003025 iounmap(ioaddr);
françois romieu87aeec72010-04-26 11:42:06 +00003026err_out_free_res_3:
Francois Romieu4ff96fa2006-07-26 22:05:06 +02003027 pci_release_regions(pdev);
françois romieu87aeec72010-04-26 11:42:06 +00003028err_out_mwi_2:
Francois Romieu4ff96fa2006-07-26 22:05:06 +02003029 pci_clear_mwi(pdev);
Francois Romieu4ff96fa2006-07-26 22:05:06 +02003030 pci_disable_device(pdev);
3031err_out_free_dev_1:
3032 free_netdev(dev);
3033 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003034}
3035
Francois Romieu07d3f512007-02-21 22:40:46 +01003036static void __devexit rtl8169_remove_one(struct pci_dev *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003037{
3038 struct net_device *dev = pci_get_drvdata(pdev);
3039 struct rtl8169_private *tp = netdev_priv(dev);
3040
françois romieub646d902011-01-03 15:08:21 +00003041 if (tp->mac_version == RTL_GIGA_MAC_VER_27)
3042 rtl8168_driver_stop(tp);
3043
Tejun Heo23f333a2010-12-12 16:45:14 +01003044 cancel_delayed_work_sync(&tp->task);
Francois Romieueb2a0212007-02-15 23:37:21 +01003045
Linus Torvalds1da177e2005-04-16 15:20:36 -07003046 unregister_netdev(dev);
Ivan Veceracc098dc2009-11-29 23:12:52 -08003047
Alan Sternf3ec4f82010-06-08 15:23:51 -04003048 if (pci_dev_run_wake(pdev))
3049 pm_runtime_get_noresume(&pdev->dev);
Rafael J. Wysockie1759442010-03-14 14:33:51 +00003050
Ivan Veceracc098dc2009-11-29 23:12:52 -08003051 /* restore original MAC address */
3052 rtl_rar_set(tp, dev->perm_addr);
3053
Francois Romieufbac58f2007-10-04 22:51:38 +02003054 rtl_disable_msi(pdev, tp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003055 rtl8169_release_board(pdev, dev, tp->mmio_addr);
3056 pci_set_drvdata(pdev, NULL);
3057}
3058
Linus Torvalds1da177e2005-04-16 15:20:36 -07003059static int rtl8169_open(struct net_device *dev)
3060{
3061 struct rtl8169_private *tp = netdev_priv(dev);
3062 struct pci_dev *pdev = tp->pci_dev;
Francois Romieu99f252b2007-04-02 22:59:59 +02003063 int retval = -ENOMEM;
3064
Rafael J. Wysockie1759442010-03-14 14:33:51 +00003065 pm_runtime_get_sync(&pdev->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003066
Neil Hormanc0cd8842010-03-29 13:16:02 -07003067 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07003068 * Rx and Tx desscriptors needs 256 bytes alignment.
Stanislaw Gruszka82553bb2010-10-08 04:25:01 +00003069 * dma_alloc_coherent provides more.
Linus Torvalds1da177e2005-04-16 15:20:36 -07003070 */
Stanislaw Gruszka82553bb2010-10-08 04:25:01 +00003071 tp->TxDescArray = dma_alloc_coherent(&pdev->dev, R8169_TX_RING_BYTES,
3072 &tp->TxPhyAddr, GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003073 if (!tp->TxDescArray)
Rafael J. Wysockie1759442010-03-14 14:33:51 +00003074 goto err_pm_runtime_put;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003075
Stanislaw Gruszka82553bb2010-10-08 04:25:01 +00003076 tp->RxDescArray = dma_alloc_coherent(&pdev->dev, R8169_RX_RING_BYTES,
3077 &tp->RxPhyAddr, GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003078 if (!tp->RxDescArray)
Francois Romieu99f252b2007-04-02 22:59:59 +02003079 goto err_free_tx_0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003080
3081 retval = rtl8169_init_ring(dev);
3082 if (retval < 0)
Francois Romieu99f252b2007-04-02 22:59:59 +02003083 goto err_free_rx_1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003084
David Howellsc4028952006-11-22 14:57:56 +00003085 INIT_DELAYED_WORK(&tp->task, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003086
Francois Romieu99f252b2007-04-02 22:59:59 +02003087 smp_mb();
3088
Francois Romieufbac58f2007-10-04 22:51:38 +02003089 retval = request_irq(dev->irq, rtl8169_interrupt,
3090 (tp->features & RTL_FEATURE_MSI) ? 0 : IRQF_SHARED,
Francois Romieu99f252b2007-04-02 22:59:59 +02003091 dev->name, dev);
3092 if (retval < 0)
3093 goto err_release_ring_2;
3094
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003095 napi_enable(&tp->napi);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003096
françois romieu065c27c2011-01-03 15:08:12 +00003097 rtl_pll_power_up(tp);
3098
Francois Romieu07ce4062007-02-23 23:36:39 +01003099 rtl_hw_start(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003100
3101 rtl8169_request_timer(dev);
3102
Rafael J. Wysockie1759442010-03-14 14:33:51 +00003103 tp->saved_wolopts = 0;
3104 pm_runtime_put_noidle(&pdev->dev);
3105
Linus Torvalds1da177e2005-04-16 15:20:36 -07003106 rtl8169_check_link_status(dev, tp, tp->mmio_addr);
3107out:
3108 return retval;
3109
Francois Romieu99f252b2007-04-02 22:59:59 +02003110err_release_ring_2:
3111 rtl8169_rx_clear(tp);
3112err_free_rx_1:
Stanislaw Gruszka82553bb2010-10-08 04:25:01 +00003113 dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray,
3114 tp->RxPhyAddr);
Rafael J. Wysockie1759442010-03-14 14:33:51 +00003115 tp->RxDescArray = NULL;
Francois Romieu99f252b2007-04-02 22:59:59 +02003116err_free_tx_0:
Stanislaw Gruszka82553bb2010-10-08 04:25:01 +00003117 dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray,
3118 tp->TxPhyAddr);
Rafael J. Wysockie1759442010-03-14 14:33:51 +00003119 tp->TxDescArray = NULL;
3120err_pm_runtime_put:
3121 pm_runtime_put_noidle(&pdev->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003122 goto out;
3123}
3124
3125static void rtl8169_hw_reset(void __iomem *ioaddr)
3126{
3127 /* Disable interrupts */
3128 rtl8169_irq_mask_and_ack(ioaddr);
3129
3130 /* Reset the chipset */
3131 RTL_W8(ChipCmd, CmdReset);
3132
3133 /* PCI commit */
3134 RTL_R8(ChipCmd);
3135}
3136
Francois Romieu7f796d82007-06-11 23:04:41 +02003137static void rtl_set_rx_tx_config_registers(struct rtl8169_private *tp)
Francois Romieu9cb427b2006-11-02 00:10:16 +01003138{
3139 void __iomem *ioaddr = tp->mmio_addr;
3140 u32 cfg = rtl8169_rx_config;
3141
3142 cfg |= (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
3143 RTL_W32(RxConfig, cfg);
3144
3145 /* Set DMA burst size and Interframe Gap Time */
3146 RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
3147 (InterFrameGap << TxInterFrameGapShift));
3148}
3149
Francois Romieu07ce4062007-02-23 23:36:39 +01003150static void rtl_hw_start(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003151{
3152 struct rtl8169_private *tp = netdev_priv(dev);
3153 void __iomem *ioaddr = tp->mmio_addr;
Francois Romieu07d3f512007-02-21 22:40:46 +01003154 unsigned int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003155
3156 /* Soft reset the chip. */
3157 RTL_W8(ChipCmd, CmdReset);
3158
3159 /* Check that the chip has finished the reset. */
Francois Romieu07d3f512007-02-21 22:40:46 +01003160 for (i = 0; i < 100; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003161 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
3162 break;
Francois Romieub518fa82006-08-16 15:23:13 +02003163 msleep_interruptible(1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003164 }
3165
Francois Romieu07ce4062007-02-23 23:36:39 +01003166 tp->hw_start(dev);
3167
Francois Romieu07ce4062007-02-23 23:36:39 +01003168 netif_start_queue(dev);
3169}
3170
3171
Francois Romieu7f796d82007-06-11 23:04:41 +02003172static void rtl_set_rx_tx_desc_registers(struct rtl8169_private *tp,
3173 void __iomem *ioaddr)
3174{
3175 /*
3176 * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
3177 * register to be written before TxDescAddrLow to work.
3178 * Switching from MMIO to I/O access fixes the issue as well.
3179 */
3180 RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr) >> 32);
Yang Hongyang284901a2009-04-06 19:01:15 -07003181 RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr) & DMA_BIT_MASK(32));
Francois Romieu7f796d82007-06-11 23:04:41 +02003182 RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr) >> 32);
Yang Hongyang284901a2009-04-06 19:01:15 -07003183 RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr) & DMA_BIT_MASK(32));
Francois Romieu7f796d82007-06-11 23:04:41 +02003184}
3185
3186static u16 rtl_rw_cpluscmd(void __iomem *ioaddr)
3187{
3188 u16 cmd;
3189
3190 cmd = RTL_R16(CPlusCmd);
3191 RTL_W16(CPlusCmd, cmd);
3192 return cmd;
3193}
3194
Eric Dumazetfdd7b4c2009-06-09 04:01:02 -07003195static void rtl_set_rx_max_size(void __iomem *ioaddr, unsigned int rx_buf_sz)
Francois Romieu7f796d82007-06-11 23:04:41 +02003196{
3197 /* Low hurts. Let's disable the filtering. */
Raimonds Cicans207d6e82009-10-26 10:52:37 +00003198 RTL_W16(RxMaxSize, rx_buf_sz + 1);
Francois Romieu7f796d82007-06-11 23:04:41 +02003199}
3200
Francois Romieu6dccd162007-02-13 23:38:05 +01003201static void rtl8169_set_magic_reg(void __iomem *ioaddr, unsigned mac_version)
3202{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08003203 static const struct {
Francois Romieu6dccd162007-02-13 23:38:05 +01003204 u32 mac_version;
3205 u32 clk;
3206 u32 val;
3207 } cfg2_info [] = {
3208 { RTL_GIGA_MAC_VER_05, PCI_Clock_33MHz, 0x000fff00 }, // 8110SCd
3209 { RTL_GIGA_MAC_VER_05, PCI_Clock_66MHz, 0x000fffff },
3210 { RTL_GIGA_MAC_VER_06, PCI_Clock_33MHz, 0x00ffff00 }, // 8110SCe
3211 { RTL_GIGA_MAC_VER_06, PCI_Clock_66MHz, 0x00ffffff }
3212 }, *p = cfg2_info;
3213 unsigned int i;
3214 u32 clk;
3215
3216 clk = RTL_R8(Config2) & PCI_Clock_66MHz;
Francois Romieucadf1852008-01-03 23:38:38 +01003217 for (i = 0; i < ARRAY_SIZE(cfg2_info); i++, p++) {
Francois Romieu6dccd162007-02-13 23:38:05 +01003218 if ((p->mac_version == mac_version) && (p->clk == clk)) {
3219 RTL_W32(0x7c, p->val);
3220 break;
3221 }
3222 }
3223}
3224
Francois Romieu07ce4062007-02-23 23:36:39 +01003225static void rtl_hw_start_8169(struct net_device *dev)
3226{
3227 struct rtl8169_private *tp = netdev_priv(dev);
3228 void __iomem *ioaddr = tp->mmio_addr;
3229 struct pci_dev *pdev = tp->pci_dev;
Francois Romieu07ce4062007-02-23 23:36:39 +01003230
Francois Romieu9cb427b2006-11-02 00:10:16 +01003231 if (tp->mac_version == RTL_GIGA_MAC_VER_05) {
3232 RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) | PCIMulRW);
3233 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x08);
3234 }
3235
Linus Torvalds1da177e2005-04-16 15:20:36 -07003236 RTL_W8(Cfg9346, Cfg9346_Unlock);
Francois Romieu9cb427b2006-11-02 00:10:16 +01003237 if ((tp->mac_version == RTL_GIGA_MAC_VER_01) ||
3238 (tp->mac_version == RTL_GIGA_MAC_VER_02) ||
3239 (tp->mac_version == RTL_GIGA_MAC_VER_03) ||
3240 (tp->mac_version == RTL_GIGA_MAC_VER_04))
3241 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
3242
françois romieuf0298f82011-01-03 15:07:42 +00003243 RTL_W8(EarlyTxThres, NoEarlyTx);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003244
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003245 rtl_set_rx_max_size(ioaddr, rx_buf_sz);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003246
Francois Romieuc946b302007-10-04 00:42:50 +02003247 if ((tp->mac_version == RTL_GIGA_MAC_VER_01) ||
3248 (tp->mac_version == RTL_GIGA_MAC_VER_02) ||
3249 (tp->mac_version == RTL_GIGA_MAC_VER_03) ||
3250 (tp->mac_version == RTL_GIGA_MAC_VER_04))
3251 rtl_set_rx_tx_config_registers(tp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003252
Francois Romieu7f796d82007-06-11 23:04:41 +02003253 tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW;
Francois Romieubcf0bf92006-07-26 23:14:13 +02003254
3255 if ((tp->mac_version == RTL_GIGA_MAC_VER_02) ||
3256 (tp->mac_version == RTL_GIGA_MAC_VER_03)) {
Joe Perches06fa7352007-10-18 21:15:00 +02003257 dprintk("Set MAC Reg C+CR Offset 0xE0. "
Linus Torvalds1da177e2005-04-16 15:20:36 -07003258 "Bit-3 and bit-14 MUST be 1\n");
Francois Romieubcf0bf92006-07-26 23:14:13 +02003259 tp->cp_cmd |= (1 << 14);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003260 }
3261
Francois Romieubcf0bf92006-07-26 23:14:13 +02003262 RTL_W16(CPlusCmd, tp->cp_cmd);
3263
Francois Romieu6dccd162007-02-13 23:38:05 +01003264 rtl8169_set_magic_reg(ioaddr, tp->mac_version);
3265
Linus Torvalds1da177e2005-04-16 15:20:36 -07003266 /*
3267 * Undocumented corner. Supposedly:
3268 * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
3269 */
3270 RTL_W16(IntrMitigate, 0x0000);
3271
Francois Romieu7f796d82007-06-11 23:04:41 +02003272 rtl_set_rx_tx_desc_registers(tp, ioaddr);
Francois Romieu9cb427b2006-11-02 00:10:16 +01003273
Francois Romieuc946b302007-10-04 00:42:50 +02003274 if ((tp->mac_version != RTL_GIGA_MAC_VER_01) &&
3275 (tp->mac_version != RTL_GIGA_MAC_VER_02) &&
3276 (tp->mac_version != RTL_GIGA_MAC_VER_03) &&
3277 (tp->mac_version != RTL_GIGA_MAC_VER_04)) {
3278 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
3279 rtl_set_rx_tx_config_registers(tp);
3280 }
3281
Linus Torvalds1da177e2005-04-16 15:20:36 -07003282 RTL_W8(Cfg9346, Cfg9346_Lock);
Francois Romieub518fa82006-08-16 15:23:13 +02003283
3284 /* Initially a 10 us delay. Turned it into a PCI commit. - FR */
3285 RTL_R8(IntrMask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003286
3287 RTL_W32(RxMissed, 0);
3288
Francois Romieu07ce4062007-02-23 23:36:39 +01003289 rtl_set_rx_mode(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003290
3291 /* no early-rx interrupts */
3292 RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
Francois Romieu6dccd162007-02-13 23:38:05 +01003293
3294 /* Enable all known interrupts by setting the interrupt mask. */
Francois Romieu0e485152007-02-20 00:00:26 +01003295 RTL_W16(IntrMask, tp->intr_event);
Francois Romieu07ce4062007-02-23 23:36:39 +01003296}
Linus Torvalds1da177e2005-04-16 15:20:36 -07003297
Francois Romieu9c14cea2008-07-05 00:21:15 +02003298static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force)
Francois Romieu458a9f62008-08-02 15:50:02 +02003299{
Francois Romieu9c14cea2008-07-05 00:21:15 +02003300 struct net_device *dev = pci_get_drvdata(pdev);
3301 struct rtl8169_private *tp = netdev_priv(dev);
3302 int cap = tp->pcie_cap;
Francois Romieu458a9f62008-08-02 15:50:02 +02003303
Francois Romieu9c14cea2008-07-05 00:21:15 +02003304 if (cap) {
3305 u16 ctl;
3306
3307 pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl);
3308 ctl = (ctl & ~PCI_EXP_DEVCTL_READRQ) | force;
3309 pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl);
3310 }
Francois Romieu458a9f62008-08-02 15:50:02 +02003311}
3312
françois romieu650e8d52011-01-03 15:08:29 +00003313static void rtl_csi_access_enable(void __iomem *ioaddr, u32 bits)
Francois Romieudacf8152008-08-02 20:44:13 +02003314{
3315 u32 csi;
3316
3317 csi = rtl_csi_read(ioaddr, 0x070c) & 0x00ffffff;
françois romieu650e8d52011-01-03 15:08:29 +00003318 rtl_csi_write(ioaddr, 0x070c, csi | bits);
3319}
3320
3321static void rtl_csi_access_enable_2(void __iomem *ioaddr)
3322{
3323 rtl_csi_access_enable(ioaddr, 0x27000000);
Francois Romieudacf8152008-08-02 20:44:13 +02003324}
3325
3326struct ephy_info {
3327 unsigned int offset;
3328 u16 mask;
3329 u16 bits;
3330};
3331
Alexey Dobriyan350f7592009-11-25 15:54:21 -08003332static void rtl_ephy_init(void __iomem *ioaddr, const struct ephy_info *e, int len)
Francois Romieudacf8152008-08-02 20:44:13 +02003333{
3334 u16 w;
3335
3336 while (len-- > 0) {
3337 w = (rtl_ephy_read(ioaddr, e->offset) & ~e->mask) | e->bits;
3338 rtl_ephy_write(ioaddr, e->offset, w);
3339 e++;
3340 }
3341}
3342
Francois Romieub726e492008-06-28 12:22:59 +02003343static void rtl_disable_clock_request(struct pci_dev *pdev)
3344{
3345 struct net_device *dev = pci_get_drvdata(pdev);
3346 struct rtl8169_private *tp = netdev_priv(dev);
3347 int cap = tp->pcie_cap;
3348
3349 if (cap) {
3350 u16 ctl;
3351
3352 pci_read_config_word(pdev, cap + PCI_EXP_LNKCTL, &ctl);
3353 ctl &= ~PCI_EXP_LNKCTL_CLKREQ_EN;
3354 pci_write_config_word(pdev, cap + PCI_EXP_LNKCTL, ctl);
3355 }
3356}
3357
3358#define R8168_CPCMD_QUIRK_MASK (\
3359 EnableBist | \
3360 Mac_dbgo_oe | \
3361 Force_half_dup | \
3362 Force_rxflow_en | \
3363 Force_txflow_en | \
3364 Cxpl_dbg_sel | \
3365 ASF | \
3366 PktCntrDisable | \
3367 Mac_dbgo_sel)
3368
Francois Romieu219a1e92008-06-28 11:58:39 +02003369static void rtl_hw_start_8168bb(void __iomem *ioaddr, struct pci_dev *pdev)
3370{
Francois Romieub726e492008-06-28 12:22:59 +02003371 RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
3372
3373 RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
3374
Francois Romieu2e68ae42008-06-28 12:00:55 +02003375 rtl_tx_performance_tweak(pdev,
3376 (0x5 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN);
Francois Romieu219a1e92008-06-28 11:58:39 +02003377}
3378
3379static void rtl_hw_start_8168bef(void __iomem *ioaddr, struct pci_dev *pdev)
3380{
3381 rtl_hw_start_8168bb(ioaddr, pdev);
Francois Romieub726e492008-06-28 12:22:59 +02003382
françois romieuf0298f82011-01-03 15:07:42 +00003383 RTL_W8(MaxTxPacketSize, TxPacketMax);
Francois Romieub726e492008-06-28 12:22:59 +02003384
3385 RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0));
Francois Romieu219a1e92008-06-28 11:58:39 +02003386}
3387
3388static void __rtl_hw_start_8168cp(void __iomem *ioaddr, struct pci_dev *pdev)
3389{
Francois Romieub726e492008-06-28 12:22:59 +02003390 RTL_W8(Config1, RTL_R8(Config1) | Speed_down);
3391
3392 RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
3393
Francois Romieu219a1e92008-06-28 11:58:39 +02003394 rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
Francois Romieub726e492008-06-28 12:22:59 +02003395
3396 rtl_disable_clock_request(pdev);
3397
3398 RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
Francois Romieu219a1e92008-06-28 11:58:39 +02003399}
3400
Francois Romieuef3386f2008-06-29 12:24:30 +02003401static void rtl_hw_start_8168cp_1(void __iomem *ioaddr, struct pci_dev *pdev)
Francois Romieu219a1e92008-06-28 11:58:39 +02003402{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08003403 static const struct ephy_info e_info_8168cp[] = {
Francois Romieub726e492008-06-28 12:22:59 +02003404 { 0x01, 0, 0x0001 },
3405 { 0x02, 0x0800, 0x1000 },
3406 { 0x03, 0, 0x0042 },
3407 { 0x06, 0x0080, 0x0000 },
3408 { 0x07, 0, 0x2000 }
3409 };
3410
françois romieu650e8d52011-01-03 15:08:29 +00003411 rtl_csi_access_enable_2(ioaddr);
Francois Romieub726e492008-06-28 12:22:59 +02003412
3413 rtl_ephy_init(ioaddr, e_info_8168cp, ARRAY_SIZE(e_info_8168cp));
3414
Francois Romieu219a1e92008-06-28 11:58:39 +02003415 __rtl_hw_start_8168cp(ioaddr, pdev);
3416}
3417
Francois Romieuef3386f2008-06-29 12:24:30 +02003418static void rtl_hw_start_8168cp_2(void __iomem *ioaddr, struct pci_dev *pdev)
3419{
françois romieu650e8d52011-01-03 15:08:29 +00003420 rtl_csi_access_enable_2(ioaddr);
Francois Romieuef3386f2008-06-29 12:24:30 +02003421
3422 RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
3423
3424 rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
3425
3426 RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
3427}
3428
Francois Romieu7f3e3d32008-07-20 18:53:20 +02003429static void rtl_hw_start_8168cp_3(void __iomem *ioaddr, struct pci_dev *pdev)
3430{
françois romieu650e8d52011-01-03 15:08:29 +00003431 rtl_csi_access_enable_2(ioaddr);
Francois Romieu7f3e3d32008-07-20 18:53:20 +02003432
3433 RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
3434
3435 /* Magic. */
3436 RTL_W8(DBG_REG, 0x20);
3437
françois romieuf0298f82011-01-03 15:07:42 +00003438 RTL_W8(MaxTxPacketSize, TxPacketMax);
Francois Romieu7f3e3d32008-07-20 18:53:20 +02003439
3440 rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
3441
3442 RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
3443}
3444
Francois Romieu219a1e92008-06-28 11:58:39 +02003445static void rtl_hw_start_8168c_1(void __iomem *ioaddr, struct pci_dev *pdev)
3446{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08003447 static const struct ephy_info e_info_8168c_1[] = {
Francois Romieub726e492008-06-28 12:22:59 +02003448 { 0x02, 0x0800, 0x1000 },
3449 { 0x03, 0, 0x0002 },
3450 { 0x06, 0x0080, 0x0000 }
3451 };
3452
françois romieu650e8d52011-01-03 15:08:29 +00003453 rtl_csi_access_enable_2(ioaddr);
Francois Romieub726e492008-06-28 12:22:59 +02003454
3455 RTL_W8(DBG_REG, 0x06 | FIX_NAK_1 | FIX_NAK_2);
3456
3457 rtl_ephy_init(ioaddr, e_info_8168c_1, ARRAY_SIZE(e_info_8168c_1));
3458
Francois Romieu219a1e92008-06-28 11:58:39 +02003459 __rtl_hw_start_8168cp(ioaddr, pdev);
3460}
3461
3462static void rtl_hw_start_8168c_2(void __iomem *ioaddr, struct pci_dev *pdev)
3463{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08003464 static const struct ephy_info e_info_8168c_2[] = {
Francois Romieub726e492008-06-28 12:22:59 +02003465 { 0x01, 0, 0x0001 },
3466 { 0x03, 0x0400, 0x0220 }
3467 };
3468
françois romieu650e8d52011-01-03 15:08:29 +00003469 rtl_csi_access_enable_2(ioaddr);
Francois Romieub726e492008-06-28 12:22:59 +02003470
3471 rtl_ephy_init(ioaddr, e_info_8168c_2, ARRAY_SIZE(e_info_8168c_2));
3472
Francois Romieu219a1e92008-06-28 11:58:39 +02003473 __rtl_hw_start_8168cp(ioaddr, pdev);
3474}
3475
Francois Romieu197ff762008-06-28 13:16:02 +02003476static void rtl_hw_start_8168c_3(void __iomem *ioaddr, struct pci_dev *pdev)
3477{
3478 rtl_hw_start_8168c_2(ioaddr, pdev);
3479}
3480
Francois Romieu6fb07052008-06-29 11:54:28 +02003481static void rtl_hw_start_8168c_4(void __iomem *ioaddr, struct pci_dev *pdev)
3482{
françois romieu650e8d52011-01-03 15:08:29 +00003483 rtl_csi_access_enable_2(ioaddr);
Francois Romieu6fb07052008-06-29 11:54:28 +02003484
3485 __rtl_hw_start_8168cp(ioaddr, pdev);
3486}
3487
Francois Romieu5b538df2008-07-20 16:22:45 +02003488static void rtl_hw_start_8168d(void __iomem *ioaddr, struct pci_dev *pdev)
3489{
françois romieu650e8d52011-01-03 15:08:29 +00003490 rtl_csi_access_enable_2(ioaddr);
Francois Romieu5b538df2008-07-20 16:22:45 +02003491
3492 rtl_disable_clock_request(pdev);
3493
françois romieuf0298f82011-01-03 15:07:42 +00003494 RTL_W8(MaxTxPacketSize, TxPacketMax);
Francois Romieu5b538df2008-07-20 16:22:45 +02003495
3496 rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
3497
3498 RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
3499}
3500
Francois Romieu07ce4062007-02-23 23:36:39 +01003501static void rtl_hw_start_8168(struct net_device *dev)
3502{
Francois Romieu2dd99532007-06-11 23:22:52 +02003503 struct rtl8169_private *tp = netdev_priv(dev);
3504 void __iomem *ioaddr = tp->mmio_addr;
Francois Romieu0e485152007-02-20 00:00:26 +01003505 struct pci_dev *pdev = tp->pci_dev;
Francois Romieu2dd99532007-06-11 23:22:52 +02003506
3507 RTL_W8(Cfg9346, Cfg9346_Unlock);
3508
françois romieuf0298f82011-01-03 15:07:42 +00003509 RTL_W8(MaxTxPacketSize, TxPacketMax);
Francois Romieu2dd99532007-06-11 23:22:52 +02003510
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003511 rtl_set_rx_max_size(ioaddr, rx_buf_sz);
Francois Romieu2dd99532007-06-11 23:22:52 +02003512
Francois Romieu0e485152007-02-20 00:00:26 +01003513 tp->cp_cmd |= RTL_R16(CPlusCmd) | PktCntrDisable | INTT_1;
Francois Romieu2dd99532007-06-11 23:22:52 +02003514
3515 RTL_W16(CPlusCmd, tp->cp_cmd);
3516
Francois Romieu0e485152007-02-20 00:00:26 +01003517 RTL_W16(IntrMitigate, 0x5151);
3518
3519 /* Work around for RxFIFO overflow. */
3520 if (tp->mac_version == RTL_GIGA_MAC_VER_11) {
3521 tp->intr_event |= RxFIFOOver | PCSTimeout;
3522 tp->intr_event &= ~RxOverflow;
3523 }
Francois Romieu2dd99532007-06-11 23:22:52 +02003524
3525 rtl_set_rx_tx_desc_registers(tp, ioaddr);
3526
Francois Romieub8363902008-06-01 12:31:57 +02003527 rtl_set_rx_mode(dev);
3528
3529 RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
3530 (InterFrameGap << TxInterFrameGapShift));
Francois Romieu2dd99532007-06-11 23:22:52 +02003531
3532 RTL_R8(IntrMask);
3533
Francois Romieu219a1e92008-06-28 11:58:39 +02003534 switch (tp->mac_version) {
3535 case RTL_GIGA_MAC_VER_11:
3536 rtl_hw_start_8168bb(ioaddr, pdev);
3537 break;
3538
3539 case RTL_GIGA_MAC_VER_12:
3540 case RTL_GIGA_MAC_VER_17:
3541 rtl_hw_start_8168bef(ioaddr, pdev);
3542 break;
3543
3544 case RTL_GIGA_MAC_VER_18:
Francois Romieuef3386f2008-06-29 12:24:30 +02003545 rtl_hw_start_8168cp_1(ioaddr, pdev);
Francois Romieu219a1e92008-06-28 11:58:39 +02003546 break;
3547
3548 case RTL_GIGA_MAC_VER_19:
3549 rtl_hw_start_8168c_1(ioaddr, pdev);
3550 break;
3551
3552 case RTL_GIGA_MAC_VER_20:
3553 rtl_hw_start_8168c_2(ioaddr, pdev);
3554 break;
3555
Francois Romieu197ff762008-06-28 13:16:02 +02003556 case RTL_GIGA_MAC_VER_21:
3557 rtl_hw_start_8168c_3(ioaddr, pdev);
3558 break;
3559
Francois Romieu6fb07052008-06-29 11:54:28 +02003560 case RTL_GIGA_MAC_VER_22:
3561 rtl_hw_start_8168c_4(ioaddr, pdev);
3562 break;
3563
Francois Romieuef3386f2008-06-29 12:24:30 +02003564 case RTL_GIGA_MAC_VER_23:
3565 rtl_hw_start_8168cp_2(ioaddr, pdev);
3566 break;
3567
Francois Romieu7f3e3d32008-07-20 18:53:20 +02003568 case RTL_GIGA_MAC_VER_24:
3569 rtl_hw_start_8168cp_3(ioaddr, pdev);
3570 break;
3571
Francois Romieu5b538df2008-07-20 16:22:45 +02003572 case RTL_GIGA_MAC_VER_25:
françois romieudaf9df62009-10-07 12:44:20 +00003573 case RTL_GIGA_MAC_VER_26:
3574 case RTL_GIGA_MAC_VER_27:
Francois Romieu5b538df2008-07-20 16:22:45 +02003575 rtl_hw_start_8168d(ioaddr, pdev);
3576 break;
3577
Francois Romieu219a1e92008-06-28 11:58:39 +02003578 default:
3579 printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n",
3580 dev->name, tp->mac_version);
3581 break;
3582 }
Francois Romieu2dd99532007-06-11 23:22:52 +02003583
Francois Romieu0e485152007-02-20 00:00:26 +01003584 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
3585
Francois Romieub8363902008-06-01 12:31:57 +02003586 RTL_W8(Cfg9346, Cfg9346_Lock);
3587
Francois Romieu2dd99532007-06-11 23:22:52 +02003588 RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
Francois Romieu6dccd162007-02-13 23:38:05 +01003589
Francois Romieu0e485152007-02-20 00:00:26 +01003590 RTL_W16(IntrMask, tp->intr_event);
Francois Romieu07ce4062007-02-23 23:36:39 +01003591}
Linus Torvalds1da177e2005-04-16 15:20:36 -07003592
Francois Romieu2857ffb2008-08-02 21:08:49 +02003593#define R810X_CPCMD_QUIRK_MASK (\
3594 EnableBist | \
3595 Mac_dbgo_oe | \
3596 Force_half_dup | \
françois romieu5edcc532009-08-10 19:41:52 +00003597 Force_rxflow_en | \
Francois Romieu2857ffb2008-08-02 21:08:49 +02003598 Force_txflow_en | \
3599 Cxpl_dbg_sel | \
3600 ASF | \
3601 PktCntrDisable | \
3602 PCIDAC | \
3603 PCIMulRW)
3604
3605static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev)
3606{
Alexey Dobriyan350f7592009-11-25 15:54:21 -08003607 static const struct ephy_info e_info_8102e_1[] = {
Francois Romieu2857ffb2008-08-02 21:08:49 +02003608 { 0x01, 0, 0x6e65 },
3609 { 0x02, 0, 0x091f },
3610 { 0x03, 0, 0xc2f9 },
3611 { 0x06, 0, 0xafb5 },
3612 { 0x07, 0, 0x0e00 },
3613 { 0x19, 0, 0xec80 },
3614 { 0x01, 0, 0x2e65 },
3615 { 0x01, 0, 0x6e65 }
3616 };
3617 u8 cfg1;
3618
françois romieu650e8d52011-01-03 15:08:29 +00003619 rtl_csi_access_enable_2(ioaddr);
Francois Romieu2857ffb2008-08-02 21:08:49 +02003620
3621 RTL_W8(DBG_REG, FIX_NAK_1);
3622
3623 rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
3624
3625 RTL_W8(Config1,
3626 LEDS1 | LEDS0 | Speed_down | MEMMAP | IOMAP | VPD | PMEnable);
3627 RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
3628
3629 cfg1 = RTL_R8(Config1);
3630 if ((cfg1 & LEDS0) && (cfg1 & LEDS1))
3631 RTL_W8(Config1, cfg1 & ~LEDS0);
3632
3633 RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK);
3634
3635 rtl_ephy_init(ioaddr, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1));
3636}
3637
3638static void rtl_hw_start_8102e_2(void __iomem *ioaddr, struct pci_dev *pdev)
3639{
françois romieu650e8d52011-01-03 15:08:29 +00003640 rtl_csi_access_enable_2(ioaddr);
Francois Romieu2857ffb2008-08-02 21:08:49 +02003641
3642 rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
3643
3644 RTL_W8(Config1, MEMMAP | IOMAP | VPD | PMEnable);
3645 RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
3646
3647 RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK);
3648}
3649
3650static void rtl_hw_start_8102e_3(void __iomem *ioaddr, struct pci_dev *pdev)
3651{
3652 rtl_hw_start_8102e_2(ioaddr, pdev);
3653
3654 rtl_ephy_write(ioaddr, 0x03, 0xc2f9);
3655}
3656
Francois Romieu07ce4062007-02-23 23:36:39 +01003657static void rtl_hw_start_8101(struct net_device *dev)
3658{
Francois Romieucdf1a602007-06-11 23:29:50 +02003659 struct rtl8169_private *tp = netdev_priv(dev);
3660 void __iomem *ioaddr = tp->mmio_addr;
3661 struct pci_dev *pdev = tp->pci_dev;
3662
Francois Romieue3cf0cc2007-08-17 14:55:46 +02003663 if ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
3664 (tp->mac_version == RTL_GIGA_MAC_VER_16)) {
Francois Romieu9c14cea2008-07-05 00:21:15 +02003665 int cap = tp->pcie_cap;
3666
3667 if (cap) {
3668 pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL,
3669 PCI_EXP_DEVCTL_NOSNOOP_EN);
3670 }
Francois Romieucdf1a602007-06-11 23:29:50 +02003671 }
3672
Francois Romieu2857ffb2008-08-02 21:08:49 +02003673 switch (tp->mac_version) {
3674 case RTL_GIGA_MAC_VER_07:
3675 rtl_hw_start_8102e_1(ioaddr, pdev);
3676 break;
3677
3678 case RTL_GIGA_MAC_VER_08:
3679 rtl_hw_start_8102e_3(ioaddr, pdev);
3680 break;
3681
3682 case RTL_GIGA_MAC_VER_09:
3683 rtl_hw_start_8102e_2(ioaddr, pdev);
3684 break;
Francois Romieucdf1a602007-06-11 23:29:50 +02003685 }
3686
3687 RTL_W8(Cfg9346, Cfg9346_Unlock);
3688
françois romieuf0298f82011-01-03 15:07:42 +00003689 RTL_W8(MaxTxPacketSize, TxPacketMax);
Francois Romieucdf1a602007-06-11 23:29:50 +02003690
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003691 rtl_set_rx_max_size(ioaddr, rx_buf_sz);
Francois Romieucdf1a602007-06-11 23:29:50 +02003692
3693 tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW;
3694
3695 RTL_W16(CPlusCmd, tp->cp_cmd);
3696
3697 RTL_W16(IntrMitigate, 0x0000);
3698
3699 rtl_set_rx_tx_desc_registers(tp, ioaddr);
3700
3701 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
3702 rtl_set_rx_tx_config_registers(tp);
3703
3704 RTL_W8(Cfg9346, Cfg9346_Lock);
3705
3706 RTL_R8(IntrMask);
3707
Francois Romieucdf1a602007-06-11 23:29:50 +02003708 rtl_set_rx_mode(dev);
3709
Francois Romieu0e485152007-02-20 00:00:26 +01003710 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
3711
Francois Romieucdf1a602007-06-11 23:29:50 +02003712 RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000);
Francois Romieu6dccd162007-02-13 23:38:05 +01003713
Francois Romieu0e485152007-02-20 00:00:26 +01003714 RTL_W16(IntrMask, tp->intr_event);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003715}
3716
3717static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
3718{
Linus Torvalds1da177e2005-04-16 15:20:36 -07003719 if (new_mtu < ETH_ZLEN || new_mtu > SafeMtu)
3720 return -EINVAL;
3721
3722 dev->mtu = new_mtu;
Stanislaw Gruszka323bb682010-10-20 22:25:41 +00003723 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003724}
3725
3726static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
3727{
Al Viro95e09182007-12-22 18:55:39 +00003728 desc->addr = cpu_to_le64(0x0badbadbadbadbadull);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003729 desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
3730}
3731
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003732static void rtl8169_free_rx_databuff(struct rtl8169_private *tp,
3733 void **data_buff, struct RxDesc *desc)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003734{
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00003735 dma_unmap_single(&tp->pci_dev->dev, le64_to_cpu(desc->addr), rx_buf_sz,
Stanislaw Gruszka231aee62010-10-20 22:25:38 +00003736 DMA_FROM_DEVICE);
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00003737
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003738 kfree(*data_buff);
3739 *data_buff = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003740 rtl8169_make_unusable_by_asic(desc);
3741}
3742
3743static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
3744{
3745 u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
3746
3747 desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
3748}
3749
3750static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
3751 u32 rx_buf_sz)
3752{
3753 desc->addr = cpu_to_le64(mapping);
3754 wmb();
3755 rtl8169_mark_to_asic(desc, rx_buf_sz);
3756}
3757
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003758static inline void *rtl8169_align(void *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003759{
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003760 return (void *)ALIGN((long)data, 16);
3761}
3762
Stanislaw Gruszka0ecbe1c2010-10-20 22:25:37 +00003763static struct sk_buff *rtl8169_alloc_rx_data(struct rtl8169_private *tp,
3764 struct RxDesc *desc)
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003765{
3766 void *data;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003767 dma_addr_t mapping;
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00003768 struct device *d = &tp->pci_dev->dev;
Stanislaw Gruszka0ecbe1c2010-10-20 22:25:37 +00003769 struct net_device *dev = tp->dev;
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003770 int node = dev->dev.parent ? dev_to_node(dev->dev.parent) : -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003771
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003772 data = kmalloc_node(rx_buf_sz, GFP_KERNEL, node);
3773 if (!data)
3774 return NULL;
Francois Romieue9f63f32007-02-28 23:16:57 +01003775
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003776 if (rtl8169_align(data) != data) {
3777 kfree(data);
3778 data = kmalloc_node(rx_buf_sz + 15, GFP_KERNEL, node);
3779 if (!data)
3780 return NULL;
3781 }
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00003782
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00003783 mapping = dma_map_single(d, rtl8169_align(data), rx_buf_sz,
Stanislaw Gruszka231aee62010-10-20 22:25:38 +00003784 DMA_FROM_DEVICE);
Stanislaw Gruszkad827d862010-10-20 22:25:43 +00003785 if (unlikely(dma_mapping_error(d, mapping))) {
3786 if (net_ratelimit())
3787 netif_err(tp, drv, tp->dev, "Failed to map RX DMA!\n");
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00003788 goto err_out;
Stanislaw Gruszkad827d862010-10-20 22:25:43 +00003789 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003790
3791 rtl8169_map_to_asic(desc, mapping, rx_buf_sz);
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003792 return data;
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00003793
3794err_out:
3795 kfree(data);
3796 return NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003797}
3798
3799static void rtl8169_rx_clear(struct rtl8169_private *tp)
3800{
Francois Romieu07d3f512007-02-21 22:40:46 +01003801 unsigned int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003802
3803 for (i = 0; i < NUM_RX_DESC; i++) {
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003804 if (tp->Rx_databuff[i]) {
3805 rtl8169_free_rx_databuff(tp, tp->Rx_databuff + i,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003806 tp->RxDescArray + i);
3807 }
3808 }
3809}
3810
Stanislaw Gruszka0ecbe1c2010-10-20 22:25:37 +00003811static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003812{
Stanislaw Gruszka0ecbe1c2010-10-20 22:25:37 +00003813 desc->opts1 |= cpu_to_le32(RingEnd);
3814}
Francois Romieu5b0384f2006-08-16 16:00:01 +02003815
Stanislaw Gruszka0ecbe1c2010-10-20 22:25:37 +00003816static int rtl8169_rx_fill(struct rtl8169_private *tp)
3817{
3818 unsigned int i;
3819
3820 for (i = 0; i < NUM_RX_DESC; i++) {
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003821 void *data;
Francois Romieu4ae47c22007-06-16 23:28:45 +02003822
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003823 if (tp->Rx_databuff[i])
Linus Torvalds1da177e2005-04-16 15:20:36 -07003824 continue;
Francois Romieubcf0bf92006-07-26 23:14:13 +02003825
Stanislaw Gruszka0ecbe1c2010-10-20 22:25:37 +00003826 data = rtl8169_alloc_rx_data(tp, tp->RxDescArray + i);
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003827 if (!data) {
3828 rtl8169_make_unusable_by_asic(tp->RxDescArray + i);
Stanislaw Gruszka0ecbe1c2010-10-20 22:25:37 +00003829 goto err_out;
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003830 }
3831 tp->Rx_databuff[i] = data;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003832 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003833
Stanislaw Gruszka0ecbe1c2010-10-20 22:25:37 +00003834 rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
3835 return 0;
3836
3837err_out:
3838 rtl8169_rx_clear(tp);
3839 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003840}
3841
3842static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
3843{
3844 tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
3845}
3846
3847static int rtl8169_init_ring(struct net_device *dev)
3848{
3849 struct rtl8169_private *tp = netdev_priv(dev);
3850
3851 rtl8169_init_ring_indexes(tp);
3852
3853 memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
Eric Dumazet6f0333b2010-10-11 11:17:47 +00003854 memset(tp->Rx_databuff, 0x0, NUM_RX_DESC * sizeof(void *));
Linus Torvalds1da177e2005-04-16 15:20:36 -07003855
Stanislaw Gruszka0ecbe1c2010-10-20 22:25:37 +00003856 return rtl8169_rx_fill(tp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003857}
3858
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00003859static void rtl8169_unmap_tx_skb(struct device *d, struct ring_info *tx_skb,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003860 struct TxDesc *desc)
3861{
3862 unsigned int len = tx_skb->len;
3863
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00003864 dma_unmap_single(d, le64_to_cpu(desc->addr), len, DMA_TO_DEVICE);
3865
Linus Torvalds1da177e2005-04-16 15:20:36 -07003866 desc->opts1 = 0x00;
3867 desc->opts2 = 0x00;
3868 desc->addr = 0x00;
3869 tx_skb->len = 0;
3870}
3871
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00003872static void rtl8169_tx_clear_range(struct rtl8169_private *tp, u32 start,
3873 unsigned int n)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003874{
3875 unsigned int i;
3876
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00003877 for (i = 0; i < n; i++) {
3878 unsigned int entry = (start + i) % NUM_TX_DESC;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003879 struct ring_info *tx_skb = tp->tx_skb + entry;
3880 unsigned int len = tx_skb->len;
3881
3882 if (len) {
3883 struct sk_buff *skb = tx_skb->skb;
3884
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00003885 rtl8169_unmap_tx_skb(&tp->pci_dev->dev, tx_skb,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003886 tp->TxDescArray + entry);
3887 if (skb) {
Stanislaw Gruszkacac4b222010-10-20 22:25:40 +00003888 tp->dev->stats.tx_dropped++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003889 dev_kfree_skb(skb);
3890 tx_skb->skb = NULL;
3891 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003892 }
3893 }
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00003894}
3895
3896static void rtl8169_tx_clear(struct rtl8169_private *tp)
3897{
3898 rtl8169_tx_clear_range(tp, tp->dirty_tx, NUM_TX_DESC);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003899 tp->cur_tx = tp->dirty_tx = 0;
3900}
3901
David Howellsc4028952006-11-22 14:57:56 +00003902static void rtl8169_schedule_work(struct net_device *dev, work_func_t task)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003903{
3904 struct rtl8169_private *tp = netdev_priv(dev);
3905
David Howellsc4028952006-11-22 14:57:56 +00003906 PREPARE_DELAYED_WORK(&tp->task, task);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003907 schedule_delayed_work(&tp->task, 4);
3908}
3909
3910static void rtl8169_wait_for_quiescence(struct net_device *dev)
3911{
3912 struct rtl8169_private *tp = netdev_priv(dev);
3913 void __iomem *ioaddr = tp->mmio_addr;
3914
3915 synchronize_irq(dev->irq);
3916
3917 /* Wait for any pending NAPI task to complete */
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003918 napi_disable(&tp->napi);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003919
3920 rtl8169_irq_mask_and_ack(ioaddr);
3921
David S. Millerd1d08d12008-01-07 20:53:33 -08003922 tp->intr_mask = 0xffff;
3923 RTL_W16(IntrMask, tp->intr_event);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003924 napi_enable(&tp->napi);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003925}
3926
David Howellsc4028952006-11-22 14:57:56 +00003927static void rtl8169_reinit_task(struct work_struct *work)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003928{
David Howellsc4028952006-11-22 14:57:56 +00003929 struct rtl8169_private *tp =
3930 container_of(work, struct rtl8169_private, task.work);
3931 struct net_device *dev = tp->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003932 int ret;
3933
Francois Romieueb2a0212007-02-15 23:37:21 +01003934 rtnl_lock();
3935
3936 if (!netif_running(dev))
3937 goto out_unlock;
3938
3939 rtl8169_wait_for_quiescence(dev);
3940 rtl8169_close(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003941
3942 ret = rtl8169_open(dev);
3943 if (unlikely(ret < 0)) {
Joe Perchesbf82c182010-02-09 11:49:50 +00003944 if (net_ratelimit())
3945 netif_err(tp, drv, dev,
3946 "reinit failure (status = %d). Rescheduling\n",
3947 ret);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003948 rtl8169_schedule_work(dev, rtl8169_reinit_task);
3949 }
Francois Romieueb2a0212007-02-15 23:37:21 +01003950
3951out_unlock:
3952 rtnl_unlock();
Linus Torvalds1da177e2005-04-16 15:20:36 -07003953}
3954
David Howellsc4028952006-11-22 14:57:56 +00003955static void rtl8169_reset_task(struct work_struct *work)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003956{
David Howellsc4028952006-11-22 14:57:56 +00003957 struct rtl8169_private *tp =
3958 container_of(work, struct rtl8169_private, task.work);
3959 struct net_device *dev = tp->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003960
Francois Romieueb2a0212007-02-15 23:37:21 +01003961 rtnl_lock();
3962
Linus Torvalds1da177e2005-04-16 15:20:36 -07003963 if (!netif_running(dev))
Francois Romieueb2a0212007-02-15 23:37:21 +01003964 goto out_unlock;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003965
3966 rtl8169_wait_for_quiescence(dev);
3967
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003968 rtl8169_rx_interrupt(dev, tp, tp->mmio_addr, ~(u32)0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003969 rtl8169_tx_clear(tp);
3970
3971 if (tp->dirty_rx == tp->cur_rx) {
3972 rtl8169_init_ring_indexes(tp);
Francois Romieu07ce4062007-02-23 23:36:39 +01003973 rtl_hw_start(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003974 netif_wake_queue(dev);
Francois Romieucebf8cc2007-10-18 12:06:54 +02003975 rtl8169_check_link_status(dev, tp, tp->mmio_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003976 } else {
Joe Perchesbf82c182010-02-09 11:49:50 +00003977 if (net_ratelimit())
3978 netif_emerg(tp, intr, dev, "Rx buffers shortage\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07003979 rtl8169_schedule_work(dev, rtl8169_reset_task);
3980 }
Francois Romieueb2a0212007-02-15 23:37:21 +01003981
3982out_unlock:
3983 rtnl_unlock();
Linus Torvalds1da177e2005-04-16 15:20:36 -07003984}
3985
3986static void rtl8169_tx_timeout(struct net_device *dev)
3987{
3988 struct rtl8169_private *tp = netdev_priv(dev);
3989
3990 rtl8169_hw_reset(tp->mmio_addr);
3991
3992 /* Let's wait a bit while any (async) irq lands on */
3993 rtl8169_schedule_work(dev, rtl8169_reset_task);
3994}
3995
3996static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb,
3997 u32 opts1)
3998{
3999 struct skb_shared_info *info = skb_shinfo(skb);
4000 unsigned int cur_frag, entry;
Jeff Garzika6343af2007-07-17 05:39:58 -04004001 struct TxDesc * uninitialized_var(txd);
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00004002 struct device *d = &tp->pci_dev->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004003
4004 entry = tp->cur_tx;
4005 for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
4006 skb_frag_t *frag = info->frags + cur_frag;
4007 dma_addr_t mapping;
4008 u32 status, len;
4009 void *addr;
4010
4011 entry = (entry + 1) % NUM_TX_DESC;
4012
4013 txd = tp->TxDescArray + entry;
4014 len = frag->size;
4015 addr = ((void *) page_address(frag->page)) + frag->page_offset;
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00004016 mapping = dma_map_single(d, addr, len, DMA_TO_DEVICE);
Stanislaw Gruszkad827d862010-10-20 22:25:43 +00004017 if (unlikely(dma_mapping_error(d, mapping))) {
4018 if (net_ratelimit())
4019 netif_err(tp, drv, tp->dev,
4020 "Failed to map TX fragments DMA!\n");
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00004021 goto err_out;
Stanislaw Gruszkad827d862010-10-20 22:25:43 +00004022 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004023
4024 /* anti gcc 2.95.3 bugware (sic) */
4025 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
4026
4027 txd->opts1 = cpu_to_le32(status);
4028 txd->addr = cpu_to_le64(mapping);
4029
4030 tp->tx_skb[entry].len = len;
4031 }
4032
4033 if (cur_frag) {
4034 tp->tx_skb[entry].skb = skb;
4035 txd->opts1 |= cpu_to_le32(LastFrag);
4036 }
4037
4038 return cur_frag;
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00004039
4040err_out:
4041 rtl8169_tx_clear_range(tp, tp->cur_tx + 1, cur_frag);
4042 return -EIO;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004043}
4044
4045static inline u32 rtl8169_tso_csum(struct sk_buff *skb, struct net_device *dev)
4046{
4047 if (dev->features & NETIF_F_TSO) {
Herbert Xu79671682006-06-22 02:40:14 -07004048 u32 mss = skb_shinfo(skb)->gso_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004049
4050 if (mss)
4051 return LargeSend | ((mss & MSSMask) << MSSShift);
4052 }
Patrick McHardy84fa7932006-08-29 16:44:56 -07004053 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Arnaldo Carvalho de Meloeddc9ec2007-04-20 22:47:35 -07004054 const struct iphdr *ip = ip_hdr(skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004055
4056 if (ip->protocol == IPPROTO_TCP)
4057 return IPCS | TCPCS;
4058 else if (ip->protocol == IPPROTO_UDP)
4059 return IPCS | UDPCS;
4060 WARN_ON(1); /* we need a WARN() */
4061 }
4062 return 0;
4063}
4064
Stephen Hemminger613573252009-08-31 19:50:58 +00004065static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb,
4066 struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004067{
4068 struct rtl8169_private *tp = netdev_priv(dev);
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00004069 unsigned int entry = tp->cur_tx % NUM_TX_DESC;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004070 struct TxDesc *txd = tp->TxDescArray + entry;
4071 void __iomem *ioaddr = tp->mmio_addr;
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00004072 struct device *d = &tp->pci_dev->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004073 dma_addr_t mapping;
4074 u32 status, len;
4075 u32 opts1;
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00004076 int frags;
Francois Romieu5b0384f2006-08-16 16:00:01 +02004077
Linus Torvalds1da177e2005-04-16 15:20:36 -07004078 if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) {
Joe Perchesbf82c182010-02-09 11:49:50 +00004079 netif_err(tp, drv, dev, "BUG! Tx Ring full when queue awake!\n");
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00004080 goto err_stop_0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004081 }
4082
4083 if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00004084 goto err_stop_0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004085
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00004086 len = skb_headlen(skb);
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00004087 mapping = dma_map_single(d, skb->data, len, DMA_TO_DEVICE);
Stanislaw Gruszkad827d862010-10-20 22:25:43 +00004088 if (unlikely(dma_mapping_error(d, mapping))) {
4089 if (net_ratelimit())
4090 netif_err(tp, drv, dev, "Failed to map TX DMA!\n");
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00004091 goto err_dma_0;
Stanislaw Gruszkad827d862010-10-20 22:25:43 +00004092 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004093
4094 tp->tx_skb[entry].len = len;
4095 txd->addr = cpu_to_le64(mapping);
4096 txd->opts2 = cpu_to_le32(rtl8169_tx_vlan_tag(tp, skb));
4097
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00004098 opts1 = DescOwn | rtl8169_tso_csum(skb, dev);
4099
4100 frags = rtl8169_xmit_frags(tp, skb, opts1);
4101 if (frags < 0)
4102 goto err_dma_1;
4103 else if (frags)
4104 opts1 |= FirstFrag;
4105 else {
4106 opts1 |= FirstFrag | LastFrag;
4107 tp->tx_skb[entry].skb = skb;
4108 }
4109
Linus Torvalds1da177e2005-04-16 15:20:36 -07004110 wmb();
4111
4112 /* anti gcc 2.95.3 bugware (sic) */
4113 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
4114 txd->opts1 = cpu_to_le32(status);
4115
Linus Torvalds1da177e2005-04-16 15:20:36 -07004116 tp->cur_tx += frags + 1;
4117
David Dillow4c020a92010-03-03 16:33:10 +00004118 wmb();
Linus Torvalds1da177e2005-04-16 15:20:36 -07004119
Francois Romieu275391a2007-02-23 23:50:28 +01004120 RTL_W8(TxPoll, NPQ); /* set polling bit */
Linus Torvalds1da177e2005-04-16 15:20:36 -07004121
4122 if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) {
4123 netif_stop_queue(dev);
4124 smp_rmb();
4125 if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)
4126 netif_wake_queue(dev);
4127 }
4128
Stephen Hemminger613573252009-08-31 19:50:58 +00004129 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004130
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00004131err_dma_1:
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00004132 rtl8169_unmap_tx_skb(d, tp->tx_skb + entry, txd);
Stanislaw Gruszka3eafe502010-10-20 22:25:36 +00004133err_dma_0:
4134 dev_kfree_skb(skb);
4135 dev->stats.tx_dropped++;
4136 return NETDEV_TX_OK;
4137
4138err_stop_0:
Linus Torvalds1da177e2005-04-16 15:20:36 -07004139 netif_stop_queue(dev);
Francois Romieucebf8cc2007-10-18 12:06:54 +02004140 dev->stats.tx_dropped++;
Stephen Hemminger613573252009-08-31 19:50:58 +00004141 return NETDEV_TX_BUSY;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004142}
4143
4144static void rtl8169_pcierr_interrupt(struct net_device *dev)
4145{
4146 struct rtl8169_private *tp = netdev_priv(dev);
4147 struct pci_dev *pdev = tp->pci_dev;
4148 void __iomem *ioaddr = tp->mmio_addr;
4149 u16 pci_status, pci_cmd;
4150
4151 pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
4152 pci_read_config_word(pdev, PCI_STATUS, &pci_status);
4153
Joe Perchesbf82c182010-02-09 11:49:50 +00004154 netif_err(tp, intr, dev, "PCI error (cmd = 0x%04x, status = 0x%04x)\n",
4155 pci_cmd, pci_status);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004156
4157 /*
4158 * The recovery sequence below admits a very elaborated explanation:
4159 * - it seems to work;
Francois Romieud03902b2006-11-23 00:00:42 +01004160 * - I did not see what else could be done;
4161 * - it makes iop3xx happy.
Linus Torvalds1da177e2005-04-16 15:20:36 -07004162 *
4163 * Feel free to adjust to your needs.
4164 */
Francois Romieua27993f2006-12-18 00:04:19 +01004165 if (pdev->broken_parity_status)
Francois Romieud03902b2006-11-23 00:00:42 +01004166 pci_cmd &= ~PCI_COMMAND_PARITY;
4167 else
4168 pci_cmd |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY;
4169
4170 pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004171
4172 pci_write_config_word(pdev, PCI_STATUS,
4173 pci_status & (PCI_STATUS_DETECTED_PARITY |
4174 PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
4175 PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));
4176
4177 /* The infamous DAC f*ckup only happens at boot time */
4178 if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) {
Joe Perchesbf82c182010-02-09 11:49:50 +00004179 netif_info(tp, intr, dev, "disabling PCI DAC\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07004180 tp->cp_cmd &= ~PCIDAC;
4181 RTL_W16(CPlusCmd, tp->cp_cmd);
4182 dev->features &= ~NETIF_F_HIGHDMA;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004183 }
4184
4185 rtl8169_hw_reset(ioaddr);
Francois Romieud03902b2006-11-23 00:00:42 +01004186
4187 rtl8169_schedule_work(dev, rtl8169_reinit_task);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004188}
4189
Francois Romieu07d3f512007-02-21 22:40:46 +01004190static void rtl8169_tx_interrupt(struct net_device *dev,
4191 struct rtl8169_private *tp,
4192 void __iomem *ioaddr)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004193{
4194 unsigned int dirty_tx, tx_left;
4195
Linus Torvalds1da177e2005-04-16 15:20:36 -07004196 dirty_tx = tp->dirty_tx;
4197 smp_rmb();
4198 tx_left = tp->cur_tx - dirty_tx;
4199
4200 while (tx_left > 0) {
4201 unsigned int entry = dirty_tx % NUM_TX_DESC;
4202 struct ring_info *tx_skb = tp->tx_skb + entry;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004203 u32 status;
4204
4205 rmb();
4206 status = le32_to_cpu(tp->TxDescArray[entry].opts1);
4207 if (status & DescOwn)
4208 break;
4209
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00004210 rtl8169_unmap_tx_skb(&tp->pci_dev->dev, tx_skb,
4211 tp->TxDescArray + entry);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004212 if (status & LastFrag) {
Stanislaw Gruszkacac4b222010-10-20 22:25:40 +00004213 dev->stats.tx_packets++;
4214 dev->stats.tx_bytes += tx_skb->skb->len;
Eric Dumazet87433bf2009-06-09 22:55:53 +00004215 dev_kfree_skb(tx_skb->skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004216 tx_skb->skb = NULL;
4217 }
4218 dirty_tx++;
4219 tx_left--;
4220 }
4221
4222 if (tp->dirty_tx != dirty_tx) {
4223 tp->dirty_tx = dirty_tx;
4224 smp_wmb();
4225 if (netif_queue_stopped(dev) &&
4226 (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) {
4227 netif_wake_queue(dev);
4228 }
Francois Romieud78ae2d2007-08-26 20:08:19 +02004229 /*
4230 * 8168 hack: TxPoll requests are lost when the Tx packets are
4231 * too close. Let's kick an extra TxPoll request when a burst
4232 * of start_xmit activity is detected (if it is not detected,
4233 * it is slow enough). -- FR
4234 */
4235 smp_rmb();
4236 if (tp->cur_tx != dirty_tx)
4237 RTL_W8(TxPoll, NPQ);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004238 }
4239}
4240
Francois Romieu126fa4b2005-05-12 20:09:17 -04004241static inline int rtl8169_fragmented_frame(u32 status)
4242{
4243 return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
4244}
4245
Eric Dumazetadea1ac72010-09-05 20:04:05 -07004246static inline void rtl8169_rx_csum(struct sk_buff *skb, u32 opts1)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004247{
Linus Torvalds1da177e2005-04-16 15:20:36 -07004248 u32 status = opts1 & RxProtoMask;
4249
4250 if (((status == RxProtoTCP) && !(opts1 & TCPFail)) ||
Shan Weid5d3ebe2010-11-12 00:15:25 +00004251 ((status == RxProtoUDP) && !(opts1 & UDPFail)))
Linus Torvalds1da177e2005-04-16 15:20:36 -07004252 skb->ip_summed = CHECKSUM_UNNECESSARY;
4253 else
Eric Dumazetbc8acf22010-09-02 13:07:41 -07004254 skb_checksum_none_assert(skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004255}
4256
Eric Dumazet6f0333b2010-10-11 11:17:47 +00004257static struct sk_buff *rtl8169_try_rx_copy(void *data,
4258 struct rtl8169_private *tp,
4259 int pkt_size,
4260 dma_addr_t addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004261{
Stephen Hemmingerb4496552007-06-17 01:06:49 +02004262 struct sk_buff *skb;
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00004263 struct device *d = &tp->pci_dev->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004264
Eric Dumazet6f0333b2010-10-11 11:17:47 +00004265 data = rtl8169_align(data);
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00004266 dma_sync_single_for_cpu(d, addr, pkt_size, DMA_FROM_DEVICE);
Eric Dumazet6f0333b2010-10-11 11:17:47 +00004267 prefetch(data);
4268 skb = netdev_alloc_skb_ip_align(tp->dev, pkt_size);
4269 if (skb)
4270 memcpy(skb->data, data, pkt_size);
Stanislaw Gruszka48addcc2010-10-20 22:25:39 +00004271 dma_sync_single_for_device(d, addr, pkt_size, DMA_FROM_DEVICE);
4272
Eric Dumazet6f0333b2010-10-11 11:17:47 +00004273 return skb;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004274}
4275
Eric Dumazet630b9432010-03-31 02:08:31 +00004276/*
4277 * Warning : rtl8169_rx_interrupt() might be called :
4278 * 1) from NAPI (softirq) context
4279 * (polling = 1 : we should call netif_receive_skb())
4280 * 2) from process context (rtl8169_reset_task())
4281 * (polling = 0 : we must call netif_rx() instead)
4282 */
Francois Romieu07d3f512007-02-21 22:40:46 +01004283static int rtl8169_rx_interrupt(struct net_device *dev,
4284 struct rtl8169_private *tp,
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004285 void __iomem *ioaddr, u32 budget)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004286{
4287 unsigned int cur_rx, rx_left;
Eric Dumazet6f0333b2010-10-11 11:17:47 +00004288 unsigned int count;
Eric Dumazet630b9432010-03-31 02:08:31 +00004289 int polling = (budget != ~(u32)0) ? 1 : 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004290
Linus Torvalds1da177e2005-04-16 15:20:36 -07004291 cur_rx = tp->cur_rx;
4292 rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
Francois Romieu865c6522008-05-11 14:51:00 +02004293 rx_left = min(rx_left, budget);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004294
Richard Dawe4dcb7d32005-05-27 21:12:00 +02004295 for (; rx_left > 0; rx_left--, cur_rx++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07004296 unsigned int entry = cur_rx % NUM_RX_DESC;
Francois Romieu126fa4b2005-05-12 20:09:17 -04004297 struct RxDesc *desc = tp->RxDescArray + entry;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004298 u32 status;
4299
4300 rmb();
Francois Romieu126fa4b2005-05-12 20:09:17 -04004301 status = le32_to_cpu(desc->opts1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004302
4303 if (status & DescOwn)
4304 break;
Richard Dawe4dcb7d32005-05-27 21:12:00 +02004305 if (unlikely(status & RxRES)) {
Joe Perchesbf82c182010-02-09 11:49:50 +00004306 netif_info(tp, rx_err, dev, "Rx ERROR. status = %08x\n",
4307 status);
Francois Romieucebf8cc2007-10-18 12:06:54 +02004308 dev->stats.rx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004309 if (status & (RxRWT | RxRUNT))
Francois Romieucebf8cc2007-10-18 12:06:54 +02004310 dev->stats.rx_length_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004311 if (status & RxCRC)
Francois Romieucebf8cc2007-10-18 12:06:54 +02004312 dev->stats.rx_crc_errors++;
Francois Romieu9dccf612006-05-14 12:31:17 +02004313 if (status & RxFOVF) {
4314 rtl8169_schedule_work(dev, rtl8169_reset_task);
Francois Romieucebf8cc2007-10-18 12:06:54 +02004315 dev->stats.rx_fifo_errors++;
Francois Romieu9dccf612006-05-14 12:31:17 +02004316 }
Eric Dumazet6f0333b2010-10-11 11:17:47 +00004317 rtl8169_mark_to_asic(desc, rx_buf_sz);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004318 } else {
Eric Dumazet6f0333b2010-10-11 11:17:47 +00004319 struct sk_buff *skb;
Stephen Hemmingerb4496552007-06-17 01:06:49 +02004320 dma_addr_t addr = le64_to_cpu(desc->addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004321 int pkt_size = (status & 0x00001FFF) - 4;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004322
Francois Romieu126fa4b2005-05-12 20:09:17 -04004323 /*
4324 * The driver does not support incoming fragmented
4325 * frames. They are seen as a symptom of over-mtu
4326 * sized frames.
4327 */
4328 if (unlikely(rtl8169_fragmented_frame(status))) {
Francois Romieucebf8cc2007-10-18 12:06:54 +02004329 dev->stats.rx_dropped++;
4330 dev->stats.rx_length_errors++;
Eric Dumazet6f0333b2010-10-11 11:17:47 +00004331 rtl8169_mark_to_asic(desc, rx_buf_sz);
Richard Dawe4dcb7d32005-05-27 21:12:00 +02004332 continue;
Francois Romieu126fa4b2005-05-12 20:09:17 -04004333 }
4334
Eric Dumazet6f0333b2010-10-11 11:17:47 +00004335 skb = rtl8169_try_rx_copy(tp->Rx_databuff[entry],
4336 tp, pkt_size, addr);
4337 rtl8169_mark_to_asic(desc, rx_buf_sz);
4338 if (!skb) {
4339 dev->stats.rx_dropped++;
4340 continue;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004341 }
4342
Eric Dumazetadea1ac72010-09-05 20:04:05 -07004343 rtl8169_rx_csum(skb, status);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004344 skb_put(skb, pkt_size);
4345 skb->protocol = eth_type_trans(skb, dev);
4346
Eric Dumazet630b9432010-03-31 02:08:31 +00004347 if (rtl8169_rx_vlan_skb(tp, desc, skb, polling) < 0) {
4348 if (likely(polling))
Eric Dumazet2edae082010-09-06 18:46:39 +00004349 napi_gro_receive(&tp->napi, skb);
Eric Dumazet630b9432010-03-31 02:08:31 +00004350 else
4351 netif_rx(skb);
4352 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004353
Francois Romieucebf8cc2007-10-18 12:06:54 +02004354 dev->stats.rx_bytes += pkt_size;
4355 dev->stats.rx_packets++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004356 }
Francois Romieu6dccd162007-02-13 23:38:05 +01004357
4358 /* Work around for AMD plateform. */
Al Viro95e09182007-12-22 18:55:39 +00004359 if ((desc->opts2 & cpu_to_le32(0xfffe000)) &&
Francois Romieu6dccd162007-02-13 23:38:05 +01004360 (tp->mac_version == RTL_GIGA_MAC_VER_05)) {
4361 desc->opts2 = 0;
4362 cur_rx++;
4363 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004364 }
4365
4366 count = cur_rx - tp->cur_rx;
4367 tp->cur_rx = cur_rx;
4368
Eric Dumazet6f0333b2010-10-11 11:17:47 +00004369 tp->dirty_rx += count;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004370
4371 return count;
4372}
4373
Francois Romieu07d3f512007-02-21 22:40:46 +01004374static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004375{
Francois Romieu07d3f512007-02-21 22:40:46 +01004376 struct net_device *dev = dev_instance;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004377 struct rtl8169_private *tp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004378 void __iomem *ioaddr = tp->mmio_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004379 int handled = 0;
Francois Romieu865c6522008-05-11 14:51:00 +02004380 int status;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004381
David Dillowf11a3772009-05-22 15:29:34 +00004382 /* loop handling interrupts until we have no new ones or
4383 * we hit a invalid/hotplug case.
4384 */
Francois Romieu865c6522008-05-11 14:51:00 +02004385 status = RTL_R16(IntrStatus);
David Dillowf11a3772009-05-22 15:29:34 +00004386 while (status && status != 0xffff) {
4387 handled = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004388
David Dillowf11a3772009-05-22 15:29:34 +00004389 /* Handle all of the error cases first. These will reset
4390 * the chip, so just exit the loop.
4391 */
4392 if (unlikely(!netif_running(dev))) {
4393 rtl8169_asic_down(ioaddr);
4394 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004395 }
David Dillowf11a3772009-05-22 15:29:34 +00004396
4397 /* Work around for rx fifo overflow */
françois romieu53f57352010-11-08 13:23:05 +00004398 if (unlikely(status & RxFIFOOver) &&
4399 (tp->mac_version == RTL_GIGA_MAC_VER_11)) {
David Dillowf11a3772009-05-22 15:29:34 +00004400 netif_stop_queue(dev);
4401 rtl8169_tx_timeout(dev);
4402 break;
4403 }
4404
4405 if (unlikely(status & SYSErr)) {
4406 rtl8169_pcierr_interrupt(dev);
4407 break;
4408 }
4409
4410 if (status & LinkChg)
Rafael J. Wysockie4fbce72010-12-08 15:32:14 +00004411 __rtl8169_check_link_status(dev, tp, ioaddr, true);
David Dillowf11a3772009-05-22 15:29:34 +00004412
4413 /* We need to see the lastest version of tp->intr_mask to
4414 * avoid ignoring an MSI interrupt and having to wait for
4415 * another event which may never come.
4416 */
4417 smp_rmb();
4418 if (status & tp->intr_mask & tp->napi_event) {
4419 RTL_W16(IntrMask, tp->intr_event & ~tp->napi_event);
4420 tp->intr_mask = ~tp->napi_event;
4421
4422 if (likely(napi_schedule_prep(&tp->napi)))
4423 __napi_schedule(&tp->napi);
Joe Perchesbf82c182010-02-09 11:49:50 +00004424 else
4425 netif_info(tp, intr, dev,
4426 "interrupt %04x in poll\n", status);
David Dillowf11a3772009-05-22 15:29:34 +00004427 }
4428
4429 /* We only get a new MSI interrupt when all active irq
4430 * sources on the chip have been acknowledged. So, ack
4431 * everything we've seen and check if new sources have become
4432 * active to avoid blocking all interrupts from the chip.
4433 */
4434 RTL_W16(IntrStatus,
4435 (status & RxFIFOOver) ? (status | RxOverflow) : status);
4436 status = RTL_R16(IntrStatus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004437 }
David Dillowf11a3772009-05-22 15:29:34 +00004438
Linus Torvalds1da177e2005-04-16 15:20:36 -07004439 return IRQ_RETVAL(handled);
4440}
4441
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004442static int rtl8169_poll(struct napi_struct *napi, int budget)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004443{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004444 struct rtl8169_private *tp = container_of(napi, struct rtl8169_private, napi);
4445 struct net_device *dev = tp->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004446 void __iomem *ioaddr = tp->mmio_addr;
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004447 int work_done;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004448
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004449 work_done = rtl8169_rx_interrupt(dev, tp, ioaddr, (u32) budget);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004450 rtl8169_tx_interrupt(dev, tp, ioaddr);
4451
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004452 if (work_done < budget) {
Ben Hutchings288379f2009-01-19 16:43:59 -08004453 napi_complete(napi);
David Dillowf11a3772009-05-22 15:29:34 +00004454
4455 /* We need for force the visibility of tp->intr_mask
4456 * for other CPUs, as we can loose an MSI interrupt
4457 * and potentially wait for a retransmit timeout if we don't.
4458 * The posted write to IntrMask is safe, as it will
4459 * eventually make it to the chip and we won't loose anything
4460 * until it does.
Linus Torvalds1da177e2005-04-16 15:20:36 -07004461 */
David Dillowf11a3772009-05-22 15:29:34 +00004462 tp->intr_mask = 0xffff;
David Dillow4c020a92010-03-03 16:33:10 +00004463 wmb();
Francois Romieu0e485152007-02-20 00:00:26 +01004464 RTL_W16(IntrMask, tp->intr_event);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004465 }
4466
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004467 return work_done;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004468}
Linus Torvalds1da177e2005-04-16 15:20:36 -07004469
Francois Romieu523a6092008-09-10 22:28:56 +02004470static void rtl8169_rx_missed(struct net_device *dev, void __iomem *ioaddr)
4471{
4472 struct rtl8169_private *tp = netdev_priv(dev);
4473
4474 if (tp->mac_version > RTL_GIGA_MAC_VER_06)
4475 return;
4476
4477 dev->stats.rx_missed_errors += (RTL_R32(RxMissed) & 0xffffff);
4478 RTL_W32(RxMissed, 0);
4479}
4480
Linus Torvalds1da177e2005-04-16 15:20:36 -07004481static void rtl8169_down(struct net_device *dev)
4482{
4483 struct rtl8169_private *tp = netdev_priv(dev);
4484 void __iomem *ioaddr = tp->mmio_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004485
4486 rtl8169_delete_timer(dev);
4487
4488 netif_stop_queue(dev);
4489
Stephen Hemminger93dd79e2007-10-28 17:14:06 +01004490 napi_disable(&tp->napi);
Stephen Hemminger93dd79e2007-10-28 17:14:06 +01004491
Linus Torvalds1da177e2005-04-16 15:20:36 -07004492 spin_lock_irq(&tp->lock);
4493
4494 rtl8169_asic_down(ioaddr);
Stanislaw Gruszka323bb682010-10-20 22:25:41 +00004495 /*
4496 * At this point device interrupts can not be enabled in any function,
4497 * as netif_running is not true (rtl8169_interrupt, rtl8169_reset_task,
4498 * rtl8169_reinit_task) and napi is disabled (rtl8169_poll).
4499 */
Francois Romieu523a6092008-09-10 22:28:56 +02004500 rtl8169_rx_missed(dev, ioaddr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004501
4502 spin_unlock_irq(&tp->lock);
4503
4504 synchronize_irq(dev->irq);
4505
Linus Torvalds1da177e2005-04-16 15:20:36 -07004506 /* Give a racing hard_start_xmit a few cycles to complete. */
Paul E. McKenneyfbd568a3e2005-05-01 08:59:04 -07004507 synchronize_sched(); /* FIXME: should this be synchronize_irq()? */
Linus Torvalds1da177e2005-04-16 15:20:36 -07004508
Linus Torvalds1da177e2005-04-16 15:20:36 -07004509 rtl8169_tx_clear(tp);
4510
4511 rtl8169_rx_clear(tp);
françois romieu065c27c2011-01-03 15:08:12 +00004512
4513 rtl_pll_power_down(tp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004514}
4515
4516static int rtl8169_close(struct net_device *dev)
4517{
4518 struct rtl8169_private *tp = netdev_priv(dev);
4519 struct pci_dev *pdev = tp->pci_dev;
4520
Rafael J. Wysockie1759442010-03-14 14:33:51 +00004521 pm_runtime_get_sync(&pdev->dev);
4522
Ivan Vecera355423d2009-02-06 21:49:57 -08004523 /* update counters before going down */
4524 rtl8169_update_counters(dev);
4525
Linus Torvalds1da177e2005-04-16 15:20:36 -07004526 rtl8169_down(dev);
4527
4528 free_irq(dev->irq, dev);
4529
Stanislaw Gruszka82553bb2010-10-08 04:25:01 +00004530 dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray,
4531 tp->RxPhyAddr);
4532 dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray,
4533 tp->TxPhyAddr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004534 tp->TxDescArray = NULL;
4535 tp->RxDescArray = NULL;
4536
Rafael J. Wysockie1759442010-03-14 14:33:51 +00004537 pm_runtime_put_sync(&pdev->dev);
4538
Linus Torvalds1da177e2005-04-16 15:20:36 -07004539 return 0;
4540}
4541
Francois Romieu07ce4062007-02-23 23:36:39 +01004542static void rtl_set_rx_mode(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004543{
4544 struct rtl8169_private *tp = netdev_priv(dev);
4545 void __iomem *ioaddr = tp->mmio_addr;
4546 unsigned long flags;
4547 u32 mc_filter[2]; /* Multicast hash filter */
Francois Romieu07d3f512007-02-21 22:40:46 +01004548 int rx_mode;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004549 u32 tmp = 0;
4550
4551 if (dev->flags & IFF_PROMISC) {
4552 /* Unconditionally log net taps. */
Joe Perchesbf82c182010-02-09 11:49:50 +00004553 netif_notice(tp, link, dev, "Promiscuous mode enabled\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07004554 rx_mode =
4555 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
4556 AcceptAllPhys;
4557 mc_filter[1] = mc_filter[0] = 0xffffffff;
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00004558 } else if ((netdev_mc_count(dev) > multicast_filter_limit) ||
Joe Perches8e95a202009-12-03 07:58:21 +00004559 (dev->flags & IFF_ALLMULTI)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07004560 /* Too many to filter perfectly -- accept all multicasts. */
4561 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
4562 mc_filter[1] = mc_filter[0] = 0xffffffff;
4563 } else {
Jiri Pirko22bedad2010-04-01 21:22:57 +00004564 struct netdev_hw_addr *ha;
Francois Romieu07d3f512007-02-21 22:40:46 +01004565
Linus Torvalds1da177e2005-04-16 15:20:36 -07004566 rx_mode = AcceptBroadcast | AcceptMyPhys;
4567 mc_filter[1] = mc_filter[0] = 0;
Jiri Pirko22bedad2010-04-01 21:22:57 +00004568 netdev_for_each_mc_addr(ha, dev) {
4569 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004570 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
4571 rx_mode |= AcceptMulticast;
4572 }
4573 }
4574
4575 spin_lock_irqsave(&tp->lock, flags);
4576
4577 tmp = rtl8169_rx_config | rx_mode |
4578 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
4579
Francois Romieuf887cce2008-07-17 22:24:18 +02004580 if (tp->mac_version > RTL_GIGA_MAC_VER_06) {
Francois Romieu1087f4f2007-12-26 22:46:05 +01004581 u32 data = mc_filter[0];
4582
4583 mc_filter[0] = swab32(mc_filter[1]);
4584 mc_filter[1] = swab32(data);
Francois Romieubcf0bf92006-07-26 23:14:13 +02004585 }
4586
Linus Torvalds1da177e2005-04-16 15:20:36 -07004587 RTL_W32(MAR0 + 4, mc_filter[1]);
Francois Romieu78f1cd02010-03-27 19:35:46 -07004588 RTL_W32(MAR0 + 0, mc_filter[0]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004589
Francois Romieu57a9f232007-06-04 22:10:15 +02004590 RTL_W32(RxConfig, tmp);
4591
Linus Torvalds1da177e2005-04-16 15:20:36 -07004592 spin_unlock_irqrestore(&tp->lock, flags);
4593}
4594
4595/**
4596 * rtl8169_get_stats - Get rtl8169 read/write statistics
4597 * @dev: The Ethernet Device to get statistics for
4598 *
4599 * Get TX/RX statistics for rtl8169
4600 */
4601static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
4602{
4603 struct rtl8169_private *tp = netdev_priv(dev);
4604 void __iomem *ioaddr = tp->mmio_addr;
4605 unsigned long flags;
4606
4607 if (netif_running(dev)) {
4608 spin_lock_irqsave(&tp->lock, flags);
Francois Romieu523a6092008-09-10 22:28:56 +02004609 rtl8169_rx_missed(dev, ioaddr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004610 spin_unlock_irqrestore(&tp->lock, flags);
4611 }
Francois Romieu5b0384f2006-08-16 16:00:01 +02004612
Francois Romieucebf8cc2007-10-18 12:06:54 +02004613 return &dev->stats;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004614}
4615
Rafael J. Wysocki861ab442009-04-05 08:40:04 +00004616static void rtl8169_net_suspend(struct net_device *dev)
Francois Romieu5d06a992006-02-23 00:47:58 +01004617{
françois romieu065c27c2011-01-03 15:08:12 +00004618 struct rtl8169_private *tp = netdev_priv(dev);
4619
Francois Romieu5d06a992006-02-23 00:47:58 +01004620 if (!netif_running(dev))
Rafael J. Wysocki861ab442009-04-05 08:40:04 +00004621 return;
Francois Romieu5d06a992006-02-23 00:47:58 +01004622
françois romieu065c27c2011-01-03 15:08:12 +00004623 rtl_pll_power_down(tp);
4624
Francois Romieu5d06a992006-02-23 00:47:58 +01004625 netif_device_detach(dev);
4626 netif_stop_queue(dev);
Rafael J. Wysocki861ab442009-04-05 08:40:04 +00004627}
Francois Romieu5d06a992006-02-23 00:47:58 +01004628
Rafael J. Wysocki861ab442009-04-05 08:40:04 +00004629#ifdef CONFIG_PM
4630
4631static int rtl8169_suspend(struct device *device)
4632{
4633 struct pci_dev *pdev = to_pci_dev(device);
4634 struct net_device *dev = pci_get_drvdata(pdev);
4635
4636 rtl8169_net_suspend(dev);
Francois Romieu1371fa62007-04-02 23:01:11 +02004637
Francois Romieu5d06a992006-02-23 00:47:58 +01004638 return 0;
4639}
4640
Rafael J. Wysockie1759442010-03-14 14:33:51 +00004641static void __rtl8169_resume(struct net_device *dev)
4642{
françois romieu065c27c2011-01-03 15:08:12 +00004643 struct rtl8169_private *tp = netdev_priv(dev);
4644
Rafael J. Wysockie1759442010-03-14 14:33:51 +00004645 netif_device_attach(dev);
françois romieu065c27c2011-01-03 15:08:12 +00004646
4647 rtl_pll_power_up(tp);
4648
Rafael J. Wysockie1759442010-03-14 14:33:51 +00004649 rtl8169_schedule_work(dev, rtl8169_reset_task);
4650}
4651
Rafael J. Wysocki861ab442009-04-05 08:40:04 +00004652static int rtl8169_resume(struct device *device)
Francois Romieu5d06a992006-02-23 00:47:58 +01004653{
Rafael J. Wysocki861ab442009-04-05 08:40:04 +00004654 struct pci_dev *pdev = to_pci_dev(device);
Francois Romieu5d06a992006-02-23 00:47:58 +01004655 struct net_device *dev = pci_get_drvdata(pdev);
Stanislaw Gruszkafccec102010-10-20 22:25:42 +00004656 struct rtl8169_private *tp = netdev_priv(dev);
4657
4658 rtl8169_init_phy(dev, tp);
Francois Romieu5d06a992006-02-23 00:47:58 +01004659
Rafael J. Wysockie1759442010-03-14 14:33:51 +00004660 if (netif_running(dev))
4661 __rtl8169_resume(dev);
Francois Romieu5d06a992006-02-23 00:47:58 +01004662
Francois Romieu5d06a992006-02-23 00:47:58 +01004663 return 0;
4664}
4665
Rafael J. Wysockie1759442010-03-14 14:33:51 +00004666static int rtl8169_runtime_suspend(struct device *device)
4667{
4668 struct pci_dev *pdev = to_pci_dev(device);
4669 struct net_device *dev = pci_get_drvdata(pdev);
4670 struct rtl8169_private *tp = netdev_priv(dev);
4671
4672 if (!tp->TxDescArray)
4673 return 0;
4674
4675 spin_lock_irq(&tp->lock);
4676 tp->saved_wolopts = __rtl8169_get_wol(tp);
4677 __rtl8169_set_wol(tp, WAKE_ANY);
4678 spin_unlock_irq(&tp->lock);
4679
4680 rtl8169_net_suspend(dev);
4681
4682 return 0;
4683}
4684
4685static int rtl8169_runtime_resume(struct device *device)
4686{
4687 struct pci_dev *pdev = to_pci_dev(device);
4688 struct net_device *dev = pci_get_drvdata(pdev);
4689 struct rtl8169_private *tp = netdev_priv(dev);
4690
4691 if (!tp->TxDescArray)
4692 return 0;
4693
4694 spin_lock_irq(&tp->lock);
4695 __rtl8169_set_wol(tp, tp->saved_wolopts);
4696 tp->saved_wolopts = 0;
4697 spin_unlock_irq(&tp->lock);
4698
Stanislaw Gruszkafccec102010-10-20 22:25:42 +00004699 rtl8169_init_phy(dev, tp);
4700
Rafael J. Wysockie1759442010-03-14 14:33:51 +00004701 __rtl8169_resume(dev);
4702
4703 return 0;
4704}
4705
4706static int rtl8169_runtime_idle(struct device *device)
4707{
4708 struct pci_dev *pdev = to_pci_dev(device);
4709 struct net_device *dev = pci_get_drvdata(pdev);
4710 struct rtl8169_private *tp = netdev_priv(dev);
4711
Rafael J. Wysockie4fbce72010-12-08 15:32:14 +00004712 return tp->TxDescArray ? -EBUSY : 0;
Rafael J. Wysockie1759442010-03-14 14:33:51 +00004713}
4714
Alexey Dobriyan47145212009-12-14 18:00:08 -08004715static const struct dev_pm_ops rtl8169_pm_ops = {
Rafael J. Wysocki861ab442009-04-05 08:40:04 +00004716 .suspend = rtl8169_suspend,
4717 .resume = rtl8169_resume,
4718 .freeze = rtl8169_suspend,
4719 .thaw = rtl8169_resume,
4720 .poweroff = rtl8169_suspend,
4721 .restore = rtl8169_resume,
Rafael J. Wysockie1759442010-03-14 14:33:51 +00004722 .runtime_suspend = rtl8169_runtime_suspend,
4723 .runtime_resume = rtl8169_runtime_resume,
4724 .runtime_idle = rtl8169_runtime_idle,
Rafael J. Wysocki861ab442009-04-05 08:40:04 +00004725};
4726
4727#define RTL8169_PM_OPS (&rtl8169_pm_ops)
4728
4729#else /* !CONFIG_PM */
4730
4731#define RTL8169_PM_OPS NULL
4732
4733#endif /* !CONFIG_PM */
4734
Francois Romieu1765f952008-09-13 17:21:40 +02004735static void rtl_shutdown(struct pci_dev *pdev)
4736{
Rafael J. Wysocki861ab442009-04-05 08:40:04 +00004737 struct net_device *dev = pci_get_drvdata(pdev);
françois romieu4bb3f522009-06-17 11:41:45 +00004738 struct rtl8169_private *tp = netdev_priv(dev);
4739 void __iomem *ioaddr = tp->mmio_addr;
Francois Romieu1765f952008-09-13 17:21:40 +02004740
Rafael J. Wysocki861ab442009-04-05 08:40:04 +00004741 rtl8169_net_suspend(dev);
4742
Ivan Veceracc098dc2009-11-29 23:12:52 -08004743 /* restore original MAC address */
4744 rtl_rar_set(tp, dev->perm_addr);
4745
françois romieu4bb3f522009-06-17 11:41:45 +00004746 spin_lock_irq(&tp->lock);
4747
4748 rtl8169_asic_down(ioaddr);
4749
4750 spin_unlock_irq(&tp->lock);
4751
Rafael J. Wysocki861ab442009-04-05 08:40:04 +00004752 if (system_state == SYSTEM_POWER_OFF) {
françois romieuca52efd2009-07-24 12:34:19 +00004753 /* WoL fails with some 8168 when the receiver is disabled. */
4754 if (tp->features & RTL_FEATURE_WOL) {
4755 pci_clear_master(pdev);
4756
4757 RTL_W8(ChipCmd, CmdRxEnb);
4758 /* PCI commit */
4759 RTL_R8(ChipCmd);
4760 }
4761
Rafael J. Wysocki861ab442009-04-05 08:40:04 +00004762 pci_wake_from_d3(pdev, true);
4763 pci_set_power_state(pdev, PCI_D3hot);
4764 }
4765}
Francois Romieu5d06a992006-02-23 00:47:58 +01004766
Linus Torvalds1da177e2005-04-16 15:20:36 -07004767static struct pci_driver rtl8169_pci_driver = {
4768 .name = MODULENAME,
4769 .id_table = rtl8169_pci_tbl,
4770 .probe = rtl8169_init_one,
4771 .remove = __devexit_p(rtl8169_remove_one),
Francois Romieu1765f952008-09-13 17:21:40 +02004772 .shutdown = rtl_shutdown,
Rafael J. Wysocki861ab442009-04-05 08:40:04 +00004773 .driver.pm = RTL8169_PM_OPS,
Linus Torvalds1da177e2005-04-16 15:20:36 -07004774};
4775
Francois Romieu07d3f512007-02-21 22:40:46 +01004776static int __init rtl8169_init_module(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004777{
Jeff Garzik29917622006-08-19 17:48:59 -04004778 return pci_register_driver(&rtl8169_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004779}
4780
Francois Romieu07d3f512007-02-21 22:40:46 +01004781static void __exit rtl8169_cleanup_module(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004782{
4783 pci_unregister_driver(&rtl8169_pci_driver);
4784}
4785
4786module_init(rtl8169_init_module);
4787module_exit(rtl8169_cleanup_module);