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Syed Rameez Mustafa3971c142013-01-09 19:04:53 -08001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafad3935822012-10-09 11:23:20 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070014
15/ {
16 model = "Qualcomm MSM 8610";
17 compatible = "qcom,msm8610";
18 interrupt-parent = <&intc>;
19
20 memory {
21 qsecom_mem: qsecom_region {
22 linux,contiguous-region;
23 reg = <0 0x100000>;
24 label = "qsecom_mem";
25 };
26 };
27
28 aliases {
29 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
30 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
31 };
32
33 soc: soc { };
34};
35
Olav Haugan54166782013-01-28 16:59:51 -080036/include/ "msm-iommu-v0.dtsi"
Syed Rameez Mustafa3971c142013-01-09 19:04:53 -080037/include/ "msm8610-ion.dtsi"
Lokesh Batra8d55eec2013-02-26 11:31:21 -080038/include/ "msm8610-gpu.dtsi"
Matt Wagantall1bf56932012-11-29 15:03:29 -080039/include/ "msm-gdsc.dtsi"
Aparna Dasd16555b2013-03-06 15:46:38 -080040/include/ "msm8610-coresight.dtsi"
Praveen Chidambarama1f98282012-11-29 09:56:57 -070041/include/ "msm8610-pm.dtsi"
Jeff Hugo53dcf0f2013-03-20 12:37:50 -060042/include/ "msm8610-smp2p.dtsi"
Gagan Macbced3872013-02-04 19:18:04 -070043/include/ "msm8610-bus.dtsi"
Xiaoming Zhou5f37a252013-04-09 21:11:50 -040044/include/ "msm8610-mdss.dtsi"
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070045
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070046&soc {
47 #address-cells = <1>;
48 #size-cells = <1>;
49 ranges;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070050
51 intc: interrupt-controller@f9000000 {
52 compatible = "qcom,msm-qgic2";
53 interrupt-controller;
54 #interrupt-cells = <3>;
55 reg = <0xf9000000 0x1000>,
56 <0xf9002000 0x1000>;
57 };
58
59 msmgpio: gpio@fd510000 {
60 compatible = "qcom,msm-gpio";
61 interrupt-controller;
62 #interrupt-cells = <2>;
63 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -080064 gpio-controller;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070065 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -080066 ngpio = <102>;
Rohit Vaswanid2001522012-12-05 19:23:44 -080067 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -080068 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070069 };
70
Abhimanyu Kapur58d303a72013-04-30 16:13:41 -070071 qcom,mpm2-sleep-counter@fc4a3000 {
72 compatible = "qcom,mpm2-sleep-counter";
73 reg = <0xfc4a3000 0x1000>;
74 clock-frequency = <32768>;
75 };
76
Syed Rameez Mustafafd9ac032012-10-10 17:52:07 -070077 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -080078 compatible = "arm,armv7-timer";
Syed Rameez Mustafafd9ac032012-10-10 17:52:07 -070079 interrupts = <1 2 0 1 3 0>;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070080 clock-frequency = <19200000>;
81 };
82
Stephen Boyda61ac642013-04-10 14:20:27 -070083 timer@f9020000 {
84 #address-cells = <1>;
85 #size-cells = <1>;
86 ranges;
87 compatible = "arm,armv7-timer-mem";
88 reg = <0xf9020000 0x1000>;
89 clock-frequency = <19200000>;
90
91 frame@f9021000 {
92 frame-number = <0>;
93 interrupts = <0 8 0x4>,
94 <0 7 0x4>;
95 reg = <0xf9021000 0x1000>,
96 <0xf9022000 0x1000>;
97 };
98
99 frame@f9023000 {
100 frame-number = <1>;
101 interrupts = <0 9 0x4>;
102 reg = <0xf9023000 0x1000>;
103 status = "disabled";
104 };
105
106 frame@f9024000 {
107 frame-number = <2>;
108 interrupts = <0 10 0x4>;
109 reg = <0xf9024000 0x1000>;
110 status = "disabled";
111 };
112
113 frame@f9025000 {
114 frame-number = <3>;
115 interrupts = <0 11 0x4>;
116 reg = <0xf9025000 0x1000>;
117 status = "disabled";
118 };
119
120 frame@f9026000 {
121 frame-number = <4>;
122 interrupts = <0 12 0x4>;
123 reg = <0xf9026000 0x1000>;
124 status = "disabled";
125 };
126
127 frame@f9027000 {
128 frame-number = <5>;
129 interrupts = <0 13 0x4>;
130 reg = <0xf9027000 0x1000>;
131 status = "disabled";
132 };
133
134 frame@f9028000 {
135 frame-number = <6>;
136 interrupts = <0 14 0x4>;
137 reg = <0xf9028000 0x1000>;
138 status = "disabled";
139 };
140 };
141
Arun Menon2a7e3772013-01-17 12:06:59 -0800142 qcom,msm-adsp-loader {
143 compatible = "qcom,adsp-loader";
144 qcom,adsp-state = <0>;
145 };
146
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800147 qcom,msm-imem@fe805000 {
148 compatible = "qcom,msm-imem";
149 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
150 };
151
Syed Rameez Mustafad3935822012-10-09 11:23:20 -0700152 serial@f991f000 {
153 compatible = "qcom,msm-lsuart-v14";
154 reg = <0xf991f000 0x1000>;
155 interrupts = <0 109 0>;
156 status = "disabled";
157 };
Mayank Rana55db0cb2012-10-15 16:50:06 +0530158
Hanumant Singh6b346712013-04-09 16:26:09 -0700159 serial@f991e000 {
160 compatible = "qcom,msm-lsuart-v14";
161 reg = <0xf991e000 0x1000>;
162 interrupts = <0 108 0>;
163 status = "disabled";
164 };
165
Arun Menon8e25dd42013-01-11 14:11:54 -0800166 qcom,vidc@fdc00000 {
167 compatible = "qcom,msm-vidc";
Sachin Shah4e1c8fe2013-03-20 15:10:05 -0700168 qcom,vidc-ns-map = <0x40000000 0x40000000>;
169 qcom,iommu-groups = <&q6_domain_ns>;
170 qcom,iommu-group-buffer-types = <0xfff>;
171 qcom,buffer-type-tz-usage-map = <0x1 0x1>,
172 <0x1fe 0x2>;
173 qcom,hfi = "q6";
Arun Menonede58642013-04-26 14:19:06 -0700174 qcom,max-hw-load = <108000>; /* 720p @ 30 * 1 */
Arun Menon8e25dd42013-01-11 14:11:54 -0800175 };
176
Vamsi Krishna872fbbc2013-04-09 18:04:52 -0700177 qcom,usbbam@f9a44000 {
178 compatible = "qcom,usb-bam-msm";
179 reg = <0xf9a44000 0x11000>;
180 reg-names = "hsusb";
181 interrupts = <0 135 0>;
182 interrupt-names = "hsusb";
183 qcom,usb-bam-num-pipes = <16>;
184 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
185 qcom,ignore-core-reset-ack;
186 qcom,disable-clk-gating;
187
188 qcom,pipe0 {
189 label = "hsusb-qdss-in-0";
190 qcom,usb-bam-mem-type = <3>;
191 qcom,bam-type = <1>;
192 qcom,dir = <1>;
193 qcom,pipe-num = <0>;
194 qcom,peer-bam = <1>;
195 qcom,src-bam-physical-address = <0xfc37c000>;
196 qcom,src-bam-pipe-index = <0>;
197 qcom,dst-bam-physical-address = <0xf9a44000>;
198 qcom,dst-bam-pipe-index = <2>;
199 qcom,data-fifo-offset = <0x0>;
200 qcom,data-fifo-size = <0x600>;
201 qcom,descriptor-fifo-offset = <0x600>;
202 qcom,descriptor-fifo-size = <0x200>;
203 };
204 };
205
Mayank Rana55db0cb2012-10-15 16:50:06 +0530206 usb@f9a55000 {
207 compatible = "qcom,hsusb-otg";
208 reg = <0xf9a55000 0x400>;
Mayank Rana33d26662013-01-17 10:22:25 +0530209 interrupts = <0 134 0>, <0 140 0>;
210 interrupt-names = "core_irq", "async_irq";
Mayank Rana76c6ce22012-11-07 17:07:58 +0530211 HSUSB_VDDCX-supply = <&pm8110_s1>;
212 HSUSB_1p8-supply = <&pm8110_l10>;
213 HSUSB_3p3-supply = <&pm8110_l20>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530214
215 qcom,hsusb-otg-phy-type = <2>;
216 qcom,hsusb-otg-mode = <1>;
Mayank Rana29bb9f22013-04-04 18:25:12 +0530217 qcom,hsusb-otg-otg-control = <2>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530218 qcom,hsusb-otg-disable-reset;
Mayank Ranaa5491122013-04-04 18:32:25 +0530219 qcom,dp-manual-pullup;
Mayank Ranaf9295802013-04-04 18:36:44 +0530220
221 qcom,msm-bus,name = "usb2";
222 qcom,msm-bus,num-cases = <2>;
223 qcom,msm-bus,active-only = <0>;
224 qcom,msm-bus,num-paths = <1>;
225 qcom,msm-bus,vectors-KBps =
226 <87 512 0 0>,
227 <87 512 60000 960000>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530228 };
229
Mayank Ranacc0c5452013-01-29 16:41:53 +0530230 android_usb@fe8050c8 {
Mayank Rana55db0cb2012-10-15 16:50:06 +0530231 compatible = "qcom,android-usb";
Mayank Ranacc0c5452013-01-29 16:41:53 +0530232 reg = <0xfe8050c8 0xc8>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530233 };
234
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700235 sdcc1: qcom,sdcc@f9824000 {
236 cell-index = <1>; /* SDC1 eMMC slot */
237 compatible = "qcom,msm-sdcc";
Oluwafemi Adeyemi4641e7f2012-11-28 16:12:56 -0800238 reg = <0xf9824000 0x800>,
239 <0xf9824800 0x100>,
240 <0xf9804000 0x7000>;
241 reg-names = "core_mem", "dml_mem", "bam_mem";
242 interrupts = <0 123 0>, <0 137 0>;
243 interrupt-names = "core_irq", "bam_irq";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700244
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700245 vdd-supply = <&pm8110_l17>;
246 qcom,vdd-always-on;
247 qcom,vdd-lpm-sup;
248 qcom,vdd-voltage-level = <2900000 2900000>;
249 qcom,vdd-current-level = <9000 400000>;
250
251 vdd-io-supply = <&pm8110_l6>;
252 qcom,vdd-io-always-on;
253 qcom,vdd-io-lpm-sup;
254 qcom,vdd-io-voltage-level = <1800000 1800000>;
255 qcom,vdd-io-current-level = <9000 60000>;
256
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700257 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
258 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
Krishna Konda6c5d0f42013-04-12 16:44:26 -0700259 qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700260 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700261
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700262 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700263 qcom,sup-voltages = <2900 2900>;
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700264 qcom,bus-width = <8>;
265 qcom,nonremovable;
266 qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
Venkat Gopalakrishnan587b2252013-04-05 12:16:50 -0700267
268 status = "disabled";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700269 };
270
271 sdcc2: qcom,sdcc@f98a4000 {
272 cell-index = <2>; /* SDC2 SD card slot */
273 compatible = "qcom,msm-sdcc";
Oluwafemi Adeyemi4641e7f2012-11-28 16:12:56 -0800274 reg = <0xf98a4000 0x800>,
275 <0xf98a4800 0x100>,
276 <0xf9884000 0x7000>;
277 reg-names = "core_mem", "dml_mem", "bam_mem";
278 interrupts = <0 125 0>, <0 220 0>;
279 interrupt-names = "core_irq", "bam_irq";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700280
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700281 vdd-supply = <&pm8110_l18>;
282 qcom,vdd-voltage-level = <2950000 2950000>;
283 qcom,vdd-current-level = <9000 400000>;
284
285 vdd-io-supply = <&pm8110_l21>;
286 qcom,vdd-io-voltage-level = <1800000 2950000>;
287 qcom,vdd-io-current-level = <9000 50000>;
288
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700289 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
290 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
Krishna Konda6c5d0f42013-04-12 16:44:26 -0700291 qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700292 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700293
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700294 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
295 qcom,sup-voltages = <2950 2950>;
296 qcom,bus-width = <4>;
297 qcom,xpc;
298 qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
299 qcom,current-limit = <800>;
Venkat Gopalakrishnan587b2252013-04-05 12:16:50 -0700300
301 status = "disabled";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700302 };
303
Venkat Gopalakrishnana6ce5f22013-04-04 14:24:57 -0700304 sdhc_1: sdhci@f9824900 {
305 compatible = "qcom,sdhci-msm";
306 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
307 reg-names = "hc_mem", "core_mem";
308
309 interrupts = <0 123 0>, <0 138 0>;
310 interrupt-names = "hc_irq", "pwr_irq";
311
312 qcom,bus-width = <8>;
313 status = "disabled";
314 };
315
316 sdhc_2: sdhci@f98a4900 {
317 compatible = "qcom,sdhci-msm";
318 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
319 reg-names = "hc_mem", "core_mem";
320
321 interrupts = <0 125 0>, <0 221 0>;
322 interrupt-names = "hc_irq", "pwr_irq";
323
324 qcom,bus-width = <4>;
325 status = "disabled";
326 };
327
Yan He6c7304c2012-11-09 22:07:08 -0800328 qcom,sps {
329 compatible = "qcom,msm_sps";
330 qcom,device-type = <3>;
331 };
332
Jeff Hugo4e20fda2013-04-10 12:40:19 -0600333 qcom,smem@d900000 {
Jeff Hugo818d0f72012-11-05 14:19:28 -0700334 compatible = "qcom,smem";
Jeff Hugoe1e30e72013-04-08 14:15:34 -0600335 reg = <0xd900000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800336 <0xf9011000 0x1000>,
Jeff Hugo818d0f72012-11-05 14:19:28 -0700337 <0xfc428000 0x4000>;
338 reg-names = "smem", "irq-reg-base", "aux-mem1";
339
340 qcom,smd-modem {
341 compatible = "qcom,smd";
342 qcom,smd-edge = <0>;
343 qcom,smd-irq-offset = <0x8>;
344 qcom,smd-irq-bitmask = <0x1000>;
345 qcom,pil-string = "modem";
346 interrupts = <0 25 1>;
347 };
348
349 qcom,smsm-modem {
350 compatible = "qcom,smsm";
351 qcom,smsm-edge = <0>;
352 qcom,smsm-irq-offset = <0x8>;
353 qcom,smsm-irq-bitmask = <0x2000>;
354 interrupts = <0 26 1>;
355 };
356
357 qcom,smd-adsp {
358 compatible = "qcom,smd";
359 qcom,smd-edge = <1>;
360 qcom,smd-irq-offset = <0x8>;
361 qcom,smd-irq-bitmask = <0x100>;
362 qcom,pil-string = "adsp";
363 interrupts = <0 156 1>;
364 };
365
366 qcom,smsm-adsp {
367 compatible = "qcom,smsm";
368 qcom,smsm-edge = <1>;
369 qcom,smsm-irq-offset = <0x8>;
370 qcom,smsm-irq-bitmask = <0x200>;
371 interrupts = <0 157 1>;
372 };
373
374 qcom,smd-wcnss {
375 compatible = "qcom,smd";
376 qcom,smd-edge = <6>;
377 qcom,smd-irq-offset = <0x8>;
378 qcom,smd-irq-bitmask = <0x20000>;
379 qcom,pil-string = "wcnss";
380 interrupts = <0 142 1>;
381 };
382
383 qcom,smsm-wcnss {
384 compatible = "qcom,smsm";
385 qcom,smsm-edge = <6>;
386 qcom,smsm-irq-offset = <0x8>;
387 qcom,smsm-irq-bitmask = <0x80000>;
388 interrupts = <0 144 1>;
389 };
390
391 qcom,smd-rpm {
392 compatible = "qcom,smd";
393 qcom,smd-edge = <15>;
394 qcom,smd-irq-offset = <0x8>;
395 qcom,smd-irq-bitmask = <0x1>;
396 interrupts = <0 168 1>;
397 qcom,irq-no-suspend;
398 };
David Ng5a3cb232012-12-03 16:42:53 -0800399 };
Hanumant Singh4e334c82012-11-14 10:16:39 -0800400
Praveen Chidambarama1f98282012-11-29 09:56:57 -0700401 rpm_bus: qcom,rpm-smd {
402 compatible = "qcom,rpm-smd";
403 rpm-channel-name = "rpm_requests";
404 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Priyanka Mathur6e993c92013-03-20 11:17:27 -0700405 rpm-standalone;
Praveen Chidambarama1f98282012-11-29 09:56:57 -0700406 };
407
Olav Haugan8340d932013-01-25 12:03:11 -0800408 qcom,msm-mem-hole {
409 compatible = "qcom,msm-mem-hole";
Olav Hauganfcc860e2013-04-06 10:56:06 -0700410 qcom,memblock-remove = <0x07B00000 0x6400000>; /* Address and Size of Hole */
Olav Haugan8340d932013-01-25 12:03:11 -0800411 };
412
Hanumant Singh4e334c82012-11-14 10:16:39 -0800413 qcom,wdt@f9017000 {
414 compatible = "qcom,msm-watchdog";
415 reg = <0xf9017000 0x1000>;
416 interrupts = <0 3 0>, <0 4 0>;
417 qcom,bark-time = <11000>;
418 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800419 qcom,ipi-ping;
Jeff Hugo818d0f72012-11-05 14:19:28 -0700420 };
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700421
Vikram Mulukutlaa3cebff2013-01-28 13:54:54 -0800422 qcom,acpuclk@f9011050 {
423 compatible = "qcom,acpuclk-a7";
424 reg = <0xf9011050 0x8>;
425 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700426 a7_cpu-supply = <&apc_vreg_corner>;
Vikram Mulukutlaa3cebff2013-01-28 13:54:54 -0800427 };
428
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700429 spmi_bus: qcom,spmi@fc4c0000 {
430 cell-index = <0>;
431 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700432 reg-names = "core", "intr", "cnfg";
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700433 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700434 <0Xfc4cb000 0x1000>,
435 <0Xfc4ca000 0x1000>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700436 /* 190,ee0_krait_hlos_spmi_periph_irq */
437 /* 187,channel_0_krait_hlos_trans_done_irq */
438 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700439 qcom,pmic-arb-ee = <0>;
440 qcom,pmic-arb-channel = <0>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700441 };
442
Chun Zhangf39a0652013-05-01 15:57:54 -0700443 i2c@f9923000 { /* BLSP-1 QUP-1 */
444 cell-index = <1>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700445 compatible = "qcom,i2c-qup";
446 #address-cells = <1>;
447 #size-cells = <0>;
448 reg-names = "qup_phys_addr";
Chun Zhangf39a0652013-05-01 15:57:54 -0700449 reg = <0xf9923000 0x1000>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700450 interrupt-names = "qup_err_intr";
Chun Zhangf39a0652013-05-01 15:57:54 -0700451 interrupts = <0 95 0>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700452 qcom,i2c-bus-freq = <100000>;
Chun Zhangf39a0652013-05-01 15:57:54 -0700453 qcom,i2c-src-freq = <19200000>;
454 qcom,sda-gpio = <&msmgpio 2 0>;
455 qcom,scl-gpio = <&msmgpio 3 0>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700456 };
457
Kuirong Wangc6d072c2013-01-29 10:33:03 -0800458 i2c_cdc: i2c@f9927000 { /* BLSP1 QUP5 */
459 cell-index = <5>;
460 compatible = "qcom,i2c-qup";
461 #address-cells = <1>;
462 #size-cells = <0>;
463 reg-names = "qup_phys_addr";
464 reg = <0xf9927000 0x1000>;
465 interrupt-names = "qup_err_intr";
466 interrupts = <0 99 0>;
467 qcom,i2c-bus-freq = <100000>;
468 };
469
Kenneth Heitke0d4fbb12013-04-10 12:51:14 -0600470 i2c@f9928000 { /* BLSP1 QUP6 */
471 cell-index = <6>;
472 compatible = "qcom,i2c-qup";
473 #address-cells = <1>;
474 #size-cells = <0>;
475 reg-names = "qup_phys_addr";
476 reg = <0xf9928000 0x1000>;
477 interrupt-names = "qup_err_intr";
478 interrupts = <0 100 0>;
479 qcom,i2c-bus-freq = <100000>;
480 qcom,i2c-src-freq = <19200000>;
481 qcom,sda-gpio = <&msmgpio 16 0>;
482 qcom,scl-gpio = <&msmgpio 17 0>;
483 };
Gilad Avidovf58f1832013-01-09 17:31:28 -0700484
Chun Zhangf39a0652013-05-01 15:57:54 -0700485 i2c@f9925000 { /* BLSP-1 QUP-3 */
486 cell-index = <0>;
487 compatible = "qcom,i2c-qup";
Gilad Avidovf58f1832013-01-09 17:31:28 -0700488 #address-cells = <1>;
489 #size-cells = <0>;
Chun Zhangf39a0652013-05-01 15:57:54 -0700490 reg-names = "qup_phys_addr";
491 reg = <0xf9925000 0x1000>;
492 interrupt-names = "qup_err_intr";
493 interrupts = <0 97 0>;
494 qcom,i2c-bus-freq = <100000>;
Gilad Avidovf58f1832013-01-09 17:31:28 -0700495 };
496
Vikram Mulukutla1ac32fd2013-01-28 10:03:58 -0800497 qcom,pronto@fb21b000 {
498 compatible = "qcom,pil-pronto";
499 reg = <0xfb21b000 0x3000>,
500 <0xfc401700 0x4>,
501 <0xfd485300 0xc>;
502 reg-names = "pmu_base", "clk_base", "halt_base";
503 interrupts = <0 149 1>;
504 vdd_pronto_pll-supply = <&pm8110_l10>;
505
506 qcom,firmware-name = "wcnss";
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700507
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700508 /* GPIO inputs from wcnss */
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700509 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappilb1e03c02013-04-29 14:52:00 -0700510 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700511 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700512
513 /* GPIO output to wcnss */
514 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Vikram Mulukutla1ac32fd2013-01-28 10:03:58 -0800515 };
516
Sameer Thalappil1b65cd02013-04-03 16:42:34 -0700517 qcom,iris-fm {
518 compatible = "qcom,iris_fm";
519 };
520
Fred Oh92b18a02013-01-22 13:29:41 -0800521 sound {
522 compatible = "qcom,msm8x10-audio-codec";
523 qcom,model = "msm8x10-snd-card";
524 };
525
526 qcom,msm-pcm {
527 compatible = "qcom,msm-pcm-dsp";
Kuirong Wang16f52d62013-03-07 10:49:27 -0800528 qcom,msm-pcm-dsp-id = <0>;
Fred Oh92b18a02013-01-22 13:29:41 -0800529 };
530
Mingming Yin8b92f9b2013-05-01 14:10:26 -0700531 qcom,msm-pcm-low-latency {
532 compatible = "qcom,msm-pcm-dsp";
533 qcom,msm-pcm-dsp-id = <1>;
534 qcom,msm-pcm-low-latency;
535 };
536
Fred Oh92b18a02013-01-22 13:29:41 -0800537 qcom,msm-pcm-routing {
538 compatible = "qcom,msm-pcm-routing";
539 };
540
541 qcom,msm-pcm-lpa {
542 compatible = "qcom,msm-pcm-lpa";
543 };
544
545 qcom,msm-compr-dsp {
546 compatible = "qcom,msm-compr-dsp";
547 };
548
549 qcom,msm-voip-dsp {
550 compatible = "qcom,msm-voip-dsp";
551 };
552
553 qcom,msm-pcm-voice {
554 compatible = "qcom,msm-pcm-voice";
555 };
556
557 qcom,msm-stub-codec {
558 compatible = "qcom,msm-stub-codec";
559 };
560
561 qcom,msm-dai-fe {
562 compatible = "qcom,msm-dai-fe";
563 };
564
565 qcom,msm-pcm-afe {
566 compatible = "qcom,msm-pcm-afe";
567 };
568
569 qcom,msm-dai-mi2s {
570 compatible = "qcom,msm-dai-mi2s";
571 qcom,msm-dai-q6-mi2s-prim {
572 compatible = "qcom,msm-dai-q6-mi2s";
573 qcom,msm-dai-q6-mi2s-dev-id = <0>;
Kuirong Wang16f52d62013-03-07 10:49:27 -0800574 qcom,msm-mi2s-rx-lines = <0>;
575 qcom,msm-mi2s-tx-lines = <3>;
Fred Oh92b18a02013-01-22 13:29:41 -0800576 };
577
578 qcom,msm-dai-q6-mi2s-sec {
579 compatible = "qcom,msm-dai-q6-mi2s";
580 qcom,msm-dai-q6-mi2s-dev-id = <1>;
Kuirong Wang16f52d62013-03-07 10:49:27 -0800581 qcom,msm-mi2s-rx-lines = <3>;
582 qcom,msm-mi2s-tx-lines = <0>;
Fred Oh92b18a02013-01-22 13:29:41 -0800583 };
584 };
585
586 qcom,msm-dai-q6 {
587 compatible = "qcom,msm-dai-q6";
588 qcom,msm-dai-q6-bt-sco-rx {
589 compatible = "qcom,msm-dai-q6-dev";
590 qcom,msm-dai-q6-dev-id = <12288>;
591 };
592
593 qcom,msm-dai-q6-bt-sco-tx {
594 compatible = "qcom,msm-dai-q6-dev";
595 qcom,msm-dai-q6-dev-id = <12289>;
596 };
597
598 qcom,msm-dai-q6-int-fm-rx {
599 compatible = "qcom,msm-dai-q6-dev";
600 qcom,msm-dai-q6-dev-id = <12292>;
601 };
602
603 qcom,msm-dai-q6-int-fm-tx {
604 compatible = "qcom,msm-dai-q6-dev";
605 qcom,msm-dai-q6-dev-id = <12293>;
606 };
607
608 qcom,msm-dai-q6-be-afe-pcm-rx {
609 compatible = "qcom,msm-dai-q6-dev";
610 qcom,msm-dai-q6-dev-id = <224>;
611 };
612
613 qcom,msm-dai-q6-be-afe-pcm-tx {
614 compatible = "qcom,msm-dai-q6-dev";
615 qcom,msm-dai-q6-dev-id = <225>;
616 };
617
618 qcom,msm-dai-q6-afe-proxy-rx {
619 compatible = "qcom,msm-dai-q6-dev";
620 qcom,msm-dai-q6-dev-id = <241>;
621 };
622
623 qcom,msm-dai-q6-afe-proxy-tx {
624 compatible = "qcom,msm-dai-q6-dev";
625 qcom,msm-dai-q6-dev-id = <240>;
626 };
Vicky Sehrawatfc8044f2013-04-18 11:34:32 -0700627
628 qcom,msm-dai-q6-incall-record-rx {
629 compatible = "qcom,msm-dai-q6-dev";
630 qcom,msm-dai-q6-dev-id = <32771>;
631 };
632
633 qcom,msm-dai-q6-incall-record-tx {
634 compatible = "qcom,msm-dai-q6-dev";
635 qcom,msm-dai-q6-dev-id = <32772>;
636 };
637
638 qcom,msm-dai-q6-incall-music-rx {
639 compatible = "qcom,msm-dai-q6-dev";
640 qcom,msm-dai-q6-dev-id = <32773>;
641 };
Fred Oh92b18a02013-01-22 13:29:41 -0800642 };
643
644 qcom,msm-pcm-hostless {
645 compatible = "qcom,msm-pcm-hostless";
646 };
647
Sameer Thalappil3928fef2013-04-08 11:51:15 -0700648 qcom,wcnss-wlan@fb000000 {
649 compatible = "qcom,wcnss_wlan";
Sameer Thalappilb2b93672013-04-18 17:00:46 -0700650 reg = <0xfb000000 0x280000>,
651 <0xf9011008 0x04>;
652 reg-names = "wcnss_mmio", "wcnss_fiq";
Sameer Thalappil3928fef2013-04-08 11:51:15 -0700653 interrupts = <0 145 0>, <0 146 0>;
654 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
655
656 qcom,pronto-vddmx-supply = <&pm8110_l3>;
657 qcom,pronto-vddcx-supply = <&pm8110_s1>;
658 qcom,pronto-vddpx-supply = <&pm8110_l6>;
659 qcom,iris-vddxo-supply = <&pm8110_l10>;
660 qcom,iris-vddrfa-supply = <&pm8110_l5>;
661 qcom,iris-vddpa-supply = <&pm8110_l16>;
662 qcom,iris-vdddig-supply = <&pm8110_l5>;
663
664 gpios = <&msmgpio 23 0>, <&msmgpio 24 0>, <&msmgpio 25 0>, <&msmgpio 26 0>, <&msmgpio 27 0>;
665 qcom,has_pronto_hw;
666 };
667
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800668 qcom,mss@fc880000 {
669 compatible = "qcom,pil-q6v5-mss";
670 reg = <0xfc880000 0x100>,
671 <0xfd485000 0x400>,
672 <0xfc820000 0x020>,
673 <0xfc401680 0x004>,
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800674 <0xfd485194 0x4>;
675 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700676 "restart_reg", "cxrail_bhs_reg";
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800677
678 interrupts = <0 24 1>;
679 vdd_mss-supply = <&pm8110_s1>;
680 vdd_cx-supply = <&pm8110_s1_corner>;
681 vdd_mx-supply = <&pm8110_l3>;
682 vdd_pll-supply = <&pm8110_l10>;
683 qcom,vdd_pll = <1800000>;
684 qcom,is-loadable;
685 qcom,firmware-name = "mba";
686 qcom,pil-self-auth;
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700687
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800688 /* GPIO inputs from mss */
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700689 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Dutta9fb72ed2013-01-25 14:22:15 -0800690 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800691 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700692
693 /* GPIO output to mss */
694 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800695 };
696
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800697 qcom,lpass@fe200000 {
698 compatible = "qcom,pil-q6v5-lpass";
699 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800700 <0xfd485100 0x00010>,
701 <0xfc4016c0 0x00004>;
702 reg-names = "qdsp6_base", "halt_base", "restart_reg";
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800703 interrupts = <0 162 1>;
Matt Wagantall6c515982013-01-29 14:58:43 -0800704 vdd_cx-supply = <&pm8110_s1_corner>;
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800705 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700706
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700707 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700708 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700709 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700710
711 /* GPIO output to lpass */
712 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800713 };
Siddartha Mohanadossf7d2f4d2013-03-11 22:10:15 -0700714
715 tsens: tsens@fc4a8000 {
716 compatible = "qcom,msm-tsens";
717 reg = <0xfc4a8000 0x2000>,
718 <0xfc4b8000 0x1000>;
719 reg-names = "tsens_physical", "tsens_eeprom_physical";
720 interrupts = <0 184 0>;
721 qcom,sensors = <2>;
722 qcom,slope = <2901 2846>;
Siddartha Mohanadossb2f48982013-03-28 13:51:38 -0700723 qcom,calib-mode = "fuse_map3";
Siddartha Mohanadossf7d2f4d2013-03-11 22:10:15 -0700724 qcom,calibration-less-mode;
Siddartha Mohanadoss0ca83312013-03-14 11:43:18 -0700725 qcom,tsens-local-init;
Siddartha Mohanadoss921f1f02013-04-04 16:30:03 -0700726 qcom,sensor-id = <0 5>;
Siddartha Mohanadossf7d2f4d2013-03-11 22:10:15 -0700727 };
728
Jennifer Liuf588d3a2013-04-05 10:11:48 -0700729 qcom,msm-thermal {
730 compatible = "qcom,msm-thermal";
731 qcom,sensor-id = <0>;
732 qcom,poll-ms = <250>;
733 qcom,limit-temp = <60>;
734 qcom,temp-hysteresis = <10>;
735 qcom,freq-step = <2>;
736 };
Jeff Hugoae4ab9f62013-04-08 13:43:08 -0600737
738 qcom,ipc-spinlock@fd484000 {
739 compatible = "qcom,ipc-spinlock-sfpb";
740 reg = <0xfd484000 0x400>;
741 qcom,num-locks = <8>;
742 };
Jeff Hugode2822a2013-04-08 14:09:38 -0600743
744 qcom,bam_dmux@fc834000 {
745 compatible = "qcom,bam_dmux";
746 reg = <0xfc834000 0x7000>;
747 interrupts = <0 29 1>;
748 };
Hariprasad Dhalinarasimha3a3e4e32013-04-14 16:18:30 -0700749
750 qcom,qseecom@7B00000 {
751 compatible = "qcom,qseecom";
752 reg = <0x7B00000 0x500000>;
753 reg-names = "secapp-region";
754 qcom,disk-encrypt-pipe-pair = <2>;
755 qcom,hlos-ce-hw-instance = <0>;
756 qcom,qsee-ce-hw-instance = <0>;
757 qcom,msm-bus,name = "qseecom-noc";
758 qcom,msm-bus,num-cases = <4>;
759 qcom,msm-bus,active-only = <0>;
760 qcom,msm-bus,num-paths = <1>;
761 qcom,msm-bus,vectors-KBps =
762 <55 512 0 0>,
763 <55 512 3936000 393600>,
764 <55 512 3936000 393600>,
765 <55 512 3936000 393600>;
766 };
Aparna Dase7cab2e2013-04-16 16:54:47 -0700767
Hariprasad Dhalinarasimhac8e0f312013-04-13 17:18:50 -0700768 qcom,msm-rng@f9bff000 {
769 compatible = "qcom,msm-rng";
770 reg = <0xf9bff000 0x200>;
771 qcom,msm-rng-iface-clk;
772 };
773
Aparna Das2948da92013-04-25 10:11:15 -0700774 qcom,msm-rtb {
775 compatible = "qcom,msm-rtb";
776 qcom,memory-reservation-type = "EBI1";
777 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
778 };
779
Aparna Dase7cab2e2013-04-16 16:54:47 -0700780 jtag_mm0: jtagmm@fc34c000 {
781 compatible = "qcom,jtag-mm";
782 reg = <0xfc34c000 0x1000>,
783 <0xfc340000 0x1000>;
784 reg-names = "etm-base","debug-base";
785 };
786
787 jtag_mm1: jtagmm@fc34d000 {
788 compatible = "qcom,jtag-mm";
789 reg = <0xfc34d000 0x1000>,
790 <0xfc342000 0x1000>;
791 reg-names = "etm-base","debug-base";
792 };
793
794 jtag_mm2: jtagmm@fc34e000 {
795 compatible = "qcom,jtag-mm";
796 reg = <0xfc34e000 0x1000>,
797 <0xfc344000 0x1000>;
798 reg-names = "etm-base","debug-base";
799 };
800
801 jtag_mm3: jtagmm@fc34f000 {
802 compatible = "qcom,jtag-mm";
803 reg = <0xfc34f000 0x1000>,
804 <0xfc346000 0x1000>;
805 reg-names = "etm-base","debug-base";
806 };
Hariprasad Dhalinarasimha9d3638a2013-04-13 22:42:11 -0700807
808 qcom,tz-log@fe805720 {
809 compatible = "qcom,tz-log";
810 reg = <0x0fe805720 0x1000>;
811 };
Syed Rameez Mustafad3935822012-10-09 11:23:20 -0700812};
David Collinsc6b34832012-10-24 12:57:57 -0700813
Matt Wagantall1bf56932012-11-29 15:03:29 -0800814&gdsc_vfe {
815 status = "ok";
816};
817
818&gdsc_oxili_cx {
819 status = "ok";
820};
821
Olav Haugan9c255522012-11-16 16:43:17 -0800822&lpass_iommu {
823 status = "ok";
824};
825
826&copss_iommu {
827 status = "ok";
828};
829
830&mdpe_iommu {
831 status = "ok";
832};
833
834&mdps_iommu {
835 status = "ok";
836};
837
838&gfx_iommu {
839 status = "ok";
840};
841
842&vfe_iommu {
843 status = "ok";
844};
845
Syed Rameez Mustafa3971c142013-01-09 19:04:53 -0800846/include/ "msm8610-iommu-domains.dtsi"
Olav Haugan4bc4b692012-12-10 18:29:35 -0800847
Xiaozhe Shi350baa92013-04-09 18:13:50 -0700848/include/ "msm-pm8110-rpm-regulator.dtsi"
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700849/include/ "msm-pm8110.dtsi"
Xiaozhe Shi1581a7b2013-02-21 15:17:57 -0800850/include/ "msm8610-regulator.dtsi"
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -0700851
852&pm8110_vadc {
853 chan@0 {
854 label = "usb_in";
855 reg = <0>;
856 qcom,decimation = <0>;
857 qcom,pre-div-channel-scaling = <4>;
858 qcom,calibration-type = "absolute";
859 qcom,scale-function = <0>;
860 qcom,hw-settle-time = <0>;
861 qcom,fast-avg-setup = <0>;
862 };
863
864 chan@2 {
865 label = "vchg_sns";
866 reg = <2>;
867 qcom,decimation = <0>;
Siddartha Mohanadoss478e5c92013-05-01 19:53:27 -0700868 qcom,pre-div-channel-scaling = <2>;
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -0700869 qcom,calibration-type = "absolute";
870 qcom,scale-function = <0>;
871 qcom,hw-settle-time = <0>;
872 qcom,fast-avg-setup = <0>;
873 };
874
875 chan@5 {
876 label = "vcoin";
877 reg = <5>;
878 qcom,decimation = <0>;
879 qcom,pre-div-channel-scaling = <1>;
880 qcom,calibration-type = "absolute";
881 qcom,scale-function = <0>;
882 qcom,hw-settle-time = <0>;
883 qcom,fast-avg-setup = <0>;
884 };
885
886 chan@6 {
887 label = "vbat_sns";
888 reg = <6>;
889 qcom,decimation = <0>;
890 qcom,pre-div-channel-scaling = <1>;
891 qcom,calibration-type = "absolute";
892 qcom,scale-function = <0>;
893 qcom,hw-settle-time = <0>;
894 qcom,fast-avg-setup = <0>;
895 };
896
897 chan@7 {
898 label = "vph_pwr";
899 reg = <7>;
900 qcom,decimation = <0>;
901 qcom,pre-div-channel-scaling = <1>;
902 qcom,calibration-type = "absolute";
903 qcom,scale-function = <0>;
904 qcom,hw-settle-time = <0>;
905 qcom,fast-avg-setup = <0>;
906 };
907
908 chan@30 {
909 label = "batt_therm";
910 reg = <0x30>;
911 qcom,decimation = <0>;
912 qcom,pre-div-channel-scaling = <0>;
913 qcom,calibration-type = "ratiometric";
914 qcom,scale-function = <1>;
915 qcom,hw-settle-time = <2>;
916 qcom,fast-avg-setup = <0>;
917 };
918
919 chan@31 {
920 label = "batt_id";
921 reg = <0x31>;
922 qcom,decimation = <0>;
923 qcom,pre-div-channel-scaling = <0>;
924 qcom,calibration-type = "ratiometric";
925 qcom,scale-function = <0>;
926 qcom,hw-settle-time = <2>;
927 qcom,fast-avg-setup = <0>;
928 };
929
930 chan@b2 {
931 label = "xo_therm_pu2";
932 reg = <0xb2>;
933 qcom,decimation = <0>;
934 qcom,pre-div-channel-scaling = <0>;
935 qcom,calibration-type = "ratiometric";
936 qcom,scale-function = <4>;
937 qcom,hw-settle-time = <2>;
938 qcom,fast-avg-setup = <0>;
939 };
940};
941
942