blob: 86e6b6e93e91dd01f5fa50919649eb981d82160a [file] [log] [blame]
Syed Rameez Mustafa3971c142013-01-09 19:04:53 -08001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafad3935822012-10-09 11:23:20 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Olav Haugan54166782013-01-28 16:59:51 -080014/include/ "msm-iommu-v0.dtsi"
Syed Rameez Mustafa3971c142013-01-09 19:04:53 -080015/include/ "msm8610-ion.dtsi"
Lokesh Batra8d55eec2013-02-26 11:31:21 -080016/include/ "msm8610-gpu.dtsi"
Matt Wagantall1bf56932012-11-29 15:03:29 -080017/include/ "msm-gdsc.dtsi"
Aparna Dasd16555b2013-03-06 15:46:38 -080018/include/ "msm8610-coresight.dtsi"
Praveen Chidambarama1f98282012-11-29 09:56:57 -070019/include/ "msm8610-pm.dtsi"
Jeff Hugo53dcf0f2013-03-20 12:37:50 -060020/include/ "msm8610-smp2p.dtsi"
Gagan Macbced3872013-02-04 19:18:04 -070021/include/ "msm8610-bus.dtsi"
Xiaoming Zhou5f37a252013-04-09 21:11:50 -040022/include/ "msm8610-mdss.dtsi"
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070023
24/ {
Syed Rameez Mustafa3971c142013-01-09 19:04:53 -080025 model = "Qualcomm MSM 8610";
26 compatible = "qcom,msm8610";
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070027 interrupt-parent = <&intc>;
28
29 intc: interrupt-controller@f9000000 {
30 compatible = "qcom,msm-qgic2";
31 interrupt-controller;
32 #interrupt-cells = <3>;
33 reg = <0xf9000000 0x1000>,
34 <0xf9002000 0x1000>;
35 };
36
37 msmgpio: gpio@fd510000 {
38 compatible = "qcom,msm-gpio";
39 interrupt-controller;
40 #interrupt-cells = <2>;
41 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -080042 gpio-controller;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070043 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -080044 ngpio = <102>;
Rohit Vaswanid2001522012-12-05 19:23:44 -080045 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -080046 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070047 };
48
Laura Abbott429e82b2013-03-25 13:03:06 -070049 memory {
50
51 qsecom_mem: qsecom_region {
52 linux,contiguous-region;
53 reg = <0 0x100000>;
54 label = "qsecom_mem";
55 };
56
57 };
58
Gilad Avidovf58f1832013-01-09 17:31:28 -070059 aliases {
60 spi0 = &spi_0;
Venkat Gopalakrishnana6ce5f22013-04-04 14:24:57 -070061 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
62 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Gilad Avidovf58f1832013-01-09 17:31:28 -070063 };
64
Syed Rameez Mustafafd9ac032012-10-10 17:52:07 -070065 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -080066 compatible = "arm,armv7-timer";
Syed Rameez Mustafafd9ac032012-10-10 17:52:07 -070067 interrupts = <1 2 0 1 3 0>;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070068 clock-frequency = <19200000>;
69 };
70
Stephen Boyda61ac642013-04-10 14:20:27 -070071 timer@f9020000 {
72 #address-cells = <1>;
73 #size-cells = <1>;
74 ranges;
75 compatible = "arm,armv7-timer-mem";
76 reg = <0xf9020000 0x1000>;
77 clock-frequency = <19200000>;
78
79 frame@f9021000 {
80 frame-number = <0>;
81 interrupts = <0 8 0x4>,
82 <0 7 0x4>;
83 reg = <0xf9021000 0x1000>,
84 <0xf9022000 0x1000>;
85 };
86
87 frame@f9023000 {
88 frame-number = <1>;
89 interrupts = <0 9 0x4>;
90 reg = <0xf9023000 0x1000>;
91 status = "disabled";
92 };
93
94 frame@f9024000 {
95 frame-number = <2>;
96 interrupts = <0 10 0x4>;
97 reg = <0xf9024000 0x1000>;
98 status = "disabled";
99 };
100
101 frame@f9025000 {
102 frame-number = <3>;
103 interrupts = <0 11 0x4>;
104 reg = <0xf9025000 0x1000>;
105 status = "disabled";
106 };
107
108 frame@f9026000 {
109 frame-number = <4>;
110 interrupts = <0 12 0x4>;
111 reg = <0xf9026000 0x1000>;
112 status = "disabled";
113 };
114
115 frame@f9027000 {
116 frame-number = <5>;
117 interrupts = <0 13 0x4>;
118 reg = <0xf9027000 0x1000>;
119 status = "disabled";
120 };
121
122 frame@f9028000 {
123 frame-number = <6>;
124 interrupts = <0 14 0x4>;
125 reg = <0xf9028000 0x1000>;
126 status = "disabled";
127 };
128 };
129
Arun Menon2a7e3772013-01-17 12:06:59 -0800130 qcom,msm-adsp-loader {
131 compatible = "qcom,adsp-loader";
132 qcom,adsp-state = <0>;
133 };
134
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800135 qcom,msm-imem@fe805000 {
136 compatible = "qcom,msm-imem";
137 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
138 };
139
Syed Rameez Mustafad3935822012-10-09 11:23:20 -0700140 serial@f991f000 {
141 compatible = "qcom,msm-lsuart-v14";
142 reg = <0xf991f000 0x1000>;
143 interrupts = <0 109 0>;
144 status = "disabled";
145 };
Mayank Rana55db0cb2012-10-15 16:50:06 +0530146
Hanumant Singh6b346712013-04-09 16:26:09 -0700147 serial@f991e000 {
148 compatible = "qcom,msm-lsuart-v14";
149 reg = <0xf991e000 0x1000>;
150 interrupts = <0 108 0>;
151 status = "disabled";
152 };
153
Arun Menon8e25dd42013-01-11 14:11:54 -0800154 qcom,vidc@fdc00000 {
155 compatible = "qcom,msm-vidc";
Sachin Shah4e1c8fe2013-03-20 15:10:05 -0700156 qcom,vidc-ns-map = <0x40000000 0x40000000>;
157 qcom,iommu-groups = <&q6_domain_ns>;
158 qcom,iommu-group-buffer-types = <0xfff>;
159 qcom,buffer-type-tz-usage-map = <0x1 0x1>,
160 <0x1fe 0x2>;
161 qcom,hfi = "q6";
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700162 qcom,max-hw-load = <97200>; /* FWVGA @ 30 * 2 */
Arun Menon8e25dd42013-01-11 14:11:54 -0800163 };
164
Vamsi Krishna872fbbc2013-04-09 18:04:52 -0700165 qcom,usbbam@f9a44000 {
166 compatible = "qcom,usb-bam-msm";
167 reg = <0xf9a44000 0x11000>;
168 reg-names = "hsusb";
169 interrupts = <0 135 0>;
170 interrupt-names = "hsusb";
171 qcom,usb-bam-num-pipes = <16>;
172 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
173 qcom,ignore-core-reset-ack;
174 qcom,disable-clk-gating;
175
176 qcom,pipe0 {
177 label = "hsusb-qdss-in-0";
178 qcom,usb-bam-mem-type = <3>;
179 qcom,bam-type = <1>;
180 qcom,dir = <1>;
181 qcom,pipe-num = <0>;
182 qcom,peer-bam = <1>;
183 qcom,src-bam-physical-address = <0xfc37c000>;
184 qcom,src-bam-pipe-index = <0>;
185 qcom,dst-bam-physical-address = <0xf9a44000>;
186 qcom,dst-bam-pipe-index = <2>;
187 qcom,data-fifo-offset = <0x0>;
188 qcom,data-fifo-size = <0x600>;
189 qcom,descriptor-fifo-offset = <0x600>;
190 qcom,descriptor-fifo-size = <0x200>;
191 };
192 };
193
Mayank Rana55db0cb2012-10-15 16:50:06 +0530194 usb@f9a55000 {
195 compatible = "qcom,hsusb-otg";
196 reg = <0xf9a55000 0x400>;
Mayank Rana33d26662013-01-17 10:22:25 +0530197 interrupts = <0 134 0>, <0 140 0>;
198 interrupt-names = "core_irq", "async_irq";
Mayank Rana76c6ce22012-11-07 17:07:58 +0530199 HSUSB_VDDCX-supply = <&pm8110_s1>;
200 HSUSB_1p8-supply = <&pm8110_l10>;
201 HSUSB_3p3-supply = <&pm8110_l20>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530202
203 qcom,hsusb-otg-phy-type = <2>;
204 qcom,hsusb-otg-mode = <1>;
Mayank Rana29bb9f22013-04-04 18:25:12 +0530205 qcom,hsusb-otg-otg-control = <2>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530206 qcom,hsusb-otg-disable-reset;
Mayank Ranaa5491122013-04-04 18:32:25 +0530207 qcom,dp-manual-pullup;
Mayank Ranaf9295802013-04-04 18:36:44 +0530208
209 qcom,msm-bus,name = "usb2";
210 qcom,msm-bus,num-cases = <2>;
211 qcom,msm-bus,active-only = <0>;
212 qcom,msm-bus,num-paths = <1>;
213 qcom,msm-bus,vectors-KBps =
214 <87 512 0 0>,
215 <87 512 60000 960000>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530216 };
217
Mayank Ranacc0c5452013-01-29 16:41:53 +0530218 android_usb@fe8050c8 {
Mayank Rana55db0cb2012-10-15 16:50:06 +0530219 compatible = "qcom,android-usb";
Mayank Ranacc0c5452013-01-29 16:41:53 +0530220 reg = <0xfe8050c8 0xc8>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530221 };
222
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700223 sdcc1: qcom,sdcc@f9824000 {
224 cell-index = <1>; /* SDC1 eMMC slot */
225 compatible = "qcom,msm-sdcc";
Oluwafemi Adeyemi4641e7f2012-11-28 16:12:56 -0800226 reg = <0xf9824000 0x800>,
227 <0xf9824800 0x100>,
228 <0xf9804000 0x7000>;
229 reg-names = "core_mem", "dml_mem", "bam_mem";
230 interrupts = <0 123 0>, <0 137 0>;
231 interrupt-names = "core_irq", "bam_irq";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700232
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700233 vdd-supply = <&pm8110_l17>;
234 qcom,vdd-always-on;
235 qcom,vdd-lpm-sup;
236 qcom,vdd-voltage-level = <2900000 2900000>;
237 qcom,vdd-current-level = <9000 400000>;
238
239 vdd-io-supply = <&pm8110_l6>;
240 qcom,vdd-io-always-on;
241 qcom,vdd-io-lpm-sup;
242 qcom,vdd-io-voltage-level = <1800000 1800000>;
243 qcom,vdd-io-current-level = <9000 60000>;
244
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700245 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
246 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
Krishna Konda6c5d0f42013-04-12 16:44:26 -0700247 qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700248 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700249
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700250 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700251 qcom,sup-voltages = <2900 2900>;
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700252 qcom,bus-width = <8>;
253 qcom,nonremovable;
254 qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
Venkat Gopalakrishnan587b2252013-04-05 12:16:50 -0700255
256 status = "disabled";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700257 };
258
259 sdcc2: qcom,sdcc@f98a4000 {
260 cell-index = <2>; /* SDC2 SD card slot */
261 compatible = "qcom,msm-sdcc";
Oluwafemi Adeyemi4641e7f2012-11-28 16:12:56 -0800262 reg = <0xf98a4000 0x800>,
263 <0xf98a4800 0x100>,
264 <0xf9884000 0x7000>;
265 reg-names = "core_mem", "dml_mem", "bam_mem";
266 interrupts = <0 125 0>, <0 220 0>;
267 interrupt-names = "core_irq", "bam_irq";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700268
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700269 vdd-supply = <&pm8110_l18>;
270 qcom,vdd-voltage-level = <2950000 2950000>;
271 qcom,vdd-current-level = <9000 400000>;
272
273 vdd-io-supply = <&pm8110_l21>;
274 qcom,vdd-io-voltage-level = <1800000 2950000>;
275 qcom,vdd-io-current-level = <9000 50000>;
276
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700277 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
278 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
Krishna Konda6c5d0f42013-04-12 16:44:26 -0700279 qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700280 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700281
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700282 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
283 qcom,sup-voltages = <2950 2950>;
284 qcom,bus-width = <4>;
285 qcom,xpc;
286 qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
287 qcom,current-limit = <800>;
Venkat Gopalakrishnan587b2252013-04-05 12:16:50 -0700288
289 status = "disabled";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700290 };
291
Venkat Gopalakrishnana6ce5f22013-04-04 14:24:57 -0700292 sdhc_1: sdhci@f9824900 {
293 compatible = "qcom,sdhci-msm";
294 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
295 reg-names = "hc_mem", "core_mem";
296
297 interrupts = <0 123 0>, <0 138 0>;
298 interrupt-names = "hc_irq", "pwr_irq";
299
300 qcom,bus-width = <8>;
301 status = "disabled";
302 };
303
304 sdhc_2: sdhci@f98a4900 {
305 compatible = "qcom,sdhci-msm";
306 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
307 reg-names = "hc_mem", "core_mem";
308
309 interrupts = <0 125 0>, <0 221 0>;
310 interrupt-names = "hc_irq", "pwr_irq";
311
312 qcom,bus-width = <4>;
313 status = "disabled";
314 };
315
Yan He6c7304c2012-11-09 22:07:08 -0800316 qcom,sps {
317 compatible = "qcom,msm_sps";
318 qcom,device-type = <3>;
319 };
320
Jeff Hugo4e20fda2013-04-10 12:40:19 -0600321 qcom,smem@d900000 {
Jeff Hugo818d0f72012-11-05 14:19:28 -0700322 compatible = "qcom,smem";
Jeff Hugoe1e30e72013-04-08 14:15:34 -0600323 reg = <0xd900000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800324 <0xf9011000 0x1000>,
Jeff Hugo818d0f72012-11-05 14:19:28 -0700325 <0xfc428000 0x4000>;
326 reg-names = "smem", "irq-reg-base", "aux-mem1";
327
328 qcom,smd-modem {
329 compatible = "qcom,smd";
330 qcom,smd-edge = <0>;
331 qcom,smd-irq-offset = <0x8>;
332 qcom,smd-irq-bitmask = <0x1000>;
333 qcom,pil-string = "modem";
334 interrupts = <0 25 1>;
335 };
336
337 qcom,smsm-modem {
338 compatible = "qcom,smsm";
339 qcom,smsm-edge = <0>;
340 qcom,smsm-irq-offset = <0x8>;
341 qcom,smsm-irq-bitmask = <0x2000>;
342 interrupts = <0 26 1>;
343 };
344
345 qcom,smd-adsp {
346 compatible = "qcom,smd";
347 qcom,smd-edge = <1>;
348 qcom,smd-irq-offset = <0x8>;
349 qcom,smd-irq-bitmask = <0x100>;
350 qcom,pil-string = "adsp";
351 interrupts = <0 156 1>;
352 };
353
354 qcom,smsm-adsp {
355 compatible = "qcom,smsm";
356 qcom,smsm-edge = <1>;
357 qcom,smsm-irq-offset = <0x8>;
358 qcom,smsm-irq-bitmask = <0x200>;
359 interrupts = <0 157 1>;
360 };
361
362 qcom,smd-wcnss {
363 compatible = "qcom,smd";
364 qcom,smd-edge = <6>;
365 qcom,smd-irq-offset = <0x8>;
366 qcom,smd-irq-bitmask = <0x20000>;
367 qcom,pil-string = "wcnss";
368 interrupts = <0 142 1>;
369 };
370
371 qcom,smsm-wcnss {
372 compatible = "qcom,smsm";
373 qcom,smsm-edge = <6>;
374 qcom,smsm-irq-offset = <0x8>;
375 qcom,smsm-irq-bitmask = <0x80000>;
376 interrupts = <0 144 1>;
377 };
378
379 qcom,smd-rpm {
380 compatible = "qcom,smd";
381 qcom,smd-edge = <15>;
382 qcom,smd-irq-offset = <0x8>;
383 qcom,smd-irq-bitmask = <0x1>;
384 interrupts = <0 168 1>;
385 qcom,irq-no-suspend;
386 };
David Ng5a3cb232012-12-03 16:42:53 -0800387 };
Hanumant Singh4e334c82012-11-14 10:16:39 -0800388
Praveen Chidambarama1f98282012-11-29 09:56:57 -0700389 rpm_bus: qcom,rpm-smd {
390 compatible = "qcom,rpm-smd";
391 rpm-channel-name = "rpm_requests";
392 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Priyanka Mathur6e993c92013-03-20 11:17:27 -0700393 rpm-standalone;
Praveen Chidambarama1f98282012-11-29 09:56:57 -0700394 };
395
Olav Haugan8340d932013-01-25 12:03:11 -0800396 qcom,msm-mem-hole {
397 compatible = "qcom,msm-mem-hole";
Olav Hauganfcc860e2013-04-06 10:56:06 -0700398 qcom,memblock-remove = <0x07B00000 0x6400000>; /* Address and Size of Hole */
Olav Haugan8340d932013-01-25 12:03:11 -0800399 };
400
Hanumant Singh4e334c82012-11-14 10:16:39 -0800401 qcom,wdt@f9017000 {
402 compatible = "qcom,msm-watchdog";
403 reg = <0xf9017000 0x1000>;
404 interrupts = <0 3 0>, <0 4 0>;
405 qcom,bark-time = <11000>;
406 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800407 qcom,ipi-ping;
Jeff Hugo818d0f72012-11-05 14:19:28 -0700408 };
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700409
Vikram Mulukutlaa3cebff2013-01-28 13:54:54 -0800410 qcom,acpuclk@f9011050 {
411 compatible = "qcom,acpuclk-a7";
412 reg = <0xf9011050 0x8>;
413 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700414 a7_cpu-supply = <&apc_vreg_corner>;
Vikram Mulukutlaa3cebff2013-01-28 13:54:54 -0800415 };
416
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700417 spmi_bus: qcom,spmi@fc4c0000 {
418 cell-index = <0>;
419 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700420 reg-names = "core", "intr", "cnfg";
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700421 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700422 <0Xfc4cb000 0x1000>,
423 <0Xfc4ca000 0x1000>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700424 /* 190,ee0_krait_hlos_spmi_periph_irq */
425 /* 187,channel_0_krait_hlos_trans_done_irq */
426 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700427 qcom,pmic-arb-ee = <0>;
428 qcom,pmic-arb-channel = <0>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700429 };
430
Gilad Avidovf84f2792013-01-31 13:26:39 -0700431 i2c@f9925000 { /* BLSP-1 QUP-3 */
432 cell-index = <0>;
433 compatible = "qcom,i2c-qup";
434 #address-cells = <1>;
435 #size-cells = <0>;
436 reg-names = "qup_phys_addr";
437 reg = <0xf9925000 0x1000>;
438 interrupt-names = "qup_err_intr";
439 interrupts = <0 97 0>;
440 qcom,i2c-bus-freq = <100000>;
441 };
442
Kenneth Heitke0d4fbb12013-04-10 12:51:14 -0600443 i2c@f9928000 { /* BLSP1 QUP6 */
444 cell-index = <6>;
445 compatible = "qcom,i2c-qup";
446 #address-cells = <1>;
447 #size-cells = <0>;
448 reg-names = "qup_phys_addr";
449 reg = <0xf9928000 0x1000>;
450 interrupt-names = "qup_err_intr";
451 interrupts = <0 100 0>;
452 qcom,i2c-bus-freq = <100000>;
453 qcom,i2c-src-freq = <19200000>;
454 qcom,sda-gpio = <&msmgpio 16 0>;
455 qcom,scl-gpio = <&msmgpio 17 0>;
456 };
Gilad Avidovf58f1832013-01-09 17:31:28 -0700457
458 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
459 compatible = "qcom,spi-qup-v2";
460 #address-cells = <1>;
461 #size-cells = <0>;
462 reg-names = "spi_physical", "spi_bam_physical";
463 reg = <0xf9923000 0x1000>,
464 <0xf9904000 0xF000>;
465 interrupt-names = "spi_irq", "spi_bam_irq";
466 interrupts = <0 95 0>, <0 238 0>;
467 spi-max-frequency = <19200000>;
468
469 gpios = <&msmgpio 3 0>, /* CLK */
470 <&msmgpio 1 0>, /* MISO */
471 <&msmgpio 0 0>; /* MOSI */
472 cs-gpios = <&msmgpio 2 0>;
473
474 qcom,infinite-mode = <0>;
475 qcom,use-bam;
476 qcom,ver-reg-exists;
477 qcom,bam-consumer-pipe-index = <12>;
478 qcom,bam-producer-pipe-index = <13>;
479 };
480
Vikram Mulukutla1ac32fd2013-01-28 10:03:58 -0800481 qcom,pronto@fb21b000 {
482 compatible = "qcom,pil-pronto";
483 reg = <0xfb21b000 0x3000>,
484 <0xfc401700 0x4>,
485 <0xfd485300 0xc>;
486 reg-names = "pmu_base", "clk_base", "halt_base";
487 interrupts = <0 149 1>;
488 vdd_pronto_pll-supply = <&pm8110_l10>;
489
490 qcom,firmware-name = "wcnss";
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700491
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700492 /* GPIO inputs from wcnss */
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700493 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700494 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700495
496 /* GPIO output to wcnss */
497 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Vikram Mulukutla1ac32fd2013-01-28 10:03:58 -0800498 };
499
Sameer Thalappil1b65cd02013-04-03 16:42:34 -0700500 qcom,iris-fm {
501 compatible = "qcom,iris_fm";
502 };
503
Fred Oh92b18a02013-01-22 13:29:41 -0800504 sound {
505 compatible = "qcom,msm8x10-audio-codec";
506 qcom,model = "msm8x10-snd-card";
507 };
508
509 qcom,msm-pcm {
510 compatible = "qcom,msm-pcm-dsp";
511 };
512
Mingming Yin8b92f9b2013-05-01 14:10:26 -0700513 qcom,msm-pcm-low-latency {
514 compatible = "qcom,msm-pcm-dsp";
515 qcom,msm-pcm-dsp-id = <1>;
516 qcom,msm-pcm-low-latency;
517 };
518
Fred Oh92b18a02013-01-22 13:29:41 -0800519 qcom,msm-pcm-routing {
520 compatible = "qcom,msm-pcm-routing";
521 };
522
523 qcom,msm-pcm-lpa {
524 compatible = "qcom,msm-pcm-lpa";
525 };
526
527 qcom,msm-compr-dsp {
528 compatible = "qcom,msm-compr-dsp";
529 };
530
531 qcom,msm-voip-dsp {
532 compatible = "qcom,msm-voip-dsp";
533 };
534
535 qcom,msm-pcm-voice {
536 compatible = "qcom,msm-pcm-voice";
537 };
538
539 qcom,msm-stub-codec {
540 compatible = "qcom,msm-stub-codec";
541 };
542
543 qcom,msm-dai-fe {
544 compatible = "qcom,msm-dai-fe";
545 };
546
547 qcom,msm-pcm-afe {
548 compatible = "qcom,msm-pcm-afe";
549 };
550
551 qcom,msm-dai-mi2s {
552 compatible = "qcom,msm-dai-mi2s";
553 qcom,msm-dai-q6-mi2s-prim {
554 compatible = "qcom,msm-dai-q6-mi2s";
555 qcom,msm-dai-q6-mi2s-dev-id = <0>;
556 qcom,msm-mi2s-rx-lines = <1>;
557 qcom,msm-mi2s-tx-lines = <0>;
558 };
559
560 qcom,msm-dai-q6-mi2s-sec {
561 compatible = "qcom,msm-dai-q6-mi2s";
562 qcom,msm-dai-q6-mi2s-dev-id = <1>;
563 qcom,msm-mi2s-rx-lines = <0>;
564 qcom,msm-mi2s-tx-lines = <3>;
565 };
566 };
567
568 qcom,msm-dai-q6 {
569 compatible = "qcom,msm-dai-q6";
570 qcom,msm-dai-q6-bt-sco-rx {
571 compatible = "qcom,msm-dai-q6-dev";
572 qcom,msm-dai-q6-dev-id = <12288>;
573 };
574
575 qcom,msm-dai-q6-bt-sco-tx {
576 compatible = "qcom,msm-dai-q6-dev";
577 qcom,msm-dai-q6-dev-id = <12289>;
578 };
579
580 qcom,msm-dai-q6-int-fm-rx {
581 compatible = "qcom,msm-dai-q6-dev";
582 qcom,msm-dai-q6-dev-id = <12292>;
583 };
584
585 qcom,msm-dai-q6-int-fm-tx {
586 compatible = "qcom,msm-dai-q6-dev";
587 qcom,msm-dai-q6-dev-id = <12293>;
588 };
589
590 qcom,msm-dai-q6-be-afe-pcm-rx {
591 compatible = "qcom,msm-dai-q6-dev";
592 qcom,msm-dai-q6-dev-id = <224>;
593 };
594
595 qcom,msm-dai-q6-be-afe-pcm-tx {
596 compatible = "qcom,msm-dai-q6-dev";
597 qcom,msm-dai-q6-dev-id = <225>;
598 };
599
600 qcom,msm-dai-q6-afe-proxy-rx {
601 compatible = "qcom,msm-dai-q6-dev";
602 qcom,msm-dai-q6-dev-id = <241>;
603 };
604
605 qcom,msm-dai-q6-afe-proxy-tx {
606 compatible = "qcom,msm-dai-q6-dev";
607 qcom,msm-dai-q6-dev-id = <240>;
608 };
609 };
610
611 qcom,msm-pcm-hostless {
612 compatible = "qcom,msm-pcm-hostless";
613 };
614
Sameer Thalappil3928fef2013-04-08 11:51:15 -0700615 qcom,wcnss-wlan@fb000000 {
616 compatible = "qcom,wcnss_wlan";
Sameer Thalappilb2b93672013-04-18 17:00:46 -0700617 reg = <0xfb000000 0x280000>,
618 <0xf9011008 0x04>;
619 reg-names = "wcnss_mmio", "wcnss_fiq";
Sameer Thalappil3928fef2013-04-08 11:51:15 -0700620 interrupts = <0 145 0>, <0 146 0>;
621 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
622
623 qcom,pronto-vddmx-supply = <&pm8110_l3>;
624 qcom,pronto-vddcx-supply = <&pm8110_s1>;
625 qcom,pronto-vddpx-supply = <&pm8110_l6>;
626 qcom,iris-vddxo-supply = <&pm8110_l10>;
627 qcom,iris-vddrfa-supply = <&pm8110_l5>;
628 qcom,iris-vddpa-supply = <&pm8110_l16>;
629 qcom,iris-vdddig-supply = <&pm8110_l5>;
630
631 gpios = <&msmgpio 23 0>, <&msmgpio 24 0>, <&msmgpio 25 0>, <&msmgpio 26 0>, <&msmgpio 27 0>;
632 qcom,has_pronto_hw;
633 };
634
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800635 qcom,mss@fc880000 {
636 compatible = "qcom,pil-q6v5-mss";
637 reg = <0xfc880000 0x100>,
638 <0xfd485000 0x400>,
639 <0xfc820000 0x020>,
640 <0xfc401680 0x004>,
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800641 <0xfd485194 0x4>;
642 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700643 "restart_reg", "cxrail_bhs_reg";
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800644
645 interrupts = <0 24 1>;
646 vdd_mss-supply = <&pm8110_s1>;
647 vdd_cx-supply = <&pm8110_s1_corner>;
648 vdd_mx-supply = <&pm8110_l3>;
649 vdd_pll-supply = <&pm8110_l10>;
650 qcom,vdd_pll = <1800000>;
651 qcom,is-loadable;
652 qcom,firmware-name = "mba";
653 qcom,pil-self-auth;
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700654
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800655 /* GPIO inputs from mss */
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700656 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800657 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700658
659 /* GPIO output to mss */
660 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800661 };
662
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800663 qcom,lpass@fe200000 {
664 compatible = "qcom,pil-q6v5-lpass";
665 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800666 <0xfd485100 0x00010>,
667 <0xfc4016c0 0x00004>;
668 reg-names = "qdsp6_base", "halt_base", "restart_reg";
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800669 interrupts = <0 162 1>;
Matt Wagantall6c515982013-01-29 14:58:43 -0800670 vdd_cx-supply = <&pm8110_s1_corner>;
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800671 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700672
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700673 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700674 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700675 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700676
677 /* GPIO output to lpass */
678 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800679 };
Siddartha Mohanadossf7d2f4d2013-03-11 22:10:15 -0700680
681 tsens: tsens@fc4a8000 {
682 compatible = "qcom,msm-tsens";
683 reg = <0xfc4a8000 0x2000>,
684 <0xfc4b8000 0x1000>;
685 reg-names = "tsens_physical", "tsens_eeprom_physical";
686 interrupts = <0 184 0>;
687 qcom,sensors = <2>;
688 qcom,slope = <2901 2846>;
Siddartha Mohanadossb2f48982013-03-28 13:51:38 -0700689 qcom,calib-mode = "fuse_map3";
Siddartha Mohanadossf7d2f4d2013-03-11 22:10:15 -0700690 qcom,calibration-less-mode;
Siddartha Mohanadoss0ca83312013-03-14 11:43:18 -0700691 qcom,tsens-local-init;
Siddartha Mohanadoss921f1f02013-04-04 16:30:03 -0700692 qcom,sensor-id = <0 5>;
Siddartha Mohanadossf7d2f4d2013-03-11 22:10:15 -0700693 };
694
Jennifer Liuf588d3a2013-04-05 10:11:48 -0700695 qcom,msm-thermal {
696 compatible = "qcom,msm-thermal";
697 qcom,sensor-id = <0>;
698 qcom,poll-ms = <250>;
699 qcom,limit-temp = <60>;
700 qcom,temp-hysteresis = <10>;
701 qcom,freq-step = <2>;
702 };
Jeff Hugoae4ab9f62013-04-08 13:43:08 -0600703
704 qcom,ipc-spinlock@fd484000 {
705 compatible = "qcom,ipc-spinlock-sfpb";
706 reg = <0xfd484000 0x400>;
707 qcom,num-locks = <8>;
708 };
Jeff Hugode2822a2013-04-08 14:09:38 -0600709
710 qcom,bam_dmux@fc834000 {
711 compatible = "qcom,bam_dmux";
712 reg = <0xfc834000 0x7000>;
713 interrupts = <0 29 1>;
714 };
Hariprasad Dhalinarasimha3a3e4e32013-04-14 16:18:30 -0700715
716 qcom,qseecom@7B00000 {
717 compatible = "qcom,qseecom";
718 reg = <0x7B00000 0x500000>;
719 reg-names = "secapp-region";
720 qcom,disk-encrypt-pipe-pair = <2>;
721 qcom,hlos-ce-hw-instance = <0>;
722 qcom,qsee-ce-hw-instance = <0>;
723 qcom,msm-bus,name = "qseecom-noc";
724 qcom,msm-bus,num-cases = <4>;
725 qcom,msm-bus,active-only = <0>;
726 qcom,msm-bus,num-paths = <1>;
727 qcom,msm-bus,vectors-KBps =
728 <55 512 0 0>,
729 <55 512 3936000 393600>,
730 <55 512 3936000 393600>,
731 <55 512 3936000 393600>;
732 };
Aparna Dase7cab2e2013-04-16 16:54:47 -0700733
Hariprasad Dhalinarasimhac8e0f312013-04-13 17:18:50 -0700734 qcom,msm-rng@f9bff000 {
735 compatible = "qcom,msm-rng";
736 reg = <0xf9bff000 0x200>;
737 qcom,msm-rng-iface-clk;
738 };
739
Aparna Dase7cab2e2013-04-16 16:54:47 -0700740 jtag_mm0: jtagmm@fc34c000 {
741 compatible = "qcom,jtag-mm";
742 reg = <0xfc34c000 0x1000>,
743 <0xfc340000 0x1000>;
744 reg-names = "etm-base","debug-base";
745 };
746
747 jtag_mm1: jtagmm@fc34d000 {
748 compatible = "qcom,jtag-mm";
749 reg = <0xfc34d000 0x1000>,
750 <0xfc342000 0x1000>;
751 reg-names = "etm-base","debug-base";
752 };
753
754 jtag_mm2: jtagmm@fc34e000 {
755 compatible = "qcom,jtag-mm";
756 reg = <0xfc34e000 0x1000>,
757 <0xfc344000 0x1000>;
758 reg-names = "etm-base","debug-base";
759 };
760
761 jtag_mm3: jtagmm@fc34f000 {
762 compatible = "qcom,jtag-mm";
763 reg = <0xfc34f000 0x1000>,
764 <0xfc346000 0x1000>;
765 reg-names = "etm-base","debug-base";
766 };
Hariprasad Dhalinarasimha9d3638a2013-04-13 22:42:11 -0700767
768 qcom,tz-log@fe805720 {
769 compatible = "qcom,tz-log";
770 reg = <0x0fe805720 0x1000>;
771 };
Syed Rameez Mustafad3935822012-10-09 11:23:20 -0700772};
David Collinsc6b34832012-10-24 12:57:57 -0700773
Matt Wagantall1bf56932012-11-29 15:03:29 -0800774&gdsc_vfe {
775 status = "ok";
776};
777
778&gdsc_oxili_cx {
779 status = "ok";
780};
781
Olav Haugan9c255522012-11-16 16:43:17 -0800782&lpass_iommu {
783 status = "ok";
784};
785
786&copss_iommu {
787 status = "ok";
788};
789
790&mdpe_iommu {
791 status = "ok";
792};
793
794&mdps_iommu {
795 status = "ok";
796};
797
798&gfx_iommu {
799 status = "ok";
800};
801
802&vfe_iommu {
803 status = "ok";
804};
805
Syed Rameez Mustafa3971c142013-01-09 19:04:53 -0800806/include/ "msm8610-iommu-domains.dtsi"
Olav Haugan4bc4b692012-12-10 18:29:35 -0800807
Xiaozhe Shi350baa92013-04-09 18:13:50 -0700808/include/ "msm-pm8110-rpm-regulator.dtsi"
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700809/include/ "msm-pm8110.dtsi"
Xiaozhe Shi1581a7b2013-02-21 15:17:57 -0800810/include/ "msm8610-regulator.dtsi"
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -0700811
812&pm8110_vadc {
813 chan@0 {
814 label = "usb_in";
815 reg = <0>;
816 qcom,decimation = <0>;
817 qcom,pre-div-channel-scaling = <4>;
818 qcom,calibration-type = "absolute";
819 qcom,scale-function = <0>;
820 qcom,hw-settle-time = <0>;
821 qcom,fast-avg-setup = <0>;
822 };
823
824 chan@2 {
825 label = "vchg_sns";
826 reg = <2>;
827 qcom,decimation = <0>;
828 qcom,pre-div-channel-scaling = <3>;
829 qcom,calibration-type = "absolute";
830 qcom,scale-function = <0>;
831 qcom,hw-settle-time = <0>;
832 qcom,fast-avg-setup = <0>;
833 };
834
835 chan@5 {
836 label = "vcoin";
837 reg = <5>;
838 qcom,decimation = <0>;
839 qcom,pre-div-channel-scaling = <1>;
840 qcom,calibration-type = "absolute";
841 qcom,scale-function = <0>;
842 qcom,hw-settle-time = <0>;
843 qcom,fast-avg-setup = <0>;
844 };
845
846 chan@6 {
847 label = "vbat_sns";
848 reg = <6>;
849 qcom,decimation = <0>;
850 qcom,pre-div-channel-scaling = <1>;
851 qcom,calibration-type = "absolute";
852 qcom,scale-function = <0>;
853 qcom,hw-settle-time = <0>;
854 qcom,fast-avg-setup = <0>;
855 };
856
857 chan@7 {
858 label = "vph_pwr";
859 reg = <7>;
860 qcom,decimation = <0>;
861 qcom,pre-div-channel-scaling = <1>;
862 qcom,calibration-type = "absolute";
863 qcom,scale-function = <0>;
864 qcom,hw-settle-time = <0>;
865 qcom,fast-avg-setup = <0>;
866 };
867
868 chan@30 {
869 label = "batt_therm";
870 reg = <0x30>;
871 qcom,decimation = <0>;
872 qcom,pre-div-channel-scaling = <0>;
873 qcom,calibration-type = "ratiometric";
874 qcom,scale-function = <1>;
875 qcom,hw-settle-time = <2>;
876 qcom,fast-avg-setup = <0>;
877 };
878
879 chan@31 {
880 label = "batt_id";
881 reg = <0x31>;
882 qcom,decimation = <0>;
883 qcom,pre-div-channel-scaling = <0>;
884 qcom,calibration-type = "ratiometric";
885 qcom,scale-function = <0>;
886 qcom,hw-settle-time = <2>;
887 qcom,fast-avg-setup = <0>;
888 };
889
890 chan@b2 {
891 label = "xo_therm_pu2";
892 reg = <0xb2>;
893 qcom,decimation = <0>;
894 qcom,pre-div-channel-scaling = <0>;
895 qcom,calibration-type = "ratiometric";
896 qcom,scale-function = <4>;
897 qcom,hw-settle-time = <2>;
898 qcom,fast-avg-setup = <0>;
899 };
900};
901
902