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gerrit-public.fairphone.software / platform / external / XNNPACK / ac014d79c35e9b4811ee835ebfdfdc2cbc5220d7 / . / BUILD.bazel
blob: a5694aa70efe5005504f9e05f68308ad709c055e [file] [log] [blame]
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1# Copyright 2019 Google LLC
2#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]9load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]10
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]11licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]15OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -0700[diff] [blame]19 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]20 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]23MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]26 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]27 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]32ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]39MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]40 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]41 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]42 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]47OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]48 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]49 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]53OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]54 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]57 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]58 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]59 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
62 "src/operators/fully-connected-nc.c",
63 "src/operators/global-average-pooling-ncw.c",
64 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]65 "src/operators/leaky-relu-nc.c",
66 "src/operators/max-pooling-nhwc.c",
67 "src/operators/prelu-nc.c",
68 "src/operators/resize-bilinear-nhwc.c",
69 "src/operators/sigmoid-nc.c",
70 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -0700[diff] [blame]71 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]72 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]73]
74
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]75SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]76 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]77 "src/subgraph/add2.c",
78 "src/subgraph/argmax-pooling-2d.c",
79 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]80 "src/subgraph/bankers-rounding.c",
81 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]82 "src/subgraph/clamp.c",
83 "src/subgraph/convolution-2d.c",
84 "src/subgraph/deconvolution-2d.c",
85 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]86 "src/subgraph/divide.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]87 "src/subgraph/fully-connected.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]88 "src/subgraph/floor.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -0700[diff] [blame]89 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]90 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -0700[diff] [blame]91 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]92 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]93 "src/subgraph/maximum2.c",
94 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]95 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]96 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]97 "src/subgraph/prelu.c",
98 "src/subgraph/sigmoid.c",
99 "src/subgraph/softmax.c",
100 "src/subgraph/static-constant-pad.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]101 "src/subgraph/square.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]102 "src/subgraph/squared-difference.c",
103 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]104 "src/subgraph/unpooling-2d.c",
105]
106
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]107TABLE_SRCS = [
108 "src/tables/exp2-k-over-64.c",
109 "src/tables/exp2-k-over-2048.c",
110]
111
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]112SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]113 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]114 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]115 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]116 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
117 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]118 "src/f32-clamp/gen/scalar-x1.c",
119 "src/f32-clamp/gen/scalar-x2.c",
120 "src/f32-clamp/gen/scalar-x4.c",
Marat Dukhan441e2212019-12-04 18:30:49 -0800[diff] [blame]121 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Marat Dukhan6b7dfae2019-12-04 16:00:52 -0800[diff] [blame]122 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]123 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
124 "src/f32-dwconv-chw/3x3p1-scalar.c",
125 "src/f32-dwconv-chw/3x3s2p1-scalar.c",
126 "src/f32-dwconv-chw/5x5p2-scalar.c",
127 "src/f32-dwconv-chw/5x5s2p2-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]128 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
129 "src/f32-dwconv/gen/up1x4-scalar.c",
130 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
131 "src/f32-dwconv/gen/up1x9-scalar.c",
132 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
133 "src/f32-dwconv/gen/up1x25-scalar.c",
134 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
135 "src/f32-dwconv/gen/up2x4-scalar.c",
136 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
137 "src/f32-dwconv/gen/up2x9-scalar.c",
138 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
139 "src/f32-dwconv/gen/up2x25-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]140 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
142 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
143 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]144 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]150 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
151 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]152 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]153 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
154 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]155 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
156 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
157 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]158 "src/f32-gemm/gen/1x4-scalar.c",
159 "src/f32-gemm/gen/2x4-scalar.c",
160 "src/f32-gemm/gen/4x2-scalar.c",
161 "src/f32-gemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]162 "src/f32-gemm/gen/1x4-relu-scalar.c",
163 "src/f32-gemm/gen/2x4-relu-scalar.c",
164 "src/f32-gemm/gen/4x2-relu-scalar.c",
165 "src/f32-gemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]166 "src/f32-gemm/gen/1x4-minmax-scalar.c",
167 "src/f32-gemm/gen/2x4-minmax-scalar.c",
168 "src/f32-gemm/gen/4x2-minmax-scalar.c",
169 "src/f32-gemm/gen/4x4-minmax-scalar.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]170 "src/f32-hswish/gen/scalar-x1.c",
171 "src/f32-hswish/gen/scalar-x2.c",
172 "src/f32-hswish/gen/scalar-x4.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]173 "src/f32-ibilinear/gen/scalar-c1.c",
174 "src/f32-ibilinear/gen/scalar-c2.c",
175 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]176 "src/f32-igemm/gen/1x4-scalar.c",
177 "src/f32-igemm/gen/2x4-scalar.c",
178 "src/f32-igemm/gen/4x2-scalar.c",
179 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]180 "src/f32-igemm/gen/1x4-relu-scalar.c",
181 "src/f32-igemm/gen/2x4-relu-scalar.c",
182 "src/f32-igemm/gen/4x2-relu-scalar.c",
183 "src/f32-igemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]184 "src/f32-igemm/gen/1x4-minmax-scalar.c",
185 "src/f32-igemm/gen/2x4-minmax-scalar.c",
186 "src/f32-igemm/gen/4x2-minmax-scalar.c",
187 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]188 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
189 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
190 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]191 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
192 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
193 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
194 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]195 "src/f32-prelu/gen/scalar-2x1.c",
196 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]197 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
198 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
199 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
200 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
201 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
202 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
203 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
204 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
205 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
206 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
207 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
208 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]209 "src/f32-rmax/scalar.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]210 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x1.c",
211 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x2.c",
212 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x4.c",
213 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x1.c",
214 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x2.c",
215 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x4.c",
216 "src/f32-sigmoid/gen/scalar-p5-div-x1.c",
217 "src/f32-sigmoid/gen/scalar-p5-div-x2.c",
218 "src/f32-sigmoid/gen/scalar-p5-div-x4.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]219 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
220 "src/f32-spmm/gen/1x1-minmax-scalar.c",
221 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
222 "src/f32-spmm/gen/2x1-minmax-scalar.c",
223 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
224 "src/f32-spmm/gen/4x1-minmax-scalar.c",
225 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
226 "src/f32-spmm/gen/8x1-minmax-scalar.c",
227 "src/f32-spmm/gen/8x2-minmax-scalar.c",
228 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]229 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
230 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
231 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
232 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
233 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
234 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
235 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
236 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
237 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
238 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
239 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
240 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]241 "src/f32-vbinary/gen/vmax-scalar-x1.c",
242 "src/f32-vbinary/gen/vmax-scalar-x2.c",
243 "src/f32-vbinary/gen/vmax-scalar-x4.c",
244 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
245 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
246 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
247 "src/f32-vbinary/gen/vmin-scalar-x1.c",
248 "src/f32-vbinary/gen/vmin-scalar-x2.c",
249 "src/f32-vbinary/gen/vmin-scalar-x4.c",
250 "src/f32-vbinary/gen/vminc-scalar-x1.c",
251 "src/f32-vbinary/gen/vminc-scalar-x2.c",
252 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]253 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
254 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
255 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
256 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
257 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
258 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
259 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
260 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
261 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]262 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x1.c",
263 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x2.c",
264 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]265 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
266 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
267 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]268 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
269 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
270 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
271 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
272 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
273 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]274 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
275 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
276 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
277 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
278 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
279 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]280 "src/f32-vlrelu/gen/scalar-x1.c",
281 "src/f32-vlrelu/gen/scalar-x2.c",
282 "src/f32-vlrelu/gen/scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]283 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
284 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
285 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]286 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
287 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
288 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
289 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
290 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
291 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
292 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
293 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
294 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
295 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
296 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
297 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]298 "src/f32-vunary/gen/vabs-scalar-x1.c",
299 "src/f32-vunary/gen/vabs-scalar-x2.c",
300 "src/f32-vunary/gen/vabs-scalar-x4.c",
301 "src/f32-vunary/gen/vneg-scalar-x1.c",
302 "src/f32-vunary/gen/vneg-scalar-x2.c",
303 "src/f32-vunary/gen/vneg-scalar-x4.c",
304 "src/f32-vunary/gen/vsqr-scalar-x1.c",
305 "src/f32-vunary/gen/vsqr-scalar-x2.c",
306 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]307 "src/math/expminus-scalar-lut2048-p1.c",
308 "src/math/expminus-scalar-lut64-p2.c",
309 "src/math/expminus-scalar-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]310 "src/math/roundne-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]311 "src/math/roundne-scalar-nearbyint.c",
312 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]313 "src/math/roundd-scalar-addsub.c",
314 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]315 "src/math/roundd-scalar-floor.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]316 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]317 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]318 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]319 "src/math/roundz-scalar-addsub.c",
320 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]321 "src/math/roundz-scalar-trunc.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]322 "src/math/sigmoid-scalar-lut2048-p1-div.c",
323 "src/math/sigmoid-scalar-lut64-p2-div.c",
324 "src/math/sigmoid-scalar-p5-div.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]325 "src/q8-avgpool/9p8x-minmax-scalar-c1.c",
326 "src/q8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]327 "src/q8-dwconv/up1x9-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]328 "src/q8-gavgpool/7p7x-minmax-scalar-c1.c",
329 "src/q8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]330 "src/q8-gemm/2x2-minmax-scalar.c",
331 "src/q8-igemm/2x2-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]332 "src/q8-vadd/minmax-scalar.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]333 "src/u8-clamp/scalar-x4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]334 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]335 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]336 "src/u8-rmax/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]337 "src/x32-fill/scalar-float.c",
338 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]339 "src/x32-packx/x2-scalar.c",
340 "src/x32-packx/x3-scalar.c",
341 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]342 "src/x32-pad/scalar-int.c",
343 "src/x32-pad/scalar-float.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]344 "src/x32-unpool/scalar.c",
345 "src/x32-zip/x2-scalar.c",
346 "src/x32-zip/x3-scalar.c",
347 "src/x32-zip/x4-scalar.c",
348 "src/x32-zip/xm-scalar.c",
349 "src/x8-lut/scalar.c",
350 "src/x8-zip/x2-scalar.c",
351 "src/x8-zip/x3-scalar.c",
352 "src/x8-zip/x4-scalar.c",
353 "src/x8-zip/xm-scalar.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]354 "src/requantization/precise-scalar.c",
355 "src/requantization/fp32-scalar.c",
356 "src/requantization/q31-scalar.c",
357 "src/requantization/gemmlowp-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]358]
359
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]360WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]361 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
362 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]363 "src/f32-clamp/gen/wasm-x1.c",
364 "src/f32-clamp/gen/wasm-x2.c",
365 "src/f32-clamp/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]366 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
367 "src/f32-dwconv/gen/up1x4-wasm.c",
368 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
369 "src/f32-dwconv/gen/up1x9-wasm.c",
370 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
371 "src/f32-dwconv/gen/up1x25-wasm.c",
372 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
373 "src/f32-dwconv/gen/up2x4-wasm.c",
374 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
375 "src/f32-dwconv/gen/up2x9-wasm.c",
376 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
377 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]378 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
379 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
380 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
381 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]382 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
383 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]384 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
385 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
386 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
387 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]388 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
389 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]390 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
391 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]392 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
393 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
394 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]395 "src/f32-gemm/gen/1x4-wasm.c",
396 "src/f32-gemm/gen/2x4-wasm.c",
397 "src/f32-gemm/gen/4x2-wasm.c",
398 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]399 "src/f32-gemm/gen/1x4-relu-wasm.c",
400 "src/f32-gemm/gen/2x4-relu-wasm.c",
401 "src/f32-gemm/gen/4x2-relu-wasm.c",
402 "src/f32-gemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]403 "src/f32-gemm/gen/1x4-minmax-wasm.c",
404 "src/f32-gemm/gen/2x4-minmax-wasm.c",
405 "src/f32-gemm/gen/4x2-minmax-wasm.c",
406 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]407 "src/f32-hswish/gen/wasm-x1.c",
408 "src/f32-hswish/gen/wasm-x2.c",
409 "src/f32-hswish/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]410 "src/f32-igemm/gen/1x4-wasm.c",
411 "src/f32-igemm/gen/2x4-wasm.c",
412 "src/f32-igemm/gen/4x2-wasm.c",
413 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]414 "src/f32-igemm/gen/1x4-relu-wasm.c",
415 "src/f32-igemm/gen/2x4-relu-wasm.c",
416 "src/f32-igemm/gen/4x2-relu-wasm.c",
417 "src/f32-igemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]418 "src/f32-igemm/gen/1x4-minmax-wasm.c",
419 "src/f32-igemm/gen/2x4-minmax-wasm.c",
420 "src/f32-igemm/gen/4x2-minmax-wasm.c",
421 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]422 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
423 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
424 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]425 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
426 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
427 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
428 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
429 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
430 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
431 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
432 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
433 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
434 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
435 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
436 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]437 "src/f32-vbinary/gen/vmax-wasm-x1.c",
438 "src/f32-vbinary/gen/vmax-wasm-x2.c",
439 "src/f32-vbinary/gen/vmax-wasm-x4.c",
440 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
441 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
442 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
443 "src/f32-vbinary/gen/vmin-wasm-x1.c",
444 "src/f32-vbinary/gen/vmin-wasm-x2.c",
445 "src/f32-vbinary/gen/vmin-wasm-x4.c",
446 "src/f32-vbinary/gen/vminc-wasm-x1.c",
447 "src/f32-vbinary/gen/vminc-wasm-x2.c",
448 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]449 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
450 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
451 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
452 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
453 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
454 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
455 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
456 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
457 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
458 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
459 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
460 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
461 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
462 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
463 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
464 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
465 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
466 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]467 "src/f32-vlrelu/gen/wasm-x1.c",
468 "src/f32-vlrelu/gen/wasm-x2.c",
469 "src/f32-vlrelu/gen/wasm-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]470 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
471 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
472 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]473]
474
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]475WASMSIMD_UKERNELS = [
Marat Dukhanac014d72020-06-16 08:36:47 -0700[diff] [blame^]476 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-acc2-arm.c",
477 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
478 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-acc2-arm.c",
479 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
480 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-acc2-arm.c",
481 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
482 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-acc2-arm.c",
483 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
484 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-acc2-arm.c",
485 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
486 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-acc2-arm.c",
487 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
488 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-acc2-x86.c",
489 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
490 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-acc2-x86.c",
491 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
492 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-acc2-x86.c",
493 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
494 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-acc2-x86.c",
495 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
496 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-acc2-x86.c",
497 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
498 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-acc2-x86.c",
499 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]500 "src/f32-gemm/gen/1x8-minmax-wasmsimd-loadsplat-arm.c",
501 "src/f32-gemm/gen/1x8-minmax-wasmsimd-splat-arm.c",
502 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
503 "src/f32-gemm/gen/3x8-minmax-wasmsimd-loadsplat-arm.c",
504 "src/f32-gemm/gen/3x8-minmax-wasmsimd-splat-arm.c",
505 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
506 "src/f32-gemm/gen/4x8-minmax-wasmsimd-loadsplat-arm.c",
507 "src/f32-gemm/gen/4x8-minmax-wasmsimd-splat-arm.c",
508 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
509 "src/f32-gemm/gen/5x8-minmax-wasmsimd-loadsplat-arm.c",
510 "src/f32-gemm/gen/5x8-minmax-wasmsimd-splat-arm.c",
511 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
512 "src/f32-gemm/gen/6x8-minmax-wasmsimd-loadsplat-arm.c",
513 "src/f32-gemm/gen/6x8-minmax-wasmsimd-splat-arm.c",
514 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
515 "src/f32-gemm/gen/1x8-minmax-wasmsimd-loadsplat-x86.c",
516 "src/f32-gemm/gen/1x8-minmax-wasmsimd-splat-x86.c",
517 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
518 "src/f32-gemm/gen/3x8-minmax-wasmsimd-loadsplat-x86.c",
519 "src/f32-gemm/gen/3x8-minmax-wasmsimd-splat-x86.c",
520 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
521 "src/f32-gemm/gen/4x8-minmax-wasmsimd-loadsplat-x86.c",
522 "src/f32-gemm/gen/4x8-minmax-wasmsimd-splat-x86.c",
523 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
524 "src/f32-gemm/gen/5x8-minmax-wasmsimd-loadsplat-x86.c",
525 "src/f32-gemm/gen/5x8-minmax-wasmsimd-splat-x86.c",
526 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
527 "src/f32-gemm/gen/6x8-minmax-wasmsimd-loadsplat-x86.c",
528 "src/f32-gemm/gen/6x8-minmax-wasmsimd-splat-x86.c",
529 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
530 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-loadsplat-arm.c",
531 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-splat-arm.c",
532 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
533 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-loadsplat-arm.c",
534 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-splat-arm.c",
535 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
536 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-loadsplat-arm.c",
537 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-splat-arm.c",
538 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
539 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-loadsplat-arm.c",
540 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-splat-arm.c",
541 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
542 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-loadsplat-arm.c",
543 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-splat-arm.c",
544 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
545 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-loadsplat-x86.c",
546 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-splat-x86.c",
547 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
548 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-loadsplat-x86.c",
549 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-splat-x86.c",
550 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
551 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-loadsplat-x86.c",
552 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-splat-x86.c",
553 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
554 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-loadsplat-x86.c",
555 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-splat-x86.c",
556 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
557 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-loadsplat-x86.c",
558 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-splat-x86.c",
559 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
560 "src/f32-igemm/gen/1x8-minmax-wasmsimd-loadsplat-arm.c",
561 "src/f32-igemm/gen/1x8-minmax-wasmsimd-splat-arm.c",
562 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
563 "src/f32-igemm/gen/3x8-minmax-wasmsimd-loadsplat-arm.c",
564 "src/f32-igemm/gen/3x8-minmax-wasmsimd-splat-arm.c",
565 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
566 "src/f32-igemm/gen/4x8-minmax-wasmsimd-loadsplat-arm.c",
567 "src/f32-igemm/gen/4x8-minmax-wasmsimd-splat-arm.c",
568 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
569 "src/f32-igemm/gen/5x8-minmax-wasmsimd-loadsplat-arm.c",
570 "src/f32-igemm/gen/5x8-minmax-wasmsimd-splat-arm.c",
571 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
572 "src/f32-igemm/gen/6x8-minmax-wasmsimd-loadsplat-arm.c",
573 "src/f32-igemm/gen/6x8-minmax-wasmsimd-splat-arm.c",
574 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
575 "src/f32-igemm/gen/1x8-minmax-wasmsimd-loadsplat-x86.c",
576 "src/f32-igemm/gen/1x8-minmax-wasmsimd-splat-x86.c",
577 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
578 "src/f32-igemm/gen/3x8-minmax-wasmsimd-loadsplat-x86.c",
579 "src/f32-igemm/gen/3x8-minmax-wasmsimd-splat-x86.c",
580 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
581 "src/f32-igemm/gen/4x8-minmax-wasmsimd-loadsplat-x86.c",
582 "src/f32-igemm/gen/4x8-minmax-wasmsimd-splat-x86.c",
583 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
584 "src/f32-igemm/gen/5x8-minmax-wasmsimd-loadsplat-x86.c",
585 "src/f32-igemm/gen/5x8-minmax-wasmsimd-splat-x86.c",
586 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
587 "src/f32-igemm/gen/6x8-minmax-wasmsimd-loadsplat-x86.c",
588 "src/f32-igemm/gen/6x8-minmax-wasmsimd-splat-x86.c",
589 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]590 "src/requantization/fp32-wasmsimd.c",
591]
592
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]593PSIMD_FASTMATH_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]594 "src/f32-argmaxpool/4x-psimd-c4.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]595 "src/f32-argmaxpool/9p8x-psimd-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]596 "src/f32-argmaxpool/9x-psimd-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]597 "src/f32-avgpool/9p8x-minmax-psimd-c4.c",
598 "src/f32-avgpool/9x-minmax-psimd-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]599 "src/f32-clamp/gen/psimd-x4.c",
600 "src/f32-clamp/gen/psimd-x8.c",
Erich Elsen0a1970e2020-06-10 09:24:59 -0700[diff] [blame]601 "src/f32-conv-hwc2chw/3x3s2p1c3x4-psimd-2x2.c",
Erich Elsene6214af2020-06-10 22:17:22 -0700[diff] [blame]602 "src/f32-dwconv-chw/3x3p1-psimd.c",
Erich Elsenfd7a6e32020-06-11 12:04:44 -0700[diff] [blame]603 "src/f32-dwconv-chw/3x3s2p1-psimd.c",
Erich Elsen28928892020-06-12 08:08:19 -0700[diff] [blame]604 "src/f32-dwconv-chw/5x5p2-psimd.c",
Erich Elsen7465a892020-06-13 14:02:04 -0700[diff] [blame]605 "src/f32-dwconv-chw/5x5s2p2-psimd.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]606 "src/f32-dwconv/gen/up4x25-minmax-psimd-acc2.c",
607 "src/f32-dwconv/gen/up4x25-minmax-psimd.c",
608 "src/f32-dwconv/gen/up4x4-minmax-psimd-acc2.c",
609 "src/f32-dwconv/gen/up4x4-minmax-psimd.c",
610 "src/f32-dwconv/gen/up4x9-minmax-psimd-acc2.c",
611 "src/f32-dwconv/gen/up4x9-minmax-psimd.c",
612 "src/f32-dwconv/gen/up8x25-minmax-psimd-acc2.c",
613 "src/f32-dwconv/gen/up8x25-minmax-psimd.c",
614 "src/f32-dwconv/gen/up8x4-minmax-psimd-acc2.c",
615 "src/f32-dwconv/gen/up8x4-minmax-psimd.c",
616 "src/f32-dwconv/gen/up8x9-minmax-psimd-acc2.c",
617 "src/f32-dwconv/gen/up8x9-minmax-psimd.c",
Erich Elsen6f278b52020-06-10 16:13:11 -0700[diff] [blame]618 "src/f32-gavgpool-cw/psimd-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]619 "src/f32-gavgpool/7p7x-minmax-psimd-c4.c",
620 "src/f32-gavgpool/7x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]621 "src/f32-gemm/gen/1x8-minmax-psimd-loadsplat.c",
622 "src/f32-gemm/gen/1x8-minmax-psimd-splat.c",
623 "src/f32-gemm/gen/1x8s4-minmax-psimd.c",
624 "src/f32-gemm/gen/4x2c4-minmax-psimd.c",
625 "src/f32-gemm/gen/4x8-minmax-psimd-loadsplat.c",
626 "src/f32-gemm/gen/4x8-minmax-psimd-splat.c",
627 "src/f32-gemm/gen/4x8s4-minmax-psimd.c",
628 "src/f32-gemm/gen/6x8-minmax-psimd-loadsplat.c",
629 "src/f32-gemm/gen/6x8-minmax-psimd-splat.c",
630 "src/f32-gemm/gen/6x8s4-minmax-psimd.c",
631 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-loadsplat.c",
632 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-splat.c",
633 "src/f32-gemm/gen-inc/1x8s4inc-minmax-psimd.c",
634 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-loadsplat.c",
635 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-splat.c",
636 "src/f32-gemm/gen-inc/4x8s4inc-minmax-psimd.c",
637 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-loadsplat.c",
638 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-splat.c",
639 "src/f32-gemm/gen-inc/6x8s4inc-minmax-psimd.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]640 "src/f32-hswish/gen/psimd-x4.c",
641 "src/f32-hswish/gen/psimd-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]642 "src/f32-ibilinear/gen/psimd-c4.c",
643 "src/f32-ibilinear/gen/psimd-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]644 "src/f32-igemm/gen/1x8-minmax-psimd-loadsplat.c",
645 "src/f32-igemm/gen/1x8-minmax-psimd-splat.c",
646 "src/f32-igemm/gen/1x8s4-minmax-psimd.c",
647 "src/f32-igemm/gen/4x2c4-minmax-psimd.c",
648 "src/f32-igemm/gen/4x8-minmax-psimd-loadsplat.c",
649 "src/f32-igemm/gen/4x8-minmax-psimd-splat.c",
650 "src/f32-igemm/gen/4x8s4-minmax-psimd.c",
651 "src/f32-igemm/gen/6x8-minmax-psimd-loadsplat.c",
652 "src/f32-igemm/gen/6x8-minmax-psimd-splat.c",
653 "src/f32-igemm/gen/6x8s4-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]654 "src/f32-maxpool/9p8x-minmax-psimd-c4.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]655 "src/f32-spmm/gen/4x1-minmax-psimd.c",
656 "src/f32-spmm/gen/8x1-minmax-psimd.c",
657 "src/f32-spmm/gen/16x1-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]658 "src/f32-pavgpool/9p8x-minmax-psimd-c4.c",
659 "src/f32-pavgpool/9x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]660 "src/f32-ppmm/gen/4x8-minmax-psimd.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]661 "src/f32-prelu/gen/psimd-2x4.c",
662 "src/f32-prelu/gen/psimd-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]663 "src/f32-rmax/psimd.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]664 "src/f32-vbinary/gen/vadd-minmax-psimd-x4.c",
665 "src/f32-vbinary/gen/vadd-minmax-psimd-x8.c",
666 "src/f32-vbinary/gen/vaddc-minmax-psimd-x4.c",
667 "src/f32-vbinary/gen/vaddc-minmax-psimd-x8.c",
668 "src/f32-vbinary/gen/vdiv-minmax-psimd-x4.c",
669 "src/f32-vbinary/gen/vdiv-minmax-psimd-x8.c",
670 "src/f32-vbinary/gen/vdivc-minmax-psimd-x4.c",
671 "src/f32-vbinary/gen/vdivc-minmax-psimd-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]672 "src/f32-vbinary/gen/vmax-psimd-x4.c",
673 "src/f32-vbinary/gen/vmax-psimd-x8.c",
674 "src/f32-vbinary/gen/vmaxc-psimd-x4.c",
675 "src/f32-vbinary/gen/vmaxc-psimd-x8.c",
676 "src/f32-vbinary/gen/vmin-psimd-x4.c",
677 "src/f32-vbinary/gen/vmin-psimd-x8.c",
678 "src/f32-vbinary/gen/vminc-psimd-x4.c",
679 "src/f32-vbinary/gen/vminc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]680 "src/f32-vbinary/gen/vmul-minmax-psimd-x4.c",
681 "src/f32-vbinary/gen/vmul-minmax-psimd-x8.c",
682 "src/f32-vbinary/gen/vmulc-minmax-psimd-x4.c",
683 "src/f32-vbinary/gen/vmulc-minmax-psimd-x8.c",
684 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x4.c",
685 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]686 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x4.c",
687 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]688 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x4.c",
689 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]690 "src/f32-vbinary/gen/vsqrdiff-psimd-x4.c",
691 "src/f32-vbinary/gen/vsqrdiff-psimd-x8.c",
692 "src/f32-vbinary/gen/vsqrdiffc-psimd-x4.c",
693 "src/f32-vbinary/gen/vsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]694 "src/f32-vbinary/gen/vsub-minmax-psimd-x4.c",
695 "src/f32-vbinary/gen/vsub-minmax-psimd-x8.c",
696 "src/f32-vbinary/gen/vsubc-minmax-psimd-x4.c",
697 "src/f32-vbinary/gen/vsubc-minmax-psimd-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]698 "src/f32-vlrelu/gen/psimd-x4.c",
699 "src/f32-vlrelu/gen/psimd-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]700 "src/f32-vmulcaddc/gen/c4-minmax-psimd-2x.c",
701 "src/f32-vmulcaddc/gen/c8-minmax-psimd-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]702 "src/f32-vunary/gen/vabs-psimd-x4.c",
703 "src/f32-vunary/gen/vabs-psimd-x8.c",
704 "src/f32-vunary/gen/vneg-psimd-x4.c",
705 "src/f32-vunary/gen/vneg-psimd-x8.c",
706 "src/f32-vunary/gen/vsqr-psimd-x4.c",
707 "src/f32-vunary/gen/vsqr-psimd-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]708 "src/x32-fill/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]709 "src/x32-packx/x4-psimd.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]710 "src/x32-pad/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]711 "src/x32-unpool/psimd.c",
712 "src/x32-zip/x2-psimd.c",
713 "src/x32-zip/x3-psimd.c",
714 "src/x32-zip/x4-psimd.c",
715 "src/x32-zip/xm-psimd.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]716 "src/requantization/precise-psimd.c",
717 "src/requantization/fp32-psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]718]
719
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]720PSIMD_ACCMATH_UKERNELS = [
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]721 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x4.c",
722 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8.c",
723 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8-acc2.c",
724 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12.c",
725 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc2.c",
726 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc3.c",
727 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16.c",
728 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc2.c",
729 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc4.c",
730 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20.c",
731 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc2.c",
732 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]733 "src/f32-sigmoid/gen/psimd-p5-div-x4.c",
734 "src/f32-sigmoid/gen/psimd-p5-div-x8.c",
735 "src/f32-sigmoid/gen/psimd-p5-div-x12.c",
736 "src/f32-sigmoid/gen/psimd-p5-div-x16.c",
737 "src/f32-sigmoid/gen/psimd-p5-div-x20.c",
738 "src/f32-sigmoid/gen/psimd-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]739 "src/f32-vrnd/gen/vrndne-psimd-x4.c",
740 "src/f32-vrnd/gen/vrndne-psimd-x8.c",
741 "src/f32-vrnd/gen/vrndz-psimd-x4.c",
742 "src/f32-vrnd/gen/vrndz-psimd-x8.c",
743 "src/f32-vrnd/gen/vrndu-psimd-x4.c",
744 "src/f32-vrnd/gen/vrndu-psimd-x8.c",
745 "src/f32-vrnd/gen/vrndd-psimd-x4.c",
746 "src/f32-vrnd/gen/vrndd-psimd-x8.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]747 "src/math/roundne-psimd-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]748 "src/math/roundd-psimd-addsub.c",
749 "src/math/roundu-psimd-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]750 "src/math/roundz-psimd-addsub.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]751 "src/math/sigmoid-psimd-p5-div.c",
752]
753
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]754# ISA-specific micro-kernels
755NEON_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]756 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
757 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]758 "src/f32-clamp/gen/neon-x4.c",
759 "src/f32-clamp/gen/neon-x8.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]760 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
761 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]762 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
763 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]764 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
765 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]766 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
767 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]768 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
769 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
770 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
771 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]772 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
773 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
774 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
775 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]776 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
777 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
778 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
779 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]780 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]781 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
782 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]783 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
784 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
785 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
786 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
787 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
788 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
789 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
790 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
791 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
792 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
793 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
794 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
795 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
796 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
797 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
798 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
799 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
800 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
801 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
802 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
803 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
804 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
805 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
806 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
807 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
808 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
809 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
810 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
811 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
812 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
813 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]814 "src/f32-hswish/gen/neon-x4.c",
815 "src/f32-hswish/gen/neon-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]816 "src/f32-ibilinear/gen/neon-c4.c",
817 "src/f32-ibilinear/gen/neon-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]818 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
819 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
820 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
821 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
822 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
823 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
824 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
825 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
826 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
827 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
828 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
829 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
830 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
831 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
832 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
833 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]834 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
835 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
836 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]837 "src/f32-ppmm/gen/4x8-minmax-neon.c",
838 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]839 "src/f32-prelu/gen/neon-2x4.c",
840 "src/f32-prelu/gen/neon-2x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]841 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
842 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
843 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
844 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
845 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
846 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
847 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
848 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
849 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
850 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
851 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
852 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
853 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
854 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
855 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
856 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
857 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
858 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
859 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
860 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
861 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
862 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
863 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
864 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]865 "src/f32-rmax/neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]866 "src/f32-sigmoid/gen/neon-frac-p9-p10-nr1recps-x16.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]867 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x4.c",
868 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x8.c",
869 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x12.c",
870 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x16.c",
871 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x20.c",
872 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x24.c",
873 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x4.c",
874 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x8.c",
875 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x12.c",
876 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x16.c",
877 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x20.c",
878 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x24.c",
879 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x4.c",
880 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x8.c",
881 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x12.c",
882 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x16.c",
883 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x20.c",
884 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x24.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]885 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
886 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
887 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
888 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]889 "src/f32-vbinary/gen/vmax-neon-x4.c",
890 "src/f32-vbinary/gen/vmax-neon-x8.c",
891 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
892 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
893 "src/f32-vbinary/gen/vmin-neon-x4.c",
894 "src/f32-vbinary/gen/vmin-neon-x8.c",
895 "src/f32-vbinary/gen/vminc-neon-x4.c",
896 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]897 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
898 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
899 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
900 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]901 "src/f32-vbinary/gen/vrsqrdiffc-neon-x4.c",
902 "src/f32-vbinary/gen/vrsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]903 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
904 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]905 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
906 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
907 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
908 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]909 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
910 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
911 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
912 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]913 "src/f32-vlrelu/gen/neon-x4.c",
914 "src/f32-vlrelu/gen/neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]915 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
916 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]917 "src/f32-vrnd/gen/vrndne-neon-x4.c",
918 "src/f32-vrnd/gen/vrndne-neon-x8.c",
919 "src/f32-vrnd/gen/vrndz-neon-x4.c",
920 "src/f32-vrnd/gen/vrndz-neon-x8.c",
921 "src/f32-vrnd/gen/vrndu-neon-x4.c",
922 "src/f32-vrnd/gen/vrndu-neon-x8.c",
923 "src/f32-vrnd/gen/vrndd-neon-x4.c",
924 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]925 "src/f32-vunary/gen/vabs-neon-x4.c",
926 "src/f32-vunary/gen/vabs-neon-x8.c",
927 "src/f32-vunary/gen/vneg-neon-x4.c",
928 "src/f32-vunary/gen/vneg-neon-x8.c",
929 "src/f32-vunary/gen/vsqr-neon-x4.c",
930 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]931 "src/q8-avgpool/9p8x-minmax-neon-c8.c",
932 "src/q8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]933 "src/q8-dwconv/up8x9-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]934 "src/q8-gavgpool/7p7x-minmax-neon-c8.c",
935 "src/q8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]936 "src/q8-gemm/4x8-minmax-neon.c",
937 "src/q8-gemm/8x8-minmax-neon.c",
938 "src/q8-igemm/4x8-minmax-neon.c",
939 "src/q8-igemm/8x8-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]940 "src/q8-vadd/minmax-neon.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]941 "src/u8-clamp/neon-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]942 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]943 "src/u8-rmax/neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]944 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]945 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]946 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]947 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]948 "src/x32-zip/x2-neon.c",
949 "src/x32-zip/x3-neon.c",
950 "src/x32-zip/x4-neon.c",
951 "src/x32-zip/xm-neon.c",
952 "src/x8-zip/x2-neon.c",
953 "src/x8-zip/x3-neon.c",
954 "src/x8-zip/x4-neon.c",
955 "src/x8-zip/xm-neon.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]956 "src/math/roundne-neon-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]957 "src/math/roundd-neon-addsub.c",
958 "src/math/roundd-neon-cvt.c",
959 "src/math/roundu-neon-addsub.c",
960 "src/math/roundu-neon-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]961 "src/math/roundz-neon-addsub.c",
962 "src/math/roundz-neon-cvt.c",
Marat Dukhan68b3b452020-01-02 10:11:15 -0800[diff] [blame]963 "src/math/sigmoid-neon-frac-p9-p10-nr1recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]964 "src/math/sigmoid-neon-rr1-lut2048-p1-nr2recps.c",
965 "src/math/sigmoid-neon-rr1-lut64-p2-nr2recps.c",
966 "src/math/sigmoid-neon-rr1-p5-nr2recps.c",
967 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
968 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
969 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]970 "src/requantization/precise-neon.c",
971 "src/requantization/fp32-neon.c",
972 "src/requantization/q31-neon.c",
973 "src/requantization/gemmlowp-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]974]
975
976NEONFMA_UKERNELS = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]977 "src/f32-ibilinear/gen/neonfma-c4.c",
978 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]979 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
980 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
981 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
982 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
983 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
984 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
985 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
986 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
987 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]988 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
989 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
990 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
991 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]992 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
993 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
994 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
995 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]996 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
997 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
998 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
999 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1000 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1001 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1002 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1003 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1004 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1005 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1006 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1007 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1008 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
1009 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1010 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1011 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1012 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1013 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1014 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1015 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1016 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1017 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1018 "src/f32-hswish/gen/neonfma-x4.c",
1019 "src/f32-hswish/gen/neonfma-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1020 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1021 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1022 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1023 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1024 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1025 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1026 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1027 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1028 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1029 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1030 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1031 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
1032 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1033 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1034 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
1035 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
1036 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
1037 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
1038 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1039 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
1040 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
1041 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1042 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
1043 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1044 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1045 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1046 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x4.c",
1047 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x8.c",
1048 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x12.c",
1049 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x16.c",
1050 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x20.c",
1051 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x24.c",
1052 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x4.c",
1053 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x8.c",
1054 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x12.c",
1055 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x16.c",
1056 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x20.c",
1057 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x24.c",
1058 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x4.c",
1059 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x8.c",
1060 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x12.c",
1061 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x16.c",
1062 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x20.c",
1063 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x24.c",
1064 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x4.c",
1065 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x8.c",
1066 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x12.c",
1067 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x16.c",
1068 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x20.c",
1069 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x24.c",
1070 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
1071 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
1072 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
1073 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
1074 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
1075 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
1076 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x4.c",
1077 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x8.c",
1078 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x12.c",
1079 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x16.c",
1080 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x20.c",
1081 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x24.c",
1082 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x4.c",
1083 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x8.c",
1084 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x12.c",
1085 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x16.c",
1086 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x20.c",
1087 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x24.c",
1088 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
1089 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
1090 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
1091 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
1092 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
1093 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
1094 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x4.c",
1095 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x8.c",
1096 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x12.c",
1097 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x16.c",
1098 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x20.c",
1099 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1100 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
1101 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhan797a8fe2019-11-14 20:21:57 -0800[diff] [blame]1102 "src/math/exp-neonfma-lut64-p2.c",
1103 "src/math/exp-neonfma-p5.c",
Marat Dukhan189ae802019-11-26 11:28:44 -0800[diff] [blame]1104 "src/math/expminus-neonfma-lut2048-p1.c",
1105 "src/math/expminus-neonfma-lut64-p2.c",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]1106 "src/math/expminus-neonfma-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1107 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
1108 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
1109 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
1110 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
1111 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
1112 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
1113 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
1114 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
1115 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
1116 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
1117 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
1118 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
1119 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
1120 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
1121 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
1122 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
1123 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
1124 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1125]
1126
1127AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1128 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
1129 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
1130 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
1131 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
1132 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
1133 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1134 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1135 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1136 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1137 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1138 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
1139 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1140 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
1141 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
1142 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
1143 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
1144 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
1145 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
1146 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
1147 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1148 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1149 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
1150 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
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1152 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1153 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1154 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
1155 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1156 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
1157 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1158 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
1159 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1160 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
1161 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1162 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
1163 "src/f32-dwconv-chw/3x3p1-neonfma.c",
1164 "src/f32-dwconv-chw/5x5p2-neonfma.c",
1165 "src/f32-dwconv-chw/3x3s2p1-neonfma.c",
1166 "src/f32-dwconv-chw/5x5s2p2-neonfma.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1167 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x4.c",
1168 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x8.c",
1169 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x12.c",
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1175 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x12.c",
1176 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x16.c",
1177 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x20.c",
1178 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x24.c",
1179 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x4.c",
1180 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x8.c",
1181 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x12.c",
1182 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x16.c",
1183 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x20.c",
1184 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x24.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1185 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1186 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
1187 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
1188 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1189 "src/f32-spmm/gen/16x1-minmax-neonfma-unroll2.c",
1190 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1191 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
1192 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
1193 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1194 "src/f32-spmm/gen/4x1-minmax-neonfma-unroll2.c",
1195 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1196 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
1197 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
1198 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1199 "src/f32-spmm/gen/8x1-minmax-neonfma-unroll2.c",
1200 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1201 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
1202 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1203 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
1204 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
1205 "src/math/sigmoid-neonfma-rr1-p5-div.c",
1206 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
1207 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
1208 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1209]
1210
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1211NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1212 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
1213 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
1214 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
1215 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
1216 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
1217 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
1218 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
1219 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1220 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1221 "src/math/roundd-neonv8.c",
1222 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1223 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1224]
1225
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1226AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1227 "src/f16-clamp/gen/neonfp16arith-x16.c",
1228 "src/f16-clamp/gen/neonfp16arith-x8.c",
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]1229 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
1230 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
1231 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
1232 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
1233 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
1234 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
1235 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
1236 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
1237 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
1238 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
1239 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
1240 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]1241 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
1242 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1243 "src/f16-hswish/gen/neonfp16arith-x16.c",
1244 "src/f16-hswish/gen/neonfp16arith-x8.c",
1245 "src/f16-prelu/gen/neonfp16arith-2x16.c",
1246 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]1247 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
1248 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
1249 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
1250 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
1251 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
1252 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
1253 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
1254 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
1255 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
1256 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
1257 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
1258 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
1259 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
1260 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
1261 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
1262 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
1263 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
1264 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
1265 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
1266 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
1267 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
1268 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
1269 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
1270 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
1271 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
1272 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
1273 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
1274 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]1275 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
1276 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
Frank Barchard83ea9392020-04-20 20:15:14 -0700[diff] [blame]1277 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1278 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1279 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1280 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
1281 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
1282 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
1283 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
1284 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]1285 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1286 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1287 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1288 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]1289 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1290 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1291 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1292 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
1293 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
1294 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
1295 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
1296 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
1297 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1298 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1299 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1300 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1301 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
1302 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-unroll2.c",
1303 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
1304 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-unroll2.c",
1305 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
1306 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-unroll2.c",
1307 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
1308 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-unroll2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1309]
1310
1311SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1312 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
1313 "src/f32-avgpool/9x-minmax-sse-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1314 "src/f32-clamp/gen/sse-x4.c",
1315 "src/f32-clamp/gen/sse-x8.c",
Erich Elsenb1233402020-06-08 15:53:15 -0700[diff] [blame]1316 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
1317 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1318 "src/f32-dwconv-chw/3x3p1-sse.c",
1319 "src/f32-dwconv-chw/3x3s2p1-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1320 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
1321 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
1322 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
1323 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
1324 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
1325 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
1326 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
1327 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
1328 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
1329 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
1330 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
1331 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1332 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1333 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
1334 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1335 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
1336 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
1337 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
1338 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
1339 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
1340 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
1341 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
1342 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
1343 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
1344 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
1345 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
1346 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
1347 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1348 "src/f32-hswish/gen/sse-x4.c",
1349 "src/f32-hswish/gen/sse-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1350 "src/f32-ibilinear/gen/sse-c4.c",
1351 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1352 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
1353 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
1354 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
1355 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
1356 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
1357 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
1358 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1359 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
1360 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
1361 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1362 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1363 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1364 "src/f32-spmm/gen/4x1-minmax-sse.c",
1365 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]1366 "src/f32-spmm/gen/16x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1367 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
1368 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
1369 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
1370 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
1371 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
1372 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
1373 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
1374 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]1375 "src/f32-vbinary/gen/vmax-sse-x4.c",
1376 "src/f32-vbinary/gen/vmax-sse-x8.c",
1377 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
1378 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
1379 "src/f32-vbinary/gen/vmin-sse-x4.c",
1380 "src/f32-vbinary/gen/vmin-sse-x8.c",
1381 "src/f32-vbinary/gen/vminc-sse-x4.c",
1382 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1383 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
1384 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
1385 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
1386 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
1387 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
1388 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1389 "src/f32-vbinary/gen/vrsqrdiffc-sse-x4.c",
1390 "src/f32-vbinary/gen/vrsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1391 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
1392 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1393 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
1394 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
1395 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
1396 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1397 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
1398 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
1399 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
1400 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1401 "src/f32-vlrelu/gen/sse-x4.c",
1402 "src/f32-vlrelu/gen/sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1403 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
1404 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1405 "src/f32-vunary/gen/vabs-sse-x4.c",
1406 "src/f32-vunary/gen/vabs-sse-x8.c",
1407 "src/f32-vunary/gen/vneg-sse-x4.c",
1408 "src/f32-vunary/gen/vneg-sse-x8.c",
1409 "src/f32-vunary/gen/vsqr-sse-x4.c",
1410 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1411 "src/x32-fill/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1412 "src/x32-packx/x4-sse.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]1413 "src/x32-pad/sse.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1414 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1415 "src/math/roundd-sse-addsub.c",
1416 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1417 "src/math/roundz-sse-addsub.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1418]
1419
1420SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]1421 "src/f32-argmaxpool/9p8x-sse2-c4.c",
1422 "src/f32-argmaxpool/4x-sse2-c4.c",
1423 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1424 "src/f32-prelu/gen/sse2-2x4.c",
1425 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]1426 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
1427 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
1428 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
1429 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
1430 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
1431 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
1432 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
1433 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
1434 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
1435 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
1436 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
1437 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1438 "src/f32-sigmoid/gen/sse2-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1439 "src/f32-sigmoid/gen/sse2-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1440 "src/f32-sigmoid/gen/sse2-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1441 "src/f32-sigmoid/gen/sse2-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1442 "src/f32-sigmoid/gen/sse2-p5-div-x20.c",
1443 "src/f32-sigmoid/gen/sse2-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1444 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
1445 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
1446 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
1447 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
1448 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
1449 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
1450 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
1451 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1452 "src/q8-avgpool/9p8x-minmax-sse2-c8.c",
1453 "src/q8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1454 "src/q8-igemm/4x4c2-minmax-sse2.c",
1455 "src/q8-dwconv/up8x9-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1456 "src/q8-gavgpool/7p7x-minmax-sse2-c8.c",
1457 "src/q8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1458 "src/q8-gemm/2x4c8-minmax-sse2.c",
1459 "src/q8-gemm/4x4c2-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1460 "src/q8-vadd/minmax-sse2.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1461 "src/u8-clamp/sse2-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1462 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1463 "src/u8-rmax/sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1464 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1465 "src/x32-zip/x2-sse2.c",
1466 "src/x32-zip/x3-sse2.c",
1467 "src/x32-zip/x4-sse2.c",
1468 "src/x32-zip/xm-sse2.c",
1469 "src/x8-zip/x2-sse2.c",
1470 "src/x8-zip/x3-sse2.c",
1471 "src/x8-zip/x4-sse2.c",
1472 "src/x8-zip/xm-sse2.c",
Marat Dukhanffd68402019-11-15 15:19:11 -0800[diff] [blame]1473 "src/math/exp-sse2-p5.c",
1474 "src/math/expminus-sse2-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1475 "src/math/roundne-sse2-cvt.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1476 "src/math/roundd-sse2-cvt.c",
1477 "src/math/roundu-sse2-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1478 "src/math/roundz-sse2-cvt.c",
Marat Dukhan80bafd22019-11-18 10:16:01 -0800[diff] [blame]1479 "src/math/sigmoid-sse2-p5-div.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1480 "src/requantization/precise-sse2.c",
1481 "src/requantization/fp32-sse2.c",
1482 "src/requantization/q31-sse2.c",
1483 "src/requantization/gemmlowp-sse2.c",
1484]
1485
1486SSSE3_UKERNELS = [
1487 "src/requantization/precise-ssse3.c",
1488 "src/requantization/q31-ssse3.c",
1489 "src/requantization/gemmlowp-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1490]
1491
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1492SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1493 "src/f32-prelu/gen/sse41-2x4.c",
1494 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1495 "src/f32-sigmoid/gen/sse41-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1496 "src/f32-sigmoid/gen/sse41-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1497 "src/f32-sigmoid/gen/sse41-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1498 "src/f32-sigmoid/gen/sse41-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1499 "src/f32-sigmoid/gen/sse41-p5-div-x20.c",
1500 "src/f32-sigmoid/gen/sse41-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1501 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
1502 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
1503 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
1504 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
1505 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
1506 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
1507 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
1508 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1509 "src/math/roundne-sse41.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1510 "src/math/roundd-sse41.c",
1511 "src/math/roundu-sse41.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1512 "src/math/roundz-sse41.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1513 "src/requantization/precise-sse4.c",
1514 "src/requantization/q31-sse4.c",
1515 "src/requantization/gemmlowp-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1516]
1517
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1518AVX_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1519 "src/f32-clamp/gen/avx-x8.c",
1520 "src/f32-clamp/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1521 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
1522 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
1523 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
1524 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
1525 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
1526 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
1527 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
1528 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
1529 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
1530 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
1531 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
1532 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
1533 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
1534 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
1535 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
1536 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
1537 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
1538 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
1539 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
1540 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
1541 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
1542 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
1543 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
1544 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
1545 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
1546 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
1547 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
1548 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
1549 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
1550 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1551 "src/f32-hswish/gen/avx-x8.c",
1552 "src/f32-hswish/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1553 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
1554 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
1555 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
1556 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
1557 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
1558 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
1559 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
1560 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
1561 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1562 "src/f32-prelu/gen/avx-2x8.c",
1563 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1564 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1565 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
1566 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
1567 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
1568 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
1569 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
1570 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
1571 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
1572 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1573 "src/f32-vbinary/gen/vmax-avx-x8.c",
1574 "src/f32-vbinary/gen/vmax-avx-x16.c",
1575 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
1576 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
1577 "src/f32-vbinary/gen/vmin-avx-x8.c",
1578 "src/f32-vbinary/gen/vmin-avx-x16.c",
1579 "src/f32-vbinary/gen/vminc-avx-x8.c",
1580 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1581 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
1582 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
1583 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
1584 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
1585 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
1586 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1587 "src/f32-vbinary/gen/vrsqrdiffc-avx-x8.c",
1588 "src/f32-vbinary/gen/vrsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1589 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
1590 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1591 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
1592 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
1593 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
1594 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1595 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
1596 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
1597 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
1598 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1599 "src/f32-vlrelu/gen/avx-x8.c",
1600 "src/f32-vlrelu/gen/avx-x16.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1601 "src/f32-vscale/avx-unroll32.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1602 "src/f32-vrnd/gen/vrndne-avx-x8.c",
1603 "src/f32-vrnd/gen/vrndne-avx-x16.c",
1604 "src/f32-vrnd/gen/vrndz-avx-x8.c",
1605 "src/f32-vrnd/gen/vrndz-avx-x16.c",
1606 "src/f32-vrnd/gen/vrndu-avx-x8.c",
1607 "src/f32-vrnd/gen/vrndu-avx-x16.c",
1608 "src/f32-vrnd/gen/vrndd-avx-x8.c",
1609 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1610 "src/f32-vunary/gen/vabs-avx-x8.c",
1611 "src/f32-vunary/gen/vabs-avx-x16.c",
1612 "src/f32-vunary/gen/vneg-avx-x8.c",
1613 "src/f32-vunary/gen/vneg-avx-x16.c",
1614 "src/f32-vunary/gen/vsqr-avx-x8.c",
1615 "src/f32-vunary/gen/vsqr-avx-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1616]
1617
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1618FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1619 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
1620 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
1621 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
1622 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
1623 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
1624 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
1625 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
1626 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
1627 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
1628 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
1629 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
1630 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
1631 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
1632 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
1633 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
1634 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
1635 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
1636 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
1637 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
1638 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
1639 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
1640 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
1641 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
1642 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
1643 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
1644 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
1645 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
1646 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
1647 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
1648 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
1649 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
1650 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
1651 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
1652 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
1653 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
1654 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
1655 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
1656 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
1657 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
1658 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1659 "src/f32-hswish/gen/fma3-x8.c",
1660 "src/f32-hswish/gen/fma3-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1661 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
1662 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
1663 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
1664 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
1665 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
1666 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
1667 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
1668 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
1669 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
1670 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
1671 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
1672 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
1673 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
1674 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1675]
1676
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1677AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1678 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
1679 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
1680 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
1681 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
1682 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
1683 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
1684 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
1685 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
1686 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
1687 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
1688 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
1689 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
1690 "src/f32-raddextexp/gen/avx2-p5-x64.c",
1691 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
1692 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
1693 "src/f32-raddextexp/gen/avx2-p5-x72.c",
1694 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
1695 "src/f32-raddextexp/gen/avx2-p5-x80.c",
1696 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
1697 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
1698 "src/f32-raddextexp/gen/avx2-p5-x96.c",
1699 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
1700 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
1701 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
1702 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
1703 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
1704 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
1705 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
1706 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
1707 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
1708 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
1709 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
1710 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
1711 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
1712 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
1713 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Marat Dukhanfa0a4322020-01-06 16:14:29 -0800[diff] [blame]1714 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x8.c",
1715 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x16.c",
1716 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x24.c",
1717 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x32.c",
1718 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x40.c",
1719 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x48.c",
1720 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x56.c",
1721 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x64.c",
1722 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x72.c",
1723 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x80.c",
1724 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x8.c",
1725 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x16.c",
1726 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x24.c",
1727 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x32.c",
1728 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x40.c",
1729 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x48.c",
1730 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x56.c",
1731 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x64.c",
1732 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x72.c",
1733 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x80.c",
1734 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x8.c",
1735 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x16.c",
1736 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x24.c",
1737 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x32.c",
1738 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x40.c",
1739 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x48.c",
1740 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x56.c",
1741 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x64.c",
1742 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x72.c",
1743 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1744 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
1745 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
1746 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
1747 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
1748 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
1749 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
1750 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
1751 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
1752 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
1753 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
1754 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
1755 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
1756 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
1757 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
1758 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
1759 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
1760 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
1761 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
1762 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
1763 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
1764 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
1765 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
1766 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
1767 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1768 "src/math/exp-avx2-p5.c",
1769 "src/math/exp-avx2-perm-p3.c",
1770 "src/math/exp-avx2-perm-p4.c",
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]1771 "src/math/expminus-avx2-p5.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1772 "src/math/extexp-avx2-p5.c",
Marat Dukhan72416002020-01-05 21:53:19 -0800[diff] [blame]1773 "src/math/sigmoid-avx2-rr2-p5-div.c",
1774 "src/math/sigmoid-avx2-rr1-p5-div.c",
1775 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
1776 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
1777 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
1778 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1779]
1780
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1781AVX512F_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1782 "src/f32-clamp/gen/avx512f-x16.c",
1783 "src/f32-clamp/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1784 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
1785 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
1786 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
1787 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
1788 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
1789 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
1790 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
1791 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
1792 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
1793 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
1794 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
1795 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
1796 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
1797 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
1798 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
1799 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
1800 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
1801 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
1802 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
1803 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
1804 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
1805 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
1806 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
1807 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1808 "src/f32-hswish/gen/avx512f-x16.c",
1809 "src/f32-hswish/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1810 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
1811 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
1812 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
1813 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
1814 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
1815 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1816 "src/f32-prelu/gen/avx512f-2x16.c",
1817 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1818 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
1819 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1820 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1821 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
1822 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1823 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
1824 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1825 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1826 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
1827 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1828 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1829 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
1830 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
1831 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
1832 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
1833 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
1834 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
1835 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
1836 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
1837 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
1838 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
1839 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
1840 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
1841 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
1842 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
1843 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1844 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1845 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
1846 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1847 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
1848 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1849 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1850 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
1851 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1852 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1853 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1854 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1855 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
1856 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
1857 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
1858 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
1859 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
1860 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
1861 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
1862 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1863 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
1864 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
1865 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
1866 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
1867 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
1868 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
1869 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
1870 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1871 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
1872 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
1873 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
1874 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
1875 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
1876 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1877 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x16.c",
1878 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1879 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
1880 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1881 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
1882 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
1883 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
1884 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1885 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
1886 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
1887 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
1888 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1889 "src/f32-vlrelu/gen/avx512f-x16.c",
1890 "src/f32-vlrelu/gen/avx512f-x32.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1891 "src/f32-vscale/avx512f-unroll64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1892 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
1893 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
1894 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
1895 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
1896 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
1897 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
1898 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
1899 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
1900 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
1901 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
1902 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
1903 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
1904 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
1905 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
1906 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
1907 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
1908 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
1909 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
1910 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
1911 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
1912 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
1913 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
1914 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
1915 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1916 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
1917 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
1918 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
1919 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
1920 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
1921 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
1922 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
1923 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1924 "src/f32-vunary/gen/vabs-avx512f-x16.c",
1925 "src/f32-vunary/gen/vabs-avx512f-x32.c",
1926 "src/f32-vunary/gen/vneg-avx512f-x16.c",
1927 "src/f32-vunary/gen/vneg-avx512f-x32.c",
1928 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
1929 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1930 "src/math/exp-avx512f-p5-scalef.c",
1931 "src/math/exp-avx512f-p5.c",
1932 "src/math/exp-avx512f-perm-p3.c",
Marat Dukhanfeb49232019-10-28 11:03:31 -0700[diff] [blame]1933 "src/math/exp-avx512f-perm2-p2.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1934 "src/math/extexp-avx512f-p5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1935]
1936
1937AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -0700[diff] [blame]1938 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -0700[diff] [blame]1939 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1940 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1941 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
1942 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1943 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
1944 "src/f32-gemm/4x8-minmax-aarch32-neon-ld64.S",
1945 "src/f32-igemm/4x8-minmax-aarch32-neon-ld64.S",
1946 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1947 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
1948 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1949 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1950]
1951
1952AARCH64_ASM_UKERNELS = [
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1953 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1954 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
1955 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1956 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1957 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
1958 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]1959 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
1960 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
1961 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]1962 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]1963 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
1964 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
1965 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]1966 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1967 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
1968 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]1969 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1970 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
1971 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
1972 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
1973 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
1974 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
1975 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
1976 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
1977 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
1978 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
1979 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
1980 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
1981 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
1982 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
1983 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
1984 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
1985 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
1986 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
1987 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1988 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
1989 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]1990 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1991 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
1992 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
1993 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1994 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
1995 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
1996 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
1997 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
1998 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1999 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2000 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
2001 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
2002 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2003 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2004 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2005 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
2006 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
2007 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2008 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2009 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
2010 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
2011 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
2012 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
2013 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
2014 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
2015 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
2016 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
2017 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
2018 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
2019 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
2020 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
2021 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
2022 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
2023 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
2024 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
2025 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
2026 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2027]
2028
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2029INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2030 "src/requantization/gemmlowp-requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2031 "src/xnnpack/argmaxpool.h",
2032 "src/xnnpack/avgpool.h",
2033 "src/xnnpack/clamp.h",
2034 "src/xnnpack/common.h",
2035 "src/xnnpack/conv.h",
2036 "src/xnnpack/dwconv.h",
2037 "src/xnnpack/gavgpool.h",
2038 "src/xnnpack/gemm.h",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]2039 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2040 "src/xnnpack/hswish.h",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]2041 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2042 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -0800[diff] [blame]2043 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2044 "src/xnnpack/lut.h",
2045 "src/xnnpack/math.h",
2046 "src/xnnpack/maxpool.h",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2047 "src/xnnpack/memory.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2048 "src/xnnpack/packx.h",
2049 "src/xnnpack/pad.h",
2050 "src/xnnpack/params.h",
2051 "src/xnnpack/pavgpool.h",
2052 "src/xnnpack/ppmm.h",
2053 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2054 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]2055 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2056 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2057 "src/xnnpack/rmax.h",
2058 "src/xnnpack/scalar-utils.h",
2059 "src/xnnpack/spmm.h",
2060 "src/xnnpack/unpool.h",
2061 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]2062 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2063 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]2064 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2065 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]2066 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]2067 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2068 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2069]
2070
2071INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2072 "include/xnnpack.h",
2073 "src/xnnpack/allocator.h",
2074 "src/xnnpack/compute.h",
2075 "src/xnnpack/im2col.h",
2076 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2077 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2078 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2079 "src/xnnpack/operator.h",
2080 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2081 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2082 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2083 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -0800[diff] [blame]2084 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2085]
2086
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2087ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2088 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2089]
2090
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2091MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2092 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2093 "include/xnnpack.h",
2094]
2095
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2096MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2097 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2098 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2099 "src/xnnpack/requantization.h",
2100 "include/xnnpack.h",
2101]
2102
2103OPERATOR_TEST_PARAMS_HDRS = [
2104 "src/xnnpack/params.h",
2105 "src/xnnpack/common.h",
2106]
2107
2108WEIGHTS_PACK_HDRS = [
2109 "src/xnnpack/pack.h",
2110 "src/xnnpack/operator.h",
2111 "src/xnnpack/compute.h",
2112]
2113
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2114LOGGING_COPTS = select({
2115 # No logging in optimized mode
2116 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
2117 # Full logging in debug mode
2118 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
2119 # Error-only logging in default (fastbuild) mode
2120 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
2121})
2122
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2123LOGGING_SRCS = select({
2124 # No logging in optimized mode
2125 ":optimized_build": [],
2126 "//conditions:default": [
2127 "src/operator-strings.c",
2128 "src/subgraph-strings.c",
2129 ],
2130})
2131
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2132LOGGING_HDRS = [
2133 "src/xnnpack/log.h",
2134]
2135
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2136xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2137 name = "tables",
2138 srcs = TABLE_SRCS,
2139 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2140 gcc_copts = xnnpack_gcc_std_copts(),
2141 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2142)
2143
2144xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2145 name = "scalar_ukernels",
2146 srcs = SCALAR_UKERNELS,
2147 hdrs = INTERNAL_HDRS,
2148 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2149 gcc_copts = xnnpack_gcc_std_copts(),
2150 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2151 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2152 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2153 "@FP16",
2154 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2155 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2156 ],
2157)
2158
2159xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2160 name = "scalar_ukernels_test_mode",
2161 srcs = SCALAR_UKERNELS,
2162 hdrs = INTERNAL_HDRS,
2163 aarch32_copts = ["-marm"],
2164 copts = [
2165 "-UNDEBUG",
2166 "-DXNN_TEST_MODE=1",
2167 ],
2168 gcc_copts = xnnpack_gcc_std_copts(),
2169 msvc_copts = xnnpack_msvc_std_copts(),
2170 deps = [
2171 ":tables",
2172 "@FP16",
2173 "@FXdiv",
2174 "@pthreadpool",
2175 ],
2176)
2177
2178xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2179 name = "wasm_ukernels",
2180 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2181 gcc_copts = xnnpack_gcc_std_copts(),
2182 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2183 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]2184 wasmsimd_copts = [
2185 "-msimd128",
2186 "-munimplemented-simd128",
2187 ],
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]2188 wasmsimd_srcs = WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2189 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2190 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2191 "@FP16",
2192 "@FXdiv",
2193 "@pthreadpool",
2194 ],
2195)
2196
2197xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2198 name = "wasm_ukernels_test_mode",
2199 hdrs = INTERNAL_HDRS,
2200 copts = [
2201 "-UNDEBUG",
2202 "-DXNN_TEST_MODE=1",
2203 ],
2204 gcc_copts = xnnpack_gcc_std_copts(),
2205 msvc_copts = xnnpack_msvc_std_copts(),
2206 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]2207 wasmsimd_copts = [
2208 "-msimd128",
2209 "-munimplemented-simd128",
2210 ],
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]2211 wasmsimd_srcs = WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2212 deps = [
2213 ":tables",
2214 "@FP16",
2215 "@FXdiv",
2216 "@pthreadpool",
2217 ],
2218)
2219
2220xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2221 name = "psimd_fastmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2222 hdrs = INTERNAL_HDRS,
2223 aarch32_copts = [
2224 "-marm",
2225 "-mfpu=neon",
2226 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2227 gcc_copts = xnnpack_gcc_std_copts(),
2228 gcc_x86_copts = ["-msse2"],
2229 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2230 optimized_copts = [
2231 "-O3",
2232 "-ffast-math",
2233 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2234 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2235 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2236 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2237 "@FP16",
2238 "@psimd",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2239 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2240 ],
2241)
2242
2243xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2244 name = "psimd_fastmath_ukernels_test_mode",
2245 hdrs = INTERNAL_HDRS,
2246 aarch32_copts = [
2247 "-marm",
2248 "-mfpu=neon",
2249 ],
2250 copts = [
2251 "-UNDEBUG",
2252 "-DXNN_TEST_MODE=1",
2253 ],
2254 gcc_copts = xnnpack_gcc_std_copts(),
2255 gcc_x86_copts = ["-msse2"],
2256 msvc_copts = xnnpack_msvc_std_copts(),
2257 optimized_copts = [
2258 "-O3",
2259 "-ffast-math",
2260 ],
2261 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
2262 deps = [
2263 ":tables",
2264 "@FP16",
2265 "@psimd",
2266 "@pthreadpool",
2267 ],
2268)
2269
2270xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2271 name = "psimd_accmath_ukernels",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2272 hdrs = INTERNAL_HDRS,
2273 aarch32_copts = [
2274 "-marm",
2275 "-mfpu=neon",
2276 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2277 gcc_copts = xnnpack_gcc_std_copts(),
2278 gcc_x86_copts = ["-msse2"],
2279 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2280 optimized_copts = [
2281 "-O3",
2282 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2283 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2284 deps = [
2285 ":tables",
2286 "@FP16",
2287 "@psimd",
2288 "@pthreadpool",
2289 ],
2290)
2291
2292xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2293 name = "psimd_accmath_ukernels_test_mode",
2294 hdrs = INTERNAL_HDRS,
2295 aarch32_copts = [
2296 "-marm",
2297 "-mfpu=neon",
2298 ],
2299 copts = [
2300 "-UNDEBUG",
2301 "-DXNN_TEST_MODE=1",
2302 ],
2303 gcc_copts = xnnpack_gcc_std_copts(),
2304 gcc_x86_copts = ["-msse2"],
2305 msvc_copts = xnnpack_msvc_std_copts(),
2306 optimized_copts = [
2307 "-O3",
2308 ],
2309 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
2310 deps = [
2311 ":tables",
2312 "@FP16",
2313 "@psimd",
2314 "@pthreadpool",
2315 ],
2316)
2317
2318xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2319 name = "neon_ukernels",
2320 hdrs = INTERNAL_HDRS,
2321 aarch32_copts = [
2322 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2323 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2324 "-mfpu=neon",
2325 ],
2326 aarch32_srcs = NEON_UKERNELS,
2327 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2328 gcc_copts = xnnpack_gcc_std_copts(),
2329 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2330 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2331 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2332 "@FP16",
2333 "@pthreadpool",
2334 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2335)
2336
2337xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2338 name = "neon_ukernels_test_mode",
2339 hdrs = INTERNAL_HDRS,
2340 aarch32_copts = [
2341 "-marm",
2342 "-march=armv7-a",
2343 "-mfpu=neon",
2344 ],
2345 aarch32_srcs = NEON_UKERNELS,
2346 aarch64_srcs = NEON_UKERNELS,
2347 copts = [
2348 "-UNDEBUG",
2349 "-DXNN_TEST_MODE=1",
2350 ],
2351 gcc_copts = xnnpack_gcc_std_copts(),
2352 msvc_copts = xnnpack_msvc_std_copts(),
2353 deps = [
2354 ":tables",
2355 "@FP16",
2356 "@pthreadpool",
2357 ],
2358)
2359
2360xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2361 name = "neonfma_ukernels",
2362 hdrs = INTERNAL_HDRS,
2363 aarch32_copts = [
2364 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2365 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2366 "-mfpu=neon-vfpv4",
2367 ],
2368 aarch32_srcs = NEONFMA_UKERNELS,
2369 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2370 apple_aarch32_copts = [
2371 "-mcpu=swift",
2372 "-mtune=generic",
2373 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2374 gcc_copts = xnnpack_gcc_std_copts(),
2375 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2376 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2377 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2378 "@FP16",
2379 "@pthreadpool",
2380 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2381)
2382
2383xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2384 name = "neonfma_ukernels_test_mode",
2385 hdrs = INTERNAL_HDRS,
2386 aarch32_copts = [
2387 "-marm",
2388 "-march=armv7-a",
2389 "-mfpu=neon-vfpv4",
2390 ],
2391 aarch32_srcs = NEONFMA_UKERNELS,
2392 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2393 apple_aarch32_copts = [
2394 "-mcpu=swift",
2395 "-mtune=generic",
2396 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2397 copts = [
2398 "-UNDEBUG",
2399 "-DXNN_TEST_MODE=1",
2400 ],
2401 gcc_copts = xnnpack_gcc_std_copts(),
2402 msvc_copts = xnnpack_msvc_std_copts(),
2403 deps = [
2404 ":tables",
2405 "@FP16",
2406 "@pthreadpool",
2407 ],
2408)
2409
2410xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2411 name = "neonv8_ukernels",
2412 hdrs = INTERNAL_HDRS,
2413 aarch32_copts = [
2414 "-marm",
2415 "-march=armv8-a",
2416 "-mfpu=neon-fp-armv8",
2417 ],
2418 aarch32_srcs = NEONV8_UKERNELS,
2419 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2420 apple_aarch32_copts = [
2421 "-mcpu=cyclone",
2422 "-mtune=generic",
2423 ],
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2424 gcc_copts = xnnpack_gcc_std_copts(),
2425 msvc_copts = xnnpack_msvc_std_copts(),
2426 deps = [
2427 ":tables",
2428 "@FP16",
2429 "@pthreadpool",
2430 ],
2431)
2432
2433xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2434 name = "neonv8_ukernels_test_mode",
2435 hdrs = INTERNAL_HDRS,
2436 aarch32_copts = [
2437 "-marm",
2438 "-march=armv8-a",
2439 "-mfpu=neon-fp-armv8",
2440 ],
2441 aarch32_srcs = NEONV8_UKERNELS,
2442 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2443 apple_aarch32_copts = [
2444 "-mcpu=cyclone",
2445 "-mtune=generic",
2446 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2447 copts = [
2448 "-UNDEBUG",
2449 "-DXNN_TEST_MODE=1",
2450 ],
2451 gcc_copts = xnnpack_gcc_std_copts(),
2452 msvc_copts = xnnpack_msvc_std_copts(),
2453 deps = [
2454 ":tables",
2455 "@FP16",
2456 "@pthreadpool",
2457 ],
2458)
2459
2460xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2461 name = "neonfp16arith_ukernels",
2462 hdrs = INTERNAL_HDRS,
2463 aarch64_copts = ["-march=armv8.2-a+fp16"],
2464 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2465 gcc_copts = xnnpack_gcc_std_copts(),
2466 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2467 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2468 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2469 "@FP16",
2470 "@pthreadpool",
2471 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2472)
2473
2474xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2475 name = "neonfp16arith_ukernels_test_mode",
2476 hdrs = INTERNAL_HDRS,
2477 aarch64_copts = ["-march=armv8.2-a+fp16"],
2478 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
2479 copts = [
2480 "-UNDEBUG",
2481 "-DXNN_TEST_MODE=1",
2482 ],
2483 gcc_copts = xnnpack_gcc_std_copts(),
2484 msvc_copts = xnnpack_msvc_std_copts(),
2485 deps = [
2486 ":tables",
2487 "@FP16",
2488 "@pthreadpool",
2489 ],
2490)
2491
2492xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2493 name = "sse2_ukernels",
2494 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2495 gcc_copts = xnnpack_gcc_std_copts(),
2496 gcc_x86_copts = ["-msse2"],
2497 msvc_copts = xnnpack_msvc_std_copts(),
2498 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2499 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2500 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2501 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2502 "@FP16",
2503 "@pthreadpool",
2504 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2505)
2506
2507xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2508 name = "sse2_ukernels_test_mode",
2509 hdrs = INTERNAL_HDRS,
2510 copts = [
2511 "-UNDEBUG",
2512 "-DXNN_TEST_MODE=1",
2513 ],
2514 gcc_copts = xnnpack_gcc_std_copts(),
2515 gcc_x86_copts = ["-msse2"],
2516 msvc_copts = xnnpack_msvc_std_copts(),
2517 msvc_x86_32_copts = ["/arch:SSE2"],
2518 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
2519 deps = [
2520 ":tables",
2521 "@FP16",
2522 "@pthreadpool",
2523 ],
2524)
2525
2526xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2527 name = "ssse3_ukernels",
2528 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2529 gcc_copts = xnnpack_gcc_std_copts(),
2530 gcc_x86_copts = ["-mssse3"],
2531 msvc_copts = xnnpack_msvc_std_copts(),
2532 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2533 x86_srcs = SSSE3_UKERNELS,
2534 deps = [
2535 ":tables",
2536 "@FP16",
2537 "@pthreadpool",
2538 ],
2539)
2540
2541xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2542 name = "ssse3_ukernels_test_mode",
2543 hdrs = INTERNAL_HDRS,
2544 copts = [
2545 "-UNDEBUG",
2546 "-DXNN_TEST_MODE=1",
2547 ],
2548 gcc_copts = xnnpack_gcc_std_copts(),
2549 gcc_x86_copts = ["-mssse3"],
2550 msvc_copts = xnnpack_msvc_std_copts(),
2551 msvc_x86_32_copts = ["/arch:SSE2"],
2552 x86_srcs = SSSE3_UKERNELS,
2553 deps = [
2554 ":tables",
2555 "@FP16",
2556 "@pthreadpool",
2557 ],
2558)
2559
2560xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2561 name = "sse41_ukernels",
2562 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2563 gcc_copts = xnnpack_gcc_std_copts(),
2564 gcc_x86_copts = ["-msse4.1"],
2565 msvc_copts = xnnpack_msvc_std_copts(),
2566 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2567 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2568 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2569 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2570 "@FP16",
2571 "@pthreadpool",
2572 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2573)
2574
2575xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2576 name = "sse41_ukernels_test_mode",
2577 hdrs = INTERNAL_HDRS,
2578 copts = [
2579 "-UNDEBUG",
2580 "-DXNN_TEST_MODE=1",
2581 ],
2582 gcc_copts = xnnpack_gcc_std_copts(),
2583 gcc_x86_copts = ["-msse4.1"],
2584 msvc_copts = xnnpack_msvc_std_copts(),
2585 msvc_x86_32_copts = ["/arch:SSE2"],
2586 x86_srcs = SSE41_UKERNELS,
2587 deps = [
2588 ":tables",
2589 "@FP16",
2590 "@pthreadpool",
2591 ],
2592)
2593
2594xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2595 name = "avx_ukernels",
2596 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2597 gcc_copts = xnnpack_gcc_std_copts(),
2598 gcc_x86_copts = ["-mavx"],
2599 msvc_copts = xnnpack_msvc_std_copts(),
2600 msvc_x86_32_copts = ["/arch:AVX"],
2601 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2602 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2603 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2604 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2605 "@FP16",
2606 "@pthreadpool",
2607 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2608)
2609
2610xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2611 name = "avx_ukernels_test_mode",
2612 hdrs = INTERNAL_HDRS,
2613 copts = [
2614 "-UNDEBUG",
2615 "-DXNN_TEST_MODE=1",
2616 ],
2617 gcc_copts = xnnpack_gcc_std_copts(),
2618 gcc_x86_copts = ["-mavx"],
2619 msvc_copts = xnnpack_msvc_std_copts(),
2620 msvc_x86_32_copts = ["/arch:AVX"],
2621 msvc_x86_64_copts = ["/arch:AVX"],
2622 x86_srcs = AVX_UKERNELS,
2623 deps = [
2624 ":tables",
2625 "@FP16",
2626 "@pthreadpool",
2627 ],
2628)
2629
2630xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2631 name = "fma3_ukernels",
2632 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2633 gcc_copts = xnnpack_gcc_std_copts(),
2634 gcc_x86_copts = ["-mfma"],
2635 msvc_copts = xnnpack_msvc_std_copts(),
2636 msvc_x86_32_copts = ["/arch:AVX"],
2637 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2638 x86_srcs = FMA3_UKERNELS,
2639 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2640 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2641 "@FP16",
2642 "@pthreadpool",
2643 ],
2644)
2645
2646xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2647 name = "fma3_ukernels_test_mode",
2648 hdrs = INTERNAL_HDRS,
2649 copts = [
2650 "-UNDEBUG",
2651 "-DXNN_TEST_MODE=1",
2652 ],
2653 gcc_copts = xnnpack_gcc_std_copts(),
2654 gcc_x86_copts = ["-mfma"],
2655 msvc_copts = xnnpack_msvc_std_copts(),
2656 msvc_x86_32_copts = ["/arch:AVX"],
2657 msvc_x86_64_copts = ["/arch:AVX"],
2658 x86_srcs = FMA3_UKERNELS,
2659 deps = [
2660 ":tables",
2661 "@FP16",
2662 "@pthreadpool",
2663 ],
2664)
2665
2666xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2667 name = "avx2_ukernels",
2668 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2669 gcc_copts = xnnpack_gcc_std_copts(),
2670 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2671 "-mfma",
2672 "-mavx2",
2673 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2674 msvc_copts = xnnpack_msvc_std_copts(),
2675 msvc_x86_32_copts = ["/arch:AVX2"],
2676 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2677 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2678 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2679 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2680 "@FP16",
2681 "@pthreadpool",
2682 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2683)
2684
2685xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2686 name = "avx2_ukernels_test_mode",
2687 hdrs = INTERNAL_HDRS,
2688 copts = [
2689 "-UNDEBUG",
2690 "-DXNN_TEST_MODE=1",
2691 ],
2692 gcc_copts = xnnpack_gcc_std_copts(),
2693 gcc_x86_copts = [
2694 "-mfma",
2695 "-mavx2",
2696 ],
2697 msvc_copts = xnnpack_msvc_std_copts(),
2698 msvc_x86_32_copts = ["/arch:AVX2"],
2699 msvc_x86_64_copts = ["/arch:AVX2"],
2700 x86_srcs = AVX2_UKERNELS,
2701 deps = [
2702 ":tables",
2703 "@FP16",
2704 "@pthreadpool",
2705 ],
2706)
2707
2708xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2709 name = "avx512f_ukernels",
2710 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2711 gcc_copts = xnnpack_gcc_std_copts(),
2712 gcc_x86_copts = ["-mavx512f"],
2713 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2714 msvc_copts = xnnpack_msvc_std_copts(),
2715 msvc_x86_32_copts = ["/arch:AVX512"],
2716 msvc_x86_64_copts = ["/arch:AVX512"],
2717 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2718 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2719 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2720 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2721 "@FP16",
2722 "@pthreadpool",
2723 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2724)
2725
2726xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2727 name = "avx512f_ukernels_test_mode",
2728 hdrs = INTERNAL_HDRS,
2729 copts = [
2730 "-UNDEBUG",
2731 "-DXNN_TEST_MODE=1",
2732 ],
2733 gcc_copts = xnnpack_gcc_std_copts(),
2734 gcc_x86_copts = ["-mavx512f"],
2735 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2736 msvc_copts = xnnpack_msvc_std_copts(),
2737 msvc_x86_32_copts = ["/arch:AVX512"],
2738 msvc_x86_64_copts = ["/arch:AVX512"],
2739 msys_copts = ["-fno-asynchronous-unwind-tables"],
2740 x86_srcs = AVX512F_UKERNELS,
2741 deps = [
2742 ":tables",
2743 "@FP16",
2744 "@pthreadpool",
2745 ],
2746)
2747
2748xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2749 name = "asm_ukernels",
2750 hdrs = ["src/xnnpack/assembly.h"],
2751 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2752 aarch64_copts = ["-march=armv8.2-a+fp16"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2753 aarch64_srcs = AARCH64_ASM_UKERNELS,
2754)
2755
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2756xnnpack_cc_library(
2757 name = "logging_utils",
2758 srcs = LOGGING_SRCS,
2759 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2760 copts = LOGGING_COPTS + [
2761 "-Isrc",
2762 "-Iinclude",
2763 ] + select({
2764 ":debug_build": [],
2765 "//conditions:default": xnnpack_min_size_copts(),
2766 }),
2767 gcc_copts = xnnpack_gcc_std_copts(),
2768 msvc_copts = xnnpack_msvc_std_copts(),
2769 visibility = xnnpack_visibility(),
2770 deps = [
2771 "@FP16",
2772 "@clog",
2773 "@pthreadpool",
2774 ],
2775)
2776
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2777xnnpack_aggregate_library(
2778 name = "ukernels",
2779 aarch32_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2780 ":neon_ukernels",
2781 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2782 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2783 ":asm_ukernels",
2784 ],
2785 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2786 ":neon_ukernels",
2787 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2788 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2789 ":neonfp16arith_ukernels",
2790 ":asm_ukernels",
2791 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2792 generic_deps = [
2793 ":scalar_ukernels",
2794 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2795 psimd_deps = [
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2796 ":psimd_fastmath_ukernels",
2797 ":psimd_accmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2798 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2799 wasm_deps = [
2800 ":wasm_ukernels",
2801 ],
2802 wasmsimd_deps = [
2803 ":wasm_ukernels",
2804 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2805 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2806 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2807 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2808 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2809 ":avx_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2810 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2811 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2812 ":avx512f_ukernels",
2813 ],
2814)
2815
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2816xnnpack_aggregate_library(
2817 name = "ukernels_test_mode",
2818 aarch32_deps = [
2819 ":neon_ukernels_test_mode",
2820 ":neonfma_ukernels_test_mode",
2821 ":neonv8_ukernels_test_mode",
2822 ":asm_ukernels",
2823 ],
2824 aarch64_deps = [
2825 ":neon_ukernels_test_mode",
2826 ":neonfma_ukernels_test_mode",
2827 ":neonv8_ukernels_test_mode",
2828 ":neonfp16arith_ukernels_test_mode",
2829 ":asm_ukernels",
2830 ],
2831 generic_deps = [
2832 ":scalar_ukernels_test_mode",
2833 ],
2834 psimd_deps = [
2835 ":psimd_fastmath_ukernels_test_mode",
2836 ":psimd_accmath_ukernels_test_mode",
2837 ],
2838 wasm_deps = [
2839 ":wasm_ukernels_test_mode",
2840 ],
2841 wasmsimd_deps = [
2842 ":wasm_ukernels_test_mode",
2843 ],
2844 x86_deps = [
2845 ":sse2_ukernels_test_mode",
2846 ":ssse3_ukernels_test_mode",
2847 ":sse41_ukernels_test_mode",
2848 ":avx_ukernels_test_mode",
2849 ":fma3_ukernels_test_mode",
2850 ":avx2_ukernels_test_mode",
2851 ":avx512f_ukernels_test_mode",
2852 ],
2853)
2854
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]2855xnnpack_aggregate_library(
2856 name = "ukernels_no_f16",
2857 aarch32_deps = [
2858 ":neon_ukernels",
2859 ":neonfma_ukernels",
2860 ":neonv8_ukernels",
2861 ":asm_ukernels",
2862 ],
2863 aarch64_deps = [
2864 ":neon_ukernels",
2865 ":neonfma_ukernels",
2866 ":neonv8_ukernels",
2867 ":asm_ukernels",
2868 ],
2869 generic_deps = [
2870 ":scalar_ukernels",
2871 ],
2872 psimd_deps = [
2873 ":psimd_fastmath_ukernels",
2874 ":psimd_accmath_ukernels",
2875 ],
2876 wasm_deps = [
2877 ":wasm_ukernels",
2878 ],
2879 wasmsimd_deps = [
2880 ":wasm_ukernels",
2881 ],
2882 x86_deps = [
2883 ":sse2_ukernels",
2884 ":ssse3_ukernels",
2885 ":sse41_ukernels",
2886 ":avx_ukernels",
2887 ":fma3_ukernels",
2888 ":avx2_ukernels",
2889 ":avx512f_ukernels",
2890 ],
2891)
2892
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2893xnnpack_cc_library(
2894 name = "im2col",
2895 srcs = ["src/im2col.c"],
2896 hdrs = [
2897 "src/xnnpack/common.h",
2898 "src/xnnpack/im2col.h",
2899 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2900 gcc_copts = xnnpack_gcc_std_copts(),
2901 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2902)
2903
2904xnnpack_cc_library(
2905 name = "indirection",
2906 srcs = ["src/indirection.c"],
2907 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2908 gcc_copts = xnnpack_gcc_std_copts(),
2909 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2910 deps = [
2911 "@FP16",
2912 "@FXdiv",
2913 "@pthreadpool",
2914 ],
2915)
2916
2917xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2918 name = "indirection_test_mode",
2919 srcs = ["src/indirection.c"],
2920 hdrs = INTERNAL_HDRS,
2921 copts = [
2922 "-UNDEBUG",
2923 "-DXNN_TEST_MODE=1",
2924 ],
2925 gcc_copts = xnnpack_gcc_std_copts(),
2926 msvc_copts = xnnpack_msvc_std_copts(),
2927 deps = [
2928 "@FP16",
2929 "@FXdiv",
2930 "@pthreadpool",
2931 ],
2932)
2933
2934xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2935 name = "operator_run",
2936 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2937 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2938 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2939 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2940 "//conditions:default": [],
2941 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2942 gcc_copts = xnnpack_gcc_std_copts(),
2943 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2944 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2945 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2946 "@FP16",
2947 "@FXdiv",
2948 "@clog",
2949 "@pthreadpool",
2950 ],
2951)
2952
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2953xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2954 name = "operator_run_test_mode",
2955 srcs = ["src/operator-run.c"],
2956 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2957 copts = LOGGING_COPTS + [
2958 "-UNDEBUG",
2959 "-DXNN_TEST_MODE=1",
2960 ] + select({
2961 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2962 "//conditions:default": [],
2963 }),
2964 gcc_copts = xnnpack_gcc_std_copts(),
2965 msvc_copts = xnnpack_msvc_std_copts(),
2966 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2967 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2968 "@FP16",
2969 "@FXdiv",
2970 "@clog",
2971 "@pthreadpool",
2972 ],
2973)
2974
2975xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2976 name = "memory_planner",
2977 srcs = ["src/memory-planner.c"],
2978 hdrs = INTERNAL_HDRS,
2979 defines = select({
2980 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
2981 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
2982 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
2983 }),
2984 gcc_copts = xnnpack_gcc_std_copts(),
2985 msvc_copts = xnnpack_msvc_std_copts(),
2986 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2987 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2988 "@pthreadpool",
2989 ],
2990)
2991
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2992xnnpack_cc_library(
2993 name = "memory_planner_test_mode",
2994 srcs = ["src/memory-planner.c"],
2995 hdrs = INTERNAL_HDRS,
2996 copts = [
2997 "-UNDEBUG",
2998 "-DXNN_TEST_MODE=1",
2999 ],
3000 defines = select({
3001 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
3002 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
3003 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
3004 }),
3005 gcc_copts = xnnpack_gcc_std_copts(),
3006 msvc_copts = xnnpack_msvc_std_copts(),
3007 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3008 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3009 "@pthreadpool",
3010 ],
3011)
3012
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3013cc_library(
3014 name = "enable_assembly",
3015 defines = select({
3016 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
3017 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -0700[diff] [blame]3018 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3019 }),
3020)
3021
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3022xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3023 name = "operators",
3024 srcs = OPERATOR_SRCS + [
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]3025 "src/memory.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3026 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3027 ],
3028 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3029 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3030 "-Isrc",
3031 "-Iinclude",
3032 ] + select({
3033 ":debug_build": [],
3034 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3035 }) + select({
3036 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3037 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3038 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3039 gcc_copts = xnnpack_gcc_std_copts(),
3040 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3041 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3042 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3043 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3044 "@FP16",
3045 "@FXdiv",
3046 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3047 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3048 ],
3049)
3050
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3051xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3052 name = "operators_test_mode",
3053 srcs = OPERATOR_SRCS + [
3054 "src/memory.c",
3055 "src/operator-delete.c",
3056 ],
3057 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
3058 copts = LOGGING_COPTS + [
3059 "-Isrc",
3060 "-Iinclude",
3061 "-UNDEBUG",
3062 "-DXNN_TEST_MODE=1",
3063 ] + select({
3064 ":debug_build": [],
3065 "//conditions:default": xnnpack_min_size_copts(),
3066 }) + select({
3067 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3068 "//conditions:default": [],
3069 }),
3070 gcc_copts = xnnpack_gcc_std_copts(),
3071 msvc_copts = xnnpack_msvc_std_copts(),
3072 deps = [
3073 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3074 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3075 "@FP16",
3076 "@FXdiv",
3077 "@clog",
3078 "@pthreadpool",
3079 ],
3080)
3081
3082xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3083 name = "XNNPACK",
3084 srcs = [
3085 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -0800[diff] [blame]3086 "src/runtime.c",
3087 "src/subgraph.c",
3088 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3089 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3090 hdrs = ["include/xnnpack.h"],
3091 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3092 "-Isrc",
3093 "-Iinclude",
3094 ] + select({
3095 ":debug_build": [],
3096 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3097 }) + select({
3098 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3099 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3100 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3101 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3102 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3103 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3104 visibility = xnnpack_visibility(),
3105 deps = [
3106 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3107 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3108 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3109 ":operator_run",
3110 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3111 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3112 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -0700[diff] [blame]3113 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3114 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -0700[diff] [blame]3115 ] + select({
3116 ":emscripten": [],
3117 "//conditions:default": ["@cpuinfo"],
3118 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3119)
3120
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3121xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3122 name = "XNNPACK_test_mode",
3123 srcs = [
3124 "src/init.c",
3125 "src/runtime.c",
3126 "src/subgraph.c",
3127 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3128 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3129 hdrs = ["include/xnnpack.h"],
3130 copts = LOGGING_COPTS + [
3131 "-Isrc",
3132 "-Iinclude",
3133 "-UNDEBUG",
3134 "-DXNN_TEST_MODE=1",
3135 ] + select({
3136 ":debug_build": [],
3137 "//conditions:default": xnnpack_min_size_copts(),
3138 }) + select({
3139 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3140 "//conditions:default": [],
3141 }),
3142 gcc_copts = xnnpack_gcc_std_copts(),
3143 includes = ["include"],
3144 msvc_copts = xnnpack_msvc_std_copts(),
3145 visibility = xnnpack_visibility(),
3146 deps = [
3147 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3148 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3149 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3150 ":operator_run_test_mode",
3151 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3152 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3153 "@clog",
3154 "@FP16",
3155 "@pthreadpool",
3156 ] + select({
3157 ":emscripten": [],
3158 "//conditions:default": ["@cpuinfo"],
3159 }),
3160)
3161
3162xnnpack_cc_library(
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3163 name = "xnnpack_f32",
3164 srcs = [
3165 "src/init.c",
3166 "src/runtime.c",
3167 "src/subgraph.c",
3168 "src/tensor.c",
3169 ] + SUBGRAPH_SRCS,
3170 hdrs = ["include/xnnpack.h"],
3171 copts = LOGGING_COPTS + [
3172 "-Isrc",
3173 "-Iinclude",
3174 ] + select({
3175 ":debug_build": [],
3176 "//conditions:default": xnnpack_min_size_copts(),
3177 }) + select({
3178 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3179 "//conditions:default": [],
3180 }),
3181 defines = [
3182 "XNN_NO_Q8_OPERATORS",
3183 "XNN_NO_U8_OPERATORS",
3184 "XNN_NO_X8_OPERATORS",
3185 "XNN_NO_F16_OPERATORS",
3186 "XNN_NO_X16_OPERATORS",
3187 ],
3188 gcc_copts = xnnpack_gcc_std_copts(),
3189 includes = ["include"],
3190 msvc_copts = xnnpack_msvc_std_copts(),
3191 visibility = xnnpack_visibility(),
3192 deps = [
3193 ":enable_assembly",
3194 ":logging_utils",
3195 ":memory_planner",
3196 ":operator_run",
3197 ":operators",
3198 ":ukernels_no_f16",
3199 "@clog",
3200 "@FP16",
3201 "@pthreadpool",
3202 ] + select({
3203 ":emscripten": [],
3204 "//conditions:default": ["@cpuinfo"],
3205 }),
3206)
3207
3208xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3209 name = "xnnpack_operators_nhwc_f32",
3210 srcs = [
3211 "src/init.c",
3212 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3213 hdrs = ["include/xnnpack.h"],
3214 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3215 "-Isrc",
3216 "-Iinclude",
3217 ] + select({
3218 ":debug_build": [],
3219 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3220 }) + select({
3221 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3222 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3223 }),
3224 defines = [
3225 "XNN_NO_Q8_OPERATORS",
3226 "XNN_NO_U8_OPERATORS",
3227 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]3228 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3229 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3230 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3231 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3232 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3233 visibility = xnnpack_visibility(),
3234 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3235 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3236 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3237 ":operator_run",
3238 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3239 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3240 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3241 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3242 ] + select({
3243 ":emscripten": [],
3244 "//conditions:default": ["@cpuinfo"],
3245 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3246)
3247
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3248xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3249 name = "bench_utils",
3250 srcs = ["bench/utils.cc"],
3251 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -0800[diff] [blame]3252 deps = [
3253 "@com_google_benchmark//:benchmark",
3254 "@cpuinfo",
3255 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3256)
3257
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3258######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3259
3260xnnpack_benchmark(
3261 name = "q8_gemm_bench",
3262 srcs = [
3263 "bench/gemm.h",
3264 "bench/q8-gemm.cc",
3265 "src/xnnpack/AlignedAllocator.h",
3266 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3267 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3268 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
3269)
3270
3271xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]3272 name = "f16_igemm_bench",
3273 srcs = [
3274 "bench/f16-igemm.cc",
3275 "bench/conv.h",
3276 "bench/google/conv.h",
3277 "src/xnnpack/AlignedAllocator.h",
3278 ] + MICROKERNEL_BENCHMARK_HDRS,
3279 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3280)
3281
3282xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3283 name = "f16_gemm_bench",
3284 srcs = [
3285 "bench/f16-gemm.cc",
3286 "bench/gemm.h",
3287 "src/xnnpack/AlignedAllocator.h",
3288 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3289 deps = MICROKERNEL_BENCHMARK_DEPS,
3290)
3291
3292xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3293 name = "f16_spmm_bench",
3294 srcs = [
3295 "bench/f16-spmm.cc",
3296 "bench/gemm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3297 "src/xnnpack/AlignedAllocator.h",
3298 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3299 deps = MICROKERNEL_BENCHMARK_DEPS,
3300)
3301
3302xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3303 name = "f32_igemm_bench",
3304 srcs = [
3305 "bench/f32-igemm.cc",
3306 "bench/conv.h",
3307 "src/xnnpack/AlignedAllocator.h",
3308 ] + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3309 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3310)
3311
3312xnnpack_benchmark(
3313 name = "f32_conv_hwc_bench",
3314 srcs = [
3315 "bench/f32-conv-hwc.cc",
3316 "bench/dconv.h",
3317 "src/xnnpack/AlignedAllocator.h",
3318 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3319 deps = MICROKERNEL_BENCHMARK_DEPS,
3320)
3321
3322xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3323 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3324 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3325 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3326 "bench/dconv.h",
3327 "src/xnnpack/AlignedAllocator.h",
3328 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3329 deps = MICROKERNEL_BENCHMARK_DEPS,
3330)
3331
3332xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3333 name = "f16_dwconv_bench",
3334 srcs = [
3335 "bench/f16-dwconv.cc",
3336 "bench/dwconv.h",
3337 "bench/google/dwconv.h",
3338 "src/xnnpack/AlignedAllocator.h",
3339 ] + MICROKERNEL_BENCHMARK_HDRS,
3340 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3341)
3342
3343xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3344 name = "f32_dwconv_bench",
3345 srcs = [
3346 "bench/f32-dwconv.cc",
3347 "bench/dwconv.h",
3348 "src/xnnpack/AlignedAllocator.h",
3349 ] + MICROKERNEL_BENCHMARK_HDRS,
3350 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3351)
3352
3353xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3354 name = "f32_dwconv_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3355 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3356 "bench/f32-dwconv-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3357 "bench/dwconv.h",
3358 "src/xnnpack/AlignedAllocator.h",
3359 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3360 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3361)
3362
3363xnnpack_benchmark(
3364 name = "f32_gemm_bench",
3365 srcs = [
3366 "bench/f32-gemm.cc",
3367 "bench/gemm.h",
3368 "src/xnnpack/AlignedAllocator.h",
3369 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3370 copts = xnnpack_optional_ruy_copts(),
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3371 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3372)
3373
3374xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3375 name = "f32_raddexpminusmax_bench",
3376 srcs = [
3377 "bench/f32-raddexpminusmax.cc",
3378 "src/xnnpack/AlignedAllocator.h",
3379 ] + MICROKERNEL_BENCHMARK_HDRS,
3380 deps = MICROKERNEL_BENCHMARK_DEPS,
3381)
3382
3383xnnpack_benchmark(
3384 name = "f32_raddextexp_bench",
3385 srcs = [
3386 "bench/f32-raddextexp.cc",
3387 "src/xnnpack/AlignedAllocator.h",
3388 ] + MICROKERNEL_BENCHMARK_HDRS,
3389 deps = MICROKERNEL_BENCHMARK_DEPS,
3390)
3391
3392xnnpack_benchmark(
3393 name = "f32_raddstoreexpminusmax_bench",
3394 srcs = [
3395 "bench/f32-raddstoreexpminusmax.cc",
3396 "src/xnnpack/AlignedAllocator.h",
3397 ] + MICROKERNEL_BENCHMARK_HDRS,
3398 deps = MICROKERNEL_BENCHMARK_DEPS,
3399)
3400
3401xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3402 name = "f32_rmax_bench",
3403 srcs = [
3404 "bench/f32-rmax.cc",
3405 "src/xnnpack/AlignedAllocator.h",
3406 ] + MICROKERNEL_BENCHMARK_HDRS,
3407 deps = MICROKERNEL_BENCHMARK_DEPS,
3408)
3409
3410xnnpack_benchmark(
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3411 name = "f32_sigmoid_bench",
3412 srcs = [
3413 "bench/f32-sigmoid.cc",
3414 "src/xnnpack/AlignedAllocator.h",
3415 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3416 deps = MICROKERNEL_BENCHMARK_DEPS,
3417)
3418
3419xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3420 name = "f32_spmm_bench",
3421 srcs = [
3422 "bench/f32-spmm.cc",
3423 "bench/gemm.h",
3424 "src/xnnpack/AlignedAllocator.h",
3425 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3426 deps = MICROKERNEL_BENCHMARK_DEPS,
3427)
3428
3429xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3430 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3431 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3432 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3433 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3434 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -0800[diff] [blame]3435 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3436)
3437
3438xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3439 name = "f32_vscaleexpminusmax_bench",
3440 srcs = [
3441 "bench/f32-vscaleexpminusmax.cc",
3442 "src/xnnpack/AlignedAllocator.h",
3443 ] + MICROKERNEL_BENCHMARK_HDRS,
3444 deps = MICROKERNEL_BENCHMARK_DEPS,
3445)
3446
3447xnnpack_benchmark(
3448 name = "f32_vscaleextexp_bench",
3449 srcs = [
3450 "bench/f32-vscaleextexp.cc",
3451 "src/xnnpack/AlignedAllocator.h",
3452 ] + MICROKERNEL_BENCHMARK_HDRS,
3453 deps = MICROKERNEL_BENCHMARK_DEPS,
3454)
3455
3456xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3457 name = "f32_im2col_gemm_bench",
3458 srcs = [
3459 "bench/f32-im2col-gemm.cc",
3460 "bench/conv.h",
3461 "src/xnnpack/AlignedAllocator.h",
3462 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3463 deps = MICROKERNEL_BENCHMARK_DEPS + [":im2col"],
3464)
3465
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]3466xnnpack_benchmark(
3467 name = "requantization_bench",
3468 srcs = [
3469 "bench/requantization.cc",
3470 "src/xnnpack/requantization-stubs.h",
3471 "src/xnnpack/AlignedAllocator.h",
3472 ] + MICROKERNEL_BENCHMARK_HDRS,
3473 deps = MICROKERNEL_BENCHMARK_DEPS,
3474)
3475
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]3476xnnpack_benchmark(
3477 name = "rounding_bench",
3478 srcs = [
3479 "bench/rounding.cc",
3480 "src/xnnpack/math-stubs.h",
3481 "src/xnnpack/AlignedAllocator.h",
3482 ] + MICROKERNEL_BENCHMARK_HDRS,
3483 deps = MICROKERNEL_BENCHMARK_DEPS,
3484)
3485
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3486########################### Benchmarks for operators ###########################
3487
3488xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3489 name = "average_pooling_bench",
3490 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -0700[diff] [blame]3491 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3492 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3493 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3494)
3495
3496xnnpack_benchmark(
3497 name = "channel_shuffle_bench",
3498 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3499 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3500)
3501
3502xnnpack_benchmark(
3503 name = "convolution_bench",
3504 srcs = ["bench/convolution.cc"],
3505 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3506 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3507 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3508)
3509
3510xnnpack_benchmark(
3511 name = "deconvolution_bench",
3512 srcs = ["bench/deconvolution.cc"],
3513 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3514 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3515 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3516)
3517
3518xnnpack_benchmark(
3519 name = "global_average_pooling_bench",
3520 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3521 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3522)
3523
3524xnnpack_benchmark(
3525 name = "max_pooling_bench",
3526 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3527 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3528)
3529
3530xnnpack_benchmark(
3531 name = "sigmoid_bench",
3532 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -0800[diff] [blame]3533 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3534 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3535 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3536)
3537
3538xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3539 name = "prelu_bench",
3540 srcs = ["bench/prelu.cc"],
3541 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3542 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3543 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3544)
3545
3546xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3547 name = "softmax_bench",
3548 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -0800[diff] [blame]3549 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3550 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3551 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3552)
3553
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3554############################# End-to-end benchmarks ############################
3555
3556cc_library(
3557 name = "mobilenet_v1",
3558 srcs = ["models/mobilenet-v1.cc"],
3559 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3560 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3561 linkstatic = True,
3562 deps = [
3563 ":XNNPACK",
3564 "@pthreadpool",
3565 ],
3566)
3567
3568cc_library(
3569 name = "mobilenet_v2",
3570 srcs = ["models/mobilenet-v2.cc"],
3571 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3572 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3573 linkstatic = True,
3574 deps = [
3575 ":XNNPACK",
3576 "@pthreadpool",
3577 ],
3578)
3579
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3580cc_library(
3581 name = "mobilenet_v3_large",
3582 srcs = ["models/mobilenet-v3-large.cc"],
3583 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3584 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3585 linkstatic = True,
3586 deps = [
3587 ":XNNPACK",
3588 "@pthreadpool",
3589 ],
3590)
3591
3592cc_library(
3593 name = "mobilenet_v3_small",
3594 srcs = ["models/mobilenet-v3-small.cc"],
3595 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3596 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3597 linkstatic = True,
3598 deps = [
3599 ":XNNPACK",
3600 "@pthreadpool",
3601 ],
3602)
3603
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3604xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3605 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3606 srcs = [
3607 "bench/f32-dwconv-e2e.cc",
3608 "bench/end2end.h",
3609 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3610 deps = MICROKERNEL_BENCHMARK_DEPS + [
3611 ":XNNPACK",
3612 ":mobilenet_v1",
3613 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3614 ":mobilenet_v3_large",
3615 ":mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3616 ],
3617)
3618
3619xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3620 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3621 srcs = [
3622 "bench/f32-gemm-e2e.cc",
3623 "bench/end2end.h",
3624 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3625 deps = MICROKERNEL_BENCHMARK_DEPS + [
3626 ":XNNPACK",
3627 ":mobilenet_v1",
3628 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3629 ":mobilenet_v3_large",
3630 ":mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3631 ],
3632)
3633
3634xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3635 name = "end2end_bench",
3636 srcs = ["bench/end2end.cc"],
3637 deps = [
3638 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -0700[diff] [blame]3639 ":bench_utils",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3640 ":mobilenet_v1",
3641 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3642 ":mobilenet_v3_large",
3643 ":mobilenet_v3_small",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3644 "@pthreadpool",
3645 ],
3646)
3647
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]3648#################### Accuracy evaluation for math functions ####################
3649
3650xnnpack_benchmark(
3651 name = "f32_exp_eval",
3652 srcs = [
3653 "eval/f32-exp.cc",
3654 "src/xnnpack/AlignedAllocator.h",
3655 ] + ACCURACY_EVAL_HDRS,
3656 deps = ACCURACY_EVAL_DEPS,
3657)
3658
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]3659xnnpack_benchmark(
3660 name = "f32_expminus_eval",
3661 srcs = [
3662 "eval/f32-expminus.cc",
3663 "src/xnnpack/AlignedAllocator.h",
3664 ] + ACCURACY_EVAL_HDRS,
3665 deps = ACCURACY_EVAL_DEPS,
3666)
3667
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]3668xnnpack_benchmark(
3669 name = "f32_extexp_eval",
3670 srcs = [
3671 "eval/f32-extexp.cc",
3672 "src/xnnpack/AlignedAllocator.h",
3673 ] + ACCURACY_EVAL_HDRS,
3674 deps = ACCURACY_EVAL_DEPS,
3675)
3676
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3677xnnpack_unit_test(
3678 name = "f32_roundne_eval",
3679 srcs = [
3680 "eval/f32-roundne.cc",
3681 "src/xnnpack/AlignedAllocator.h",
3682 "src/xnnpack/math-stubs.h",
3683 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -0700[diff] [blame]3684 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3685 deps = MICROKERNEL_TEST_DEPS,
3686)
3687
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3688xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3689 name = "f32_roundd_eval",
3690 srcs = [
3691 "eval/f32-roundd.cc",
3692 "src/xnnpack/AlignedAllocator.h",
3693 "src/xnnpack/math-stubs.h",
3694 ] + MICROKERNEL_TEST_HDRS,
3695 automatic = False,
3696 deps = MICROKERNEL_TEST_DEPS,
3697)
3698
3699xnnpack_unit_test(
3700 name = "f32_roundu_eval",
3701 srcs = [
3702 "eval/f32-roundu.cc",
3703 "src/xnnpack/AlignedAllocator.h",
3704 "src/xnnpack/math-stubs.h",
3705 ] + MICROKERNEL_TEST_HDRS,
3706 automatic = False,
3707 deps = MICROKERNEL_TEST_DEPS,
3708)
3709
3710xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3711 name = "f32_roundz_eval",
3712 srcs = [
3713 "eval/f32-roundz.cc",
3714 "src/xnnpack/AlignedAllocator.h",
3715 "src/xnnpack/math-stubs.h",
3716 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3717 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3718 deps = MICROKERNEL_TEST_DEPS,
3719)
3720
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3721xnnpack_benchmark(
3722 name = "f32_sigmoid_eval",
3723 srcs = [
3724 "eval/f32-sigmoid.cc",
3725 "src/xnnpack/AlignedAllocator.h",
3726 ] + ACCURACY_EVAL_HDRS,
3727 deps = ACCURACY_EVAL_DEPS,
3728)
3729
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3730######################### Unit tests for micro-kernels #########################
3731
3732xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3733 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3734 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3735 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3736 "test/gemm-microkernel-tester.h",
3737 "src/xnnpack/AlignedAllocator.h",
3738 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3739 deps = MICROKERNEL_TEST_DEPS,
3740)
3741
3742xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3743 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3744 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3745 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3746 "test/spmm-microkernel-tester.h",
3747 "src/xnnpack/AlignedAllocator.h",
3748 ] + MICROKERNEL_TEST_HDRS,
3749 deps = MICROKERNEL_TEST_DEPS,
3750)
3751
3752xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3753 name = "f32_argmaxpool_test",
3754 srcs = [
3755 "test/f32-argmaxpool.cc",
3756 "test/argmaxpool-microkernel-tester.h",
3757 "src/xnnpack/AlignedAllocator.h",
3758 ] + MICROKERNEL_TEST_HDRS,
3759 deps = MICROKERNEL_TEST_DEPS,
3760)
3761
3762xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3763 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3764 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3765 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3766 "test/avgpool-microkernel-tester.h",
3767 "src/xnnpack/AlignedAllocator.h",
3768 ] + MICROKERNEL_TEST_HDRS,
3769 deps = MICROKERNEL_TEST_DEPS,
3770)
3771
3772xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3773 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3774 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3775 "test/f32-ibilinear.cc",
3776 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3777 "src/xnnpack/AlignedAllocator.h",
3778 ] + MICROKERNEL_TEST_HDRS,
3779 deps = MICROKERNEL_TEST_DEPS,
3780)
3781
3782xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3783 name = "f16_clamp_test",
3784 srcs = [
3785 "test/f16-clamp.cc",
3786 "test/clamp-microkernel-tester.h",
3787 ] + MICROKERNEL_TEST_HDRS,
3788 deps = MICROKERNEL_TEST_DEPS,
3789)
3790
3791xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3792 name = "f32_clamp_test",
3793 srcs = [
3794 "test/f32-clamp.cc",
3795 "test/clamp-microkernel-tester.h",
3796 ] + MICROKERNEL_TEST_HDRS,
3797 deps = MICROKERNEL_TEST_DEPS,
3798)
3799
3800xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3801 name = "f32_igemm_test",
3802 srcs = [
3803 "test/f32-igemm.cc",
3804 "test/gemm-microkernel-tester.h",
3805 "src/xnnpack/AlignedAllocator.h",
3806 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3807 deps = MICROKERNEL_TEST_DEPS,
3808)
3809
3810xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3811 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3812 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3813 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3814 "test/gemm-microkernel-tester.h",
3815 "src/xnnpack/AlignedAllocator.h",
3816 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3817 deps = MICROKERNEL_TEST_DEPS,
3818)
3819
3820xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -0700[diff] [blame]3821 name = "f32_igemm_minmax_test",
3822 srcs = [
3823 "test/f32-igemm-minmax.cc",
3824 "test/gemm-microkernel-tester.h",
3825 "src/xnnpack/AlignedAllocator.h",
3826 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3827 deps = MICROKERNEL_TEST_DEPS,
3828)
3829
3830xnnpack_unit_test(
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]3831 name = "f16_igemm_minmax_test",
3832 srcs = [
3833 "test/f16-igemm-minmax.cc",
3834 "test/gemm-microkernel-tester.h",
3835 "src/xnnpack/AlignedAllocator.h",
3836 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3837 deps = MICROKERNEL_TEST_DEPS,
3838)
3839
3840xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3841 name = "f32_conv_hwc_test",
3842 srcs = [
3843 "test/f32-conv-hwc.cc",
3844 "test/conv-hwc-microkernel-tester.h",
3845 "src/xnnpack/AlignedAllocator.h",
3846 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3847 deps = MICROKERNEL_TEST_DEPS,
3848)
3849
3850xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3851 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3852 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3853 "test/f32-conv-hwc2chw.cc",
3854 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3855 "src/xnnpack/AlignedAllocator.h",
3856 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3857 deps = MICROKERNEL_TEST_DEPS,
3858)
3859
3860xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3861 name = "f32_dwconv_test",
3862 srcs = [
3863 "test/f32-dwconv.cc",
3864 "test/dwconv-microkernel-tester.h",
3865 "src/xnnpack/AlignedAllocator.h",
3866 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3867 deps = MICROKERNEL_TEST_DEPS,
3868)
3869
3870xnnpack_unit_test(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3871 name = "f16_dwconv_minmax_test",
3872 srcs = [
3873 "test/f16-dwconv-minmax.cc",
3874 "test/dwconv-microkernel-tester.h",
3875 "src/xnnpack/AlignedAllocator.h",
3876 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3877 deps = MICROKERNEL_TEST_DEPS,
3878)
3879
3880xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3881 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3882 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3883 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3884 "test/dwconv-microkernel-tester.h",
3885 "src/xnnpack/AlignedAllocator.h",
3886 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3887 deps = MICROKERNEL_TEST_DEPS,
3888)
3889
3890xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3891 name = "f32_dwconv_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3892 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3893 "test/f32-dwconv-chw.cc",
3894 "test/dwconv-chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3895 "src/xnnpack/AlignedAllocator.h",
3896 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3897 deps = MICROKERNEL_TEST_DEPS,
3898)
3899
3900xnnpack_unit_test(
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]3901 name = "f16_gavgpool_minmax_test",
3902 srcs = [
3903 "test/f16-gavgpool-minmax.cc",
3904 "test/gavgpool-microkernel-tester.h",
3905 "src/xnnpack/AlignedAllocator.h",
3906 ] + MICROKERNEL_TEST_HDRS,
3907 deps = MICROKERNEL_TEST_DEPS,
3908)
3909
3910xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3911 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3912 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3913 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3914 "test/gavgpool-microkernel-tester.h",
3915 "src/xnnpack/AlignedAllocator.h",
3916 ] + MICROKERNEL_TEST_HDRS,
3917 deps = MICROKERNEL_TEST_DEPS,
3918)
3919
3920xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3921 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3922 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3923 "test/f32-gavgpool-cw.cc",
3924 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3925 "src/xnnpack/AlignedAllocator.h",
3926 ] + MICROKERNEL_TEST_HDRS,
3927 deps = MICROKERNEL_TEST_DEPS,
3928)
3929
3930xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3931 name = "f32_gemm_test",
3932 srcs = [
3933 "test/f32-gemm.cc",
3934 "test/gemm-microkernel-tester.h",
3935 "src/xnnpack/AlignedAllocator.h",
3936 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3937 deps = MICROKERNEL_TEST_DEPS,
3938)
3939
3940xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3941 name = "f32_gemm_relu_test",
3942 srcs = [
3943 "test/f32-gemm-relu.cc",
3944 "test/gemm-microkernel-tester.h",
3945 "src/xnnpack/AlignedAllocator.h",
3946 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3947 deps = MICROKERNEL_TEST_DEPS,
3948)
3949
3950xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3951 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3952 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3953 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3954 "test/gemm-microkernel-tester.h",
3955 "src/xnnpack/AlignedAllocator.h",
3956 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3957 deps = MICROKERNEL_TEST_DEPS,
3958)
3959
3960xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3961 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3962 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3963 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3964 "test/gemm-microkernel-tester.h",
3965 "src/xnnpack/AlignedAllocator.h",
3966 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3967 deps = MICROKERNEL_TEST_DEPS,
3968)
3969
3970xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3971 name = "f16_hswish_test",
3972 srcs = [
3973 "test/f16-hswish.cc",
3974 "test/hswish-microkernel-tester.h",
3975 ] + MICROKERNEL_TEST_HDRS,
3976 deps = MICROKERNEL_TEST_DEPS,
3977)
3978
3979xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3980 name = "f32_hswish_test",
3981 srcs = [
3982 "test/f32-hswish.cc",
3983 "test/hswish-microkernel-tester.h",
3984 ] + MICROKERNEL_TEST_HDRS,
3985 deps = MICROKERNEL_TEST_DEPS,
3986)
3987
3988xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3989 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3990 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3991 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3992 "test/maxpool-microkernel-tester.h",
3993 ] + MICROKERNEL_TEST_HDRS,
3994 deps = MICROKERNEL_TEST_DEPS,
3995)
3996
3997xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3998 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3999 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4000 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4001 "test/avgpool-microkernel-tester.h",
4002 "src/xnnpack/AlignedAllocator.h",
4003 ] + MICROKERNEL_TEST_HDRS,
4004 deps = MICROKERNEL_TEST_DEPS,
4005)
4006
4007xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4008 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4009 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4010 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4011 "test/gemm-microkernel-tester.h",
4012 "src/xnnpack/AlignedAllocator.h",
4013 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4014 deps = MICROKERNEL_TEST_DEPS,
4015)
4016
4017xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]4018 name = "f16_prelu_test",
4019 srcs = [
4020 "test/f16-prelu.cc",
4021 "test/prelu-microkernel-tester.h",
4022 "src/xnnpack/AlignedAllocator.h",
4023 ] + MICROKERNEL_TEST_HDRS,
4024 deps = MICROKERNEL_TEST_DEPS,
4025)
4026
4027xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4028 name = "f32_prelu_test",
4029 srcs = [
4030 "test/f32-prelu.cc",
4031 "test/prelu-microkernel-tester.h",
4032 "src/xnnpack/AlignedAllocator.h",
4033 ] + MICROKERNEL_TEST_HDRS,
4034 deps = MICROKERNEL_TEST_DEPS,
4035)
4036
4037xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4038 name = "f32_raddexpminusmax_test",
4039 srcs = [
4040 "test/f32-raddexpminusmax.cc",
4041 "test/raddexpminusmax-microkernel-tester.h",
4042 ] + MICROKERNEL_TEST_HDRS,
4043 deps = MICROKERNEL_TEST_DEPS,
4044)
4045
4046xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4047 name = "f32_raddextexp_test",
4048 srcs = [
4049 "test/f32-raddextexp.cc",
4050 "test/raddextexp-microkernel-tester.h",
4051 ] + MICROKERNEL_TEST_HDRS,
4052 deps = MICROKERNEL_TEST_DEPS,
4053)
4054
4055xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4056 name = "f32_raddstoreexpminusmax_test",
4057 srcs = [
4058 "test/f32-raddstoreexpminusmax.cc",
4059 "test/raddstoreexpminusmax-microkernel-tester.h",
4060 ] + MICROKERNEL_TEST_HDRS,
4061 deps = MICROKERNEL_TEST_DEPS,
4062)
4063
4064xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4065 name = "f32_rmax_test",
4066 srcs = [
4067 "test/f32-rmax.cc",
4068 "test/rmax-microkernel-tester.h",
4069 ] + MICROKERNEL_TEST_HDRS,
4070 deps = MICROKERNEL_TEST_DEPS,
4071)
4072
4073xnnpack_unit_test(
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]4074 name = "f32_sigmoid_test",
4075 srcs = [
4076 "test/f32-sigmoid.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4077 "test/vunary-microkernel-tester.h",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]4078 ] + MICROKERNEL_TEST_HDRS,
4079 deps = MICROKERNEL_TEST_DEPS,
4080)
4081
4082xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4083 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4084 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4085 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4086 "test/spmm-microkernel-tester.h",
4087 "src/xnnpack/AlignedAllocator.h",
4088 ] + MICROKERNEL_TEST_HDRS,
4089 deps = MICROKERNEL_TEST_DEPS,
4090)
4091
4092xnnpack_unit_test(
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]4093 name = "f16_vadd_minmax_test",
4094 srcs = [
4095 "test/f16-vadd-minmax.cc",
4096 "test/vbinary-microkernel-tester.h",
4097 ] + MICROKERNEL_TEST_HDRS,
4098 deps = MICROKERNEL_TEST_DEPS,
4099)
4100
4101xnnpack_unit_test(
4102 name = "f16_vaddc_minmax_test",
4103 srcs = [
4104 "test/f16-vaddc-minmax.cc",
4105 "test/vbinaryc-microkernel-tester.h",
4106 ] + MICROKERNEL_TEST_HDRS,
4107 deps = MICROKERNEL_TEST_DEPS,
4108)
4109
4110xnnpack_unit_test(
4111 name = "f16_vdiv_minmax_test",
4112 srcs = [
4113 "test/f16-vdiv-minmax.cc",
4114 "test/vbinary-microkernel-tester.h",
4115 ] + MICROKERNEL_TEST_HDRS,
4116 deps = MICROKERNEL_TEST_DEPS,
4117)
4118
4119xnnpack_unit_test(
4120 name = "f16_vdivc_minmax_test",
4121 srcs = [
4122 "test/f16-vdivc-minmax.cc",
4123 "test/vbinaryc-microkernel-tester.h",
4124 ] + MICROKERNEL_TEST_HDRS,
4125 deps = MICROKERNEL_TEST_DEPS,
4126)
4127
4128xnnpack_unit_test(
4129 name = "f16_vrdivc_minmax_test",
4130 srcs = [
4131 "test/f16-vrdivc-minmax.cc",
4132 "test/vbinaryc-microkernel-tester.h",
4133 ] + MICROKERNEL_TEST_HDRS,
4134 deps = MICROKERNEL_TEST_DEPS,
4135)
4136
4137xnnpack_unit_test(
4138 name = "f16_vmax_test",
4139 srcs = [
4140 "test/f16-vmax.cc",
4141 "test/vbinary-microkernel-tester.h",
4142 ] + MICROKERNEL_TEST_HDRS,
4143 deps = MICROKERNEL_TEST_DEPS,
4144)
4145
4146xnnpack_unit_test(
4147 name = "f16_vmaxc_test",
4148 srcs = [
4149 "test/f16-vmaxc.cc",
4150 "test/vbinaryc-microkernel-tester.h",
4151 ] + MICROKERNEL_TEST_HDRS,
4152 deps = MICROKERNEL_TEST_DEPS,
4153)
4154
4155xnnpack_unit_test(
4156 name = "f16_vmin_test",
4157 srcs = [
4158 "test/f16-vmin.cc",
4159 "test/vbinary-microkernel-tester.h",
4160 ] + MICROKERNEL_TEST_HDRS,
4161 deps = MICROKERNEL_TEST_DEPS,
4162)
4163
4164xnnpack_unit_test(
4165 name = "f16_vminc_test",
4166 srcs = [
4167 "test/f16-vminc.cc",
4168 "test/vbinaryc-microkernel-tester.h",
4169 ] + MICROKERNEL_TEST_HDRS,
4170 deps = MICROKERNEL_TEST_DEPS,
4171)
4172
4173xnnpack_unit_test(
4174 name = "f16_vmul_minmax_test",
4175 srcs = [
4176 "test/f16-vmul-minmax.cc",
4177 "test/vbinary-microkernel-tester.h",
4178 ] + MICROKERNEL_TEST_HDRS,
4179 deps = MICROKERNEL_TEST_DEPS,
4180)
4181
4182xnnpack_unit_test(
4183 name = "f16_vmulc_minmax_test",
4184 srcs = [
4185 "test/f16-vmulc-minmax.cc",
4186 "test/vbinaryc-microkernel-tester.h",
4187 ] + MICROKERNEL_TEST_HDRS,
4188 deps = MICROKERNEL_TEST_DEPS,
4189)
4190
4191xnnpack_unit_test(
4192 name = "f16_vsub_minmax_test",
4193 srcs = [
4194 "test/f16-vsub-minmax.cc",
4195 "test/vbinary-microkernel-tester.h",
4196 ] + MICROKERNEL_TEST_HDRS,
4197 deps = MICROKERNEL_TEST_DEPS,
4198)
4199
4200xnnpack_unit_test(
4201 name = "f16_vsubc_minmax_test",
4202 srcs = [
4203 "test/f16-vsubc-minmax.cc",
4204 "test/vbinaryc-microkernel-tester.h",
4205 ] + MICROKERNEL_TEST_HDRS,
4206 deps = MICROKERNEL_TEST_DEPS,
4207)
4208
4209xnnpack_unit_test(
4210 name = "f16_vrsubc_minmax_test",
4211 srcs = [
4212 "test/f16-vrsubc-minmax.cc",
4213 "test/vbinaryc-microkernel-tester.h",
4214 ] + MICROKERNEL_TEST_HDRS,
4215 deps = MICROKERNEL_TEST_DEPS,
4216)
4217
4218xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4219 name = "f32_vabs_test",
4220 srcs = [
4221 "test/f32-vabs.cc",
4222 "test/vunary-microkernel-tester.h",
4223 ] + MICROKERNEL_TEST_HDRS,
4224 deps = MICROKERNEL_TEST_DEPS,
4225)
4226
4227xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4228 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4229 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4230 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4231 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4232 ] + MICROKERNEL_TEST_HDRS,
4233 deps = MICROKERNEL_TEST_DEPS,
4234)
4235
4236xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4237 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4238 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4239 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4240 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4241 ] + MICROKERNEL_TEST_HDRS,
4242 deps = MICROKERNEL_TEST_DEPS,
4243)
4244
4245xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4246 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4247 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4248 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4249 "test/vbinary-microkernel-tester.h",
4250 ] + MICROKERNEL_TEST_HDRS,
4251 deps = MICROKERNEL_TEST_DEPS,
4252)
4253
4254xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4255 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4256 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4257 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4258 "test/vbinaryc-microkernel-tester.h",
4259 ] + MICROKERNEL_TEST_HDRS,
4260 deps = MICROKERNEL_TEST_DEPS,
4261)
4262
4263xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4264 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4265 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4266 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4267 "test/vbinaryc-microkernel-tester.h",
4268 ] + MICROKERNEL_TEST_HDRS,
4269 deps = MICROKERNEL_TEST_DEPS,
4270)
4271
4272xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]4273 name = "f32_vmax_test",
4274 srcs = [
4275 "test/f32-vmax.cc",
4276 "test/vbinary-microkernel-tester.h",
4277 ] + MICROKERNEL_TEST_HDRS,
4278 deps = MICROKERNEL_TEST_DEPS,
4279)
4280
4281xnnpack_unit_test(
4282 name = "f32_vmaxc_test",
4283 srcs = [
4284 "test/f32-vmaxc.cc",
4285 "test/vbinaryc-microkernel-tester.h",
4286 ] + MICROKERNEL_TEST_HDRS,
4287 deps = MICROKERNEL_TEST_DEPS,
4288)
4289
4290xnnpack_unit_test(
4291 name = "f32_vmin_test",
4292 srcs = [
4293 "test/f32-vmin.cc",
4294 "test/vbinary-microkernel-tester.h",
4295 ] + MICROKERNEL_TEST_HDRS,
4296 deps = MICROKERNEL_TEST_DEPS,
4297)
4298
4299xnnpack_unit_test(
4300 name = "f32_vminc_test",
4301 srcs = [
4302 "test/f32-vminc.cc",
4303 "test/vbinaryc-microkernel-tester.h",
4304 ] + MICROKERNEL_TEST_HDRS,
4305 deps = MICROKERNEL_TEST_DEPS,
4306)
4307
4308xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4309 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4310 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4311 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4312 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4313 ] + MICROKERNEL_TEST_HDRS,
4314 deps = MICROKERNEL_TEST_DEPS,
4315)
4316
4317xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4318 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4319 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4320 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4321 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4322 ] + MICROKERNEL_TEST_HDRS,
4323 deps = MICROKERNEL_TEST_DEPS,
4324)
4325
4326xnnpack_unit_test(
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]4327 name = "f16_vmulcaddc_minmax_test",
4328 srcs = [
4329 "test/f16-vmulcaddc-minmax.cc",
4330 "test/vmulcaddc-microkernel-tester.h",
4331 "src/xnnpack/AlignedAllocator.h",
4332 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4333 deps = MICROKERNEL_TEST_DEPS,
4334)
4335
4336xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4337 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4338 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4339 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4340 "test/vmulcaddc-microkernel-tester.h",
4341 "src/xnnpack/AlignedAllocator.h",
4342 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4343 deps = MICROKERNEL_TEST_DEPS,
4344)
4345
4346xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]4347 name = "f32_vlrelu_test",
4348 srcs = [
4349 "test/f32-vlrelu.cc",
4350 "test/vunary-microkernel-tester.h",
4351 ] + MICROKERNEL_TEST_HDRS,
4352 deps = MICROKERNEL_TEST_DEPS,
4353)
4354
4355xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4356 name = "f32_vneg_test",
4357 srcs = [
4358 "test/f32-vneg.cc",
4359 "test/vunary-microkernel-tester.h",
4360 ] + MICROKERNEL_TEST_HDRS,
4361 deps = MICROKERNEL_TEST_DEPS,
4362)
4363
4364xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]4365 name = "f32_vrndne_test",
4366 srcs = [
4367 "test/f32-vrndne.cc",
4368 "test/vunary-microkernel-tester.h",
4369 ] + MICROKERNEL_TEST_HDRS,
4370 deps = MICROKERNEL_TEST_DEPS,
4371)
4372
4373xnnpack_unit_test(
4374 name = "f32_vrndz_test",
4375 srcs = [
4376 "test/f32-vrndz.cc",
4377 "test/vunary-microkernel-tester.h",
4378 ] + MICROKERNEL_TEST_HDRS,
4379 deps = MICROKERNEL_TEST_DEPS,
4380)
4381
4382xnnpack_unit_test(
4383 name = "f32_vrndu_test",
4384 srcs = [
4385 "test/f32-vrndu.cc",
4386 "test/vunary-microkernel-tester.h",
4387 ] + MICROKERNEL_TEST_HDRS,
4388 deps = MICROKERNEL_TEST_DEPS,
4389)
4390
4391xnnpack_unit_test(
4392 name = "f32_vrndd_test",
4393 srcs = [
4394 "test/f32-vrndd.cc",
4395 "test/vunary-microkernel-tester.h",
4396 ] + MICROKERNEL_TEST_HDRS,
4397 deps = MICROKERNEL_TEST_DEPS,
4398)
4399
4400xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]4401 name = "f32_vscale_test",
4402 srcs = [
4403 "test/f32-vscale.cc",
4404 "test/vscale-microkernel-tester.h",
4405 ] + MICROKERNEL_TEST_HDRS,
4406 deps = MICROKERNEL_TEST_DEPS,
4407)
4408
4409xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4410 name = "f32_vscaleexpminusmax_test",
4411 srcs = [
4412 "test/f32-vscaleexpminusmax.cc",
4413 "test/vscaleexpminusmax-microkernel-tester.h",
4414 ] + MICROKERNEL_TEST_HDRS,
4415 deps = MICROKERNEL_TEST_DEPS,
4416)
4417
4418xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4419 name = "f32_vscaleextexp_test",
4420 srcs = [
4421 "test/f32-vscaleextexp.cc",
4422 "test/vscaleextexp-microkernel-tester.h",
4423 ] + MICROKERNEL_TEST_HDRS,
4424 deps = MICROKERNEL_TEST_DEPS,
4425)
4426
4427xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4428 name = "f32_vsqr_test",
4429 srcs = [
4430 "test/f32-vsqr.cc",
4431 "test/vunary-microkernel-tester.h",
4432 ] + MICROKERNEL_TEST_HDRS,
4433 deps = MICROKERNEL_TEST_DEPS,
4434)
4435
4436xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]4437 name = "f32_vsqrdiff_test",
4438 srcs = [
4439 "test/f32-vsqrdiff.cc",
4440 "test/vbinary-microkernel-tester.h",
4441 ] + MICROKERNEL_TEST_HDRS,
4442 deps = MICROKERNEL_TEST_DEPS,
4443)
4444
4445xnnpack_unit_test(
4446 name = "f32_vsqrdiffc_test",
4447 srcs = [
4448 "test/f32-vsqrdiffc.cc",
4449 "test/vbinaryc-microkernel-tester.h",
4450 ] + MICROKERNEL_TEST_HDRS,
4451 deps = MICROKERNEL_TEST_DEPS,
4452)
4453
4454xnnpack_unit_test(
4455 name = "f32_vrsqrdiffc_test",
4456 srcs = [
4457 "test/f32-vrsqrdiffc.cc",
4458 "test/vbinaryc-microkernel-tester.h",
4459 ] + MICROKERNEL_TEST_HDRS,
4460 deps = MICROKERNEL_TEST_DEPS,
4461)
4462
4463xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4464 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4465 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4466 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4467 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4468 ] + MICROKERNEL_TEST_HDRS,
4469 deps = MICROKERNEL_TEST_DEPS,
4470)
4471
4472xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4473 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4474 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4475 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4476 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4477 ] + MICROKERNEL_TEST_HDRS,
4478 deps = MICROKERNEL_TEST_DEPS,
4479)
4480
4481xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4482 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4483 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4484 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4485 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4486 ] + MICROKERNEL_TEST_HDRS,
4487 deps = MICROKERNEL_TEST_DEPS,
4488)
4489
4490xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4491 name = "q8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4492 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4493 "test/q8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4494 "test/avgpool-microkernel-tester.h",
4495 "src/xnnpack/AlignedAllocator.h",
4496 ] + MICROKERNEL_TEST_HDRS,
4497 deps = MICROKERNEL_TEST_DEPS,
4498)
4499
4500xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4501 name = "q8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4502 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4503 "test/q8-igemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4504 "test/gemm-microkernel-tester.h",
4505 "src/xnnpack/AlignedAllocator.h",
4506 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4507 deps = MICROKERNEL_TEST_DEPS,
4508)
4509
4510xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4511 name = "q8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4512 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4513 "test/q8-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4514 "test/dwconv-microkernel-tester.h",
4515 "src/xnnpack/AlignedAllocator.h",
4516 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4517 deps = MICROKERNEL_TEST_DEPS,
4518)
4519
4520xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4521 name = "q8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4522 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4523 "test/q8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4524 "test/gavgpool-microkernel-tester.h",
4525 "src/xnnpack/AlignedAllocator.h",
4526 ] + MICROKERNEL_TEST_HDRS,
4527 deps = MICROKERNEL_TEST_DEPS,
4528)
4529
4530xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4531 name = "q8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4532 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4533 "test/q8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4534 "test/gemm-microkernel-tester.h",
4535 "src/xnnpack/AlignedAllocator.h",
4536 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4537 deps = MICROKERNEL_TEST_DEPS,
4538)
4539
4540xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4541 name = "q8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4542 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4543 "test/q8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4544 "test/vadd-microkernel-tester.h",
4545 ] + MICROKERNEL_TEST_HDRS,
4546 deps = MICROKERNEL_TEST_DEPS,
4547)
4548
4549xnnpack_unit_test(
4550 name = "u8_clamp_test",
4551 srcs = [
4552 "test/u8-clamp.cc",
4553 "test/clamp-microkernel-tester.h",
4554 ] + MICROKERNEL_TEST_HDRS,
4555 deps = MICROKERNEL_TEST_DEPS,
4556)
4557
4558xnnpack_unit_test(
4559 name = "u8_lut32norm_test",
4560 srcs = [
4561 "test/u8-lut32norm.cc",
4562 "test/lut-norm-microkernel-tester.h",
4563 ] + MICROKERNEL_TEST_HDRS,
4564 deps = MICROKERNEL_TEST_DEPS,
4565)
4566
4567xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4568 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4569 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4570 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4571 "test/maxpool-microkernel-tester.h",
4572 ] + MICROKERNEL_TEST_HDRS,
4573 deps = MICROKERNEL_TEST_DEPS,
4574)
4575
4576xnnpack_unit_test(
4577 name = "u8_rmax_test",
4578 srcs = [
4579 "test/u8-rmax.cc",
4580 "test/rmax-microkernel-tester.h",
4581 ] + MICROKERNEL_TEST_HDRS,
4582 deps = MICROKERNEL_TEST_DEPS,
4583)
4584
4585xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]4586 name = "x32_fill_test",
4587 srcs = [
4588 "test/x32-fill.cc",
4589 "test/fill-microkernel-tester.h",
4590 ] + MICROKERNEL_TEST_HDRS,
4591 deps = MICROKERNEL_TEST_DEPS,
4592)
4593
4594xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4595 name = "x32_packx_test",
4596 srcs = [
4597 "test/x32-packx.cc",
4598 "test/pack-microkernel-tester.h",
4599 "src/xnnpack/AlignedAllocator.h",
4600 ] + MICROKERNEL_TEST_HDRS,
4601 deps = MICROKERNEL_TEST_DEPS,
4602)
4603
4604xnnpack_unit_test(
4605 name = "x32_pad_test",
4606 srcs = [
4607 "test/x32-pad.cc",
4608 "test/pad-microkernel-tester.h",
4609 ] + MICROKERNEL_TEST_HDRS,
4610 deps = MICROKERNEL_TEST_DEPS,
4611)
4612
4613xnnpack_unit_test(
4614 name = "x32_unpool_test",
4615 srcs = [
4616 "test/x32-unpool.cc",
4617 "test/unpool-microkernel-tester.h",
4618 ] + MICROKERNEL_TEST_HDRS,
4619 deps = MICROKERNEL_TEST_DEPS,
4620)
4621
4622xnnpack_unit_test(
4623 name = "x32_zip_test",
4624 srcs = [
4625 "test/x32-zip.cc",
4626 "test/zip-microkernel-tester.h",
4627 ] + MICROKERNEL_TEST_HDRS,
4628 deps = MICROKERNEL_TEST_DEPS,
4629)
4630
4631xnnpack_unit_test(
4632 name = "x8_lut_test",
4633 srcs = [
4634 "test/x8-lut.cc",
4635 "test/lut-microkernel-tester.h",
4636 ] + MICROKERNEL_TEST_HDRS,
4637 deps = MICROKERNEL_TEST_DEPS,
4638)
4639
4640xnnpack_unit_test(
4641 name = "x8_zip_test",
4642 srcs = [
4643 "test/x8-zip.cc",
4644 "test/zip-microkernel-tester.h",
4645 ] + MICROKERNEL_TEST_HDRS,
4646 deps = MICROKERNEL_TEST_DEPS,
4647)
4648
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]4649xnnpack_unit_test(
4650 name = "requantization_test",
4651 srcs = [
4652 "src/xnnpack/requantization-stubs.h",
4653 "test/requantization.cc",
4654 "test/requantization-tester.h",
4655 ] + MICROKERNEL_TEST_HDRS,
4656 deps = MICROKERNEL_TEST_DEPS,
4657)
4658
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4659########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4660
4661xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4662 name = "operator_size_test",
4663 srcs = ["test/operator-size.c"],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]4664 deps = [":xnnpack_operators_nhwc_f32"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4665)
4666
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4667xnnpack_binary(
4668 name = "subgraph_size_test",
4669 srcs = ["test/subgraph-size.c"],
4670 deps = [":XNNPACK"],
4671)
4672
4673########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4674
4675xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4676 name = "abs_nc_test",
4677 srcs = [
4678 "test/abs-nc.cc",
4679 "test/abs-operator-tester.h",
4680 ],
4681 deps = OPERATOR_TEST_DEPS,
4682)
4683
4684xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4685 name = "add_nd_test",
4686 srcs = [
4687 "test/add-nd.cc",
4688 "test/binary-elementwise-operator-tester.h",
4689 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4690 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4691)
4692
4693xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4694 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4695 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4696 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4697 "test/argmax-pooling-operator-tester.h",
4698 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4699 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4700)
4701
4702xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4703 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4704 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4705 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4706 "test/average-pooling-operator-tester.h",
4707 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4708 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4709)
4710
4711xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4712 name = "bankers_rounding_nc_test",
4713 srcs = [
4714 "test/bankers-rounding-nc.cc",
4715 "test/bankers-rounding-operator-tester.h",
4716 ],
4717 deps = OPERATOR_TEST_DEPS,
4718)
4719
4720xnnpack_unit_test(
4721 name = "ceiling_nc_test",
4722 srcs = [
4723 "test/ceiling-nc.cc",
4724 "test/ceiling-operator-tester.h",
4725 ],
4726 deps = OPERATOR_TEST_DEPS,
4727)
4728
4729xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4730 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4731 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4732 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4733 "test/channel-shuffle-operator-tester.h",
4734 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4735 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4736)
4737
4738xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4739 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4740 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4741 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4742 "test/clamp-operator-tester.h",
4743 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4744 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4745)
4746
4747xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]4748 name = "constant_pad_nd_test",
4749 srcs = [
4750 "test/constant-pad-nd.cc",
4751 "test/constant-pad-operator-tester.h",
4752 ],
4753 deps = OPERATOR_TEST_DEPS,
4754)
4755
4756xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4757 name = "convolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4758 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4759 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4760 "test/convolution-operator-tester.h",
4761 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4762 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4763)
4764
4765xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4766 name = "convolution_nchw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4767 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4768 "test/convolution-nchw.cc",
4769 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4770 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4771 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4772)
4773
4774xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -0700[diff] [blame]4775 name = "copy_nc_test",
4776 srcs = [
4777 "test/copy-nc.cc",
4778 "test/copy-operator-tester.h",
4779 ],
4780 deps = OPERATOR_TEST_DEPS,
4781)
4782
4783xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4784 name = "deconvolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4785 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4786 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4787 "test/deconvolution-operator-tester.h",
4788 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4789 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4790)
4791
4792xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4793 name = "divide_nd_test",
4794 srcs = [
4795 "test/binary-elementwise-operator-tester.h",
4796 "test/divide-nd.cc",
4797 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4798 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4799)
4800
4801xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4802 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4803 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4804 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4805 "test/fully-connected-operator-tester.h",
4806 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4807 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4808)
4809
4810xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4811 name = "floor_nc_test",
4812 srcs = [
4813 "test/floor-nc.cc",
4814 "test/floor-operator-tester.h",
4815 ],
4816 deps = OPERATOR_TEST_DEPS,
4817)
4818
4819xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4820 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4821 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4822 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4823 "test/global-average-pooling-operator-tester.h",
4824 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4825 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4826)
4827
4828xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4829 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4830 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4831 "test/global-average-pooling-ncw.cc",
4832 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4833 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4834 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4835)
4836
4837xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4838 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4839 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4840 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4841 "test/hardswish-operator-tester.h",
4842 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4843 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4844)
4845
4846xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4847 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4848 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4849 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4850 "test/leaky-relu-operator-tester.h",
4851 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4852 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4853)
4854
4855xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4856 name = "max_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4857 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4858 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4859 "test/max-pooling-operator-tester.h",
4860 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4861 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4862)
4863
4864xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4865 name = "maximum_nd_test",
4866 srcs = [
4867 "test/binary-elementwise-operator-tester.h",
4868 "test/maximum-nd.cc",
4869 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4870 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4871)
4872
4873xnnpack_unit_test(
4874 name = "minimum_nd_test",
4875 srcs = [
4876 "test/binary-elementwise-operator-tester.h",
4877 "test/minimum-nd.cc",
4878 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4879 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4880)
4881
4882xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4883 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4884 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4885 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4886 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4887 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4888 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4889)
4890
4891xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4892 name = "negate_nc_test",
4893 srcs = [
4894 "test/negate-nc.cc",
4895 "test/negate-operator-tester.h",
4896 ],
4897 deps = OPERATOR_TEST_DEPS,
4898)
4899
4900xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4901 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4902 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4903 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4904 "test/prelu-operator-tester.h",
4905 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4906 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4907)
4908
4909xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4910 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4911 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4912 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4913 "test/resize-bilinear-operator-tester.h",
4914 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4915 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4916)
4917
4918xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4919 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4920 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4921 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4922 "test/sigmoid-operator-tester.h",
4923 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4924 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4925)
4926
4927xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]4928 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4929 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]4930 "test/softmax-nc.cc",
4931 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4932 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4933 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4934)
4935
4936xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4937 name = "square_nc_test",
4938 srcs = [
4939 "test/square-nc.cc",
4940 "test/square-operator-tester.h",
4941 ],
4942 deps = OPERATOR_TEST_DEPS,
4943)
4944
4945xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]4946 name = "squared_difference_nd_test",
4947 srcs = [
4948 "test/binary-elementwise-operator-tester.h",
4949 "test/squared-difference-nd.cc",
4950 ],
4951 deps = OPERATOR_TEST_DEPS,
4952)
4953
4954xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]4955 name = "subtract_nd_test",
4956 srcs = [
4957 "test/binary-elementwise-operator-tester.h",
4958 "test/subtract-nd.cc",
4959 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4960 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]4961)
4962
4963xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4964 name = "truncation_nc_test",
4965 srcs = [
4966 "test/truncation-nc.cc",
4967 "test/truncation-operator-tester.h",
4968 ],
4969 deps = OPERATOR_TEST_DEPS,
4970)
4971
4972xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4973 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4974 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4975 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4976 "test/unpooling-operator-tester.h",
4977 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4978 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4979)
4980
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]4981############################### Misc unit tests ###############################
4982
4983xnnpack_unit_test(
4984 name = "memory_planner_test",
4985 srcs = [
4986 "test/memory-planner-test.cc",
4987 ],
4988 deps = [
4989 ":XNNPACK",
4990 ":memory_planner",
4991 ],
4992)
4993
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4994############################# Build configurations #############################
4995
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4996# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4997config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4998 name = "xnn_enable_assembly_explicit_true",
4999 define_values = {"xnn_enable_assembly": "true"},
5000)
5001
5002# Disables usage of assembly kernels.
5003config_setting(
5004 name = "xnn_enable_assembly_explicit_false",
5005 define_values = {"xnn_enable_assembly": "false"},
5006)
5007
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]5008# Disables usage of HMP-aware optimizations.
5009config_setting(
5010 name = "xnn_enable_hmp_explicit_false",
5011 define_values = {"xnn_enable_hmp": "false"},
5012)
5013
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]5014# Enable usage of optimized memory allocation
5015config_setting(
5016 name = "xnn_enable_memopt_explicit_true",
5017 define_values = {"xnnpack_enable_memopt": "true"},
5018)
5019
5020# Disable usage of optimized memory allocation
5021config_setting(
5022 name = "xnn_enable_memopt_explicit_false",
5023 define_values = {"xnnpack_enable_memopt": "false"},
5024)
5025
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5026# Builds with -c dbg
5027config_setting(
5028 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5029 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5030 "compilation_mode": "dbg",
5031 },
5032)
5033
5034# Builds with -c opt
5035config_setting(
5036 name = "optimized_build",
5037 values = {
5038 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5039 },
5040)
5041
5042config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5043 name = "linux_k8",
5044 values = {"cpu": "k8"},
5045)
5046
5047config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]5048 name = "linux_arm",
5049 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -0700[diff] [blame]5050)
5051
5052config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -0700[diff] [blame]5053 name = "linux_armeabi",
5054 values = {"cpu": "armeabi"},
5055)
5056
5057config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -0700[diff] [blame]5058 name = "linux_armhf",
5059 values = {"cpu": "armhf"},
5060)
5061
5062config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -0700[diff] [blame]5063 name = "linux_armv7a",
5064 values = {"cpu": "armv7a"},
5065)
5066
5067config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]5068 name = "linux_aarch64",
5069 values = {"cpu": "aarch64"},
5070)
5071
5072config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5073 name = "android",
5074 values = {"crosstool_top": "//external:android/crosstool"},
5075)
5076
5077config_setting(
5078 name = "android_armv7",
5079 values = {
5080 "crosstool_top": "//external:android/crosstool",
5081 "cpu": "armeabi-v7a",
5082 },
5083)
5084
5085config_setting(
5086 name = "android_arm64",
5087 values = {
5088 "crosstool_top": "//external:android/crosstool",
5089 "cpu": "arm64-v8a",
5090 },
5091)
5092
5093config_setting(
5094 name = "android_x86",
5095 values = {
5096 "crosstool_top": "//external:android/crosstool",
5097 "cpu": "x86",
5098 },
5099)
5100
5101config_setting(
5102 name = "android_x86_64",
5103 values = {
5104 "crosstool_top": "//external:android/crosstool",
5105 "cpu": "x86_64",
5106 },
5107)
5108
5109config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]5110 name = "windows_x86_64",
5111 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5112)
5113
5114config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]5115 name = "windows_x86_64_clang",
5116 values = {
5117 "compiler": "clang-cl",
5118 "cpu": "x64_windows",
5119 },
5120)
5121
5122config_setting(
5123 name = "windows_x86_64_mingw",
5124 values = {
5125 "compiler": "mingw-gcc",
5126 "cpu": "x64_windows",
5127 },
5128)
5129
5130config_setting(
5131 name = "windows_x86_64_msys",
5132 values = {
5133 "compiler": "msys-gcc",
5134 "cpu": "x64_windows",
5135 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5136)
5137
5138config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -0700[diff] [blame]5139 name = "macos_x86_64",
5140 values = {
5141 "apple_platform_type": "macos",
5142 "cpu": "darwin",
5143 },
5144)
5145
5146config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5147 name = "emscripten",
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5148 values = {"crosstool_top": "//toolchain:emscripten"},
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5149)
5150
5151config_setting(
5152 name = "emscripten_wasm",
5153 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5154 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5155 "cpu": "wasm",
5156 },
5157)
5158
5159config_setting(
5160 name = "emscripten_wasmsimd",
5161 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5162 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5163 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -0700[diff] [blame]5164 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5165 },
5166)
5167
5168config_setting(
5169 name = "emscripten_asmjs",
5170 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5171 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5172 "cpu": "asmjs",
5173 },
5174)
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5175
5176config_setting(
5177 name = "ios_armv7",
5178 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5179 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5180 "cpu": "ios_armv7",
5181 },
5182)
5183
5184config_setting(
5185 name = "ios_arm64",
5186 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5187 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5188 "cpu": "ios_arm64",
5189 },
5190)
5191
5192config_setting(
5193 name = "ios_arm64e",
5194 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5195 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5196 "cpu": "ios_arm64e",
5197 },
5198)
5199
5200config_setting(
5201 name = "ios_x86",
5202 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5203 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5204 "cpu": "ios_i386",
5205 },
5206)
5207
5208config_setting(
5209 name = "ios_x86_64",
5210 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5211 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5212 "cpu": "ios_x86_64",
5213 },
5214)
5215
5216config_setting(
5217 name = "watchos_armv7k",
5218 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5219 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5220 "cpu": "watchos_armv7k",
5221 },
5222)
5223
5224config_setting(
5225 name = "watchos_arm64_32",
5226 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5227 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5228 "cpu": "watchos_arm64_32",
5229 },
5230)
5231
5232config_setting(
5233 name = "watchos_x86",
5234 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5235 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5236 "cpu": "watchos_i386",
5237 },
5238)
5239
5240config_setting(
5241 name = "watchos_x86_64",
5242 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5243 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5244 "cpu": "watchos_x86_64",
5245 },
5246)
5247
5248config_setting(
5249 name = "tvos_arm64",
5250 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5251 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5252 "cpu": "tvos_arm64",
5253 },
5254)
5255
5256config_setting(
5257 name = "tvos_x86_64",
5258 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5259 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5260 "cpu": "tvos_x86_64",
5261 },
5262)