blob: b2520a82cdc23cebde855f222ce3317e167a9854 [file] [log] [blame]
Stéphane Marchesin25a26062014-09-12 16:18:59 -07001/*
Daniele Castagna7a755de2016-12-16 17:32:30 -05002 * Copyright 2014 The Chromium OS Authors. All rights reserved.
Stéphane Marchesin25a26062014-09-12 16:18:59 -07003 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Gurchetan Singh46faf6b2016-08-05 14:40:07 -07007#ifdef DRV_I915
Stéphane Marchesin25a26062014-09-12 16:18:59 -07008
9#include <errno.h>
Gurchetan Singh82a8eed2017-01-03 13:01:37 -080010#include <i915_drm.h>
Gurchetan Singhcc015e82017-01-17 16:15:25 -080011#include <stdio.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070012#include <string.h>
Gurchetan Singhef920532016-08-12 16:38:25 -070013#include <sys/mman.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070014#include <xf86drm.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070015
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070016#include "drv_priv.h"
Stéphane Marchesin25a26062014-09-12 16:18:59 -070017#include "helpers.h"
18#include "util.h"
19
Gurchetan Singh68af9c22017-01-18 13:48:11 -080020#define I915_CACHELINE_SIZE 64
21#define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1)
22
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070023static const uint32_t render_target_formats[] = { DRM_FORMAT_ARGB1555, DRM_FORMAT_ABGR8888,
24 DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565,
25 DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555,
26 DRM_FORMAT_XRGB8888 };
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080027
Dongseong Hwang750e0b92017-06-07 15:17:25 -070028static const uint32_t tileable_texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_NV12,
29 DRM_FORMAT_R8, DRM_FORMAT_UYVY,
30 DRM_FORMAT_YUYV };
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070031
32static const uint32_t texture_source_formats[] = { DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID };
Gurchetan Singh179687e2016-10-28 10:07:35 -070033
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080034struct i915_device {
Gurchetan Singh68af9c22017-01-18 13:48:11 -080035 uint32_t gen;
36 int32_t has_llc;
Stéphane Marchesin25a26062014-09-12 16:18:59 -070037};
38
Gurchetan Singh68af9c22017-01-18 13:48:11 -080039static uint32_t i915_get_gen(int device_id)
Stéphane Marchesin25a26062014-09-12 16:18:59 -070040{
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080041 const uint16_t gen3_ids[] = { 0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
42 0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011 };
Stéphane Marchesina39dfde2014-09-15 15:38:25 -070043 unsigned i;
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080044 for (i = 0; i < ARRAY_SIZE(gen3_ids); i++)
Stéphane Marchesin25a26062014-09-12 16:18:59 -070045 if (gen3_ids[i] == device_id)
46 return 3;
47
48 return 4;
49}
50
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080051static int i915_add_kms_item(struct driver *drv, const struct kms_item *item)
52{
53 uint32_t i;
54 struct combination *combo;
55
56 /*
57 * Older hardware can't scanout Y-tiled formats. Newer devices can, and
58 * report this functionality via format modifiers.
59 */
60 for (i = 0; i < drv->backend->combos.size; i++) {
61 combo = &drv->backend->combos.data[i];
Tomasz Figae821cc22017-07-08 15:53:11 +090062 if (combo->format != item->format)
63 continue;
64
65 if (item->modifier == DRM_FORMAT_MOD_NONE &&
66 combo->metadata.tiling == I915_TILING_X) {
67 /*
68 * FIXME: drv_query_kms() does not report the available modifiers
69 * yet, but we know that all hardware can scanout from X-tiled
70 * buffers, so let's add this to our combinations, except for
71 * cursor, which must not be tiled.
72 */
73 combo->usage |= item->usage & ~BO_USE_CURSOR;
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080074 }
Tomasz Figae821cc22017-07-08 15:53:11 +090075
76 if (combo->metadata.modifier == item->modifier)
77 combo->usage |= item->usage;
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080078 }
79
80 return 0;
81}
82
83static int i915_add_combinations(struct driver *drv)
84{
85 int ret;
86 uint32_t i, num_items;
87 struct kms_item *items;
88 struct format_metadata metadata;
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070089 uint64_t render_flags, texture_flags;
90
91 render_flags = BO_USE_RENDER_MASK;
92 texture_flags = BO_USE_TEXTURE_MASK;
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080093
94 metadata.tiling = I915_TILING_NONE;
95 metadata.priority = 1;
96 metadata.modifier = DRM_FORMAT_MOD_NONE;
97
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070098 ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
99 &metadata, render_flags);
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800100 if (ret)
101 return ret;
102
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -0700103 ret = drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
104 &metadata, texture_flags);
105 if (ret)
106 return ret;
107
108 ret = drv_add_combinations(drv, tileable_texture_source_formats,
Dongseong Hwang3c5be5a2017-06-14 10:47:11 -0700109 ARRAY_SIZE(tileable_texture_source_formats), &metadata,
110 texture_flags);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800111 if (ret)
112 return ret;
113
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800114 drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
115 drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800116
Tomasz Figad30c0a52017-07-05 17:50:18 +0900117 /* IPU3 camera ISP supports only NV12 output. */
118 drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
119 BO_USE_HW_CAMERA_READ | BO_USE_HW_CAMERA_WRITE);
120 /*
121 * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
122 * from camera.
123 */
124 drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
125 BO_USE_HW_CAMERA_READ | BO_USE_HW_CAMERA_WRITE);
126
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -0700127 render_flags &= ~BO_USE_SW_WRITE_OFTEN;
128 render_flags &= ~BO_USE_SW_READ_OFTEN;
129 render_flags &= ~BO_USE_LINEAR;
130
131 texture_flags &= ~BO_USE_SW_WRITE_OFTEN;
132 texture_flags &= ~BO_USE_SW_READ_OFTEN;
133 texture_flags &= ~BO_USE_LINEAR;
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800134
135 metadata.tiling = I915_TILING_X;
136 metadata.priority = 2;
Tomasz Figae821cc22017-07-08 15:53:11 +0900137 metadata.modifier = I915_FORMAT_MOD_X_TILED;
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800138
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -0700139 ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
140 &metadata, render_flags);
141 if (ret)
142 return ret;
143
144 ret = drv_add_combinations(drv, tileable_texture_source_formats,
145 ARRAY_SIZE(tileable_texture_source_formats), &metadata,
146 texture_flags);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800147 if (ret)
148 return ret;
149
150 metadata.tiling = I915_TILING_Y;
151 metadata.priority = 3;
Tomasz Figae821cc22017-07-08 15:53:11 +0900152 metadata.modifier = I915_FORMAT_MOD_Y_TILED;
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800153
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -0700154 ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
155 &metadata, render_flags);
156 if (ret)
157 return ret;
158
159 ret = drv_add_combinations(drv, tileable_texture_source_formats,
160 ARRAY_SIZE(tileable_texture_source_formats), &metadata,
161 texture_flags);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800162 if (ret)
163 return ret;
164
165 items = drv_query_kms(drv, &num_items);
166 if (!items || !num_items)
167 return 0;
168
169 for (i = 0; i < num_items; i++) {
170 ret = i915_add_kms_item(drv, &items[i]);
171 if (ret) {
172 free(items);
173 return ret;
174 }
175 }
176
177 free(items);
178 return 0;
179}
180
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800181static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *stride,
182 uint32_t *aligned_height)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700183{
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700184 struct i915_device *i915 = bo->drv->priv;
185 uint32_t horizontal_alignment = 4;
186 uint32_t vertical_alignment = 4;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700187
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700188 switch (tiling) {
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700189 default:
190 case I915_TILING_NONE:
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700191 horizontal_alignment = 64;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700192 break;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800193
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700194 case I915_TILING_X:
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700195 horizontal_alignment = 512;
196 vertical_alignment = 8;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700197 break;
198
199 case I915_TILING_Y:
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700200 if (i915->gen == 3) {
201 horizontal_alignment = 512;
202 vertical_alignment = 8;
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800203 } else {
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700204 horizontal_alignment = 128;
205 vertical_alignment = 32;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700206 }
207 break;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700208 }
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800209
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700210 *aligned_height = ALIGN(bo->height, vertical_alignment);
211 if (i915->gen > 3) {
212 *stride = ALIGN(*stride, horizontal_alignment);
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800213 } else {
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700214 while (*stride > horizontal_alignment)
215 horizontal_alignment <<= 1;
216
217 *stride = horizontal_alignment;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800218 }
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800219
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700220 if (i915->gen <= 3 && *stride > 8192)
221 return -EINVAL;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800222
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700223 return 0;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700224}
225
Gurchetan Singh68af9c22017-01-18 13:48:11 -0800226static void i915_clflush(void *start, size_t size)
227{
228 void *p = (void *)(((uintptr_t)start) & ~I915_CACHELINE_MASK);
229 void *end = (void *)((uintptr_t)start + size);
230
231 __builtin_ia32_mfence();
232 while (p < end) {
233 __builtin_ia32_clflush(p);
234 p = (void *)((uintptr_t)p + I915_CACHELINE_SIZE);
235 }
236}
237
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800238static int i915_init(struct driver *drv)
239{
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800240 int ret;
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800241 int device_id;
242 struct i915_device *i915;
243 drm_i915_getparam_t get_param;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800244
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800245 i915 = calloc(1, sizeof(*i915));
246 if (!i915)
247 return -ENOMEM;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800248
249 memset(&get_param, 0, sizeof(get_param));
250 get_param.param = I915_PARAM_CHIPSET_ID;
251 get_param.value = &device_id;
252 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
253 if (ret) {
Gurchetan Singh68af9c22017-01-18 13:48:11 -0800254 fprintf(stderr, "drv: Failed to get I915_PARAM_CHIPSET_ID\n");
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800255 free(i915);
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800256 return -EINVAL;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800257 }
258
Gurchetan Singh68af9c22017-01-18 13:48:11 -0800259 i915->gen = i915_get_gen(device_id);
260
261 memset(&get_param, 0, sizeof(get_param));
262 get_param.param = I915_PARAM_HAS_LLC;
263 get_param.value = &i915->has_llc;
264 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
265 if (ret) {
266 fprintf(stderr, "drv: Failed to get I915_PARAM_HAS_LLC\n");
267 free(i915);
268 return -EINVAL;
269 }
270
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800271 drv->priv = i915;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800272
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800273 return i915_add_combinations(drv);
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800274}
275
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800276static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
277 uint32_t flags)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700278{
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700279 int ret;
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800280 size_t plane;
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700281 uint32_t stride;
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800282 struct drm_i915_gem_create gem_create;
283 struct drm_i915_gem_set_tiling gem_set_tiling;
Tomasz Figa7ec07882017-06-23 18:04:02 +0900284 struct combination *combo;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700285
Tomasz Figa7ec07882017-06-23 18:04:02 +0900286 combo = drv_get_combination(bo->drv, format, flags);
287 if (!combo)
288 return -EINVAL;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700289
Tomasz Figa7ec07882017-06-23 18:04:02 +0900290 bo->tiling = combo->metadata.tiling;
Owen Linbbb69fd2017-06-05 14:33:08 +0800291
292 stride = drv_stride_from_format(format, width, 0);
Gurchetan Singh507f5dd2017-03-16 13:14:30 -0700293
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800294 ret = i915_align_dimensions(bo, bo->tiling, &stride, &height);
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700295 if (ret)
296 return ret;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800297
Owen Linbbb69fd2017-06-05 14:33:08 +0800298 /*
299 * Align the Y plane to 128 bytes so the chroma planes would be aligned
300 * to 64 byte boundaries. This is an Intel HW requirement.
301 */
302 if (format == DRM_FORMAT_YVU420)
303 stride = ALIGN(stride, 128);
304
305 /*
306 * HAL_PIXEL_FORMAT_YV12 requires that the buffer's height not be aligned.
307 */
308 if (format == DRM_FORMAT_YVU420_ANDROID)
309 height = bo->height;
310
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700311 drv_bo_from_format(bo, stride, height, format);
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800312
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800313 memset(&gem_create, 0, sizeof(gem_create));
314 gem_create.size = bo->total_size;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800315
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800316 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
317 if (ret) {
318 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n",
319 gem_create.size);
320 return ret;
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700321 }
Gurchetan Singh83dc4fb2016-07-19 15:52:33 -0700322
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800323 for (plane = 0; plane < bo->num_planes; plane++)
324 bo->handles[plane].u32 = gem_create.handle;
Daniel Nicoara1de26dc2014-09-25 18:53:19 -0400325
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800326 memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
327 gem_set_tiling.handle = bo->handles[0].u32;
328 gem_set_tiling.tiling_mode = bo->tiling;
329 gem_set_tiling.stride = bo->strides[0];
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700330
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800331 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling);
332 if (ret) {
333 struct drm_gem_close gem_close;
334 memset(&gem_close, 0, sizeof(gem_close));
335 gem_close.handle = bo->handles[0].u32;
336 drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800337
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800338 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_TILING failed with %d", errno);
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700339 return -errno;
340 }
341
342 return 0;
343}
344
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800345static void i915_close(struct driver *drv)
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800346{
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800347 free(drv->priv);
348 drv->priv = NULL;
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800349}
350
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800351static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
352{
353 int ret;
354 struct drm_i915_gem_get_tiling gem_get_tiling;
355
356 ret = drv_prime_bo_import(bo, data);
357 if (ret)
358 return ret;
359
360 /* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
361 memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
362 gem_get_tiling.handle = bo->handles[0].u32;
363
364 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling);
365 if (ret) {
Joe Kniss9e5d12a2017-06-29 11:54:22 -0700366 drv_gem_bo_destroy(bo);
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800367 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_GET_TILING failed.");
368 return ret;
369 }
370
371 bo->tiling = gem_get_tiling.tiling_mode;
372 return 0;
373}
374
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700375static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane)
Gurchetan Singhef920532016-08-12 16:38:25 -0700376{
377 int ret;
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800378 void *addr;
379 struct drm_i915_gem_set_domain set_domain;
Gurchetan Singhef920532016-08-12 16:38:25 -0700380
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800381 memset(&set_domain, 0, sizeof(set_domain));
382 set_domain.handle = bo->handles[0].u32;
383 if (bo->tiling == I915_TILING_NONE) {
384 struct drm_i915_gem_mmap gem_map;
385 memset(&gem_map, 0, sizeof(gem_map));
Gurchetan Singhef920532016-08-12 16:38:25 -0700386
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800387 gem_map.handle = bo->handles[0].u32;
388 gem_map.offset = 0;
389 gem_map.size = bo->total_size;
390
391 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_map);
392 if (ret) {
393 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP failed\n");
394 return MAP_FAILED;
395 }
396
397 addr = (void *)(uintptr_t)gem_map.addr_ptr;
398 set_domain.read_domains = I915_GEM_DOMAIN_CPU;
399 set_domain.write_domain = I915_GEM_DOMAIN_CPU;
400
401 } else {
402 struct drm_i915_gem_mmap_gtt gem_map;
403 memset(&gem_map, 0, sizeof(gem_map));
404
405 gem_map.handle = bo->handles[0].u32;
406
407 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
408 if (ret) {
409 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
410 return MAP_FAILED;
411 }
412
413 addr = mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED, bo->drv->fd,
414 gem_map.offset);
415
416 set_domain.read_domains = I915_GEM_DOMAIN_GTT;
417 set_domain.write_domain = I915_GEM_DOMAIN_GTT;
418 }
419
420 if (addr == MAP_FAILED) {
421 fprintf(stderr, "drv: i915 GEM mmap failed\n");
422 return addr;
423 }
424
425 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain);
Gurchetan Singhef920532016-08-12 16:38:25 -0700426 if (ret) {
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800427 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_DOMAIN failed\n");
Gurchetan Singhef920532016-08-12 16:38:25 -0700428 return MAP_FAILED;
429 }
430
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800431 data->length = bo->total_size;
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800432 return addr;
433}
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700434
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800435static int i915_bo_unmap(struct bo *bo, struct map_info *data)
436{
Gurchetan Singh68af9c22017-01-18 13:48:11 -0800437 struct i915_device *i915 = bo->drv->priv;
438 if (!i915->has_llc && bo->tiling == I915_TILING_NONE)
439 i915_clflush(data->addr, data->length);
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800440
441 return munmap(data->addr, data->length);
Gurchetan Singhef920532016-08-12 16:38:25 -0700442}
443
Tomasz Figace1ae022017-07-05 18:15:06 +0900444static uint32_t i915_resolve_format(uint32_t format, uint64_t usage)
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700445{
446 switch (format) {
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800447 case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
Tomasz Figad30c0a52017-07-05 17:50:18 +0900448 /* KBL camera subsystem requires NV12. */
449 if (usage & (BO_USE_HW_CAMERA_READ | BO_USE_HW_CAMERA_WRITE))
450 return DRM_FORMAT_NV12;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700451 /*HACK: See b/28671744 */
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800452 return DRM_FORMAT_XBGR8888;
453 case DRM_FORMAT_FLEX_YCbCr_420_888:
Tomasz Figad30c0a52017-07-05 17:50:18 +0900454 /* KBL camera subsystem requires NV12. */
455 if (usage & (BO_USE_HW_CAMERA_READ | BO_USE_HW_CAMERA_WRITE))
456 return DRM_FORMAT_NV12;
Owen Linbbb69fd2017-06-05 14:33:08 +0800457 return DRM_FORMAT_YVU420;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700458 default:
459 return format;
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700460 }
461}
462
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800463struct backend backend_i915 = {
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700464 .name = "i915",
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700465 .init = i915_init,
466 .close = i915_close,
467 .bo_create = i915_bo_create,
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800468 .bo_destroy = drv_gem_bo_destroy,
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800469 .bo_import = i915_bo_import,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700470 .bo_map = i915_bo_map,
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800471 .bo_unmap = i915_bo_unmap,
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700472 .resolve_format = i915_resolve_format,
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700473};
474
475#endif