sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 1 | |
| 2 | /*---------------------------------------------------------------*/ |
| 3 | /*--- ---*/ |
sewardj | c0ee2ed | 2004-07-27 10:29:41 +0000 | [diff] [blame] | 4 | /*--- This file (main/vex_main.c) is ---*/ |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 5 | /*--- Copyright (c) 2004 OpenWorks LLP. All rights reserved. ---*/ |
| 6 | /*--- ---*/ |
| 7 | /*---------------------------------------------------------------*/ |
| 8 | |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 9 | #include "libvex.h" |
sewardj | 81ec418 | 2004-10-25 23:15:52 +0000 | [diff] [blame] | 10 | #include "libvex_guest_x86.h" |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 11 | |
sewardj | c0ee2ed | 2004-07-27 10:29:41 +0000 | [diff] [blame] | 12 | #include "main/vex_globals.h" |
| 13 | #include "main/vex_util.h" |
| 14 | #include "host-generic/h_generic_regs.h" |
| 15 | #include "host-x86/hdefs.h" |
| 16 | #include "guest-x86/gdefs.h" |
sewardj | edf4d69 | 2004-08-17 13:52:58 +0000 | [diff] [blame] | 17 | #include "ir/iropt.h" |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 18 | |
| 19 | |
| 20 | /* This file contains the top level interface to the library. */ |
| 21 | |
| 22 | /* --------- Initialise the library. --------- */ |
| 23 | |
| 24 | /* Exported to library client. */ |
| 25 | |
sewardj | 0861374 | 2004-10-25 13:01:45 +0000 | [diff] [blame] | 26 | void LibVEX_default_VexControl ( /*OUT*/ VexControl* vcon ) |
| 27 | { |
| 28 | vcon->iropt_verbosity = 0; |
| 29 | vcon->iropt_level = 2; |
| 30 | vcon->iropt_precise_memory_exns = False; |
| 31 | vcon->iropt_unroll_thresh = 120; |
| 32 | vcon->guest_max_insns = 50; |
| 33 | vcon->guest_chase_thresh = 10; |
| 34 | } |
| 35 | |
| 36 | |
| 37 | /* Exported to library client. */ |
| 38 | |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 39 | void LibVEX_Init ( |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 40 | /* failure exit function */ |
sewardj | 2b51587 | 2004-07-05 20:50:45 +0000 | [diff] [blame] | 41 | __attribute__ ((noreturn)) |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 42 | void (*failure_exit) ( void ), |
| 43 | /* logging output function */ |
| 44 | void (*log_bytes) ( Char*, Int nbytes ), |
| 45 | /* debug paranoia level */ |
| 46 | Int debuglevel, |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 47 | /* Are we supporting valgrind checking? */ |
| 48 | Bool valgrind_support, |
sewardj | 0861374 | 2004-10-25 13:01:45 +0000 | [diff] [blame] | 49 | /* Control ... */ |
| 50 | /*READONLY*/VexControl* vcon |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 51 | ) |
| 52 | { |
sewardj | 0861374 | 2004-10-25 13:01:45 +0000 | [diff] [blame] | 53 | /* First off, do enough minimal setup so that the following |
| 54 | assertions can fail in a sane fashion, if need be. */ |
sewardj | ea602bc | 2004-10-14 21:40:12 +0000 | [diff] [blame] | 55 | vex_failure_exit = failure_exit; |
| 56 | vex_log_bytes = log_bytes; |
| 57 | |
| 58 | /* Now it's safe to check parameters for sanity. */ |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 59 | vassert(!vex_initdone); |
| 60 | vassert(failure_exit); |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 61 | vassert(log_bytes); |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 62 | vassert(debuglevel >= 0); |
sewardj | 0861374 | 2004-10-25 13:01:45 +0000 | [diff] [blame] | 63 | |
| 64 | vassert(vcon->iropt_verbosity >= 0); |
| 65 | vassert(vcon->iropt_level >= 0); |
| 66 | vassert(vcon->iropt_level <= 2); |
| 67 | vassert(vcon->iropt_unroll_thresh >= 0); |
| 68 | vassert(vcon->iropt_unroll_thresh <= 400); |
| 69 | vassert(vcon->guest_max_insns >= 1); |
| 70 | vassert(vcon->guest_max_insns <= 100); |
| 71 | vassert(vcon->guest_chase_thresh >= 0); |
| 72 | vassert(vcon->guest_chase_thresh < vcon->guest_max_insns); |
sewardj | 443cd9d | 2004-07-18 23:06:45 +0000 | [diff] [blame] | 73 | |
sewardj | 81ec418 | 2004-10-25 23:15:52 +0000 | [diff] [blame] | 74 | /* All the guest state structs must have an 8-aligned size. */ |
| 75 | vassert(0 == sizeof(VexGuestX86State) % 8); |
| 76 | |
sewardj | ea602bc | 2004-10-14 21:40:12 +0000 | [diff] [blame] | 77 | /* Check that Vex has been built with sizes of basic types as |
| 78 | stated in priv/libvex_basictypes.h. Failure of any of these is |
| 79 | a serious configuration error and should be corrected |
| 80 | immediately. If any of these assertions fail you can fully |
| 81 | expect Vex not to work properly, if at all. */ |
| 82 | |
| 83 | vassert(1 == sizeof(UChar)); |
| 84 | vassert(1 == sizeof(Char)); |
| 85 | vassert(2 == sizeof(UShort)); |
| 86 | vassert(2 == sizeof(Short)); |
| 87 | vassert(4 == sizeof(UInt)); |
| 88 | vassert(4 == sizeof(Int)); |
| 89 | vassert(8 == sizeof(ULong)); |
| 90 | vassert(8 == sizeof(Long)); |
| 91 | vassert(4 == sizeof(Float)); |
| 92 | vassert(8 == sizeof(Double)); |
| 93 | vassert(1 == sizeof(Bool)); |
| 94 | vassert(4 == sizeof(Addr32)); |
| 95 | vassert(8 == sizeof(Addr64)); |
| 96 | |
| 97 | vassert(sizeof(void*) == 4 || sizeof(void*) == 8); |
| 98 | vassert(sizeof(void*) == sizeof(int*)); |
| 99 | vassert(sizeof(void*) == sizeof(HWord)); |
| 100 | |
| 101 | /* Really start up .. */ |
sewardj | 443cd9d | 2004-07-18 23:06:45 +0000 | [diff] [blame] | 102 | vex_debuglevel = debuglevel; |
sewardj | 443cd9d | 2004-07-18 23:06:45 +0000 | [diff] [blame] | 103 | vex_valgrind_support = valgrind_support; |
sewardj | 0861374 | 2004-10-25 13:01:45 +0000 | [diff] [blame] | 104 | vex_control = *vcon; |
sewardj | 443cd9d | 2004-07-18 23:06:45 +0000 | [diff] [blame] | 105 | vex_initdone = True; |
| 106 | LibVEX_SetAllocMode ( AllocModeTEMPORARY ); |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 107 | } |
| 108 | |
| 109 | |
| 110 | /* --------- Make a translation. --------- */ |
| 111 | |
| 112 | /* Exported to library client. */ |
| 113 | |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 114 | TranslateResult LibVEX_Translate ( |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 115 | /* The instruction sets we are translating from and to. */ |
| 116 | InsnSet iset_guest, |
| 117 | InsnSet iset_host, |
| 118 | /* IN: the block to translate, and its guest address. */ |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 119 | UChar* guest_bytes, |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 120 | Addr64 guest_bytes_addr, |
| 121 | /* OUT: the number of bytes actually read */ |
| 122 | Int* guest_bytes_read, |
| 123 | /* IN: a place to put the resulting code, and its size */ |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 124 | UChar* host_bytes, |
| 125 | Int host_bytes_size, |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 126 | /* OUT: how much of the output area is used. */ |
| 127 | Int* host_bytes_used, |
sewardj | 49651f4 | 2004-10-28 22:11:04 +0000 | [diff] [blame] | 128 | /* IN: optionally, two instrumentation functions. */ |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 129 | IRBB* (*instrument1) ( IRBB*, VexGuestLayout*, IRType hWordTy ), |
| 130 | IRBB* (*instrument2) ( IRBB*, VexGuestLayout*, IRType hWordTy ), |
sewardj | 9578a8b | 2004-11-04 19:44:48 +0000 | [diff] [blame^] | 131 | Bool cleanup_after_instrumentation, |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 132 | /* IN: optionally, an access check function for guest code. */ |
sewardj | 58800ff | 2004-07-28 01:51:10 +0000 | [diff] [blame] | 133 | Bool (*byte_accessible) ( Addr64 ), |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 134 | /* IN: debug: trace vex activity at various points */ |
| 135 | Int traceflags |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 136 | ) |
| 137 | { |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 138 | /* This the bundle of functions we need to do the back-end stuff |
| 139 | (insn selection, reg-alloc, assembly) whilst being insulated |
| 140 | from the target instruction set. */ |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 141 | HReg* available_real_regs; |
| 142 | Int n_available_real_regs; |
sewardj | 443cd9d | 2004-07-18 23:06:45 +0000 | [diff] [blame] | 143 | Bool (*isMove) (HInstr*, HReg*, HReg*); |
| 144 | void (*getRegUsage) (HRegUsage*, HInstr*); |
| 145 | void (*mapRegs) (HRegRemap*, HInstr*); |
| 146 | HInstr* (*genSpill) ( HReg, Int ); |
| 147 | HInstr* (*genReload) ( HReg, Int ); |
| 148 | void (*ppInstr) ( HInstr* ); |
| 149 | void (*ppReg) ( HReg ); |
sewardj | 8ea867b | 2004-10-30 19:03:02 +0000 | [diff] [blame] | 150 | HInstrArray* (*iselBB) ( IRBB* ); |
sewardj | 443cd9d | 2004-07-18 23:06:45 +0000 | [diff] [blame] | 151 | IRBB* (*bbToIR) ( UChar*, Addr64, Int*, |
| 152 | Bool(*)(Addr64), Bool ); |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 153 | Int (*emit) ( UChar*, Int, HInstr* ); |
sewardj | 84ff065 | 2004-08-23 16:16:08 +0000 | [diff] [blame] | 154 | IRExpr* (*specHelper) ( Char*, IRExpr** ); |
sewardj | 8d2291c | 2004-10-25 14:50:21 +0000 | [diff] [blame] | 155 | Bool (*preciseMemExnsFn) ( Int, Int ); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 156 | |
sewardj | eeac841 | 2004-11-02 00:26:55 +0000 | [diff] [blame] | 157 | VexGuestLayout* guest_layout; |
| 158 | Bool host_is_bigendian = False; |
| 159 | IRBB* irbb; |
| 160 | HInstrArray* vcode; |
| 161 | HInstrArray* rcode; |
| 162 | Int i, j, k, out_used, guest_sizeB; |
| 163 | UChar insn_bytes[32]; |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 164 | IRType guest_word_type; |
| 165 | IRType host_word_type; |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 166 | |
sewardj | 49651f4 | 2004-10-28 22:11:04 +0000 | [diff] [blame] | 167 | guest_layout = NULL; |
sewardj | 36ca513 | 2004-07-24 13:12:23 +0000 | [diff] [blame] | 168 | available_real_regs = NULL; |
| 169 | n_available_real_regs = 0; |
| 170 | isMove = NULL; |
| 171 | getRegUsage = NULL; |
| 172 | mapRegs = NULL; |
| 173 | genSpill = NULL; |
| 174 | genReload = NULL; |
| 175 | ppInstr = NULL; |
| 176 | ppReg = NULL; |
| 177 | iselBB = NULL; |
| 178 | bbToIR = NULL; |
| 179 | emit = NULL; |
sewardj | 84ff065 | 2004-08-23 16:16:08 +0000 | [diff] [blame] | 180 | specHelper = NULL; |
sewardj | 8d2291c | 2004-10-25 14:50:21 +0000 | [diff] [blame] | 181 | preciseMemExnsFn = NULL; |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 182 | guest_word_type = Ity_INVALID; |
| 183 | host_word_type = Ity_INVALID; |
sewardj | 36ca513 | 2004-07-24 13:12:23 +0000 | [diff] [blame] | 184 | |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 185 | vex_traceflags = traceflags; |
sewardj | 58800ff | 2004-07-28 01:51:10 +0000 | [diff] [blame] | 186 | |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 187 | vassert(vex_initdone); |
sewardj | 443cd9d | 2004-07-18 23:06:45 +0000 | [diff] [blame] | 188 | LibVEX_ClearTemporary(False); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 189 | |
| 190 | /* First off, check that the guest and host insn sets |
| 191 | are supported. */ |
| 192 | switch (iset_host) { |
| 193 | case InsnSetX86: |
| 194 | getAllocableRegs_X86 ( &n_available_real_regs, |
| 195 | &available_real_regs ); |
| 196 | isMove = (Bool(*)(HInstr*,HReg*,HReg*)) isMove_X86Instr; |
| 197 | getRegUsage = (void(*)(HRegUsage*,HInstr*)) getRegUsage_X86Instr; |
| 198 | mapRegs = (void(*)(HRegRemap*,HInstr*)) mapRegs_X86Instr; |
| 199 | genSpill = (HInstr*(*)(HReg,Int)) genSpill_X86; |
| 200 | genReload = (HInstr*(*)(HReg,Int)) genReload_X86; |
sewardj | 2b51587 | 2004-07-05 20:50:45 +0000 | [diff] [blame] | 201 | ppInstr = (void(*)(HInstr*)) ppX86Instr; |
| 202 | ppReg = (void(*)(HReg)) ppHRegX86; |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 203 | iselBB = iselBB_X86; |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 204 | emit = (Int(*)(UChar*,Int,HInstr*)) emit_X86Instr; |
sewardj | c9a6570 | 2004-07-07 16:32:57 +0000 | [diff] [blame] | 205 | host_is_bigendian = False; |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 206 | host_word_type = Ity_I32; |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 207 | break; |
| 208 | default: |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 209 | vpanic("LibVEX_Translate: unsupported target insn set"); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 210 | } |
| 211 | |
| 212 | switch (iset_guest) { |
| 213 | case InsnSetX86: |
sewardj | 8d2291c | 2004-10-25 14:50:21 +0000 | [diff] [blame] | 214 | preciseMemExnsFn = guest_x86_state_requires_precise_mem_exns; |
| 215 | bbToIR = bbToIR_X86Instr; |
sewardj | 8d2291c | 2004-10-25 14:50:21 +0000 | [diff] [blame] | 216 | specHelper = x86guest_spechelper; |
sewardj | 81ec418 | 2004-10-25 23:15:52 +0000 | [diff] [blame] | 217 | guest_sizeB = sizeof(VexGuestX86State); |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 218 | guest_word_type = Ity_I32; |
sewardj | 49651f4 | 2004-10-28 22:11:04 +0000 | [diff] [blame] | 219 | guest_layout = &x86guest_layout; |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 220 | break; |
| 221 | default: |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 222 | vpanic("LibVEX_Translate: unsupported guest insn set"); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 223 | } |
| 224 | |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 225 | if (vex_traceflags & VEX_TRACE_FE) |
| 226 | vex_printf("\n------------------------" |
| 227 | " Front end " |
| 228 | "------------------------\n\n"); |
| 229 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 230 | irbb = bbToIR ( guest_bytes, |
| 231 | guest_bytes_addr, |
| 232 | guest_bytes_read, |
sewardj | c9a6570 | 2004-07-07 16:32:57 +0000 | [diff] [blame] | 233 | byte_accessible, |
| 234 | host_is_bigendian ); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 235 | |
| 236 | if (irbb == NULL) { |
| 237 | /* Access failure. */ |
sewardj | 443cd9d | 2004-07-18 23:06:45 +0000 | [diff] [blame] | 238 | LibVEX_ClearTemporary(False); |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 239 | vex_traceflags = 0; |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 240 | return TransAccessFail; |
| 241 | } |
sewardj | aa59f94 | 2004-10-09 09:34:36 +0000 | [diff] [blame] | 242 | |
| 243 | /* If debugging, show the raw guest bytes for this bb. */ |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 244 | if (vex_traceflags & VEX_TRACE_FE) { |
sewardj | aa59f94 | 2004-10-09 09:34:36 +0000 | [diff] [blame] | 245 | UChar* p = guest_bytes; |
sewardj | aa59f94 | 2004-10-09 09:34:36 +0000 | [diff] [blame] | 246 | vex_printf(". 0 %llx %d\n.", guest_bytes_addr, *guest_bytes_read ); |
| 247 | for (i = 0; i < *guest_bytes_read; i++) |
| 248 | vex_printf(" %02x", (Int)p[i] ); |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 249 | vex_printf("\n\n"); |
sewardj | aa59f94 | 2004-10-09 09:34:36 +0000 | [diff] [blame] | 250 | } |
| 251 | |
| 252 | /* Sanity check the initial IR. */ |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 253 | sanityCheckIRBB(irbb, guest_word_type); |
sewardj | e8e9d73 | 2004-07-16 21:03:45 +0000 | [diff] [blame] | 254 | |
sewardj | edf4d69 | 2004-08-17 13:52:58 +0000 | [diff] [blame] | 255 | /* Clean it up, hopefully a lot. */ |
sewardj | 8d2291c | 2004-10-25 14:50:21 +0000 | [diff] [blame] | 256 | irbb = do_iropt_BB ( irbb, specHelper, preciseMemExnsFn, |
| 257 | guest_bytes_addr ); |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 258 | sanityCheckIRBB(irbb, guest_word_type); |
sewardj | edf4d69 | 2004-08-17 13:52:58 +0000 | [diff] [blame] | 259 | |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 260 | if (vex_traceflags & VEX_TRACE_OPT1) { |
| 261 | vex_printf("\n------------------------" |
| 262 | " After pre-instr IR optimisation " |
| 263 | "------------------------\n\n"); |
sewardj | edf4d69 | 2004-08-17 13:52:58 +0000 | [diff] [blame] | 264 | ppIRBB ( irbb ); |
| 265 | vex_printf("\n"); |
| 266 | } |
| 267 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 268 | /* Get the thing instrumented. */ |
sewardj | 49651f4 | 2004-10-28 22:11:04 +0000 | [diff] [blame] | 269 | if (instrument1) |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 270 | irbb = (*instrument1)(irbb, guest_layout, host_word_type); |
sewardj | 49651f4 | 2004-10-28 22:11:04 +0000 | [diff] [blame] | 271 | if (instrument2) |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 272 | irbb = (*instrument2)(irbb, guest_layout, host_word_type); |
sewardj | 49651f4 | 2004-10-28 22:11:04 +0000 | [diff] [blame] | 273 | |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 274 | if (vex_traceflags & VEX_TRACE_INST) { |
| 275 | vex_printf("\n------------------------" |
| 276 | " After instrumentation " |
| 277 | "------------------------\n\n"); |
| 278 | ppIRBB ( irbb ); |
| 279 | vex_printf("\n"); |
| 280 | } |
| 281 | |
sewardj | 49651f4 | 2004-10-28 22:11:04 +0000 | [diff] [blame] | 282 | if (instrument1 || instrument2) |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 283 | sanityCheckIRBB(irbb, guest_word_type); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 284 | |
sewardj | 9578a8b | 2004-11-04 19:44:48 +0000 | [diff] [blame^] | 285 | /* Do a post-instrumentation cleanup pass. */ |
| 286 | if (cleanup_after_instrumentation) { |
| 287 | do_deadcode_BB( irbb ); |
| 288 | irbb = cprop_BB( irbb ); |
| 289 | do_deadcode_BB( irbb ); |
| 290 | sanityCheckIRBB(irbb, guest_word_type); |
| 291 | } |
| 292 | |
| 293 | if (vex_traceflags & VEX_TRACE_OPT2) { |
| 294 | vex_printf("\n------------------------" |
| 295 | " After post-instr IR optimisation " |
| 296 | "------------------------\n\n"); |
| 297 | ppIRBB ( irbb ); |
| 298 | vex_printf("\n"); |
| 299 | } |
| 300 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 301 | /* Turn it into virtual-registerised code. */ |
sewardj | 49651f4 | 2004-10-28 22:11:04 +0000 | [diff] [blame] | 302 | do_deadcode_BB( irbb ); |
| 303 | do_treebuild_BB( irbb ); |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 304 | |
| 305 | if (vex_traceflags & VEX_TRACE_TREES) { |
| 306 | vex_printf("\n------------------------" |
| 307 | " After tree-building " |
| 308 | "------------------------\n\n"); |
| 309 | ppIRBB ( irbb ); |
| 310 | vex_printf("\n"); |
| 311 | } |
| 312 | |
| 313 | if (vex_traceflags & VEX_TRACE_VCODE) |
| 314 | vex_printf("\n------------------------" |
| 315 | " Instruction selection " |
| 316 | "------------------------\n"); |
| 317 | |
sewardj | 8ea867b | 2004-10-30 19:03:02 +0000 | [diff] [blame] | 318 | vcode = iselBB ( irbb ); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 319 | |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 320 | if (vex_traceflags & VEX_TRACE_VCODE) |
| 321 | vex_printf("\n"); |
| 322 | |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 323 | if (vex_traceflags & VEX_TRACE_VCODE) { |
sewardj | 1f40a0a | 2004-07-21 12:28:07 +0000 | [diff] [blame] | 324 | for (i = 0; i < vcode->arr_used; i++) { |
| 325 | vex_printf("%3d ", i); |
| 326 | ppInstr(vcode->arr[i]); |
| 327 | vex_printf("\n"); |
| 328 | } |
sewardj | fbcaf33 | 2004-07-08 01:46:01 +0000 | [diff] [blame] | 329 | vex_printf("\n"); |
| 330 | } |
sewardj | fbcaf33 | 2004-07-08 01:46:01 +0000 | [diff] [blame] | 331 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 332 | /* Register allocate. */ |
| 333 | rcode = doRegisterAllocation ( vcode, available_real_regs, |
| 334 | n_available_real_regs, |
| 335 | isMove, getRegUsage, mapRegs, |
sewardj | 81ec418 | 2004-10-25 23:15:52 +0000 | [diff] [blame] | 336 | genSpill, genReload, guest_sizeB, |
sewardj | 2b51587 | 2004-07-05 20:50:45 +0000 | [diff] [blame] | 337 | ppInstr, ppReg ); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 338 | |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 339 | if (vex_traceflags & VEX_TRACE_RCODE) { |
| 340 | vex_printf("\n------------------------" |
| 341 | " Register-allocated code " |
| 342 | "------------------------\n\n"); |
sewardj | 1f40a0a | 2004-07-21 12:28:07 +0000 | [diff] [blame] | 343 | for (i = 0; i < rcode->arr_used; i++) { |
| 344 | vex_printf("%3d ", i); |
| 345 | ppInstr(rcode->arr[i]); |
| 346 | vex_printf("\n"); |
| 347 | } |
sewardj | fbcaf33 | 2004-07-08 01:46:01 +0000 | [diff] [blame] | 348 | vex_printf("\n"); |
| 349 | } |
sewardj | fbcaf33 | 2004-07-08 01:46:01 +0000 | [diff] [blame] | 350 | |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 351 | /* Assemble */ |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 352 | if (vex_traceflags & VEX_TRACE_ASM) { |
| 353 | vex_printf("\n------------------------" |
| 354 | " Assembly " |
| 355 | "------------------------\n\n"); |
| 356 | } |
| 357 | |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 358 | out_used = 0; /* tracks along the host_bytes array */ |
| 359 | for (i = 0; i < rcode->arr_used; i++) { |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 360 | if (vex_traceflags & VEX_TRACE_ASM) { |
sewardj | bad34a9 | 2004-07-22 01:14:11 +0000 | [diff] [blame] | 361 | ppInstr(rcode->arr[i]); |
| 362 | vex_printf("\n"); |
| 363 | } |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 364 | j = (*emit)( insn_bytes, 32, rcode->arr[i] ); |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 365 | if (vex_traceflags & VEX_TRACE_ASM) { |
sewardj | bad34a9 | 2004-07-22 01:14:11 +0000 | [diff] [blame] | 366 | for (k = 0; k < j; k++) |
sewardj | 86898e8 | 2004-07-22 17:26:12 +0000 | [diff] [blame] | 367 | if (insn_bytes[k] < 16) |
| 368 | vex_printf("0%x ", (UInt)insn_bytes[k]); |
| 369 | else |
| 370 | vex_printf("%x ", (UInt)insn_bytes[k]); |
sewardj | bad34a9 | 2004-07-22 01:14:11 +0000 | [diff] [blame] | 371 | vex_printf("\n\n"); |
| 372 | } |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 373 | if (out_used + j > host_bytes_size) { |
| 374 | LibVEX_ClearTemporary(False); |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 375 | vex_traceflags = 0; |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 376 | return TransOutputFull; |
| 377 | } |
| 378 | for (k = 0; k < j; k++) { |
| 379 | host_bytes[out_used] = insn_bytes[k]; |
| 380 | out_used++; |
| 381 | } |
| 382 | vassert(out_used <= host_bytes_size); |
| 383 | } |
| 384 | *host_bytes_used = out_used; |
| 385 | |
sewardj | 1f40a0a | 2004-07-21 12:28:07 +0000 | [diff] [blame] | 386 | LibVEX_ClearTemporary(False); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 387 | |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 388 | vex_traceflags = 0; |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 389 | return TransOK; |
| 390 | } |
| 391 | |
| 392 | |
| 393 | |
| 394 | /*---------------------------------------------------------------*/ |
sewardj | c0ee2ed | 2004-07-27 10:29:41 +0000 | [diff] [blame] | 395 | /*--- end main/vex_main.c ---*/ |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 396 | /*---------------------------------------------------------------*/ |